OpenTitan is an open source secure silicon ecosystem producing both silicon IP and complete top-level designs capable of supporting numerous applications, including a discrete secure micro-controller and an integrated secure execution environment (both supporting Root of Trust functionality with secure boot and DICE attestation). OpenTitan will make design and implementation of secure silicon more transparent, trustworthy, and secure for enterprises, platforms, and chip manufacturers. OpenTitan is administered by lowRISC CIC as a collaborative, partner-centric project to produce high quality, open IP for instantiation as a full-featured product. This repository exists to enable collaboration across participating OpenTitan project partners and the broader open silicon community.
Start at the Getting Started page to begin your OpenTitan journey. Other helpful OpenTitan resources include the contribution and the tools guides. The Hardware book also contains useful technical documentation on the SoC, our RISC-V Ibex processor core, and the individual IP blocks. For questions about how project organization and governance, see the project landing spot.
- OpenTitan Earl Grey (Standalone Chip) Datasheet
- OpenTitan Darjeeling (Integrated Admissible Architecture) Datasheet
The underlying repo is set up as a monolithic repository to contain RTL, helper scripts, technical documentation, and other software necessary to produce our hardware designs.
Unless otherwise noted, everything in the repository is covered by the Apache License, Version 2.0. See the LICENSE file and repository README for more information on licensing and see the user guides below for more information on development methodology.