[DXIL] Add GroupMemoryBarrierWithGroupSync intrinsic

[adam-yang]

fixes #112974
partially fixes #70103

This change was reverted so some issues could be fixed.

Changes

• Added new tablegen based way of lowering dx intrinsics to DXIL ops.
• Added int_dx_group_memory_barrier_with_group_sync intrinsic in IntrinsicsDirectX.td
• Added expansion for int_dx_group_memory_barrier_with_group_sync in DXILIntrinsicExpansion.cpp`
• Added DXIL backend test case

Related PRs

• [clang][HLSL] Add GroupMemoryBarrierWithGroupSync intrinsic #111883
• [SPIRV] Add GroupMemoryBarrierWithGroupSync intrinsic #111888

[adam-yang]

Regarding the warnings:

• The switch which covers all enumeration values warning was resolved by removing the default.
• The must specify at least one argument for '...' parameter of variadic macro warning was resolved by doing what DXIL_OP_FUNCTION_TYPE did, which used the same variadic parameter mechanism, but leaves empty ones like DXIL_OP_FUNCTION_TYPE(dxil::OpCode::WaveIsFirstLane, dxil::OpParamType::Int1Ty, ) which satisfies the compiler.