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[Transforms] Vectorizing Mem2Reg Pass #107688

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[Transforms] Vectorizing Mem2Reg Pass #107688

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f60e3b7
[NFC] [SROA] Cache Basic Block Predecessors and Successors while
huangjd Jun 27, 2024
b37ebb2
Initial commit, saving temp work
huangjd Jul 23, 2024
4a55ab4
initial commit
huangjd Sep 5, 2024
ba0e6d0
clean up some debug stuff
huangjd Sep 5, 2024
bfd13b9
Cleanup
huangjd Sep 6, 2024
88f37a9
testing different state vector layout
huangjd Sep 6, 2024
aa39d7f
Use consistent sorting function with scalar Mem2Reg
huangjd Sep 9, 2024
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8 changes: 8 additions & 0 deletions llvm/include/llvm/Support/GenericDomTree.h
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Original file line number Diff line number Diff line change
Expand Up @@ -409,6 +409,14 @@ class DominatorTreeBase {
return getNode(BB);
}

/// getNode - Access a node directly when its node number is known.
DomTreeNodeBase<NodeT> *getNode(unsigned Idx) const {
// DT is 1-indexed.
if (Idx + 1 < DomTreeNodes.size())
return DomTreeNodes[Idx + 1].get();
return nullptr;
}

/// getRootNode - This returns the entry node for the CFG of the function. If
/// this tree represents the post-dominance relations for a function, however,
/// this root may be a node with the block == NULL. This is the case when
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