Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

[RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs #103709

Merged
merged 2 commits into from
Aug 19, 2024

Commits on Aug 19, 2024

  1. [RISCV][MC] Support experimental extensions Zvbc32e and Zvkgs

    These two extensions add addtional instructions for carryless
    multiplication with 32-bits elements and Vector-Scalar GCM
    instructions.
    
    Please see riscv/riscv-isa-manual#1306.
    wangpc-pp committed Aug 19, 2024
    Configuration menu
    Copy the full SHA
    0330ffd View commit details
    Browse the repository at this point in the history
  2. Address comments

    wangpc-pp committed Aug 19, 2024
    Configuration menu
    Copy the full SHA
    9776aae View commit details
    Browse the repository at this point in the history