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Is there any generic cpu model support for RVV?Or how to add a cpu model for RISCV? #88851
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I saw a PR here.But it occured some conflicts. |
@llvm/issue-subscribers-backend-risc-v Author: None (dinyy)
While I‘m tryring OpenCL(PoCL) on RISC-V,it call llvm to generate it's kernel. I want to use `-march=rv64gcv`, but it occurs that I need `-mcpu` when I use opt. I need a cpu model which support RVV.
Now I change the code in `llvm-project/llvm/lib/Target/RISCV/RISCVProcessors.td` that :
![image](https://github.com/llvm/llvm-project/assets/107465691/ee44f36c-11d4-41e2-9c0c-4a53ab46801c)
but I don't find other place to change,I saw that [page](https://discourse.llvm.org/t/custom-risc-v-processor-can-be-selected-via-mcpu-in-llc-but-not-in-clang/5849),but code has been changed so much.
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When https://discourse.llvm.org/t/custom-risc-v-processor-can-be-selected-via-mcpu-in-llc-but-not-in-clang/5849 was written, there were two files that contained the list of CPUs. One for the backend and one for the frontend. Since early 2023, RISCVProcessors.td is used by both the frontend and the backend. |
Have you seen #76357? I think |
-march is a clang option. The description mentions the |
So I must add a cpu model, do you mean I could add a cpu model just by changing |
63f742c might help you see what is needed to add a new mcpu. It looks like you were on the right path in your original screen shot. |
Thank you very much, I will try again. |
While I‘m tryring OpenCL(PoCL) on RISC-V,it call llvm to generate it's kernel. I want to use
-march=rv64gcv
, but it occurs that I need-mcpu
when I use opt. I need a cpu model which support RVV.Now I change the code in
llvm-project/llvm/lib/Target/RISCV/RISCVProcessors.td
that :but I don't find other place to change,I saw that page,but code has been changed so much.
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