From ba0e871db81d8527382a051a0abf1ce2a171d8bf Mon Sep 17 00:00:00 2001 From: Florian Hahn Date: Wed, 22 May 2024 13:11:01 +0100 Subject: [PATCH] [ConstraintElim] Look through SExt with precond Op sge 0. Look through SExt with a precondition that the operand is signed positive. https://alive2.llvm.org/ce/z/zvVVHj --- llvm/lib/Transforms/Scalar/ConstraintElimination.cpp | 6 ++++++ .../ConstraintElimination/sext-unsigned-predicates.ll | 6 +++--- .../transfer-signed-facts-to-unsigned.ll | 6 ++---- 3 files changed, 11 insertions(+), 7 deletions(-) diff --git a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp index 7e48c28176bd1c..70bfa469193bfe 100644 --- a/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp +++ b/llvm/lib/Transforms/Scalar/ConstraintElimination.cpp @@ -554,6 +554,12 @@ static Decomposition decompose(Value *V, V = Op0; } + if (match(V, m_SExt(m_Value(Op0)))) { + V = Op0; + Preconditions.emplace_back(CmpInst::ICMP_SGE, Op0, + ConstantInt::get(Op0->getType(), 0)); + } + Value *Op1; ConstantInt *CI; if (match(V, m_NUWAdd(m_Value(Op0), m_Value(Op1)))) { diff --git a/llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll b/llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll index ac3e57768ae550..00dc48ef89c99a 100644 --- a/llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll +++ b/llvm/test/Transforms/ConstraintElimination/sext-unsigned-predicates.ll @@ -13,7 +13,8 @@ define void @uge_sext(i16 %x, i32 %y) { ; CHECK-NEXT: [[AND:%.*]] = and i1 [[C_1]], [[C_2]] ; CHECK-NEXT: br i1 [[AND]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: -; CHECK-NEXT: call void @use(i1 true) +; CHECK-NEXT: [[T_1:%.*]] = icmp uge i32 [[X_EXT]], [[Y]] +; CHECK-NEXT: call void @use(i1 [[T_1]]) ; CHECK-NEXT: [[C_3:%.*]] = icmp uge i16 [[X]], -10 ; CHECK-NEXT: call void @use(i1 [[C_3]]) ; CHECK-NEXT: [[C_4:%.*]] = icmp uge i32 [[X_EXT]], -9 @@ -65,8 +66,7 @@ define void @uge_sext_known_positive(i16 %x, i32 %y) { ; CHECK-NEXT: br i1 [[AND]], label [[BB1:%.*]], label [[BB2:%.*]] ; CHECK: bb1: ; CHECK-NEXT: call void @use(i1 true) -; CHECK-NEXT: [[T_2:%.*]] = icmp uge i16 [[X]], 10 -; CHECK-NEXT: call void @use(i1 [[T_2]]) +; CHECK-NEXT: call void @use(i1 true) ; CHECK-NEXT: [[C_3:%.*]] = icmp uge i32 [[X_EXT]], 11 ; CHECK-NEXT: call void @use(i1 [[C_3]]) ; CHECK-NEXT: [[C_4:%.*]] = icmp uge i32 [[X_EXT]], 11 diff --git a/llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned.ll b/llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned.ll index 2fe92628dfa3b6..68e48c7d2944b1 100644 --- a/llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned.ll +++ b/llvm/test/Transforms/ConstraintElimination/transfer-signed-facts-to-unsigned.ll @@ -503,11 +503,9 @@ define i32 @sge_2_gep(i32 %idx, ptr %src, i32 %idx.2) { ; CHECK-NEXT: [[CMP:%.*]] = icmp sge i32 [[IDX]], 2 ; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]]) ; CHECK-NEXT: [[ADD_PTR_2:%.*]] = getelementptr inbounds i32, ptr [[SRC]], i32 [[IDX_2:%.*]] -; CHECK-NEXT: [[T_1:%.*]] = icmp ult ptr [[SRC]], [[ADD_PTR]] ; CHECK-NEXT: [[C_1:%.*]] = icmp ult ptr [[SRC]], [[ADD_PTR_2]] -; CHECK-NEXT: [[X_1:%.*]] = xor i1 [[T_1]], [[C_1]] -; CHECK-NEXT: [[F_1:%.*]] = icmp uge ptr [[SRC]], [[ADD_PTR]] -; CHECK-NEXT: [[X_2:%.*]] = xor i1 [[X_1]], [[F_1]] +; CHECK-NEXT: [[X_1:%.*]] = xor i1 true, [[C_1]] +; CHECK-NEXT: [[X_2:%.*]] = xor i1 [[X_1]], false ; CHECK-NEXT: br i1 [[X_2]], label [[THEN:%.*]], label [[ELSE:%.*]] ; CHECK: then: ; CHECK-NEXT: ret i32 0