From 7a556427b2f6dda61974984ac47ead00bc707828 Mon Sep 17 00:00:00 2001 From: Adam Yang Date: Thu, 10 Oct 2024 12:11:53 -0700 Subject: [PATCH] Fixed test and updated naming convention for the intrinsic --- llvm/include/llvm/IR/IntrinsicsSPIRV.td | 2 +- llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp | 6 +++--- .../GroupMemoryBarrierWithGroupSync.ll | 9 --------- .../group_memory_barrier_with_group_sync.ll | 14 ++++++++++++++ 4 files changed, 18 insertions(+), 13 deletions(-) delete mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/GroupMemoryBarrierWithGroupSync.ll create mode 100644 llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll diff --git a/llvm/include/llvm/IR/IntrinsicsSPIRV.td b/llvm/include/llvm/IR/IntrinsicsSPIRV.td index 06d33aa882d56bb..26dcef9286dacad 100644 --- a/llvm/include/llvm/IR/IntrinsicsSPIRV.td +++ b/llvm/include/llvm/IR/IntrinsicsSPIRV.td @@ -85,5 +85,5 @@ let TargetPrefix = "spv" in { def int_spv_wave_is_first_lane : DefaultAttrsIntrinsic<[llvm_i1_ty], [], [IntrConvergent]>; def int_spv_sign : DefaultAttrsIntrinsic<[LLVMScalarOrSameVectorWidth<0, llvm_i32_ty>], [llvm_any_ty], [IntrNoMem]>; def int_spv_radians : DefaultAttrsIntrinsic<[LLVMMatchType<0>], [llvm_anyfloat_ty], [IntrNoMem]>; - def int_spv_groupMemoryBarrierWithGroupSync : DefaultAttrsIntrinsic<[], [], []>; + def int_spv_group_memory_barrier_with_group_sync : DefaultAttrsIntrinsic<[], [], []>; } diff --git a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp index 82d039f389afa5a..5b684af40c96f2a 100644 --- a/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp +++ b/llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp @@ -2515,8 +2515,9 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg, return selectExtInst(ResVReg, ResType, I, CL::rsqrt, GL::InverseSqrt); case Intrinsic::spv_sign: return selectSign(ResVReg, ResType, I); - case Intrinsic::spv_groupMemoryBarrierWithGroupSync: { - Register MemSemReg = buildI32Constant(SPIRV::MemorySemantics::SequentiallyConsistent, I); + case Intrinsic::spv_group_memory_barrier_with_group_sync: { + Register MemSemReg = + buildI32Constant(SPIRV::MemorySemantics::SequentiallyConsistent, I); Register ScopeReg = buildI32Constant(SPIRV::Scope::Workgroup, I); MachineBasicBlock &BB = *I.getParent(); return BuildMI(BB, I, I.getDebugLoc(), TII.get(SPIRV::OpControlBarrier)) @@ -2524,7 +2525,6 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg, .addUse(ScopeReg) .addUse(MemSemReg) .constrainAllUses(TII, TRI, RBI); - //return selectBarrier(ResVReg, ResType, I, SPIRV::OpControlBarrier, ); } break; case Intrinsic::spv_lifetime_start: case Intrinsic::spv_lifetime_end: { diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/GroupMemoryBarrierWithGroupSync.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/GroupMemoryBarrierWithGroupSync.ll deleted file mode 100644 index 10185a5356bc5c5..000000000000000 --- a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/GroupMemoryBarrierWithGroupSync.ll +++ /dev/null @@ -1,9 +0,0 @@ -; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s -; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %} - -define void @test_group_memory_barrier_with_group_sync() { -entry: - ; CHECK: call void @dx.op.barrier(i32 80, i32 9) - call void @llvm.spv.groupMemoryBarrierWithGroupSync() - ret void -} diff --git a/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll new file mode 100644 index 000000000000000..6955411a0e4e99b --- /dev/null +++ b/llvm/test/CodeGen/SPIRV/hlsl-intrinsics/group_memory_barrier_with_group_sync.ll @@ -0,0 +1,14 @@ +; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv-unknown-unknown %s -o - | FileCheck %s +; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv-unknown-unknown %s -o - -filetype=obj | spirv-val %} + +; CHECK: OpMemoryModel Logical GLSL450 + +define void @test_group_memory_barrier_with_group_sync() { +entry: + ; CHECK: %[[#TY:]] = OpTypeInt 32 0 + ; CHECK-DAG: %[[#MEM_SEM:]] = OpConstant %[[#TY]] 16 + ; CHECK-DAG: %[[#EXEC_AND_MEM_SCOPE:]] = OpConstant %[[#TY]] 2 + ; CHECK: OpControlBarrier %[[#EXEC_AND_MEM_SCOPE]] %[[#EXEC_AND_MEM_SCOPE]] %[[#MEM_SEM]] + call void @llvm.spv.group.memory.barrier.with.group.sync() + ret void +}