diff --git a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp index 06b434857c657a..2c6e9723a56ac9 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp @@ -1500,6 +1500,8 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) { // lshr (mul nuw (X, 2^N + 1)), N -> add nuw (X, lshr(X, N)) if (Op0->hasOneUse()) { + if (!isGuaranteedNotToBeUndef(X, &AC, &I, &DT)) + X = Builder.CreateFreeze(X, ".fr"); auto *NewAdd = BinaryOperator::CreateNUWAdd( X, Builder.CreateLShr(X, ConstantInt::get(Ty, ShAmtC), "", I.isExact())); @@ -1531,6 +1533,8 @@ Instruction *InstCombinerImpl::visitLShr(BinaryOperator &I) { if (match(Op0, m_OneUse(m_NSWMul(m_Value(X), m_APInt(MulC))))) { if (BitWidth > 2 && (*MulC - 1).isPowerOf2() && MulC->logBase2() == ShAmtC) { + if (!isGuaranteedNotToBeUndef(X, &AC, &I, &DT)) + X = Builder.CreateFreeze(X, ".fr"); return BinaryOperator::CreateNSWAdd( X, Builder.CreateLShr(X, ConstantInt::get(Ty, ShAmtC), "", I.isExact())); diff --git a/llvm/test/Transforms/InstCombine/ashr-lshr.ll b/llvm/test/Transforms/InstCombine/ashr-lshr.ll index c2a4f35412670b..2532ce3975e805 100644 --- a/llvm/test/Transforms/InstCombine/ashr-lshr.ll +++ b/llvm/test/Transforms/InstCombine/ashr-lshr.ll @@ -607,8 +607,9 @@ define <2 x i8> @ashr_known_pos_exact_vec(<2 x i8> %x, <2 x i8> %y) { define i32 @lshr_mul_times_3_div_2(i32 %0) { ; CHECK-LABEL: @lshr_mul_times_3_div_2( -; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0:%.*]], 1 -; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[TMP2]], [[TMP0]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP0:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[DOTFR]], 1 +; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[DOTFR]], [[TMP2]] ; CHECK-NEXT: ret i32 [[LSHR]] ; %mul = mul nsw nuw i32 %0, 3 @@ -618,8 +619,9 @@ define i32 @lshr_mul_times_3_div_2(i32 %0) { define i32 @lshr_mul_times_3_div_2_exact(i32 %x) { ; CHECK-LABEL: @lshr_mul_times_3_div_2_exact( -; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[X:%.*]], 1 -; CHECK-NEXT: [[LSHR:%.*]] = add nsw i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[X:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[DOTFR]], 1 +; CHECK-NEXT: [[LSHR:%.*]] = add nsw i32 [[DOTFR]], [[TMP1]] ; CHECK-NEXT: ret i32 [[LSHR]] ; %mul = mul nsw i32 %x, 3 @@ -657,8 +659,9 @@ define i32 @mul_times_3_div_2_multiuse_lshr(i32 %x) { define i32 @lshr_mul_times_3_div_2_exact_2(i32 %x) { ; CHECK-LABEL: @lshr_mul_times_3_div_2_exact_2( -; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[X:%.*]], 1 -; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[X:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[DOTFR]], 1 +; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[DOTFR]], [[TMP1]] ; CHECK-NEXT: ret i32 [[LSHR]] ; %mul = mul nuw i32 %x, 3 @@ -668,8 +671,9 @@ define i32 @lshr_mul_times_3_div_2_exact_2(i32 %x) { define i32 @lshr_mul_times_5_div_4(i32 %0) { ; CHECK-LABEL: @lshr_mul_times_5_div_4( -; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[TMP0:%.*]], 2 -; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[TMP2]], [[TMP0]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[TMP0:%.*]] +; CHECK-NEXT: [[TMP2:%.*]] = lshr i32 [[DOTFR]], 2 +; CHECK-NEXT: [[LSHR:%.*]] = add nuw nsw i32 [[DOTFR]], [[TMP2]] ; CHECK-NEXT: ret i32 [[LSHR]] ; %mul = mul nsw nuw i32 %0, 5 @@ -679,8 +683,9 @@ define i32 @lshr_mul_times_5_div_4(i32 %0) { define i32 @lshr_mul_times_5_div_4_exact(i32 %x) { ; CHECK-LABEL: @lshr_mul_times_5_div_4_exact( -; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[X:%.*]], 2 -; CHECK-NEXT: [[LSHR:%.*]] = add nsw i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[X:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[DOTFR]], 2 +; CHECK-NEXT: [[LSHR:%.*]] = add nsw i32 [[DOTFR]], [[TMP1]] ; CHECK-NEXT: ret i32 [[LSHR]] ; %mul = mul nsw i32 %x, 5 @@ -718,8 +723,9 @@ define i32 @mul_times_5_div_4_multiuse_lshr(i32 %x) { define i32 @lshr_mul_times_5_div_4_exact_2(i32 %x) { ; CHECK-LABEL: @lshr_mul_times_5_div_4_exact_2( -; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[X:%.*]], 2 -; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[X:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr exact i32 [[DOTFR]], 2 +; CHECK-NEXT: [[LSHR:%.*]] = add nuw i32 [[DOTFR]], [[TMP1]] ; CHECK-NEXT: ret i32 [[LSHR]] ; %mul = mul nuw i32 %x, 5 diff --git a/llvm/test/Transforms/InstCombine/lshr.ll b/llvm/test/Transforms/InstCombine/lshr.ll index 01e07985ba6ab5..a300bc71a84eb3 100644 --- a/llvm/test/Transforms/InstCombine/lshr.ll +++ b/llvm/test/Transforms/InstCombine/lshr.ll @@ -741,8 +741,9 @@ define i32 @mul_splat_fold_wrong_lshr_const(i32 %x) { define i32 @mul_splat_fold_no_nuw(i32 %x) { ; CHECK-LABEL: @mul_splat_fold_no_nuw( -; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[X:%.*]], 16 -; CHECK-NEXT: [[T:%.*]] = add nsw i32 [[TMP1]], [[X]] +; CHECK-NEXT: [[DOTFR:%.*]] = freeze i32 [[X:%.*]] +; CHECK-NEXT: [[TMP1:%.*]] = lshr i32 [[DOTFR]], 16 +; CHECK-NEXT: [[T:%.*]] = add nsw i32 [[DOTFR]], [[TMP1]] ; CHECK-NEXT: ret i32 [[T]] ; %m = mul nsw i32 %x, 65537