From a7e5efab82a40fa289fc10e69cb24452531be58b Mon Sep 17 00:00:00 2001
From: Ivan Kosarev <ivan@kosarev.info>
Date: Mon, 13 Jun 2022 20:24:18 +0100
Subject: [PATCH] [Sim][#37] Refine verbalization of transistors.

---
 tests/z80sim/z80sim.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/tests/z80sim/z80sim.py b/tests/z80sim/z80sim.py
index 9d81557..88b17b0 100755
--- a/tests/z80sim/z80sim.py
+++ b/tests/z80sim/z80sim.py
@@ -83,7 +83,7 @@ def __init__(self, index, gate, c1, c2):
         self.state = False
 
     def __repr__(self):
-        return f'{self.id}({self.c1}, {self.gate}, {self.c2})'
+        return f'{self.c1} = {self.c2} [{self.gate}]  # {self.id}'
 
     def __lt__(self, other):
         return self.index < other.index