to op return different results on XPU and CPU/CUDA platforms

[hoshibara]

🐛 Describe the bug

to(torch.int8) will get different result on XPU.

import torch


torch.tensor([[ 57.7637, 215.2612, 212.4291],[193.8332, 227.0923, 158.8016]], device='cpu').to(torch.int8)
# tensor([[ 57, -41, -44],
#         [-63, -29, -98]], dtype=torch.int8)
torch.tensor([[ 57.7637, 215.2612, 212.4291],[193.8332, 227.0923, 158.8016]], device='cuda:0').to(torch.int8)
# tensor([[ 57, -41, -44],
#         [-63, -29, -98]], device='cuda:0', dtype=torch.int8)
torch.tensor([[ 57.7637, 215.2612, 212.4291],[193.8332, 227.0923, 158.8016]], device='xpu:0').to(torch.int8)
# tensor([[ 57, 127, 127],
#         [127, 127, 127]], device='xpu:0', dtype=torch.int8)

torch.tensor([ -3.4028234663852886e+38, -2, -1.5, -0.5, 0, 0.5, 1.5, 2], device='cpu').to(torch.int8)
# tensor([ 0, -2, -1, 0, 0, 0, 1, 2], dtype=torch.int8)
torch.tensor([ -3.4028234663852886e+38, -2, -1.5, -0.5, 0, 0.5, 1.5, 2], device='xpu:0').to(torch.int8)
# tensor([ -128, -2, -1, 0, 0, 0, 1, 2], device='xpu:0', dtype=torch.int8)

Versions

Collecting environment information...
PyTorch version: 2.5.0a0+git9382288
Is debug build: False
CUDA used to build PyTorch: None
ROCM used to build PyTorch: N/A

OS: Ubuntu 22.04.4 LTS (x86_64)
GCC version: (Ubuntu 11.4.0-1ubuntu1~22.04) 11.4.0
Clang version: Could not collect
CMake version: version 3.30.3
Libc version: glibc-2.35

Python version: 3.10.14 | packaged by conda-forge | (main, Mar 20 2024, 12:45:18) [GCC 12.3.0] (64-bit runtime)
Python platform: Linux-5.15.50-051550-generic-x86_64-with-glibc2.35
Is CUDA available: False
CUDA runtime version: No CUDA
CUDA_MODULE_LOADING set to: N/A
GPU models and configuration: No CUDA
Nvidia driver version: No CUDA
cuDNN version: No CUDA
HIP runtime version: N/A
MIOpen runtime version: N/A
Is XNNPACK available: True

CPU:
Architecture:                    x86_64
CPU op-mode(s):                  32-bit, 64-bit
Address sizes:                   52 bits physical, 57 bits virtual
Byte Order:                      Little Endian
CPU(s):                          224
On-line CPU(s) list:             0-223
Vendor ID:                       GenuineIntel
Model name:                      Intel(R) Xeon(R) Platinum 8480+
CPU family:                      6
Model:                           143
Thread(s) per core:              2
Core(s) per socket:              56
Socket(s):                       2
Stepping:                        6
CPU max MHz:                     3800.0000
CPU min MHz:                     800.0000
BogoMIPS:                        4000.00
Flags:                           fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 cat_l2 cdp_l3 invpcid_single intel_ppin cdp_l2 ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust bmi1 avx2 smep bmi2 erms invpcid cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect avx_vnni avx512_bf16 wbnoinvd dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req avx512vbmi umip pku ospke waitpkg avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid bus_lock_detect cldemote movdiri movdir64b enqcmd fsrm md_clear serialize tsxldtrk pconfig arch_lbr avx512_fp16 flush_l1d arch_capabilities
Virtualization:                  VT-x
L1d cache:                       5.3 MiB (112 instances)
L1i cache:                       3.5 MiB (112 instances)
L2 cache:                        224 MiB (112 instances)
L3 cache:                        210 MiB (2 instances)
NUMA node(s):                    2
NUMA node0 CPU(s):               0-55,112-167
NUMA node1 CPU(s):               56-111,168-223
Vulnerability Itlb multihit:     Not affected
Vulnerability L1tf:              Not affected
Vulnerability Mds:               Not affected
Vulnerability Meltdown:          Not affected
Vulnerability Mmio stale data:   Not affected
Vulnerability Spec store bypass: Mitigation; Speculative Store Bypass disabled via prctl and seccomp
Vulnerability Spectre v1:        Mitigation; usercopy/swapgs barriers and __user pointer sanitization
Vulnerability Spectre v2:        Mitigation; Enhanced IBRS, IBPB conditional, RSB filling
Vulnerability Srbds:             Not affected
Vulnerability Tsx async abort:   Not affected

Versions of relevant libraries:
[pip3] flake8==6.1.0
[pip3] flake8-bugbear==23.3.23
[pip3] flake8-comprehensions==3.15.0
[pip3] flake8-executable==2.1.3
[pip3] flake8-logging-format==0.9.0
[pip3] flake8-pyi==23.3.1
[pip3] flake8-simplify==0.19.3
[pip3] mypy==1.10.0
[pip3] mypy-extensions==1.0.0
[pip3] numpy==1.26.0
[pip3] optree==0.12.1
[pip3] pytorch-triton-xpu==3.0.0+1b2f15840e
[pip3] torch==2.5.0a0+git9382288
[pip3] triton==3.0.0
[conda] mkl-include               2024.2.1           ha957f24_103    conda-forge
[conda] mkl-static                2024.2.1           ha770c72_103    conda-forge
[conda] numpy                     1.26.0                   pypi_0    pypi
[conda] optree                    0.12.1                   pypi_0    pypi
[conda] pytorch-triton-xpu        3.0.0+1b2f15840e          pypi_0    pypi
[conda] torch                     2.5.0a0+git9382288           dev_0    <develop>
[conda] torchfix                  0.4.0                    pypi_0    pypi
[conda] triton                    3.0.0                    pypi_0    pypi

[majing921201]

hi, @fengyuan14 This error is for int8_t overflow value. For CPU/CUDA, (float)215.2612-->(int8)-41, (float)212.4291 -->(int8)-44. But for XPU, the overflow value is always 127. Overflow is an undefined behavior, do you think that we need to file jira to sycl compiler team ?

[fengyuan14]

Please file a JIRA to ask if the behavior should be aligned.

[majing921201]

https://jira.devtools.intel.com/browse/GSD-10160 jira to track this issue