diff --git a/README.md b/README.md
index b6e281a..d3e061f 100644
--- a/README.md
+++ b/README.md
@@ -28,8 +28,8 @@ For instructions on how to upload the bitstream to the ARTY board and how to con
 
 Prebuilt fpga bitstreams including the X300 RISC-V SoC and the MultiZone SDK firmware are provided as release assets ready to go:
 
-- [multizone-sdk-arty-35t.mcs](https://github.com/hex-five/multizone-sdk/releases/download/v2.2.7/multizone-sdk-arty-35t.mcs)
-- [multizone-sdk-arty-100t.mcs](https://github.com/hex-five/multizone-sdk/releases/download/v2.2.7/multizone-sdk-arty-100t.mcs)
+- [multizone-sdk-arty-35t.mcs](https://github.com/hex-five/multizone-sdk/releases/download/v2.2.8/multizone-sdk-arty-35t.mcs)
+- [multizone-sdk-arty-100t.mcs](https://github.com/hex-five/multizone-sdk/releases/download/v2.2.8/multizone-sdk-arty-100t.mcs)
 
 If you are impatient to run the MultiZone SDK reference firmware, just upload the right bitstream to your Arty board and skip all steps below. For this you'll only need [Xilinx Vivado Lab](https://www.xilinx.com/support/download.html) an the instructions at https://github.com/hex-five/multizone-fpga#readme