[herd] Write a label to LR (X30) when it is possible #776
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| } | ||
| P0 | P0.F ; | ||
| L0: | STR X2,[X3] ; | ||
| LDR W0,[X1] | DSB ISHST ; |
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Isn't a final ERET instruction missing here?
| LDR W0,[X1] | DSB ISHST ; | |
| LDR W0,[X1] | DSB ISHST ; | |
| | ERET ; |
And is the DSB ISHR instruction necessary?
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Yes indeed the ERET is missing, my bad. I'll fix it now.
Yes, without ETS2, I think we need a DSB to make sure that the LDR won't fault again. Or am I missing something?
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Hi @relokin, this PR looks good to me. I have only one question about the vmsa test. |
| } | ||
| P0 | P0.F ; | ||
| L0: | STR X2,[X3] ; | ||
| LDR W0,[X1] | DSB ISHST ; |
There was a problem hiding this comment.
Yes indeed the ERET is missing, my bad. I'll fix it now.
Yes, without ETS2, I think we need a DSB to make sure that the LDR won't fault again. Or am I missing something?
In sequences where the label is know, rather than setting the LR with an internal address we use the label. This means that in certain cases (-variant=ifetch) we can use it to address the instruction in that label. Signed-off-by: Nikos Nikoleris <[email protected]>
This change enables herd to handle tests like:
AArch64 LDRv0+I2V-dsb.ishst
{
[PTE(x)]=(oa:PA(x),valid:0);
x=1;
0:X1=x;
0:X3=PTE(x);
0:X2=(oa:PA(x),valid:1);
}
P0 | P0.F ;
L0: | STR X2,[X3] ;
LDR W0,[X1] | DSB ISHST ;
| ERET ;
locations[0:ELR_EL1;]
forall(0:X0=1)
Note that in the above test ELR_EL1 is automatically set to
P0:L0. However this wouldn't be the case if the faulting instruction
didn't have a label. In which case herd7 would warn that the target of
ERET is unknown.
Signed-off-by: Nikos Nikoleris <[email protected]>
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@maranget are you happy with this PR? |
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I am happy, please feel free to merge. |
Thanks @maranget ! |
In sequences where the label is know, rather than setting the LR with an internal address we use the label. This means that in certain cases (-variant=ifetch) we can use it to address the instruction in that label.