Useful link-time lints

[ISSOtm]

These would be useful as opt-in link-time warnings:

• For every control flow instruction (call, jp, jr, rst¹) targeting a label in ROMX, emit a(n equivalent of) assert BANK(@) == 0 || BANK(<target>) == 0 || BANK(@) == BANK(<target>). Do this only if PC is in a ROMX section², which also excludes LOAD.
• For every jp, check for and suggest using jr instead if possible.
  • Possibly make this a multi-level lint, where by default cross-SECTION jumps are not checked?

Footnotes

1. rst always targets ROM0, but if we add support for swappable ROM0, possibly via HDFs ([Feature request/proposal] Hardware layout description files (custom mapper support) #524), then this would be multi-banked. ↩

2. In theory, BANK(@) != 0 for ROMX, but -t maps ROMX to ROM0. The destination is then guaranteed to be in ROM0 as well, but that may not remain the case if we add some similar feature to HDFs, so a cheap stringent check is good for future-proofing. ↩

[Rangi42]

This partly overlaps #1017. Edit: I've consolidated the two.