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linux-v6.10.patch
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linux-v6.10.patch
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From 6f28ec71cd58b7b16055ddcf0692cd128b46eb3f Mon Sep 17 00:00:00 2001
From: Dongli Zhang <[email protected]>
Date: Mon, 16 Sep 2024 00:52:51 -0700
Subject: [PATCH 1/1] linux-v6.10
Signed-off-by: Dongli Zhang <[email protected]>
---
arch/arm64/include/asm/kvm_host.h | 23 +
arch/arm64/kvm/pmu-emul.c | 278 +++++++++
arch/arm64/kvm/sys_regs.c | 18 +
arch/x86/events/amd/core.c | 24 +
arch/x86/events/core.c | 29 +
arch/x86/include/asm/kvm_host.h | 387 +++++++++++++
arch/x86/include/uapi/asm/kvm.h | 6 +
arch/x86/kernel/e820.c | 4 +
arch/x86/kvm/cpuid.c | 17 +
arch/x86/kvm/irq.c | 11 +
arch/x86/kvm/irq_comm.c | 18 +
arch/x86/kvm/lapic.c | 676 ++++++++++++++++++++++
arch/x86/kvm/lapic.h | 124 ++++
arch/x86/kvm/mmu.h | 26 +
arch/x86/kvm/mmu/mmu.c | 28 +
arch/x86/kvm/mmu/mmu_internal.h | 190 ++++++
arch/x86/kvm/mmu/spte.c | 765 +++++++++++++++++++++++++
arch/x86/kvm/mmu/spte.h | 404 +++++++++++++
arch/x86/kvm/mmu/tdp_mmu.c | 9 +
arch/x86/kvm/pmu.c | 137 +++++
arch/x86/kvm/pmu.h | 16 +
arch/x86/kvm/svm/pmu.c | 9 +
arch/x86/kvm/svm/svm.c | 13 +
arch/x86/kvm/vmx/pmu_intel.c | 32 ++
arch/x86/kvm/vmx/posted_intr.c | 140 +++++
arch/x86/kvm/vmx/vmx.c | 37 ++
arch/x86/kvm/vmx/vmx.h | 23 +
arch/x86/kvm/x86.c | 171 ++++++
arch/x86/kvm/x86.h | 5 +
drivers/acpi/acpica/acmacros.h | 22 +
drivers/acpi/acpica/dsfield.c | 6 +
drivers/acpi/acpica/tbxfload.c | 4 +
drivers/acpi/acpica/uterror.c | 4 +
drivers/pci/bus.c | 196 +++++++
drivers/pci/hotplug/acpiphp_glue.c | 9 +
drivers/pci/hotplug/shpchp_pci.c | 4 +
drivers/pci/probe.c | 51 ++
drivers/pci/setup-bus.c | 171 ++++++
drivers/pci/setup-res.c | 129 +++++
drivers/vhost/scsi.c | 5 +
drivers/virtio/virtio.c | 157 +++++
drivers/virtio/virtio_debug.c | 4 +
drivers/virtio/virtio_pci_common.c | 20 +
drivers/virtio/virtio_pci_modern.c | 32 ++
drivers/virtio/virtio_pci_modern_dev.c | 35 ++
fs/fcntl.c | 6 +
fs/nfs/nfs4state.c | 4 +
include/linux/virtio.h | 10 +
include/linux/virtio_config.h | 32 ++
kernel/events/core.c | 117 ++++
kernel/resource.c | 66 +++
kernel/sched/core.c | 21 +
kernel/sched/stats.h | 12 +
virt/kvm/irqchip.c | 3 +
virt/kvm/kvm_main.c | 16 +
55 files changed, 4756 insertions(+)
diff --git a/arch/arm64/include/asm/kvm_host.h b/arch/arm64/include/asm/kvm_host.h
index 36b8e97bf..aea79993a 100644
--- a/arch/arm64/include/asm/kvm_host.h
+++ b/arch/arm64/include/asm/kvm_host.h
@@ -308,6 +308,15 @@ struct kvm_arch {
cpumask_var_t supported_cpus;
+ /*
+ * 在以下使用kvm_arch->pmcr_n (arm64):
+ * - arch/arm64/kvm/pmu-emul.c|1074| <<kvm_arm_set_pmu>> kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|1366| <<kvm_vcpu_read_pmcr>> return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * - arch/arm64/kvm/sys_regs.c|849| <<reset_pmu_reg>> u8 n = vcpu->kvm->arch.pmcr_n;
+ * - arch/arm64/kvm/sys_regs.c|1284| <<set_pmcr>> kvm->arch.pmcr_n = new_n;
+ *
+ * 注释: PMCR_EL0.N value for the guest
+ */
/* PMCR_EL0.N value for the guest */
u8 pmcr_n;
@@ -939,6 +948,20 @@ static inline u64 *___ctxt_sys_reg(const struct kvm_cpu_context *ctxt, int r)
#define ctxt_sys_reg(c,r) (*__ctxt_sys_reg(c,r))
u64 kvm_vcpu_sanitise_vncr_reg(const struct kvm_vcpu *, enum vcpu_sysreg);
+/*
+ * struct kvm_vcpu:
+ * -> struct kvm_vcpu_arch arch;
+ * -> struct kvm_cpu_context ctxt;
+ * -> struct user_pt_regs regs;
+ * -> u64 spsr_abt;
+ * -> u64 spsr_und;
+ * -> u64 spsr_irq;
+ * -> u64 spsr_fiq;
+ * -> struct user_fpsimd_state fp_regs;
+ * -> u64 sys_regs[NR_SYS_REGS];
+ * -> struct kvm_vcpu *__hyp_running_vcpu;
+ * -> u64 *vncr_array;
+ */
#define __vcpu_sys_reg(v,r) \
(*({ \
const struct kvm_cpu_context *ctxt = &(v)->arch.ctxt; \
diff --git a/arch/arm64/kvm/pmu-emul.c b/arch/arm64/kvm/pmu-emul.c
index a35ce10e0..1077d0c5f 100644
--- a/arch/arm64/kvm/pmu-emul.c
+++ b/arch/arm64/kvm/pmu-emul.c
@@ -18,21 +18,113 @@
#define PERF_ATTR_CFG1_COUNTER_64BIT BIT(0)
+/*
+ * 在以下使用kvm_arm_pmu_available:
+ * - arch/arm64/kernel/image-vars.h|119| <<global>> KVM_NVHE_ALIAS(kvm_arm_pmu_available);
+ * - arch/arm64/kvm/pmu-emul.c|21| <<global>> DEFINE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
+ * - include/kvm/arm_pmu.h|40| <<global>> DECLARE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
+ * - arch/arm64/kvm/pmu-emul.c|731| <<kvm_host_pmu_init>> static_branch_enable(&kvm_arm_pmu_available);
+ * - include/kvm/arm_pmu.h|44| <<kvm_arm_support_pmu_v3>> return static_branch_likely(&kvm_arm_pmu_available);
+ */
DEFINE_STATIC_KEY_FALSE(kvm_arm_pmu_available);
+/*
+ * 在以下使用arm_pmus:
+ * - arch/arm64/kvm/pmu-emul.c|23| <<global>> static LIST_HEAD(arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|728| <<kvm_host_pmu_init>> list_add_tail(&entry->entry, &arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|730| <<kvm_host_pmu_init>> if (list_is_singular(&arm_pmus))
+ * - arch/arm64/kvm/pmu-emul.c|763| <<kvm_pmu_probe_armpmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ * - arch/arm64/kvm/pmu-emul.c|977| <<kvm_arm_pmu_v3_set_pmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ */
static LIST_HEAD(arm_pmus);
static DEFINE_MUTEX(arm_pmus_lock);
static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc);
static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc);
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|166| <<kvm_pmc_is_64bit>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|174| <<kvm_pmc_has_64bit_overflow>> u64 val = kvm_vcpu_read_pmcr(kvm_pmc_to_vcpu(pmc));
+ * - arch/arm64/kvm/pmu-emul.c|198| <<kvm_pmu_get_pmc_value>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|238| <<kvm_pmu_set_pmc_value>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|314| <<kvm_pmu_stop_counter>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|614| <<kvm_pmu_perf_overflow>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|704| <<kvm_pmu_counter_is_enabled>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|721| <<kvm_pmu_create_perf_event>> struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
+ */
static struct kvm_vcpu *kvm_pmc_to_vcpu(const struct kvm_pmc *pmc)
{
return container_of(pmc, struct kvm_vcpu, arch.pmu.pmc[pmc->idx]);
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|147| <<kvm_pmu_get_counter_value>> return kvm_pmu_get_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx));
+ * - arch/arm64/kvm/pmu-emul.c|193| <<kvm_pmu_set_counter_value>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx), val, false);
+ * - arch/arm64/kvm/pmu-emul.c|257| <<kvm_pmu_vcpu_reset>> kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|270| <<kvm_pmu_vcpu_destroy>> kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|306| <<kvm_pmu_enable_counter_mask>> pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
+ * - arch/arm64/kvm/pmu-emul.c|338| <<kvm_pmu_disable_counter_mask>> pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
+ * - arch/arm64/kvm/pmu-emul.c|458| <<kvm_pmu_counter_increment>> struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, i);
+ * - arch/arm64/kvm/pmu-emul.c|591| <<kvm_pmu_handle_pmcr>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true);
+ * - arch/arm64/kvm/pmu-emul.c|698| <<kvm_pmu_set_counter_event_type>> struct kvm_pmc *pmc = kvm_vcpu_idx_to_pmc(vcpu, select_idx);
+ */
static struct kvm_pmc *kvm_vcpu_idx_to_pmc(struct kvm_vcpu *vcpu, int cnt_idx)
{
+ /*
+ * x86的.
+ *
+ * struct kvm_pmu {
+ * u8 version;
+ * unsigned nr_arch_gp_counters;
+ * unsigned nr_arch_fixed_counters;
+ * unsigned available_event_types;
+ * u64 fixed_ctr_ctrl;
+ * u64 fixed_ctr_ctrl_mask;
+ * u64 global_ctrl;
+ * u64 global_status;
+ * u64 counter_bitmask[2];
+ * u64 global_ctrl_mask;
+ * u64 global_status_mask;
+ * u64 reserved_bits;
+ * u64 raw_event_mask;
+ * struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
+ * struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
+ *
+ * union {
+ * DECLARE_BITMAP(reprogram_pmi, X86_PMC_IDX_MAX);
+ * atomic64_t __reprogram_pmi;
+ * };
+ * DECLARE_BITMAP(all_valid_pmc_idx, X86_PMC_IDX_MAX);
+ * DECLARE_BITMAP(pmc_in_use, X86_PMC_IDX_MAX);
+ *
+ * u64 ds_area;
+ * u64 pebs_enable;
+ * u64 pebs_enable_mask;
+ * u64 pebs_data_cfg;
+ * u64 pebs_data_cfg_mask;
+ *
+ * u64 host_cross_mapped_mask;
+ *
+ * bool need_cleanup;
+ *
+ * u8 event_count;
+ * };
+ *
+ *
+ * arm64的.
+ *
+ * struct kvm_vcpu *vcpu:
+ * -> struct kvm_vcpu_arch arch;
+ * -> struct kvm_pmu pmu;
+ * -> struct irq_work overflow_work;
+ * -> struct kvm_pmu_events events;
+ * -> struct kvm_pmc pmc[ARMV8_PMU_MAX_COUNTERS];
+ * -> int irq_num;
+ * -> bool created;
+ * -> bool irq_level;
+ */
return &vcpu->arch.pmu.pmc[cnt_idx];
}
@@ -147,6 +239,11 @@ u64 kvm_pmu_get_counter_value(struct kvm_vcpu *vcpu, u64 select_idx)
return kvm_pmu_get_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx));
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|188| <<kvm_pmu_set_counter_value>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, select_idx), val, false);
+ * - arch/arm64/kvm/pmu-emul.c|581| <<kvm_pmu_handle_pmcr>> kvm_pmu_set_pmc_value(kvm_vcpu_idx_to_pmc(vcpu, i), 0, true);
+ */
static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
@@ -180,6 +277,11 @@ static void kvm_pmu_set_pmc_value(struct kvm_pmc *pmc, u64 val, bool force)
* @select_idx: The counter index
* @val: The counter value
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|585| <<kvm_pmu_handle_pmcr>> kvm_pmu_set_counter_value(vcpu, ARMV8_PMU_CYCLE_IDX, 0);
+ * - arch/arm64/kvm/sys_regs.c|1076| <<access_pmu_evcntr>> kvm_pmu_set_counter_value(vcpu, idx, p->regval);
+ */
void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
{
if (!kvm_vcpu_has_pmu(vcpu))
@@ -192,10 +294,29 @@ void kvm_pmu_set_counter_value(struct kvm_vcpu *vcpu, u64 select_idx, u64 val)
* kvm_pmu_release_perf_event - remove the perf event
* @pmc: The PMU counter pointer
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|160| <<kvm_pmu_set_pmc_value>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|229| <<kvm_pmu_stop_counter>> kvm_pmu_release_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|270| <<kvm_pmu_vcpu_destroy>> kvm_pmu_release_perf_event(kvm_vcpu_idx_to_pmc(vcpu, i));
+ */
static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc)
{
if (pmc->perf_event) {
perf_event_disable(pmc->perf_event);
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|307| <<kvm_pmu_release_perf_event>> perf_event_release_kernel(pmc->perf_event);
+ * - arch/riscv/kvm/vcpu_pmu.c|82| <<kvm_pmu_release_perf_event>> perf_event_release_kernel(pmc->perf_event);
+ * - arch/x86/kernel/cpu/resctrl/pseudo_lock.c|1060| <<measure_residency_fn>> perf_event_release_kernel(hit_event);
+ * - arch/x86/kernel/cpu/resctrl/pseudo_lock.c|1062| <<measure_residency_fn>> perf_event_release_kernel(miss_event);
+ * - arch/x86/kvm/pmu.c|298| <<pmc_release_perf_event>> perf_event_release_kernel(pmc->perf_event);
+ * - arch/x86/kvm/vmx/pmu_intel.c|209| <<intel_pmu_release_guest_lbr_event>> perf_event_release_kernel(lbr_desc->event);
+ * - kernel/events/core.c|5499| <<perf_release>> perf_event_release_kernel(file->private_data);
+ * - kernel/events/hw_breakpoint.c|829| <<unregister_hw_breakpoint>> perf_event_release_kernel(bp);
+ * - kernel/watchdog_perf.c|203| <<hardlockup_detector_perf_cleanup>> perf_event_release_kernel(event);
+ * - kernel/watchdog_perf.c|270| <<watchdog_hardlockup_probe>> perf_event_release_kernel(this_cpu_read(watchdog_ev));
+ */
perf_event_release_kernel(pmc->perf_event);
pmc->perf_event = NULL;
}
@@ -207,6 +328,11 @@ static void kvm_pmu_release_perf_event(struct kvm_pmc *pmc)
*
* If this counter has been configured to monitor some event, release it here.
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|257| <<kvm_pmu_vcpu_reset>> kvm_pmu_stop_counter(kvm_vcpu_idx_to_pmc(vcpu, i));
+ * - arch/arm64/kvm/pmu-emul.c|625| <<kvm_pmu_create_perf_event>> kvm_pmu_stop_counter(pmc);
+ */
static void kvm_pmu_stop_counter(struct kvm_pmc *pmc)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
@@ -283,6 +409,11 @@ u64 kvm_pmu_valid_counter_mask(struct kvm_vcpu *vcpu)
*
* Call perf_event_enable to start counting the perf event
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|577| <<kvm_pmu_handle_pmcr>> kvm_pmu_enable_counter_mask(vcpu, __vcpu_sys_reg(vcpu, PMCNTENSET_EL0));
+ 4 arch/arm64/kvm/sys_regs.c|1167| <<access_pmcnten>> kvm_pmu_enable_counter_mask(vcpu, val);
+ */
void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
{
int i;
@@ -292,6 +423,10 @@ void kvm_pmu_enable_counter_mask(struct kvm_vcpu *vcpu, u64 val)
if (!(kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E) || !val)
return;
+ /*
+ * include/linux/perf/arm_pmuv3.h <<ARMV8_PMU_MAX_COUNTERS>>
+ #define ARMV8_PMU_MAX_COUNTERS 32
+ */
for (i = 0; i < ARMV8_PMU_MAX_COUNTERS; i++) {
struct kvm_pmc *pmc;
@@ -549,6 +684,11 @@ void kvm_pmu_software_increment(struct kvm_vcpu *vcpu, u64 val)
* @vcpu: The vcpu pointer
* @val: the value guest writes to PMCR register
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|821| <<kvm_vcpu_reload_pmu>> kvm_pmu_handle_pmcr(vcpu, kvm_vcpu_read_pmcr(vcpu));
+ * - arch/arm64/kvm/sys_regs.c|953| <<access_pmcr>> kvm_pmu_handle_pmcr(vcpu, val);
+ */
void kvm_pmu_handle_pmcr(struct kvm_vcpu *vcpu, u64 val)
{
int i;
@@ -594,6 +734,12 @@ static bool kvm_pmu_counter_is_enabled(struct kvm_pmc *pmc)
* kvm_pmu_create_perf_event - create a perf event for a counter
* @pmc: Counter context
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|174| <<kvm_pmu_set_pmc_value>> kvm_pmu_create_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|304| <<kvm_pmu_enable_counter_mask>> kvm_pmu_create_perf_event(pmc);
+ * - arch/arm64/kvm/pmu-emul.c|691| <<kvm_pmu_set_counter_event_type>> kvm_pmu_create_perf_event(pmc);
+ */
static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc)
{
struct kvm_vcpu *vcpu = kvm_pmc_to_vcpu(pmc);
@@ -654,6 +800,20 @@ static void kvm_pmu_create_perf_event(struct kvm_pmc *pmc)
attr.sample_period = compute_period(pmc, kvm_pmu_get_pmc_value(pmc));
+ /*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|663| <<kvm_pmu_create_perf_event>> event = perf_event_create_kernel_counter(&attr, -1, current, kvm_pmu_perf_overflow, pmc);
+ * - arch/riscv/kvm/vcpu_pmu.c|328| <<kvm_pmu_create_perf_event>> event = perf_event_create_kernel_counter(attr, -1, current, kvm_riscv_pmu_overflow, pmc);
+ * - arch/x86/kernel/cpu/resctrl/pseudo_lock.c|971| <<measure_residency_fn>> miss_event = perf_event_create_kernel_counter(miss_attr, plr->cpu, NULL, NULL, NULL);
+ * - arch/x86/kernel/cpu/resctrl/pseudo_lock.c|976| <<measure_residency_fn>> hit_event = perf_event_create_kernel_counter(hit_attr, plr->cpu, NULL, NULL, NULL);
+ * - arch/x86/kvm/pmu.c|215| <<pmc_reprogram_counter>> event = perf_event_create_kernel_counter(&attr, -1, current, kvm_perf_overflow, pmc);
+ * - arch/x86/kvm/vmx/pmu_intel.c|243| <<intel_pmu_create_guest_lbr_event>> event = perf_event_create_kernel_counter(&attr, -1, current, NULL, NULL);
+ * - kernel/events/hw_breakpoint.c|746| <<register_user_hw_breakpoint>> return perf_event_create_kernel_counter(attr, -1, tsk, triggered, context);
+ * - kernel/events/hw_breakpoint.c|856| <<register_wide_hw_breakpoint>> bp = perf_event_create_kernel_counter(attr, cpu, NULL, triggered, context);
+ * - kernel/events/hw_breakpoint_test.c|42| <<register_test_bp>> return perf_event_create_kernel_counter(&attr, cpu, tsk, NULL, NULL);
+ * - kernel/watchdog_perf.c|131| <<hardlockup_detector_event_create>> evt = perf_event_create_kernel_counter(wd_attr, cpu, NULL, watchdog_overflow_callback, NULL);
+ * - kernel/watchdog_perf.c|136| <<hardlockup_detector_event_create>> evt = perf_event_create_kernel_counter(wd_attr, cpu, NULL, watchdog_overflow_callback, NULL);
+ */
event = perf_event_create_kernel_counter(&attr, -1, current,
kvm_pmu_perf_overflow, pmc);
@@ -709,6 +869,14 @@ void kvm_host_pmu_init(struct arm_pmu *pmu)
goto out_unlock;
entry->arm_pmu = pmu;
+ /*
+ * 在以下使用arm_pmus:
+ * - arch/arm64/kvm/pmu-emul.c|23| <<global>> static LIST_HEAD(arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|728| <<kvm_host_pmu_init>> list_add_tail(&entry->entry, &arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|730| <<kvm_host_pmu_init>> if (list_is_singular(&arm_pmus))
+ * - arch/arm64/kvm/pmu-emul.c|763| <<kvm_pmu_probe_armpmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ * - arch/arm64/kvm/pmu-emul.c|977| <<kvm_arm_pmu_v3_set_pmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ */
list_add_tail(&entry->entry, &arm_pmus);
if (list_is_singular(&arm_pmus))
@@ -718,6 +886,10 @@ void kvm_host_pmu_init(struct arm_pmu *pmu)
mutex_unlock(&arm_pmus_lock);
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|1091| <<kvm_arm_set_default_pmu>> struct arm_pmu *arm_pmu = kvm_pmu_probe_armpmu();
+ */
static struct arm_pmu *kvm_pmu_probe_armpmu(void)
{
struct arm_pmu *tmp, *pmu = NULL;
@@ -744,6 +916,14 @@ static struct arm_pmu *kvm_pmu_probe_armpmu(void)
* carried here.
*/
cpu = raw_smp_processor_id();
+ /*
+ * 在以下使用arm_pmus:
+ * - arch/arm64/kvm/pmu-emul.c|23| <<global>> static LIST_HEAD(arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|728| <<kvm_host_pmu_init>> list_add_tail(&entry->entry, &arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|730| <<kvm_host_pmu_init>> if (list_is_singular(&arm_pmus))
+ * - arch/arm64/kvm/pmu-emul.c|763| <<kvm_pmu_probe_armpmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ * - arch/arm64/kvm/pmu-emul.c|977| <<kvm_arm_pmu_v3_set_pmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ */
list_for_each_entry(entry, &arm_pmus, entry) {
tmp = entry->arm_pmu;
@@ -922,6 +1102,15 @@ static void kvm_arm_set_pmu(struct kvm *kvm, struct arm_pmu *arm_pmu)
lockdep_assert_held(&kvm->arch.config_lock);
kvm->arch.arm_pmu = arm_pmu;
+ /*
+ * 在以下使用kvm_arch->pmcr_n (arm64):
+ * - arch/arm64/kvm/pmu-emul.c|1074| <<kvm_arm_set_pmu>> kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|1366| <<kvm_vcpu_read_pmcr>> return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * - arch/arm64/kvm/sys_regs.c|849| <<reset_pmu_reg>> u8 n = vcpu->kvm->arch.pmcr_n;
+ * - arch/arm64/kvm/sys_regs.c|1284| <<set_pmcr>> kvm->arch.pmcr_n = new_n;
+ *
+ * 注释: PMCR_EL0.N value for the guest
+ */
kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
}
@@ -937,6 +1126,10 @@ static void kvm_arm_set_pmu(struct kvm *kvm, struct arm_pmu *arm_pmu)
* where vCPUs can be scheduled on any core but the guest
* counters could stop working.
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/arm.c|1460| <<kvm_setup_vcpu>> ret = kvm_arm_set_default_pmu(kvm);
+ */
int kvm_arm_set_default_pmu(struct kvm *kvm)
{
struct arm_pmu *arm_pmu = kvm_pmu_probe_armpmu();
@@ -948,6 +1141,10 @@ int kvm_arm_set_default_pmu(struct kvm *kvm)
return 0;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|1232| <<kvm_arm_pmu_v3_set_attr(KVM_ARM_VCPU_PMU_V3_SET_PMU)>> return kvm_arm_pmu_v3_set_pmu(vcpu, pmu_id);
+ */
static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)
{
struct kvm *kvm = vcpu->kvm;
@@ -958,6 +1155,14 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)
lockdep_assert_held(&kvm->arch.config_lock);
mutex_lock(&arm_pmus_lock);
+ /*
+ * 在以下使用arm_pmus:
+ * - arch/arm64/kvm/pmu-emul.c|23| <<global>> static LIST_HEAD(arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|728| <<kvm_host_pmu_init>> list_add_tail(&entry->entry, &arm_pmus);
+ * - arch/arm64/kvm/pmu-emul.c|730| <<kvm_host_pmu_init>> if (list_is_singular(&arm_pmus))
+ * - arch/arm64/kvm/pmu-emul.c|763| <<kvm_pmu_probe_armpmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ * - arch/arm64/kvm/pmu-emul.c|977| <<kvm_arm_pmu_v3_set_pmu>> list_for_each_entry(entry, &arm_pmus, entry) {
+ */
list_for_each_entry(entry, &arm_pmus, entry) {
arm_pmu = entry->arm_pmu;
if (arm_pmu->pmu.type == pmu_id) {
@@ -978,6 +1183,10 @@ static int kvm_arm_pmu_v3_set_pmu(struct kvm_vcpu *vcpu, int pmu_id)
return ret;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/guest.c|955| <<kvm_arm_vcpu_arch_set_attr>> ret = kvm_arm_pmu_v3_set_attr(vcpu, attr);
+ */
int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
{
struct kvm *kvm = vcpu->kvm;
@@ -1081,6 +1290,10 @@ int kvm_arm_pmu_v3_set_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
return -ENXIO;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/guest.c|979| <<kvm_arm_vcpu_arch_get_attr>> ret = kvm_arm_pmu_v3_get_attr(vcpu, attr);
+ */
int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
{
switch (attr->attr) {
@@ -1105,6 +1318,10 @@ int kvm_arm_pmu_v3_get_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
return -ENXIO;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/guest.c|1002| <<kvm_arm_vcpu_arch_has_attr>> ret = kvm_arm_pmu_v3_has_attr(vcpu, attr);
+ */
int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
{
switch (attr->attr) {
@@ -1119,6 +1336,13 @@ int kvm_arm_pmu_v3_has_attr(struct kvm_vcpu *vcpu, struct kvm_device_attr *attr)
return -ENXIO;
}
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|835| <<kvm_host_pmu_init>> if (!pmuv3_implemented(kvm_arm_pmu_get_pmuver_limit()))
+ * - arch/arm64/kvm/pmu-emul.c|1176| <<kvm_arm_pmu_v3_set_attr>> u8 pmuver = kvm_arm_pmu_get_pmuver_limit();
+ * - arch/arm64/kvm/sys_regs.c|1720| <<read_sanitised_id_aa64dfr0_el1>> kvm_arm_pmu_get_pmuver_limit());
+ * - arch/arm64/kvm/sys_regs.c|1765| <<read_sanitised_id_dfr0_el1>> u8 perfmon = pmuver_to_perfmon(kvm_arm_pmu_get_pmuver_limit());
+ */
u8 kvm_arm_pmu_get_pmuver_limit(void)
{
u64 tmp;
@@ -1127,6 +1351,10 @@ u8 kvm_arm_pmu_get_pmuver_limit(void)
tmp = cpuid_feature_cap_perfmon_field(tmp,
ID_AA64DFR0_EL1_PMUVer_SHIFT,
ID_AA64DFR0_EL1_PMUVer_V3P5);
+ /*
+ * 注释:
+ * PMUVer, [11:8] Performance Monitors Extension version.
+ */
return FIELD_GET(ARM64_FEATURE_MASK(ID_AA64DFR0_EL1_PMUVer), tmp);
}
@@ -1134,9 +1362,59 @@ u8 kvm_arm_pmu_get_pmuver_limit(void)
* kvm_vcpu_read_pmcr - Read PMCR_EL0 register for the vCPU
* @vcpu: The vcpu pointer
*/
+/*
+ * called by:
+ * - arch/arm64/kvm/pmu-emul.c|93| <<kvm_pmc_has_64bit_overflow>> u64 val = kvm_vcpu_read_pmcr(kvm_pmc_to_vcpu(pmc));
+ * - arch/arm64/kvm/pmu-emul.c|276| <<kvm_pmu_valid_counter_mask>> u64 val = FIELD_GET(ARMV8_PMU_PMCR_N, kvm_vcpu_read_pmcr(vcpu));
+ * - arch/arm64/kvm/pmu-emul.c|297| <<kvm_pmu_enable_counter_mask>> if (!(kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E) || !val)
+ * - arch/arm64/kvm/pmu-emul.c|349| <<kvm_pmu_overflow_status>> if ((kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E)) {
+ * - arch/arm64/kvm/pmu-emul.c|451| <<kvm_pmu_counter_increment>> if (!(kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E))
+ * - arch/arm64/kvm/pmu-emul.c|599| <<kvm_pmu_counter_is_enabled>> return (kvm_vcpu_read_pmcr(vcpu) & ARMV8_PMU_PMCR_E) &&
+ * - arch/arm64/kvm/pmu-emul.c|826| <<kvm_vcpu_reload_pmu>> kvm_pmu_handle_pmcr(vcpu, kvm_vcpu_read_pmcr(vcpu));
+ * - arch/arm64/kvm/sys_regs.c|948| <<access_pmcr>> val = kvm_vcpu_read_pmcr(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|956| <<access_pmcr>> val = kvm_vcpu_read_pmcr(vcpu)
+ * - arch/arm64/kvm/sys_regs.c|1005| <<pmu_counter_idx_valid>> pmcr = kvm_vcpu_read_pmcr(vcpu);
+ * - arch/arm64/kvm/sys_regs.c|1265| <<get_pmcr>> *val = kvm_vcpu_read_pmcr(vcpu);
+ */
u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu)
{
+ /*
+ * struct kvm_vcpu:
+ * -> struct kvm_vcpu_arch arch;
+ * -> struct kvm_cpu_context ctxt;
+ * -> struct user_pt_regs regs;
+ * -> u64 spsr_abt;
+ * -> u64 spsr_und;
+ * -> u64 spsr_irq;
+ * -> u64 spsr_fiq;
+ * -> struct user_fpsimd_state fp_regs;
+ * -> u64 sys_regs[NR_SYS_REGS];
+ * -> struct kvm_vcpu *__hyp_running_vcpu;
+ * -> u64 *vncr_array;
+ */
u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0);
+ /*
+ * 以前的patch
+ * u64 kvm_vcpu_read_pmcr(struct kvm_vcpu *vcpu)
+ * {
+ * - u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0) &
+ * - ~(ARMV8_PMU_PMCR_N_MASK << ARMV8_PMU_PMCR_N_SHIFT);
+ * + u64 pmcr = __vcpu_sys_reg(vcpu, PMCR_EL0);
+ *
+ * - return pmcr | ((u64)vcpu->kvm->arch.pmcr_n << ARMV8_PMU_PMCR_N_SHIFT);
+ * + return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * }
+ */
+
+ /*
+ * 在以下使用kvm_arch->pmcr_n (arm64):
+ * - arch/arm64/kvm/pmu-emul.c|1074| <<kvm_arm_set_pmu>> kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|1366| <<kvm_vcpu_read_pmcr>> return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * - arch/arm64/kvm/sys_regs.c|849| <<reset_pmu_reg>> u8 n = vcpu->kvm->arch.pmcr_n;
+ * - arch/arm64/kvm/sys_regs.c|1284| <<set_pmcr>> kvm->arch.pmcr_n = new_n;
+ *
+ * 注释: PMCR_EL0.N value for the guest
+ */
return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
}
diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
index 22b45a15d..4ad0cd04f 100644
--- a/arch/arm64/kvm/sys_regs.c
+++ b/arch/arm64/kvm/sys_regs.c
@@ -846,6 +846,15 @@ static unsigned int pmu_visibility(const struct kvm_vcpu *vcpu,
static u64 reset_pmu_reg(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
{
u64 mask = BIT(ARMV8_PMU_CYCLE_IDX);
+ /*
+ * 在以下使用kvm_arch->pmcr_n (arm64):
+ * - arch/arm64/kvm/pmu-emul.c|1074| <<kvm_arm_set_pmu>> kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|1366| <<kvm_vcpu_read_pmcr>> return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * - arch/arm64/kvm/sys_regs.c|849| <<reset_pmu_reg>> u8 n = vcpu->kvm->arch.pmcr_n;
+ * - arch/arm64/kvm/sys_regs.c|1284| <<set_pmcr>> kvm->arch.pmcr_n = new_n;
+ *
+ * 注释: PMCR_EL0.N value for the guest
+ */
u8 n = vcpu->kvm->arch.pmcr_n;
if (n)
@@ -1279,6 +1288,15 @@ static int set_pmcr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r,
* implements. Ignore this error to maintain compatibility
* with the existing KVM behavior.
*/
+ /*
+ * 在以下使用kvm_arch->pmcr_n (arm64):
+ * - arch/arm64/kvm/pmu-emul.c|1074| <<kvm_arm_set_pmu>> kvm->arch.pmcr_n = kvm_arm_pmu_get_max_counters(kvm);
+ * - arch/arm64/kvm/pmu-emul.c|1366| <<kvm_vcpu_read_pmcr>> return u64_replace_bits(pmcr, vcpu->kvm->arch.pmcr_n, ARMV8_PMU_PMCR_N);
+ * - arch/arm64/kvm/sys_regs.c|849| <<reset_pmu_reg>> u8 n = vcpu->kvm->arch.pmcr_n;
+ * - arch/arm64/kvm/sys_regs.c|1284| <<set_pmcr>> kvm->arch.pmcr_n = new_n;
+ *
+ * 注释: PMCR_EL0.N value for the guest
+ */
if (!kvm_vm_has_ran_once(kvm) &&
new_n <= kvm_arm_pmu_get_max_counters(kvm))
kvm->arch.pmcr_n = new_n;
diff --git a/arch/x86/events/amd/core.c b/arch/x86/events/amd/core.c
index 1fc4ce44e..a80820f30 100644
--- a/arch/x86/events/amd/core.c
+++ b/arch/x86/events/amd/core.c
@@ -1421,6 +1421,25 @@ static int __init amd_core_pmu_init(void)
/* Update PMU version for later usage */
x86_pmu.version = 2;
+ /*
+ * 234 //
+ * 235 * AMD "Extended Performance Monitoring and Debug" CPUID
+ * 236 * detection/enumeration details:
+ * 237 //
+ * 238 union cpuid_0x80000022_ebx {
+ * 239 struct {
+ * 240 // Number of Core Performance Counters
+ * 241 unsigned int num_core_pmc:4;
+ * 242 // Number of available LBR Stack Entries
+ * 243 unsigned int lbr_v2_stack_sz:6;
+ * 244 // Number of Data Fabric Counters
+ * 245 unsigned int num_df_pmc:6;
+ * 246 // Number of Unified Memory Controller Counters
+ * 247 unsigned int num_umc_pmc:6;
+ * 248 } split;
+ * 249 unsigned int full;
+ * 250 };
+ */
/* Find the number of available Core PMCs */
x86_pmu.num_counters = ebx.split.num_core_pmc;
@@ -1505,6 +1524,11 @@ static int __init amd_core_pmu_init(void)
return 0;
}
+/*
+ * called by:
+ * - arch/x86/events/core.c|2067| <<init_hw_perf_events>> err = amd_pmu_init();
+ * - arch/x86/events/core.c|2070| <<init_hw_perf_events>> err = amd_pmu_init();
+ */
__init int amd_pmu_init(void)
{
int ret;
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 5b0dd07b1..330ee8ec4 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -248,6 +248,11 @@ static void release_pmc_hardware(void) {}
#endif
+/*
+ * called by:
+ * - arch/x86/events/core.c|2089| <<init_hw_perf_events>> if (!check_hw_exists(&pmu, x86_pmu.num_counters, x86_pmu.num_counters_fixed))
+ * - arch/x86/events/intel/core.c|4809| <<init_hybrid_pmu>> if (!check_hw_exists(&pmu->pmu, pmu->num_counters, pmu->num_counters_fixed))
+ */
bool check_hw_exists(struct pmu *pmu, int num_counters, int num_counters_fixed)
{
u64 val, val_fail = -1, val_new= ~0;
@@ -2052,6 +2057,23 @@ void x86_pmu_show_pmu_cap(int num_counters, int num_counters_fixed,
pr_info("... event mask: %016Lx\n", intel_ctrl);
}
+/*
+ * 一共有下面这些log:
+ *
+ * "Performance Events: Broadwell events, full-width counters, Intel PMU driver."
+ *
+ * "Performance Events: generic architected perfmon, Intel PMU driver."
+ *
+ * "Performance Events: Fam17h+ core perfctr, AMD PMU driver."
+ *
+ * "Performane Events: AMD PMU driver."
+ *
+ * "Performance Events: PMU not available due to virtualization, using software events only."
+ *
+ * "Performance Events: no PMU driver, software events only."
+ *
+ * "Performance Events: unsupported p6 CPU model 42 no PMU driver, software events only."
+ */
static int __init init_hw_perf_events(void)
{
struct x86_pmu_quirk *quirk;
@@ -2078,6 +2100,9 @@ static int __init init_hw_perf_events(void)
err = -ENOTSUPP;
}
if (err != 0) {
+ /*
+ * "Performance Events: no PMU driver, software events only."
+ */
pr_cont("no PMU driver, software events only.\n");
err = 0;
goto out_bad_pmu;
@@ -2085,6 +2110,10 @@ static int __init init_hw_perf_events(void)
pmu_check_apic();
+ /*
+ * 这里检查有没有虚拟化!
+ * "Performance Events: PMU not available due to virtualization, using software events only."
+ */
/* sanity check that the hardware exists or is emulated */
if (!check_hw_exists(&pmu, x86_pmu.num_counters, x86_pmu.num_counters_fixed))
goto out_bad_pmu;
diff --git a/arch/x86/include/asm/kvm_host.h b/arch/x86/include/asm/kvm_host.h
index f8ca74e76..b85d1a847 100644
--- a/arch/x86/include/asm/kvm_host.h
+++ b/arch/x86/include/asm/kvm_host.h
@@ -108,6 +108,18 @@
#define KVM_REQ_HV_STIMER KVM_ARCH_REQ(22)
#define KVM_REQ_LOAD_EOI_EXITMAP KVM_ARCH_REQ(23)
#define KVM_REQ_GET_NESTED_STATE_PAGES KVM_ARCH_REQ(24)
+/*
+ * 在以下使用KVM_REQ_APICV_UPDATE:
+ * - arch/x86/kvm/lapic.c|3138| <<kvm_lapic_set_base>> kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
+ * - arch/x86/kvm/lapic.c|3452| <<kvm_create_lapic>> kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
+ * - arch/x86/kvm/svm/nested.c|830| <<enter_svm_guest_mode>> kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
+ * - arch/x86/kvm/svm/nested.c|1245| <<svm_leave_nested>> kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
+ * - arch/x86/kvm/vmx/nested.c|4924| <<nested_vmx_vmexit>> kvm_make_request(KVM_REQ_APICV_UPDATE, vcpu);
+ * - arch/x86/kvm/x86.c|10778| <<__kvm_set_or_clear_apicv_inhibit>> kvm_make_all_cpus_request(kvm, KVM_REQ_APICV_UPDATE);
+ * - arch/x86/kvm/x86.c|11018| <<vcpu_enter_guest>> if (kvm_check_request(KVM_REQ_APICV_UPDATE, vcpu)) kvm_vcpu_update_apicv(vcpu);
+ *
+ * 处理的函数是kvm_vcpu_update_apicv(vcpu);
+ */
#define KVM_REQ_APICV_UPDATE \
KVM_ARCH_REQ_FLAGS(25, KVM_REQUEST_WAIT | KVM_REQUEST_NO_WAKEUP)
#define KVM_REQ_TLB_FLUSH_CURRENT KVM_ARCH_REQ(26)
@@ -146,10 +158,45 @@
/* KVM Hugepage definitions for x86 */
#define KVM_MAX_HUGEPAGE_LEVEL PG_LEVEL_1G
#define KVM_NR_PAGE_SIZES (KVM_MAX_HUGEPAGE_LEVEL - PG_LEVEL_4K + 1)
+/*
+ * KVM_HPAGE_GFN_SHIFT(1) : (((1) - 1) * 9) = 0
+ * KVM_HPAGE_GFN_SHIFT(2) : (((2) - 1) * 9) = 9
+ * KVM_HPAGE_GFN_SHIFT(3) : (((3) - 1) * 9) = 18
+ * KVM_HPAGE_GFN_SHIFT(4) : (((4) - 1) * 9) = 27
+ * KVM_HPAGE_GFN_SHIFT(5) : (((5) - 1) * 9) = 36
+ */
#define KVM_HPAGE_GFN_SHIFT(x) (((x) - 1) * 9)
+/*
+ * KVM_HPAGE_SHIFT(1) : 12 + 0 = 12
+ * KVM_HPAGE_SHIFT(2) : 12 + 9 = 21
+ * KVM_HPAGE_SHIFT(3) : 12 + 18 = 30
+ * KVM_HPAGE_SHIFT(4) : 12 + 27 = 39
+ * KVM_HPAGE_SHIFT(5) : 12 + 36 = 48
+ */
#define KVM_HPAGE_SHIFT(x) (PAGE_SHIFT + KVM_HPAGE_GFN_SHIFT(x))
+/*
+ * KVM_HPAGE_SIZE(1) : 1 << 12 = 4096 (4K)
+ * KVM_HPAGE_SIZE(2) : 1 << 21 = 2097152 (2M)
+ * KVM_HPAGE_SIZE(3) : 1 << 30 = 1073741824 (1G)
+ * KVM_HPAGE_SIZE(4) : 1 << 39 = 549755813888 (512G)
+ * KVM_HPAGE_SIZE(5) : 1 << 48 = 281474976710656 (262144G=256T)
+ */
#define KVM_HPAGE_SIZE(x) (1UL << KVM_HPAGE_SHIFT(x))
+/*
+ * KVM_HPAGE_MASK(1) : 4K的mask
+ * KVM_HPAGE_MASK(2) : 2M的mask
+ * KVM_HPAGE_MASK(3) : 1G的mask
+ * KVM_HPAGE_MASK(4) : 512G的mask
+ * KVM_HPAGE_MASK(5) : 262144G(256T)的mask
+ */
#define KVM_HPAGE_MASK(x) (~(KVM_HPAGE_SIZE(x) - 1))
+/*
+ * KVM_PAGES_PER_HPAGE(1) : 4K / 4096 = 1
+ * KVM_PAGES_PER_HPAGE(2) : 2M / 4096 = 512
+ * KVM_PAGES_PER_HPAGE(3) : 1G / 4096 = 262144
+ * KVM_PAGES_PER_HPAGE(4) : 512G / 4096 = 134217728
+ * KVM_PAGES_PER_HPAGE(5) : 262144G(256T) / 4096 = 68719476736
+ */
#define KVM_PAGES_PER_HPAGE(x) (KVM_HPAGE_SIZE(x) / PAGE_SIZE)
#define KVM_MEMSLOT_PAGES_TO_MMU_PAGES_RATIO 50
@@ -542,19 +589,171 @@ struct kvm_pmc {
struct kvm_pmu {
u8 version;
+ /*
+ * 在以下设置kvm_pmu->nr_arch_gp_counters:
+ * - arch/x86/kvm/pmu.c|788| <<kvm_pmu_refresh>> pmu->nr_arch_gp_counters = 0;
+ * - arch/x86/kvm/svm/pmu.c|200| <<amd_pmu_refresh>> pmu->nr_arch_gp_counters = ebx.split.num_core_pmc;
+ * - arch/x86/kvm/svm/pmu.c|202| <<amd_pmu_refresh>> pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS_CORE;
+ * - arch/x86/kvm/svm/pmu.c|204| <<amd_pmu_refresh>> pmu->nr_arch_gp_counters = AMD64_NUM_COUNTERS;
+ * - arch/x86/kvm/svm/pmu.c|207| <<amd_pmu_refresh>> pmu->nr_arch_gp_counters = min_t(unsigned int , pmu->nr_arch_gp_counters, kvm_pmu_cap.num_counters_gp);
+ * - arch/x86/kvm/vmx/pmu_intel.c|483| <<intel_pmu_refresh>> pmu->nr_arch_gp_counters = min_t(int , eax.split.num_counters, kvm_pmu_cap.num_counters_gp);
+ */
unsigned nr_arch_gp_counters;
+ /*
+ * 在以下设置kvm_pmu->nr_arch_fixed_counters:
+ * - arch/x86/kvm/pmu.c|789| <<kvm_pmu_refresh>> pmu->nr_arch_fixed_counters = 0;
+ * - arch/x86/kvm/svm/pmu.c|220| <<amd_pmu_refresh>> pmu->nr_arch_fixed_counters = 0;
+ * - arch/x86/kvm/vmx/pmu_intel.c|494| <<intel_pmu_refresh>> pmu->nr_arch_fixed_counters = 0;
+ * - arch/x86/kvm/vmx/pmu_intel.c|496| <<intel_pmu_refresh>> pmu->nr_arch_fixed_counters = min_t(int , edx.split.num_counters_fixed, kvm_pmu_cap.num_counters_fixed);
+ */
unsigned nr_arch_fixed_counters;
+ /*
+ * 在以下设置kvm_pmu->available_event_types:
+ * - arch/x86/kvm/vmx/pmu_intel.c|490| <<intel_pmu_refresh>> pmu->available_event_types = ~entry->ebx &
+ * ((1ull << eax.split.mask_length) - 1);
+ */
unsigned available_event_types;
+ /*
+ * 在以下设置kvm_pmu->fixed_ctr_ctrl:
+ * - arch/x86/kvm/pmu.c|758| <<kvm_pmu_reset>> pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status = 0;
+ * - arch/x86/kvm/vmx/pmu_intel.c|43| <<reprogram_fixed_counters>> pmu->fixed_ctr_ctrl = data;
+ * - arch/x86/kvm/vmx/pmu_intel.c|306| <<intel_pmu_get_msr>> msr_info->data = pmu->fixed_ctr_ctrl;
+ */
u64 fixed_ctr_ctrl;
+ /*
+ * 在以下使用kvm_pmu->fixed_ctrl_ctrl_mask:
+ * - arch/x86/kvm/pmu.c|796| <<kvm_pmu_refresh>> pmu->fixed_ctr_ctrl_mask = ~0ull;
+ * - arch/x86/kvm/vmx/pmu_intel.c|351| <<intel_pmu_set_msr(MSR_CORE_PERF_FIXED_CTR_CTRL)>> if (data & pmu->fixed_ctr_ctrl_mask) return 1;
+ * - arch/x86/kvm/vmx/pmu_intel.c|505| <<intel_pmu_refresh>> pmu->fixed_ctr_ctrl_mask &= ~(0xbull << (i * 4));
+ * - arch/x86/kvm/vmx/pmu_intel.c|550| <<intel_pmu_refresh>> pmu->fixed_ctr_ctrl_mask &= ~(1ULL << (KVM_FIXED_PMC_BASE_IDX + i * 4));
+ *
+ * 用来表示fixed_ctr_ctrl中哪些bit可以用
+ * 0: 可以用
+ * 1: 不可以用
+ */
u64 fixed_ctr_ctrl_mask;
+ /*
+ * 在以下设置kvm_pmu->global_ctrl:
+ * - arch/x86/kvm/pmu.c|667| <<kvm_pmu_get_msr(MSR_AMD64_PERF_CNTR_GLOBAL_CTL或者MSR_CORE_PERF_GLOBAL_CTRL)>> msr_info->data = pmu->global_ctrl;
+ * - arch/x86/kvm/pmu.c|715| <<kvm_pmu_set_msr(MSR_AMD64_PERF_CNTR_GLOBAL_CTL或者MSR_CORE_PERF_GLOBAL_CTRL)>> pmu->global_ctrl = data;
+ * - arch/x86/kvm/pmu.c|758| <<kvm_pmu_reset>> pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status = 0;
+ * - arch/x86/kvm/pmu.c|817| <<kvm_pmu_refresh>> pmu->global_ctrl = GENMASK_ULL(pmu->nr_arch_gp_counters - 1, 0);
+ */
u64 global_ctrl;
+ /*
+ * 在以下设置kvm_pmu->global_status:
+ * - arch/x86/kvm/pmu.c|116| <<__kvm_perf_overflow>> skip_pmi = __test_and_set_bit(GLOBAL_STATUS_BUFFER_OVF_BIT, (unsigned long *)&pmu->global_status);
+ * - arch/x86/kvm/pmu.c|119| <<__kvm_perf_overflow>> __set_bit(pmc->idx, (unsigned long *)&pmu->global_status);
+ * - arch/x86/kvm/pmu.c|704| <<kvm_pmu_set_msr(MSR_CORE_PERF_GLOBAL_STATUS或者MSR_AMD64_PERF_CNTR_GLOBAL_STATUS)>> pmu->global_status = data;
+ * - arch/x86/kvm/pmu.c|729| <<kvm_pmu_set_msr(MSR_CORE_PERF_GLOBAL_OVF_CTRL或者MSR_AMD64_PERF_CNTR_GLOBAL_STATUS_CLR)>> pmu->global_status &= ~data;
+ * - arch/x86/kvm/pmu.c|758| <<kvm_pmu_reset>> pmu->fixed_ctr_ctrl = pmu->global_ctrl = pmu->global_status = 0;
+ * - arch/x86/kvm/vmx/vmx.c|8394| <<vmx_handle_intel_pt_intr>> __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT, (unsigned long *)&vcpu->arch.pmu.global_status);
+ */
u64 global_status;
+ /*
+ * 在以下修改kvm_pmu->counter_bitmask[2]:
+ * - arch/x86/kvm/pmu.c|790| <<kvm_pmu_refresh>> pmu->counter_bitmask[KVM_PMC_GP] = 0;
+ * - arch/x86/kvm/pmu.c|791| <<kvm_pmu_refresh>> pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
+ * - arch/x86/kvm/svm/pmu.c|215| <<amd_pmu_refresh>> pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << 48) - 1;
+ * - arch/x86/kvm/svm/pmu.c|219| <<amd_pmu_refresh>> pmu->counter_bitmask[KVM_PMC_FIXED] = 0;
+ * - arch/x86/kvm/vmx/pmu_intel.c|487| <<intel_pmu_refresh>> pmu->counter_bitmask[KVM_PMC_GP] = ((u64)1 << eax.split.bit_width) - 1;
+ * - arch/x86/kvm/vmx/pmu_intel.c|500| <<intel_pmu_refresh>> pmu->counter_bitmask[KVM_PMC_FIXED] = ((u64)1 << edx.split.bit_width_fixed) - 1;
+ * 在以下使用kvm_pmu->counter_bitmask[2]:
+ * - arch/x86/kvm/pmu.h|101| <<pmc_bitmask>> return pmu->counter_bitmask[pmc->type];
+ * - arch/x86/kvm/vmx/pmu_intel.c|92| <<intel_rdpmc_ecx_to_pmc>> bitmask = pmu->counter_bitmask[KVM_PMC_FIXED];
+ * - arch/x86/kvm/vmx/pmu_intel.c|97| <<intel_rdpmc_ecx_to_pmc>> bitmask = pmu->counter_bitmask[KVM_PMC_GP];
+ * - arch/x86/kvm/vmx/pmu_intel.c|322| <<intel_pmu_get_msr(default)>> msr_info->data = val & pmu->counter_bitmask[KVM_PMC_GP];
+ * - arch/x86/kvm/vmx/pmu_intel.c|327| <<intel_pmu_get_msr(default)>> msr_info->data = val & pmu->counter_bitmask[KVM_PMC_FIXED];
+ * - arch/x86/kvm/vmx/pmu_intel.c|383| <<intel_pmu_set_msr>> if ((msr & MSR_PMC_FULL_WIDTH_BIT) && (data & ~pmu->counter_bitmask[KVM_PMC_GP])) return 1;
+ *
+ * 用来表示GP和Fixed的哪些bit可以使用:
+ * 0: 不可以用
+ * 1: 可以用
+ */
u64 counter_bitmask[2];
+ /*
+ * 在以下修改kvm_pmu->global_ctrl_mask:
+ * - arch/x86/kvm/pmu.c|794| <<kvm_pmu_refresh>> pmu->global_ctrl_mask = ~0ull;
+ * - arch/x86/kvm/svm/pmu.c|211| <<amd_pmu_refresh>> pmu->global_ctrl_mask = ~((1ull << pmu->nr_arch_gp_counters) - 1);
+ * - arch/x86/kvm/vmx/pmu_intel.c|508| <<intel_pmu_refresh>> pmu->global_ctrl_mask = counter_mask;
+ * 在以下设置kvm_pmu->global_ctrl_mask:
+ * - arch/x86/kvm/pmu.c|707| <<kvm_pmu_set_msr(MSR_AMD64_PERF_CNTR_GLOBAL_CTL)>> data &= ~pmu->global_ctrl_mask;
+ * - arch/x86/kvm/pmu.h|132| <<kvm_valid_perf_global_ctrl>> return !(pmu->global_ctrl_mask & data);
+ * - arch/x86/kvm/svm/pmu.c|212| <<amd_pmu_refresh>> pmu->global_status_mask = pmu->global_ctrl_mask;
+ * - arch/x86/kvm/vmx/pmu_intel.c|515| <<intel_pmu_refresh>> pmu->global_status_mask = pmu->global_ctrl_mask
+ * & ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
+ * MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
+ *
+ * 0可以用
+ * 1不可以用
+ */
u64 global_ctrl_mask;
+ /*
+ * 在以下修改kvm_pmu->global_status_mask:
+ * - arch/x86/kvm/pmu.c|795| <<kvm_pmu_refresh>> pmu->global_status_mask = ~0ull;
+ * - arch/x86/kvm/svm/pmu.c|212| <<amd_pmu_refresh>> pmu->global_status_mask = pmu->global_ctrl_mask;
+ * - arch/x86/kvm/vmx/pmu_intel.c|515| <<intel_pmu_refresh>> pmu->global_status_mask = pmu->global_ctrl_mask
+ * & ~(MSR_CORE_PERF_GLOBAL_OVF_CTRL_OVF_BUF |
+ * MSR_CORE_PERF_GLOBAL_OVF_CTRL_COND_CHGD);
+ * - arch/x86/kvm/vmx/pmu_intel.c|519| <<intel_pmu_refresh>> pmu->global_status_mask &= ~MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI;
+ * 在以下设置kvm_pmu->global_status_mask:
+ * - arch/x86/kvm/pmu.c|701| <<kvm_pmu_set_msr(MSR_CORE_PERF_GLOBAL_STATUS或者MSR_AMD64_PERF_CNTR_GLOBAL_STATUS)>> if (data & pmu->global_status_mask) return 1;
+ * - arch/x86/kvm/pmu.c|724| <<kvm_pmu_set_msr(MSR_CORE_PERF_GLOBAL_OVF_CTRL)>> if (data & pmu->global_status_mask) return 1;
+ *
+ * 0可以用
+ * 1不可以用
+ */
u64 global_status_mask;
+ /*
+ * 在以下使用kvm_pmu->reserved_bits:
+ * - arch/x86/kvm/pmu.c|792| <<kvm_pmu_refresh>> pmu->reserved_bits = 0xffffffff00200000ull;
+ * - arch/x86/kvm/svm/pmu.c|174| <<amd_pmu_set_msr>> data &= ~pmu->reserved_bits;
+ * - arch/x86/kvm/svm/pmu.c|216| <<amd_pmu_refresh>> pmu->reserved_bits = 0xfffffff000280000ull;
+ * - arch/x86/kvm/vmx/pmu_intel.c|395| <<intel_pmu_set_msr>> reserved_bits = pmu->reserved_bits;
+ * - arch/x86/kvm/vmx/pmu_intel.c|526| <<intel_pmu_refresh>> pmu->reserved_bits ^= HSW_IN_TX;
+ * - arch/x86/kvm/vmx/pmu_intel.c|548| <<intel_pmu_refresh>> pmu->reserved_bits &= ~ICL_EVENTSEL_ADAPTIVE;
+ */
u64 reserved_bits;
+ /*
+ * 在以下使用kvm_pmu->raw_event_mask:
+ * - arch/x86/kvm/pmu.c|506| <<reprogram_counter>> return pmc_reprogram_counter(pmc, PERF_TYPE_RAW,
+ * (eventsel & pmu->raw_event_mask),
+ * !(eventsel & ARCH_PERFMON_EVENTSEL_USR),
+ * !(eventsel & ARCH_PERFMON_EVENTSEL_OS),
+ * eventsel & ARCH_PERFMON_EVENTSEL_INT);
+ * - arch/x86/kvm/pmu.c|793| <<kvm_pmu_refresh>> pmu->raw_event_mask = X86_RAW_EVENT_MASK;
+ * - arch/x86/kvm/svm/pmu.c|217| <<amd_pmu_refresh>> pmu->raw_event_mask = AMD64_RAW_EVENT_MASK;
+ * - arch/x86/kvm/vmx/pmu_intel.c|397| <<intel_pmu_set_msr>> if ((pmc->idx == 2) && (pmu->raw_event_mask & HSW_IN_TX_CHECKPOINTED))
+ * - arch/x86/kvm/vmx/pmu_intel.c|527| <<intel_pmu_refresh>> pmu->raw_event_mask |= (HSW_IN_TX|HSW_IN_TX_CHECKPOINTED);
+ */
u64 raw_event_mask;
+ /*
+ * 在以下使用kvm_pmu->gp_counters[KVM_INTEL_PMC_MAX_GENERIC]:
+ * - arch/x86/kvm/pmu.h|82| <<kvm_pmc_idx_to_pmc>> return &pmu->gp_counters[idx];
+ * - arch/x86/kvm/pmu.h|146| <<get_gp_pmc>> return &pmu->gp_counters[index];
+ * - arch/x86/kvm/svm/pmu.c|35| <<amd_pmu_get_pmc>> return &pmu->gp_counters[array_index_nospec(pmc_idx, num_counters)];
+ * - arch/x86/kvm/svm/pmu.c|233| <<amd_pmu_init>> pmu->gp_counters[i].type = KVM_PMC_GP;
+ * - arch/x86/kvm/svm/pmu.c|234| <<amd_pmu_init>> pmu->gp_counters[i].vcpu = vcpu;
+ * - arch/x86/kvm/svm/pmu.c|235| <<amd_pmu_init>> pmu->gp_counters[i].idx = i;
+ * - arch/x86/kvm/svm/pmu.c|236| <<amd_pmu_init>> pmu->gp_counters[i].current_config = 0;
+ * - arch/x86/kvm/vmx/pmu_intel.c|95| <<intel_rdpmc_ecx_to_pmc>> counters = pmu->gp_counters;
+ * - arch/x86/kvm/vmx/pmu_intel.c|568| <<intel_pmu_init>> pmu->gp_counters[i].type = KVM_PMC_GP;
+ * - arch/x86/kvm/vmx/pmu_intel.c|569| <<intel_pmu_init>> pmu->gp_counters[i].vcpu = vcpu;
+ * - arch/x86/kvm/vmx/pmu_intel.c|570| <<intel_pmu_init>> pmu->gp_counters[i].idx = i;
+ * - arch/x86/kvm/vmx/pmu_intel.c|571| <<intel_pmu_init>> pmu->gp_counters[i].current_config = 0;
+ */
struct kvm_pmc gp_counters[KVM_INTEL_PMC_MAX_GENERIC];
+ /*
+ * 在以下使用kvm_pmu->fixed_counters[KVM_PMC_MAX_FIXED]:
+ * - arch/x86/kvm/pmu.h|86| <<kvm_pmc_idx_to_pmc>> return &pmu->fixed_counters[idx];
+ * - arch/x86/kvm/pmu.h|161| <<get_fixed_pmc>> return &pmu->fixed_counters[index];
+ * - arch/x86/kvm/vmx/pmu_intel.c|90| <<intel_rdpmc_ecx_to_pmc>> counters = pmu->fixed_counters;
+ * - arch/x86/kvm/vmx/pmu_intel.c|575| <<intel_pmu_init>> pmu->fixed_counters[i].type = KVM_PMC_FIXED;
+ * - arch/x86/kvm/vmx/pmu_intel.c|576| <<intel_pmu_init>> pmu->fixed_counters[i].vcpu = vcpu;
+ * - arch/x86/kvm/vmx/pmu_intel.c|577| <<intel_pmu_init>> pmu->fixed_counters[i].idx = i + KVM_FIXED_PMC_BASE_IDX;
+ * - arch/x86/kvm/vmx/pmu_intel.c|578| <<intel_pmu_init>> pmu->fixed_counters[i].current_config = 0;
+ * - arch/x86/kvm/vmx/pmu_intel.c|579| <<intel_pmu_init>> pmu->fixed_counters[i].eventsel = intel_get_fixed_pmc_eventsel(i);
+ */
struct kvm_pmc fixed_counters[KVM_PMC_MAX_FIXED];
/*
@@ -582,18 +781,40 @@ struct kvm_pmu {
* The user should make sure that this mask is updated
* after disabling interrupts and before perf_guest_get_msrs();
*/
+ /*
+ * 在以下使用kvm_pmu->host_cross_mapped_mask:
+ * - arch/x86/events/intel/core.c|4187| <<intel_guest_get_msrs>> arr[pebs_enable].guest &= ~kvm_pmu->host_cross_mapped_mask;
+ * - arch/x86/events/intel/core.c|4188| <<intel_guest_get_msrs>> arr[global_ctrl].guest &= ~kvm_pmu->host_cross_mapped_mask;
+ * - arch/x86/kvm/vmx/pmu_intel.c|718| <<intel_pmu_cross_mapped_check>> pmu->host_cross_mapped_mask |= BIT_ULL(hw_idx);
+ * - arch/x86/kvm/vmx/vmx.c|7213| <<atomic_switch_perf_msrs>> pmu->host_cross_mapped_mask = 0;
+ */
u64 host_cross_mapped_mask;
/*
* The gate to release perf_events not marked in
* pmc_in_use only once in a vcpu time slice.
*/
+ /*
+ * 在以下使用kvm_pmu->need_cleanup:
+ * - arch/x86/kvm/pmu.c|545| <<kvm_pmu_handle_event>> if (unlikely(pmu->need_cleanup))
+ * - arch/x86/kvm/pmu.c|745| <<kvm_pmu_reset>> pmu->need_cleanup = false;
+ * - arch/x86/kvm/pmu.c|837| <<kvm_pmu_cleanup>> pmu->need_cleanup = false;
+ * - arch/x86/kvm/x86.c|12738| <<kvm_arch_sched_in>> if (pmu->version && unlikely(pmu->event_count)) { pmu->need_cleanup = true;
+ */
bool need_cleanup;
/*
* The total number of programmed perf_events and it helps to avoid
* redundant check before cleanup if guest don't use vPMU at all.
*/
+ /*
+ * 在以下使用kvm_pmu->event_count:
+ * - arch/x86/kvm/pmu.c|232| <<pmc_reprogram_counter>> pmc_to_pmu(pmc)->event_count++;
+ * - arch/x86/kvm/pmu.c|297| <<pmc_release_perf_event>> pmc_to_pmu(pmc)->event_count--;
+ * - arch/x86/kvm/vmx/pmu_intel.c|200| <<intel_pmu_release_guest_lbr_event>> vcpu_to_pmu(vcpu)->event_count--;
+ * - arch/x86/kvm/vmx/pmu_intel.c|251| <<intel_pmu_create_guest_lbr_event>> pmu->event_count++;
+ * - arch/x86/kvm/x86.c|12737| <<kvm_arch_sched_in>> if (pmu->version && unlikely(pmu->event_count)) {
+ */
u8 event_count;
};
@@ -763,6 +984,22 @@ struct kvm_vcpu_arch {
u32 pkru;
u32 hflags;
u64 efer;
+ /*
+ * 在以下修改kvm_vcpu_arch->apic_base:
+ * - arch/x86/kvm/lapic.c|2974| <<kvm_lapic_set_base>> vcpu->arch.apic_base = value;
+ * - arch/x86/kvm/lapic.c|3289| <<kvm_create_lapic>> vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE;
+ * 在以下使用kvm_vcpu_arch->apic_base: