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linux-uek4-v4.1.12-124.52.4.patch
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linux-uek4-v4.1.12-124.52.4.patch
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From b8708fd6b828325bc7331b652e449018281e34c3 Mon Sep 17 00:00:00 2001
From: Dongli Zhang <[email protected]>
Date: Mon, 9 Aug 2021 16:28:31 -0700
Subject: [PATCH 1/1] linux-uek4-v4.1.12-124.52.4
Signed-off-by: Dongli Zhang <[email protected]>
---
drivers/iommu/dmar.c | 26 ++++
drivers/iommu/intel_irq_remapping.c | 200 ++++++++++++++++++++++++++++
drivers/iommu/irq_remapping.c | 4 +
include/linux/dmar.h | 18 +++
include/linux/intel-iommu.h | 22 +++
5 files changed, 270 insertions(+)
diff --git a/drivers/iommu/dmar.c b/drivers/iommu/dmar.c
index ffa29296ed29..6eaa91d7a52b 100644
--- a/drivers/iommu/dmar.c
+++ b/drivers/iommu/dmar.c
@@ -589,6 +589,10 @@ static inline int dmar_walk_dmar_table(struct acpi_table_dmar *dmar,
/**
* parse_dmar_table - parses the DMA reporting table
*/
+/*
+ * called by:
+ * - drivers/iommu/dmar.c|806| <<dmar_table_init>> ret = parse_dmar_table();
+ */
static int __init
parse_dmar_table(void)
{
@@ -793,6 +797,10 @@ int __init dmar_dev_scope_init(void)
}
+/*
+ * called by:
+ * - drivers/iommu/dmar.c|593| <<parse_dmar_table>> parse_dmar_table(void )
+ */
int __init dmar_table_init(void)
{
static int dmar_table_initialized;
@@ -913,6 +921,10 @@ static void unmap_iommu(struct intel_iommu *iommu)
* Memory map the iommu's registers. Start w/ a single page, and
* possibly expand if that turns out to be insufficent.
*/
+/*
+ * called by:
+ * - drivers/iommu/dmar.c|1034| <<alloc_iommu>> err = map_iommu(iommu, drhd->reg_base_addr);
+ */
static int map_iommu(struct intel_iommu *iommu, u64 phys_addr)
{
int map_size, err=0;
@@ -996,6 +1008,10 @@ static void dmar_free_seq_id(struct intel_iommu *iommu)
}
}
+/*
+ * called by:
+ * - drivers/iommu/dmar.c|406| <<dmar_parse_one_drhd>> ret = alloc_iommu(dmaru);
+ */
static int alloc_iommu(struct dmar_drhd_unit *drhd)
{
struct intel_iommu *iommu;
@@ -1026,6 +1042,13 @@ static int alloc_iommu(struct dmar_drhd_unit *drhd)
}
err = -EINVAL;
+ /*
+ * #define cap_sagaw(c) (((c) >> 8) & 0x1f)
+ *
+ * cap = 0x70081000080 --> cap_sagaw(cap) = 0x0
+ *
+ * 在QEMU中是VTD_CAP_SAGAW_39bit或者VTD_CAP_SAGAW_48bit
+ */
if (cap_sagaw(iommu->cap) == 0) {
pr_info("%s: No supported address widths. Not attempting DMA translation.\n",
iommu->name);
@@ -1676,6 +1699,9 @@ int dmar_set_interrupt(struct intel_iommu *iommu)
return ret;
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.enable_faulting = enable_drhd_fault_handling()
+ */
int __init enable_drhd_fault_handling(void)
{
struct dmar_drhd_unit *drhd;
diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index 5709ae9c3e77..31b853e19554 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -49,12 +49,35 @@ static struct hpet_scope ir_hpet[MAX_HPET_TBS];
* in single-threaded environment with interrupt disabled, so no need to tabke
* the dmar_global_lock.
*/
+/*
+ * 在以下使用irq_2_ir_lock:
+ * - drivers/iommu/intel_irq_remapping.c|71| <<get_irte>> raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|74| <<get_irte>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|81| <<get_irte>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|110| <<alloc_irte>> raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|122| <<alloc_irte>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|147| <<map_irq_to_irte_handle>> raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|150| <<map_irq_to_irte_handle>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|163| <<set_irte_irq>> raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|171| <<set_irte_irq>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|187| <<modify_irte>> raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|199| <<modify_irte>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|269| <<free_irte>> raw_spin_lock_irqsave(&irq_2_ir_lock, flags);
+ * - drivers/iommu/intel_irq_remapping.c|278| <<free_irte>> raw_spin_unlock_irqrestore(&irq_2_ir_lock, flags);
+ */
static DEFINE_RAW_SPINLOCK(irq_2_ir_lock);
static int __init parse_ioapics_under_ir(void);
static struct irq_2_iommu *irq_2_iommu(unsigned int irq)
{
+ /*
+ * struct irq_cfg *cfg:
+ * union {
+ * struct irq_2_iommu irq_2_iommu;
+ * struct irq_2_irte irq_2_irte;
+ * };
+ */
struct irq_cfg *cfg = irq_cfg(irq);
return cfg ? &cfg->irq_2_iommu : NULL;
}
@@ -82,6 +105,12 @@ static int get_irte(int irq, struct irte *entry)
return 0;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|986| <<intel_setup_ioapic_entry>> index = alloc_irte(iommu, irq, 1);
+ * - drivers/iommu/intel_irq_remapping.c|1152| <<intel_msi_alloc_irq>> index = alloc_irte(iommu, irq, nvec);
+ * - drivers/iommu/intel_irq_remapping.c|1196| <<intel_alloc_hpet_msi>> index = alloc_irte(iommu, irq, 1);
+ */
static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
{
struct ir_table *table = iommu->ir_table;
@@ -124,6 +153,11 @@ static int alloc_irte(struct intel_iommu *iommu, int irq, u16 count)
return index;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|198| <<modify_irte>> rc = qi_flush_iec(iommu, index, 0);
+ * - drivers/iommu/intel_irq_remapping.c|257| <<clear_entries>> return qi_flush_iec(iommu, index, irq_iommu->irte_mask);
+ */
static int qi_flush_iec(struct intel_iommu *iommu, int index, int mask)
{
struct qi_desc desc;
@@ -151,6 +185,10 @@ static int map_irq_to_irte_handle(int irq, u16 *sub_handle)
return index;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1179| <<intel_msi_setup_irq>> set_irte_irq(irq, iommu, index, sub_handle);
+ */
static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subhandle)
{
struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
@@ -173,6 +211,12 @@ static int set_irte_irq(int irq, struct intel_iommu *iommu, u16 index, u16 subha
return 0;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1002| <<intel_setup_ioapic_entry>> modify_irte(irq, &irte);
+ * - drivers/iommu/intel_irq_remapping.c|1089| <<intel_ioapic_set_affinity>> modify_irte(irq, &irte);
+ * - drivers/iommu/intel_irq_remapping.c|1125| <<intel_compose_msi_msg>> modify_irte(irq, &irte);
+ */
static int modify_irte(int irq, struct irte *irte_modified)
{
struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
@@ -205,6 +249,11 @@ static struct intel_iommu *map_hpet_to_ir(u8 hpet_id)
{
int i;
+ /*
+ * 在文件一开始声明的.
+ * static struct ioapic_scope ir_ioapic[MAX_IO_APICS];
+ * static struct hpet_scope ir_hpet[MAX_HPET_TBS];
+ */
for (i = 0; i < MAX_HPET_TBS; i++)
if (ir_hpet[i].id == hpet_id && ir_hpet[i].iommu)
return ir_hpet[i].iommu;
@@ -215,6 +264,11 @@ static struct intel_iommu *map_ioapic_to_ir(int apic)
{
int i;
+ /*
+ * 在文件一开始声明的.
+ * static struct ioapic_scope ir_ioapic[MAX_IO_APICS];
+ * static struct hpet_scope ir_hpet[MAX_HPET_TBS];
+ */
for (i = 0; i < MAX_IO_APICS; i++)
if (ir_ioapic[i].id == apic && ir_ioapic[i].iommu)
return ir_ioapic[i].iommu;
@@ -232,6 +286,10 @@ static struct intel_iommu *map_dev_to_ir(struct pci_dev *dev)
return drhd->iommu;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|271| <<free_irte>> rc = clear_entries(irq_iommu);
+ */
static int clear_entries(struct irq_2_iommu *irq_iommu)
{
struct irte *start, *entry, *end;
@@ -257,6 +315,9 @@ static int clear_entries(struct irq_2_iommu *irq_iommu)
return qi_flush_iec(iommu, index, irq_iommu->irte_mask);
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.free_irq = free_irte()
+ */
static int free_irte(int irq)
{
struct irq_2_iommu *irq_iommu = irq_2_iommu(irq);
@@ -284,6 +345,13 @@ static int free_irte(int irq)
* source validation type
*/
#define SVT_NO_VERIFY 0x0 /* no verification is required */
+/*
+ * 在以下使用SVT_VERIFY_SID_SQ:
+ * - drivers/iommu/intel_irq_remapping.c|340| <<set_ioapic_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, sid);
+ * - drivers/iommu/intel_irq_remapping.c|372| <<set_hpet_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_13_IGNORE_3, sid);
+ * - drivers/iommu/intel_irq_remapping.c|419| <<set_msi_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, data.alias);
+ * - drivers/iommu/intel_irq_remapping.c|421| <<set_msi_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16,
+ */
#define SVT_VERIFY_SID_SQ 0x1 /* verify using SID and SQ fields */
#define SVT_VERIFY_BUS 0x2 /* verify bus of request-id */
@@ -305,6 +373,14 @@ static int free_irte(int irq)
* set SVT, SQ and SID fields of irte to verify
* source ids of interrupt requests
*/
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|340| <<set_ioapic_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, sid);
+ * - drivers/iommu/intel_irq_remapping.c|372| <<set_hpet_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_13_IGNORE_3, sid);
+ * - drivers/iommu/intel_irq_remapping.c|415| <<set_msi_sid>> set_irte_sid(irte, SVT_VERIFY_BUS, SQ_ALL_16,
+ * - drivers/iommu/intel_irq_remapping.c|419| <<set_msi_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16, data.alias);
+ * - drivers/iommu/intel_irq_remapping.c|421| <<set_msi_sid>> set_irte_sid(irte, SVT_VERIFY_SID_SQ, SQ_ALL_16,
+ */
static void set_irte_sid(struct irte *irte, unsigned int svt,
unsigned int sq, unsigned int sid)
{
@@ -389,6 +465,10 @@ static int set_msi_sid_cb(struct pci_dev *pdev, u16 alias, void *opaque)
return 0;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1121| <<intel_compose_msi_msg>> set_msi_sid(&irte, pdev);
+ */
static int set_msi_sid(struct irte *irte, struct pci_dev *dev)
{
struct set_msi_sid_data data;
@@ -424,16 +504,31 @@ static int set_msi_sid(struct irte *irte, struct pci_dev *dev)
return 0;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|782| <<intel_enable_irq_remapping>> iommu_set_irq_remapping(iommu, eim);
+ * - drivers/iommu/intel_irq_remapping.c|1024| <<reenable_irq_remapping>> iommu_set_irq_remapping(iommu, eim);
+ * - drivers/iommu/intel_irq_remapping.c|1376| <<dmar_ir_add>> iommu_set_irq_remapping(iommu, eim);
+ *
+ * 核心思想是设置IOMMU IR Table的base
+ */
static void iommu_set_irq_remapping(struct intel_iommu *iommu, int mode)
{
u64 addr;
u32 sts;
unsigned long flags;
+ /*
+ * 在intel_setup_irq_remapping()中设置的base
+ */
addr = virt_to_phys((void *)iommu->ir_table->base);
raw_spin_lock_irqsave(&iommu->register_lock, flags);
+ /*
+ * 只在以下使用DMAR_IRTA_REG:
+ * - drivers/iommu/intel_irq_remapping.c|525| <<iommu_set_irq_remapping>> dmar_writeq(iommu->reg + DMAR_IRTA_REG,
+ */
dmar_writeq(iommu->reg + DMAR_IRTA_REG,
(addr) | IR_X2APIC_MODE(mode) | INTR_REMAP_TABLE_REG_SIZE);
@@ -473,6 +568,11 @@ static void iommu_set_irq_remapping(struct intel_iommu *iommu, int mode)
raw_spin_unlock_irqrestore(&iommu->register_lock, flags);
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|703| <<intel_prepare_irq_remapping>> if (intel_setup_irq_remapping(iommu))
+ * - drivers/iommu/intel_irq_remapping.c|1358| <<dmar_ir_add>> ret = intel_setup_irq_remapping(iommu);
+ */
static int intel_setup_irq_remapping(struct intel_iommu *iommu)
{
struct ir_table *ir_table;
@@ -502,6 +602,9 @@ static int intel_setup_irq_remapping(struct intel_iommu *iommu)
goto out_free_pages;
}
+ /*
+ * 在软件方面设置IOMMU IR的base
+ */
ir_table->base = page_address(pages);
ir_table->bitmap = bitmap;
iommu->ir_table = ir_table;
@@ -514,6 +617,12 @@ out_free_table:
return -ENOMEM;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|691| <<intel_cleanup_irq_remapping>> intel_teardown_irq_remapping(iommu);
+ * - drivers/iommu/intel_irq_remapping.c|1451| <<dmar_ir_add>> intel_teardown_irq_remapping(iommu);
+ * - drivers/iommu/intel_irq_remapping.c|1485| <<dmar_ir_hotplug>> intel_teardown_irq_remapping(iommu);
+ */
static void intel_teardown_irq_remapping(struct intel_iommu *iommu)
{
if (iommu && iommu->ir_table) {
@@ -528,6 +637,14 @@ static void intel_teardown_irq_remapping(struct intel_iommu *iommu)
/*
* Disable Interrupt Remapping.
*/
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|657| <<intel_cleanup_irq_remapping>> iommu_disable_irq_remapping(iommu);
+ * - drivers/iommu/intel_irq_remapping.c|746| <<intel_enable_irq_remapping>> iommu_disable_irq_remapping(iommu);
+ * - drivers/iommu/intel_irq_remapping.c|999| <<disable_irq_remapping>> iommu_disable_irq_remapping(iommu);
+ * - drivers/iommu/intel_irq_remapping.c|1369| <<dmar_ir_add>> iommu_disable_irq_remapping(iommu);
+ * - drivers/iommu/intel_irq_remapping.c|1408| <<dmar_ir_hotplug>> iommu_disable_irq_remapping(iommu);
+ */
static void iommu_disable_irq_remapping(struct intel_iommu *iommu)
{
unsigned long flags;
@@ -567,6 +684,11 @@ static int __init dmar_x2apic_optout(void)
return dmar->flags & DMAR_X2APIC_OPT_OUT;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|709| <<intel_prepare_irq_remapping>> intel_cleanup_irq_remapping();
+ * - drivers/iommu/intel_irq_remapping.c|803| <<intel_enable_irq_remapping>> intel_cleanup_irq_remapping();
+ */
static void __init intel_cleanup_irq_remapping(void)
{
struct dmar_drhd_unit *drhd;
@@ -583,6 +705,9 @@ static void __init intel_cleanup_irq_remapping(void)
pr_warn("Failed to enable irq remapping. You are vulnerable to irq-injection attacks.\n");
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.prepare = intel_prepare_irq_remapping()
+ */
static int __init intel_prepare_irq_remapping(void)
{
struct dmar_drhd_unit *drhd;
@@ -627,6 +752,9 @@ error:
return -ENODEV;
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.enable = intel_enable_irq_remapping()
+ */
static int __init intel_enable_irq_remapping(void)
{
struct dmar_drhd_unit *drhd;
@@ -718,6 +846,10 @@ error:
return -1;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|943| <<ir_parse_ioapic_hpet_scope>> ret = ir_parse_one_hpet_scope(scope, iommu, drhd);
+ */
static int ir_parse_one_hpet_scope(struct acpi_dmar_device_scope *scope,
struct intel_iommu *iommu,
struct acpi_dmar_hardware_unit *drhd)
@@ -808,6 +940,11 @@ static int ir_parse_one_ioapic_scope(struct acpi_dmar_device_scope *scope,
return 0;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|976| <<parse_ioapics_under_ir>> if (ir_parse_ioapic_hpet_scope(drhd->hdr, iommu))
+ * - drivers/iommu/intel_irq_remapping.c|1378| <<dmar_ir_add>> if (ir_parse_ioapic_hpet_scope(dmaru->hdr, iommu)) {
+ */
static int ir_parse_ioapic_hpet_scope(struct acpi_dmar_header *header,
struct intel_iommu *iommu)
{
@@ -849,6 +986,10 @@ static void ir_remove_ioapic_hpet_scope(struct intel_iommu *iommu)
* Finds the assocaition between IOAPIC's and its Interrupt-remapping
* hardware unit.
*/
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|720| <<intel_prepare_irq_remapping>> if (parse_ioapics_under_ir() != 1) {
+ */
static int __init parse_ioapics_under_ir(void)
{
struct dmar_drhd_unit *drhd;
@@ -880,6 +1021,10 @@ static int __init parse_ioapics_under_ir(void)
return 1;
}
+/*
+ * 在以下使用ir_dev_scope_init():
+ * - drivers/iommu/intel_irq_remapping.c|1011| <<global>> rootfs_initcall(ir_dev_scope_init);
+ */
static int __init ir_dev_scope_init(void)
{
int ret;
@@ -895,6 +1040,9 @@ static int __init ir_dev_scope_init(void)
}
rootfs_initcall(ir_dev_scope_init);
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.disable = disable_irq_remapping()
+ */
static void disable_irq_remapping(void)
{
struct dmar_drhd_unit *drhd;
@@ -911,6 +1059,9 @@ static void disable_irq_remapping(void)
}
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.reenable = reenable_irq_remapping()
+ */
static int reenable_irq_remapping(int eim)
{
struct dmar_drhd_unit *drhd;
@@ -945,6 +1096,11 @@ error:
return -1;
}
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1138| <<intel_setup_ioapic_entry>> prepare_irte(&irte, vector, destination);
+ * - drivers/iommu/intel_irq_remapping.c|1264| <<intel_compose_msi_msg>> prepare_irte(&irte, cfg->vector, dest);
+ */
static void prepare_irte(struct irte *irte, int vector,
unsigned int dest)
{
@@ -966,6 +1122,9 @@ static void prepare_irte(struct irte *irte, int vector,
irte->redir_hint = 1;
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.setup_ioapic_entry = intel_setup_ioapic_entry()
+ */
static int intel_setup_ioapic_entry(int irq,
struct IO_APIC_route_entry *route_entry,
unsigned int destination, int vector,
@@ -999,6 +1158,12 @@ static int intel_setup_ioapic_entry(int irq,
/* Set source-id of interrupt request */
set_ioapic_sid(&irte, ioapic_id);
+ /*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1002| <<intel_setup_ioapic_entry>> modify_irte(irq, &irte);
+ * - drivers/iommu/intel_irq_remapping.c|1089| <<intel_ioapic_set_affinity>> modify_irte(irq, &irte);
+ * - drivers/iommu/intel_irq_remapping.c|1125| <<intel_compose_msi_msg>> modify_irte(irq, &irte);
+ */
modify_irte(irq, &irte);
apic_printk(APIC_VERBOSE, KERN_DEBUG "IOAPIC[%d]: "
@@ -1050,6 +1215,9 @@ static int intel_setup_ioapic_entry(int irq,
* As the migration is a simple atomic update of IRTE, the same mechanism
* is used to migrate MSI irq's in the presence of interrupt-remapping.
*/
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.set_affinity = intel_ioapic_set_affinity()
+ */
static int
intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
bool force)
@@ -1100,6 +1268,9 @@ intel_ioapic_set_affinity(struct irq_data *data, const struct cpumask *mask,
return 0;
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.compose_msi_msg = intel_compose_msi_msg()
+ */
static void intel_compose_msi_msg(struct pci_dev *pdev,
unsigned int irq, unsigned int dest,
struct msi_msg *msg, u8 hpet_id)
@@ -1122,6 +1293,12 @@ static void intel_compose_msi_msg(struct pci_dev *pdev,
else
set_hpet_sid(&irte, hpet_id);
+ /*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1002| <<intel_setup_ioapic_entry>> modify_irte(irq, &irte);
+ * - drivers/iommu/intel_irq_remapping.c|1089| <<intel_ioapic_set_affinity>> modify_irte(irq, &irte);
+ * - drivers/iommu/intel_irq_remapping.c|1125| <<intel_compose_msi_msg>> modify_irte(irq, &irte);
+ */
modify_irte(irq, &irte);
msg->address_hi = MSI_ADDR_BASE_HI;
@@ -1137,6 +1314,9 @@ static void intel_compose_msi_msg(struct pci_dev *pdev,
* and allocate 'nvec' consecutive interrupt-remapping table entries
* in it.
*/
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.msi_alloc_irq = intel_msi_alloc_irq()
+ */
static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec)
{
struct intel_iommu *iommu;
@@ -1162,6 +1342,9 @@ static int intel_msi_alloc_irq(struct pci_dev *dev, int irq, int nvec)
return index;
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.msi_setup_irq = intel_msi_setup_irq()
+ */
static int intel_msi_setup_irq(struct pci_dev *pdev, unsigned int irq,
int index, int sub_handle)
{
@@ -1184,6 +1367,9 @@ static int intel_msi_setup_irq(struct pci_dev *pdev, unsigned int irq,
return ret;
}
+/*
+ * struct irq_remap_ops intel_irq_remap_ops.alloc_hpet_msi = intel_alloc_hpet_msi()
+ */
static int intel_alloc_hpet_msi(unsigned int irq, unsigned int id)
{
int ret = -1;
@@ -1202,6 +1388,11 @@ static int intel_alloc_hpet_msi(unsigned int irq, unsigned int id)
return ret;
}
+/*
+ * 在以下使用intel_irq_remap_ops:
+ * - drivers/iommu/irq_remapping.c|206| <<irq_remapping_prepare>> if (intel_irq_remap_ops.prepare() == 0)
+ * - drivers/iommu/irq_remapping.c|207| <<irq_remapping_prepare>> remap_ops = &intel_irq_remap_ops;
+ */
struct irq_remap_ops intel_irq_remap_ops = {
.prepare = intel_prepare_irq_remapping,
.enable = intel_enable_irq_remapping,
@@ -1220,6 +1411,10 @@ struct irq_remap_ops intel_irq_remap_ops = {
/*
* Support of Interrupt Remapping Unit Hotplug
*/
+/*
+ * called by:
+ * - drivers/iommu/intel_irq_remapping.c|1447| <<dmar_ir_hotplug>> ret = dmar_ir_add(dmaru, iommu);
+ */
static int dmar_ir_add(struct dmar_drhd_unit *dmaru, struct intel_iommu *iommu)
{
int ret;
@@ -1269,6 +1464,11 @@ static int dmar_ir_add(struct dmar_drhd_unit *dmaru, struct intel_iommu *iommu)
return ret;
}
+/*
+ * called by:
+ * - drivers/iommu/dmar.c|1843| <<dmar_hp_add_drhd>> ret = dmar_ir_hotplug(dmaru, true);
+ * - drivers/iommu/dmar.c|1868| <<dmar_hp_remove_drhd>> ret = dmar_ir_hotplug(dmaru, false);
+ */
int dmar_ir_hotplug(struct dmar_drhd_unit *dmaru, bool insert)
{
int ret = 0;
diff --git a/drivers/iommu/irq_remapping.c b/drivers/iommu/irq_remapping.c
index 390079ee1350..c918878959f3 100644
--- a/drivers/iommu/irq_remapping.c
+++ b/drivers/iommu/irq_remapping.c
@@ -214,6 +214,10 @@ int __init irq_remapping_prepare(void)
return 0;
}
+/*
+ * called by:
+ * - arch/x86/kernel/apic/apic.c|1582| <<try_to_enable_IR>> return irq_remapping_enable();
+ */
int __init irq_remapping_enable(void)
{
int ret;
diff --git a/include/linux/dmar.h b/include/linux/dmar.h
index 30624954dec5..388e3bcba557 100644
--- a/include/linux/dmar.h
+++ b/include/linux/dmar.h
@@ -57,6 +57,24 @@ struct dmar_drhd_unit {
struct dmar_dev_scope *devices;/* target device array */
int devices_cnt; /* target device count */
u16 segment; /* PCI domain */
+ /*
+ * 在以下设置dmar_drhd_unit->ignored:
+ * - drivers/iommu/dmar.c|1036| <<alloc_iommu>> drhd->ignored = 1;
+ * - drivers/iommu/dmar.c|1044| <<alloc_iommu>> drhd->ignored = 1;
+ * - drivers/iommu/dmar.c|1052| <<alloc_iommu>> drhd->ignored = 1;
+ * - drivers/iommu/intel-iommu.c|3515| <<init_no_remapping_devices>> drhd->ignored = 1;
+ * - drivers/iommu/intel-iommu.c|3535| <<init_no_remapping_devices>> drhd->ignored = 1;
+ * 在以下使用dmar_drhd_unit->ignored:
+ * - drivers/iommu/dmar.c|1039| <<alloc_iommu>> if (!drhd->ignored) {
+ * - drivers/iommu/dmar.c|1047| <<alloc_iommu>> if (!drhd->ignored) {
+ * - drivers/iommu/dmar.c|1084| <<alloc_iommu>> if (intel_iommu_enabled && !drhd->ignored)
+ * - drivers/iommu/dmar.c|1100| <<free_iommu>> if (intel_iommu_enabled && !iommu->drhd->ignored)
+ * - drivers/iommu/intel-iommu.c|2893| <<init_dmars>> if (drhd->ignored) {
+ * - drivers/iommu/intel-iommu.c|3554| <<init_iommu_hw>> if (drhd->ignored) {
+ * - drivers/iommu/intel-iommu.c|3845| <<intel_iommu_add>> if (dmaru->ignored) {
+ * - include/linux/dmar.h|88| <<for_each_active_drhd_unit>> if (drhd->ignored) {} else
+ * - include/linux/dmar.h|92| <<for_each_active_iommu>> if (i=drhd->iommu, drhd->ignored) {} else
+ */
u8 ignored:1; /* ignore drhd */
u8 include_all:1;
struct intel_iommu *iommu;
diff --git a/include/linux/intel-iommu.h b/include/linux/intel-iommu.h
index 8cc1e85ea4e0..df8dbf3ee701 100644
--- a/include/linux/intel-iommu.h
+++ b/include/linux/intel-iommu.h
@@ -36,6 +36,18 @@
#define DMAR_VER_REG 0x0 /* Arch version supported by this IOMMU */
#define DMAR_CAP_REG 0x8 /* Hardware supported capabilities */
#define DMAR_ECAP_REG 0x10 /* Extended capabilities supported */
+/*
+ * 在以下使用DMAR_GCMD_REG:
+ * - drivers/iommu/dmar.c|1377| <<dmar_disable_qi>> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/dmar.c|1405| <<__dmar_enable_qi>> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel-iommu.c|1162| <<iommu_set_root_entry>> writel(iommu->gcmd | DMA_GCMD_SRTP, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel-iommu.c|1180| <<iommu_flush_write_buffer>> writel(iommu->gcmd | DMA_GCMD_WBF, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel-iommu.c|1414| <<iommu_enable_translation>> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel-iommu.c|1430| <<iommu_disable_translation>> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel_irq_remapping.c|529| <<iommu_set_irq_remapping>> writel(iommu->gcmd | DMA_GCMD_SIRTP, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel_irq_remapping.c|546| <<iommu_set_irq_remapping>> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ * - drivers/iommu/intel_irq_remapping.c|656| <<iommu_disable_irq_remapping>> writel(iommu->gcmd, iommu->reg + DMAR_GCMD_REG);
+ */
#define DMAR_GCMD_REG 0x18 /* Global command register */
#define DMAR_GSTS_REG 0x1c /* Global status register */
#define DMAR_RTADDR_REG 0x20 /* Root entry table */
@@ -56,6 +68,10 @@
#define DMAR_IQ_SHIFT 4 /* Invalidation queue head/tail shift */
#define DMAR_IQA_REG 0x90 /* Invalidation queue addr register */
#define DMAR_ICS_REG 0x9c /* Invalidation complete status register */
+/*
+ * 只在以下使用DMAR_IRTA_REG:
+ * - drivers/iommu/intel_irq_remapping.c|525| <<iommu_set_irq_remapping>> dmar_writeq(iommu->reg + DMAR_IRTA_REG,
+ */
#define DMAR_IRTA_REG 0xb8 /* Interrupt remapping table addr register */
#define OFFSET_STRIDE (9)
@@ -104,6 +120,12 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
#define cap_zlr(c) (((c) >> 22) & 1)
#define cap_isoch(c) (((c) >> 23) & 1)
#define cap_mgaw(c) ((((c) >> 16) & 0x3f) + 1)
+/*
+ * 在以下使用cap_sagaw():
+ * - drivers/iommu/dmar.c|1037| <<alloc_iommu>> if (cap_sagaw(iommu->cap) == 0) {
+ * - drivers/iommu/intel-iommu.c|553| <<__iommu_calculate_agaw>> sagaw = cap_sagaw(iommu->cap);
+ * - drivers/iommu/intel-iommu.c|1722| <<domain_init>> sagaw = cap_sagaw(iommu->cap);
+ */
#define cap_sagaw(c) (((c) >> 8) & 0x1f)
#define cap_caching_mode(c) (((c) >> 7) & 1)
#define cap_phmr(c) (((c) >> 6) & 1)
--
2.17.1