Box.getReg

[SethDusek]

Add v6.0 getReg support:

{
   val x = SELF
   x.getReg[Long](0).get == SELF.value &&
   x.getReg[Coll[(Coll[Byte], Long)]](2).get == SELF.tokens &&
   x.getReg[Int](9).isEmpty
}

sigma-rust already has support for non-constant register indices in getReg, but does not allow all numeric types as input (only Byte). Add support for numeric indices in getReg which should only be enabled on v6.0 activation

Also fix getReg/ExtractRegister not doing type-checking. For example the following should fail if R4 is a type other than Int, but it does not currently:

{
    SELF.R4[Int].isDefined
}