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x86 Add parallel bits extract/deposit instructions #7392

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x86 Add parallel bits extract/deposit instructions #7392

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BradleyWood
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0xdaryl commented Sep 12, 2024

Jenkins build xlinux,win,xmac

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0xdaryl commented Sep 12, 2024

@BradleyWood : see CI test failure

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Cannot use legacy SSE encoding for 3-operand instruction

std::make_tuple(TR::InstOpCode::PEXT4RegRegReg, TR::RealRegister::eax, TR::RealRegister::ecx, TR::RealRegister::edx, OMR::X86::Default, "c4e272f5c2"),

So this instruction is not a SIMD instruction but uses the VEX prefix. I need to think about what to do about this scenario.

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@0xdaryl 0xdaryl Awaiting requested review from 0xdaryl 0xdaryl is a code owner

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