From 1b356f0e3ce3161767226091281ab41b28951615 Mon Sep 17 00:00:00 2001 From: Damien Pretet Date: Thu, 30 Nov 2023 21:04:16 +0100 Subject: [PATCH] Port coremark to FRISCV --- doc/perf_benchmark.md | 25 + doc/project_mgt_hw.md | 2 +- test/apps/run.sh | 5 +- test/apps/tests/coremark.v | 1276 +++++++++++++++++ test/apps/tests/coremark/Makefile | 89 +- test/apps/tests/coremark/README.md | 408 +----- .../tests/coremark/barebones/core_portme.c | 13 +- .../tests/coremark/barebones/core_portme.h | 11 +- .../tests/coremark/barebones/core_portme.mak | 71 +- test/apps/tests/coremark/barebones/crt0.S | 1 + .../apps/tests/coremark/barebones/ee_printf.c | 10 +- test/apps/tests/coremark/core_main.c | 3 + test/apps/tests/coremark/coremark.bin | Bin 0 -> 458884 bytes test/apps/tests/coremark/coremark.md5 | 6 - test/apps/tests/coremark/coremark.v | 1276 +++++++++++++++++ test/apps/tests/coremark/crt0.S | 54 + test/apps/tests/coremark/linker.ld | 1 + test/apps/tests/dhrystone/Makefile | 51 + test/apps/tests/dhrystone/README.md | 3 + test/apps/tests/dhrystone/dhry.h | 431 ++++++ test/apps/tests/dhrystone/dhry_1.c | 395 +++++ test/apps/tests/dhrystone/dhry_2.c | 192 +++ test/apps/tests/dhrystone/dhrystone.c | 772 ++++++++++ test/apps/view.gtkw | 416 ------ test/common/debug_platform_verilator.gtkw | 2 +- 25 files changed, 4627 insertions(+), 886 deletions(-) create mode 100755 test/apps/tests/coremark.v create mode 120000 test/apps/tests/coremark/barebones/crt0.S create mode 100755 test/apps/tests/coremark/coremark.bin delete mode 100644 test/apps/tests/coremark/coremark.md5 create mode 100755 test/apps/tests/coremark/coremark.v create mode 100644 test/apps/tests/coremark/crt0.S create mode 120000 test/apps/tests/coremark/linker.ld create mode 100644 test/apps/tests/dhrystone/Makefile create mode 100644 test/apps/tests/dhrystone/README.md create mode 100644 test/apps/tests/dhrystone/dhry.h create mode 100644 test/apps/tests/dhrystone/dhry_1.c create mode 100644 test/apps/tests/dhrystone/dhry_2.c create mode 100644 test/apps/tests/dhrystone/dhrystone.c delete mode 100644 test/apps/view.gtkw diff --git a/doc/perf_benchmark.md b/doc/perf_benchmark.md index 7dfdc56..e03bc77 100644 --- a/doc/perf_benchmark.md +++ b/doc/perf_benchmark.md @@ -349,3 +349,28 @@ Algorithms: - Printf execution: 49904 cycles - Xoshiro128++ execution: 236723 cycles - Pool Arena execution: 1640273 cycles + +# 231201 + +First coremark run! + +10 iterations within + +2K performance run parameters for coremark. +CoreMark Size : 666 +Total ticks : 22799229 +Total time (secs): 22 +Iterations/Sec : 0 +Iterations : 10 +Compiler version : GCC11.1.0 +Compiler flags : -O0 -g +Memory location : STACK +seedcrc : 0xe9f5 +[0]crclist : 0xe714 +[0]crcmatrix : 0x1fd7 +[0]crcstate : 0x8e3a +[0]crcfinal : 0xfcaf + +22799229 * 2 = 45598458 ns = 45 ms pour 10 iterations @ 500 MHz + +10 / 0.045ms = 222 => * 1000 = 222000 => / 500MHz = 444 coremarks / MHz diff --git a/doc/project_mgt_hw.md b/doc/project_mgt_hw.md index 0a88611..a54d9f5 100644 --- a/doc/project_mgt_hw.md +++ b/doc/project_mgt_hw.md @@ -1,6 +1,6 @@ # DOING -- [ ] v1.6.0: Kernel-capable Hart +- [ ] Kernel-capable Hart - [X] Supporter des set de config du core en test bench. - [X] Support U-mode - [X] Support PMP/PMA diff --git a/test/apps/run.sh b/test/apps/run.sh index c4dfd0e..67fa2c8 100755 --- a/test/apps/run.sh +++ b/test/apps/run.sh @@ -21,7 +21,7 @@ TIMEOUT=0 MIN_PC=65692 # Don't drop VCD, to avoid storing GB of raw data -NO_VCD=0 +NO_VCD=1 # Enable UART link to the processor (platform only) INTERACTIVE=1 @@ -38,6 +38,7 @@ TRACE_BLOCKS=0 TRACE_FETCHER=0 TRACE_PUSHER=0 TRACE_TB_RAM=0 +TRACE_REGISTERS=0 # Disable external IRQ generation GEN_EIRQ=0 @@ -92,7 +93,7 @@ main() { for dir in tests/*/; do if [ "$dir" != "tests/common/" ]; then echo "INFO: Compile $dir" - make -C "$dir"; + make -C "$dir" all; fi done diff --git a/test/apps/tests/coremark.v b/test/apps/tests/coremark.v new file mode 100755 index 0000000..2f96d6d --- /dev/null +++ b/test/apps/tests/coremark.v @@ -0,0 +1,1276 @@ +@00010000 +93 00 00 00 13 01 00 00 93 01 00 00 13 02 00 00 +93 02 00 00 13 03 00 00 93 03 00 00 13 04 00 00 +13 04 00 00 93 04 00 00 13 05 00 00 93 05 00 00 +13 06 00 00 93 06 00 00 13 07 00 00 93 07 00 00 +13 08 00 00 93 08 00 00 93 09 00 00 13 0A 00 00 +93 0A 00 00 13 0B 00 00 93 0B 00 00 13 0C 00 00 +93 0C 00 00 13 0D 00 00 93 0D 00 00 13 0E 00 00 +93 0E 00 00 13 0F 00 00 93 0F 00 00 97 02 00 00 +93 82 82 01 73 90 52 30 17 01 00 00 13 01 81 F7 +EF 00 50 75 73 00 10 00 +@00010098 +13 01 01 FD 23 26 11 02 23 24 81 02 13 04 01 03 +23 2E A4 FC 23 2C B4 FC 83 27 C4 FD 83 D7 07 00 +23 15 F4 FE 83 17 A4 FE 93 D7 77 40 93 97 07 01 +93 D7 07 41 93 F7 F7 0F 93 F7 17 00 A3 04 F4 FE +83 47 94 FE 63 8C 07 00 83 57 A4 FE 93 F7 F7 07 +93 97 07 01 93 D7 07 41 6F 00 C0 18 83 57 A4 FE +93 F7 77 00 23 13 F4 FE 83 17 A4 FE 93 D7 37 40 +93 97 07 01 93 D7 07 41 93 F7 F7 00 23 16 F4 FE +83 17 C4 FE 93 97 47 00 93 97 07 01 93 D7 07 41 +03 57 C4 FE B3 E7 E7 00 23 16 F4 FE 83 17 64 FE +63 88 07 00 13 07 10 00 63 88 E7 06 6F 00 40 0B +03 17 C4 FE 93 07 10 02 63 C6 E7 00 93 07 20 02 +23 16 F4 FE 83 27 84 FD 03 A5 87 01 83 27 84 FD +83 A5 47 01 83 27 84 FD 03 96 07 00 83 27 84 FD +83 96 27 00 83 27 84 FD 83 D7 87 03 03 17 C4 FE +EF 20 50 0A 93 07 05 00 23 17 F4 FE 83 27 84 FD +83 D7 E7 03 63 94 07 06 03 57 E4 FE 83 27 84 FD +23 9F E7 02 6F 00 80 05 83 27 84 FD 13 87 87 02 +83 27 84 FD 83 D6 87 03 83 17 C4 FE 13 86 06 00 +93 85 07 00 13 05 07 00 EF 10 10 56 93 07 05 00 +23 17 F4 FE 83 27 84 FD 83 D7 C7 03 63 94 07 02 +03 57 E4 FE 83 27 84 FD 23 9E E7 02 6F 00 80 01 +83 57 A4 FE 23 17 F4 FE 6F 00 00 01 13 00 00 00 +6F 00 80 00 13 00 00 00 03 57 E4 FE 83 27 84 FD +83 D7 87 03 93 85 07 00 13 05 07 00 EF 30 40 30 +93 07 05 00 13 87 07 00 83 27 84 FD 23 9C E7 02 +83 57 E4 FE 93 F7 F7 07 23 17 F4 FE 83 57 A4 FE +93 F7 07 F0 93 97 07 01 93 D7 07 41 93 E7 07 08 +93 97 07 01 93 D7 07 41 03 57 E4 FE B3 E7 E7 00 +13 97 07 01 13 57 07 41 83 27 C4 FD 23 90 E7 00 +83 17 E4 FE 13 85 07 00 83 20 C1 02 03 24 81 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 11 02 +23 24 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 83 27 C4 FD 83 25 44 FD 13 85 07 00 +EF F0 1F DE 93 07 05 00 23 17 F4 FE 83 27 84 FD +83 25 44 FD 13 85 07 00 EF F0 9F DC 93 07 05 00 +23 16 F4 FE 03 17 E4 FE 83 17 C4 FE B3 07 F7 40 +13 85 07 00 83 20 C1 02 03 24 81 02 13 01 01 03 +67 80 00 00 13 01 01 FE 23 2E 81 00 13 04 01 02 +23 26 A4 FE 23 24 B4 FE 23 22 C4 FE 83 27 44 FE +63 9E 07 08 83 27 C4 FE 83 97 07 00 93 F7 07 F0 +13 97 07 01 13 57 07 41 83 27 C4 FE 83 97 07 00 +93 97 07 01 93 D7 07 01 93 D7 87 00 93 97 07 01 +93 D7 07 01 93 97 07 01 93 D7 07 41 B3 67 F7 00 +13 97 07 01 13 57 07 41 83 27 C4 FE 23 90 E7 00 +83 27 84 FE 83 97 07 00 93 F7 07 F0 13 97 07 01 +13 57 07 41 83 27 84 FE 83 97 07 00 93 97 07 01 +93 D7 07 01 93 D7 87 00 93 97 07 01 93 D7 07 01 +93 97 07 01 93 D7 07 41 B3 67 F7 00 13 97 07 01 +13 57 07 41 83 27 84 FE 23 90 E7 00 83 27 C4 FE +83 97 27 00 13 87 07 00 83 27 84 FE 83 97 27 00 +B3 07 F7 40 13 85 07 00 03 24 C1 01 13 01 01 02 +67 80 00 00 13 01 01 FE 23 2E 81 00 13 04 01 02 +23 26 A4 FE 23 24 B4 FE 83 27 84 FE 03 97 07 00 +83 27 C4 FE 23 90 E7 00 83 27 84 FE 03 97 27 00 +83 27 C4 FE 23 91 E7 00 13 00 00 00 03 24 C1 01 +13 01 01 02 67 80 00 00 13 01 01 FC 23 2E 11 02 +23 2C 81 02 13 04 01 04 23 26 A4 FC 93 87 05 00 +23 15 F4 FC 23 17 04 FE 23 16 04 FE 23 15 04 FE +83 27 C4 FC 83 A7 47 02 23 22 F4 FE 83 27 C4 FC +83 D7 47 00 23 1E F4 FC 23 28 04 FC 83 57 A4 FC +23 19 F4 FC 23 1F 04 FC 6F 00 80 17 83 57 E4 FD +93 F7 F7 0F 93 97 07 01 93 D7 07 41 23 18 F4 FC +93 07 04 FD 93 85 07 00 03 25 44 FE EF 00 80 73 +23 2A A4 FC 03 25 44 FE EF 00 00 7D 23 22 A4 FE +83 27 44 FD 63 98 07 04 83 57 A4 FE 93 87 17 00 +23 15 F4 FE 83 27 44 FE 83 A7 07 00 83 A7 47 00 +83 97 07 00 93 D7 87 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 17 00 93 97 07 01 +93 D7 07 01 03 57 E4 FE B3 87 E7 00 23 17 F4 FE +6F 00 80 0A 83 57 C4 FE 93 87 17 00 23 16 F4 FE +83 27 44 FD 83 A7 47 00 83 97 07 00 93 97 07 01 +93 D7 07 01 93 F7 17 00 63 8E 07 02 83 27 44 FD +83 A7 47 00 83 97 07 00 93 D7 97 40 93 97 07 01 +93 D7 07 41 93 97 07 01 93 D7 07 01 93 F7 17 00 +93 97 07 01 93 D7 07 01 03 57 E4 FE B3 87 E7 00 +23 17 F4 FE 83 27 44 FD 83 A7 07 00 63 8E 07 02 +83 27 44 FD 83 A7 07 00 23 20 F4 FE 83 27 04 FE +03 A7 07 00 83 27 44 FD 23 A0 E7 00 83 27 44 FE +03 A7 07 00 83 27 04 FE 23 A0 E7 00 83 27 44 FE +03 27 04 FE 23 A0 E7 00 83 17 24 FD 63 C4 07 02 +83 17 24 FD 93 97 07 01 93 D7 07 01 93 87 17 00 +93 97 07 01 93 D7 07 01 93 97 07 01 93 D7 07 41 +23 19 F4 FC 83 17 E4 FD 93 97 07 01 93 D7 07 01 +93 87 17 00 93 97 07 01 93 D7 07 01 23 1F F4 FC +03 17 E4 FD 83 17 C4 FD E3 42 F7 E8 83 57 C4 FE +93 97 27 00 93 97 07 01 93 D7 07 01 03 57 A4 FE +B3 87 E7 40 93 97 07 01 93 D7 07 01 03 57 E4 FE +B3 87 E7 00 23 17 F4 FE 83 17 A4 FC 63 5E F0 00 +03 26 C4 FC 97 05 00 00 93 85 45 C6 03 25 44 FE +EF 00 40 69 23 22 A4 FE 83 27 44 FE 83 A7 07 00 +13 85 07 00 EF 00 00 4A 23 2C A4 FC 93 07 04 FD +93 85 07 00 03 25 44 FE EF 00 C0 56 23 20 A4 FE +83 27 04 FE 63 92 07 04 83 27 44 FE 83 A7 07 00 +23 20 F4 FE 6F 00 40 03 83 27 44 FE 83 A7 47 00 +83 97 07 00 03 57 E4 FE 93 05 07 00 13 85 07 00 +EF 20 90 79 93 07 05 00 23 17 F4 FE 83 27 04 FE +83 A7 07 00 23 20 F4 FE 83 27 04 FE E3 96 07 FC +83 27 44 FE 83 A7 07 00 93 85 07 00 03 25 84 FD +EF 00 80 49 23 2C A4 FC 13 06 00 00 97 05 00 00 +93 85 85 C2 03 25 44 FE EF 00 C0 5E 23 22 A4 FE +83 27 44 FE 83 A7 07 00 23 20 F4 FE 6F 00 40 03 +83 27 44 FE 83 A7 47 00 83 97 07 00 03 57 E4 FE +93 05 07 00 13 85 07 00 EF 20 10 72 93 07 05 00 +23 17 F4 FE 83 27 04 FE 83 A7 07 00 23 20 F4 FE +83 27 04 FE E3 96 07 FC 83 57 E4 FE 13 85 07 00 +83 20 C1 03 03 24 81 03 13 01 01 04 67 80 00 00 +13 01 01 FB 23 26 11 04 23 24 81 04 13 04 01 05 +23 2E A4 FA 23 2C B4 FA 93 07 06 00 23 1B F4 FA +93 07 40 01 23 22 F4 FE 03 27 C4 FB 83 27 44 FE +B3 57 F7 02 93 87 E7 FF 23 20 F4 FE 03 27 84 FB +83 27 04 FE 93 97 37 00 B3 07 F7 00 23 2E F4 FC +83 27 C4 FD 23 24 F4 FC 03 27 84 FC 83 27 04 FE +93 97 27 00 B3 07 F7 00 23 2C F4 FC 83 27 84 FB +23 2A F4 FC 83 27 44 FD 23 A0 07 00 03 27 84 FC +83 27 44 FD 23 A2 E7 00 83 27 44 FD 83 A7 47 00 +23 91 07 00 83 27 44 FD 83 A7 47 00 37 87 FF FF +13 07 07 08 23 90 E7 00 83 27 84 FB 93 87 87 00 +23 2C F4 FA 83 27 84 FC 93 87 47 00 23 24 F4 FC +B7 87 FF FF 93 C7 F7 FF 23 13 F4 FC 93 07 F0 FF +23 12 F4 FC 93 06 84 FC 13 06 84 FB 93 05 44 FC +83 27 84 FD 03 27 C4 FD 03 25 44 FD EF 00 C0 1C +23 26 04 FE 6F 00 40 0A 83 27 C4 FE 13 97 07 01 +13 57 07 01 83 57 64 FB B3 47 F7 00 93 97 07 01 +93 D7 07 01 93 F7 F7 00 23 18 F4 FC 83 57 04 FD +93 97 37 00 13 97 07 01 13 57 07 01 83 27 C4 FE +93 97 07 01 93 D7 07 01 93 F7 77 00 93 97 07 01 +93 D7 07 01 B3 67 F7 00 23 17 F4 FC 83 57 E4 FC +93 97 87 00 13 97 07 01 13 57 07 41 83 17 E4 FC +B3 67 F7 00 93 97 07 01 93 D7 07 41 23 12 F4 FC +93 06 84 FC 13 06 84 FB 93 05 44 FC 83 27 84 FD +03 27 C4 FD 03 25 44 FD EF 00 00 13 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 04 FE +E3 6C F7 F4 83 27 44 FD 83 A7 07 00 23 24 F4 FE +93 07 10 00 23 26 F4 FE 6F 00 40 0C 03 27 04 FE +93 07 50 00 B3 57 F7 02 03 27 C4 FE 63 74 F7 02 +83 27 C4 FE 13 87 17 00 23 26 E4 FE 03 27 84 FE +03 27 47 00 93 97 07 01 93 D7 07 41 23 11 F7 00 +6F 00 00 08 83 27 C4 FE 13 87 17 00 23 26 E4 FE +13 97 07 01 13 57 07 01 83 57 64 FB B3 47 F7 00 +23 19 F4 FC 83 27 C4 FE 93 97 07 01 93 D7 07 01 +93 97 87 00 93 97 07 01 93 D7 07 01 93 F7 07 70 +93 97 07 01 93 D7 07 01 03 57 24 FD B3 E7 E7 00 +93 97 07 01 93 D7 07 01 93 96 07 01 93 D6 06 41 +83 27 84 FE 83 A7 47 00 37 47 00 00 13 07 F7 FF +33 F7 E6 00 13 17 07 01 13 57 07 41 23 91 E7 00 +83 27 84 FE 83 A7 07 00 23 24 F4 FE 83 27 84 FE +83 A7 07 00 E3 9C 07 F2 13 06 00 00 97 05 00 00 +93 85 85 92 03 25 44 FD EF 00 C0 2E 23 2A A4 FC +83 27 44 FD 13 85 07 00 83 20 C1 04 03 24 81 04 +13 01 01 05 67 80 00 00 13 01 01 FC 23 2E 11 02 +23 2C 81 02 13 04 01 04 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 E4 FC 23 24 F4 FC +83 27 44 FD 83 A7 07 00 93 87 87 00 03 27 C4 FC +63 E6 E7 00 93 07 00 00 6F 00 80 09 83 27 04 FD +83 A7 07 00 93 87 47 00 03 27 84 FC 63 E6 E7 00 +93 07 00 00 6F 00 C0 07 83 27 44 FD 83 A7 07 00 +23 26 F4 FE 83 27 44 FD 83 A7 07 00 13 87 87 00 +83 27 44 FD 23 A0 E7 00 83 27 C4 FD 03 A7 07 00 +83 27 C4 FE 23 A0 E7 00 83 27 C4 FD 03 27 C4 FE +23 A0 E7 00 83 27 04 FD 03 A7 07 00 83 27 C4 FE +23 A2 E7 00 83 27 04 FD 83 A7 07 00 13 87 47 00 +83 27 04 FD 23 A0 E7 00 83 27 C4 FE 83 A7 47 00 +83 25 84 FD 13 85 07 00 EF F0 DF 90 83 27 C4 FE +13 85 07 00 83 20 C1 03 03 24 81 03 13 01 01 04 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +23 2E A4 FC 83 27 C4 FD 83 A7 07 00 23 26 F4 FE +83 27 C4 FD 83 A7 47 00 23 24 F4 FE 83 27 C4 FE +03 A7 47 00 83 27 C4 FD 23 A2 E7 00 83 27 C4 FE +03 27 84 FE 23 A2 E7 00 83 27 C4 FD 83 A7 07 00 +03 A7 07 00 83 27 C4 FD 23 A0 E7 00 83 27 C4 FE +23 A0 07 00 83 27 C4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 23 2E A4 FC 23 2C B4 FC 83 27 C4 FD +83 A7 47 00 23 26 F4 FE 83 27 84 FD 03 A7 47 00 +83 27 C4 FD 23 A2 E7 00 83 27 84 FD 03 27 C4 FE +23 A2 E7 00 83 27 84 FD 03 A7 07 00 83 27 C4 FD +23 A0 E7 00 83 27 84 FD 03 27 C4 FD 23 A0 E7 00 +83 27 C4 FD 13 85 07 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FE 23 2E 81 00 13 04 01 02 +23 26 A4 FE 23 24 B4 FE 83 27 84 FE 83 97 27 00 +63 C4 07 04 6F 00 00 01 83 27 C4 FE 83 A7 07 00 +23 26 F4 FE 83 27 C4 FE 63 8E 07 00 83 27 C4 FE +83 A7 47 00 03 97 27 00 83 27 84 FE 83 97 27 00 +E3 1C F7 FC 83 27 C4 FE 6F 00 00 04 83 27 C4 FE +83 A7 07 00 23 26 F4 FE 83 27 C4 FE 63 84 07 02 +83 27 C4 FE 83 A7 47 00 83 97 07 00 93 97 07 01 +93 D7 07 01 93 F7 F7 0F 03 27 84 FE 03 17 07 00 +E3 96 E7 FC 83 27 C4 FE 13 85 07 00 03 24 C1 01 +13 01 01 02 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 23 2E A4 FC 23 26 04 FE 6F 00 C0 02 +83 27 C4 FD 83 A7 07 00 23 24 F4 FE 83 27 C4 FD +03 27 C4 FE 23 A0 E7 00 83 27 C4 FD 23 26 F4 FE +83 27 84 FE 23 2E F4 FC 83 27 C4 FD E3 9A 07 FC +83 27 C4 FE 13 85 07 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FB 23 26 11 04 23 24 81 04 +13 04 01 05 23 2E A4 FA 23 2C B4 FA 23 2A C4 FA +93 07 10 00 23 2E F4 FC 83 27 C4 FB 23 26 F4 FE +23 2E 04 FA 23 20 04 FE 23 2C 04 FC 6F 00 80 18 +83 27 84 FD 93 87 17 00 23 2C F4 FC 83 27 C4 FE +23 24 F4 FE 23 2A 04 FC 23 26 04 FC 6F 00 00 03 +83 27 44 FD 93 87 17 00 23 2A F4 FC 83 27 84 FE +83 A7 07 00 23 24 F4 FE 83 27 84 FE 63 80 07 02 +83 27 C4 FC 93 87 17 00 23 26 F4 FC 03 27 C4 FC +83 27 C4 FD E3 46 F7 FC 6F 00 80 00 13 00 00 00 +83 27 C4 FD 23 28 F4 FC 6F 00 C0 0F 83 27 44 FD +63 94 07 02 83 27 84 FE 23 22 F4 FE 83 27 84 FE +83 A7 07 00 23 24 F4 FE 83 27 04 FD 93 87 F7 FF +23 28 F4 FC 6F 00 80 0A 83 27 04 FD 63 86 07 00 +83 27 84 FE 63 94 07 02 83 27 C4 FE 23 22 F4 FE +83 27 C4 FE 83 A7 07 00 23 26 F4 FE 83 27 44 FD +93 87 F7 FF 23 2A F4 FC 6F 00 40 07 83 27 C4 FE +03 A7 47 00 83 27 84 FE 83 A7 47 00 83 26 84 FB +03 26 44 FB 93 85 07 00 13 05 07 00 E7 80 06 00 +93 07 05 00 63 44 F0 02 83 27 C4 FE 23 22 F4 FE +83 27 C4 FE 83 A7 07 00 23 26 F4 FE 83 27 44 FD +93 87 F7 FF 23 2A F4 FC 6F 00 40 02 83 27 84 FE +23 22 F4 FE 83 27 84 FE 83 A7 07 00 23 24 F4 FE +83 27 04 FD 93 87 F7 FF 23 28 F4 FC 83 27 04 FE +63 8A 07 00 83 27 04 FE 03 27 44 FE 23 A0 E7 00 +6F 00 C0 00 83 27 44 FE 23 2E F4 FA 83 27 44 FE +23 20 F4 FE 83 27 44 FD E3 42 F0 F0 83 27 04 FD +63 56 F0 00 83 27 84 FE E3 9A 07 EE 83 27 84 FE +23 26 F4 FE 83 27 C4 FE E3 9C 07 E6 83 27 04 FE +23 A0 07 00 03 27 84 FD 93 07 10 00 63 C6 E7 00 +83 27 C4 FB 6F 00 40 01 83 27 C4 FD 93 97 17 00 +23 2E F4 FC 6F F0 5F E3 13 85 07 00 83 20 C1 04 +03 24 81 04 13 01 01 05 67 80 00 00 13 01 01 FD +23 26 11 02 23 24 81 02 13 04 01 03 23 2E A4 FC +83 27 C4 FD 23 24 F4 FE 83 27 84 FE 83 A7 C7 01 +23 22 F4 FE 83 27 84 FE 23 9C 07 02 83 27 84 FE +23 9D 07 02 83 27 84 FE 23 9E 07 02 83 27 84 FE +23 9F 07 02 23 26 04 FE 6F 00 00 0A 93 05 10 00 +03 25 84 FE EF F0 4F CF 93 07 05 00 23 11 F4 FE +83 27 84 FE 03 D7 87 03 83 57 24 FE 93 05 07 00 +13 85 07 00 EF 20 C0 5D 93 07 05 00 13 87 07 00 +83 27 84 FE 23 9C E7 02 93 05 F0 FF 03 25 84 FE +EF F0 8F CB 93 07 05 00 23 11 F4 FE 83 27 84 FE +03 D7 87 03 83 57 24 FE 93 05 07 00 13 85 07 00 +EF 20 00 5A 93 07 05 00 13 87 07 00 83 27 84 FE +23 9C E7 02 83 27 C4 FE 63 9A 07 00 83 27 84 FE +03 D7 87 03 83 27 84 FE 23 9D E7 02 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 44 FE +E3 6E F7 F4 93 07 00 00 13 85 07 00 83 20 C1 02 +03 24 81 02 13 01 01 03 67 80 00 00 13 01 01 81 +23 26 11 7E 23 24 81 7E 23 22 91 7E 13 04 01 7F +13 01 01 F9 B7 F7 FF FF 93 87 07 FF B3 87 87 00 +23 AE A7 7A B7 F7 FF FF 93 87 07 FF B3 87 87 00 +23 AC B7 7A 23 16 04 FE 23 15 04 FE 93 07 F0 FF +23 14 F4 FE 23 13 04 FE 23 1B 04 FC B7 F7 FF FF +93 87 07 FF B3 87 87 00 37 F7 FF FF 13 07 C7 7B +13 07 07 FF B3 06 87 00 13 07 C4 F8 13 07 27 04 +03 A6 87 7B 93 85 06 00 13 05 07 00 EF 20 C0 76 +13 05 10 00 EF 20 C0 2E 93 07 05 00 93 97 07 01 +93 D7 07 41 23 16 F4 F8 13 05 20 00 EF 20 40 2D +93 07 05 00 93 97 07 01 93 D7 07 41 23 17 F4 F8 +13 05 30 00 EF 20 C0 2B 93 07 05 00 93 97 07 01 +93 D7 07 41 23 18 F4 F8 13 05 40 00 EF 20 40 2A +93 07 05 00 23 24 F4 FA 13 05 50 00 EF 20 40 29 +93 07 05 00 23 26 F4 FA 83 27 C4 FA 63 96 07 00 +93 07 70 00 23 26 F4 FA 83 17 C4 F8 63 92 07 02 +83 17 E4 F8 63 9E 07 00 83 17 04 F9 63 9A 07 00 +23 16 04 F8 23 17 04 F8 93 07 60 06 23 18 F4 F8 +03 17 C4 F8 93 07 10 00 63 1A F7 02 83 17 E4 F8 +63 96 07 02 83 17 04 F9 63 92 07 02 B7 37 00 00 +93 87 57 41 23 16 F4 F8 B7 37 00 00 93 87 57 41 +23 17 F4 F8 93 07 60 06 23 18 F4 F8 23 17 04 FE +6F 00 80 12 03 57 E4 FE 93 07 00 7D B3 07 F7 02 +93 86 07 00 03 57 E4 FE B7 F7 FF FF 93 87 C7 7C +93 87 07 FF B3 87 87 00 B3 86 D7 00 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 A2 D7 FA 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 13 07 00 7D 23 AA E7 FA 03 57 E4 FE +83 16 C4 F8 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 23 9E D7 F8 +03 57 E4 FE 83 16 E4 F8 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +23 9F D7 F8 03 57 E4 FE 83 16 04 F9 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 90 D7 FA 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 9E 07 FC 03 57 E4 FE 83 26 C4 FA +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 23 AE D7 FA 83 57 E4 FE +93 87 17 00 23 17 F4 FE 83 57 E4 FE E3 8C 07 EC +23 17 04 FE 6F 00 80 03 83 57 E4 FE 13 07 10 00 +B3 17 F7 00 13 87 07 00 83 27 C4 FA B3 77 F7 00 +63 88 07 00 83 57 A4 FE 93 87 17 00 23 15 F4 FE +83 57 E4 FE 93 87 17 00 23 17 F4 FE 03 57 E4 FE +93 07 20 00 E3 F2 E7 FC 23 17 04 FE 6F 00 80 05 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A6 47 FB +83 57 A4 FE 03 57 E4 FE B3 D6 F6 02 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 AA D7 FA 83 57 E4 FE 93 87 17 00 +23 17 F4 FE 83 57 E4 FE E3 84 07 FA 23 17 04 FE +6F 00 00 0B 83 57 E4 FE 13 07 10 00 B3 17 F7 00 +13 87 07 00 83 27 C4 FA B3 77 F7 00 63 84 07 08 +23 20 04 FE 6F 00 C0 06 03 27 04 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 03 A7 47 FA 83 26 44 FA 83 57 C4 FE +B3 87 F6 02 83 56 E4 FE 13 86 16 00 B3 06 F7 00 +03 27 04 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +B3 87 C7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +23 A2 D7 FA 83 27 04 FE 93 87 17 00 23 20 F4 FE +83 27 04 FE E3 8A 07 F8 83 57 C4 FE 93 87 17 00 +23 16 F4 FE 83 57 E4 FE 93 87 17 00 23 17 F4 FE +03 57 E4 FE 93 07 20 00 E3 F6 E7 F4 23 17 04 FE +6F 00 80 1E 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 A7 C7 FB 93 F7 17 00 63 8C 07 06 83 26 44 FA +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A5 87 FA +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 97 C7 F9 +83 54 E4 FE 13 86 07 00 13 85 06 00 EF F0 4F AE +13 07 05 00 93 87 04 00 93 97 47 00 B3 87 97 00 +93 97 27 00 93 87 07 FF B3 87 87 00 23 A0 E7 FC +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 C7 FB +93 F7 27 00 63 80 07 0A 03 25 44 FA 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A5 C7 FA 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 97 C7 F9 93 86 07 00 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 97 E7 F9 +93 97 07 01 33 E6 F6 00 03 57 E4 FE 93 06 C4 F8 +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 02 B3 87 F6 00 93 87 87 00 93 86 07 00 +EF 00 50 45 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 A7 C7 FB 93 F7 47 00 63 8A 07 04 83 26 44 FA +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 95 C7 F9 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 07 FB +13 86 07 00 13 85 06 00 EF 10 80 71 83 57 E4 FE +93 87 17 00 23 17 F4 FE 83 57 E4 FE E3 8C 07 E0 +83 27 84 FA 63 98 07 08 23 2E 04 FC 93 07 10 00 +23 24 F4 FA 6F 00 40 04 03 27 84 FA 93 07 07 00 +93 97 27 00 B3 87 E7 00 93 97 17 00 23 24 F4 FA +EF 20 00 0E 93 07 C4 F8 13 85 07 00 EF F0 1F 8C +EF 20 80 10 EF 20 C0 13 93 07 05 00 13 85 07 00 +EF 20 00 17 23 2E A4 FC 83 27 C4 FD E3 8E 07 FA +83 27 C4 FD 23 2C F4 FC 83 27 84 FD 63 96 07 00 +93 07 10 00 23 2C F4 FC 03 27 84 FA 93 06 A0 00 +83 27 84 FD B3 D7 F6 02 93 87 17 00 B3 07 F7 02 +23 24 F4 FA EF 20 C0 07 93 07 C4 F8 13 85 07 00 +EF F0 DF 85 EF 20 40 0A EF 20 80 0D 23 28 A4 FC +83 17 C4 F8 03 57 64 FD 93 05 07 00 13 85 07 00 +EF 10 90 79 93 07 05 00 23 1B F4 FC 83 17 E4 F8 +03 57 64 FD 93 05 07 00 13 85 07 00 EF 10 D0 77 +93 07 05 00 23 1B F4 FC 83 17 04 F9 03 57 64 FD +93 05 07 00 13 85 07 00 EF 10 10 76 93 07 05 00 +23 1B F4 FC 83 27 44 FA 93 97 07 01 93 D7 07 41 +03 57 64 FD 93 05 07 00 13 85 07 00 EF 10 D0 73 +93 07 05 00 23 1B F4 FC 83 57 64 FD 37 F7 00 00 +13 07 57 9F 63 80 E7 0A 37 F7 00 00 13 07 57 9F +63 42 F7 0C 37 97 00 00 13 07 27 A0 63 82 E7 04 +37 97 00 00 13 07 27 A0 63 46 F7 0A 37 87 00 00 +13 07 57 B0 63 80 E7 04 37 87 00 00 13 07 57 B0 +63 4A F7 08 37 27 00 00 13 07 27 8F 63 88 E7 06 +37 57 00 00 13 07 F7 EA 63 8A E7 02 6F 00 80 07 +23 14 04 FE 17 35 00 00 13 05 05 0B EF 20 90 7D +6F 00 00 07 93 07 10 00 23 14 F4 FE 17 35 00 00 +13 05 85 0C EF 20 10 7C 6F 00 80 05 93 07 20 00 +23 14 F4 FE 17 35 00 00 13 05 C5 0D EF 20 90 7A +6F 00 00 04 93 07 30 00 23 14 F4 FE 17 35 00 00 +13 05 85 0F EF 20 10 79 6F 00 80 02 93 07 40 00 +23 14 F4 FE 17 35 00 00 13 05 05 11 EF 20 90 77 +6F 00 00 01 93 07 F0 FF 23 13 F4 FE 13 00 00 00 +83 17 84 FE 63 C6 07 3A 23 17 04 FE 6F 00 00 39 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 23 9E 07 FC +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 C7 FB +93 F7 17 00 63 84 07 0E 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 03 D7 67 FD 83 17 84 FE 97 E6 06 00 +93 86 C6 79 93 97 17 00 B3 87 F6 00 83 D7 07 00 +63 06 F7 0A 83 55 E4 FE 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 D7 67 FD 13 86 07 00 83 17 84 FE +17 E7 06 00 13 07 87 75 93 97 17 00 B3 07 F7 00 +83 D7 07 00 93 86 07 00 17 35 00 00 13 05 85 04 +EF 20 50 68 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 97 C7 FD 93 97 07 01 93 D7 07 01 93 87 17 00 +93 97 07 01 93 D7 07 01 93 96 07 01 93 D6 06 41 +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 23 9E D7 FC 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A7 C7 FB 93 F7 27 00 +63 84 07 0E 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +03 D7 87 FD 83 17 84 FE 97 E6 06 00 93 86 C6 69 +93 97 17 00 B3 87 F6 00 83 D7 07 00 63 06 F7 0A +83 55 E4 FE 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 D7 87 FD 13 86 07 00 83 17 84 FE 17 E7 06 00 +13 07 87 65 93 97 17 00 B3 07 F7 00 83 D7 07 00 +93 86 07 00 17 35 00 00 13 05 C5 F6 EF 20 90 57 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 97 C7 FD +93 97 07 01 93 D7 07 01 93 87 17 00 93 97 07 01 +93 D7 07 01 93 96 07 01 93 D6 06 41 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 9E D7 FC 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 A7 C7 FB 93 F7 47 00 63 84 07 0E +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 03 D7 A7 FD +83 17 84 FE 97 E6 06 00 93 86 C6 59 93 97 17 00 +B3 87 F6 00 83 D7 07 00 63 06 F7 0A 83 55 E4 FE +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 D7 A7 FD +13 86 07 00 83 17 84 FE 17 E7 06 00 13 07 87 55 +93 97 17 00 B3 07 F7 00 83 D7 07 00 93 86 07 00 +17 35 00 00 13 05 45 E9 EF 20 D0 46 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 97 C7 FD 93 97 07 01 +93 D7 07 01 93 87 17 00 93 97 07 01 93 D7 07 01 +93 96 07 01 93 D6 06 41 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +23 9E D7 FC 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 97 C7 FD 13 97 07 01 13 57 07 01 83 57 64 FE +B3 07 F7 00 93 97 07 01 93 D7 07 01 23 13 F4 FE +83 57 E4 FE 93 87 17 00 23 17 F4 FE 03 57 E4 FE +97 E7 06 00 93 87 07 4F 83 A7 07 00 E3 62 F7 C6 +EF 10 90 2E 93 07 05 00 13 97 07 01 13 57 07 01 +83 57 64 FE B3 07 F7 00 93 97 07 01 93 D7 07 01 +23 13 F4 FE 83 27 44 FA 93 85 07 00 17 35 00 00 +13 05 85 DD EF 20 10 38 83 25 04 FD 17 35 00 00 +13 05 05 DE EF 20 10 37 03 25 04 FD EF 10 50 3B +93 07 05 00 93 85 07 00 17 35 00 00 13 05 C5 DD +EF 20 50 35 03 25 04 FD EF 10 90 39 93 07 05 00 +63 80 07 02 97 E7 06 00 93 87 C7 46 83 A7 07 00 +93 85 07 00 17 35 00 00 13 05 85 DC EF 20 90 32 +83 27 84 FA 93 85 07 00 17 35 00 00 13 05 C5 DC +EF 20 50 31 03 27 84 FA 97 E7 06 00 93 87 87 43 +83 A7 07 00 B3 04 F7 02 03 25 04 FD EF 10 50 34 +93 07 05 00 B3 D7 F4 02 93 85 07 00 17 35 00 00 +13 05 C5 DA EF 20 10 2E 03 25 04 FD EF 10 50 32 +13 07 05 00 93 07 90 00 63 E6 E7 02 17 35 00 00 +13 05 45 DA EF 20 10 2C 83 17 64 FE 93 97 07 01 +93 D7 07 01 93 87 17 00 93 97 07 01 93 D7 07 01 +23 13 F4 FE 03 27 84 FA 97 E7 06 00 93 87 87 3C +83 A7 07 00 B3 07 F7 02 93 85 07 00 17 35 00 00 +13 05 45 DA EF 20 10 28 97 35 00 00 93 85 05 DB +17 35 00 00 13 05 45 DB EF 20 D0 26 97 35 00 00 +93 85 05 DC 17 35 00 00 13 05 45 DC EF 20 90 25 +97 35 00 00 93 85 05 DD 17 35 00 00 13 05 05 DD +EF 20 50 24 83 57 64 FD 93 85 07 00 17 35 00 00 +13 05 45 DD EF 20 10 23 83 27 C4 FA 93 F7 17 00 +63 82 07 06 23 17 04 FE 6F 00 80 04 83 56 E4 FE +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 D7 67 FD +13 86 07 00 93 85 06 00 17 35 00 00 13 05 45 DA +EF 20 50 1E 83 57 E4 FE 93 87 17 00 23 17 F4 FE +03 57 E4 FE 97 E7 06 00 93 87 C7 2F 83 A7 07 00 +E3 66 F7 FA 83 27 C4 FA 93 F7 27 00 63 82 07 06 +23 17 04 FE 6F 00 80 04 83 56 E4 FE 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 D7 87 FD 13 86 07 00 +93 85 06 00 17 35 00 00 13 05 45 D5 EF 20 90 17 +83 57 E4 FE 93 87 17 00 23 17 F4 FE 03 57 E4 FE +97 E7 06 00 93 87 07 29 83 A7 07 00 E3 66 F7 FA +83 27 C4 FA 93 F7 47 00 63 82 07 06 23 17 04 FE +6F 00 80 04 83 56 E4 FE 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 D7 A7 FD 13 86 07 00 93 85 06 00 +17 35 00 00 13 05 45 D0 EF 20 D0 10 83 57 E4 FE +93 87 17 00 23 17 F4 FE 03 57 E4 FE 97 E7 06 00 +93 87 47 22 83 A7 07 00 E3 66 F7 FA 23 17 04 FE +6F 00 80 04 83 56 E4 FE 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 D7 47 FD 13 86 07 00 93 85 06 00 +17 35 00 00 13 05 05 CC EF 20 D0 0A 83 57 E4 FE +93 87 17 00 23 17 F4 FE 03 57 E4 FE 97 E7 06 00 +93 87 47 1C 83 A7 07 00 E3 66 F7 FA 83 17 64 FE +63 98 07 00 17 35 00 00 13 05 85 CA EF 20 90 07 +83 17 64 FE 63 58 F0 00 17 35 00 00 13 05 05 CE +EF 20 50 06 83 17 64 FE 63 D8 07 00 17 35 00 00 +13 05 05 CE EF 20 10 05 93 07 C4 F8 93 87 27 04 +13 85 07 00 EF 10 90 0F 73 00 10 00 13 00 00 00 +13 01 01 07 83 20 C1 7E 03 24 81 7E 83 24 41 7E +13 01 01 7F 67 80 00 00 13 01 01 FC 23 2E 11 02 +23 2C 81 02 13 04 01 04 23 26 A4 FC 93 87 05 00 +13 07 06 00 23 15 F4 FC 93 07 07 00 23 14 F4 FC +83 27 C4 FC 83 A7 07 00 23 26 F4 FE 83 27 C4 FC +83 A7 C7 00 23 24 F4 FE 83 27 C4 FC 83 A7 47 00 +23 22 F4 FE 83 27 C4 FC 83 A7 87 00 23 20 F4 FE +83 57 A4 FC 23 1F F4 FC 83 17 E4 FD 13 87 07 00 +83 26 04 FE 03 26 44 FE 83 25 84 FE 03 25 C4 FE +EF 00 C0 03 93 07 05 00 13 87 07 00 83 57 84 FC +93 85 07 00 13 05 07 00 EF 10 00 67 93 07 05 00 +23 14 F4 FC 83 57 84 FC 13 85 07 00 83 20 C1 03 +03 24 81 03 13 01 01 04 67 80 00 00 13 01 01 FC +23 2E 11 02 23 2C 81 02 13 04 01 04 23 2E A4 FC +23 2C B4 FC 23 2A C4 FC 23 28 D4 FC 93 07 07 00 +23 17 F4 FC 23 17 04 FE 83 57 E4 FC 13 87 07 00 +B7 F7 FF FF B3 67 F7 00 23 16 F4 FE 83 17 E4 FC +13 86 07 00 83 25 44 FD 03 25 C4 FD EF 00 80 56 +83 17 E4 FC 93 86 07 00 03 26 44 FD 83 25 84 FD +03 25 C4 FD EF 00 80 48 83 17 C4 FE 13 86 07 00 +83 25 84 FD 03 25 C4 FD EF 00 00 36 93 07 05 00 +13 87 07 00 83 57 E4 FE 93 85 07 00 13 05 07 00 +EF 10 80 5B 93 07 05 00 23 17 F4 FE 83 26 04 FD +03 26 44 FD 83 25 84 FD 03 25 C4 FD EF 00 00 5E +83 17 C4 FE 13 86 07 00 83 25 84 FD 03 25 C4 FD +EF 00 80 31 93 07 05 00 13 87 07 00 83 57 E4 FE +93 85 07 00 13 05 07 00 EF 10 00 57 93 07 05 00 +23 17 F4 FE 83 26 04 FD 03 26 44 FD 83 25 84 FD +03 25 C4 FD EF 00 80 68 83 17 C4 FE 13 86 07 00 +83 25 84 FD 03 25 C4 FD EF 00 00 2D 93 07 05 00 +13 87 07 00 83 57 E4 FE 93 85 07 00 13 05 07 00 +EF 10 80 52 93 07 05 00 23 17 F4 FE 83 26 04 FD +03 26 44 FD 83 25 84 FD 03 25 C4 FD EF 00 00 79 +83 17 C4 FE 13 86 07 00 83 25 84 FD 03 25 C4 FD +EF 00 80 28 93 07 05 00 13 87 07 00 83 57 E4 FE +93 85 07 00 13 05 07 00 EF 10 00 4E 93 07 05 00 +23 17 F4 FE 83 57 E4 FC B3 07 F0 40 93 97 07 01 +93 D7 07 01 93 97 07 01 93 D7 07 41 13 86 07 00 +83 25 44 FD 03 25 C4 FD EF 00 C0 41 83 17 E4 FE +13 85 07 00 83 20 C1 03 03 24 81 03 13 01 01 04 +67 80 00 00 13 01 01 FC 23 2E 81 02 13 04 01 04 +23 26 A4 FC 23 24 B4 FC 23 22 C4 FC 23 20 D4 FC +23 20 04 FE 93 07 10 00 23 26 F4 FE 23 24 04 FE +23 22 04 FE 83 27 44 FC 63 96 07 02 93 07 10 00 +23 22 F4 FC 6F 00 00 02 83 27 84 FE 93 87 17 00 +23 24 F4 FE 83 27 84 FE B3 87 F7 02 93 97 37 00 +23 22 F4 FE 03 27 44 FE 83 27 C4 FC E3 6E F7 FC +83 27 84 FE 93 87 F7 FF 23 20 F4 FE 83 27 84 FC +93 87 F7 FF 93 F7 C7 FF 93 87 47 00 23 2E F4 FC +83 27 04 FE B3 87 F7 02 93 97 17 00 03 27 C4 FD +B3 07 F7 00 23 2C F4 FC 23 24 04 FE 6F 00 C0 10 +23 22 04 FE 6F 00 C0 0E 03 27 C4 FE 83 27 44 FC +33 07 F7 02 93 57 F7 41 93 D7 07 01 B3 06 F7 00 +37 07 01 00 13 07 F7 FF 33 F7 E6 00 B3 07 F7 40 +23 22 F4 FC 83 27 44 FC 13 97 07 01 13 57 07 01 +83 27 C4 FE 93 97 07 01 93 D7 07 01 B3 07 F7 00 +93 97 07 01 93 D7 07 01 23 1B F4 FC 03 27 84 FE +83 27 04 FE 33 07 F7 02 83 27 44 FE B3 07 F7 00 +93 97 17 00 03 27 84 FD B3 07 F7 00 03 57 64 FD +23 90 E7 00 83 27 C4 FE 13 97 07 01 13 57 07 01 +83 57 64 FD B3 07 F7 00 93 97 07 01 93 D7 07 01 +23 1B F4 FC 83 57 64 FD 93 F7 F7 0F 23 1B F4 FC +03 27 84 FE 83 27 04 FE 33 07 F7 02 83 27 44 FE +B3 07 F7 00 93 97 17 00 03 27 C4 FD B3 07 F7 00 +03 57 64 FD 23 90 E7 00 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 83 27 44 FE 93 87 17 00 23 22 F4 FE +03 27 44 FE 83 27 04 FE E3 68 F7 F0 83 27 84 FE +93 87 17 00 23 24 F4 FE 03 27 84 FE 83 27 04 FE +E3 68 F7 EE 83 27 04 FC 03 27 C4 FD 23 A2 E7 00 +83 27 04 FC 03 27 84 FD 23 A4 E7 00 83 27 04 FE +B3 87 F7 02 93 97 17 00 03 27 84 FD B3 07 F7 00 +93 87 F7 FF 93 F7 C7 FF 93 87 47 00 13 87 07 00 +83 27 04 FC 23 A6 E7 00 03 27 04 FE 83 27 04 FC +23 A0 E7 00 83 27 04 FE 13 85 07 00 03 24 C1 03 +13 01 01 04 67 80 00 00 13 01 01 FC 23 2E 81 02 +13 04 01 04 23 26 A4 FC 23 24 B4 FC 93 07 06 00 +23 13 F4 FC 23 26 04 FE 23 24 04 FE 23 2C 04 FC +23 13 04 FE 23 20 04 FE 6F 00 40 0C 23 2E 04 FC +6F 00 40 0A 03 27 04 FE 83 27 C4 FC 33 07 F7 02 +83 27 C4 FD B3 07 F7 00 93 97 27 00 03 27 84 FC +B3 07 F7 00 83 A7 07 00 23 2C F4 FC 03 27 C4 FE +83 27 84 FD B3 07 F7 00 23 26 F4 FE 83 17 64 FC +03 27 C4 FE 63 D0 E7 02 83 57 64 FE 93 87 A7 00 +93 97 07 01 93 D7 07 01 23 13 F4 FE 23 26 04 FE +6F 00 00 03 03 27 84 FD 83 27 84 FE B3 A7 E7 00 +93 F7 F7 0F 13 97 07 01 13 57 07 01 83 57 64 FE +B3 07 F7 00 93 97 07 01 93 D7 07 01 23 13 F4 FE +83 27 84 FD 23 24 F4 FE 83 27 C4 FD 93 87 17 00 +23 2E F4 FC 03 27 C4 FD 83 27 C4 FC E3 6C F7 F4 +83 27 04 FE 93 87 17 00 23 20 F4 FE 03 27 04 FE +83 27 C4 FC E3 6C F7 F2 83 17 64 FE 13 85 07 00 +03 24 C1 03 13 01 01 04 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 93 87 06 00 23 19 F4 FC 23 26 04 FE +6F 00 40 08 23 24 04 FE 6F 00 40 06 03 27 C4 FE +83 27 C4 FD 33 07 F7 02 83 27 84 FE B3 07 F7 00 +93 97 17 00 03 27 44 FD B3 07 F7 00 83 97 07 00 +13 86 07 00 03 17 24 FD 83 26 C4 FE 83 27 C4 FD +B3 86 F6 02 83 27 84 FE B3 87 F6 00 93 97 27 00 +83 26 84 FD B3 87 F6 00 33 07 E6 02 23 A0 E7 00 +83 27 84 FE 93 87 17 00 23 24 F4 FE 03 27 84 FE +83 27 C4 FD E3 6C F7 F8 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 03 27 C4 FE 83 27 C4 FD E3 6C F7 F6 +13 00 00 00 13 00 00 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +23 2E A4 FC 23 2C B4 FC 93 07 06 00 23 1B F4 FC +23 26 04 FE 6F 00 80 09 23 24 04 FE 6F 00 80 07 +03 27 C4 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 17 00 03 27 84 FD B3 07 F7 00 +83 97 07 00 13 97 07 01 13 57 07 01 83 57 64 FD +B3 07 F7 00 93 96 07 01 93 D6 06 01 03 27 C4 FE +83 27 C4 FD 33 07 F7 02 83 27 84 FE B3 07 F7 00 +93 97 17 00 03 27 84 FD B3 07 F7 00 13 97 06 01 +13 57 07 41 23 90 E7 00 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 83 27 C4 FD E3 62 F7 F8 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +83 27 C4 FD E3 62 F7 F6 13 00 00 00 13 00 00 00 +03 24 C1 02 13 01 01 03 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 04 FE 6F 00 00 0B +83 27 C4 FE 93 97 27 00 03 27 84 FD B3 07 F7 00 +23 A0 07 00 23 24 04 FE 6F 00 C0 07 83 27 C4 FE +93 97 27 00 03 27 84 FD B3 07 F7 00 83 A6 07 00 +03 27 C4 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 17 00 03 27 44 FD B3 07 F7 00 +83 97 07 00 13 86 07 00 83 27 84 FE 93 97 17 00 +03 27 04 FD B3 07 F7 00 83 97 07 00 33 07 F6 02 +83 27 C4 FE 93 97 27 00 03 26 84 FD B3 07 F6 00 +33 87 E6 00 23 A0 E7 00 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 83 27 C4 FD E3 60 F7 F8 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +83 27 C4 FD E3 66 F7 F4 13 00 00 00 13 00 00 00 +03 24 C1 02 13 01 01 03 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 04 FE 6F 00 00 11 +23 24 04 FE 6F 00 00 0F 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 84 FE B3 07 F7 00 93 97 27 00 +03 27 84 FD B3 07 F7 00 23 A0 07 00 23 22 04 FE +6F 00 C0 0A 03 27 C4 FE 83 27 C4 FD 33 07 F7 02 +83 27 84 FE B3 07 F7 00 93 97 27 00 03 27 84 FD +B3 07 F7 00 83 A6 07 00 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 44 FE B3 07 F7 00 93 97 17 00 +03 27 44 FD B3 07 F7 00 83 97 07 00 13 86 07 00 +03 27 44 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 17 00 03 27 04 FD B3 07 F7 00 +83 97 07 00 33 07 F6 02 03 26 C4 FE 83 27 C4 FD +33 06 F6 02 83 27 84 FE B3 07 F6 00 93 97 27 00 +03 26 84 FD B3 07 F6 00 33 87 E6 00 23 A0 E7 00 +83 27 44 FE 93 87 17 00 23 22 F4 FE 03 27 44 FE +83 27 C4 FD E3 68 F7 F4 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 83 27 C4 FD E3 66 F7 F0 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +83 27 C4 FD E3 66 F7 EE 13 00 00 00 13 00 00 00 +03 24 C1 02 13 01 01 03 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 04 FE 6F 00 80 13 +23 24 04 FE 6F 00 80 11 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 84 FE B3 07 F7 00 93 97 27 00 +03 27 84 FD B3 07 F7 00 23 A0 07 00 23 22 04 FE +6F 00 40 0D 03 27 C4 FE 83 27 C4 FD 33 07 F7 02 +83 27 44 FE B3 07 F7 00 93 97 17 00 03 27 44 FD +B3 07 F7 00 83 97 07 00 93 86 07 00 03 27 44 FE +83 27 C4 FD 33 07 F7 02 83 27 84 FE B3 07 F7 00 +93 97 17 00 03 27 04 FD B3 07 F7 00 83 97 07 00 +B3 87 F6 02 23 20 F4 FE 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 84 FE B3 07 F7 00 93 97 27 00 +03 27 84 FD B3 07 F7 00 83 A7 07 00 93 86 07 00 +83 27 04 FE 93 D7 27 40 13 F7 F7 00 83 27 04 FE +93 D7 57 40 93 F7 F7 07 B3 07 F7 02 B3 86 F6 00 +03 27 C4 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 27 00 03 27 84 FD B3 07 F7 00 +13 87 06 00 23 A0 E7 00 83 27 44 FE 93 87 17 00 +23 22 F4 FE 03 27 44 FE 83 27 C4 FD E3 64 F7 F2 +83 27 84 FE 93 87 17 00 23 24 F4 FE 03 27 84 FE +83 27 C4 FD E3 62 F7 EE 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 03 27 C4 FE 83 27 C4 FD E3 62 F7 EC +13 00 00 00 13 00 00 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 F9 23 26 11 06 23 24 81 06 +13 04 01 07 23 2E A4 F8 23 2C B4 F8 93 05 06 00 +13 86 06 00 93 06 07 00 13 87 07 00 93 87 05 00 +23 1B F4 F8 93 07 06 00 23 1A F4 F8 93 87 06 00 +23 19 F4 F8 93 07 07 00 23 18 F4 F8 83 27 84 F9 +23 20 F4 FA 23 26 04 FE 6F 00 C0 04 83 27 C4 FE +93 97 27 00 93 87 07 FF B3 87 87 00 23 AA 07 FA +83 27 C4 FE 93 97 27 00 93 87 07 FF B3 87 87 00 +03 A7 47 FB 83 27 C4 FE 93 97 27 00 93 87 07 FF +B3 87 87 00 23 AA E7 FC 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 03 27 C4 FE 93 07 70 00 E3 F8 E7 FA +6F 00 80 04 13 07 44 FA 93 07 04 FA 93 05 07 00 +13 85 07 00 EF 00 40 4C 23 22 A4 FE 83 27 44 FE +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 47 FD +13 87 17 00 83 27 44 FE 93 97 27 00 93 87 07 FF +B3 87 87 00 23 AA E7 FC 83 27 04 FA 83 C7 07 00 +E3 9A 07 FA 83 27 84 F9 23 20 F4 FA 6F 00 40 04 +83 27 04 FA 03 C7 07 00 93 07 C0 02 63 02 F7 02 +83 27 04 FA 83 C6 07 00 83 57 64 F9 13 F7 F7 0F +83 27 04 FA 33 C7 E6 00 13 77 F7 0F 23 80 E7 00 +03 27 04 FA 83 17 24 F9 B3 07 F7 00 23 20 F4 FA +03 27 84 F9 83 27 C4 F9 33 07 F7 00 83 27 04 FA +E3 E8 E7 FA 83 27 84 F9 23 20 F4 FA 6F 00 80 04 +13 07 44 FA 93 07 04 FA 93 05 07 00 13 85 07 00 +EF 00 80 40 23 24 A4 FE 83 27 84 FE 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A7 47 FD 13 87 17 00 +83 27 84 FE 93 97 27 00 93 87 07 FF B3 87 87 00 +23 AA E7 FC 83 27 04 FA 83 C7 07 00 E3 9A 07 FA +83 27 84 F9 23 20 F4 FA 6F 00 40 04 83 27 04 FA +03 C7 07 00 93 07 C0 02 63 02 F7 02 83 27 04 FA +83 C6 07 00 83 57 44 F9 13 F7 F7 0F 83 27 04 FA +33 C7 E6 00 13 77 F7 0F 23 80 E7 00 03 27 04 FA +83 17 24 F9 B3 07 F7 00 23 20 F4 FA 03 27 84 F9 +83 27 C4 F9 33 07 F7 00 83 27 04 FA E3 E8 E7 FA +23 26 04 FE 6F 00 80 06 83 27 C4 FE 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A7 47 FD 03 57 04 F9 +93 05 07 00 13 85 07 00 EF 00 10 14 93 07 05 00 +23 18 F4 F8 83 27 C4 FE 93 97 27 00 93 87 07 FF +B3 87 87 00 83 A7 47 FB 03 57 04 F9 93 05 07 00 +13 85 07 00 EF 00 50 11 93 07 05 00 23 18 F4 F8 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +93 07 70 00 E3 FA E7 F8 83 57 04 F9 13 85 07 00 +83 20 C1 06 03 24 81 06 13 01 01 07 67 80 00 00 +13 01 01 FD 23 26 81 02 13 04 01 03 23 2E A4 FC +93 87 05 00 23 2A C4 FC 23 1D F4 FC 23 26 04 FE +23 24 04 FE 23 20 04 FE 83 27 C4 FD 93 87 F7 FF +23 2E F4 FC 23 24 04 FE 6F 00 C0 1E 83 27 84 FE +63 8E 07 06 23 22 04 FE 6F 00 80 03 03 27 04 FE +83 27 44 FE 33 07 F7 00 83 26 C4 FE 83 27 44 FE +B3 87 F6 00 83 26 44 FD B3 87 F6 00 03 47 07 00 +23 80 E7 00 83 27 44 FE 93 87 17 00 23 22 F4 FE +03 27 44 FE 83 27 84 FE E3 62 F7 FC 03 27 C4 FE +83 27 44 FE B3 07 F7 00 03 27 44 FD B3 07 F7 00 +13 07 C0 02 23 80 E7 00 03 27 84 FE 83 27 C4 FE +B3 07 F7 00 93 87 17 00 23 26 F4 FE 83 17 A4 FD +93 97 07 01 93 D7 07 01 93 87 17 00 93 97 07 01 +93 D7 07 01 23 1D F4 FC 83 57 A4 FD 93 F7 77 00 +13 07 70 00 63 8E E7 0E 13 07 70 00 63 4A F7 12 +13 07 60 00 63 46 F7 12 13 07 50 00 63 D2 E7 0A +13 07 20 00 63 46 F7 00 63 DC 07 00 6F 00 40 11 +13 87 D7 FF 93 07 10 00 63 E4 E7 10 6F 00 40 04 +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 21 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 40 00 23 24 F4 FE 6F 00 80 0C +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 1E 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 80 00 23 24 F4 FE 6F 00 80 08 +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 1B 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 80 00 23 24 F4 FE 6F 00 80 04 +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 18 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 80 00 23 24 F4 FE 6F 00 80 00 +13 00 00 00 03 27 C4 FE 83 27 84 FE B3 07 F7 00 +93 87 17 00 03 27 C4 FD E3 E2 E7 E0 83 27 C4 FD +93 87 17 00 23 2E F4 FC 6F 00 00 02 03 27 44 FD +83 27 C4 FE B3 07 F7 00 23 80 07 00 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 C4 FD +E3 6E F7 FC 13 00 00 00 13 00 00 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 93 07 05 00 A3 0F F4 FC 83 47 F4 FD +93 B7 07 03 93 C7 17 00 13 F7 F7 0F 83 47 F4 FD +93 B7 A7 03 93 F7 F7 0F B3 77 F7 00 93 F7 F7 0F +A3 07 F4 FE 83 47 F4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 11 02 +23 24 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +83 27 C4 FD 83 A7 07 00 23 26 F4 FE 23 24 04 FE +6F 00 40 34 83 27 C4 FE 83 C7 07 00 A3 03 F4 FE +03 47 74 FE 93 07 C0 02 63 1A F7 00 83 27 C4 FE +93 87 17 00 23 26 F4 FE 6F 00 40 33 03 27 84 FE +93 07 70 00 63 E4 E7 2E 83 27 84 FE 13 97 27 00 +97 27 00 00 93 87 07 CD B3 07 F7 00 03 A7 07 00 +97 27 00 00 93 87 07 CC B3 07 F7 00 67 80 07 00 +83 47 74 FE 13 85 07 00 EF F0 1F F2 93 07 05 00 +63 88 07 00 93 07 40 00 23 24 F4 FE 6F 00 C0 05 +03 47 74 FE 93 07 B0 02 63 08 F7 00 03 47 74 FE +93 07 D0 02 63 18 F7 00 93 07 20 00 23 24 F4 FE +6F 00 80 03 03 47 74 FE 93 07 E0 02 63 18 F7 00 +93 07 50 00 23 24 F4 FE 6F 00 00 02 93 07 10 00 +23 24 F4 FE 83 27 84 FD 93 87 47 00 03 A7 07 00 +13 07 17 00 23 A0 E7 00 83 27 84 FD 83 A7 07 00 +13 87 17 00 83 27 84 FD 23 A0 E7 00 6F 00 C0 24 +83 47 74 FE 13 85 07 00 EF F0 1F E9 93 07 05 00 +63 82 07 02 93 07 40 00 23 24 F4 FE 83 27 84 FD +93 87 87 00 03 A7 07 00 13 07 17 00 23 A0 E7 00 +6F 00 80 21 03 47 74 FE 93 07 E0 02 63 12 F7 02 +93 07 50 00 23 24 F4 FE 83 27 84 FD 93 87 87 00 +03 A7 07 00 13 07 17 00 23 A0 E7 00 6F 00 C0 1E +93 07 10 00 23 24 F4 FE 83 27 84 FD 93 87 87 00 +03 A7 07 00 13 07 17 00 23 A0 E7 00 6F 00 C0 1C +03 47 74 FE 93 07 E0 02 63 12 F7 02 93 07 50 00 +23 24 F4 FE 83 27 84 FD 93 87 07 01 03 A7 07 00 +13 07 17 00 23 A0 E7 00 6F 00 C0 18 83 47 74 FE +13 85 07 00 EF F0 5F DE 93 07 05 00 63 9C 07 16 +93 07 10 00 23 24 F4 FE 83 27 84 FD 93 87 07 01 +03 A7 07 00 13 07 17 00 23 A0 E7 00 6F 00 80 15 +03 47 74 FE 93 07 50 04 63 08 F7 00 03 47 74 FE +93 07 50 06 63 12 F7 02 93 07 30 00 23 24 F4 FE +83 27 84 FD 93 87 47 01 03 A7 07 00 13 07 17 00 +23 A0 E7 00 6F 00 80 12 83 47 74 FE 13 85 07 00 +EF F0 9F D7 93 07 05 00 63 9A 07 10 93 07 10 00 +23 24 F4 FE 83 27 84 FD 93 87 47 01 03 A7 07 00 +13 07 17 00 23 A0 E7 00 6F 00 40 0F 03 47 74 FE +93 07 B0 02 63 08 F7 00 03 47 74 FE 93 07 D0 02 +63 12 F7 02 93 07 60 00 23 24 F4 FE 83 27 84 FD +93 87 C7 00 03 A7 07 00 13 07 17 00 23 A0 E7 00 +6F 00 80 0C 93 07 10 00 23 24 F4 FE 83 27 84 FD +93 87 C7 00 03 A7 07 00 13 07 17 00 23 A0 E7 00 +6F 00 80 0A 83 47 74 FE 13 85 07 00 EF F0 DF CE +93 07 05 00 63 82 07 02 93 07 70 00 23 24 F4 FE +83 27 84 FD 93 87 87 01 03 A7 07 00 13 07 17 00 +23 A0 E7 00 6F 00 40 07 93 07 10 00 23 24 F4 FE +83 27 84 FD 93 87 87 01 03 A7 07 00 13 07 17 00 +23 A0 E7 00 6F 00 40 05 83 47 74 FE 13 85 07 00 +EF F0 9F C9 93 07 05 00 63 9E 07 02 93 07 10 00 +23 24 F4 FE 83 27 84 FD 93 87 47 00 03 A7 07 00 +13 07 17 00 23 A0 E7 00 6F 00 C0 01 13 00 00 00 +6F 00 80 01 13 00 00 00 6F 00 00 01 13 00 00 00 +6F 00 80 00 13 00 00 00 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 83 27 C4 FE 83 C7 07 00 63 88 07 00 +03 27 84 FE 93 07 10 00 E3 16 F7 CA 83 27 C4 FD +03 27 C4 FE 23 A0 E7 00 83 27 84 FE 13 85 07 00 +83 20 C1 02 03 24 81 02 13 01 01 03 67 80 00 00 +13 01 01 FD 23 26 81 02 13 04 01 03 23 2E A4 FC +03 27 C4 FD 93 07 50 00 63 E8 E7 08 83 27 C4 FD +13 97 27 00 97 27 00 00 93 87 C7 98 B3 07 F7 00 +03 A7 07 00 97 27 00 00 93 87 C7 97 B3 07 F7 00 +67 80 07 00 97 D7 06 00 93 87 07 CF 83 A7 07 00 +23 26 F4 FE 6F 00 C0 05 97 D7 06 00 93 87 07 CE +83 A7 07 00 23 26 F4 FE 6F 00 80 04 97 D7 06 00 +93 87 C7 CA 83 A7 07 00 23 26 F4 FE 6F 00 40 03 +97 D7 06 00 93 87 C7 C9 83 A7 07 00 23 26 F4 FE +6F 00 00 02 97 D7 06 00 93 87 87 CA 83 A7 07 00 +23 26 F4 FE 6F 00 C0 00 23 26 04 FE 13 00 00 00 +83 27 C4 FE 13 85 07 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +93 07 05 00 13 87 05 00 A3 0F F4 FC 93 07 07 00 +23 1E F4 FC A3 07 04 FE A3 06 04 FE 23 07 04 FE +A3 07 04 FE 6F 00 C0 0B 83 57 C4 FD 13 97 87 01 +13 57 87 41 83 07 F4 FD B3 47 F7 00 93 97 87 01 +93 D7 87 41 93 F7 F7 0F 93 F7 17 00 A3 06 F4 FE +83 47 F4 FD 93 D7 17 00 A3 0F F4 FC 03 47 D4 FE +93 07 10 00 63 14 F7 02 83 57 C4 FD 13 87 07 00 +B7 47 00 00 93 87 27 00 B3 47 F7 00 23 1E F4 FC +93 07 10 00 23 07 F4 FE 6F 00 80 00 23 07 04 FE +83 57 C4 FD 93 D7 17 00 23 1E F4 FC 83 47 E4 FE +63 8E 07 00 83 57 C4 FD 13 87 07 00 B7 87 FF FF +B3 67 F7 00 23 1E F4 FC 6F 00 C0 01 83 57 C4 FD +13 87 07 00 B7 87 00 00 93 87 F7 FF B3 77 F7 00 +23 1E F4 FC 83 47 F4 FE 93 87 17 00 A3 07 F4 FE +03 47 F4 FE 93 07 70 00 E3 F0 E7 F4 83 57 C4 FD +13 85 07 00 03 24 C1 02 13 01 01 03 67 80 00 00 +13 01 01 FE 23 2E 11 00 23 2C 81 00 13 04 01 02 +93 07 05 00 13 87 05 00 23 17 F4 FE 93 07 07 00 +23 16 F4 FE 83 57 E4 FE 93 F7 F7 0F 03 57 C4 FE +93 05 07 00 13 85 07 00 EF F0 DF EB 93 07 05 00 +23 16 F4 FE 83 57 E4 FE 93 D7 87 00 93 97 07 01 +93 D7 07 01 93 F7 F7 0F 03 57 C4 FE 93 05 07 00 +13 85 07 00 EF F0 1F E9 93 07 05 00 23 16 F4 FE +83 57 C4 FE 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 11 00 +23 2C 81 00 13 04 01 02 23 26 A4 FE 93 87 05 00 +23 15 F4 FE 83 27 C4 FE 93 97 07 01 93 D7 07 41 +03 57 A4 FE 93 05 07 00 13 85 07 00 EF 00 C0 04 +93 07 05 00 23 15 F4 FE 83 27 C4 FE 93 D7 07 01 +93 97 07 01 93 D7 07 41 03 57 A4 FE 93 05 07 00 +13 85 07 00 EF 00 40 02 93 07 05 00 23 15 F4 FE +83 57 A4 FE 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 11 00 +23 2C 81 00 13 04 01 02 93 07 05 00 13 87 05 00 +23 17 F4 FE 93 07 07 00 23 16 F4 FE 83 57 E4 FE +03 57 C4 FE 93 05 07 00 13 85 07 00 EF F0 5F EC +93 07 05 00 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 11 00 +23 2C 81 00 13 04 01 02 A3 07 04 FE 83 47 F4 FE +63 88 07 00 17 15 00 00 13 05 45 68 EF 10 80 0A +83 47 F4 FE 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 81 00 +13 04 01 02 F3 27 00 C0 23 26 F4 FE 83 27 C4 FE +13 85 07 00 03 24 C1 01 13 01 01 02 67 80 00 00 +13 01 01 FF 23 26 11 00 23 24 81 00 13 04 01 01 +EF F0 9F FC 13 07 05 00 97 D7 06 00 93 87 47 98 +23 A0 E7 00 13 00 00 00 83 20 C1 00 03 24 81 00 +13 01 01 01 67 80 00 00 13 01 01 FF 23 26 11 00 +23 24 81 00 13 04 01 01 EF F0 1F F9 13 07 05 00 +97 D7 06 00 93 87 07 95 23 A0 E7 00 13 00 00 00 +83 20 C1 00 03 24 81 00 13 01 01 01 67 80 00 00 +13 01 01 FE 23 2E 81 00 13 04 01 02 97 D7 06 00 +93 87 47 92 03 A7 07 00 97 D7 06 00 93 87 47 91 +83 A7 07 00 B3 07 F7 40 23 26 F4 FE 83 27 C4 FE +13 85 07 00 03 24 C1 01 13 01 01 02 67 80 00 00 +13 01 01 FD 23 26 81 02 13 04 01 03 23 2E A4 FC +03 27 C4 FD B7 D7 9A 3B 93 87 07 A0 B3 57 F7 02 +23 26 F4 FE 83 27 C4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FE 23 2E 81 00 +13 04 01 02 23 26 A4 FE 23 24 B4 FE 23 22 C4 FE +83 27 C4 FE 13 07 10 00 23 80 E7 00 13 00 00 00 +03 24 C1 01 13 01 01 02 67 80 00 00 13 01 01 FE +23 2E 81 00 13 04 01 02 23 26 A4 FE 83 27 C4 FE +23 80 07 00 13 00 00 00 03 24 C1 01 13 01 01 02 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +23 2E A4 FC 23 2C B4 FC 83 27 C4 FD 23 26 F4 FE +6F 00 00 01 83 27 C4 FE 93 87 17 00 23 26 F4 FE +83 27 C4 FE 83 C7 07 00 63 8A 07 00 83 27 84 FD +13 87 F7 FF 23 2C E4 FC E3 9E 07 FC 03 27 C4 FE +83 27 C4 FD B3 07 F7 40 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 23 2E A4 FC 23 26 04 FE 6F 00 00 04 +03 27 C4 FE 93 07 07 00 93 97 27 00 B3 87 E7 00 +93 97 17 00 13 86 07 00 83 27 C4 FD 83 A7 07 00 +93 86 17 00 03 27 C4 FD 23 20 D7 00 83 C7 07 00 +B3 07 F6 00 93 87 07 FD 23 26 F4 FE 83 27 C4 FD +83 A7 07 00 03 C7 07 00 93 07 F0 02 63 FC E7 00 +83 27 C4 FD 83 A7 07 00 03 C7 07 00 93 07 90 03 +E3 F0 E7 FA 83 27 C4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 F8 23 2E 81 06 +13 04 01 08 23 2E A4 F8 23 2C B4 F8 23 2A C4 F8 +23 28 D4 F8 23 26 E4 F8 23 24 F4 F8 97 C7 06 00 +93 87 87 73 83 A7 07 00 23 24 F4 FE 83 27 84 F8 +93 F7 07 04 63 8A 07 00 97 C7 06 00 93 87 07 72 +83 A7 07 00 23 24 F4 FE 83 27 84 F8 93 F7 07 01 +63 88 07 00 83 27 84 F8 93 F7 E7 FF 23 24 F4 F8 +03 27 44 F9 93 07 10 00 63 D8 E7 00 03 27 44 F9 +93 07 40 02 63 D6 E7 00 93 07 00 00 6F 00 80 2F +83 27 84 F8 93 F7 17 00 63 86 07 00 93 07 00 03 +6F 00 80 00 93 07 00 02 A3 01 F4 FE A3 07 04 FE +83 27 84 F8 93 F7 27 00 63 8A 07 06 83 27 84 F9 +63 D4 07 02 93 07 D0 02 A3 07 F4 FE 83 27 84 F9 +B3 07 F0 40 23 2C F4 F8 83 27 04 F9 93 87 F7 FF +23 28 F4 F8 6F 00 80 04 83 27 84 F8 93 F7 47 00 +63 8E 07 00 93 07 B0 02 A3 07 F4 FE 83 27 04 F9 +93 87 F7 FF 23 28 F4 F8 6F 00 40 02 83 27 84 F8 +93 F7 87 00 63 8C 07 00 93 07 00 02 A3 07 F4 FE +83 27 04 F9 93 87 F7 FF 23 28 F4 F8 83 27 84 F8 +93 F7 07 02 63 8C 07 02 03 27 44 F9 93 07 00 01 +63 1A F7 00 83 27 04 F9 93 87 E7 FF 23 28 F4 F8 +6F 00 C0 01 03 27 44 F9 93 07 80 00 63 18 F7 00 +83 27 04 F9 93 87 F7 FF 23 28 F4 F8 23 22 04 FE +83 27 84 F9 63 92 07 06 83 27 44 FE 13 87 17 00 +23 22 E4 FE 93 87 07 FF B3 87 87 00 13 07 00 03 +23 88 E7 FA 6F 00 C0 04 03 27 84 F9 83 27 44 F9 +B3 77 F7 02 03 27 84 FE 33 07 F7 00 83 27 44 FE +93 86 17 00 23 22 D4 FE 03 47 07 00 93 87 07 FF +B3 87 87 00 23 88 E7 FA 03 27 84 F9 83 27 44 F9 +B3 57 F7 02 23 2C F4 F8 83 27 84 F9 E3 9E 07 FA +03 27 44 FE 83 27 C4 F8 63 D6 E7 00 83 27 44 FE +23 26 F4 F8 03 27 04 F9 83 27 C4 F8 B3 07 F7 40 +23 28 F4 F8 83 27 84 F8 93 F7 17 01 63 96 07 02 +6F 00 80 01 83 27 C4 F9 13 87 17 00 23 2E E4 F8 +13 07 00 02 23 80 E7 00 83 27 04 F9 13 87 F7 FF +23 28 E4 F8 E3 40 F0 FE 83 47 F4 FE 63 8C 07 00 +83 27 C4 F9 13 87 17 00 23 2E E4 F8 03 47 F4 FE +23 80 E7 00 83 27 84 F8 93 F7 07 02 63 84 07 06 +03 27 44 F9 93 07 80 00 63 1E F7 00 83 27 C4 F9 +13 87 17 00 23 2E E4 F8 13 07 00 03 23 80 E7 00 +6F 00 40 04 03 27 44 F9 93 07 00 01 63 1C F7 02 +83 27 C4 F9 13 87 17 00 23 2E E4 F8 13 07 00 03 +23 80 E7 00 97 C7 06 00 93 87 07 4C 03 A7 07 00 +83 27 C4 F9 93 86 17 00 23 2E D4 F8 03 47 17 02 +23 80 E7 00 83 27 84 F8 93 F7 07 01 63 92 07 04 +6F 00 80 01 83 27 C4 F9 13 87 17 00 23 2E E4 F8 +03 47 34 FE 23 80 E7 00 83 27 04 F9 13 87 F7 FF +23 28 E4 F8 E3 40 F0 FE 6F 00 80 01 83 27 C4 F9 +13 87 17 00 23 2E E4 F8 13 07 00 03 23 80 E7 00 +83 27 C4 F8 13 87 F7 FF 23 26 E4 F8 03 27 44 FE +E3 4E F7 FC 6F 00 40 02 83 27 C4 F9 13 87 17 00 +23 2E E4 F8 03 27 44 FE 13 07 07 FF 33 07 87 00 +03 47 07 FB 23 80 E7 00 83 27 44 FE 13 87 F7 FF +23 22 E4 FE E3 4A F0 FC 6F 00 80 01 83 27 C4 F9 +13 87 17 00 23 2E E4 F8 13 07 00 02 23 80 E7 00 +83 27 04 F9 13 87 F7 FF 23 28 E4 F8 E3 40 F0 FE +83 27 C4 F9 13 85 07 00 03 24 C1 07 13 01 01 08 +67 80 00 00 13 01 01 FA 23 2E 81 04 13 04 01 06 +23 2E A4 FA 23 2C B4 FA 23 2A C4 FA 23 28 D4 FA +23 26 E4 FA 97 C7 06 00 93 87 07 3B 83 A7 07 00 +23 26 F4 FE 83 27 C4 FA 93 F7 07 04 63 8A 07 00 +97 C7 06 00 93 87 87 39 83 A7 07 00 23 26 F4 FE +23 22 04 FE 23 24 04 FE 6F 00 C0 0A 83 27 84 FE +63 80 07 02 83 27 44 FE 13 87 17 00 23 22 E4 FE +93 87 07 FF B3 87 87 00 13 07 A0 03 23 8E E7 FC +83 27 84 FE 03 27 84 FB B3 07 F7 00 83 C7 07 00 +93 D7 47 00 93 F7 F7 0F 13 87 07 00 83 27 C4 FE +33 87 E7 00 83 27 44 FE 93 86 17 00 23 22 D4 FE +03 47 07 00 93 87 07 FF B3 87 87 00 23 8E E7 FC +83 27 84 FE 03 27 84 FB B3 07 F7 00 83 C7 07 00 +93 F7 F7 00 03 27 C4 FE 33 07 F7 00 83 27 44 FE +93 86 17 00 23 22 D4 FE 03 47 07 00 93 87 07 FF +B3 87 87 00 23 8E E7 FC 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 93 07 50 00 E3 D8 E7 F4 +83 27 C4 FA 93 F7 07 01 63 98 07 02 6F 00 80 01 +83 27 C4 FB 13 87 17 00 23 2E E4 FA 13 07 00 02 +23 80 E7 00 83 27 44 FB 13 87 F7 FF 23 2A E4 FA +03 27 44 FE E3 4E F7 FC 23 24 04 FE 6F 00 00 03 +83 27 C4 FB 13 87 17 00 23 2E E4 FA 03 27 84 FE +13 07 07 FF 33 07 87 00 03 47 C7 FD 23 80 E7 00 +83 27 84 FE 93 87 17 00 23 24 F4 FE 03 27 84 FE +83 27 44 FE E3 46 F7 FC 6F 00 80 01 83 27 C4 FB +13 87 17 00 23 2E E4 FA 13 07 00 02 23 80 E7 00 +83 27 44 FB 13 87 F7 FF 23 2A E4 FA 03 27 44 FE +E3 4E F7 FC 83 27 C4 FB 13 85 07 00 03 24 C1 05 +13 01 01 06 67 80 00 00 13 01 01 FA 23 2E 81 04 +13 04 01 06 23 2E A4 FA 23 2C B4 FA 23 2A C4 FA +23 28 D4 FA 23 26 E4 FA 23 22 04 FE 23 26 04 FE +6F 00 00 1A 83 27 C4 FE 63 80 07 02 83 27 44 FE +13 87 17 00 23 22 E4 FE 93 87 07 FF B3 87 87 00 +13 07 E0 02 23 8E E7 FC 83 27 C4 FE 03 27 84 FB +B3 07 F7 00 83 C7 07 00 23 24 F4 FE 83 27 84 FE +63 98 07 02 97 C7 06 00 93 87 07 1A 03 A7 07 00 +83 27 44 FE 93 86 17 00 23 22 D4 FE 03 47 07 00 +93 87 07 FF B3 87 87 00 23 8E E7 FC 6F 00 80 12 +03 27 84 FE 93 07 30 06 63 DC E7 08 97 C7 06 00 +93 87 87 16 83 A7 07 00 83 26 84 FE 13 07 40 06 +33 C7 E6 02 33 87 E7 00 83 27 44 FE 93 86 17 00 +23 22 D4 FE 03 47 07 00 93 87 07 FF B3 87 87 00 +23 8E E7 FC 03 27 84 FE 93 07 40 06 B3 67 F7 02 +23 24 F4 FE 97 C7 06 00 93 87 07 12 83 A7 07 00 +83 26 84 FE 13 07 A0 00 33 C7 E6 02 33 87 E7 00 +83 27 44 FE 93 86 17 00 23 22 D4 FE 03 47 07 00 +93 87 07 FF B3 87 87 00 23 8E E7 FC 03 27 84 FE +93 07 A0 00 B3 67 F7 02 23 24 F4 FE 6F 00 80 05 +03 27 84 FE 93 07 90 00 63 D6 E7 04 97 C7 06 00 +93 87 87 0C 83 A7 07 00 83 26 84 FE 13 07 A0 00 +33 C7 E6 02 33 87 E7 00 83 27 44 FE 93 86 17 00 +23 22 D4 FE 03 47 07 00 93 87 07 FF B3 87 87 00 +23 8E E7 FC 03 27 84 FE 93 07 A0 00 B3 67 F7 02 +23 24 F4 FE 97 C7 06 00 93 87 07 08 03 A7 07 00 +83 27 84 FE 33 07 F7 00 83 27 44 FE 93 86 17 00 +23 22 D4 FE 03 47 07 00 93 87 07 FF B3 87 87 00 +23 8E E7 FC 83 27 C4 FE 93 87 17 00 23 26 F4 FE +03 27 C4 FE 93 07 30 00 E3 DE E7 E4 83 27 C4 FA +93 F7 07 01 63 98 07 02 6F 00 80 01 83 27 C4 FB +13 87 17 00 23 2E E4 FA 13 07 00 02 23 80 E7 00 +83 27 44 FB 13 87 F7 FF 23 2A E4 FA 03 27 44 FE +E3 4E F7 FC 23 26 04 FE 6F 00 00 03 83 27 C4 FB +13 87 17 00 23 2E E4 FA 03 27 C4 FE 13 07 07 FF +33 07 87 00 03 47 C7 FD 23 80 E7 00 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 44 FE +E3 46 F7 FC 6F 00 80 01 83 27 C4 FB 13 87 17 00 +23 2E E4 FA 13 07 00 02 23 80 E7 00 83 27 44 FB +13 87 F7 FF 23 2A E4 FA 03 27 44 FE E3 4E F7 FC +83 27 C4 FB 13 85 07 00 03 24 C1 05 13 01 01 06 +67 80 00 00 13 01 01 FB 23 26 11 04 23 24 81 04 +13 04 01 05 23 2E A4 FA 23 2C B4 FA 23 2A C4 FA +83 27 C4 FB 23 20 F4 FE 6F 00 40 5C 83 27 84 FB +03 C7 07 00 93 07 50 02 63 00 F7 02 03 27 84 FB +83 27 04 FE 93 86 17 00 23 20 D4 FE 03 47 07 00 +23 80 E7 00 6F 00 C0 58 23 2C 04 FC 83 27 84 FB +93 87 17 00 23 2C F4 FA 83 27 84 FB 83 C7 07 00 +93 87 07 FE 13 07 00 01 63 6C F7 06 13 97 27 00 +97 17 00 00 93 87 87 C3 B3 07 F7 00 03 A7 07 00 +97 17 00 00 93 87 87 C2 B3 07 F7 00 67 80 07 00 +83 27 84 FD 93 E7 07 01 23 2C F4 FC 6F F0 1F FB +83 27 84 FD 93 E7 47 00 23 2C F4 FC 6F F0 1F FA +83 27 84 FD 93 E7 87 00 23 2C F4 FC 6F F0 1F F9 +83 27 84 FD 93 E7 07 02 23 2C F4 FC 6F F0 1F F8 +83 27 84 FD 93 E7 17 00 23 2C F4 FC 6F F0 1F F7 +93 07 F0 FF 23 2A F4 FC 83 27 84 FB 03 C7 07 00 +93 07 F0 02 63 F4 E7 02 83 27 84 FB 03 C7 07 00 +93 07 90 03 63 EC E7 00 93 07 84 FB 13 85 07 00 +EF F0 8F E7 23 2A A4 FC 6F 00 40 05 83 27 84 FB +03 C7 07 00 93 07 A0 02 63 12 F7 04 83 27 84 FB +93 87 17 00 23 2C F4 FA 83 27 44 FB 13 87 47 00 +23 2A E4 FA 83 A7 07 00 23 2A F4 FC 83 27 44 FD +63 DE 07 00 83 27 44 FD B3 07 F0 40 23 2A F4 FC +83 27 84 FD 93 E7 07 01 23 2C F4 FC 93 07 F0 FF +23 28 F4 FC 83 27 84 FB 03 C7 07 00 93 07 E0 02 +63 10 F7 08 83 27 84 FB 93 87 17 00 23 2C F4 FA +83 27 84 FB 03 C7 07 00 93 07 F0 02 63 F4 E7 02 +83 27 84 FB 03 C7 07 00 93 07 90 03 63 EC E7 00 +93 07 84 FB 13 85 07 00 EF F0 0F DD 23 28 A4 FC +6F 00 40 03 83 27 84 FB 03 C7 07 00 93 07 A0 02 +63 12 F7 02 83 27 84 FB 93 87 17 00 23 2C F4 FA +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +23 28 F4 FC 83 27 04 FD 63 D4 07 00 23 28 04 FC +93 07 F0 FF 23 26 F4 FC 83 27 84 FB 03 C7 07 00 +93 07 C0 06 63 0A F7 00 83 27 84 FB 03 C7 07 00 +93 07 C0 04 63 1E F7 00 83 27 84 FB 83 C7 07 00 +23 26 F4 FC 83 27 84 FB 93 87 17 00 23 2C F4 FA +93 07 A0 00 23 22 F4 FE 83 27 84 FB 83 C7 07 00 +93 87 F7 FB 13 07 70 03 63 6E F7 28 13 97 27 00 +97 17 00 00 93 87 C7 A8 B3 07 F7 00 03 A7 07 00 +97 17 00 00 93 87 C7 A7 B3 07 F7 00 67 80 07 00 +83 27 84 FD 93 F7 07 01 63 98 07 02 6F 00 80 01 +83 27 04 FE 13 87 17 00 23 20 E4 FE 13 07 00 02 +23 80 E7 00 83 27 44 FD 93 87 F7 FF 23 2A F4 FC +83 27 44 FD E3 4E F0 FC 83 27 44 FB 13 87 47 00 +23 2A E4 FA 83 A6 07 00 83 27 04 FE 13 87 17 00 +23 20 E4 FE 13 F7 F6 0F 23 80 E7 00 6F 00 80 01 +83 27 04 FE 13 87 17 00 23 20 E4 FE 13 07 00 02 +23 80 E7 00 83 27 44 FD 93 87 F7 FF 23 2A F4 FC +83 27 44 FD E3 4E F0 FC 6F 00 80 2C 83 27 44 FB +13 87 47 00 23 2A E4 FA 83 A7 07 00 23 2E F4 FC +83 27 C4 FD 63 98 07 00 97 17 00 00 93 87 87 97 +23 2E F4 FC 83 27 04 FD 93 85 07 00 03 25 C4 FD +EF F0 4F BE 93 07 05 00 23 24 F4 FC 83 27 84 FD +93 F7 07 01 63 98 07 02 6F 00 80 01 83 27 04 FE +13 87 17 00 23 20 E4 FE 13 07 00 02 23 80 E7 00 +83 27 44 FD 13 87 F7 FF 23 2A E4 FC 03 27 84 FC +E3 4E F7 FC 23 24 04 FE 6F 00 00 03 03 27 C4 FD +93 07 17 00 23 2E F4 FC 83 27 04 FE 93 86 17 00 +23 20 D4 FE 03 47 07 00 23 80 E7 00 83 27 84 FE +93 87 17 00 23 24 F4 FE 03 27 84 FE 83 27 84 FC +E3 46 F7 FC 6F 00 80 01 83 27 04 FE 13 87 17 00 +23 20 E4 FE 13 07 00 02 23 80 E7 00 83 27 44 FD +13 87 F7 FF 23 2A E4 FC 03 27 84 FC E3 4E F7 FC +6F 00 00 1E 03 27 44 FD 93 07 F0 FF 63 1C F7 00 +93 07 80 00 23 2A F4 FC 83 27 84 FD 93 E7 17 00 +23 2C F4 FC 83 27 44 FB 13 87 47 00 23 2A E4 FA +83 A7 07 00 93 85 07 00 83 27 84 FD 03 27 04 FD +83 26 44 FD 13 06 00 01 03 25 04 FE EF F0 CF BD +23 20 A4 FE 6F 00 C0 18 83 27 84 FD 93 E7 07 04 +23 2C F4 FC 03 27 C4 FC 93 07 C0 06 63 1A F7 02 +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +03 27 84 FD 83 26 04 FD 03 26 44 FD 93 85 07 00 +03 25 04 FE EF F0 0F F2 23 20 A4 FE 6F 00 40 14 +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +03 27 84 FD 83 26 04 FD 03 26 44 FD 93 85 07 00 +03 25 04 FE EF F0 5F 8B 23 20 A4 FE 6F 00 40 11 +93 07 80 00 23 22 F4 FE 6F 00 C0 08 83 27 84 FD +93 E7 07 04 23 2C F4 FC 93 07 00 01 23 22 F4 FE +6F 00 40 07 83 27 84 FD 93 E7 27 00 23 2C F4 FC +6F 00 00 06 83 27 84 FB 03 C7 07 00 93 07 50 02 +63 0C F7 00 83 27 04 FE 13 87 17 00 23 20 E4 FE +13 07 50 02 23 80 E7 00 83 27 84 FB 83 C7 07 00 +63 80 07 02 03 27 84 FB 83 27 04 FE 93 86 17 00 +23 20 D4 FE 03 47 07 00 23 80 E7 00 6F 00 40 09 +83 27 84 FB 93 87 F7 FF 23 2C F4 FA 6F 00 40 08 +13 00 00 00 03 27 C4 FC 93 07 C0 06 63 1E F7 00 +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +23 26 F4 FE 6F 00 C0 03 83 27 84 FD 93 F7 27 00 +63 8E 07 00 83 27 44 FB 13 87 47 00 23 2A E4 FA +83 A7 07 00 23 26 F4 FE 6F 00 80 01 83 27 44 FB +13 87 47 00 23 2A E4 FA 83 A7 07 00 23 26 F4 FE +83 25 C4 FE 83 27 84 FD 03 27 04 FD 83 26 44 FD +03 26 44 FE 03 25 04 FE EF F0 0F A5 23 20 A4 FE +83 27 84 FB 93 87 17 00 23 2C F4 FA 83 27 84 FB +83 C7 07 00 E3 9C 07 A2 83 27 04 FE 23 80 07 00 +03 27 04 FE 83 27 C4 FB B3 07 F7 40 13 85 07 00 +83 20 C1 04 03 24 81 04 13 01 01 05 67 80 00 00 +13 01 01 FE 23 2E 81 00 13 04 01 02 93 07 05 00 +A3 07 F4 FE B7 07 10 00 93 87 07 01 03 47 F4 FE +23 A0 E7 00 13 00 00 00 03 24 C1 01 13 01 01 02 +67 80 00 00 13 01 01 BB 23 26 11 42 23 24 81 42 +13 04 01 43 23 2E A4 BC 23 22 B4 00 23 24 C4 00 +23 26 D4 00 23 28 E4 00 23 2A F4 00 23 2C 04 01 +23 2E 14 01 23 24 04 FE 93 07 04 02 23 2C F4 BC +83 27 84 BD 93 87 47 FE 23 22 F4 BE 03 27 44 BE +93 07 84 BE 13 06 07 00 83 25 C4 BD 13 85 07 00 +EF F0 5F 95 93 07 84 BE 23 26 F4 FE 6F 00 C0 02 +83 27 C4 FE 83 C7 07 00 13 85 07 00 EF F0 5F F5 +83 27 84 FE 93 87 17 00 23 24 F4 FE 83 27 C4 FE +93 87 17 00 23 26 F4 FE 83 27 C4 FE 83 C7 07 00 +E3 98 07 FC 83 27 84 FE 13 85 07 00 83 20 C1 42 +03 24 81 42 13 01 01 45 67 80 00 00 +@00014804 +53 74 61 74 69 63 00 00 48 65 61 70 00 00 00 00 +53 74 61 63 6B 00 00 00 36 6B 20 70 65 72 66 6F +72 6D 61 6E 63 65 20 72 75 6E 20 70 61 72 61 6D +65 74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 +72 6B 2E 0A 00 00 00 00 36 6B 20 76 61 6C 69 64 +61 74 69 6F 6E 20 72 75 6E 20 70 61 72 61 6D 65 +74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 72 +6B 2E 0A 00 50 72 6F 66 69 6C 65 20 67 65 6E 65 +72 61 74 69 6F 6E 20 72 75 6E 20 70 61 72 61 6D +65 74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 +72 6B 2E 0A 00 00 00 00 32 4B 20 70 65 72 66 6F +72 6D 61 6E 63 65 20 72 75 6E 20 70 61 72 61 6D +65 74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 +72 6B 2E 0A 00 00 00 00 32 4B 20 76 61 6C 69 64 +61 74 69 6F 6E 20 72 75 6E 20 70 61 72 61 6D 65 +74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 72 +6B 2E 0A 00 5B 25 75 5D 45 52 52 4F 52 21 20 6C +69 73 74 20 63 72 63 20 30 78 25 30 34 78 20 2D +20 73 68 6F 75 6C 64 20 62 65 20 30 78 25 30 34 +78 0A 00 00 5B 25 75 5D 45 52 52 4F 52 21 20 6D +61 74 72 69 78 20 63 72 63 20 30 78 25 30 34 78 +20 2D 20 73 68 6F 75 6C 64 20 62 65 20 30 78 25 +30 34 78 0A 00 00 00 00 5B 25 75 5D 45 52 52 4F +52 21 20 73 74 61 74 65 20 63 72 63 20 30 78 25 +30 34 78 20 2D 20 73 68 6F 75 6C 64 20 62 65 20 +30 78 25 30 34 78 0A 00 43 6F 72 65 4D 61 72 6B +20 53 69 7A 65 20 20 20 20 3A 20 25 6C 75 0A 00 +54 6F 74 61 6C 20 74 69 63 6B 73 20 20 20 20 20 +20 3A 20 25 6C 75 0A 00 54 6F 74 61 6C 20 74 69 +6D 65 20 28 73 65 63 73 29 3A 20 25 64 0A 00 00 +6E 75 6D 5F 63 6F 6E 74 65 78 74 73 20 20 20 3A +20 25 64 0A 00 00 00 00 49 74 65 72 61 74 69 6F +6E 73 20 20 20 3A 20 25 64 0A 00 00 49 74 65 72 +61 74 69 6F 6E 73 2F 53 65 63 20 20 20 3A 20 25 +64 0A 00 00 45 52 52 4F 52 21 20 4D 75 73 74 20 +65 78 65 63 75 74 65 20 66 6F 72 20 61 74 20 6C +65 61 73 74 20 31 30 20 73 65 63 73 20 66 6F 72 +20 61 20 76 61 6C 69 64 20 72 65 73 75 6C 74 21 +0A 00 00 00 49 74 65 72 61 74 69 6F 6E 73 20 20 +20 20 20 20 20 3A 20 25 6C 75 0A 00 47 43 43 31 +31 2E 31 2E 30 00 00 00 43 6F 6D 70 69 6C 65 72 +20 76 65 72 73 69 6F 6E 20 3A 20 25 73 0A 00 00 +2D 4F 30 20 2D 67 20 20 20 00 00 00 43 6F 6D 70 +69 6C 65 72 20 66 6C 61 67 73 20 20 20 3A 20 25 +73 0A 00 00 53 54 41 43 4B 00 00 00 4D 65 6D 6F +72 79 20 6C 6F 63 61 74 69 6F 6E 20 20 3A 20 25 +73 0A 00 00 73 65 65 64 63 72 63 20 20 20 20 20 +20 20 20 20 20 3A 20 30 78 25 30 34 78 0A 00 00 +5B 25 64 5D 63 72 63 6C 69 73 74 20 20 20 20 20 +20 20 3A 20 30 78 25 30 34 78 0A 00 5B 25 64 5D +63 72 63 6D 61 74 72 69 78 20 20 20 20 20 3A 20 +30 78 25 30 34 78 0A 00 5B 25 64 5D 63 72 63 73 +74 61 74 65 20 20 20 20 20 20 3A 20 30 78 25 30 +34 78 0A 00 5B 25 64 5D 63 72 63 66 69 6E 61 6C +20 20 20 20 20 20 3A 20 30 78 25 30 34 78 0A 00 +43 6F 72 72 65 63 74 20 6F 70 65 72 61 74 69 6F +6E 20 76 61 6C 69 64 61 74 65 64 2E 20 53 65 65 +20 52 45 41 44 4D 45 2E 6D 64 20 66 6F 72 20 72 +75 6E 20 61 6E 64 20 72 65 70 6F 72 74 69 6E 67 +20 72 75 6C 65 73 2E 0A 00 00 00 00 45 72 72 6F +72 73 20 64 65 74 65 63 74 65 64 0A 00 00 00 00 +43 61 6E 6E 6F 74 20 76 61 6C 69 64 61 74 65 20 +6F 70 65 72 61 74 69 6F 6E 20 66 6F 72 20 74 68 +65 73 65 20 73 65 65 64 20 76 61 6C 75 65 73 2C +20 70 6C 65 61 73 65 20 63 6F 6D 70 61 72 65 20 +77 69 74 68 20 72 65 73 75 6C 74 73 20 6F 6E 20 +61 20 6B 6E 6F 77 6E 20 70 6C 61 74 66 6F 72 6D +2E 0A 00 00 35 30 31 32 00 00 00 00 31 32 33 34 +00 00 00 00 2D 38 37 34 00 00 00 00 2B 31 32 32 +00 00 00 00 33 35 2E 35 34 34 30 30 00 00 00 00 +2E 31 32 33 34 35 30 30 00 00 00 00 2D 31 31 30 +2E 37 30 30 00 00 00 00 2B 30 2E 36 34 34 30 30 +00 00 00 00 35 2E 35 30 30 65 2B 33 00 00 00 00 +2D 2E 31 32 33 65 2D 32 00 00 00 00 2D 38 37 65 +2B 38 33 32 00 00 00 00 2B 30 2E 36 65 2D 31 32 +00 00 00 00 54 30 2E 33 65 2D 31 46 00 00 00 00 +2D 54 2E 54 2B 2B 54 71 00 00 00 00 31 54 33 2E +34 65 34 7A 00 00 00 00 33 34 2E 30 65 2D 54 5E +00 00 00 00 50 E3 FF FF 0C E6 FF FF E0 E3 FF FF +2C E5 FF FF 60 E4 FF FF C0 E4 FF FF 84 E5 FF FF +D8 E5 FF FF F8 E6 FF FF 94 E6 FF FF A8 E6 FF FF +BC E6 FF FF D0 E6 FF FF E4 E6 FF FF 45 52 52 4F +52 3A 20 50 6C 65 61 73 65 20 6D 6F 64 69 66 79 +20 74 68 65 20 64 61 74 61 74 79 70 65 73 20 69 +6E 20 63 6F 72 65 5F 70 6F 72 74 6D 65 2E 68 21 +0A 00 00 00 30 31 32 33 34 35 36 37 38 39 61 62 +63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 +73 74 75 76 77 78 79 7A 00 00 00 00 30 31 32 33 +34 35 36 37 38 39 41 42 43 44 45 46 47 48 49 4A +4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A +00 00 00 00 3C 4E 55 4C 4C 3E 00 00 08 F4 FF FF +38 F4 FF FF 38 F4 FF FF 18 F4 FF FF 38 F4 FF FF +38 F4 FF FF 38 F4 FF FF 38 F4 FF FF 38 F4 FF FF +38 F4 FF FF 38 F4 FF FF F8 F3 FF FF 38 F4 FF FF +E8 F3 FF FF 38 F4 FF FF 38 F4 FF FF 28 F4 FF FF +5C F7 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF E0 F7 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +68 F7 FF FF 08 F8 FF FF 94 F5 FF FF F8 F7 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +F8 F7 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF D4 F7 FF FF 08 F7 FF FF +08 F8 FF FF 08 F8 FF FF 20 F6 FF FF 08 F8 FF FF +64 F8 FF FF 08 F8 FF FF 08 F8 FF FF EC F7 FF FF +@00080000 +B0 D4 40 33 79 6A 14 E7 C1 E3 00 00 52 BE 99 11 +08 56 D7 1F 47 07 00 00 47 5E BF 39 A4 E5 3A 8E +84 8D 00 00 04 48 01 00 0C 48 01 00 14 48 01 00 +38 4C 01 00 40 4C 01 00 48 4C 01 00 50 4C 01 00 +58 4C 01 00 64 4C 01 00 70 4C 01 00 7C 4C 01 00 +88 4C 01 00 94 4C 01 00 A0 4C 01 00 AC 4C 01 00 +B8 4C 01 00 C4 4C 01 00 D0 4C 01 00 DC 4C 01 00 +@00080070 +66 00 00 00 64 00 00 00 01 00 00 00 58 4D 01 00 +80 4D 01 00 diff --git a/test/apps/tests/coremark/Makefile b/test/apps/tests/coremark/Makefile index c2db7cc..f0d22ab 100644 --- a/test/apps/tests/coremark/Makefile +++ b/test/apps/tests/coremark/Makefile @@ -11,7 +11,7 @@ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. -# +# # Original Author: Shay Gal-on # Make sure the default target is to simply build and run the benchmark. @@ -22,39 +22,34 @@ run: $(OUTFILE) rerun score score: @echo "Check run1.log and run2.log for results." - @echo "See README.md for run and reporting rules." - -ifndef PORT_DIR -# Ports for a couple of common self hosted platforms -UNAME=$(shell if command -v uname 2> /dev/null; then uname ; fi) -ifneq (,$(findstring CYGWIN,$(UNAME))) -PORT_DIR=cygwin -endif -ifneq (,$(findstring Darwin,$(UNAME))) -PORT_DIR=macos -endif -ifneq (,$(findstring FreeBSD,$(UNAME))) -PORT_DIR=freebsd -endif -ifneq (,$(findstring Linux,$(UNAME))) -PORT_DIR=linux -endif -endif -ifndef PORT_DIR -$(error PLEASE define PORT_DIR! (e.g. make PORT_DIR=simple)) -endif + @echo "See README.md for run and reporting rules." + +PORT_DIR=barebones + vpath %.c $(PORT_DIR) +vpath %.S $(PORT_DIR) vpath %.h $(PORT_DIR) vpath %.mak $(PORT_DIR) include $(PORT_DIR)/core_portme.mak -ifndef ITERATIONS -ITERATIONS=0 -endif +ITERATIONS=10 + ifdef REBUILD FORCE_REBUILD=force_rebuild endif +# Select architecure and ABI +CFLAGS += -march=rv32im \ + -mabi=ilp32 \ + -O0 \ + -g \ + -I./ \ + -I./barebones \ + -I$(RISCV_CLIB) \ + -mcmodel=medany \ + -static \ + -std=gnu99 \ + CFLAGS += -DITERATIONS=$(ITERATIONS) CORE_FILES = core_list_join core_main core_matrix core_state core_util @@ -65,8 +60,9 @@ OUTNAME = coremark$(EXE) OUTFILE = $(OPATH)$(OUTNAME) LOUTCMD = $(OFLAG) $(OUTFILE) $(LFLAGS_END) OUTCMD = $(OUTFLAG) $(OUTFILE) $(LFLAGS_END) +CRT = ./crt0.S -HEADERS = coremark.h +HEADERS = coremark.h CHECK_FILES = $(ORIG_SRCS) $(HEADERS) $(OPATH): @@ -77,26 +73,42 @@ ifdef SEPARATE_COMPILE $(OPATH)$(PORT_DIR): $(MKDIR) $(OPATH)$(PORT_DIR) -compile: $(OPATH) $(OPATH)$(PORT_DIR) $(OBJS) $(HEADERS) -link: compile +compile: $(OPATH) $(OPATH)$(PORT_DIR) $(OBJS) $(HEADERS) +link: compile $(LD) $(LFLAGS) $(XLFLAGS) $(OBJS) $(LOUTCMD) - + @echo "Link NOT performed along with compile" + else -compile: $(OPATH) $(SRCS) $(HEADERS) - $(CC) $(CFLAGS) $(XCFLAGS) $(SRCS) $(OUTCMD) -link: compile +#$(PROJ_NAME).elf: compile + +compile: $(OPATH) $(SRCS) $(HEADERS) + $(RISCV_CC) -c $(CFLAGS) -o ctr0.o $(CRT) -D__ASSEMBLY__=1 + $(CC) $(CFLAGS) $(XCFLAGS) $(SRCS) ctr0.o $(OUTCMD) $(LDFLAGS) +link: compile @echo "Link performed along with compile" endif +######################################################## +all: $(OUTFILE) + $(RISCV_OBJCOPY) -O ihex $(PROJ_NAME).elf $(PROJ_NAME).hex + $(RISCV_OBJCOPY) -O binary $(PROJ_NAME).elf $(PROJ_NAME).bin + $(RISCV_OBJCOPY) -O verilog $(PROJ_NAME).elf $(PROJ_NAME).v + $(RISCV_OBJDUMP) -S -d $(PROJ_NAME).elf > $(PROJ_NAME).asm + @cp *.v ../ + $(RISCV_NM) *.elf > $(PROJ_NAME).symbols + @cp *.symbols ../ + @echo "done" +######################################################## + $(OUTFILE): $(SRCS) $(HEADERS) Makefile core_portme.mak $(EXTRA_DEPENDS) $(FORCE_REBUILD) $(MAKE) port_prebuild $(MAKE) link $(MAKE) port_postbuild .PHONY: rerun -rerun: +rerun: $(MAKE) XCFLAGS="$(XCFLAGS) -DPERFORMANCE_RUN=1" load run1.log $(MAKE) XCFLAGS="$(XCFLAGS) -DVALIDATION_RUN=1" load run2.log @@ -105,14 +117,14 @@ PARAM2=$(PORT_PARAMS) 0x3415 0x3415 0x66 $(ITERATIONS) PARAM3=$(PORT_PARAMS) 8 8 8 $(ITERATIONS) run1.log-PARAM=$(PARAM1) 7 1 2000 -run2.log-PARAM=$(PARAM2) 7 1 2000 +run2.log-PARAM=$(PARAM2) 7 1 2000 run3.log-PARAM=$(PARAM3) 7 1 1200 run1.log run2.log run3.log: load $(MAKE) port_prerun $(RUN) $(OUTFILE) $($(@)-PARAM) > $(OPATH)$@ $(MAKE) port_postrun - + .PHONY: gen_pgo_data gen_pgo_data: run3.log @@ -125,16 +137,17 @@ load: $(OUTFILE) .PHONY: clean clean: rm -f $(OUTFILE) $(OBJS) $(OPATH)*.log *.info $(OPATH)index.html $(PORT_CLEAN) + rm -f *.elf $(PROJ_NAME) *.map *.bin *.md5 *.hex *.v *.asm *.symbols .PHONY: force_rebuild force_rebuild: echo "Forcing Rebuild" - + .PHONY: check check: - md5sum -c coremark.md5 + md5sum -c coremark.md5 ifdef ETC # Targets related to testing and releasing CoreMark. Not part of the general release! include Makefile.internal -endif +endif diff --git a/test/apps/tests/coremark/README.md b/test/apps/tests/coremark/README.md index c2c2a37..4b6e6b3 100644 --- a/test/apps/tests/coremark/README.md +++ b/test/apps/tests/coremark/README.md @@ -1,402 +1,20 @@ +# Coremark -# Introduction +Coremark benchmark from [Github](https://github.com/eembc/coremark) -CoreMark's primary goals are simplicity and providing a method for testing only a processor's core features. For more information about EEMBC's comprehensive embedded benchmark suites, please see www.eembc.org. +To build the elf and binary file -For a more compute-intensive version of CoreMark that uses larger datasets and execution loops taken from common applications, please check out EEMBC's [CoreMark-PRO](https://www.github.com/eembc/coremark-pro) benchmark, also on GitHub. +``` +make all +``` -# Building and Running - -To build and run the benchmark, type +Printf is functional but time computed is wrong because the division result inferior to 0. -`> make` +Score: 444 coremark/MHz measured with 10 iterations in 0.45 ms @ 500 MHz -Full results are available in the files `run1.log` and `run2.log`. CoreMark result can be found in `run1.log`. - -## Cross Compiling - -For cross compile platforms please adjust `core_portme.mak`, `core_portme.h` (and possibly `core_portme.c`) according to the specific platform used. When porting to a new platform, it is recommended to copy one of the default port folders (e.g. `mkdir && cp linux/* `), adjust the porting files, and run: -~~~ -% make PORT_DIR= -~~~ - -## Make Targets -* `run` - Default target, creates `run1.log` and `run2.log`. -* `run1.log` - Run the benchmark with performance parameters, and output to `run1.log` -* `run2.log` - Run the benchmark with validation parameters, and output to `run2.log` -* `run3.log` - Run the benchmark with profile generation parameters, and output to `run3.log` -* `compile` - compile the benchmark executable -* `link` - link the benchmark executable -* `check` - test MD5 of sources that may not be modified -* `clean` - clean temporary files - -### Make flag: `ITERATIONS` -By default, the benchmark will run between 10-100 seconds. To override, use `ITERATIONS=N` -~~~ -% make ITERATIONS=10 -~~~ -Will run the benchmark for 10 iterations. It is recommended to set a specific number of iterations in certain situations e.g.: - -* Running with a simulator -* Measuring power/energy -* Timing cannot be restarted - -Minimum required run time: **Results are only valid for reporting if the benchmark ran for at least 10 secs!** - -### Make flag: `XCFLAGS` -To add compiler flags from the command line, use `XCFLAGS` e.g.: - -~~~ -% make XCFLAGS="-DMULTITHREAD=4 -DUSE_FORK" -~~~ - -### Make flag: `CORE_DEBUG` - -Define to compile for a debug run if you get incorrect CRC. - -~~~ -% make XCFLAGS="-DCORE_DEBUG=1" -~~~ - -### Make flag: `REBUILD` - -Force a rebuild of the executable. - -## Systems Without `make` -The following files need to be compiled: -* `core_list_join.c` -* `core_main.c` -* `core_matrix.c` -* `core_state.c` -* `core_util.c` -* `PORT_DIR/core_portme.c` - -For example: -~~~ -% gcc -O2 -o coremark.exe core_list_join.c core_main.c core_matrix.c core_state.c core_util.c simple/core_portme.c -DPERFORMANCE_RUN=1 -DITERATIONS=1000 -% ./coremark.exe > run1.log -~~~ -The above will compile the benchmark for a performance run and 1000 iterations. Output is redirected to `run1.log`. - -# Parallel Execution -Use `XCFLAGS=-DMULTITHREAD=N` where N is number of threads to run in parallel. Several implementations are available to execute in multiple contexts, or you can implement your own in `core_portme.c`. - -~~~ -% make XCFLAGS="-DMULTITHREAD=4 -DUSE_PTHREAD -pthread" -~~~ - -The above will compile the benchmark for execution on 4 cores, using POSIX Threads API. Forking is also supported: - -~~~ -% make XCFLAGS="-DMULTITHREAD=4 -DUSE_FORK" -~~~ - -Note: linking may fail on the previous command if your linker does not automatically add the `pthread` library. If you encounter `undefined reference` errors, please modify the `core_portme.mak` file for your platform, (e.g. `linux/core_portme.mak`) and add `-pthread` to the `LFLAGS_END` parameter. - -# Run Parameters for the Benchmark Executable -CoreMark's executable takes several parameters as follows (but only if `main()` accepts arguments): -1st - A seed value used for initialization of data. -2nd - A seed value used for initialization of data. -3rd - A seed value used for initialization of data. -4th - Number of iterations (0 for auto : default value) -5th - Reserved for internal use. -6th - Reserved for internal use. -7th - For malloc users only, ovreride the size of the input data buffer. - -The run target from make will run coremark with 2 different data initialization seeds. - -## Alternative parameters: -If not using `malloc` or command line arguments are not supported, the buffer size -for the algorithms must be defined via the compiler define `TOTAL_DATA_SIZE`. -`TOTAL_DATA_SIZE` must be set to 2000 bytes (default) for standard runs. -The default for such a target when testing different configurations could be: - -~~~ -% make XCFLAGS="-DTOTAL_DATA_SIZE=6000 -DMAIN_HAS_NOARGC=1" -~~~ - -# Submitting Results - -CoreMark results can be submitted on the web. Open a web browser and go to the [submission page](https://www.eembc.org/coremark/submit.php). After registering an account you may enter a score. - -# Run Rules -What is and is not allowed. - -## Required -1. The benchmark needs to run for at least 10 seconds. -2. All validation must succeed for seeds `0,0,0x66` and `0x3415,0x3415,0x66`, buffer size of 2000 bytes total. - * If not using command line arguments to main: -~~~ - % make XCFLAGS="-DPERFORMANCE_RUN=1" REBUILD=1 run1.log - % make XCFLAGS="-DVALIDATION_RUN=1" REBUILD=1 run2.log -~~~ -3. If using profile guided optimization, profile must be generated using seeds of `8,8,8`, and buffer size of 1200 bytes total. -~~~ - % make XCFLAGS="-DTOTAL_DATA_SIZE=1200 -DPROFILE_RUN=1" REBUILD=1 run3.log -~~~ -4. All source files must be compiled with the same flags. -5. All data type sizes must match size in bits such that: - * `ee_u8` is an unsigned 8-bit datatype. - * `ee_s16` is a signed 16-bit datatype. - * `ee_u16` is an unsigned 16-bit datatype. - * `ee_s32` is a signed 32-bit datatype. - * `ee_u32` is an unsigned 32-bit datatype. - -## Allowed - -1. Changing number of iterations -2. Changing toolchain and build/load/run options -3. Changing method of acquiring a data memory block -5. Changing the method of acquiring seed values -6. Changing implementation `in core_portme.c` -7. Changing configuration values in `core_portme.h` -8. Changing `core_portme.mak` - -## NOT ALLOWED -1. Changing of source file other then `core_portme*` (use `make check` to validate) - -# Reporting rules -Use the following syntax to report results on a data sheet: - -CoreMark 1.0 : N / C [/ P] [/ M] - -N - Number of iterations per second with seeds 0,0,0x66,size=2000) - -C - Compiler version and flags - -P - Parameters such as data and code allocation specifics - -* This parameter *may* be omitted if all data was allocated on the heap in RAM. -* This parameter *may not* be omitted when reporting CoreMark/MHz - -M - Type of parallel execution (if used) and number of contexts -* This parameter may be omitted if parallel execution was not used. - -e.g.: - -~~~ -CoreMark 1.0 : 128 / GCC 4.1.2 -O2 -fprofile-use / Heap in TCRAM / FORK:2 -~~~ -or -~~~ -CoreMark 1.0 : 1400 / GCC 3.4 -O4 -~~~ - -If reporting scaling results, the results must be reported as follows: - -CoreMark/MHz 1.0 : N / C / P [/ M] - -P - When reporting scaling results, memory parameter must also indicate memory frequency:core frequency ratio. -1. If the core has cache and cache frequency to core frequency ratio is configurable, that must also be included. - -e.g.: - -~~~ -CoreMark/MHz 1.0 : 1.47 / GCC 4.1.2 -O2 / DDR3(Heap) 30:1 Memory 1:1 Cache -~~~ - -# Log File Format -The log files have the following format - -~~~ -2K performance run parameters for coremark. (Run type) -CoreMark Size : 666 (Buffer size) -Total ticks : 25875 (platform dependent value) -Total time (secs) : 25.875000 (actual time in seconds) -Iterations/Sec : 3864.734300 (Performance value to report) -Iterations : 100000 (number of iterations used) -Compiler version : GCC3.4.4 (Compiler and version) -Compiler flags : -O2 (Compiler and linker flags) -Memory location : Code in flash, data in on chip RAM -seedcrc : 0xe9f5 (identifier for the input seeds) -[0]crclist : 0xe714 (validation for list part) -[0]crcmatrix : 0x1fd7 (validation for matrix part) -[0]crcstate : 0x8e3a (validation for state part) -[0]crcfinal : 0x33ff (iteration dependent output) -Correct operation validated. See README.md for run and reporting rules. (*Only when run is successful*) -CoreMark 1.0 : 6508.490622 / GCC3.4.4 -O2 / Heap (*Only on a successful performance run*) -~~~ - -# Theory of Operation - -This section describes the initial goals of CoreMark and their implementation. - -## Small and easy to understand - -* X number of source code lines for timed portion of the benchmark. -* Meaningful names for variables and functions. -* Comments for each block of code more than 10 lines long. - -## Portability - -A thin abstraction layer will be provided for I/O and timing in a separate file. All I/O and timing of the benchmark will be done through this layer. - -### Code / data size - -* Compile with gcc on x86 and make sure all sizes are according to requirements. -* If dynamic memory allocation is used, take total memory allocated into account as well. -* Avoid recursive functions and keep track of stack usage. -* Use the same memory block as data site for all algorithms, and initialize the data before each algorithm – while this means that initialization with data happens during the timed portion, it will only happen once during the timed portion and so have negligible effect on the results. - -## Controlled output - -This may be the most difficult goal. Compilers are constantly improving and getting better at analyzing code. To create work that cannot be computed at compile time and must be computed at run time, we will rely on two assumptions: - -* Some system functions (e.g. time, scanf) and parameters cannot be computed at compile time. In most cases, marking a variable volatile means the compiler is force to read this variable every time it is read. This will be used to introduce a factor into the input that cannot be precomputed at compile time. Since the results are input dependent, that will make sure that computation has to happen at run time. - -* Either a system function or I/O (e.g. scanf) or command line parameters or volatile variables will be used before the timed portion to generate data which is not available at compile time. Specific method used is not relevant as long as it can be controlled, and that it cannot be computed or eliminated by the compiler at compile time. E.g. if the clock() functions is a compiler stub, it may not be used. The derived values will be reported on the output so that verification can be done on a different machine. - -* We cannot rely on command line parameters since some embedded systems do not have the capability to provide command line parameters. All 3 methods above will be implemented (time based, scanf and command line parameters) and all 3 are valid if the compiler cannot determine the value at compile time. - -* It is important to note that The actual values that are to be supplied at run time will be standardized. The methodology is not intended to provide random data, but simply to provide controlled data that cannot be precomputed at compile time. - -* Printed results must be valid at run time. This will be used to make sure the computation has been executed. - -* Some embedded systems do not provide “printf” or other I/O functionality. All I/O will be done through a thin abstraction interface to allow execution on such systems (e.g. allow output via JTAG). - -## Key Algorithms - -### Linked List - -The following linked list structure will be used: - -~~~ -typedef struct list_data_s { - ee_s16 data16; - ee_s16 idx; -} list_data; - -typedef struct list_head_s { - struct list_head_s *next; - struct list_data_s *info; -} list_head; -~~~ - -While adding a level of indirection accessing the data, this structure is realistic and used in many embedded applications for small to medium lists. - -The list itself will be initialized on a block of memory that will be passed in to the initialization function. While in general linked lists use malloc for new nodes, embedded applications sometime control the memory for small data structures such as arrays and lists directly to avoid the overhead of system calls, so this approach is realistic. - -The linked list will be initialized such that 1/4 of the list pointers point to sequential areas in memory, and 3/4 of the list pointers are distributed in a non sequential manner. This is done to emulate a linked list that had add/remove happen for a while disrupting the neat order, and then a series of adds that are likely to come from sequential memory locations. - -For the benchmark itself: -- Multiple find operations are going to be performed. These find operations may result in the whole list being traversed. The result of each find will become part of the output chain. -- The list will be sorted using merge sort based on the data16 value, and then derive CRC of the data16 item in order for part of the list. The CRC will become part of the output chain. -- The list will be sorted again using merge sort based on the idx value. This sort will guarantee that the list is returned to the primary state before leaving the function, so that multiple iterations of the function will have the same result. CRC of the data16 for part of the list will again be calculated and become part of the output chain. - -The actual `data16` in each cell will be pseudo random based on a single 16b input that cannot be determined at compile time. In addition, the part of the list which is used for CRC will also be passed to the function, and determined based on an input that cannot be determined at run time. - -### Matrix Multiply - -This very simple algorithm forms the basis of many more complex algorithms. The tight inner loop is the focus of many optimizations (compiler as well as hardware based) and is thus relevant for embedded processing. - -The total available data space will be divided to 3 parts: -1. NxN matrix A. -2. NxN matrix B. -3. NxN matrix C. - -E.g. for 2K we will have 3 12x12 matrices (assuming data type of 32b 12(len)*12(wid)*4(size)*3(num) =1728 bytes). - -Matrix A will be initialized with small values (upper 3/4 of the bits all zero). -Matrix B will be initialized with medium values (upper half of the bits all zero). -Matrix C will be used for the result. - -For the benchmark itself: -- Multiple A by a constant into C, add the upper bits of each of the values in the result matrix. The result will become part of the output chain. -- Multiple A by column X of B into C, add the upper bits of each of the values in the result matrix. The result will become part of the output chain. -- Multiple A by B into C, add the upper bits of each of the values in the result matrix. The result will become part of the output chain. - -The actual values for A and B must be derived based on input that is not available at compile time. - -### State Machine - -This part of the code needs to exercise switch and if statements. As such, we will use a small Moore state machine. In particular, this will be a state machine that identifies string input as numbers and divides them according to format. - -The state machine will parse the input string until either a “,” separator or end of input is encountered. An invalid number will cause the state machine to return invalid state and a valid number will cause the state machine to return with type of number format (int/float/scientific). - -This code will perform a realistic task, be small enough to easily understand, and exercise the required functionality. The other option used in embedded systems is a mealy based state machine, which is driven by a table. The table then determines the number of states and complexity of transitions. This approach, however, tests mainly the load/store and function call mechanisms and less the handling of branches. If analysis of the final results shows that the load/store functionality of the processor is not exercised thoroughly, it may be a good addition to the benchmark (codesize allowing). - -For input, the memory block will be initialized with comma separated values of mixed formats, as well as invalid inputs. - -For the benchmark itself: -- Invoke the state machine on all of the input and count final states and state transitions. CRC of all final states and transitions will become part of the output chain. -- Modify the input at intervals (inject errors) and repeat the state machine operation. -- Modify the input back to original form. - -The actual input must be initialized based on data that cannot be determined at compile time. In addition the intervals for modification of the input and the actual modification must be based on input that cannot be determined at compile time. - -# Validation - -This release was tested on the following platforms: -* x86 cygwin and gcc 3.4 (Quad, dual and single core systems) -* x86 linux (Ubuntu/Fedora) and gcc (4.2/4.1) (Quad and single core systems) -* MIPS64 BE linux and gcc 3.4 16 cores system -* MIPS32 BE linux with CodeSourcery compiler 4.2-177 on Malta/Linux with a 1004K 3-core system -* PPC simulator with gcc 4.2.2 (No OS) -* PPC 64b BE linux (yellowdog) with gcc 3.4 and 4.1 (Dual core system) -* BF533 with VDSP50 -* Renesas R8C/H8 MCU with HEW 4.05 -* NXP LPC1700 armcc v4.0.0.524 -* NEC 78K with IAR v4.61 -* ARM simulator with armcc v4 - -# Memory Analysis - -Valgrind 3.4.0 used and no errors reported. - -# Balance Analysis - -Number of instructions executed for each function tested with cachegrind and found balanced with gcc and -O0. - -# Statistics - -Lines: -~~~ -Lines Blank Cmnts Source AESL -===== ===== ===== ===== ========== ======================================= - 469 66 170 251 627.5 core_list_join.c (C) - 330 18 54 268 670.0 core_main.c (C) - 256 32 80 146 365.0 core_matrix.c (C) - 240 16 51 186 465.0 core_state.c (C) - 165 11 20 134 335.0 core_util.c (C) - 150 23 36 98 245.0 coremark.h (C) - 1610 166 411 1083 2707.5 ----- Benchmark ----- (6 files) - 293 15 74 212 530.0 linux/core_portme.c (C) - 235 30 104 104 260.0 linux/core_portme.h (C) - 528 45 178 316 790.0 ----- Porting ----- (2 files) - -* For comparison, here are the stats for Dhrystone -Lines Blank Cmnts Source AESL -===== ===== ===== ===== ========== ======================================= - 311 15 242 54 135.0 dhry.h (C) - 789 132 119 553 1382.5 dhry_1.c (C) - 186 26 68 107 267.5 dhry_2.c (C) - 1286 173 429 714 1785.0 ----- C ----- (3 files) -~~~ - -# Credits -Many thanks to all of the individuals who helped with the development or testing of CoreMark including (Sorted by company name; note that company names may no longer be accurate as this was written in 2009). -* Alan Anderson, ADI -* Adhikary Rajiv, ADI -* Elena Stohr, ARM -* Ian Rickards, ARM -* Andrew Pickard, ARM -* Trent Parker, CAVIUM -* Shay Gal-On, EEMBC -* Markus Levy, EEMBC -* Peter Torelli, EEMBC -* Ron Olson, IBM -* Eyal Barzilay, MIPS -* Jens Eltze, NEC -* Hirohiko Ono, NEC -* Ulrich Drees, NEC -* Frank Roscheda, NEC -* Rob Cosaro, NXP -* Shumpei Kawasaki, RENESAS - -# Legal -Please refer to LICENSE.md in this repository for a description of your rights to use this code. - -# Copyright -Copyright © 2009 EEMBC All rights reserved. -CoreMark is a trademark of EEMBC and EEMBC is a registered trademark of the Embedded Microprocessor Benchmark Consortium. +To compute it: +``` +nb iteration / time measured * 1000 = score +score / frequency in MHz = coremark / MHz +``` diff --git a/test/apps/tests/coremark/barebones/core_portme.c b/test/apps/tests/coremark/barebones/core_portme.c index 30112ff..f79cca8 100644 --- a/test/apps/tests/coremark/barebones/core_portme.c +++ b/test/apps/tests/coremark/barebones/core_portme.c @@ -44,8 +44,12 @@ volatile ee_s32 seed5_volatile = 0; CORETIMETYPE barebones_clock() { -#error \ - "You must implement a method to measure time in barebones_clock()! This function should return current time.\n" + int cycle; + asm volatile("csrr %0, 0xC00" : "=r"(cycle)); + return cycle; + +// #error \ + // "You must implement a method to measure time in barebones_clock()! This function should return current time.\n" } /* Define : TIMER_RES_DIVIDER Divider to trade off timer resolution and total time that can be @@ -59,6 +63,7 @@ barebones_clock() #define MYTIMEDIFF(fin, ini) ((fin) - (ini)) #define TIMER_RES_DIVIDER 1 #define SAMPLE_TIME_IMPLEMENTATION 1 +#define CLOCKS_PER_SEC 1000000000 #define EE_TICKS_PER_SEC (CLOCKS_PER_SEC / TIMER_RES_DIVIDER) /** Define Host specific (POSIX), or target specific global time variables. */ @@ -129,8 +134,8 @@ ee_u32 default_num_contexts = 1; void portable_init(core_portable *p, int *argc, char *argv[]) { -#error \ - "Call board initialization routines in portable init (if needed), in particular initialize UART!\n" +// #error \ + // "Call board initialization routines in portable init (if needed), in particular initialize UART!\n" (void)argc; // prevent unused warning (void)argv; // prevent unused warning diff --git a/test/apps/tests/coremark/barebones/core_portme.h b/test/apps/tests/coremark/barebones/core_portme.h index b221363..13daa2f 100644 --- a/test/apps/tests/coremark/barebones/core_portme.h +++ b/test/apps/tests/coremark/barebones/core_portme.h @@ -19,6 +19,9 @@ Original Author: Shay Gal-on This file contains configuration constants required to execute on different platforms */ + +#include "stdlib.h" + #ifndef CORE_PORTME_H #define CORE_PORTME_H /************************/ @@ -28,21 +31,21 @@ Original Author: Shay Gal-on Define to 1 if the platform supports floating point. */ #ifndef HAS_FLOAT -#define HAS_FLOAT 1 +#define HAS_FLOAT 0 #endif /* Configuration : HAS_TIME_H Define to 1 if platform has the time.h header file, and implementation of functions thereof. */ #ifndef HAS_TIME_H -#define HAS_TIME_H 1 +#define HAS_TIME_H 0 #endif /* Configuration : USE_CLOCK Define to 1 if platform has the time.h header file, and implementation of functions thereof. */ #ifndef USE_CLOCK -#define USE_CLOCK 1 +#define USE_CLOCK 0 #endif /* Configuration : HAS_STDIO Define to 1 if the platform has stdio.h. @@ -177,7 +180,7 @@ typedef ee_u32 CORE_TICKS; 1 - platform does not support returning a value from main */ #ifndef MAIN_HAS_NORETURN -#define MAIN_HAS_NORETURN 0 +#define MAIN_HAS_NORETURN 1 #endif /* Variable : default_num_contexts diff --git a/test/apps/tests/coremark/barebones/core_portme.mak b/test/apps/tests/coremark/barebones/core_portme.mak index 8159469..9f31e04 100755 --- a/test/apps/tests/coremark/barebones/core_portme.mak +++ b/test/apps/tests/coremark/barebones/core_portme.mak @@ -11,9 +11,44 @@ # WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. # See the License for the specific language governing permissions and # limitations under the License. -# +# # Original Author: Shay Gal-on +########################################################################## +# RISCV toolchain +########################################################################## + +PROJ_NAME=$(shell basename $(CURDIR)) + +OPATH = ./ + +RISCV_NAME = riscv64-unknown-elf +RISCV_CC = $(RISCV_NAME)-gcc +RISCV_OBJCOPY = $(RISCV_NAME)-objcopy +RISCV_OBJDUMP = $(RISCV_NAME)-objdump +RISCV_NM = $(RISCV_NAME)-nm + +RISCV_CLIB="/opt/homebrew/Cellar/riscv-gnu-toolchain/main/riscv64-unknown-elf/include/" + +# Select architecure and ABI +CFLAGS += -march=rv32im \ + -mabi=ilp32 \ + -O0 \ + -g \ + -I./ \ + -I$(RISCV_CLIB) \ + -mcmodel=medany \ + -static \ + -std=gnu99 \ + +LDFLAGS += -nostartfiles \ + -e _start \ + -T linker.ld \ + -Wl,-Map,$(OPATH)/$(PROJ_NAME).map \ + -Wl,--print-memory-usage + +########################################################################## + #File : core_portme.mak # Flag : OUTFLAG @@ -21,33 +56,34 @@ OUTFLAG= -o # Flag : CC # Use this flag to define compiler to use -CC = gcc +# CC = gcc +CC = $(RISCV_CC) # Flag : LD # Use this flag to define compiler to use LD = gld # Flag : AS # Use this flag to define compiler to use -AS = gas +AS = $(RISCV_CC) # Flag : CFLAGS # Use this flag to define compiler options. Note, you can add compiler options from the command line using XCFLAGS="other flags" PORT_CFLAGS = -O0 -g FLAGS_STR = "$(PORT_CFLAGS) $(XCFLAGS) $(XLFLAGS) $(LFLAGS_END)" -CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" +CFLAGS = $(PORT_CFLAGS) -I$(PORT_DIR) -I. -DFLAGS_STR=\"$(FLAGS_STR)\" #Flag : LFLAGS_END -# Define any libraries needed for linking or other flags that should come at the end of the link line (e.g. linker scripts). +# Define any libraries needed for linking or other flags that should come at the end of the link line (e.g. linker scripts). # Note : On certain platforms, the default clock_gettime implementation is supported but requires linking of librt. -SEPARATE_COMPILE=1 +#SEPARATE_COMPILE=1 # Flag : SEPARATE_COMPILE # You must also define below how to create an object file, and how to link. -OBJOUT = -o -LFLAGS = -ASFLAGS = -OFLAG = -o -COUT = -c +OBJOUT = -o +LFLAGS = +ASFLAGS = -D__ASSEMBLY__=1 +OFLAG = -o +COUT = -c -LFLAGS_END = +LFLAGS_END = # Flag : PORT_SRCS -# Port specific source files can be added here +# Port specific source files can be added here # You may also need cvt.c if the fcvt functions are not provided as intrinsics by your compiler! PORT_SRCS = $(PORT_DIR)/core_portme.c $(PORT_DIR)/ee_printf.c vpath %.c $(PORT_DIR) @@ -63,7 +99,7 @@ LOAD = echo "Please set LOAD to the process of loading the executable to the fla RUN = echo "Please set LOAD to the process of running the executable (e.g. via jtag, or board reset)" OEXT = .o -EXE = .bin +EXE = .elf $(OPATH)$(PORT_DIR)/%$(OEXT) : %.c $(CC) $(CFLAGS) $(XCFLAGS) $(COUT) $< $(OBJOUT) $@ @@ -71,17 +107,16 @@ $(OPATH)$(PORT_DIR)/%$(OEXT) : %.c $(OPATH)%$(OEXT) : %.c $(CC) $(CFLAGS) $(XCFLAGS) $(COUT) $< $(OBJOUT) $@ -$(OPATH)$(PORT_DIR)/%$(OEXT) : %.s - $(AS) $(ASFLAGS) $< $(OBJOUT) $@ +$(OPATH)$(PORT_DIR)/%$(OEXT) : %.S + $(RISCV_CC) -c $(CFLAGS) -o $@ $^ -D__ASSEMBLY__=1 # Target : port_pre% and port_post% # For the purpose of this simple port, no pre or post steps needed. .PHONY : port_prebuild port_postbuild port_prerun port_postrun port_preload port_postload -port_pre% port_post% : +port_pre% port_post% : # FLAG : OPATH # Path to the output folder. Default - current folder. OPATH = ./ MKDIR = mkdir -p - diff --git a/test/apps/tests/coremark/barebones/crt0.S b/test/apps/tests/coremark/barebones/crt0.S new file mode 120000 index 0000000..00821c6 --- /dev/null +++ b/test/apps/tests/coremark/barebones/crt0.S @@ -0,0 +1 @@ +../../common/crt0.S \ No newline at end of file diff --git a/test/apps/tests/coremark/barebones/ee_printf.c b/test/apps/tests/coremark/barebones/ee_printf.c index f2d362d..e97c87f 100644 --- a/test/apps/tests/coremark/barebones/ee_printf.c +++ b/test/apps/tests/coremark/barebones/ee_printf.c @@ -27,6 +27,12 @@ limitations under the License. #define is_digit(c) ((c) >= '0' && (c) <= '9') +#define UART_ADDRESS 0x100008 +#define UART_STATUS (UART_ADDRESS + 0x0) +#define UART_CLKDIV (UART_STATUS + 0x4) +#define UART_TX (UART_STATUS + 0x8) +#define UART_RX (UART_STATUS + 0xC) + static char * digits = "0123456789abcdefghijklmnopqrstuvwxyz"; static char * upper_digits = "0123456789ABCDEFGHIJKLMNOPQRSTUVWXYZ"; static ee_size_t strnlen(const char *s, ee_size_t count); @@ -662,7 +668,9 @@ ee_vsprintf(char *buf, const char *fmt, va_list args) void uart_send_char(char c) { -#error "You must implement the method uart_send_char to use this file!\n"; + *((volatile int*) UART_TX) = c; + +// #error "You must implement the method uart_send_char to use this file!\n"; /* Output of a char to a UART usually follows the following model: Wait until UART is ready Write char to UART diff --git a/test/apps/tests/coremark/core_main.c b/test/apps/tests/coremark/core_main.c index a4beeb6..65780a2 100644 --- a/test/apps/tests/coremark/core_main.c +++ b/test/apps/tests/coremark/core_main.c @@ -366,6 +366,8 @@ for (i = 0; i < MULTITHREAD; i++) #else ee_printf("Total time (secs): %d\n", time_in_secs(total_time)); if (time_in_secs(total_time) > 0) + ee_printf("num_contexts : %d\n",default_num_contexts); + ee_printf("Iterations : %d\n",results[0].iterations); ee_printf("Iterations/Sec : %d\n", default_num_contexts * results[0].iterations / time_in_secs(total_time)); @@ -438,5 +440,6 @@ for (i = 0; i < MULTITHREAD; i++) /* And last call any target specific code for finalizing */ portable_fini(&(results[0].port)); + asm volatile("ebreak"); return MAIN_RETURN_VAL; } diff --git a/test/apps/tests/coremark/coremark.bin b/test/apps/tests/coremark/coremark.bin new file mode 100755 index 0000000000000000000000000000000000000000..2933825d40f5efc453089b43b4c5a2e7daf2f08a GIT binary patch literal 458884 zcmeI)4R9Q1o#*kEW~4U8U?mfx9B|3tv8|9eLXHz0VCzawxVIbyGEO8Nox2P?ODy1q{b-;-|5!G^gkh;nt>NY^?q|LB*)LO-Q zGqS9g`~9D%=S?2T4tG~ub@g>+YI?e#e)@Sn&r3hg)2$SOAV@R?K|!BHv%d97#PqFC zBJMv0`)<)beG;wu)+Z6_Tc5-_ecR`C+Fq}3eG;$Nw?2st`qn4$27T+3c%#1cNo>@& zJ}2yYpZQGF@bP=Q+U@#HpDvvV`i=|-ZQ5>HOl`faIkoxI&53wZEY*2xA+_z1*f zVscKGk9e9X>0lk8hx2wQ?wyRL1= zr;4%kSHjj<|BU;cdb-#=7>u^qu|z)K?85v!AG35Oo@fmU$CRFyFgVlJ_CS3+lNL{N zC7y4%c$&<>t~D40O$pTj#U0ppIb2rhs>IpV-DPnm@;>dUuNRxMN|(91^g82kwro`> zhU?1P7N5B#R7Q#ZaF>-|>Uc58w$Cgjl;&*mN6j%Sio3oc~f(0t2{P8yOi2AA@820^f$tF zO6yYgL>LrG;cQL%{XSpkRPXZTI?`0m^Vq|s+WaoL{C4CT#1-wkG}qSd$9mY$_E!RT=6x>E~&JNQ&;(JOrFX>xTjuQu%J{pk8^zuK(DW$j(@SK_HTH~ocBZLQ|m)QL;JhCeS1 zs&S~_O4_yJOEF8g;!T|_+IRF@mgV0Hxmks5sHq|gp>YB3) zY72{M3yagYmVV>%tuimi5mWme%NNV}s&i5wyO93KY!KTzv2eof0mpVf@5`loe^f56 z3|yNGg7>AiseaUz<@f`sq?KQMDg9-YUsPu1pnfyvfBW*Y@+q{aAG7wIJpNdrCw{3EsLy!dt7hSt2U(rD>ZzZFxz6;oS_ zM{VuA?pJZ$uj1-YT6Djf*Zpd~5Vi)Xx17~?cayb^SjWV9OZ!-Vskx9ZE?atH9Xaib z>wdE{P&*D%ohnP~CpW9yI&#{!V;%n3HanI(pSsSzt^TOZxG>uOrmIV?9;d#fG)DDy zXMTA(5r*rc_I|#Q&j+b(XXh1<+OpcIuJfG26edf{x+kjqW|vc!>$^24&)oS!OOIW1 zQE6Y4sjSD}n%Ww-@>{QTE+te4)wk=OGH`yZw^XTDYU6>m?QFl=w(?d9r*q16uTVN# z32*(T+NQ$KEEG=U%i(vaUN6|O=$u_^r!7cWnq0fy>bzaun?6uF>pj#4H=nh8b&%3= zb*i7Lb75e0Nmez-#>4V?W?kOa_@$=rQ=M{s;Y8H;>9_2CKNznb`=;gD zUnimK*tQQd;heHtG%h-3NP84Si6=p$tjPu*V1pr9>|#{na_@vsavxvwLFX zZsVhJ9oP8VoMP=^F#TlFogaDBj!Eju!1p8L7N0K*wN2ZOnZe1TF9YwSyty{DIQ^9M z{|&7h_Q9&l>VMVV{rL)WR&mAWQ_1*JYMUFAT%|U&==u!Tzv|jbN9ww`>c1Ti>^|j> zyM9+jX6VwITS|{Q5A~(iUs#_#Vd-0(zP)7Q9XF=3->GZQ>i76Yi_6C3x~9gPmfza= z)K})!54*4$qo|&zpRh90b=)~hn;&D=4U94`{zMboJ?E~P(bX^g9#^tf_UKJ{DMopztmw;T8LX#6od z>+?oSq{!VI32a~m3`U; zb4TYNl~?xkq`Mcp>wY~dhd+u9coTs_qbqvp`}gZ(%jOS*?WHG#s-)9GK*=B zlYg1=%q7B(cfnX z_{S46Jd+&nv^+-r#V(Dz=MpVR?eD&!ZhyP&@3QdM*X_T`_IF$O>ukT;-+ZE_&wjt% z{oZPIZDKzCr23@ru(ic`jd|xZ?$r2sW=?ZD%{$}g%v5=s)BI(w5Pq~(W0bj=!nwNk zX5ITO?2~qm!s^`Tc52+4?|12~Y%7iBb8Q}^c7C}VzlOo5G=^&~sLk4MZ#DVJvh&yz zQ%allnZ1F=-1_cN+)){Pb86nl(fD{mai_jhbYZerT6!CYOMPQ%&f>{lIkS40r^{jD z=T?p9_}b}7eIs0O*V$_Q>ndsa?$mtN#`V@W+S-P;r#~P5HZoKDnORDxjgPf!&YZWp zJ~2Obw4`+vZQHtnoo8!3HF3mjJ4^=Czbm>qsO($(zQ$?De!KU)#bsf}e*S9ns%iaB zgS6(td7swc^_GT)Y0YVDt$T_3yw;c-OEyl2`sDfS)*g9iO(OqlbM^tn_r#UKSZhh+ zrnvG{J#Q>Oc|qNg>!Xt*hWUL7SBf3SFdSwdh)!jooUUi)zY|T*l*?6 zK7L~IT=ss;o6Y4~H72{~y9sOe`FK?CPt@n_WYN{5+WgnH3-#AZo5nDs;riH?i=}Py zqG>C)%~h{=qIk~ws2#7o>e_IjwP9OpRv9W!`M~1Sy5;UQ&0HRO1KlU%7xn$>5Cz z>$^2Z(AwJP&m>3N)c+=|Uv>MELA$NNs(mg_e<8Gfc2RRk{mw1={#Mt}Zx?^-NwwqL z;@Fhhn%b}RhyEJlVf7lnKBj(qy{_|y)U}FN{co&)V6ig)Z;R&tZ_zc>AJ-py;i&8H z-Lbf=YR_x?c;#3}&wTk_Qy=Dq;Yt{tyR&3-tp2Cdqs8@=?ORJ5cAl{P9VgSDDaI?? zx0lxM%)9X4Q}}pg`+cQ#J3CzXFWQ>$&VJi2{m=C0+RezW$qw7gzx8=um+ zLKZU9ebw(jw&6^&?UUA*S>IOO|Km3({3mQ2UI@Et_8;4*@Q*3H`m^qu{VkU%{85E( za`$bmaod_+wq4`L=fihLec8L#s$b=Pebx3+?kjTP8`p{_HubR9oN`MiUeS2-iRT}) zahtUnTfa}YmeyxKFys2M{Hn^o|DVr7ecVMYPS;xe;cK@zz0%?X zjV*Tn{h8zoxBs(PsJr>=}gad0N|<3Y*+>r+h;zf2^>5H~VA9-(|;a z4(rn}dAp^d8ur*rs!unnKd-sgkF~FFyY=<{ocwKe&RAUQXa0IOS)5~2XPc|>{P@2s zJ)P0<8xxkE@OYqgq-LMq-FAFiwtb+wHmG|?ty#_W{=i+&#@UtpyYsI-p+2^7tmSW` zIR94Vzct$TQnb(VvnAU1OTVwhJT_pJXgsssyDsJPpHS1K=Z`u4O zx~B5hcXhU5nNPmMmHFP1o4dGi&TG1s?-y#W_1}~~d&W{3bJx_bx7S}wZS^%>%eT9l zYrP=fw#L`$-BiBTrMvaIc3q9X!n*y zx#wXCTj$p^F}siG-fiO~JrC2iU)Rv~WVBvn`+I|E%|+XJ|4hi9k?A>&#yWbwt9zc- z9<*k&l-0UJY>S=`2jekoQ|?%QZo%rQf8HBBZ2R3cwcqm5VBK@gHC~ryt-D(}$$G)A zVe?kE9`BxoYoFbRxAbWJf5M)%JfL(g*!@>&TvQs%`|r>=&W-!4`+|2?)2(u>qZ)5ejcd+o=eFDW|DxT`Y`kyR*1WgPuCMPm>X=K%4(pryOS|lTXY<>gVUvxA-E$0` z+pX*Cnmr4Z`f1%PE@1JbPWtn#eQV9X_POH)b;Lb$)N?#rzjSp&Yus+_&aF{& zZ?HL`=7Q^EN{5xdclG(UdAHK3daE(E^H4$w0n67?`UR~;_75oUr>o_q z`9`#E8ngWByrr?zMZH5&+E`OI7mkO_#?{dYzs{~YXLgo8|LiXAjotH7pKk5{o%QJr zOzNL8Y*V|@^Q=N%eYCxY;GbQt^L4jdYc`g@iAC?A^t$?I^{dC#A$zyL+H6eE;ImtO z*s&+Heq(vFH2|4ujeXI!cZ9Dr`?6YDCngq^-Z@>z=R@_Wd|mB-)#hl?yBBLdJBpqs zM|l{1ozKH)SdQz$Jos{Rd05#t{IkZUi=CS|(dypa@olU@z8+d7Uk_b+zN*g~tsl`^ zo9ho;UG#m8p07oHjeEWk)l*+S-&WaNVi{VQ`93UODcc>Pm8HtX>b{j@sB+A|60BN| zA6+HCdrN08wH#OE_cEWiK+n$_)x{MKzOPmLT{~>{0+*iE>$blaG-w0$PO+%|?`Vzc zzpNU&_4s;T=_^(L_t`V}2K8sJ^`Y{&KD4%7>@EGn@8>z1h}y+v7c;WwO#a^0{f7Fm zjji06=Mt>c7c~2KJ1$a2>SHZVyC)Q;I=T}j^}BAnzgvA~sJ^IKea$NMyIL<2*0;HP zL<9E$^^=XN!%Yo*{)=51dPFdv>nSqO}=&2eDQCWM28n zYdrcEdp@Exy;{*M_a!xk$z8@ZsyELfn70S;+zT?&xU3)C=)7rV-kx^Rf z!ue;+we`lH`%KRjwbnTrPlP>M>x|D=))a&8J5!rZsjrt&O*|TpYs}p)_xk;M)}k>= zd_Fs=Ir&qTCZBFwN45Pi?JtDm&FN+vmnhuxD#!kTb1FkUbz=ZmC+(e&zOXscmg=XS;yv?Cj=`$S_g9PwS9ve~wCZ6rA5zSCwn!O_`KlN2_w*ID?eudkizDUPZpJs}k z=8;gj>p$y{|BI`$iZ}ZGH}?BsGf;f4J+3{Qj4t{e98?z|UX(d{u3;H;C!_iBRQn(%M+gy(i@RYt0$7PxH>rHR<_# zm!8kqJhCiMT6s?Q zMt`mE)t8;S)<A!Yy z>iwPibo8!B=Xm+=9is30zkjH08|C(6b=$X*wqW|o(oeL%=KVCa7k~e0*8OKiJFUL= z7qk0}_07L2+IypVHc)P3lV7WEW0NP!ZR~{lVYR`ZWmW&JU8|nAMEibP-8UNd`zC)< z-Paw9_WgBrU(oFL#YBB>xFu^|Cunp^h~SP80=dg zrBCljSl;rQFXne;!?TP2ec-(AE&1x-=d`-MP4^%Dt&ZZ0^}eY7NB5>HG>)?K^ICuG zwf;xJ!y&1G}Duv-9m(ws*$A$5=jB?=ri!OC3|1^j>llr=Hu|I*awO z{yg2&)Q?+V8&hBF#uT%~vo8FF{jT0+yG-jL{_jP~9`;U)^RRVNTc=jv9nMAJ&(L#x+fdl>%#eVvSxf%kL)zjn4cw`I*;)YrJMO=o7GUPvgfzD@LgEv5U2 z-M{6n^)-cQYHEtckt@!-=3Mo>@T+T_r*iV?imvhHnA&l){UvLcYUkZ+q_;9|u=g&k z|9EcdsrRTqIBD;xuQ;!^->F>J>PBkwvsxS0IKWKoeS=Y-Ppu)=+SHw6VQrja9xKAt zrAc!?d(NSK)-D70ZgF{BWO3No!@n1rQ=8V>^0t|UX?thPj_Ewh|5|;H<=f9Ig1DVy z?aYno@C>w&xI9%hlXFe$M(py+;m$mWu<6*Oo+gMp?51RZq)8bM7+_lEF&S=L*0~-g{o^SIk zm*y{9+I#%pU2K|BzvkbIOenvp&)S@RT=gKQd2`P>_2If!&dIPQpF5{IsQo><=ER&C+ci~(RR(dJlh3(!sWdB1X5M7aRAgoK`<#tCQ=Kz& zN|T$vSw39dzIJAAx_j35UG{gUHDT@E;^&7JpPX`GtFG@Yu6E<`+IV9Y*5+tFj4a=3 z>kD<)c44Brb!SZV&W<~S&KKumz3oxj-1VC5@2*y+Kh}Fwl&1RhuMFqxl^(@E=klpK zZ+6pn+q>;nH>&Bf{fRJK-Vx?)PJG_y*~(M(ZPU!s^!sLY&Luipy#5{>sxMv_^~LjQ zi}v?bt!j(z@2k`n=hYUqmNYXTdA!H9HGdz_v-{e1n15IKnAN#xzOQ%ebJ08ejq2XX zSn3P54wTb+eeS%C&8&YZ=`=uS~ld{Tx!+O~0e691v)Zgr|_%3pu>r*ub z*7el~_65_w&=|$Nmk>7Txp%p4o{#G0e6?=&XrJt_n{oBs%FO3E(BCsmRKi=l)pDC$ zjOwbN<3`uDG*0`!XRvlqId`pVxp2M=TU3Uvmr{nVT-@`S;LSRJjdFRp*_X>iUAaX4 zue}e@9My+6`}VPV*{Dul?rpnT(=Qd*`SbEuT3yL*HJk2Mt>raetc-me-K`pX+WU@6 z(e*E{#&a^b^mtAN<#?3779aQVK>bxbO5cY6(|Duwt@Az?=}TQ5p73=-Z7b&P$6dkn zuZlA&Cu?V~y)OE4UQrh(8q~%5>;7M?i>v;%Uw)v}>gIm!HW$hNC+knlU&9&u{a5ze zt*_XcMKNr$=dXja*XVloyVpIB)$e)#J74~-`<4rD_c#l0_b!E3`uy*bdl%II?NXE% zjf2kW`E4a{$7AW=7IlBmowt7X%q-oa&x+^q@j_iW7s8Wn-PgkV z@-Cg%+H5R+sB~?$yeI#nzPu+-*Ohl&8;bjJP;$oVO>{r+(K?p(=XUL$#p%0e?Yrv# zZ8NVquk@;W_TcZiHT&0yPhq#!#c5@#bx^ej`}_NHJw4&~#iPI3*E>P8_x#Z2c<-E`#~ys%GN)wa(OR?acg(V zhw7E;k^N0kZ8^zQc~%_p#hBu;czrw@f9K=rzT(otKlpE=@On<7^y|5U(qQe#+L}v4 zL4A(j->v87w!g#o2|-}FTq+AF4F3((iTaZ-A}ss&1;!Q(Ii; z=8on3yLMAkPpwY5IpessS=ANITioBFHVR|o#S8amw@hgKUM&kb>ODCti;dqh6Q3T} z|5;z@@}R#h{HEp6=C&$B8~>kI`*U+p&HGpW4Pj+YZ1vjaQO{|9rnyCv8_%C?IFJ4h zT4T6XYYew)jCz~KsNYX*dRA>>Liv4B{mhKjG5N=vQk_>c*;q`^C#}!^zS8)ELcZ7j zw)2Ovjvlq8+z%72s&88+evoke@q=HreUY2$lkz{QIl4dgPddNSChVB&_xu>xg`57G z{mpEyyoPeC);Mm}m~6L=$?hB3GqOJ&1b1Zi9M+WIey1PN_d6d+9?lHy9UMBi=TJJ6 z96E9+d3evzo`ac@%+PRB`;+Oxq0GTOLyvUo|N7&?e|*n@{R4_^@X$qq_YDp1-G3mH zd^mF`Gju5@DE=GY|Ju@{@RyvP4{bT};obM%d(XXZOCH!iJd#WgrITHcZt1$|(c}%u z;eCTg4h$q8%0#=A+nVqP_lykffApef)SWXd^326fxlOuvNjG`l{!e6*`uFbSmIFuD z2lo$->^YEBkv%eOdoS33Fq6D?IFlZJyTT7Bt%r^rd@wzDXe9IKh@BAa4TATo936el z-s--0+?PpLLq|4u9g$7u(MW{-Am?@HP={Z8+m9LfwIIWY1zs~pvM zEy4O1<)!zw+qQ4-+}_!xFt-gJJghn~l>E5rmsKH!8P>@++|!l3;bEOq8)ol;Jr76e zwlMeIzw5U5>-b%ngM&klB@YayeWfbLF`UT^SeaJ-y}Pz72R^K0uH60c>cJ0famS)E zwxbsu^JVEyyx`d0{fAUkD~_pLhcfAr_mAw0%5FHRV%U>>bA!L`{au|3vi)`!{{GJUufP8OkJw!Pz~&aTW2_kYB;`=*zdH@vdE{Ib5c{oV5NM`xCo$Mwl+`xpAm>DX8F`3rr% zug?qm%;@9l{kxNWUg+T9!2Z3D8DUbr+@6ug4rhjw`wzK(@Ifn`gPG2KuD**$d4A{4 zTi&(jq4Ypz@5B4{|H&f<4jvjj{IQ|oks}{J`siaWjn#0wZoRE%_wBuRy!UY=yOt^ztrd7>ocLx3;MjI&t8!Z=+mUn2k&YMM)mpM{{qe$ literal 0 HcmV?d00001 diff --git a/test/apps/tests/coremark/coremark.md5 b/test/apps/tests/coremark/coremark.md5 deleted file mode 100644 index 400ff02..0000000 --- a/test/apps/tests/coremark/coremark.md5 +++ /dev/null @@ -1,6 +0,0 @@ -9007fe7861b60ee6f210d156b62974c8 core_list_join.c -4a9e6dadce1ac3866381021fbe843fc9 core_main.c -5fa21a0f7c3964167c9691db531ca652 core_matrix.c -fb49e7605c125306575a83f14f5798ac core_state.c -45540ba2145adea1ec7ea2c72a1fbbcb core_util.c -8ca974c013b380dc7f0d6d1afb76eb2d coremark.h diff --git a/test/apps/tests/coremark/coremark.v b/test/apps/tests/coremark/coremark.v new file mode 100755 index 0000000..2f96d6d --- /dev/null +++ b/test/apps/tests/coremark/coremark.v @@ -0,0 +1,1276 @@ +@00010000 +93 00 00 00 13 01 00 00 93 01 00 00 13 02 00 00 +93 02 00 00 13 03 00 00 93 03 00 00 13 04 00 00 +13 04 00 00 93 04 00 00 13 05 00 00 93 05 00 00 +13 06 00 00 93 06 00 00 13 07 00 00 93 07 00 00 +13 08 00 00 93 08 00 00 93 09 00 00 13 0A 00 00 +93 0A 00 00 13 0B 00 00 93 0B 00 00 13 0C 00 00 +93 0C 00 00 13 0D 00 00 93 0D 00 00 13 0E 00 00 +93 0E 00 00 13 0F 00 00 93 0F 00 00 97 02 00 00 +93 82 82 01 73 90 52 30 17 01 00 00 13 01 81 F7 +EF 00 50 75 73 00 10 00 +@00010098 +13 01 01 FD 23 26 11 02 23 24 81 02 13 04 01 03 +23 2E A4 FC 23 2C B4 FC 83 27 C4 FD 83 D7 07 00 +23 15 F4 FE 83 17 A4 FE 93 D7 77 40 93 97 07 01 +93 D7 07 41 93 F7 F7 0F 93 F7 17 00 A3 04 F4 FE +83 47 94 FE 63 8C 07 00 83 57 A4 FE 93 F7 F7 07 +93 97 07 01 93 D7 07 41 6F 00 C0 18 83 57 A4 FE +93 F7 77 00 23 13 F4 FE 83 17 A4 FE 93 D7 37 40 +93 97 07 01 93 D7 07 41 93 F7 F7 00 23 16 F4 FE +83 17 C4 FE 93 97 47 00 93 97 07 01 93 D7 07 41 +03 57 C4 FE B3 E7 E7 00 23 16 F4 FE 83 17 64 FE +63 88 07 00 13 07 10 00 63 88 E7 06 6F 00 40 0B +03 17 C4 FE 93 07 10 02 63 C6 E7 00 93 07 20 02 +23 16 F4 FE 83 27 84 FD 03 A5 87 01 83 27 84 FD +83 A5 47 01 83 27 84 FD 03 96 07 00 83 27 84 FD +83 96 27 00 83 27 84 FD 83 D7 87 03 03 17 C4 FE +EF 20 50 0A 93 07 05 00 23 17 F4 FE 83 27 84 FD +83 D7 E7 03 63 94 07 06 03 57 E4 FE 83 27 84 FD +23 9F E7 02 6F 00 80 05 83 27 84 FD 13 87 87 02 +83 27 84 FD 83 D6 87 03 83 17 C4 FE 13 86 06 00 +93 85 07 00 13 05 07 00 EF 10 10 56 93 07 05 00 +23 17 F4 FE 83 27 84 FD 83 D7 C7 03 63 94 07 02 +03 57 E4 FE 83 27 84 FD 23 9E E7 02 6F 00 80 01 +83 57 A4 FE 23 17 F4 FE 6F 00 00 01 13 00 00 00 +6F 00 80 00 13 00 00 00 03 57 E4 FE 83 27 84 FD +83 D7 87 03 93 85 07 00 13 05 07 00 EF 30 40 30 +93 07 05 00 13 87 07 00 83 27 84 FD 23 9C E7 02 +83 57 E4 FE 93 F7 F7 07 23 17 F4 FE 83 57 A4 FE +93 F7 07 F0 93 97 07 01 93 D7 07 41 93 E7 07 08 +93 97 07 01 93 D7 07 41 03 57 E4 FE B3 E7 E7 00 +13 97 07 01 13 57 07 41 83 27 C4 FD 23 90 E7 00 +83 17 E4 FE 13 85 07 00 83 20 C1 02 03 24 81 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 11 02 +23 24 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 83 27 C4 FD 83 25 44 FD 13 85 07 00 +EF F0 1F DE 93 07 05 00 23 17 F4 FE 83 27 84 FD +83 25 44 FD 13 85 07 00 EF F0 9F DC 93 07 05 00 +23 16 F4 FE 03 17 E4 FE 83 17 C4 FE B3 07 F7 40 +13 85 07 00 83 20 C1 02 03 24 81 02 13 01 01 03 +67 80 00 00 13 01 01 FE 23 2E 81 00 13 04 01 02 +23 26 A4 FE 23 24 B4 FE 23 22 C4 FE 83 27 44 FE +63 9E 07 08 83 27 C4 FE 83 97 07 00 93 F7 07 F0 +13 97 07 01 13 57 07 41 83 27 C4 FE 83 97 07 00 +93 97 07 01 93 D7 07 01 93 D7 87 00 93 97 07 01 +93 D7 07 01 93 97 07 01 93 D7 07 41 B3 67 F7 00 +13 97 07 01 13 57 07 41 83 27 C4 FE 23 90 E7 00 +83 27 84 FE 83 97 07 00 93 F7 07 F0 13 97 07 01 +13 57 07 41 83 27 84 FE 83 97 07 00 93 97 07 01 +93 D7 07 01 93 D7 87 00 93 97 07 01 93 D7 07 01 +93 97 07 01 93 D7 07 41 B3 67 F7 00 13 97 07 01 +13 57 07 41 83 27 84 FE 23 90 E7 00 83 27 C4 FE +83 97 27 00 13 87 07 00 83 27 84 FE 83 97 27 00 +B3 07 F7 40 13 85 07 00 03 24 C1 01 13 01 01 02 +67 80 00 00 13 01 01 FE 23 2E 81 00 13 04 01 02 +23 26 A4 FE 23 24 B4 FE 83 27 84 FE 03 97 07 00 +83 27 C4 FE 23 90 E7 00 83 27 84 FE 03 97 27 00 +83 27 C4 FE 23 91 E7 00 13 00 00 00 03 24 C1 01 +13 01 01 02 67 80 00 00 13 01 01 FC 23 2E 11 02 +23 2C 81 02 13 04 01 04 23 26 A4 FC 93 87 05 00 +23 15 F4 FC 23 17 04 FE 23 16 04 FE 23 15 04 FE +83 27 C4 FC 83 A7 47 02 23 22 F4 FE 83 27 C4 FC +83 D7 47 00 23 1E F4 FC 23 28 04 FC 83 57 A4 FC +23 19 F4 FC 23 1F 04 FC 6F 00 80 17 83 57 E4 FD +93 F7 F7 0F 93 97 07 01 93 D7 07 41 23 18 F4 FC +93 07 04 FD 93 85 07 00 03 25 44 FE EF 00 80 73 +23 2A A4 FC 03 25 44 FE EF 00 00 7D 23 22 A4 FE +83 27 44 FD 63 98 07 04 83 57 A4 FE 93 87 17 00 +23 15 F4 FE 83 27 44 FE 83 A7 07 00 83 A7 47 00 +83 97 07 00 93 D7 87 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 17 00 93 97 07 01 +93 D7 07 01 03 57 E4 FE B3 87 E7 00 23 17 F4 FE +6F 00 80 0A 83 57 C4 FE 93 87 17 00 23 16 F4 FE +83 27 44 FD 83 A7 47 00 83 97 07 00 93 97 07 01 +93 D7 07 01 93 F7 17 00 63 8E 07 02 83 27 44 FD +83 A7 47 00 83 97 07 00 93 D7 97 40 93 97 07 01 +93 D7 07 41 93 97 07 01 93 D7 07 01 93 F7 17 00 +93 97 07 01 93 D7 07 01 03 57 E4 FE B3 87 E7 00 +23 17 F4 FE 83 27 44 FD 83 A7 07 00 63 8E 07 02 +83 27 44 FD 83 A7 07 00 23 20 F4 FE 83 27 04 FE +03 A7 07 00 83 27 44 FD 23 A0 E7 00 83 27 44 FE +03 A7 07 00 83 27 04 FE 23 A0 E7 00 83 27 44 FE +03 27 04 FE 23 A0 E7 00 83 17 24 FD 63 C4 07 02 +83 17 24 FD 93 97 07 01 93 D7 07 01 93 87 17 00 +93 97 07 01 93 D7 07 01 93 97 07 01 93 D7 07 41 +23 19 F4 FC 83 17 E4 FD 93 97 07 01 93 D7 07 01 +93 87 17 00 93 97 07 01 93 D7 07 01 23 1F F4 FC +03 17 E4 FD 83 17 C4 FD E3 42 F7 E8 83 57 C4 FE +93 97 27 00 93 97 07 01 93 D7 07 01 03 57 A4 FE +B3 87 E7 40 93 97 07 01 93 D7 07 01 03 57 E4 FE +B3 87 E7 00 23 17 F4 FE 83 17 A4 FC 63 5E F0 00 +03 26 C4 FC 97 05 00 00 93 85 45 C6 03 25 44 FE +EF 00 40 69 23 22 A4 FE 83 27 44 FE 83 A7 07 00 +13 85 07 00 EF 00 00 4A 23 2C A4 FC 93 07 04 FD +93 85 07 00 03 25 44 FE EF 00 C0 56 23 20 A4 FE +83 27 04 FE 63 92 07 04 83 27 44 FE 83 A7 07 00 +23 20 F4 FE 6F 00 40 03 83 27 44 FE 83 A7 47 00 +83 97 07 00 03 57 E4 FE 93 05 07 00 13 85 07 00 +EF 20 90 79 93 07 05 00 23 17 F4 FE 83 27 04 FE +83 A7 07 00 23 20 F4 FE 83 27 04 FE E3 96 07 FC +83 27 44 FE 83 A7 07 00 93 85 07 00 03 25 84 FD +EF 00 80 49 23 2C A4 FC 13 06 00 00 97 05 00 00 +93 85 85 C2 03 25 44 FE EF 00 C0 5E 23 22 A4 FE +83 27 44 FE 83 A7 07 00 23 20 F4 FE 6F 00 40 03 +83 27 44 FE 83 A7 47 00 83 97 07 00 03 57 E4 FE +93 05 07 00 13 85 07 00 EF 20 10 72 93 07 05 00 +23 17 F4 FE 83 27 04 FE 83 A7 07 00 23 20 F4 FE +83 27 04 FE E3 96 07 FC 83 57 E4 FE 13 85 07 00 +83 20 C1 03 03 24 81 03 13 01 01 04 67 80 00 00 +13 01 01 FB 23 26 11 04 23 24 81 04 13 04 01 05 +23 2E A4 FA 23 2C B4 FA 93 07 06 00 23 1B F4 FA +93 07 40 01 23 22 F4 FE 03 27 C4 FB 83 27 44 FE +B3 57 F7 02 93 87 E7 FF 23 20 F4 FE 03 27 84 FB +83 27 04 FE 93 97 37 00 B3 07 F7 00 23 2E F4 FC +83 27 C4 FD 23 24 F4 FC 03 27 84 FC 83 27 04 FE +93 97 27 00 B3 07 F7 00 23 2C F4 FC 83 27 84 FB +23 2A F4 FC 83 27 44 FD 23 A0 07 00 03 27 84 FC +83 27 44 FD 23 A2 E7 00 83 27 44 FD 83 A7 47 00 +23 91 07 00 83 27 44 FD 83 A7 47 00 37 87 FF FF +13 07 07 08 23 90 E7 00 83 27 84 FB 93 87 87 00 +23 2C F4 FA 83 27 84 FC 93 87 47 00 23 24 F4 FC +B7 87 FF FF 93 C7 F7 FF 23 13 F4 FC 93 07 F0 FF +23 12 F4 FC 93 06 84 FC 13 06 84 FB 93 05 44 FC +83 27 84 FD 03 27 C4 FD 03 25 44 FD EF 00 C0 1C +23 26 04 FE 6F 00 40 0A 83 27 C4 FE 13 97 07 01 +13 57 07 01 83 57 64 FB B3 47 F7 00 93 97 07 01 +93 D7 07 01 93 F7 F7 00 23 18 F4 FC 83 57 04 FD +93 97 37 00 13 97 07 01 13 57 07 01 83 27 C4 FE +93 97 07 01 93 D7 07 01 93 F7 77 00 93 97 07 01 +93 D7 07 01 B3 67 F7 00 23 17 F4 FC 83 57 E4 FC +93 97 87 00 13 97 07 01 13 57 07 41 83 17 E4 FC +B3 67 F7 00 93 97 07 01 93 D7 07 41 23 12 F4 FC +93 06 84 FC 13 06 84 FB 93 05 44 FC 83 27 84 FD +03 27 C4 FD 03 25 44 FD EF 00 00 13 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 04 FE +E3 6C F7 F4 83 27 44 FD 83 A7 07 00 23 24 F4 FE +93 07 10 00 23 26 F4 FE 6F 00 40 0C 03 27 04 FE +93 07 50 00 B3 57 F7 02 03 27 C4 FE 63 74 F7 02 +83 27 C4 FE 13 87 17 00 23 26 E4 FE 03 27 84 FE +03 27 47 00 93 97 07 01 93 D7 07 41 23 11 F7 00 +6F 00 00 08 83 27 C4 FE 13 87 17 00 23 26 E4 FE +13 97 07 01 13 57 07 01 83 57 64 FB B3 47 F7 00 +23 19 F4 FC 83 27 C4 FE 93 97 07 01 93 D7 07 01 +93 97 87 00 93 97 07 01 93 D7 07 01 93 F7 07 70 +93 97 07 01 93 D7 07 01 03 57 24 FD B3 E7 E7 00 +93 97 07 01 93 D7 07 01 93 96 07 01 93 D6 06 41 +83 27 84 FE 83 A7 47 00 37 47 00 00 13 07 F7 FF +33 F7 E6 00 13 17 07 01 13 57 07 41 23 91 E7 00 +83 27 84 FE 83 A7 07 00 23 24 F4 FE 83 27 84 FE +83 A7 07 00 E3 9C 07 F2 13 06 00 00 97 05 00 00 +93 85 85 92 03 25 44 FD EF 00 C0 2E 23 2A A4 FC +83 27 44 FD 13 85 07 00 83 20 C1 04 03 24 81 04 +13 01 01 05 67 80 00 00 13 01 01 FC 23 2E 11 02 +23 2C 81 02 13 04 01 04 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 E4 FC 23 24 F4 FC +83 27 44 FD 83 A7 07 00 93 87 87 00 03 27 C4 FC +63 E6 E7 00 93 07 00 00 6F 00 80 09 83 27 04 FD +83 A7 07 00 93 87 47 00 03 27 84 FC 63 E6 E7 00 +93 07 00 00 6F 00 C0 07 83 27 44 FD 83 A7 07 00 +23 26 F4 FE 83 27 44 FD 83 A7 07 00 13 87 87 00 +83 27 44 FD 23 A0 E7 00 83 27 C4 FD 03 A7 07 00 +83 27 C4 FE 23 A0 E7 00 83 27 C4 FD 03 27 C4 FE +23 A0 E7 00 83 27 04 FD 03 A7 07 00 83 27 C4 FE +23 A2 E7 00 83 27 04 FD 83 A7 07 00 13 87 47 00 +83 27 04 FD 23 A0 E7 00 83 27 C4 FE 83 A7 47 00 +83 25 84 FD 13 85 07 00 EF F0 DF 90 83 27 C4 FE +13 85 07 00 83 20 C1 03 03 24 81 03 13 01 01 04 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +23 2E A4 FC 83 27 C4 FD 83 A7 07 00 23 26 F4 FE +83 27 C4 FD 83 A7 47 00 23 24 F4 FE 83 27 C4 FE +03 A7 47 00 83 27 C4 FD 23 A2 E7 00 83 27 C4 FE +03 27 84 FE 23 A2 E7 00 83 27 C4 FD 83 A7 07 00 +03 A7 07 00 83 27 C4 FD 23 A0 E7 00 83 27 C4 FE +23 A0 07 00 83 27 C4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 23 2E A4 FC 23 2C B4 FC 83 27 C4 FD +83 A7 47 00 23 26 F4 FE 83 27 84 FD 03 A7 47 00 +83 27 C4 FD 23 A2 E7 00 83 27 84 FD 03 27 C4 FE +23 A2 E7 00 83 27 84 FD 03 A7 07 00 83 27 C4 FD +23 A0 E7 00 83 27 84 FD 03 27 C4 FD 23 A0 E7 00 +83 27 C4 FD 13 85 07 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FE 23 2E 81 00 13 04 01 02 +23 26 A4 FE 23 24 B4 FE 83 27 84 FE 83 97 27 00 +63 C4 07 04 6F 00 00 01 83 27 C4 FE 83 A7 07 00 +23 26 F4 FE 83 27 C4 FE 63 8E 07 00 83 27 C4 FE +83 A7 47 00 03 97 27 00 83 27 84 FE 83 97 27 00 +E3 1C F7 FC 83 27 C4 FE 6F 00 00 04 83 27 C4 FE +83 A7 07 00 23 26 F4 FE 83 27 C4 FE 63 84 07 02 +83 27 C4 FE 83 A7 47 00 83 97 07 00 93 97 07 01 +93 D7 07 01 93 F7 F7 0F 03 27 84 FE 03 17 07 00 +E3 96 E7 FC 83 27 C4 FE 13 85 07 00 03 24 C1 01 +13 01 01 02 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 23 2E A4 FC 23 26 04 FE 6F 00 C0 02 +83 27 C4 FD 83 A7 07 00 23 24 F4 FE 83 27 C4 FD +03 27 C4 FE 23 A0 E7 00 83 27 C4 FD 23 26 F4 FE +83 27 84 FE 23 2E F4 FC 83 27 C4 FD E3 9A 07 FC +83 27 C4 FE 13 85 07 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FB 23 26 11 04 23 24 81 04 +13 04 01 05 23 2E A4 FA 23 2C B4 FA 23 2A C4 FA +93 07 10 00 23 2E F4 FC 83 27 C4 FB 23 26 F4 FE +23 2E 04 FA 23 20 04 FE 23 2C 04 FC 6F 00 80 18 +83 27 84 FD 93 87 17 00 23 2C F4 FC 83 27 C4 FE +23 24 F4 FE 23 2A 04 FC 23 26 04 FC 6F 00 00 03 +83 27 44 FD 93 87 17 00 23 2A F4 FC 83 27 84 FE +83 A7 07 00 23 24 F4 FE 83 27 84 FE 63 80 07 02 +83 27 C4 FC 93 87 17 00 23 26 F4 FC 03 27 C4 FC +83 27 C4 FD E3 46 F7 FC 6F 00 80 00 13 00 00 00 +83 27 C4 FD 23 28 F4 FC 6F 00 C0 0F 83 27 44 FD +63 94 07 02 83 27 84 FE 23 22 F4 FE 83 27 84 FE +83 A7 07 00 23 24 F4 FE 83 27 04 FD 93 87 F7 FF +23 28 F4 FC 6F 00 80 0A 83 27 04 FD 63 86 07 00 +83 27 84 FE 63 94 07 02 83 27 C4 FE 23 22 F4 FE +83 27 C4 FE 83 A7 07 00 23 26 F4 FE 83 27 44 FD +93 87 F7 FF 23 2A F4 FC 6F 00 40 07 83 27 C4 FE +03 A7 47 00 83 27 84 FE 83 A7 47 00 83 26 84 FB +03 26 44 FB 93 85 07 00 13 05 07 00 E7 80 06 00 +93 07 05 00 63 44 F0 02 83 27 C4 FE 23 22 F4 FE +83 27 C4 FE 83 A7 07 00 23 26 F4 FE 83 27 44 FD +93 87 F7 FF 23 2A F4 FC 6F 00 40 02 83 27 84 FE +23 22 F4 FE 83 27 84 FE 83 A7 07 00 23 24 F4 FE +83 27 04 FD 93 87 F7 FF 23 28 F4 FC 83 27 04 FE +63 8A 07 00 83 27 04 FE 03 27 44 FE 23 A0 E7 00 +6F 00 C0 00 83 27 44 FE 23 2E F4 FA 83 27 44 FE +23 20 F4 FE 83 27 44 FD E3 42 F0 F0 83 27 04 FD +63 56 F0 00 83 27 84 FE E3 9A 07 EE 83 27 84 FE +23 26 F4 FE 83 27 C4 FE E3 9C 07 E6 83 27 04 FE +23 A0 07 00 03 27 84 FD 93 07 10 00 63 C6 E7 00 +83 27 C4 FB 6F 00 40 01 83 27 C4 FD 93 97 17 00 +23 2E F4 FC 6F F0 5F E3 13 85 07 00 83 20 C1 04 +03 24 81 04 13 01 01 05 67 80 00 00 13 01 01 FD +23 26 11 02 23 24 81 02 13 04 01 03 23 2E A4 FC +83 27 C4 FD 23 24 F4 FE 83 27 84 FE 83 A7 C7 01 +23 22 F4 FE 83 27 84 FE 23 9C 07 02 83 27 84 FE +23 9D 07 02 83 27 84 FE 23 9E 07 02 83 27 84 FE +23 9F 07 02 23 26 04 FE 6F 00 00 0A 93 05 10 00 +03 25 84 FE EF F0 4F CF 93 07 05 00 23 11 F4 FE +83 27 84 FE 03 D7 87 03 83 57 24 FE 93 05 07 00 +13 85 07 00 EF 20 C0 5D 93 07 05 00 13 87 07 00 +83 27 84 FE 23 9C E7 02 93 05 F0 FF 03 25 84 FE +EF F0 8F CB 93 07 05 00 23 11 F4 FE 83 27 84 FE +03 D7 87 03 83 57 24 FE 93 05 07 00 13 85 07 00 +EF 20 00 5A 93 07 05 00 13 87 07 00 83 27 84 FE +23 9C E7 02 83 27 C4 FE 63 9A 07 00 83 27 84 FE +03 D7 87 03 83 27 84 FE 23 9D E7 02 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 44 FE +E3 6E F7 F4 93 07 00 00 13 85 07 00 83 20 C1 02 +03 24 81 02 13 01 01 03 67 80 00 00 13 01 01 81 +23 26 11 7E 23 24 81 7E 23 22 91 7E 13 04 01 7F +13 01 01 F9 B7 F7 FF FF 93 87 07 FF B3 87 87 00 +23 AE A7 7A B7 F7 FF FF 93 87 07 FF B3 87 87 00 +23 AC B7 7A 23 16 04 FE 23 15 04 FE 93 07 F0 FF +23 14 F4 FE 23 13 04 FE 23 1B 04 FC B7 F7 FF FF +93 87 07 FF B3 87 87 00 37 F7 FF FF 13 07 C7 7B +13 07 07 FF B3 06 87 00 13 07 C4 F8 13 07 27 04 +03 A6 87 7B 93 85 06 00 13 05 07 00 EF 20 C0 76 +13 05 10 00 EF 20 C0 2E 93 07 05 00 93 97 07 01 +93 D7 07 41 23 16 F4 F8 13 05 20 00 EF 20 40 2D +93 07 05 00 93 97 07 01 93 D7 07 41 23 17 F4 F8 +13 05 30 00 EF 20 C0 2B 93 07 05 00 93 97 07 01 +93 D7 07 41 23 18 F4 F8 13 05 40 00 EF 20 40 2A +93 07 05 00 23 24 F4 FA 13 05 50 00 EF 20 40 29 +93 07 05 00 23 26 F4 FA 83 27 C4 FA 63 96 07 00 +93 07 70 00 23 26 F4 FA 83 17 C4 F8 63 92 07 02 +83 17 E4 F8 63 9E 07 00 83 17 04 F9 63 9A 07 00 +23 16 04 F8 23 17 04 F8 93 07 60 06 23 18 F4 F8 +03 17 C4 F8 93 07 10 00 63 1A F7 02 83 17 E4 F8 +63 96 07 02 83 17 04 F9 63 92 07 02 B7 37 00 00 +93 87 57 41 23 16 F4 F8 B7 37 00 00 93 87 57 41 +23 17 F4 F8 93 07 60 06 23 18 F4 F8 23 17 04 FE +6F 00 80 12 03 57 E4 FE 93 07 00 7D B3 07 F7 02 +93 86 07 00 03 57 E4 FE B7 F7 FF FF 93 87 C7 7C +93 87 07 FF B3 87 87 00 B3 86 D7 00 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 A2 D7 FA 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 13 07 00 7D 23 AA E7 FA 03 57 E4 FE +83 16 C4 F8 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 23 9E D7 F8 +03 57 E4 FE 83 16 E4 F8 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +23 9F D7 F8 03 57 E4 FE 83 16 04 F9 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 90 D7 FA 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 9E 07 FC 03 57 E4 FE 83 26 C4 FA +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 23 AE D7 FA 83 57 E4 FE +93 87 17 00 23 17 F4 FE 83 57 E4 FE E3 8C 07 EC +23 17 04 FE 6F 00 80 03 83 57 E4 FE 13 07 10 00 +B3 17 F7 00 13 87 07 00 83 27 C4 FA B3 77 F7 00 +63 88 07 00 83 57 A4 FE 93 87 17 00 23 15 F4 FE +83 57 E4 FE 93 87 17 00 23 17 F4 FE 03 57 E4 FE +93 07 20 00 E3 F2 E7 FC 23 17 04 FE 6F 00 80 05 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A6 47 FB +83 57 A4 FE 03 57 E4 FE B3 D6 F6 02 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 AA D7 FA 83 57 E4 FE 93 87 17 00 +23 17 F4 FE 83 57 E4 FE E3 84 07 FA 23 17 04 FE +6F 00 00 0B 83 57 E4 FE 13 07 10 00 B3 17 F7 00 +13 87 07 00 83 27 C4 FA B3 77 F7 00 63 84 07 08 +23 20 04 FE 6F 00 C0 06 03 27 04 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 03 A7 47 FA 83 26 44 FA 83 57 C4 FE +B3 87 F6 02 83 56 E4 FE 13 86 16 00 B3 06 F7 00 +03 27 04 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +B3 87 C7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +23 A2 D7 FA 83 27 04 FE 93 87 17 00 23 20 F4 FE +83 27 04 FE E3 8A 07 F8 83 57 C4 FE 93 87 17 00 +23 16 F4 FE 83 57 E4 FE 93 87 17 00 23 17 F4 FE +03 57 E4 FE 93 07 20 00 E3 F6 E7 F4 23 17 04 FE +6F 00 80 1E 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 A7 C7 FB 93 F7 17 00 63 8C 07 06 83 26 44 FA +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A5 87 FA +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 97 C7 F9 +83 54 E4 FE 13 86 07 00 13 85 06 00 EF F0 4F AE +13 07 05 00 93 87 04 00 93 97 47 00 B3 87 97 00 +93 97 27 00 93 87 07 FF B3 87 87 00 23 A0 E7 FC +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 C7 FB +93 F7 27 00 63 80 07 0A 03 25 44 FA 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A5 C7 FA 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 97 C7 F9 93 86 07 00 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 97 E7 F9 +93 97 07 01 33 E6 F6 00 03 57 E4 FE 93 06 C4 F8 +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 02 B3 87 F6 00 93 87 87 00 93 86 07 00 +EF 00 50 45 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 A7 C7 FB 93 F7 47 00 63 8A 07 04 83 26 44 FA +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 95 C7 F9 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 07 FB +13 86 07 00 13 85 06 00 EF 10 80 71 83 57 E4 FE +93 87 17 00 23 17 F4 FE 83 57 E4 FE E3 8C 07 E0 +83 27 84 FA 63 98 07 08 23 2E 04 FC 93 07 10 00 +23 24 F4 FA 6F 00 40 04 03 27 84 FA 93 07 07 00 +93 97 27 00 B3 87 E7 00 93 97 17 00 23 24 F4 FA +EF 20 00 0E 93 07 C4 F8 13 85 07 00 EF F0 1F 8C +EF 20 80 10 EF 20 C0 13 93 07 05 00 13 85 07 00 +EF 20 00 17 23 2E A4 FC 83 27 C4 FD E3 8E 07 FA +83 27 C4 FD 23 2C F4 FC 83 27 84 FD 63 96 07 00 +93 07 10 00 23 2C F4 FC 03 27 84 FA 93 06 A0 00 +83 27 84 FD B3 D7 F6 02 93 87 17 00 B3 07 F7 02 +23 24 F4 FA EF 20 C0 07 93 07 C4 F8 13 85 07 00 +EF F0 DF 85 EF 20 40 0A EF 20 80 0D 23 28 A4 FC +83 17 C4 F8 03 57 64 FD 93 05 07 00 13 85 07 00 +EF 10 90 79 93 07 05 00 23 1B F4 FC 83 17 E4 F8 +03 57 64 FD 93 05 07 00 13 85 07 00 EF 10 D0 77 +93 07 05 00 23 1B F4 FC 83 17 04 F9 03 57 64 FD +93 05 07 00 13 85 07 00 EF 10 10 76 93 07 05 00 +23 1B F4 FC 83 27 44 FA 93 97 07 01 93 D7 07 41 +03 57 64 FD 93 05 07 00 13 85 07 00 EF 10 D0 73 +93 07 05 00 23 1B F4 FC 83 57 64 FD 37 F7 00 00 +13 07 57 9F 63 80 E7 0A 37 F7 00 00 13 07 57 9F +63 42 F7 0C 37 97 00 00 13 07 27 A0 63 82 E7 04 +37 97 00 00 13 07 27 A0 63 46 F7 0A 37 87 00 00 +13 07 57 B0 63 80 E7 04 37 87 00 00 13 07 57 B0 +63 4A F7 08 37 27 00 00 13 07 27 8F 63 88 E7 06 +37 57 00 00 13 07 F7 EA 63 8A E7 02 6F 00 80 07 +23 14 04 FE 17 35 00 00 13 05 05 0B EF 20 90 7D +6F 00 00 07 93 07 10 00 23 14 F4 FE 17 35 00 00 +13 05 85 0C EF 20 10 7C 6F 00 80 05 93 07 20 00 +23 14 F4 FE 17 35 00 00 13 05 C5 0D EF 20 90 7A +6F 00 00 04 93 07 30 00 23 14 F4 FE 17 35 00 00 +13 05 85 0F EF 20 10 79 6F 00 80 02 93 07 40 00 +23 14 F4 FE 17 35 00 00 13 05 05 11 EF 20 90 77 +6F 00 00 01 93 07 F0 FF 23 13 F4 FE 13 00 00 00 +83 17 84 FE 63 C6 07 3A 23 17 04 FE 6F 00 00 39 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 23 9E 07 FC +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 C7 FB +93 F7 17 00 63 84 07 0E 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 03 D7 67 FD 83 17 84 FE 97 E6 06 00 +93 86 C6 79 93 97 17 00 B3 87 F6 00 83 D7 07 00 +63 06 F7 0A 83 55 E4 FE 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 D7 67 FD 13 86 07 00 83 17 84 FE +17 E7 06 00 13 07 87 75 93 97 17 00 B3 07 F7 00 +83 D7 07 00 93 86 07 00 17 35 00 00 13 05 85 04 +EF 20 50 68 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 97 C7 FD 93 97 07 01 93 D7 07 01 93 87 17 00 +93 97 07 01 93 D7 07 01 93 96 07 01 93 D6 06 41 +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 23 9E D7 FC 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A7 C7 FB 93 F7 27 00 +63 84 07 0E 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +03 D7 87 FD 83 17 84 FE 97 E6 06 00 93 86 C6 69 +93 97 17 00 B3 87 F6 00 83 D7 07 00 63 06 F7 0A +83 55 E4 FE 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 D7 87 FD 13 86 07 00 83 17 84 FE 17 E7 06 00 +13 07 87 65 93 97 17 00 B3 07 F7 00 83 D7 07 00 +93 86 07 00 17 35 00 00 13 05 C5 F6 EF 20 90 57 +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 97 C7 FD +93 97 07 01 93 D7 07 01 93 87 17 00 93 97 07 01 +93 D7 07 01 93 96 07 01 93 D6 06 41 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 23 9E D7 FC 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 A7 C7 FB 93 F7 47 00 63 84 07 0E +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 03 D7 A7 FD +83 17 84 FE 97 E6 06 00 93 86 C6 59 93 97 17 00 +B3 87 F6 00 83 D7 07 00 63 06 F7 0A 83 55 E4 FE +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 D7 A7 FD +13 86 07 00 83 17 84 FE 17 E7 06 00 13 07 87 55 +93 97 17 00 B3 07 F7 00 83 D7 07 00 93 86 07 00 +17 35 00 00 13 05 45 E9 EF 20 D0 46 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 97 C7 FD 93 97 07 01 +93 D7 07 01 93 87 17 00 93 97 07 01 93 D7 07 01 +93 96 07 01 93 D6 06 41 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +23 9E D7 FC 03 57 E4 FE 93 07 07 00 93 97 47 00 +B3 87 E7 00 93 97 27 00 93 87 07 FF B3 87 87 00 +83 97 C7 FD 13 97 07 01 13 57 07 01 83 57 64 FE +B3 07 F7 00 93 97 07 01 93 D7 07 01 23 13 F4 FE +83 57 E4 FE 93 87 17 00 23 17 F4 FE 03 57 E4 FE +97 E7 06 00 93 87 07 4F 83 A7 07 00 E3 62 F7 C6 +EF 10 90 2E 93 07 05 00 13 97 07 01 13 57 07 01 +83 57 64 FE B3 07 F7 00 93 97 07 01 93 D7 07 01 +23 13 F4 FE 83 27 44 FA 93 85 07 00 17 35 00 00 +13 05 85 DD EF 20 10 38 83 25 04 FD 17 35 00 00 +13 05 05 DE EF 20 10 37 03 25 04 FD EF 10 50 3B +93 07 05 00 93 85 07 00 17 35 00 00 13 05 C5 DD +EF 20 50 35 03 25 04 FD EF 10 90 39 93 07 05 00 +63 80 07 02 97 E7 06 00 93 87 C7 46 83 A7 07 00 +93 85 07 00 17 35 00 00 13 05 85 DC EF 20 90 32 +83 27 84 FA 93 85 07 00 17 35 00 00 13 05 C5 DC +EF 20 50 31 03 27 84 FA 97 E7 06 00 93 87 87 43 +83 A7 07 00 B3 04 F7 02 03 25 04 FD EF 10 50 34 +93 07 05 00 B3 D7 F4 02 93 85 07 00 17 35 00 00 +13 05 C5 DA EF 20 10 2E 03 25 04 FD EF 10 50 32 +13 07 05 00 93 07 90 00 63 E6 E7 02 17 35 00 00 +13 05 45 DA EF 20 10 2C 83 17 64 FE 93 97 07 01 +93 D7 07 01 93 87 17 00 93 97 07 01 93 D7 07 01 +23 13 F4 FE 03 27 84 FA 97 E7 06 00 93 87 87 3C +83 A7 07 00 B3 07 F7 02 93 85 07 00 17 35 00 00 +13 05 45 DA EF 20 10 28 97 35 00 00 93 85 05 DB +17 35 00 00 13 05 45 DB EF 20 D0 26 97 35 00 00 +93 85 05 DC 17 35 00 00 13 05 45 DC EF 20 90 25 +97 35 00 00 93 85 05 DD 17 35 00 00 13 05 05 DD +EF 20 50 24 83 57 64 FD 93 85 07 00 17 35 00 00 +13 05 45 DD EF 20 10 23 83 27 C4 FA 93 F7 17 00 +63 82 07 06 23 17 04 FE 6F 00 80 04 83 56 E4 FE +03 57 E4 FE 93 07 07 00 93 97 47 00 B3 87 E7 00 +93 97 27 00 93 87 07 FF B3 87 87 00 83 D7 67 FD +13 86 07 00 93 85 06 00 17 35 00 00 13 05 45 DA +EF 20 50 1E 83 57 E4 FE 93 87 17 00 23 17 F4 FE +03 57 E4 FE 97 E7 06 00 93 87 C7 2F 83 A7 07 00 +E3 66 F7 FA 83 27 C4 FA 93 F7 27 00 63 82 07 06 +23 17 04 FE 6F 00 80 04 83 56 E4 FE 03 57 E4 FE +93 07 07 00 93 97 47 00 B3 87 E7 00 93 97 27 00 +93 87 07 FF B3 87 87 00 83 D7 87 FD 13 86 07 00 +93 85 06 00 17 35 00 00 13 05 45 D5 EF 20 90 17 +83 57 E4 FE 93 87 17 00 23 17 F4 FE 03 57 E4 FE +97 E7 06 00 93 87 07 29 83 A7 07 00 E3 66 F7 FA +83 27 C4 FA 93 F7 47 00 63 82 07 06 23 17 04 FE +6F 00 80 04 83 56 E4 FE 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 D7 A7 FD 13 86 07 00 93 85 06 00 +17 35 00 00 13 05 45 D0 EF 20 D0 10 83 57 E4 FE +93 87 17 00 23 17 F4 FE 03 57 E4 FE 97 E7 06 00 +93 87 47 22 83 A7 07 00 E3 66 F7 FA 23 17 04 FE +6F 00 80 04 83 56 E4 FE 03 57 E4 FE 93 07 07 00 +93 97 47 00 B3 87 E7 00 93 97 27 00 93 87 07 FF +B3 87 87 00 83 D7 47 FD 13 86 07 00 93 85 06 00 +17 35 00 00 13 05 05 CC EF 20 D0 0A 83 57 E4 FE +93 87 17 00 23 17 F4 FE 03 57 E4 FE 97 E7 06 00 +93 87 47 1C 83 A7 07 00 E3 66 F7 FA 83 17 64 FE +63 98 07 00 17 35 00 00 13 05 85 CA EF 20 90 07 +83 17 64 FE 63 58 F0 00 17 35 00 00 13 05 05 CE +EF 20 50 06 83 17 64 FE 63 D8 07 00 17 35 00 00 +13 05 05 CE EF 20 10 05 93 07 C4 F8 93 87 27 04 +13 85 07 00 EF 10 90 0F 73 00 10 00 13 00 00 00 +13 01 01 07 83 20 C1 7E 03 24 81 7E 83 24 41 7E +13 01 01 7F 67 80 00 00 13 01 01 FC 23 2E 11 02 +23 2C 81 02 13 04 01 04 23 26 A4 FC 93 87 05 00 +13 07 06 00 23 15 F4 FC 93 07 07 00 23 14 F4 FC +83 27 C4 FC 83 A7 07 00 23 26 F4 FE 83 27 C4 FC +83 A7 C7 00 23 24 F4 FE 83 27 C4 FC 83 A7 47 00 +23 22 F4 FE 83 27 C4 FC 83 A7 87 00 23 20 F4 FE +83 57 A4 FC 23 1F F4 FC 83 17 E4 FD 13 87 07 00 +83 26 04 FE 03 26 44 FE 83 25 84 FE 03 25 C4 FE +EF 00 C0 03 93 07 05 00 13 87 07 00 83 57 84 FC +93 85 07 00 13 05 07 00 EF 10 00 67 93 07 05 00 +23 14 F4 FC 83 57 84 FC 13 85 07 00 83 20 C1 03 +03 24 81 03 13 01 01 04 67 80 00 00 13 01 01 FC +23 2E 11 02 23 2C 81 02 13 04 01 04 23 2E A4 FC +23 2C B4 FC 23 2A C4 FC 23 28 D4 FC 93 07 07 00 +23 17 F4 FC 23 17 04 FE 83 57 E4 FC 13 87 07 00 +B7 F7 FF FF B3 67 F7 00 23 16 F4 FE 83 17 E4 FC +13 86 07 00 83 25 44 FD 03 25 C4 FD EF 00 80 56 +83 17 E4 FC 93 86 07 00 03 26 44 FD 83 25 84 FD +03 25 C4 FD EF 00 80 48 83 17 C4 FE 13 86 07 00 +83 25 84 FD 03 25 C4 FD EF 00 00 36 93 07 05 00 +13 87 07 00 83 57 E4 FE 93 85 07 00 13 05 07 00 +EF 10 80 5B 93 07 05 00 23 17 F4 FE 83 26 04 FD +03 26 44 FD 83 25 84 FD 03 25 C4 FD EF 00 00 5E +83 17 C4 FE 13 86 07 00 83 25 84 FD 03 25 C4 FD +EF 00 80 31 93 07 05 00 13 87 07 00 83 57 E4 FE +93 85 07 00 13 05 07 00 EF 10 00 57 93 07 05 00 +23 17 F4 FE 83 26 04 FD 03 26 44 FD 83 25 84 FD +03 25 C4 FD EF 00 80 68 83 17 C4 FE 13 86 07 00 +83 25 84 FD 03 25 C4 FD EF 00 00 2D 93 07 05 00 +13 87 07 00 83 57 E4 FE 93 85 07 00 13 05 07 00 +EF 10 80 52 93 07 05 00 23 17 F4 FE 83 26 04 FD +03 26 44 FD 83 25 84 FD 03 25 C4 FD EF 00 00 79 +83 17 C4 FE 13 86 07 00 83 25 84 FD 03 25 C4 FD +EF 00 80 28 93 07 05 00 13 87 07 00 83 57 E4 FE +93 85 07 00 13 05 07 00 EF 10 00 4E 93 07 05 00 +23 17 F4 FE 83 57 E4 FC B3 07 F0 40 93 97 07 01 +93 D7 07 01 93 97 07 01 93 D7 07 41 13 86 07 00 +83 25 44 FD 03 25 C4 FD EF 00 C0 41 83 17 E4 FE +13 85 07 00 83 20 C1 03 03 24 81 03 13 01 01 04 +67 80 00 00 13 01 01 FC 23 2E 81 02 13 04 01 04 +23 26 A4 FC 23 24 B4 FC 23 22 C4 FC 23 20 D4 FC +23 20 04 FE 93 07 10 00 23 26 F4 FE 23 24 04 FE +23 22 04 FE 83 27 44 FC 63 96 07 02 93 07 10 00 +23 22 F4 FC 6F 00 00 02 83 27 84 FE 93 87 17 00 +23 24 F4 FE 83 27 84 FE B3 87 F7 02 93 97 37 00 +23 22 F4 FE 03 27 44 FE 83 27 C4 FC E3 6E F7 FC +83 27 84 FE 93 87 F7 FF 23 20 F4 FE 83 27 84 FC +93 87 F7 FF 93 F7 C7 FF 93 87 47 00 23 2E F4 FC +83 27 04 FE B3 87 F7 02 93 97 17 00 03 27 C4 FD +B3 07 F7 00 23 2C F4 FC 23 24 04 FE 6F 00 C0 10 +23 22 04 FE 6F 00 C0 0E 03 27 C4 FE 83 27 44 FC +33 07 F7 02 93 57 F7 41 93 D7 07 01 B3 06 F7 00 +37 07 01 00 13 07 F7 FF 33 F7 E6 00 B3 07 F7 40 +23 22 F4 FC 83 27 44 FC 13 97 07 01 13 57 07 01 +83 27 C4 FE 93 97 07 01 93 D7 07 01 B3 07 F7 00 +93 97 07 01 93 D7 07 01 23 1B F4 FC 03 27 84 FE +83 27 04 FE 33 07 F7 02 83 27 44 FE B3 07 F7 00 +93 97 17 00 03 27 84 FD B3 07 F7 00 03 57 64 FD +23 90 E7 00 83 27 C4 FE 13 97 07 01 13 57 07 01 +83 57 64 FD B3 07 F7 00 93 97 07 01 93 D7 07 01 +23 1B F4 FC 83 57 64 FD 93 F7 F7 0F 23 1B F4 FC +03 27 84 FE 83 27 04 FE 33 07 F7 02 83 27 44 FE +B3 07 F7 00 93 97 17 00 03 27 C4 FD B3 07 F7 00 +03 57 64 FD 23 90 E7 00 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 83 27 44 FE 93 87 17 00 23 22 F4 FE +03 27 44 FE 83 27 04 FE E3 68 F7 F0 83 27 84 FE +93 87 17 00 23 24 F4 FE 03 27 84 FE 83 27 04 FE +E3 68 F7 EE 83 27 04 FC 03 27 C4 FD 23 A2 E7 00 +83 27 04 FC 03 27 84 FD 23 A4 E7 00 83 27 04 FE +B3 87 F7 02 93 97 17 00 03 27 84 FD B3 07 F7 00 +93 87 F7 FF 93 F7 C7 FF 93 87 47 00 13 87 07 00 +83 27 04 FC 23 A6 E7 00 03 27 04 FE 83 27 04 FC +23 A0 E7 00 83 27 04 FE 13 85 07 00 03 24 C1 03 +13 01 01 04 67 80 00 00 13 01 01 FC 23 2E 81 02 +13 04 01 04 23 26 A4 FC 23 24 B4 FC 93 07 06 00 +23 13 F4 FC 23 26 04 FE 23 24 04 FE 23 2C 04 FC +23 13 04 FE 23 20 04 FE 6F 00 40 0C 23 2E 04 FC +6F 00 40 0A 03 27 04 FE 83 27 C4 FC 33 07 F7 02 +83 27 C4 FD B3 07 F7 00 93 97 27 00 03 27 84 FC +B3 07 F7 00 83 A7 07 00 23 2C F4 FC 03 27 C4 FE +83 27 84 FD B3 07 F7 00 23 26 F4 FE 83 17 64 FC +03 27 C4 FE 63 D0 E7 02 83 57 64 FE 93 87 A7 00 +93 97 07 01 93 D7 07 01 23 13 F4 FE 23 26 04 FE +6F 00 00 03 03 27 84 FD 83 27 84 FE B3 A7 E7 00 +93 F7 F7 0F 13 97 07 01 13 57 07 01 83 57 64 FE +B3 07 F7 00 93 97 07 01 93 D7 07 01 23 13 F4 FE +83 27 84 FD 23 24 F4 FE 83 27 C4 FD 93 87 17 00 +23 2E F4 FC 03 27 C4 FD 83 27 C4 FC E3 6C F7 F4 +83 27 04 FE 93 87 17 00 23 20 F4 FE 03 27 04 FE +83 27 C4 FC E3 6C F7 F2 83 17 64 FE 13 85 07 00 +03 24 C1 03 13 01 01 04 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 93 87 06 00 23 19 F4 FC 23 26 04 FE +6F 00 40 08 23 24 04 FE 6F 00 40 06 03 27 C4 FE +83 27 C4 FD 33 07 F7 02 83 27 84 FE B3 07 F7 00 +93 97 17 00 03 27 44 FD B3 07 F7 00 83 97 07 00 +13 86 07 00 03 17 24 FD 83 26 C4 FE 83 27 C4 FD +B3 86 F6 02 83 27 84 FE B3 87 F6 00 93 97 27 00 +83 26 84 FD B3 87 F6 00 33 07 E6 02 23 A0 E7 00 +83 27 84 FE 93 87 17 00 23 24 F4 FE 03 27 84 FE +83 27 C4 FD E3 6C F7 F8 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 03 27 C4 FE 83 27 C4 FD E3 6C F7 F6 +13 00 00 00 13 00 00 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +23 2E A4 FC 23 2C B4 FC 93 07 06 00 23 1B F4 FC +23 26 04 FE 6F 00 80 09 23 24 04 FE 6F 00 80 07 +03 27 C4 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 17 00 03 27 84 FD B3 07 F7 00 +83 97 07 00 13 97 07 01 13 57 07 01 83 57 64 FD +B3 07 F7 00 93 96 07 01 93 D6 06 01 03 27 C4 FE +83 27 C4 FD 33 07 F7 02 83 27 84 FE B3 07 F7 00 +93 97 17 00 03 27 84 FD B3 07 F7 00 13 97 06 01 +13 57 07 41 23 90 E7 00 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 83 27 C4 FD E3 62 F7 F8 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +83 27 C4 FD E3 62 F7 F6 13 00 00 00 13 00 00 00 +03 24 C1 02 13 01 01 03 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 04 FE 6F 00 00 0B +83 27 C4 FE 93 97 27 00 03 27 84 FD B3 07 F7 00 +23 A0 07 00 23 24 04 FE 6F 00 C0 07 83 27 C4 FE +93 97 27 00 03 27 84 FD B3 07 F7 00 83 A6 07 00 +03 27 C4 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 17 00 03 27 44 FD B3 07 F7 00 +83 97 07 00 13 86 07 00 83 27 84 FE 93 97 17 00 +03 27 04 FD B3 07 F7 00 83 97 07 00 33 07 F6 02 +83 27 C4 FE 93 97 27 00 03 26 84 FD B3 07 F6 00 +33 87 E6 00 23 A0 E7 00 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 83 27 C4 FD E3 60 F7 F8 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +83 27 C4 FD E3 66 F7 F4 13 00 00 00 13 00 00 00 +03 24 C1 02 13 01 01 03 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 04 FE 6F 00 00 11 +23 24 04 FE 6F 00 00 0F 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 84 FE B3 07 F7 00 93 97 27 00 +03 27 84 FD B3 07 F7 00 23 A0 07 00 23 22 04 FE +6F 00 C0 0A 03 27 C4 FE 83 27 C4 FD 33 07 F7 02 +83 27 84 FE B3 07 F7 00 93 97 27 00 03 27 84 FD +B3 07 F7 00 83 A6 07 00 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 44 FE B3 07 F7 00 93 97 17 00 +03 27 44 FD B3 07 F7 00 83 97 07 00 13 86 07 00 +03 27 44 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 17 00 03 27 04 FD B3 07 F7 00 +83 97 07 00 33 07 F6 02 03 26 C4 FE 83 27 C4 FD +33 06 F6 02 83 27 84 FE B3 07 F6 00 93 97 27 00 +03 26 84 FD B3 07 F6 00 33 87 E6 00 23 A0 E7 00 +83 27 44 FE 93 87 17 00 23 22 F4 FE 03 27 44 FE +83 27 C4 FD E3 68 F7 F4 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 83 27 C4 FD E3 66 F7 F0 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +83 27 C4 FD E3 66 F7 EE 13 00 00 00 13 00 00 00 +03 24 C1 02 13 01 01 03 67 80 00 00 13 01 01 FD +23 26 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +23 2A C4 FC 23 28 D4 FC 23 26 04 FE 6F 00 80 13 +23 24 04 FE 6F 00 80 11 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 84 FE B3 07 F7 00 93 97 27 00 +03 27 84 FD B3 07 F7 00 23 A0 07 00 23 22 04 FE +6F 00 40 0D 03 27 C4 FE 83 27 C4 FD 33 07 F7 02 +83 27 44 FE B3 07 F7 00 93 97 17 00 03 27 44 FD +B3 07 F7 00 83 97 07 00 93 86 07 00 03 27 44 FE +83 27 C4 FD 33 07 F7 02 83 27 84 FE B3 07 F7 00 +93 97 17 00 03 27 04 FD B3 07 F7 00 83 97 07 00 +B3 87 F6 02 23 20 F4 FE 03 27 C4 FE 83 27 C4 FD +33 07 F7 02 83 27 84 FE B3 07 F7 00 93 97 27 00 +03 27 84 FD B3 07 F7 00 83 A7 07 00 93 86 07 00 +83 27 04 FE 93 D7 27 40 13 F7 F7 00 83 27 04 FE +93 D7 57 40 93 F7 F7 07 B3 07 F7 02 B3 86 F6 00 +03 27 C4 FE 83 27 C4 FD 33 07 F7 02 83 27 84 FE +B3 07 F7 00 93 97 27 00 03 27 84 FD B3 07 F7 00 +13 87 06 00 23 A0 E7 00 83 27 44 FE 93 87 17 00 +23 22 F4 FE 03 27 44 FE 83 27 C4 FD E3 64 F7 F2 +83 27 84 FE 93 87 17 00 23 24 F4 FE 03 27 84 FE +83 27 C4 FD E3 62 F7 EE 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 03 27 C4 FE 83 27 C4 FD E3 62 F7 EC +13 00 00 00 13 00 00 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 F9 23 26 11 06 23 24 81 06 +13 04 01 07 23 2E A4 F8 23 2C B4 F8 93 05 06 00 +13 86 06 00 93 06 07 00 13 87 07 00 93 87 05 00 +23 1B F4 F8 93 07 06 00 23 1A F4 F8 93 87 06 00 +23 19 F4 F8 93 07 07 00 23 18 F4 F8 83 27 84 F9 +23 20 F4 FA 23 26 04 FE 6F 00 C0 04 83 27 C4 FE +93 97 27 00 93 87 07 FF B3 87 87 00 23 AA 07 FA +83 27 C4 FE 93 97 27 00 93 87 07 FF B3 87 87 00 +03 A7 47 FB 83 27 C4 FE 93 97 27 00 93 87 07 FF +B3 87 87 00 23 AA E7 FC 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 03 27 C4 FE 93 07 70 00 E3 F8 E7 FA +6F 00 80 04 13 07 44 FA 93 07 04 FA 93 05 07 00 +13 85 07 00 EF 00 40 4C 23 22 A4 FE 83 27 44 FE +93 97 27 00 93 87 07 FF B3 87 87 00 83 A7 47 FD +13 87 17 00 83 27 44 FE 93 97 27 00 93 87 07 FF +B3 87 87 00 23 AA E7 FC 83 27 04 FA 83 C7 07 00 +E3 9A 07 FA 83 27 84 F9 23 20 F4 FA 6F 00 40 04 +83 27 04 FA 03 C7 07 00 93 07 C0 02 63 02 F7 02 +83 27 04 FA 83 C6 07 00 83 57 64 F9 13 F7 F7 0F +83 27 04 FA 33 C7 E6 00 13 77 F7 0F 23 80 E7 00 +03 27 04 FA 83 17 24 F9 B3 07 F7 00 23 20 F4 FA +03 27 84 F9 83 27 C4 F9 33 07 F7 00 83 27 04 FA +E3 E8 E7 FA 83 27 84 F9 23 20 F4 FA 6F 00 80 04 +13 07 44 FA 93 07 04 FA 93 05 07 00 13 85 07 00 +EF 00 80 40 23 24 A4 FE 83 27 84 FE 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A7 47 FD 13 87 17 00 +83 27 84 FE 93 97 27 00 93 87 07 FF B3 87 87 00 +23 AA E7 FC 83 27 04 FA 83 C7 07 00 E3 9A 07 FA +83 27 84 F9 23 20 F4 FA 6F 00 40 04 83 27 04 FA +03 C7 07 00 93 07 C0 02 63 02 F7 02 83 27 04 FA +83 C6 07 00 83 57 44 F9 13 F7 F7 0F 83 27 04 FA +33 C7 E6 00 13 77 F7 0F 23 80 E7 00 03 27 04 FA +83 17 24 F9 B3 07 F7 00 23 20 F4 FA 03 27 84 F9 +83 27 C4 F9 33 07 F7 00 83 27 04 FA E3 E8 E7 FA +23 26 04 FE 6F 00 80 06 83 27 C4 FE 93 97 27 00 +93 87 07 FF B3 87 87 00 83 A7 47 FD 03 57 04 F9 +93 05 07 00 13 85 07 00 EF 00 10 14 93 07 05 00 +23 18 F4 F8 83 27 C4 FE 93 97 27 00 93 87 07 FF +B3 87 87 00 83 A7 47 FB 03 57 04 F9 93 05 07 00 +13 85 07 00 EF 00 50 11 93 07 05 00 23 18 F4 F8 +83 27 C4 FE 93 87 17 00 23 26 F4 FE 03 27 C4 FE +93 07 70 00 E3 FA E7 F8 83 57 04 F9 13 85 07 00 +83 20 C1 06 03 24 81 06 13 01 01 07 67 80 00 00 +13 01 01 FD 23 26 81 02 13 04 01 03 23 2E A4 FC +93 87 05 00 23 2A C4 FC 23 1D F4 FC 23 26 04 FE +23 24 04 FE 23 20 04 FE 83 27 C4 FD 93 87 F7 FF +23 2E F4 FC 23 24 04 FE 6F 00 C0 1E 83 27 84 FE +63 8E 07 06 23 22 04 FE 6F 00 80 03 03 27 04 FE +83 27 44 FE 33 07 F7 00 83 26 C4 FE 83 27 44 FE +B3 87 F6 00 83 26 44 FD B3 87 F6 00 03 47 07 00 +23 80 E7 00 83 27 44 FE 93 87 17 00 23 22 F4 FE +03 27 44 FE 83 27 84 FE E3 62 F7 FC 03 27 C4 FE +83 27 44 FE B3 07 F7 00 03 27 44 FD B3 07 F7 00 +13 07 C0 02 23 80 E7 00 03 27 84 FE 83 27 C4 FE +B3 07 F7 00 93 87 17 00 23 26 F4 FE 83 17 A4 FD +93 97 07 01 93 D7 07 01 93 87 17 00 93 97 07 01 +93 D7 07 01 23 1D F4 FC 83 57 A4 FD 93 F7 77 00 +13 07 70 00 63 8E E7 0E 13 07 70 00 63 4A F7 12 +13 07 60 00 63 46 F7 12 13 07 50 00 63 D2 E7 0A +13 07 20 00 63 46 F7 00 63 DC 07 00 6F 00 40 11 +13 87 D7 FF 93 07 10 00 63 E4 E7 10 6F 00 40 04 +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 21 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 40 00 23 24 F4 FE 6F 00 80 0C +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 1E 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 80 00 23 24 F4 FE 6F 00 80 08 +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 1B 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 80 00 23 24 F4 FE 6F 00 80 04 +83 17 A4 FD 93 D7 37 40 93 97 07 01 93 D7 07 41 +93 97 07 01 93 D7 07 01 93 F7 37 00 17 D7 06 00 +13 07 C7 18 93 97 27 00 B3 07 F7 00 83 A7 07 00 +23 20 F4 FE 93 07 80 00 23 24 F4 FE 6F 00 80 00 +13 00 00 00 03 27 C4 FE 83 27 84 FE B3 07 F7 00 +93 87 17 00 03 27 C4 FD E3 E2 E7 E0 83 27 C4 FD +93 87 17 00 23 2E F4 FC 6F 00 00 02 03 27 44 FD +83 27 C4 FE B3 07 F7 00 23 80 07 00 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 C4 FD +E3 6E F7 FC 13 00 00 00 13 00 00 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 93 07 05 00 A3 0F F4 FC 83 47 F4 FD +93 B7 07 03 93 C7 17 00 13 F7 F7 0F 83 47 F4 FD +93 B7 A7 03 93 F7 F7 0F B3 77 F7 00 93 F7 F7 0F +A3 07 F4 FE 83 47 F4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 11 02 +23 24 81 02 13 04 01 03 23 2E A4 FC 23 2C B4 FC +83 27 C4 FD 83 A7 07 00 23 26 F4 FE 23 24 04 FE +6F 00 40 34 83 27 C4 FE 83 C7 07 00 A3 03 F4 FE +03 47 74 FE 93 07 C0 02 63 1A F7 00 83 27 C4 FE +93 87 17 00 23 26 F4 FE 6F 00 40 33 03 27 84 FE +93 07 70 00 63 E4 E7 2E 83 27 84 FE 13 97 27 00 +97 27 00 00 93 87 07 CD B3 07 F7 00 03 A7 07 00 +97 27 00 00 93 87 07 CC B3 07 F7 00 67 80 07 00 +83 47 74 FE 13 85 07 00 EF F0 1F F2 93 07 05 00 +63 88 07 00 93 07 40 00 23 24 F4 FE 6F 00 C0 05 +03 47 74 FE 93 07 B0 02 63 08 F7 00 03 47 74 FE +93 07 D0 02 63 18 F7 00 93 07 20 00 23 24 F4 FE +6F 00 80 03 03 47 74 FE 93 07 E0 02 63 18 F7 00 +93 07 50 00 23 24 F4 FE 6F 00 00 02 93 07 10 00 +23 24 F4 FE 83 27 84 FD 93 87 47 00 03 A7 07 00 +13 07 17 00 23 A0 E7 00 83 27 84 FD 83 A7 07 00 +13 87 17 00 83 27 84 FD 23 A0 E7 00 6F 00 C0 24 +83 47 74 FE 13 85 07 00 EF F0 1F E9 93 07 05 00 +63 82 07 02 93 07 40 00 23 24 F4 FE 83 27 84 FD +93 87 87 00 03 A7 07 00 13 07 17 00 23 A0 E7 00 +6F 00 80 21 03 47 74 FE 93 07 E0 02 63 12 F7 02 +93 07 50 00 23 24 F4 FE 83 27 84 FD 93 87 87 00 +03 A7 07 00 13 07 17 00 23 A0 E7 00 6F 00 C0 1E +93 07 10 00 23 24 F4 FE 83 27 84 FD 93 87 87 00 +03 A7 07 00 13 07 17 00 23 A0 E7 00 6F 00 C0 1C +03 47 74 FE 93 07 E0 02 63 12 F7 02 93 07 50 00 +23 24 F4 FE 83 27 84 FD 93 87 07 01 03 A7 07 00 +13 07 17 00 23 A0 E7 00 6F 00 C0 18 83 47 74 FE +13 85 07 00 EF F0 5F DE 93 07 05 00 63 9C 07 16 +93 07 10 00 23 24 F4 FE 83 27 84 FD 93 87 07 01 +03 A7 07 00 13 07 17 00 23 A0 E7 00 6F 00 80 15 +03 47 74 FE 93 07 50 04 63 08 F7 00 03 47 74 FE +93 07 50 06 63 12 F7 02 93 07 30 00 23 24 F4 FE +83 27 84 FD 93 87 47 01 03 A7 07 00 13 07 17 00 +23 A0 E7 00 6F 00 80 12 83 47 74 FE 13 85 07 00 +EF F0 9F D7 93 07 05 00 63 9A 07 10 93 07 10 00 +23 24 F4 FE 83 27 84 FD 93 87 47 01 03 A7 07 00 +13 07 17 00 23 A0 E7 00 6F 00 40 0F 03 47 74 FE +93 07 B0 02 63 08 F7 00 03 47 74 FE 93 07 D0 02 +63 12 F7 02 93 07 60 00 23 24 F4 FE 83 27 84 FD +93 87 C7 00 03 A7 07 00 13 07 17 00 23 A0 E7 00 +6F 00 80 0C 93 07 10 00 23 24 F4 FE 83 27 84 FD +93 87 C7 00 03 A7 07 00 13 07 17 00 23 A0 E7 00 +6F 00 80 0A 83 47 74 FE 13 85 07 00 EF F0 DF CE +93 07 05 00 63 82 07 02 93 07 70 00 23 24 F4 FE +83 27 84 FD 93 87 87 01 03 A7 07 00 13 07 17 00 +23 A0 E7 00 6F 00 40 07 93 07 10 00 23 24 F4 FE +83 27 84 FD 93 87 87 01 03 A7 07 00 13 07 17 00 +23 A0 E7 00 6F 00 40 05 83 47 74 FE 13 85 07 00 +EF F0 9F C9 93 07 05 00 63 9E 07 02 93 07 10 00 +23 24 F4 FE 83 27 84 FD 93 87 47 00 03 A7 07 00 +13 07 17 00 23 A0 E7 00 6F 00 C0 01 13 00 00 00 +6F 00 80 01 13 00 00 00 6F 00 00 01 13 00 00 00 +6F 00 80 00 13 00 00 00 83 27 C4 FE 93 87 17 00 +23 26 F4 FE 83 27 C4 FE 83 C7 07 00 63 88 07 00 +03 27 84 FE 93 07 10 00 E3 16 F7 CA 83 27 C4 FD +03 27 C4 FE 23 A0 E7 00 83 27 84 FE 13 85 07 00 +83 20 C1 02 03 24 81 02 13 01 01 03 67 80 00 00 +13 01 01 FD 23 26 81 02 13 04 01 03 23 2E A4 FC +03 27 C4 FD 93 07 50 00 63 E8 E7 08 83 27 C4 FD +13 97 27 00 97 27 00 00 93 87 C7 98 B3 07 F7 00 +03 A7 07 00 97 27 00 00 93 87 C7 97 B3 07 F7 00 +67 80 07 00 97 D7 06 00 93 87 07 CF 83 A7 07 00 +23 26 F4 FE 6F 00 C0 05 97 D7 06 00 93 87 07 CE +83 A7 07 00 23 26 F4 FE 6F 00 80 04 97 D7 06 00 +93 87 C7 CA 83 A7 07 00 23 26 F4 FE 6F 00 40 03 +97 D7 06 00 93 87 C7 C9 83 A7 07 00 23 26 F4 FE +6F 00 00 02 97 D7 06 00 93 87 87 CA 83 A7 07 00 +23 26 F4 FE 6F 00 C0 00 23 26 04 FE 13 00 00 00 +83 27 C4 FE 13 85 07 00 03 24 C1 02 13 01 01 03 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +93 07 05 00 13 87 05 00 A3 0F F4 FC 93 07 07 00 +23 1E F4 FC A3 07 04 FE A3 06 04 FE 23 07 04 FE +A3 07 04 FE 6F 00 C0 0B 83 57 C4 FD 13 97 87 01 +13 57 87 41 83 07 F4 FD B3 47 F7 00 93 97 87 01 +93 D7 87 41 93 F7 F7 0F 93 F7 17 00 A3 06 F4 FE +83 47 F4 FD 93 D7 17 00 A3 0F F4 FC 03 47 D4 FE +93 07 10 00 63 14 F7 02 83 57 C4 FD 13 87 07 00 +B7 47 00 00 93 87 27 00 B3 47 F7 00 23 1E F4 FC +93 07 10 00 23 07 F4 FE 6F 00 80 00 23 07 04 FE +83 57 C4 FD 93 D7 17 00 23 1E F4 FC 83 47 E4 FE +63 8E 07 00 83 57 C4 FD 13 87 07 00 B7 87 FF FF +B3 67 F7 00 23 1E F4 FC 6F 00 C0 01 83 57 C4 FD +13 87 07 00 B7 87 00 00 93 87 F7 FF B3 77 F7 00 +23 1E F4 FC 83 47 F4 FE 93 87 17 00 A3 07 F4 FE +03 47 F4 FE 93 07 70 00 E3 F0 E7 F4 83 57 C4 FD +13 85 07 00 03 24 C1 02 13 01 01 03 67 80 00 00 +13 01 01 FE 23 2E 11 00 23 2C 81 00 13 04 01 02 +93 07 05 00 13 87 05 00 23 17 F4 FE 93 07 07 00 +23 16 F4 FE 83 57 E4 FE 93 F7 F7 0F 03 57 C4 FE +93 05 07 00 13 85 07 00 EF F0 DF EB 93 07 05 00 +23 16 F4 FE 83 57 E4 FE 93 D7 87 00 93 97 07 01 +93 D7 07 01 93 F7 F7 0F 03 57 C4 FE 93 05 07 00 +13 85 07 00 EF F0 1F E9 93 07 05 00 23 16 F4 FE +83 57 C4 FE 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 11 00 +23 2C 81 00 13 04 01 02 23 26 A4 FE 93 87 05 00 +23 15 F4 FE 83 27 C4 FE 93 97 07 01 93 D7 07 41 +03 57 A4 FE 93 05 07 00 13 85 07 00 EF 00 C0 04 +93 07 05 00 23 15 F4 FE 83 27 C4 FE 93 D7 07 01 +93 97 07 01 93 D7 07 41 03 57 A4 FE 93 05 07 00 +13 85 07 00 EF 00 40 02 93 07 05 00 23 15 F4 FE +83 57 A4 FE 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 11 00 +23 2C 81 00 13 04 01 02 93 07 05 00 13 87 05 00 +23 17 F4 FE 93 07 07 00 23 16 F4 FE 83 57 E4 FE +03 57 C4 FE 93 05 07 00 13 85 07 00 EF F0 5F EC +93 07 05 00 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 11 00 +23 2C 81 00 13 04 01 02 A3 07 04 FE 83 47 F4 FE +63 88 07 00 17 15 00 00 13 05 45 68 EF 10 80 0A +83 47 F4 FE 13 85 07 00 83 20 C1 01 03 24 81 01 +13 01 01 02 67 80 00 00 13 01 01 FE 23 2E 81 00 +13 04 01 02 F3 27 00 C0 23 26 F4 FE 83 27 C4 FE +13 85 07 00 03 24 C1 01 13 01 01 02 67 80 00 00 +13 01 01 FF 23 26 11 00 23 24 81 00 13 04 01 01 +EF F0 9F FC 13 07 05 00 97 D7 06 00 93 87 47 98 +23 A0 E7 00 13 00 00 00 83 20 C1 00 03 24 81 00 +13 01 01 01 67 80 00 00 13 01 01 FF 23 26 11 00 +23 24 81 00 13 04 01 01 EF F0 1F F9 13 07 05 00 +97 D7 06 00 93 87 07 95 23 A0 E7 00 13 00 00 00 +83 20 C1 00 03 24 81 00 13 01 01 01 67 80 00 00 +13 01 01 FE 23 2E 81 00 13 04 01 02 97 D7 06 00 +93 87 47 92 03 A7 07 00 97 D7 06 00 93 87 47 91 +83 A7 07 00 B3 07 F7 40 23 26 F4 FE 83 27 C4 FE +13 85 07 00 03 24 C1 01 13 01 01 02 67 80 00 00 +13 01 01 FD 23 26 81 02 13 04 01 03 23 2E A4 FC +03 27 C4 FD B7 D7 9A 3B 93 87 07 A0 B3 57 F7 02 +23 26 F4 FE 83 27 C4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FE 23 2E 81 00 +13 04 01 02 23 26 A4 FE 23 24 B4 FE 23 22 C4 FE +83 27 C4 FE 13 07 10 00 23 80 E7 00 13 00 00 00 +03 24 C1 01 13 01 01 02 67 80 00 00 13 01 01 FE +23 2E 81 00 13 04 01 02 23 26 A4 FE 83 27 C4 FE +23 80 07 00 13 00 00 00 03 24 C1 01 13 01 01 02 +67 80 00 00 13 01 01 FD 23 26 81 02 13 04 01 03 +23 2E A4 FC 23 2C B4 FC 83 27 C4 FD 23 26 F4 FE +6F 00 00 01 83 27 C4 FE 93 87 17 00 23 26 F4 FE +83 27 C4 FE 83 C7 07 00 63 8A 07 00 83 27 84 FD +13 87 F7 FF 23 2C E4 FC E3 9E 07 FC 03 27 C4 FE +83 27 C4 FD B3 07 F7 40 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 FD 23 26 81 02 +13 04 01 03 23 2E A4 FC 23 26 04 FE 6F 00 00 04 +03 27 C4 FE 93 07 07 00 93 97 27 00 B3 87 E7 00 +93 97 17 00 13 86 07 00 83 27 C4 FD 83 A7 07 00 +93 86 17 00 03 27 C4 FD 23 20 D7 00 83 C7 07 00 +B3 07 F6 00 93 87 07 FD 23 26 F4 FE 83 27 C4 FD +83 A7 07 00 03 C7 07 00 93 07 F0 02 63 FC E7 00 +83 27 C4 FD 83 A7 07 00 03 C7 07 00 93 07 90 03 +E3 F0 E7 FA 83 27 C4 FE 13 85 07 00 03 24 C1 02 +13 01 01 03 67 80 00 00 13 01 01 F8 23 2E 81 06 +13 04 01 08 23 2E A4 F8 23 2C B4 F8 23 2A C4 F8 +23 28 D4 F8 23 26 E4 F8 23 24 F4 F8 97 C7 06 00 +93 87 87 73 83 A7 07 00 23 24 F4 FE 83 27 84 F8 +93 F7 07 04 63 8A 07 00 97 C7 06 00 93 87 07 72 +83 A7 07 00 23 24 F4 FE 83 27 84 F8 93 F7 07 01 +63 88 07 00 83 27 84 F8 93 F7 E7 FF 23 24 F4 F8 +03 27 44 F9 93 07 10 00 63 D8 E7 00 03 27 44 F9 +93 07 40 02 63 D6 E7 00 93 07 00 00 6F 00 80 2F +83 27 84 F8 93 F7 17 00 63 86 07 00 93 07 00 03 +6F 00 80 00 93 07 00 02 A3 01 F4 FE A3 07 04 FE +83 27 84 F8 93 F7 27 00 63 8A 07 06 83 27 84 F9 +63 D4 07 02 93 07 D0 02 A3 07 F4 FE 83 27 84 F9 +B3 07 F0 40 23 2C F4 F8 83 27 04 F9 93 87 F7 FF +23 28 F4 F8 6F 00 80 04 83 27 84 F8 93 F7 47 00 +63 8E 07 00 93 07 B0 02 A3 07 F4 FE 83 27 04 F9 +93 87 F7 FF 23 28 F4 F8 6F 00 40 02 83 27 84 F8 +93 F7 87 00 63 8C 07 00 93 07 00 02 A3 07 F4 FE +83 27 04 F9 93 87 F7 FF 23 28 F4 F8 83 27 84 F8 +93 F7 07 02 63 8C 07 02 03 27 44 F9 93 07 00 01 +63 1A F7 00 83 27 04 F9 93 87 E7 FF 23 28 F4 F8 +6F 00 C0 01 03 27 44 F9 93 07 80 00 63 18 F7 00 +83 27 04 F9 93 87 F7 FF 23 28 F4 F8 23 22 04 FE +83 27 84 F9 63 92 07 06 83 27 44 FE 13 87 17 00 +23 22 E4 FE 93 87 07 FF B3 87 87 00 13 07 00 03 +23 88 E7 FA 6F 00 C0 04 03 27 84 F9 83 27 44 F9 +B3 77 F7 02 03 27 84 FE 33 07 F7 00 83 27 44 FE +93 86 17 00 23 22 D4 FE 03 47 07 00 93 87 07 FF +B3 87 87 00 23 88 E7 FA 03 27 84 F9 83 27 44 F9 +B3 57 F7 02 23 2C F4 F8 83 27 84 F9 E3 9E 07 FA +03 27 44 FE 83 27 C4 F8 63 D6 E7 00 83 27 44 FE +23 26 F4 F8 03 27 04 F9 83 27 C4 F8 B3 07 F7 40 +23 28 F4 F8 83 27 84 F8 93 F7 17 01 63 96 07 02 +6F 00 80 01 83 27 C4 F9 13 87 17 00 23 2E E4 F8 +13 07 00 02 23 80 E7 00 83 27 04 F9 13 87 F7 FF +23 28 E4 F8 E3 40 F0 FE 83 47 F4 FE 63 8C 07 00 +83 27 C4 F9 13 87 17 00 23 2E E4 F8 03 47 F4 FE +23 80 E7 00 83 27 84 F8 93 F7 07 02 63 84 07 06 +03 27 44 F9 93 07 80 00 63 1E F7 00 83 27 C4 F9 +13 87 17 00 23 2E E4 F8 13 07 00 03 23 80 E7 00 +6F 00 40 04 03 27 44 F9 93 07 00 01 63 1C F7 02 +83 27 C4 F9 13 87 17 00 23 2E E4 F8 13 07 00 03 +23 80 E7 00 97 C7 06 00 93 87 07 4C 03 A7 07 00 +83 27 C4 F9 93 86 17 00 23 2E D4 F8 03 47 17 02 +23 80 E7 00 83 27 84 F8 93 F7 07 01 63 92 07 04 +6F 00 80 01 83 27 C4 F9 13 87 17 00 23 2E E4 F8 +03 47 34 FE 23 80 E7 00 83 27 04 F9 13 87 F7 FF +23 28 E4 F8 E3 40 F0 FE 6F 00 80 01 83 27 C4 F9 +13 87 17 00 23 2E E4 F8 13 07 00 03 23 80 E7 00 +83 27 C4 F8 13 87 F7 FF 23 26 E4 F8 03 27 44 FE +E3 4E F7 FC 6F 00 40 02 83 27 C4 F9 13 87 17 00 +23 2E E4 F8 03 27 44 FE 13 07 07 FF 33 07 87 00 +03 47 07 FB 23 80 E7 00 83 27 44 FE 13 87 F7 FF +23 22 E4 FE E3 4A F0 FC 6F 00 80 01 83 27 C4 F9 +13 87 17 00 23 2E E4 F8 13 07 00 02 23 80 E7 00 +83 27 04 F9 13 87 F7 FF 23 28 E4 F8 E3 40 F0 FE +83 27 C4 F9 13 85 07 00 03 24 C1 07 13 01 01 08 +67 80 00 00 13 01 01 FA 23 2E 81 04 13 04 01 06 +23 2E A4 FA 23 2C B4 FA 23 2A C4 FA 23 28 D4 FA +23 26 E4 FA 97 C7 06 00 93 87 07 3B 83 A7 07 00 +23 26 F4 FE 83 27 C4 FA 93 F7 07 04 63 8A 07 00 +97 C7 06 00 93 87 87 39 83 A7 07 00 23 26 F4 FE +23 22 04 FE 23 24 04 FE 6F 00 C0 0A 83 27 84 FE +63 80 07 02 83 27 44 FE 13 87 17 00 23 22 E4 FE +93 87 07 FF B3 87 87 00 13 07 A0 03 23 8E E7 FC +83 27 84 FE 03 27 84 FB B3 07 F7 00 83 C7 07 00 +93 D7 47 00 93 F7 F7 0F 13 87 07 00 83 27 C4 FE +33 87 E7 00 83 27 44 FE 93 86 17 00 23 22 D4 FE +03 47 07 00 93 87 07 FF B3 87 87 00 23 8E E7 FC +83 27 84 FE 03 27 84 FB B3 07 F7 00 83 C7 07 00 +93 F7 F7 00 03 27 C4 FE 33 07 F7 00 83 27 44 FE +93 86 17 00 23 22 D4 FE 03 47 07 00 93 87 07 FF +B3 87 87 00 23 8E E7 FC 83 27 84 FE 93 87 17 00 +23 24 F4 FE 03 27 84 FE 93 07 50 00 E3 D8 E7 F4 +83 27 C4 FA 93 F7 07 01 63 98 07 02 6F 00 80 01 +83 27 C4 FB 13 87 17 00 23 2E E4 FA 13 07 00 02 +23 80 E7 00 83 27 44 FB 13 87 F7 FF 23 2A E4 FA +03 27 44 FE E3 4E F7 FC 23 24 04 FE 6F 00 00 03 +83 27 C4 FB 13 87 17 00 23 2E E4 FA 03 27 84 FE +13 07 07 FF 33 07 87 00 03 47 C7 FD 23 80 E7 00 +83 27 84 FE 93 87 17 00 23 24 F4 FE 03 27 84 FE +83 27 44 FE E3 46 F7 FC 6F 00 80 01 83 27 C4 FB +13 87 17 00 23 2E E4 FA 13 07 00 02 23 80 E7 00 +83 27 44 FB 13 87 F7 FF 23 2A E4 FA 03 27 44 FE +E3 4E F7 FC 83 27 C4 FB 13 85 07 00 03 24 C1 05 +13 01 01 06 67 80 00 00 13 01 01 FA 23 2E 81 04 +13 04 01 06 23 2E A4 FA 23 2C B4 FA 23 2A C4 FA +23 28 D4 FA 23 26 E4 FA 23 22 04 FE 23 26 04 FE +6F 00 00 1A 83 27 C4 FE 63 80 07 02 83 27 44 FE +13 87 17 00 23 22 E4 FE 93 87 07 FF B3 87 87 00 +13 07 E0 02 23 8E E7 FC 83 27 C4 FE 03 27 84 FB +B3 07 F7 00 83 C7 07 00 23 24 F4 FE 83 27 84 FE +63 98 07 02 97 C7 06 00 93 87 07 1A 03 A7 07 00 +83 27 44 FE 93 86 17 00 23 22 D4 FE 03 47 07 00 +93 87 07 FF B3 87 87 00 23 8E E7 FC 6F 00 80 12 +03 27 84 FE 93 07 30 06 63 DC E7 08 97 C7 06 00 +93 87 87 16 83 A7 07 00 83 26 84 FE 13 07 40 06 +33 C7 E6 02 33 87 E7 00 83 27 44 FE 93 86 17 00 +23 22 D4 FE 03 47 07 00 93 87 07 FF B3 87 87 00 +23 8E E7 FC 03 27 84 FE 93 07 40 06 B3 67 F7 02 +23 24 F4 FE 97 C7 06 00 93 87 07 12 83 A7 07 00 +83 26 84 FE 13 07 A0 00 33 C7 E6 02 33 87 E7 00 +83 27 44 FE 93 86 17 00 23 22 D4 FE 03 47 07 00 +93 87 07 FF B3 87 87 00 23 8E E7 FC 03 27 84 FE +93 07 A0 00 B3 67 F7 02 23 24 F4 FE 6F 00 80 05 +03 27 84 FE 93 07 90 00 63 D6 E7 04 97 C7 06 00 +93 87 87 0C 83 A7 07 00 83 26 84 FE 13 07 A0 00 +33 C7 E6 02 33 87 E7 00 83 27 44 FE 93 86 17 00 +23 22 D4 FE 03 47 07 00 93 87 07 FF B3 87 87 00 +23 8E E7 FC 03 27 84 FE 93 07 A0 00 B3 67 F7 02 +23 24 F4 FE 97 C7 06 00 93 87 07 08 03 A7 07 00 +83 27 84 FE 33 07 F7 00 83 27 44 FE 93 86 17 00 +23 22 D4 FE 03 47 07 00 93 87 07 FF B3 87 87 00 +23 8E E7 FC 83 27 C4 FE 93 87 17 00 23 26 F4 FE +03 27 C4 FE 93 07 30 00 E3 DE E7 E4 83 27 C4 FA +93 F7 07 01 63 98 07 02 6F 00 80 01 83 27 C4 FB +13 87 17 00 23 2E E4 FA 13 07 00 02 23 80 E7 00 +83 27 44 FB 13 87 F7 FF 23 2A E4 FA 03 27 44 FE +E3 4E F7 FC 23 26 04 FE 6F 00 00 03 83 27 C4 FB +13 87 17 00 23 2E E4 FA 03 27 C4 FE 13 07 07 FF +33 07 87 00 03 47 C7 FD 23 80 E7 00 83 27 C4 FE +93 87 17 00 23 26 F4 FE 03 27 C4 FE 83 27 44 FE +E3 46 F7 FC 6F 00 80 01 83 27 C4 FB 13 87 17 00 +23 2E E4 FA 13 07 00 02 23 80 E7 00 83 27 44 FB +13 87 F7 FF 23 2A E4 FA 03 27 44 FE E3 4E F7 FC +83 27 C4 FB 13 85 07 00 03 24 C1 05 13 01 01 06 +67 80 00 00 13 01 01 FB 23 26 11 04 23 24 81 04 +13 04 01 05 23 2E A4 FA 23 2C B4 FA 23 2A C4 FA +83 27 C4 FB 23 20 F4 FE 6F 00 40 5C 83 27 84 FB +03 C7 07 00 93 07 50 02 63 00 F7 02 03 27 84 FB +83 27 04 FE 93 86 17 00 23 20 D4 FE 03 47 07 00 +23 80 E7 00 6F 00 C0 58 23 2C 04 FC 83 27 84 FB +93 87 17 00 23 2C F4 FA 83 27 84 FB 83 C7 07 00 +93 87 07 FE 13 07 00 01 63 6C F7 06 13 97 27 00 +97 17 00 00 93 87 87 C3 B3 07 F7 00 03 A7 07 00 +97 17 00 00 93 87 87 C2 B3 07 F7 00 67 80 07 00 +83 27 84 FD 93 E7 07 01 23 2C F4 FC 6F F0 1F FB +83 27 84 FD 93 E7 47 00 23 2C F4 FC 6F F0 1F FA +83 27 84 FD 93 E7 87 00 23 2C F4 FC 6F F0 1F F9 +83 27 84 FD 93 E7 07 02 23 2C F4 FC 6F F0 1F F8 +83 27 84 FD 93 E7 17 00 23 2C F4 FC 6F F0 1F F7 +93 07 F0 FF 23 2A F4 FC 83 27 84 FB 03 C7 07 00 +93 07 F0 02 63 F4 E7 02 83 27 84 FB 03 C7 07 00 +93 07 90 03 63 EC E7 00 93 07 84 FB 13 85 07 00 +EF F0 8F E7 23 2A A4 FC 6F 00 40 05 83 27 84 FB +03 C7 07 00 93 07 A0 02 63 12 F7 04 83 27 84 FB +93 87 17 00 23 2C F4 FA 83 27 44 FB 13 87 47 00 +23 2A E4 FA 83 A7 07 00 23 2A F4 FC 83 27 44 FD +63 DE 07 00 83 27 44 FD B3 07 F0 40 23 2A F4 FC +83 27 84 FD 93 E7 07 01 23 2C F4 FC 93 07 F0 FF +23 28 F4 FC 83 27 84 FB 03 C7 07 00 93 07 E0 02 +63 10 F7 08 83 27 84 FB 93 87 17 00 23 2C F4 FA +83 27 84 FB 03 C7 07 00 93 07 F0 02 63 F4 E7 02 +83 27 84 FB 03 C7 07 00 93 07 90 03 63 EC E7 00 +93 07 84 FB 13 85 07 00 EF F0 0F DD 23 28 A4 FC +6F 00 40 03 83 27 84 FB 03 C7 07 00 93 07 A0 02 +63 12 F7 02 83 27 84 FB 93 87 17 00 23 2C F4 FA +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +23 28 F4 FC 83 27 04 FD 63 D4 07 00 23 28 04 FC +93 07 F0 FF 23 26 F4 FC 83 27 84 FB 03 C7 07 00 +93 07 C0 06 63 0A F7 00 83 27 84 FB 03 C7 07 00 +93 07 C0 04 63 1E F7 00 83 27 84 FB 83 C7 07 00 +23 26 F4 FC 83 27 84 FB 93 87 17 00 23 2C F4 FA +93 07 A0 00 23 22 F4 FE 83 27 84 FB 83 C7 07 00 +93 87 F7 FB 13 07 70 03 63 6E F7 28 13 97 27 00 +97 17 00 00 93 87 C7 A8 B3 07 F7 00 03 A7 07 00 +97 17 00 00 93 87 C7 A7 B3 07 F7 00 67 80 07 00 +83 27 84 FD 93 F7 07 01 63 98 07 02 6F 00 80 01 +83 27 04 FE 13 87 17 00 23 20 E4 FE 13 07 00 02 +23 80 E7 00 83 27 44 FD 93 87 F7 FF 23 2A F4 FC +83 27 44 FD E3 4E F0 FC 83 27 44 FB 13 87 47 00 +23 2A E4 FA 83 A6 07 00 83 27 04 FE 13 87 17 00 +23 20 E4 FE 13 F7 F6 0F 23 80 E7 00 6F 00 80 01 +83 27 04 FE 13 87 17 00 23 20 E4 FE 13 07 00 02 +23 80 E7 00 83 27 44 FD 93 87 F7 FF 23 2A F4 FC +83 27 44 FD E3 4E F0 FC 6F 00 80 2C 83 27 44 FB +13 87 47 00 23 2A E4 FA 83 A7 07 00 23 2E F4 FC +83 27 C4 FD 63 98 07 00 97 17 00 00 93 87 87 97 +23 2E F4 FC 83 27 04 FD 93 85 07 00 03 25 C4 FD +EF F0 4F BE 93 07 05 00 23 24 F4 FC 83 27 84 FD +93 F7 07 01 63 98 07 02 6F 00 80 01 83 27 04 FE +13 87 17 00 23 20 E4 FE 13 07 00 02 23 80 E7 00 +83 27 44 FD 13 87 F7 FF 23 2A E4 FC 03 27 84 FC +E3 4E F7 FC 23 24 04 FE 6F 00 00 03 03 27 C4 FD +93 07 17 00 23 2E F4 FC 83 27 04 FE 93 86 17 00 +23 20 D4 FE 03 47 07 00 23 80 E7 00 83 27 84 FE +93 87 17 00 23 24 F4 FE 03 27 84 FE 83 27 84 FC +E3 46 F7 FC 6F 00 80 01 83 27 04 FE 13 87 17 00 +23 20 E4 FE 13 07 00 02 23 80 E7 00 83 27 44 FD +13 87 F7 FF 23 2A E4 FC 03 27 84 FC E3 4E F7 FC +6F 00 00 1E 03 27 44 FD 93 07 F0 FF 63 1C F7 00 +93 07 80 00 23 2A F4 FC 83 27 84 FD 93 E7 17 00 +23 2C F4 FC 83 27 44 FB 13 87 47 00 23 2A E4 FA +83 A7 07 00 93 85 07 00 83 27 84 FD 03 27 04 FD +83 26 44 FD 13 06 00 01 03 25 04 FE EF F0 CF BD +23 20 A4 FE 6F 00 C0 18 83 27 84 FD 93 E7 07 04 +23 2C F4 FC 03 27 C4 FC 93 07 C0 06 63 1A F7 02 +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +03 27 84 FD 83 26 04 FD 03 26 44 FD 93 85 07 00 +03 25 04 FE EF F0 0F F2 23 20 A4 FE 6F 00 40 14 +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +03 27 84 FD 83 26 04 FD 03 26 44 FD 93 85 07 00 +03 25 04 FE EF F0 5F 8B 23 20 A4 FE 6F 00 40 11 +93 07 80 00 23 22 F4 FE 6F 00 C0 08 83 27 84 FD +93 E7 07 04 23 2C F4 FC 93 07 00 01 23 22 F4 FE +6F 00 40 07 83 27 84 FD 93 E7 27 00 23 2C F4 FC +6F 00 00 06 83 27 84 FB 03 C7 07 00 93 07 50 02 +63 0C F7 00 83 27 04 FE 13 87 17 00 23 20 E4 FE +13 07 50 02 23 80 E7 00 83 27 84 FB 83 C7 07 00 +63 80 07 02 03 27 84 FB 83 27 04 FE 93 86 17 00 +23 20 D4 FE 03 47 07 00 23 80 E7 00 6F 00 40 09 +83 27 84 FB 93 87 F7 FF 23 2C F4 FA 6F 00 40 08 +13 00 00 00 03 27 C4 FC 93 07 C0 06 63 1E F7 00 +83 27 44 FB 13 87 47 00 23 2A E4 FA 83 A7 07 00 +23 26 F4 FE 6F 00 C0 03 83 27 84 FD 93 F7 27 00 +63 8E 07 00 83 27 44 FB 13 87 47 00 23 2A E4 FA +83 A7 07 00 23 26 F4 FE 6F 00 80 01 83 27 44 FB +13 87 47 00 23 2A E4 FA 83 A7 07 00 23 26 F4 FE +83 25 C4 FE 83 27 84 FD 03 27 04 FD 83 26 44 FD +03 26 44 FE 03 25 04 FE EF F0 0F A5 23 20 A4 FE +83 27 84 FB 93 87 17 00 23 2C F4 FA 83 27 84 FB +83 C7 07 00 E3 9C 07 A2 83 27 04 FE 23 80 07 00 +03 27 04 FE 83 27 C4 FB B3 07 F7 40 13 85 07 00 +83 20 C1 04 03 24 81 04 13 01 01 05 67 80 00 00 +13 01 01 FE 23 2E 81 00 13 04 01 02 93 07 05 00 +A3 07 F4 FE B7 07 10 00 93 87 07 01 03 47 F4 FE +23 A0 E7 00 13 00 00 00 03 24 C1 01 13 01 01 02 +67 80 00 00 13 01 01 BB 23 26 11 42 23 24 81 42 +13 04 01 43 23 2E A4 BC 23 22 B4 00 23 24 C4 00 +23 26 D4 00 23 28 E4 00 23 2A F4 00 23 2C 04 01 +23 2E 14 01 23 24 04 FE 93 07 04 02 23 2C F4 BC +83 27 84 BD 93 87 47 FE 23 22 F4 BE 03 27 44 BE +93 07 84 BE 13 06 07 00 83 25 C4 BD 13 85 07 00 +EF F0 5F 95 93 07 84 BE 23 26 F4 FE 6F 00 C0 02 +83 27 C4 FE 83 C7 07 00 13 85 07 00 EF F0 5F F5 +83 27 84 FE 93 87 17 00 23 24 F4 FE 83 27 C4 FE +93 87 17 00 23 26 F4 FE 83 27 C4 FE 83 C7 07 00 +E3 98 07 FC 83 27 84 FE 13 85 07 00 83 20 C1 42 +03 24 81 42 13 01 01 45 67 80 00 00 +@00014804 +53 74 61 74 69 63 00 00 48 65 61 70 00 00 00 00 +53 74 61 63 6B 00 00 00 36 6B 20 70 65 72 66 6F +72 6D 61 6E 63 65 20 72 75 6E 20 70 61 72 61 6D +65 74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 +72 6B 2E 0A 00 00 00 00 36 6B 20 76 61 6C 69 64 +61 74 69 6F 6E 20 72 75 6E 20 70 61 72 61 6D 65 +74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 72 +6B 2E 0A 00 50 72 6F 66 69 6C 65 20 67 65 6E 65 +72 61 74 69 6F 6E 20 72 75 6E 20 70 61 72 61 6D +65 74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 +72 6B 2E 0A 00 00 00 00 32 4B 20 70 65 72 66 6F +72 6D 61 6E 63 65 20 72 75 6E 20 70 61 72 61 6D +65 74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 +72 6B 2E 0A 00 00 00 00 32 4B 20 76 61 6C 69 64 +61 74 69 6F 6E 20 72 75 6E 20 70 61 72 61 6D 65 +74 65 72 73 20 66 6F 72 20 63 6F 72 65 6D 61 72 +6B 2E 0A 00 5B 25 75 5D 45 52 52 4F 52 21 20 6C +69 73 74 20 63 72 63 20 30 78 25 30 34 78 20 2D +20 73 68 6F 75 6C 64 20 62 65 20 30 78 25 30 34 +78 0A 00 00 5B 25 75 5D 45 52 52 4F 52 21 20 6D +61 74 72 69 78 20 63 72 63 20 30 78 25 30 34 78 +20 2D 20 73 68 6F 75 6C 64 20 62 65 20 30 78 25 +30 34 78 0A 00 00 00 00 5B 25 75 5D 45 52 52 4F +52 21 20 73 74 61 74 65 20 63 72 63 20 30 78 25 +30 34 78 20 2D 20 73 68 6F 75 6C 64 20 62 65 20 +30 78 25 30 34 78 0A 00 43 6F 72 65 4D 61 72 6B +20 53 69 7A 65 20 20 20 20 3A 20 25 6C 75 0A 00 +54 6F 74 61 6C 20 74 69 63 6B 73 20 20 20 20 20 +20 3A 20 25 6C 75 0A 00 54 6F 74 61 6C 20 74 69 +6D 65 20 28 73 65 63 73 29 3A 20 25 64 0A 00 00 +6E 75 6D 5F 63 6F 6E 74 65 78 74 73 20 20 20 3A +20 25 64 0A 00 00 00 00 49 74 65 72 61 74 69 6F +6E 73 20 20 20 3A 20 25 64 0A 00 00 49 74 65 72 +61 74 69 6F 6E 73 2F 53 65 63 20 20 20 3A 20 25 +64 0A 00 00 45 52 52 4F 52 21 20 4D 75 73 74 20 +65 78 65 63 75 74 65 20 66 6F 72 20 61 74 20 6C +65 61 73 74 20 31 30 20 73 65 63 73 20 66 6F 72 +20 61 20 76 61 6C 69 64 20 72 65 73 75 6C 74 21 +0A 00 00 00 49 74 65 72 61 74 69 6F 6E 73 20 20 +20 20 20 20 20 3A 20 25 6C 75 0A 00 47 43 43 31 +31 2E 31 2E 30 00 00 00 43 6F 6D 70 69 6C 65 72 +20 76 65 72 73 69 6F 6E 20 3A 20 25 73 0A 00 00 +2D 4F 30 20 2D 67 20 20 20 00 00 00 43 6F 6D 70 +69 6C 65 72 20 66 6C 61 67 73 20 20 20 3A 20 25 +73 0A 00 00 53 54 41 43 4B 00 00 00 4D 65 6D 6F +72 79 20 6C 6F 63 61 74 69 6F 6E 20 20 3A 20 25 +73 0A 00 00 73 65 65 64 63 72 63 20 20 20 20 20 +20 20 20 20 20 3A 20 30 78 25 30 34 78 0A 00 00 +5B 25 64 5D 63 72 63 6C 69 73 74 20 20 20 20 20 +20 20 3A 20 30 78 25 30 34 78 0A 00 5B 25 64 5D +63 72 63 6D 61 74 72 69 78 20 20 20 20 20 3A 20 +30 78 25 30 34 78 0A 00 5B 25 64 5D 63 72 63 73 +74 61 74 65 20 20 20 20 20 20 3A 20 30 78 25 30 +34 78 0A 00 5B 25 64 5D 63 72 63 66 69 6E 61 6C +20 20 20 20 20 20 3A 20 30 78 25 30 34 78 0A 00 +43 6F 72 72 65 63 74 20 6F 70 65 72 61 74 69 6F +6E 20 76 61 6C 69 64 61 74 65 64 2E 20 53 65 65 +20 52 45 41 44 4D 45 2E 6D 64 20 66 6F 72 20 72 +75 6E 20 61 6E 64 20 72 65 70 6F 72 74 69 6E 67 +20 72 75 6C 65 73 2E 0A 00 00 00 00 45 72 72 6F +72 73 20 64 65 74 65 63 74 65 64 0A 00 00 00 00 +43 61 6E 6E 6F 74 20 76 61 6C 69 64 61 74 65 20 +6F 70 65 72 61 74 69 6F 6E 20 66 6F 72 20 74 68 +65 73 65 20 73 65 65 64 20 76 61 6C 75 65 73 2C +20 70 6C 65 61 73 65 20 63 6F 6D 70 61 72 65 20 +77 69 74 68 20 72 65 73 75 6C 74 73 20 6F 6E 20 +61 20 6B 6E 6F 77 6E 20 70 6C 61 74 66 6F 72 6D +2E 0A 00 00 35 30 31 32 00 00 00 00 31 32 33 34 +00 00 00 00 2D 38 37 34 00 00 00 00 2B 31 32 32 +00 00 00 00 33 35 2E 35 34 34 30 30 00 00 00 00 +2E 31 32 33 34 35 30 30 00 00 00 00 2D 31 31 30 +2E 37 30 30 00 00 00 00 2B 30 2E 36 34 34 30 30 +00 00 00 00 35 2E 35 30 30 65 2B 33 00 00 00 00 +2D 2E 31 32 33 65 2D 32 00 00 00 00 2D 38 37 65 +2B 38 33 32 00 00 00 00 2B 30 2E 36 65 2D 31 32 +00 00 00 00 54 30 2E 33 65 2D 31 46 00 00 00 00 +2D 54 2E 54 2B 2B 54 71 00 00 00 00 31 54 33 2E +34 65 34 7A 00 00 00 00 33 34 2E 30 65 2D 54 5E +00 00 00 00 50 E3 FF FF 0C E6 FF FF E0 E3 FF FF +2C E5 FF FF 60 E4 FF FF C0 E4 FF FF 84 E5 FF FF +D8 E5 FF FF F8 E6 FF FF 94 E6 FF FF A8 E6 FF FF +BC E6 FF FF D0 E6 FF FF E4 E6 FF FF 45 52 52 4F +52 3A 20 50 6C 65 61 73 65 20 6D 6F 64 69 66 79 +20 74 68 65 20 64 61 74 61 74 79 70 65 73 20 69 +6E 20 63 6F 72 65 5F 70 6F 72 74 6D 65 2E 68 21 +0A 00 00 00 30 31 32 33 34 35 36 37 38 39 61 62 +63 64 65 66 67 68 69 6A 6B 6C 6D 6E 6F 70 71 72 +73 74 75 76 77 78 79 7A 00 00 00 00 30 31 32 33 +34 35 36 37 38 39 41 42 43 44 45 46 47 48 49 4A +4B 4C 4D 4E 4F 50 51 52 53 54 55 56 57 58 59 5A +00 00 00 00 3C 4E 55 4C 4C 3E 00 00 08 F4 FF FF +38 F4 FF FF 38 F4 FF FF 18 F4 FF FF 38 F4 FF FF +38 F4 FF FF 38 F4 FF FF 38 F4 FF FF 38 F4 FF FF +38 F4 FF FF 38 F4 FF FF F8 F3 FF FF 38 F4 FF FF +E8 F3 FF FF 38 F4 FF FF 38 F4 FF FF 28 F4 FF FF +5C F7 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF E0 F7 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +68 F7 FF FF 08 F8 FF FF 94 F5 FF FF F8 F7 FF FF +08 F8 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +F8 F7 FF FF 08 F8 FF FF 08 F8 FF FF 08 F8 FF FF +08 F8 FF FF 08 F8 FF FF D4 F7 FF FF 08 F7 FF FF +08 F8 FF FF 08 F8 FF FF 20 F6 FF FF 08 F8 FF FF +64 F8 FF FF 08 F8 FF FF 08 F8 FF FF EC F7 FF FF +@00080000 +B0 D4 40 33 79 6A 14 E7 C1 E3 00 00 52 BE 99 11 +08 56 D7 1F 47 07 00 00 47 5E BF 39 A4 E5 3A 8E +84 8D 00 00 04 48 01 00 0C 48 01 00 14 48 01 00 +38 4C 01 00 40 4C 01 00 48 4C 01 00 50 4C 01 00 +58 4C 01 00 64 4C 01 00 70 4C 01 00 7C 4C 01 00 +88 4C 01 00 94 4C 01 00 A0 4C 01 00 AC 4C 01 00 +B8 4C 01 00 C4 4C 01 00 D0 4C 01 00 DC 4C 01 00 +@00080070 +66 00 00 00 64 00 00 00 01 00 00 00 58 4D 01 00 +80 4D 01 00 diff --git a/test/apps/tests/coremark/crt0.S b/test/apps/tests/coremark/crt0.S new file mode 100644 index 0000000..7476bab --- /dev/null +++ b/test/apps/tests/coremark/crt0.S @@ -0,0 +1,54 @@ +# distributed under the mit license +# https://opensource.org/licenses/mit-license.php + +.section .text.init +.global _start + +_start: + + # First init all the registers to 0 + li x1, 0 + li x2, 0 + li x3, 0 + li x4, 0 + li x5, 0 + li x6, 0 + li x7, 0 + li x8, 0 + li x8, 0 + li x9, 0 + li x10, 0 + li x11, 0 + li x12, 0 + li x13, 0 + li x14, 0 + li x15, 0 + li x16, 0 + li x17, 0 + li x19, 0 + li x20, 0 + li x21, 0 + li x22, 0 + li x23, 0 + li x24, 0 + li x25, 0 + li x26, 0 + li x27, 0 + li x28, 0 + li x29, 0 + li x30, 0 + li x31, 0 + + # Setup system call function address + la t0, trap_entry + csrw mtvec,t0 + + # Init the max boundary of the stack section + # _estack will be linked later with the linker file symbols + la sp, _estack + + # Jump to the main + call main + +trap_entry: + ebreak diff --git a/test/apps/tests/coremark/linker.ld b/test/apps/tests/coremark/linker.ld new file mode 120000 index 0000000..b15280e --- /dev/null +++ b/test/apps/tests/coremark/linker.ld @@ -0,0 +1 @@ +../common/linker.ld \ No newline at end of file diff --git a/test/apps/tests/dhrystone/Makefile b/test/apps/tests/dhrystone/Makefile new file mode 100644 index 0000000..2eba897 --- /dev/null +++ b/test/apps/tests/dhrystone/Makefile @@ -0,0 +1,51 @@ +CFLAGS = +TIME = time + +all: rundhrystone rundhrystoneR rundhrystoneO rundhrystoneRO + +dhrystone: dhrystone.c + $(CC) dhrystone.c -o dhrystone + +rundhrystone: dhrystone + @echo 'Running dhrystone (Level 1 optimization, without registers)' + ./dhrystone + ./dhrystone + ./dhrystone + @echo + + +dhrystoneR: dhrystone.c + $(CC) -DREG=register dhrystone.c -o dhrystoneR + +rundhrystoneR: dhrystoneR + @echo 'Running dhrystone (Level 1 optimization, with registers)' + ./dhrystoneR + ./dhrystoneR + ./dhrystoneR + @echo + + +dhrystoneO: dhrystone.c + $(CC) -O dhrystone.c -o dhrystoneO + +rundhrystoneO: dhrystoneO + @echo 'Running dhrystone (Level 2 optimization, without registers)' + ./dhrystoneO + ./dhrystoneO + ./dhrystoneO + @echo + + +dhrystoneRO: dhrystone.c + $(CC) -O -DREG=register dhrystone.c -o dhrystoneRO + +rundhrystoneRO: dhrystoneRO + @echo 'Running dhrystone (Level 2 optimization, with registers)' + ./dhrystoneRO + ./dhrystoneRO + ./dhrystoneRO + @echo + + +clean: + (set nonomatch;rm -f dhrystone dhrystoneR dhrystoneO dhrystoneRO *.o) diff --git a/test/apps/tests/dhrystone/README.md b/test/apps/tests/dhrystone/README.md new file mode 100644 index 0000000..d19234e --- /dev/null +++ b/test/apps/tests/dhrystone/README.md @@ -0,0 +1,3 @@ +# Dhrystone + +Dhrystone benchmark from [v2.1](https://github.com/Keith-S-Thompson/dhrystone) version. diff --git a/test/apps/tests/dhrystone/dhry.h b/test/apps/tests/dhrystone/dhry.h new file mode 100644 index 0000000..404adb4 --- /dev/null +++ b/test/apps/tests/dhrystone/dhry.h @@ -0,0 +1,431 @@ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry.h (part 1 of 3) + * + * Date: May 25, 1988 + * + * Author: Reinhold P. Weicker + * Siemens AG, E STE 35 + * Postfach 3240 + * 8520 Erlangen + * Germany (West) + * Phone: [xxx-49]-9131-7-20330 + * (8-17 Central European Time) + * Usenet: ..!mcvax!unido!estevax!weicker + * + * Original Version (in Ada) published in + * "Communications of the ACM" vol. 27., no. 10 (Oct. 1984), + * pp. 1013 - 1030, together with the statistics + * on which the distribution of statements etc. is based. + * + * In this C version, the following C library functions are used: + * - strcpy, strcmp (inside the measurement loop) + * - printf, scanf (outside the measurement loop) + * In addition, Berkeley UNIX system calls "times ()" or "time ()" + * are used for execution time measurement. For measurements + * on other systems, these calls have to be changed. + * + * Collection of Results: + * Reinhold Weicker (address see above) and + * + * Rick Richardson + * PC Research. Inc. + * 94 Apple Orchard Drive + * Tinton Falls, NJ 07724 + * Phone: (201) 389-8963 (9-17 EST) + * Usenet: ...!uunet!pcrat!rick + * + * Please send results to Rick Richardson and/or Reinhold Weicker. + * Complete information should be given on hardware and software used. + * Hardware information includes: Machine type, CPU, type and size + * of caches; for microprocessors: clock frequency, memory speed + * (number of wait states). + * Software information includes: Compiler (and runtime library) + * manufacturer and version, compilation switches, OS version. + * The Operating System version may give an indication about the + * compiler; Dhrystone itself performs no OS calls in the measurement loop. + * + * The complete output generated by the program should be mailed + * such that at least some checks for correctness can be made. + * + *************************************************************************** + * + * History: This version C/2.1 has been made for two reasons: + * + * 1) There is an obvious need for a common C version of + * Dhrystone, since C is at present the most popular system + * programming language for the class of processors + * (microcomputers, minicomputers) where Dhrystone is used most. + * There should be, as far as possible, only one C version of + * Dhrystone such that results can be compared without + * restrictions. In the past, the C versions distributed + * by Rick Richardson (Version 1.1) and by Reinhold Weicker + * had small (though not significant) differences. + * + * 2) As far as it is possible without changes to the Dhrystone + * statistics, optimizing compilers should be prevented from + * removing significant statements. + * + * This C version has been developed in cooperation with + * Rick Richardson (Tinton Falls, NJ), it incorporates many + * ideas from the "Version 1.1" distributed previously by + * him over the UNIX network Usenet. + * I also thank Chaim Benedelac (National Semiconductor), + * David Ditzel (SUN), Earl Killian and John Mashey (MIPS), + * Alan Smith and Rafael Saavedra-Barrera (UC at Berkeley) + * for their help with comments on earlier versions of the + * benchmark. + * + * Changes: In the initialization part, this version follows mostly + * Rick Richardson's version distributed via Usenet, not the + * version distributed earlier via floppy disk by Reinhold Weicker. + * As a concession to older compilers, names have been made + * unique within the first 8 characters. + * Inside the measurement loop, this version follows the + * version previously distributed by Reinhold Weicker. + * + * At several places in the benchmark, code has been added, + * but within the measurement loop only in branches that + * are not executed. The intention is that optimizing compilers + * should be prevented from moving code out of the measurement + * loop, or from removing code altogether. Since the statements + * that are executed within the measurement loop have NOT been + * changed, the numbers defining the "Dhrystone distribution" + * (distribution of statements, operand types and locality) + * still hold. Except for sophisticated optimizing compilers, + * execution times for this version should be the same as + * for previous versions. + * + * Since it has proven difficult to subtract the time for the + * measurement loop overhead in a correct way, the loop check + * has been made a part of the benchmark. This does have + * an impact - though a very minor one - on the distribution + * statistics which have been updated for this version. + * + * All changes within the measurement loop are described + * and discussed in the companion paper "Rationale for + * Dhrystone version 2". + * + * Because of the self-imposed limitation that the order and + * distribution of the executed statements should not be + * changed, there are still cases where optimizing compilers + * may not generate code for some statements. To a certain + * degree, this is unavoidable for small synthetic benchmarks. + * Users of the benchmark are advised to check code listings + * whether code is generated for all statements of Dhrystone. + * + * Version 2.1 is identical to version 2.0 distributed via + * the UNIX network Usenet in March 1988 except that it corrects + * some minor deficiencies that were found by users of version 2.0. + * The only change within the measurement loop is that a + * non-executed "else" part was added to the "if" statement in + * Func_3, and a non-executed "else" part removed from Proc_3. + * + *************************************************************************** + * + * Defines: The following "Defines" are possible: + * -DREG=register (default: Not defined) + * As an approximation to what an average C programmer + * might do, the "register" storage class is applied + * (if enabled by -DREG=register) + * - for local variables, if they are used (dynamically) + * five or more times + * - for parameters if they are used (dynamically) + * six or more times + * Note that an optimal "register" strategy is + * compiler-dependent, and that "register" declarations + * do not necessarily lead to faster execution. + * -DNOSTRUCTASSIGN (default: Not defined) + * Define if the C compiler does not support + * assignment of structures. + * -DNOENUMS (default: Not defined) + * Define if the C compiler does not support + * enumeration types. + * -DTIMES (default) + * -DTIME + * The "times" function of UNIX (returning process times) + * or the "time" function (returning wallclock time) + * is used for measurement. + * For single user machines, "time ()" is adequate. For + * multi-user machines where you cannot get single-user + * access, use the "times ()" function. If you have + * neither, use a stopwatch in the dead of night. + * "printf"s are provided marking the points "Start Timer" + * and "Stop Timer". DO NOT use the UNIX "time(1)" + * command, as this will measure the total time to + * run this program, which will (erroneously) include + * the time to allocate storage (malloc) and to perform + * the initialization. + * -DHZ=nnn + * In Berkeley UNIX, the function "times" returns process + * time in 1/HZ seconds, with HZ = 60 for most systems. + * CHECK YOUR SYSTEM DESCRIPTION BEFORE YOU JUST APPLY + * A VALUE. + * + *************************************************************************** + * + * Compilation model and measurement (IMPORTANT): + * + * This C version of Dhrystone consists of three files: + * - dhry.h (this file, containing global definitions and comments) + * - dhry_1.c (containing the code corresponding to Ada package Pack_1) + * - dhry_2.c (containing the code corresponding to Ada package Pack_2) + * + * The following "ground rules" apply for measurements: + * - Separate compilation + * - No procedure merging + * - Otherwise, compiler optimizations are allowed but should be indicated + * - Default results are those without register declarations + * See the companion paper "Rationale for Dhrystone Version 2" for a more + * detailed discussion of these ground rules. + * + * For 16-Bit processors (e.g. 80186, 80286), times for all compilation + * models ("small", "medium", "large" etc.) should be given if possible, + * together with a definition of these models for the compiler system used. + * + ************************************************************************** + * + * Dhrystone (C version) statistics: + * + * [Comment from the first distribution, updated for version 2. + * Note that because of language differences, the numbers are slightly + * different from the Ada version.] + * + * The following program contains statements of a high level programming + * language (here: C) in a distribution considered representative: + * + * assignments 52 (51.0 %) + * control statements 33 (32.4 %) + * procedure, function calls 17 (16.7 %) + * + * 103 statements are dynamically executed. The program is balanced with + * respect to the three aspects: + * + * - statement type + * - operand type + * - operand locality + * operand global, local, parameter, or constant. + * + * The combination of these three aspects is balanced only approximately. + * + * 1. Statement Type: + * ----------------- number + * + * V1 = V2 9 + * (incl. V1 = F(..) + * V = Constant 12 + * Assignment, 7 + * with array element + * Assignment, 6 + * with record component + * -- + * 34 34 + * + * X = Y +|-|"&&"|"|" Z 5 + * X = Y +|-|"==" Constant 6 + * X = X +|- 1 3 + * X = Y *|/ Z 2 + * X = Expression, 1 + * two operators + * X = Expression, 1 + * three operators + * -- + * 18 18 + * + * if .... 14 + * with "else" 7 + * without "else" 7 + * executed 3 + * not executed 4 + * for ... 7 | counted every time + * while ... 4 | the loop condition + * do ... while 1 | is evaluated + * switch ... 1 + * break 1 + * declaration with 1 + * initialization + * -- + * 34 34 + * + * P (...) procedure call 11 + * user procedure 10 + * library procedure 1 + * X = F (...) + * function call 6 + * user function 5 + * library function 1 + * -- + * 17 17 + * --- + * 103 + * + * The average number of parameters in procedure or function calls + * is 1.82 (not counting the function values aX * + * + * 2. Operators + * ------------ + * number approximate + * percentage + * + * Arithmetic 32 50.8 + * + * + 21 33.3 + * - 7 11.1 + * * 3 4.8 + * / (int div) 1 1.6 + * + * Comparison 27 42.8 + * + * == 9 14.3 + * /= 4 6.3 + * > 1 1.6 + * < 3 4.8 + * >= 1 1.6 + * <= 9 14.3 + * + * Logic 4 6.3 + * + * && (AND-THEN) 1 1.6 + * | (OR) 1 1.6 + * ! (NOT) 2 3.2 + * + * -- ----- + * 63 100.1 + * + * + * 3. Operand Type (counted once per operand reference): + * --------------- + * number approximate + * percentage + * + * Integer 175 72.3 % + * Character 45 18.6 % + * Pointer 12 5.0 % + * String30 6 2.5 % + * Array 2 0.8 % + * Record 2 0.8 % + * --- ------- + * 242 100.0 % + * + * When there is an access path leading to the final operand (e.g. a record + * component), only the final data type on the access path is counted. + * + * + * 4. Operand Locality: + * ------------------- + * number approximate + * percentage + * + * local variable 114 47.1 % + * global variable 22 9.1 % + * parameter 45 18.6 % + * value 23 9.5 % + * reference 22 9.1 % + * function result 6 2.5 % + * constant 55 22.7 % + * --- ------- + * 242 100.0 % + * + * + * The program does not compute anything meaningful, but it is syntactically + * and semantically correct. All variables have a value assigned to them + * before they are used as a source operand. + * + * There has been no explicit effort to account for the effects of a + * cache, or to balance the use of long or short displacements for code or + * data. + * + *************************************************************************** + */ + +/* Compiler and system dependent definitions: */ + +#ifndef TIME +#undef TIMES +#define TIMES +#endif + /* Use times(2) time function unless */ + /* explicitly defined otherwise */ + +#ifdef MSC_CLOCK +#undef HZ +#undef TIMES +#include +#define HZ CLK_TCK +#endif + /* Use Microsoft C hi-res clock */ + +#ifdef TIMES +#include +#include + /* for "times" */ +#endif + +#define Mic_secs_Per_Second 1000000.0 + /* Berkeley UNIX C returns process times in seconds/HZ */ + +#ifdef NOSTRUCTASSIGN +#define structassign(d, s) memcpy(&(d), &(s), sizeof(d)) +#else +#define structassign(d, s) d = s +#endif + +#ifdef NOENUM +#define Ident_1 0 +#define Ident_2 1 +#define Ident_3 2 +#define Ident_4 3 +#define Ident_5 4 + typedef int Enumeration; +#else + typedef enum {Ident_1, Ident_2, Ident_3, Ident_4, Ident_5} + Enumeration; +#endif + /* for boolean and enumeration types in Ada, Pascal */ + +/* General definitions: */ + +#include + /* for strcpy, strcmp */ + +#define Null 0 + /* Value of a Null pointer */ +#define true 1 +#define false 0 + +typedef int One_Thirty; +typedef int One_Fifty; +typedef char Capital_Letter; +typedef int Boolean; +typedef char Str_30 [31]; +typedef int Arr_1_Dim [50]; +typedef int Arr_2_Dim [50] [50]; + +typedef struct record + { + struct record *Ptr_Comp; + Enumeration Discr; + union { + struct { + Enumeration Enum_Comp; + int Int_Comp; + char Str_Comp [31]; + } var_1; + struct { + Enumeration E_Comp_2; + char Str_2_Comp [31]; + } var_2; + struct { + char Ch_1_Comp; + char Ch_2_Comp; + } var_3; + } variant; + } Rec_Type, *Rec_Pointer; + + diff --git a/test/apps/tests/dhrystone/dhry_1.c b/test/apps/tests/dhrystone/dhry_1.c new file mode 100644 index 0000000..164c6f9 --- /dev/null +++ b/test/apps/tests/dhrystone/dhry_1.c @@ -0,0 +1,395 @@ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry_1.c (part 2 of 3) + * + * Date: May 25, 1988 + * + * Author: Reinhold P. Weicker + * + **************************************************************************** + */ + +#include "dhry.h" + +/* Global Variables: */ + +Rec_Pointer Ptr_Glob, + Next_Ptr_Glob; +int Int_Glob; +Boolean Bool_Glob; +char Ch_1_Glob, + Ch_2_Glob; +int Arr_1_Glob [50]; +int Arr_2_Glob [50] [50]; + +extern char *malloc (); +Enumeration Func_1 (); + /* forward declaration necessary since Enumeration may not simply be int */ + +#ifndef REG + Boolean Reg = false; +#define REG + /* REG becomes defined as empty */ + /* i.e. no register variables */ +#else + Boolean Reg = true; +#endif + +/* variables for time measurement: */ + +#ifdef TIMES +struct tms time_info; +extern int times (); + /* see library function "times" */ +#define Too_Small_Time (2*HZ) + /* Measurements should last at least about 2 seconds */ +#endif +#ifdef TIME +extern long time(); + /* see library function "time" */ +#define Too_Small_Time 2 + /* Measurements should last at least 2 seconds */ +#endif +#ifdef MSC_CLOCK +extern clock_t clock(); +#define Too_Small_Time (2*HZ) +#endif + +long Begin_Time, + End_Time, + User_Time; +float Microseconds, + Dhrystones_Per_Second; + +/* end of variables for time measurement */ + + +main () +/*****/ + + /* main program, corresponds to procedures */ + /* Main and Proc_0 in the Ada version */ +{ + One_Fifty Int_1_Loc; + REG One_Fifty Int_2_Loc; + One_Fifty Int_3_Loc; + REG char Ch_Index; + Enumeration Enum_Loc; + Str_30 Str_1_Loc; + Str_30 Str_2_Loc; + REG int Run_Index; + REG int Number_Of_Runs; + + /* Initializations */ + + Next_Ptr_Glob = (Rec_Pointer) malloc (sizeof (Rec_Type)); + Ptr_Glob = (Rec_Pointer) malloc (sizeof (Rec_Type)); + + Ptr_Glob->Ptr_Comp = Next_Ptr_Glob; + Ptr_Glob->Discr = Ident_1; + Ptr_Glob->variant.var_1.Enum_Comp = Ident_3; + Ptr_Glob->variant.var_1.Int_Comp = 40; + strcpy (Ptr_Glob->variant.var_1.Str_Comp, + "DHRYSTONE PROGRAM, SOME STRING"); + strcpy (Str_1_Loc, "DHRYSTONE PROGRAM, 1'ST STRING"); + + Arr_2_Glob [8][7] = 10; + /* Was missing in published program. Without this statement, */ + /* Arr_2_Glob [8][7] would have an undefined value. */ + /* Warning: With 16-Bit processors and Number_Of_Runs > 32000, */ + /* overflow may occur for this array element. */ + + printf ("\n"); + printf ("Dhrystone Benchmark, Version 2.1 (Language: C)\n"); + printf ("\n"); + if (Reg) + { + printf ("Program compiled with 'register' attribute\n"); + printf ("\n"); + } + else + { + printf ("Program compiled without 'register' attribute\n"); + printf ("\n"); + } + printf ("Please give the number of runs through the benchmark: "); + { + int n; + scanf ("%d", &n); + Number_Of_Runs = n; + } + printf ("\n"); + + printf ("Execution starts, %d runs through Dhrystone\n", Number_Of_Runs); + + /***************/ + /* Start timer */ + /***************/ + +#ifdef TIMES + times (&time_info); + Begin_Time = (long) time_info.tms_utime; +#endif +#ifdef TIME + Begin_Time = time ( (long *) 0); +#endif +#ifdef MSC_CLOCK + Begin_Time = clock(); +#endif + + for (Run_Index = 1; Run_Index <= Number_Of_Runs; ++Run_Index) + { + + Proc_5(); + Proc_4(); + /* Ch_1_Glob == 'A', Ch_2_Glob == 'B', Bool_Glob == true */ + Int_1_Loc = 2; + Int_2_Loc = 3; + strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 2'ND STRING"); + Enum_Loc = Ident_2; + Bool_Glob = ! Func_2 (Str_1_Loc, Str_2_Loc); + /* Bool_Glob == 1 */ + while (Int_1_Loc < Int_2_Loc) /* loop body executed once */ + { + Int_3_Loc = 5 * Int_1_Loc - Int_2_Loc; + /* Int_3_Loc == 7 */ + Proc_7 (Int_1_Loc, Int_2_Loc, &Int_3_Loc); + /* Int_3_Loc == 7 */ + Int_1_Loc += 1; + } /* while */ + /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ + Proc_8 (Arr_1_Glob, Arr_2_Glob, Int_1_Loc, Int_3_Loc); + /* Int_Glob == 5 */ + Proc_1 (Ptr_Glob); + for (Ch_Index = 'A'; Ch_Index <= Ch_2_Glob; ++Ch_Index) + /* loop body executed twice */ + { + if (Enum_Loc == Func_1 (Ch_Index, 'C')) + /* then, not executed */ + { + Proc_6 (Ident_1, &Enum_Loc); + strcpy (Str_2_Loc, "DHRYSTONE PROGRAM, 3'RD STRING"); + Int_2_Loc = Run_Index; + Int_Glob = Run_Index; + } + } + /* Int_1_Loc == 3, Int_2_Loc == 3, Int_3_Loc == 7 */ + Int_2_Loc = Int_2_Loc * Int_1_Loc; + Int_1_Loc = Int_2_Loc / Int_3_Loc; + Int_2_Loc = 7 * (Int_2_Loc - Int_3_Loc) - Int_1_Loc; + /* Int_1_Loc == 1, Int_2_Loc == 13, Int_3_Loc == 7 */ + Proc_2 (&Int_1_Loc); + /* Int_1_Loc == 5 */ + + } /* loop "for Run_Index" */ + + /**************/ + /* Stop timer */ + /**************/ + +#ifdef TIMES + times (&time_info); + End_Time = (long) time_info.tms_utime; +#endif +#ifdef TIME + End_Time = time ( (long *) 0); +#endif +#ifdef MSC_CLOCK + End_Time = clock(); +#endif + + printf ("Execution ends\n"); + printf ("\n"); + printf ("Final values of the variables used in the benchmark:\n"); + printf ("\n"); + printf ("Int_Glob: %d\n", Int_Glob); + printf (" should be: %d\n", 5); + printf ("Bool_Glob: %d\n", Bool_Glob); + printf (" should be: %d\n", 1); + printf ("Ch_1_Glob: %c\n", Ch_1_Glob); + printf (" should be: %c\n", 'A'); + printf ("Ch_2_Glob: %c\n", Ch_2_Glob); + printf (" should be: %c\n", 'B'); + printf ("Arr_1_Glob[8]: %d\n", Arr_1_Glob[8]); + printf (" should be: %d\n", 7); + printf ("Arr_2_Glob[8][7]: %d\n", Arr_2_Glob[8][7]); + printf (" should be: Number_Of_Runs + 10\n"); + printf ("Ptr_Glob->\n"); + printf (" Ptr_Comp: %d\n", (int) Ptr_Glob->Ptr_Comp); + printf (" should be: (implementation-dependent)\n"); + printf (" Discr: %d\n", Ptr_Glob->Discr); + printf (" should be: %d\n", 0); + printf (" Enum_Comp: %d\n", Ptr_Glob->variant.var_1.Enum_Comp); + printf (" should be: %d\n", 2); + printf (" Int_Comp: %d\n", Ptr_Glob->variant.var_1.Int_Comp); + printf (" should be: %d\n", 17); + printf (" Str_Comp: %s\n", Ptr_Glob->variant.var_1.Str_Comp); + printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); + printf ("Next_Ptr_Glob->\n"); + printf (" Ptr_Comp: %d\n", (int) Next_Ptr_Glob->Ptr_Comp); + printf (" should be: (implementation-dependent), same as above\n"); + printf (" Discr: %d\n", Next_Ptr_Glob->Discr); + printf (" should be: %d\n", 0); + printf (" Enum_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Enum_Comp); + printf (" should be: %d\n", 1); + printf (" Int_Comp: %d\n", Next_Ptr_Glob->variant.var_1.Int_Comp); + printf (" should be: %d\n", 18); + printf (" Str_Comp: %s\n", + Next_Ptr_Glob->variant.var_1.Str_Comp); + printf (" should be: DHRYSTONE PROGRAM, SOME STRING\n"); + printf ("Int_1_Loc: %d\n", Int_1_Loc); + printf (" should be: %d\n", 5); + printf ("Int_2_Loc: %d\n", Int_2_Loc); + printf (" should be: %d\n", 13); + printf ("Int_3_Loc: %d\n", Int_3_Loc); + printf (" should be: %d\n", 7); + printf ("Enum_Loc: %d\n", Enum_Loc); + printf (" should be: %d\n", 1); + printf ("Str_1_Loc: %s\n", Str_1_Loc); + printf (" should be: DHRYSTONE PROGRAM, 1'ST STRING\n"); + printf ("Str_2_Loc: %s\n", Str_2_Loc); + printf (" should be: DHRYSTONE PROGRAM, 2'ND STRING\n"); + printf ("\n"); + + User_Time = End_Time - Begin_Time; + + if (User_Time < Too_Small_Time) + { + printf ("Measured time too small to obtain meaningful results\n"); + printf ("Please increase number of runs\n"); + printf ("\n"); + } + else + { +#ifdef TIME + Microseconds = (float) User_Time * Mic_secs_Per_Second + / (float) Number_Of_Runs; + Dhrystones_Per_Second = (float) Number_Of_Runs / (float) User_Time; +#else + Microseconds = (float) User_Time * Mic_secs_Per_Second + / ((float) HZ * ((float) Number_Of_Runs)); + Dhrystones_Per_Second = ((float) HZ * (float) Number_Of_Runs) + / (float) User_Time; +#endif + printf ("Microseconds for one run through Dhrystone: "); + printf ("%6.1f \n", Microseconds); + printf ("Dhrystones per Second: "); + printf ("%6.1f \n", Dhrystones_Per_Second); + printf ("\n"); + } + +} + + +Proc_1 (Ptr_Val_Par) +/******************/ + +REG Rec_Pointer Ptr_Val_Par; + /* executed once */ +{ + REG Rec_Pointer Next_Record = Ptr_Val_Par->Ptr_Comp; + /* == Ptr_Glob_Next */ + /* Local variable, initialized with Ptr_Val_Par->Ptr_Comp, */ + /* corresponds to "rename" in Ada, "with" in Pascal */ + + structassign (*Ptr_Val_Par->Ptr_Comp, *Ptr_Glob); + Ptr_Val_Par->variant.var_1.Int_Comp = 5; + Next_Record->variant.var_1.Int_Comp + = Ptr_Val_Par->variant.var_1.Int_Comp; + Next_Record->Ptr_Comp = Ptr_Val_Par->Ptr_Comp; + Proc_3 (&Next_Record->Ptr_Comp); + /* Ptr_Val_Par->Ptr_Comp->Ptr_Comp + == Ptr_Glob->Ptr_Comp */ + if (Next_Record->Discr == Ident_1) + /* then, executed */ + { + Next_Record->variant.var_1.Int_Comp = 6; + Proc_6 (Ptr_Val_Par->variant.var_1.Enum_Comp, + &Next_Record->variant.var_1.Enum_Comp); + Next_Record->Ptr_Comp = Ptr_Glob->Ptr_Comp; + Proc_7 (Next_Record->variant.var_1.Int_Comp, 10, + &Next_Record->variant.var_1.Int_Comp); + } + else /* not executed */ + structassign (*Ptr_Val_Par, *Ptr_Val_Par->Ptr_Comp); +} /* Proc_1 */ + + +Proc_2 (Int_Par_Ref) +/******************/ + /* executed once */ + /* *Int_Par_Ref == 1, becomes 4 */ + +One_Fifty *Int_Par_Ref; +{ + One_Fifty Int_Loc; + Enumeration Enum_Loc; + + Int_Loc = *Int_Par_Ref + 10; + do /* executed once */ + if (Ch_1_Glob == 'A') + /* then, executed */ + { + Int_Loc -= 1; + *Int_Par_Ref = Int_Loc - Int_Glob; + Enum_Loc = Ident_1; + } /* if */ + while (Enum_Loc != Ident_1); /* true */ +} /* Proc_2 */ + + +Proc_3 (Ptr_Ref_Par) +/******************/ + /* executed once */ + /* Ptr_Ref_Par becomes Ptr_Glob */ + +Rec_Pointer *Ptr_Ref_Par; + +{ + if (Ptr_Glob != Null) + /* then, executed */ + *Ptr_Ref_Par = Ptr_Glob->Ptr_Comp; + Proc_7 (10, Int_Glob, &Ptr_Glob->variant.var_1.Int_Comp); +} /* Proc_3 */ + + +Proc_4 () /* without parameters */ +/*******/ + /* executed once */ +{ + Boolean Bool_Loc; + + Bool_Loc = Ch_1_Glob == 'A'; + Bool_Glob = Bool_Loc | Bool_Glob; + Ch_2_Glob = 'B'; +} /* Proc_4 */ + + +Proc_5 () /* without parameters */ +/*******/ + /* executed once */ +{ + Ch_1_Glob = 'A'; + Bool_Glob = false; +} /* Proc_5 */ + + + /* Procedure for the assignment of structures, */ + /* if the C compiler doesn't support this feature */ +#ifdef NOSTRUCTASSIGN +memcpy (d, s, l) +register char *d; +register char *s; +register int l; +{ + while (l--) *d++ = *s++; +} +#endif + + diff --git a/test/apps/tests/dhrystone/dhry_2.c b/test/apps/tests/dhrystone/dhry_2.c new file mode 100644 index 0000000..63a3d3e --- /dev/null +++ b/test/apps/tests/dhrystone/dhry_2.c @@ -0,0 +1,192 @@ +/* + **************************************************************************** + * + * "DHRYSTONE" Benchmark Program + * ----------------------------- + * + * Version: C, Version 2.1 + * + * File: dhry_2.c (part 3 of 3) + * + * Date: May 25, 1988 + * + * Author: Reinhold P. Weicker + * + **************************************************************************** + */ + +#include "dhry.h" + +#ifndef REG +#define REG + /* REG becomes defined as empty */ + /* i.e. no register variables */ +#endif + +extern int Int_Glob; +extern char Ch_1_Glob; + + +Proc_6 (Enum_Val_Par, Enum_Ref_Par) +/*********************************/ + /* executed once */ + /* Enum_Val_Par == Ident_3, Enum_Ref_Par becomes Ident_2 */ + +Enumeration Enum_Val_Par; +Enumeration *Enum_Ref_Par; +{ + *Enum_Ref_Par = Enum_Val_Par; + if (! Func_3 (Enum_Val_Par)) + /* then, not executed */ + *Enum_Ref_Par = Ident_4; + switch (Enum_Val_Par) + { + case Ident_1: + *Enum_Ref_Par = Ident_1; + break; + case Ident_2: + if (Int_Glob > 100) + /* then */ + *Enum_Ref_Par = Ident_1; + else *Enum_Ref_Par = Ident_4; + break; + case Ident_3: /* executed */ + *Enum_Ref_Par = Ident_2; + break; + case Ident_4: break; + case Ident_5: + *Enum_Ref_Par = Ident_3; + break; + } /* switch */ +} /* Proc_6 */ + + +Proc_7 (Int_1_Par_Val, Int_2_Par_Val, Int_Par_Ref) +/**********************************************/ + /* executed three times */ + /* first call: Int_1_Par_Val == 2, Int_2_Par_Val == 3, */ + /* Int_Par_Ref becomes 7 */ + /* second call: Int_1_Par_Val == 10, Int_2_Par_Val == 5, */ + /* Int_Par_Ref becomes 17 */ + /* third call: Int_1_Par_Val == 6, Int_2_Par_Val == 10, */ + /* Int_Par_Ref becomes 18 */ +One_Fifty Int_1_Par_Val; +One_Fifty Int_2_Par_Val; +One_Fifty *Int_Par_Ref; +{ + One_Fifty Int_Loc; + + Int_Loc = Int_1_Par_Val + 2; + *Int_Par_Ref = Int_2_Par_Val + Int_Loc; +} /* Proc_7 */ + + +Proc_8 (Arr_1_Par_Ref, Arr_2_Par_Ref, Int_1_Par_Val, Int_2_Par_Val) +/*********************************************************************/ + /* executed once */ + /* Int_Par_Val_1 == 3 */ + /* Int_Par_Val_2 == 7 */ +Arr_1_Dim Arr_1_Par_Ref; +Arr_2_Dim Arr_2_Par_Ref; +int Int_1_Par_Val; +int Int_2_Par_Val; +{ + REG One_Fifty Int_Index; + REG One_Fifty Int_Loc; + + Int_Loc = Int_1_Par_Val + 5; + Arr_1_Par_Ref [Int_Loc] = Int_2_Par_Val; + Arr_1_Par_Ref [Int_Loc+1] = Arr_1_Par_Ref [Int_Loc]; + Arr_1_Par_Ref [Int_Loc+30] = Int_Loc; + for (Int_Index = Int_Loc; Int_Index <= Int_Loc+1; ++Int_Index) + Arr_2_Par_Ref [Int_Loc] [Int_Index] = Int_Loc; + Arr_2_Par_Ref [Int_Loc] [Int_Loc-1] += 1; + Arr_2_Par_Ref [Int_Loc+20] [Int_Loc] = Arr_1_Par_Ref [Int_Loc]; + Int_Glob = 5; +} /* Proc_8 */ + + +Enumeration Func_1 (Ch_1_Par_Val, Ch_2_Par_Val) +/*************************************************/ + /* executed three times */ + /* first call: Ch_1_Par_Val == 'H', Ch_2_Par_Val == 'R' */ + /* second call: Ch_1_Par_Val == 'A', Ch_2_Par_Val == 'C' */ + /* third call: Ch_1_Par_Val == 'B', Ch_2_Par_Val == 'C' */ + +Capital_Letter Ch_1_Par_Val; +Capital_Letter Ch_2_Par_Val; +{ + Capital_Letter Ch_1_Loc; + Capital_Letter Ch_2_Loc; + + Ch_1_Loc = Ch_1_Par_Val; + Ch_2_Loc = Ch_1_Loc; + if (Ch_2_Loc != Ch_2_Par_Val) + /* then, executed */ + return (Ident_1); + else /* not executed */ + { + Ch_1_Glob = Ch_1_Loc; + return (Ident_2); + } +} /* Func_1 */ + + +Boolean Func_2 (Str_1_Par_Ref, Str_2_Par_Ref) +/*************************************************/ + /* executed once */ + /* Str_1_Par_Ref == "DHRYSTONE PROGRAM, 1'ST STRING" */ + /* Str_2_Par_Ref == "DHRYSTONE PROGRAM, 2'ND STRING" */ + +Str_30 Str_1_Par_Ref; +Str_30 Str_2_Par_Ref; +{ + REG One_Thirty Int_Loc; + Capital_Letter Ch_Loc; + + Int_Loc = 2; + while (Int_Loc <= 2) /* loop body executed once */ + if (Func_1 (Str_1_Par_Ref[Int_Loc], + Str_2_Par_Ref[Int_Loc+1]) == Ident_1) + /* then, executed */ + { + Ch_Loc = 'A'; + Int_Loc += 1; + } /* if, while */ + if (Ch_Loc >= 'W' && Ch_Loc < 'Z') + /* then, not executed */ + Int_Loc = 7; + if (Ch_Loc == 'R') + /* then, not executed */ + return (true); + else /* executed */ + { + if (strcmp (Str_1_Par_Ref, Str_2_Par_Ref) > 0) + /* then, not executed */ + { + Int_Loc += 7; + Int_Glob = Int_Loc; + return (true); + } + else /* executed */ + return (false); + } /* if Ch_Loc */ +} /* Func_2 */ + + +Boolean Func_3 (Enum_Par_Val) +/***************************/ + /* executed once */ + /* Enum_Par_Val == Ident_3 */ +Enumeration Enum_Par_Val; +{ + Enumeration Enum_Loc; + + Enum_Loc = Enum_Par_Val; + if (Enum_Loc == Ident_3) + /* then, executed */ + return (true); + else /* not executed */ + return (false); +} /* Func_3 */ + diff --git a/test/apps/tests/dhrystone/dhrystone.c b/test/apps/tests/dhrystone/dhrystone.c new file mode 100644 index 0000000..41c7210 --- /dev/null +++ b/test/apps/tests/dhrystone/dhrystone.c @@ -0,0 +1,772 @@ +/***** hpda:net.sources / homxb!gemini / 1:58 am Apr 1, 1986*/ +/* EVERBODY: Please read "APOLOGY" below. -rick 01/06/85 + * See introduction in net.arch, or net.micro + * + * "DHRYSTONE" Benchmark Program + * + * Version: C/1.1, 12/01/84 + * + * Date: PROGRAM updated 01/06/86, RESULTS updated 03/31/86 + * + * Author: Reinhold P. Weicker, CACM Vol 27, No 10, 10/84 pg. 1013 + * Translated from ADA by Rick Richardson + * Every method to preserve ADA-likeness has been used, + * at the expense of C-ness. + * + * Compile: cc -O dry.c -o drynr : No registers + * cc -O -DREG=register dry.c -o dryr : Registers + * + * Defines: Defines are provided for old C compiler's + * which don't have enums, and can't assign structures. + * The time(2) function is library dependant; Most + * return the time in seconds, but beware of some, like + * Aztec C, which return other units. + * The LOOPS define is initially set for 50000 loops. + * If you have a machine with large integers and is + * very fast, please change this number to 500000 to + * get better accuracy. Please select the way to + * measure the execution time using the TIME define. + * For single user machines, time(2) is adequate. For + * multi-user machines where you cannot get single-user + * access, use the times(2) function. If you have + * neither, use a stopwatch in the dead of night. + * Use a "printf" at the point marked "start timer" + * to begin your timings. DO NOT use the UNIX "time(1)" + * command, as this will measure the total time to + * run this program, which will (erroneously) include + * the time to malloc(3) storage and to compute the + * time it takes to do nothing. + * + * Run: drynr; dryr + * + * Results: If you get any new machine/OS results, please send to: + * + * ihnp4!castor!pcrat!rick + * + * and thanks to all that do. Space prevents listing + * the names of those who have provided some of these + * results. I'll be forwarding these results to + * Rheinhold Weicker. + * + * Note: I order the list in increasing performance of the + * "with registers" benchmark. If the compiler doesn't + * provide register variables, then the benchmark + * is the same for both REG and NOREG. + * + * PLEASE: Send complete information about the machine type, + * clock speed, OS and C manufacturer/version. If + * the machine is modified, tell me what was done. + * On UNIX, execute uname -a and cc -V to get this info. + * + * 80x8x NOTE: 80x8x benchers: please try to do all memory models + * for a particular compiler. + * + * APOLOGY (1/30/86): + * Well, I goofed things up! As pointed out by Haakon Bugge, + * the line of code marked "GOOF" below was missing from the + * Dhrystone distribution for the last several months. It + * *WAS* in a backup copy I made last winter, so no doubt it + * was victimized by sleepy fingers operating vi! + * + * The effect of the line missing is that the reported benchmarks + * are 15% too fast (at least on a 80286). Now, this creates + * a dilema - do I throw out ALL the data so far collected + * and use only results from this (corrected) version, or + * do I just keep collecting data for the old version? + * + * Since the data collected so far *is* valid as long as it + * is compared with like data, I have decided to keep + * TWO lists- one for the old benchmark, and one for the + * new. This also gives me an opportunity to correct one + * other error I made in the instructions for this benchmark. + * My experience with C compilers has been mostly with + * UNIX 'pcc' derived compilers, where the 'optimizer' simply + * fixes sloppy code generation (peephole optimization). + * But today, there exist C compiler optimizers that will actually + * perform optimization in the Computer Science sense of the word, + * by removing, for example, assignments to a variable whose + * value is never used. Dhrystone, unfortunately, provides + * lots of opportunities for this sort of optimization. + * + * I request that benchmarkers re-run this new, corrected + * version of Dhrystone, turning off or bypassing optimizers + * which perform more than peephole optimization. Please + * indicate the version of Dhrystone used when reporting the + * results to me. + * + * RESULTS BEGIN HERE + * + *----------------DHRYSTONE VERSION 1.1 RESULTS BEGIN-------------------------- + * + * MACHINE MICROPROCESSOR OPERATING COMPILER DHRYSTONES/SEC. + * TYPE SYSTEM NO REG REGS + * -------------------------- ------------ ----------- --------------- + * Apple IIe 65C02-1.02Mhz DOS 3.3 Aztec CII v1.05i 37 37 + * - Z80-2.5Mhz CPM-80 v2.2 Aztec CII v1.05g 91 91 + * - 8086-8Mhz RMX86 V6 Intel C-86 V2.0 197 203LM?? + * IBM PC/XT 8088-4.77Mhz COHERENT 2.3.43 Mark Wiiliams 259 275 + * - 8086-8Mhz RMX86 V6 Intel C-86 V2.0 287 304 ?? + * Fortune 32:16 68000-6Mhz V7+sys3+4.1BSD cc 360 346 + * PDP-11/34A w/FP-11C UNIX V7m cc 406 449 + * Macintosh512 68000-7.7Mhz Mac ROM O/S DeSmet(C ware) 625 625 + * VAX-11/750 w/FPA UNIX 4.2BSD cc 831 852 + * DataMedia 932 68000-10Mhz UNIX sysV cc 837 888 + * Plexus P35 68000-12.5Mhz UNIX sysIII cc 835 894 + * ATT PC7300 68010-10Mhz UNIX 5.0.3 cc 973 1034 + * Compaq II 80286-8Mhz MSDOS 3.1 MS C 3.0 1086 1140 LM + * IBM PC/AT 80286-7.5Mhz Venix/286 SVR2 cc 1159 1254 *15 + * Compaq II 80286-8Mhz MSDOS 3.1 MS C 3.0 1190 1282 MM + * MicroVAX II - Mach/4.3 cc 1361 1385 + * DEC uVAX II - Ultrix-32m v1.1 cc 1385 1399 + * Compaq II 80286-8Mhz MSDOS 3.1 MS C 3.0 1351 1428 + * VAX 11/780 - UNIX 4.2BSD cc 1417 1441 + * VAX-780/MA780 Mach/4.3 cc 1428 1470 + * VAX 11/780 - UNIX 5.0.1 cc 4.1.1.31 1650 1640 + * Ridge 32C V1 - ROS 3.3 Ridge C (older) 1628 1695 + * Gould PN6005 - UTX 1.1c+ (4.2) cc 1732 1884 + * Gould PN9080 custom ECL UTX-32 1.1C cc 4745 4992 + * VAX-784 - Mach/4.3 cc 5263 5555 &4 + * VAX 8600 - 4.3 BSD cc 6329 6423 + * Amdahl 5860 - UTS sysV cc 1.22 28735 28846 + * IBM3090/200 - ? ? 31250 31250 + * + * + *----------------DHRYSTONE VERSION 1.0 RESULTS BEGIN-------------------------- + * + * MACHINE MICROPROCESSOR OPERATING COMPILER DHRYSTONES/SEC. + * TYPE SYSTEM NO REG REGS + * -------------------------- ------------ ----------- --------------- + * Commodore 64 6510-1MHz C64 ROM C Power 2.8 36 36 + * HP-110 8086-5.33Mhz MSDOS 2.11 Lattice 2.14 284 284 + * IBM PC/XT 8088-4.77Mhz PC/IX cc 271 294 + * CCC 3205 - Xelos(SVR2) cc 558 592 + * Perq-II 2901 bitslice Accent S5c cc (CMU) 301 301 + * IBM PC/XT 8088-4.77Mhz COHERENT 2.3.43 MarkWilliams cc 296 317 + * Cosmos 68000-8Mhz UniSoft cc 305 322 + * IBM PC/XT 8088-4.77Mhz Venix/86 2.0 cc 297 324 + * DEC PRO 350 11/23 Venix/PRO SVR2 cc 299 325 + * IBM PC 8088-4.77Mhz MSDOS 2.0 b16cc 2.0 310 340 + * PDP11/23 11/23 Venix (V7) cc 320 358 + * Commodore Amiga ? Lattice 3.02 368 371 + * PC/XT 8088-4.77Mhz Venix/86 SYS V cc 339 377 + * IBM PC 8088-4.77Mhz MSDOS 2.0 CI-C86 2.20M 390 390 + * IBM PC/XT 8088-4.77Mhz PCDOS 2.1 Wizard 2.1 367 403 + * IBM PC/XT 8088-4.77Mhz PCDOS 3.1 Lattice 2.15 403 403 @ + * Colex DM-6 68010-8Mhz Unisoft SYSV cc 378 410 + * IBM PC 8088-4.77Mhz PCDOS 3.1 Datalight 1.10 416 416 + * IBM PC NEC V20-4.77Mhz MSDOS 3.1 MS 3.1 387 420 + * IBM PC/XT 8088-4.77Mhz PCDOS 2.1 Microsoft 3.0 390 427 + * IBM PC NEC V20-4.77Mhz MSDOS 3.1 MS 3.1 (186) 393 427 + * PDP-11/34 - UNIX V7M cc 387 438 + * IBM PC 8088, 4.77mhz PC-DOS 2.1 Aztec C v3.2d 423 454 + * Tandy 1000 V20, 4.77mhz MS-DOS 2.11 Aztec C v3.2d 423 458 + * Tandy TRS-16B 68000-6Mhz Xenix 1.3.5 cc 438 458 + * PDP-11/34 - RSTS/E decus c 438 495 + * Onyx C8002 Z8000-4Mhz IS/1 1.1 (V7) cc 476 511 + * Tandy TRS-16B 68000-6Mhz Xenix 1.3.5 Green Hills 609 617 + * DEC PRO 380 11/73 Venix/PRO SVR2 cc 577 628 + * FHL QT+ 68000-10Mhz Os9/68000 version 1.3 603 649 FH + * Apollo DN550 68010-?Mhz AegisSR9/IX cc 3.12 666 666 + * HP-110 8086-5.33Mhz MSDOS 2.11 Aztec-C 641 676 + * ATT PC6300 8086-8Mhz MSDOS 2.11 b16cc 2.0 632 684 + * IBM PC/AT 80286-6Mhz PCDOS 3.0 CI-C86 2.1 666 684 + * Tandy 6000 68000-8Mhz Xenix 3.0 cc 694 694 + * IBM PC/AT 80286-6Mhz Xenix 3.0 cc 684 704 MM + * Macintosh 68000-7.8Mhz 2M Mac Rom Mac C 32 bit int 694 704 + * Macintosh 68000-7.7Mhz - MegaMax C 2.0 661 709 + * Macintosh512 68000-7.7Mhz Mac ROM O/S DeSmet(C ware) 714 714 + * IBM PC/AT 80286-6Mhz Xenix 3.0 cc 704 714 LM + * Codata 3300 68000-8Mhz UniPlus+ (v7) cc 678 725 + * WICAT MB 68000-8Mhz System V WICAT C 4.1 585 731 ~ + * Cadmus 9000 68010-10Mhz UNIX cc 714 735 + * AT&T 6300 8086-8Mhz Venix/86 SVR2 cc 668 743 + * Cadmus 9790 68010-10Mhz 1MB SVR0,Cadmus3.7 cc 720 747 + * NEC PC9801F 8086-8Mhz PCDOS 2.11 Lattice 2.15 768 - @ + * ATT PC6300 8086-8Mhz MSDOS 2.11 CI-C86 2.20M 769 769 + * Burroughs XE550 68010-10Mhz Centix 2.10 cc 769 769 CT1 + * EAGLE/TURBO 8086-8Mhz Venix/86 SVR2 cc 696 779 + * ALTOS 586 8086-10Mhz Xenix 3.0b cc 724 793 + * DEC 11/73 J-11 micro Ultrix-11 V3.0 cc 735 793 + * ATT 3B2/300 WE32000-?Mhz UNIX 5.0.2 cc 735 806 + * Apollo DN320 68010-?Mhz AegisSR9/IX cc 3.12 806 806 + * IRIS-2400 68010-10Mhz UNIX System V cc 772 829 + * Atari 520ST 68000-8Mhz TOS DigResearch 839 846 + * IBM PC/AT 80286-6Mhz PCDOS 3.0 MS 3.0(large) 833 847 LM + * WICAT MB 68000-8Mhz System V WICAT C 4.1 675 853 S~ + * VAX 11/750 - Ultrix 1.1 4.2BSD cc 781 862 + * CCC 7350A 68000-8MHz UniSoft V.2 cc 821 875 + * VAX 11/750 - UNIX 4.2bsd cc 862 877 + * Fast Mac 68000-7.7Mhz - MegaMax C 2.0 839 904 + + * IBM PC/XT 8086-9.54Mhz PCDOS 3.1 Microsoft 3.0 833 909 C1 + * DEC 11/44 Ultrix-11 V3.0 cc 862 909 + * Macintosh 68000-7.8Mhz 2M Mac Rom Mac C 16 bit int 877 909 S + * CCC 3210 - Xelos R01(SVR2) cc 849 924 + * CCC 3220 - Ed. 7 v2.3 cc 892 925 + * IBM PC/AT 80286-6Mhz Xenix 3.0 cc -i 909 925 + * AT&T 6300 8086, 8mhz MS-DOS 2.11 Aztec C v3.2d 862 943 + * IBM PC/AT 80286-6Mhz Xenix 3.0 cc 892 961 + * VAX 11/750 w/FPA Eunice 3.2 cc 914 976 + * IBM PC/XT 8086-9.54Mhz PCDOS 3.1 Wizard 2.1 892 980 C1 + * IBM PC/XT 8086-9.54Mhz PCDOS 3.1 Lattice 2.15 980 980 C1 + * Plexus P35 68000-10Mhz UNIX System III cc 984 980 + * PDP-11/73 KDJ11-AA 15Mhz UNIX V7M 2.1 cc 862 981 + * VAX 11/750 w/FPA UNIX 4.3bsd cc 994 997 + * IRIS-1400 68010-10Mhz UNIX System V cc 909 1000 + * IBM PC/AT 80286-6Mhz Venix/86 2.1 cc 961 1000 + * IBM PC/AT 80286-6Mhz PCDOS 3.0 b16cc 2.0 943 1063 + * Zilog S8000/11 Z8001-5.5Mhz Zeus 3.2 cc 1011 1084 + * NSC ICM-3216 NSC 32016-10Mhz UNIX SVR2 cc 1041 1084 + * IBM PC/AT 80286-6Mhz PCDOS 3.0 MS 3.0(small) 1063 1086 + * VAX 11/750 w/FPA VMS VAX-11 C 2.0 958 1091 + * Stride 68000-10Mhz System-V/68 cc 1041 1111 + * Plexus P/60 MC68000-12.5Mhz UNIX SYSIII Plexus 1111 1111 + * ATT PC7300 68010-10Mhz UNIX 5.0.2 cc 1041 1111 + * CCC 3230 - Xelos R01(SVR2) cc 1040 1126 + * Stride 68000-12Mhz System-V/68 cc 1063 1136 + * IBM PC/AT 80286-6Mhz Venix/286 SVR2 cc 1056 1149 + * Plexus P/60 MC68000-12.5Mhz UNIX SYSIII Plexus 1111 1163 T + * IBM PC/AT 80286-6Mhz PCDOS 3.0 Datalight 1.10 1190 1190 + * ATT PC6300+ 80286-6Mhz MSDOS 3.1 b16cc 2.0 1111 1219 + * IBM PC/AT 80286-6Mhz PCDOS 3.1 Wizard 2.1 1136 1219 + * Sun2/120 68010-10Mhz Sun 4.2BSD cc 1136 1219 + * IBM PC/AT 80286-6Mhz PCDOS 3.0 CI-C86 2.20M 1219 1219 + * WICAT PB 68000-8Mhz System V WICAT C 4.1 998 1226 ~ + * MASSCOMP 500 68010-10MHz RTU V3.0 cc (V3.2) 1156 1238 + * Alliant FX/8 IP (68012-12Mhz) Concentrix cc -ip;exec -i 1170 1243 FX + * Cyb DataMate 68010-12.5Mhz Uniplus 5.0 Unisoft cc 1162 1250 + * PDP 11/70 - UNIX 5.2 cc 1162 1250 + * IBM PC/AT 80286-6Mhz PCDOS 3.1 Lattice 2.15 1250 1250 + * IBM PC/AT 80286-7.5Mhz Venix/86 2.1 cc 1190 1315 *15 + * Sun2/120 68010-10Mhz Standalone cc 1219 1315 + * Intel 380 80286-8Mhz Xenix R3.0up1 cc 1250 1315 *16 + * Sequent Balance 8000 NS32032-10MHz Dynix 2.0 cc 1250 1315 N12 + * IBM PC/DSI-32 32032-10Mhz MSDOS 3.1 GreenHills 2.14 1282 1315 C3 + * ATT 3B2/400 WE32100-?Mhz UNIX 5.2 cc 1315 1315 + * CCC 3250XP - Xelos R01(SVR2) cc 1215 1318 + * IBM PC/RT 032 RISC(801?)?Mhz BSD 4.2 cc 1248 1333 RT + * DG MV4000 - AOS/VS 5.00 cc 1333 1333 + * IBM PC/AT 80286-8Mhz Venix/86 2.1 cc 1275 1380 *16 + * IBM PC/AT 80286-6Mhz MSDOS 3.0 Microsoft 3.0 1250 1388 + * ATT PC6300+ 80286-6Mhz MSDOS 3.1 CI-C86 2.20M 1428 1428 + * COMPAQ/286 80286-8Mhz Venix/286 SVR2 cc 1326 1443 + * IBM PC/AT 80286-7.5Mhz Venix/286 SVR2 cc 1333 1449 *15 + * WICAT PB 68000-8Mhz System V WICAT C 4.1 1169 1464 S~ + * Tandy II/6000 68000-8Mhz Xenix 3.0 cc 1384 1477 + * MicroVAX II - Mach/4.3 cc 1513 1536 + * WICAT MB 68000-12.5Mhz System V WICAT C 4.1 1246 1537 ~ + * IBM PC/AT 80286-9Mhz SCO Xenix V cc 1540 1556 *18 + * Cyb DataMate 68010-12.5Mhz Uniplus 5.0 Unisoft cc 1470 1562 S + * VAX 11/780 - UNIX 5.2 cc 1515 1562 + * MicroVAX-II - - - 1562 1612 + * VAX-780/MA780 Mach/4.3 cc 1587 1612 + * VAX 11/780 - UNIX 4.3bsd cc 1646 1662 + * Apollo DN660 - AegisSR9/IX cc 3.12 1666 1666 + * ATT 3B20 - UNIX 5.2 cc 1515 1724 + * NEC PC-98XA 80286-8Mhz PCDOS 3.1 Lattice 2.15 1724 1724 @ + * HP9000-500 B series CPU HP-UX 4.02 cc 1724 - + * Ridge 32C V1 - ROS 3.3 Ridge C (older) 1776 - + * IBM PC/STD 80286-8Mhz MSDOS 3.0 Microsoft 3.0 1724 1785 C2 + * WICAT MB 68000-12.5Mhz System V WICAT C 4.1 1450 1814 S~ + * WICAT PB 68000-12.5Mhz System V WICAT C 4.1 1530 1898 ~ + * DEC-2065 KL10-Model B TOPS-20 6.1FT5 Port. C Comp. 1937 1946 + * Gould PN6005 - UTX 1.1(4.2BSD) cc 1675 1964 + * DEC2060 KL-10 TOPS-20 cc 2000 2000 NM + * Intel 310AP 80286-8Mhz Xenix 3.0 cc 1893 2009 + * VAX 11/785 - UNIX 5.2 cc 2083 2083 + * VAX 11/785 - VMS VAX-11 C 2.0 2083 2083 + * VAX 11/785 - UNIX SVR2 cc 2123 2083 + * VAX 11/785 - ULTRIX-32 1.1 cc 2083 2091 + * VAX 11/785 - UNIX 4.3bsd cc 2135 2136 + * WICAT PB 68000-12.5Mhz System V WICAT C 4.1 1780 2233 S~ + * Pyramid 90x - OSx 2.3 cc 2272 2272 + * Pyramid 90x FPA,cache,4Mb OSx 2.5 cc no -O 2777 2777 + * Pyramid 90x w/cache OSx 2.5 cc w/-O 3333 3333 + * IBM-4341-II - VM/SP3 Waterloo C 1.2 3333 3333 + * IRIS-2400T 68020-16.67Mhz UNIX System V cc 3105 3401 + * Celerity C-1200 ? UNIX 4.2BSD cc 3485 3468 + * SUN 3/75 68020-16.67Mhz SUN 4.2 V3 cc 3333 3571 + * IBM-4341 Model 12 UTS 5.0 ? 3685 3685 + * SUN-3/160 68020-16.67Mhz Sun 4.2 V3.0A cc 3381 3764 + * Sun 3/180 68020-16.67Mhz Sun 4.2 cc 3333 3846 + * IBM-4341 Model 12 UTS 5.0 ? 3910 3910 MN + * MC 5400 68020-16.67MHz RTU V3.0 cc (V4.0) 3952 4054 + * Intel 386/20 80386-12.5Mhz PMON debugger Intel C386v0.2 4149 4386 + * NCR Tower32 68020-16.67Mhz SYS 5.0 Rel 2.0 cc 3846 4545 + * MC 5600/5700 68020-16.67MHz RTU V3.0 cc (V4.0) 4504 4746 % + * Intel 386/20 80386-12.5Mhz PMON debugger Intel C386v0.2 4534 4794 i1 + * Intel 386/20 80386-16Mhz PMON debugger Intel C386v0.2 5304 5607 + * Gould PN9080 custom ECL UTX-32 1.1C cc 5369 5676 + * Gould 1460-342 ECL proc UTX/32 1.1/c cc 5342 5677 G1 + * VAX-784 - Mach/4.3 cc 5882 5882 &4 + * Intel 386/20 80386-16Mhz PMON debugger Intel C386v0.2 5801 6133 i1 + * VAX 8600 - UNIX 4.3bsd cc 7024 7088 + * VAX 8600 - VMS VAX-11 C 2.0 7142 7142 + * Alliant FX/8 CE Concentrix cc -ce;exec -c 6952 7655 FX + * CCI POWER 6/32 COS(SV+4.2) cc 7500 7800 + * CCI POWER 6/32 POWER 6 UNIX/V cc 8236 8498 + * CCI POWER 6/32 4.2 Rel. 1.2b cc 8963 9544 + * Sperry (CCI Power 6) 4.2BSD cc 9345 10000 + * CRAY-X-MP/12 105Mhz COS 1.14 Cray C 10204 10204 + * IBM-3083 - UTS 5.0 Rel 1 cc 16666 12500 + * CRAY-1A 80Mhz CTSS Cray C 2.0 12100 13888 + * IBM-3083 - VM/CMS HPO 3.4 Waterloo C 1.2 13889 13889 + * Amdahl 470 V/8 UTS/V 5.2 cc v1.23 15560 15560 + * CRAY-X-MP/48 105Mhz CTSS Cray C 2.0 15625 17857 + * Amdahl 580 - UTS 5.0 Rel 1.2 cc v1.5 23076 23076 + * Amdahl 5860 UTS/V 5.2 cc v1.23 28970 28970 + * + * NOTE + * * Crystal changed from 'stock' to listed value. + * + This Macintosh was upgraded from 128K to 512K in such a way that + * the new 384K of memory is not slowed down by video generator accesses. + * % Single processor; MC == MASSCOMP + * NM A version 7 C compiler written at New Mexico Tech. + * @ vanilla Lattice compiler used with MicroPro standard library + * S Shorts used instead of ints + * T with Chris Torek's patches (whatever they are). + * ~ For WICAT Systems: MB=MultiBus, PB=Proprietary Bus + * LM Large Memory Model. (Otherwise, all 80x8x results are small model) + * MM Medium Memory Model. (Otherwise, all 80x8x results are small model) + * C1 Univation PC TURBO Co-processor; 9.54Mhz 8086, 640K RAM + * C2 Seattle Telecom STD-286 board + * C3 Definicon DSI-32 coprocessor + * C? Unknown co-processor board? + * CT1 Convergent Technologies MegaFrame, 1 processor. + * MN Using Mike Newtons 'optimizer' (see net.sources). + * G1 This Gould machine has 2 processors and was able to run 2 dhrystone + * Benchmarks in parallel with no slowdown. + * FH FHC == Frank Hogg Labs (Hazelwood Uniquad 2 in an FHL box). + * FX The Alliant FX/8 is a system consisting of 1-8 CEs (computation + * engines) and 1-12 IPs (interactive processors). Note N8 applies. + * RT This is one of the RT's that CMU has been using for awhile. I'm + * not sure that this is identical to the machine that IBM is selling + * to the public. + * i1 Normally, the 386/20 starter kit has a 16k direct mapped cache + * which inserts 2 or 3 wait states on a write thru. These results + * were obtained by disabling the write-thru, or essentially turning + * the cache into 0 wait state memory. + * Nnn This machine has multiple processors, allowing "nn" copies of the + * benchmark to run in the same time as 1 copy. + * &nn This machine has "nn" processors, and the benchmark results were + * obtained by having all "nn" processors working on 1 copy of dhrystone. + * (Note, this is different than Nnn. Salesmen like this measure). + * ? I don't trust results marked with '?'. These were sent to me with + * either incomplete info, or with times that just don't make sense. + * ?? means I think the performance is too poor, ?! means too good. + * If anybody can confirm these figures, please respond. + * + * ABBREVIATIONS + * CCC Concurrent Computer Corp. (was Perkin-Elmer) + * MC Masscomp + * + *--------------------------------RESULTS END---------------------------------- + * + * The following program contains statements of a high-level programming + * language (C) in a distribution considered representative: + * + * assignments 53% + * control statements 32% + * procedure, function calls 15% + * + * 100 statements are dynamically executed. The program is balanced with + * respect to the three aspects: + * - statement type + * - operand type (for simple data types) + * - operand access + * operand global, local, parameter, or constant. + * + * The combination of these three aspects is balanced only approximately. + * + * The program does not compute anything meaningfull, but it is + * syntactically and semantically correct. + * + */ + +/* Accuracy of timings and human fatigue controlled by next two lines */ +/*#define LOOPS 5000 /* Use this for slow or 16 bit machines */ +#define LOOPS 50000 /* Use this for slow or 16 bit machines */ +/*#define LOOPS 500000 /* Use this for faster machines */ + +/* Compiler dependent options */ +#undef NOENUM /* Define if compiler has no enum's */ +#undef NOSTRUCTASSIGN /* Define if compiler can't assign structures */ + +/* define only one of the next two defines */ +#define TIMES /* Use times(2) time function */ +/*#define TIME /* Use time(2) time function */ + +/* define the granularity of your times(2) function (when used) */ +#define HZ 100 /* times(2) returns 1/60 second (most) */ + +/* for compatibility with goofed up version */ +/*#define GOOF /* Define if you want the goofed up version */ + +#ifdef GOOF +char Version[] = "1.0"; +#else +char Version[] = "1.1"; +#endif + +#ifdef NOSTRUCTASSIGN +#define structassign(d, s) memcpy(&(d), &(s), sizeof(d)) +#else +#define structassign(d, s) d = s +#endif + +#ifdef NOENUM +#define Ident1 1 +#define Ident2 2 +#define Ident3 3 +#define Ident4 4 +#define Ident5 5 +typedef int Enumeration; +#else +typedef enum {Ident1, Ident2, Ident3, Ident4, Ident5} Enumeration; +#endif + +typedef int OneToThirty; +typedef int OneToFifty; +typedef char CapitalLetter; +typedef char String30[31]; +typedef int Array1Dim[51]; +typedef int Array2Dim[51][51]; + +struct Record +{ + struct Record *PtrComp; + Enumeration Discr; + Enumeration EnumComp; + OneToFifty IntComp; + String30 StringComp; +}; + +typedef struct Record RecordType; +typedef RecordType * RecordPtr; +typedef int boolean; + +#define NULL 0 +#define TRUE 1 +#define FALSE 0 + +#ifndef REG +#define REG +#endif + +extern Enumeration Func1(); +extern boolean Func2(); + +#ifdef TIMES +#include +#include +#endif + +main() +{ + Proc0(); + exit(0); +} + +/* + * Package 1 + */ +int IntGlob; +boolean BoolGlob; +char Char1Glob; +char Char2Glob; +Array1Dim Array1Glob; +Array2Dim Array2Glob; +RecordPtr PtrGlb; +RecordPtr PtrGlbNext; + +Proc0() +{ + OneToFifty IntLoc1; + REG OneToFifty IntLoc2; + OneToFifty IntLoc3; + REG char CharLoc; + REG char CharIndex; + Enumeration EnumLoc; + String30 String1Loc; + String30 String2Loc; + extern char *malloc(); + + register unsigned int i; +#ifdef TIME + long time(); + long starttime; + long benchtime; + long nulltime; + + starttime = time( (long *) 0); + for (i = 0; i < LOOPS; ++i); + nulltime = time( (long *) 0) - starttime; /* Computes o'head of loop */ +#endif +#ifdef TIMES + time_t starttime; + time_t benchtime; + time_t nulltime; + struct tms tms; + + times(&tms); starttime = tms.tms_utime; + for (i = 0; i < LOOPS; ++i); + times(&tms); + nulltime = tms.tms_utime - starttime; /* Computes overhead of looping */ +#endif + + PtrGlbNext = (RecordPtr) malloc(sizeof(RecordType)); + PtrGlb = (RecordPtr) malloc(sizeof(RecordType)); + PtrGlb->PtrComp = PtrGlbNext; + PtrGlb->Discr = Ident1; + PtrGlb->EnumComp = Ident3; + PtrGlb->IntComp = 40; + strcpy(PtrGlb->StringComp, "DHRYSTONE PROGRAM, SOME STRING"); +#ifndef GOOF + strcpy(String1Loc, "DHRYSTONE PROGRAM, 1'ST STRING"); /*GOOF*/ +#endif + Array2Glob[8][7] = 10; /* Was missing in published program */ + +/***************** +-- Start Timer -- +*****************/ +#ifdef TIME + starttime = time( (long *) 0); +#endif +#ifdef TIMES + times(&tms); starttime = tms.tms_utime; +#endif + for (i = 0; i < LOOPS; ++i) + { + + Proc5(); + Proc4(); + IntLoc1 = 2; + IntLoc2 = 3; + strcpy(String2Loc, "DHRYSTONE PROGRAM, 2'ND STRING"); + EnumLoc = Ident2; + BoolGlob = ! Func2(String1Loc, String2Loc); + while (IntLoc1 < IntLoc2) + { + IntLoc3 = 5 * IntLoc1 - IntLoc2; + Proc7(IntLoc1, IntLoc2, &IntLoc3); + ++IntLoc1; + } + Proc8(Array1Glob, Array2Glob, IntLoc1, IntLoc3); + Proc1(PtrGlb); + for (CharIndex = 'A'; CharIndex <= Char2Glob; ++CharIndex) + if (EnumLoc == Func1(CharIndex, 'C')) + Proc6(Ident1, &EnumLoc); + IntLoc3 = IntLoc2 * IntLoc1; + IntLoc2 = IntLoc3 / IntLoc1; + IntLoc2 = 7 * (IntLoc3 - IntLoc2) - IntLoc1; + Proc2(&IntLoc1); + } + +/***************** +-- Stop Timer -- +*****************/ + +#ifdef TIME + benchtime = time( (long *) 0) - starttime - nulltime; + printf("Dhrystone(%s) time for %ld passes = %ld\n", + Version, + (long) LOOPS, benchtime); + printf("This machine benchmarks at %ld dhrystones/second\n", + ((long) LOOPS) / benchtime); +#endif +#ifdef TIMES + times(&tms); + benchtime = tms.tms_utime - starttime - nulltime; + printf("Dhrystone(%s) time for %ld passes = %ld\n", + Version, + (long) LOOPS, benchtime/HZ); + printf("This machine benchmarks at %ld dhrystones/second\n", + ((long) LOOPS) * HZ / benchtime); +#endif + +} + +Proc1(PtrParIn) +REG RecordPtr PtrParIn; +{ +#define NextRecord (*(PtrParIn->PtrComp)) + + structassign(NextRecord, *PtrGlb); + PtrParIn->IntComp = 5; + NextRecord.IntComp = PtrParIn->IntComp; + NextRecord.PtrComp = PtrParIn->PtrComp; + Proc3(NextRecord.PtrComp); + if (NextRecord.Discr == Ident1) + { + NextRecord.IntComp = 6; + Proc6(PtrParIn->EnumComp, &NextRecord.EnumComp); + NextRecord.PtrComp = PtrGlb->PtrComp; + Proc7(NextRecord.IntComp, 10, &NextRecord.IntComp); + } + else + structassign(*PtrParIn, NextRecord); + +#undef NextRecord +} + +Proc2(IntParIO) +OneToFifty *IntParIO; +{ + REG OneToFifty IntLoc; + REG Enumeration EnumLoc; + + IntLoc = *IntParIO + 10; + for(;;) + { + if (Char1Glob == 'A') + { + --IntLoc; + *IntParIO = IntLoc - IntGlob; + EnumLoc = Ident1; + } + if (EnumLoc == Ident1) + break; + } +} + +Proc3(PtrParOut) +RecordPtr *PtrParOut; +{ + if (PtrGlb != NULL) + *PtrParOut = PtrGlb->PtrComp; + else + IntGlob = 100; + Proc7(10, IntGlob, &PtrGlb->IntComp); +} + +Proc4() +{ + REG boolean BoolLoc; + + BoolLoc = Char1Glob == 'A'; + BoolLoc |= BoolGlob; + Char2Glob = 'B'; +} + +Proc5() +{ + Char1Glob = 'A'; + BoolGlob = FALSE; +} + +extern boolean Func3(); + +Proc6(EnumParIn, EnumParOut) +REG Enumeration EnumParIn; +REG Enumeration *EnumParOut; +{ + *EnumParOut = EnumParIn; + if (! Func3(EnumParIn) ) + *EnumParOut = Ident4; + switch (EnumParIn) + { + case Ident1: *EnumParOut = Ident1; break; + case Ident2: if (IntGlob > 100) *EnumParOut = Ident1; + else *EnumParOut = Ident4; + break; + case Ident3: *EnumParOut = Ident2; break; + case Ident4: break; + case Ident5: *EnumParOut = Ident3; + } +} + +Proc7(IntParI1, IntParI2, IntParOut) +OneToFifty IntParI1; +OneToFifty IntParI2; +OneToFifty *IntParOut; +{ + REG OneToFifty IntLoc; + + IntLoc = IntParI1 + 2; + *IntParOut = IntParI2 + IntLoc; +} + +Proc8(Array1Par, Array2Par, IntParI1, IntParI2) +Array1Dim Array1Par; +Array2Dim Array2Par; +OneToFifty IntParI1; +OneToFifty IntParI2; +{ + REG OneToFifty IntLoc; + REG OneToFifty IntIndex; + + IntLoc = IntParI1 + 5; + Array1Par[IntLoc] = IntParI2; + Array1Par[IntLoc+1] = Array1Par[IntLoc]; + Array1Par[IntLoc+30] = IntLoc; + for (IntIndex = IntLoc; IntIndex <= (IntLoc+1); ++IntIndex) + Array2Par[IntLoc][IntIndex] = IntLoc; + ++Array2Par[IntLoc][IntLoc-1]; + Array2Par[IntLoc+20][IntLoc] = Array1Par[IntLoc]; + IntGlob = 5; +} + +Enumeration Func1(CharPar1, CharPar2) +CapitalLetter CharPar1; +CapitalLetter CharPar2; +{ + REG CapitalLetter CharLoc1; + REG CapitalLetter CharLoc2; + + CharLoc1 = CharPar1; + CharLoc2 = CharLoc1; + if (CharLoc2 != CharPar2) + return (Ident1); + else + return (Ident2); +} + +boolean Func2(StrParI1, StrParI2) +String30 StrParI1; +String30 StrParI2; +{ + REG OneToThirty IntLoc; + REG CapitalLetter CharLoc; + + IntLoc = 1; + while (IntLoc <= 1) + if (Func1(StrParI1[IntLoc], StrParI2[IntLoc+1]) == Ident1) + { + CharLoc = 'A'; + ++IntLoc; + } + if (CharLoc >= 'W' && CharLoc <= 'Z') + IntLoc = 7; + if (CharLoc == 'X') + return(TRUE); + else + { + if (strcmp(StrParI1, StrParI2) > 0) + { + IntLoc += 7; + return (TRUE); + } + else + return (FALSE); + } +} + +boolean Func3(EnumParIn) +REG Enumeration EnumParIn; +{ + REG Enumeration EnumLoc; + + EnumLoc = EnumParIn; + if (EnumLoc == Ident3) return (TRUE); + return (FALSE); +} + +#ifdef NOSTRUCTASSIGN +memcpy(d, s, l) +register char *d; +register char *s; +register int l; +{ + while (l--) *d++ = *s++; +} +#endif +/* ---------- */ diff --git a/test/apps/view.gtkw b/test/apps/view.gtkw deleted file mode 100644 index 9d2d783..0000000 --- a/test/apps/view.gtkw +++ /dev/null @@ -1,416 +0,0 @@ -[*] -[*] GTKWave Analyzer v3.3.107 (w)1999-2020 BSI -[*] Wed Jul 19 19:54:00 2023 -[*] -[dumpfile] "/Users/damien/workspace/hdl/friscv/test/apps/friscv_testbench.vcd" -[dumpfile_mtime] "Wed Jul 19 19:26:26 2023" -[dumpfile_size] 8610026560 -[savefile] "/Users/damien/workspace/hdl/friscv/test/apps/view.gtkw" -[timestart] 8741 -[size] 1440 900 -[pos] -1 -1 -*-5.739691 8839 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -[treeopen] friscv_testbench. -[treeopen] friscv_testbench.friscv_testbench. -[treeopen] friscv_testbench.friscv_testbench.genblk2. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE. -[treeopen] friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache. -[sst_width] 266 -[signals_width] 380 -[sst_expanded] 1 -[sst_vpaned_height] 433 -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.aclk -@c00200 --iCache Block-Fetcher -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.flush -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.loader[1:0] -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_araddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_arid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_arvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_arready -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.cache_ren -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.cache_hit -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.cache_miss -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.cache_raddr[31:0] -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_rid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_rvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.fetcher.mst_rready -@1401200 --iCache Block-Fetcher -@800200 --Control -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.flush_reqs -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.pc_reg[31:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.inst_ready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.pull_inst -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.branching -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.jal -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.jalr -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.jump_branch -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.lui -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.processing -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.inst_ready -@29 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.pull_inst -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.pc_reg[31:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.proc_busy -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.proc_ready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.proc_valid -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.async_trap_occuring -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.sync_trap_occuring -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.trap_occuring -@1000200 --Control -@c00200 --Processing -@28 -[color] 2 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.proc_valid -[color] 2 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.proc_ready -[color] 2 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.proc_busy -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.alu_valid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.alu_ready -@200 -- -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.hzd_free -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy_hzd_free -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.m_hzd_free -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.i_inst -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.ls_inst -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.m_inst -@1401200 --Processing -@c00200 --Memfy -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy_pending_read -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.rd_or_cnt[5:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy_pending_write -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.wr_or_cnt[5:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy_valid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy_ready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.state[1:0] -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.opcode[6:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.control.aclk -@200 -- -@28 -[color] 3 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.arvalid -[color] 3 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.arready -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.araddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.arcache[3:0] -@200 -- -@28 -[color] 3 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.rvalid -[color] 3 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.rready -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.awvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.awready -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.awaddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.memfy.awcache[3:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.bvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.processing.bready -@1401200 --Memfy -@c00200 --iCache Prefetcher -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.aclk -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.aresetn -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.cache_ren -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.cache_raddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.cache_rid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.cache_rprot[2:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.cache_hit -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.cache_miss -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.loader[1:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.fetch_next -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.block_fill -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.mem_cpl_rid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.mem_cpl_wr -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.memctrl_araddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.memctrl_arid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.memctrl_arprot[2:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.memctrl_arready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.memctrl_arvalid -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_ICACHE.icache.prefetcher.next_addr[31:0] -@1401200 --iCache Prefetcher -@c00200 --dCache Top -@28 -[color] 1 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_arready -[color] 1 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_arvalid -@22 -[color] 1 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_araddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_arcache[3:0] -@200 -- -@28 -[color] 1 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_rvalid -[color] 1 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_rready -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_awvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_awready -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_awaddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_awcache[3:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_bvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.memfy_bready -@1401200 --dCache Top -@c00200 --dCache Block Fetcher -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.mst_arvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.mst_arready -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.mst_araddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.mst_arid[7:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.loader[1:0] -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.cache_ren -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.cache_hit -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.cache_miss -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.mst_rvalid -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.block_fetcher.mst_rid[7:0] -@1401200 --dCache Block Fetcher -@c00200 --dCache Rd OoO -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.aclk -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.aresetn -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl1_data[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl1_id[7:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl1_id_m[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl1_resp[1:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl1_valid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl1_ready -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl2_data[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl2_id[7:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl2_id_m[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl2_resp[1:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl2_valid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl2_ready -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.cpl_tag_pt[4:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.next_tag[7:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.req_tag_pt[4:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.tag_avlb -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.tags[63:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.io_tags[31:0] -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.slv_addr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.slv_acache[3:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.slv_aready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.slv_avalid -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.mst_data[31:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.mst_ready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.mst_resp[1:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.RD_OOO_INSTANCE.rd_ooo_mgt.mst_valid -@1401200 --dCache Rd OoO -@c00200 --dCache Pusher -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.aclk -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_awaddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_awcache[3:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_awid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_awvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_awready -@200 -- -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.cache_ren -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.cache_raddr[31:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.cache_hit -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.cache_miss -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.cache_wen -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.cache_waddr[31:0] -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_bid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_bvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.mst_bready -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.memctrl_bvalid -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.memctrl_bready -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.memctrl_bid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.pusher.memctrl_bresp[1:0] -@1401200 --dCache Pusher -@c00200 --dCache Prefetcher -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.aclk -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.aresetn -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.cache_ren -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.cache_raddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.cache_rid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.cache_rprot[2:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.cache_hit -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.cache_miss -@200 -- -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.loader[1:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.block_fill -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.fetch_next -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.mem_cpl_rid[7:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.next_addr[31:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.mem_cpl_wr -@200 -- -@22 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.memctrl_araddr[31:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.memctrl_arid[7:0] -@28 -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.memctrl_arprot[2:0] -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.memctrl_arready -friscv_testbench.friscv_testbench.genblk2.dut.cpu0.USE_DCACHE.dcache.prefetcher.memctrl_arvalid -@1401200 --dCache Prefetcher -[pattern_trace] 1 -[pattern_trace] 0 diff --git a/test/common/debug_platform_verilator.gtkw b/test/common/debug_platform_verilator.gtkw index bcb62ed..1c3a646 100644 --- a/test/common/debug_platform_verilator.gtkw +++ b/test/common/debug_platform_verilator.gtkw @@ -2,7 +2,7 @@ [*] GTKWave Analyzer v3.4.0 (w)1999-2022 BSI [*] Tue Nov 7 19:31:27 2023 [*] -[dumpfile] "/Users/damien/workspace/hdl/friscv/test/c_testsuite/friscv_testbench.vcd" +[dumpfile] "/Users/damien/workspace/hdl/friscv/test/apps/friscv_testbench.vcd" [dumpfile_mtime] "Sun Nov 5 19:46:50 2023" [dumpfile_size] 61559319 [savefile] "/Users/damien/workspace/hdl/friscv/test/priv_sec_testsuite/debug_platform_verilator.gtkw"