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STM32F101xx.svd
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STM32F101xx.svd
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<?xml version="1.0" encoding="utf-8" standalone="no"?>
<device schemaVersion="1.1"
xmlns:xs="http://www.w3.org/2001/XMLSchema-instance"
xs:noNamespaceSchemaLocation="CMSIS-SVD_Schema_1_1.xsd">
<name>STM32F101xx</name>
<version>1.1</version>
<description>STM32F101xx</description>
<!--Bus Interface Properties-->
<!--Cortex-M3 is byte addressable-->
<addressUnitBits>8</addressUnitBits>
<!--the maximum data bit width accessible within a single transfer-->
<width>32</width>
<!--Register Default Properties-->
<size>0x20</size>
<resetValue>0x0</resetValue>
<resetMask>0xFFFFFFFF</resetMask>
<peripherals>
<peripheral>
<name>FSMC</name>
<description>Flexible static memory controller</description>
<groupName>FSMC</groupName>
<baseAddress>0xA0000000</baseAddress>
<addressBlock>
<offset>0x0</offset>
<size>0x1000</size>
<usage>registers</usage>
</addressBlock>
<addressBlock>
<offset>0x1000</offset>
<size>0xFFFFF400</size>
<usage>reserved</usage>
</addressBlock>
<registers>
<register>
<name>BCR1</name>
<displayName>BCR1</displayName>
<description>SRAM/NOR-Flash chip-select control register
1</description>
<addressOffset>0x0</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000030D0</resetValue>
<fields>
<field>
<name>CBURSTRW</name>
<description>CBURSTRW</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ASYNCWAIT</name>
<description>ASYNCWAIT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTMOD</name>
<description>EXTMOD</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITEN</name>
<description>WAITEN</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WREN</name>
<description>WREN</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITCFG</name>
<description>WAITCFG</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITPOL</name>
<description>WAITPOL</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BURSTEN</name>
<description>BURSTEN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACCEN</name>
<description>FACCEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MWID</name>
<description>MWID</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MTYP</name>
<description>MTYP</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MUXEN</name>
<description>MUXEN</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MBKEN</name>
<description>MBKEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>BTR1</name>
<displayName>BTR1</displayName>
<description>SRAM/NOR-Flash chip-select timing register
1</description>
<addressOffset>0x4</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>ACCMOD</name>
<description>ACCMOD</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DATLAT</name>
<description>DATLAT</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>CLKDIV</name>
<description>CLKDIV</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>BUSTURN</name>
<description>BUSTURN</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DATAST</name>
<description>DATAST</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ADDHLD</name>
<description>ADDHLD</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ADDSET</name>
<description>ADDSET</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>BCR2</name>
<displayName>BCR2</displayName>
<description>SRAM/NOR-Flash chip-select control register
2</description>
<addressOffset>0x8</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000030D0</resetValue>
<fields>
<field>
<name>CBURSTRW</name>
<description>CBURSTRW</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ASYNCWAIT</name>
<description>ASYNCWAIT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTMOD</name>
<description>EXTMOD</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITEN</name>
<description>WAITEN</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WREN</name>
<description>WREN</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITCFG</name>
<description>WAITCFG</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WRAPMOD</name>
<description>WRAPMOD</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITPOL</name>
<description>WAITPOL</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BURSTEN</name>
<description>BURSTEN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACCEN</name>
<description>FACCEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MWID</name>
<description>MWID</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MTYP</name>
<description>MTYP</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MUXEN</name>
<description>MUXEN</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MBKEN</name>
<description>MBKEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>BTR2</name>
<displayName>BTR2</displayName>
<description>SRAM/NOR-Flash chip-select timing register
2</description>
<addressOffset>0xC</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>ACCMOD</name>
<description>ACCMOD</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DATLAT</name>
<description>DATLAT</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>CLKDIV</name>
<description>CLKDIV</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>BUSTURN</name>
<description>BUSTURN</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DATAST</name>
<description>DATAST</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ADDHLD</name>
<description>ADDHLD</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ADDSET</name>
<description>ADDSET</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>BCR3</name>
<displayName>BCR3</displayName>
<description>SRAM/NOR-Flash chip-select control register
3</description>
<addressOffset>0x10</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000030D0</resetValue>
<fields>
<field>
<name>CBURSTRW</name>
<description>CBURSTRW</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ASYNCWAIT</name>
<description>ASYNCWAIT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTMOD</name>
<description>EXTMOD</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITEN</name>
<description>WAITEN</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WREN</name>
<description>WREN</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITCFG</name>
<description>WAITCFG</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WRAPMOD</name>
<description>WRAPMOD</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITPOL</name>
<description>WAITPOL</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BURSTEN</name>
<description>BURSTEN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACCEN</name>
<description>FACCEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MWID</name>
<description>MWID</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MTYP</name>
<description>MTYP</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MUXEN</name>
<description>MUXEN</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MBKEN</name>
<description>MBKEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>BTR3</name>
<displayName>BTR3</displayName>
<description>SRAM/NOR-Flash chip-select timing register
3</description>
<addressOffset>0x14</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>ACCMOD</name>
<description>ACCMOD</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DATLAT</name>
<description>DATLAT</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>CLKDIV</name>
<description>CLKDIV</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>BUSTURN</name>
<description>BUSTURN</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DATAST</name>
<description>DATAST</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ADDHLD</name>
<description>ADDHLD</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ADDSET</name>
<description>ADDSET</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>BCR4</name>
<displayName>BCR4</displayName>
<description>SRAM/NOR-Flash chip-select control register
4</description>
<addressOffset>0x18</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x000030D0</resetValue>
<fields>
<field>
<name>CBURSTRW</name>
<description>CBURSTRW</description>
<bitOffset>19</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>ASYNCWAIT</name>
<description>ASYNCWAIT</description>
<bitOffset>15</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>EXTMOD</name>
<description>EXTMOD</description>
<bitOffset>14</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITEN</name>
<description>WAITEN</description>
<bitOffset>13</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WREN</name>
<description>WREN</description>
<bitOffset>12</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITCFG</name>
<description>WAITCFG</description>
<bitOffset>11</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WRAPMOD</name>
<description>WRAPMOD</description>
<bitOffset>10</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>WAITPOL</name>
<description>WAITPOL</description>
<bitOffset>9</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>BURSTEN</name>
<description>BURSTEN</description>
<bitOffset>8</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>FACCEN</name>
<description>FACCEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MWID</name>
<description>MWID</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MTYP</name>
<description>MTYP</description>
<bitOffset>2</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>MUXEN</name>
<description>MUXEN</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>MBKEN</name>
<description>MBKEN</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>BTR4</name>
<displayName>BTR4</displayName>
<description>SRAM/NOR-Flash chip-select timing register
4</description>
<addressOffset>0x1C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFFFFFFFF</resetValue>
<fields>
<field>
<name>ACCMOD</name>
<description>ACCMOD</description>
<bitOffset>28</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>DATLAT</name>
<description>DATLAT</description>
<bitOffset>24</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>CLKDIV</name>
<description>CLKDIV</description>
<bitOffset>20</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>BUSTURN</name>
<description>BUSTURN</description>
<bitOffset>16</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>DATAST</name>
<description>DATAST</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ADDHLD</name>
<description>ADDHLD</description>
<bitOffset>4</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ADDSET</name>
<description>ADDSET</description>
<bitOffset>0</bitOffset>
<bitWidth>4</bitWidth>
</field>
</fields>
</register>
<register>
<name>PCR2</name>
<displayName>PCR2</displayName>
<description>PC Card/NAND Flash control register
2</description>
<addressOffset>0x60</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000018</resetValue>
<fields>
<field>
<name>ECCPS</name>
<description>ECCPS</description>
<bitOffset>17</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TAR</name>
<description>TAR</description>
<bitOffset>13</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>TCLR</name>
<description>TCLR</description>
<bitOffset>9</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ECCEN</name>
<description>ECCEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWID</name>
<description>PWID</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PTYP</name>
<description>PTYP</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PBKEN</name>
<description>PBKEN</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWAITEN</name>
<description>PWAITEN</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR2</name>
<displayName>SR2</displayName>
<description>FIFO status and interrupt register
2</description>
<addressOffset>0x64</addressOffset>
<size>0x20</size>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FEMPT</name>
<description>FEMPT</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>IFEN</name>
<description>IFEN</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ILEN</name>
<description>ILEN</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IREN</name>
<description>IREN</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IFS</name>
<description>IFS</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ILS</name>
<description>ILS</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IRS</name>
<description>IRS</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PMEM2</name>
<displayName>PMEM2</displayName>
<description>Common memory space timing register
2</description>
<addressOffset>0x68</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFCFCFCFC</resetValue>
<fields>
<field>
<name>MEMHIZx</name>
<description>MEMHIZx</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>MEMHOLDx</name>
<description>MEMHOLDx</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>MEMWAITx</name>
<description>MEMWAITx</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>MEMSETx</name>
<description>MEMSETx</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>PATT2</name>
<displayName>PATT2</displayName>
<description>Attribute memory space timing register
2</description>
<addressOffset>0x6C</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFCFCFCFC</resetValue>
<fields>
<field>
<name>ATTHIZx</name>
<description>Attribute memory x databus HiZ
time</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ATTHOLDx</name>
<description>Attribute memory x hold
time</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ATTWAITx</name>
<description>Attribute memory x wait
time</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>ATTSETx</name>
<description>Attribute memory x setup
time</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>ECCR2</name>
<displayName>ECCR2</displayName>
<description>ECC result register 2</description>
<addressOffset>0x74</addressOffset>
<size>0x20</size>
<access>read-only</access>
<resetValue>0x00000000</resetValue>
<fields>
<field>
<name>ECCx</name>
<description>ECC result</description>
<bitOffset>0</bitOffset>
<bitWidth>32</bitWidth>
</field>
</fields>
</register>
<register>
<name>PCR3</name>
<displayName>PCR3</displayName>
<description>PC Card/NAND Flash control register
3</description>
<addressOffset>0x80</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0x00000018</resetValue>
<fields>
<field>
<name>ECCPS</name>
<description>ECCPS</description>
<bitOffset>17</bitOffset>
<bitWidth>3</bitWidth>
</field>
<field>
<name>TAR</name>
<description>TAR</description>
<bitOffset>13</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>TCLR</name>
<description>TCLR</description>
<bitOffset>9</bitOffset>
<bitWidth>4</bitWidth>
</field>
<field>
<name>ECCEN</name>
<description>ECCEN</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWID</name>
<description>PWID</description>
<bitOffset>4</bitOffset>
<bitWidth>2</bitWidth>
</field>
<field>
<name>PTYP</name>
<description>PTYP</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PBKEN</name>
<description>PBKEN</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
</field>
<field>
<name>PWAITEN</name>
<description>PWAITEN</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
</field>
</fields>
</register>
<register>
<name>SR3</name>
<displayName>SR3</displayName>
<description>FIFO status and interrupt register
3</description>
<addressOffset>0x84</addressOffset>
<size>0x20</size>
<resetValue>0x00000040</resetValue>
<fields>
<field>
<name>FEMPT</name>
<description>FEMPT</description>
<bitOffset>6</bitOffset>
<bitWidth>1</bitWidth>
<access>read-only</access>
</field>
<field>
<name>IFEN</name>
<description>IFEN</description>
<bitOffset>5</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ILEN</name>
<description>ILEN</description>
<bitOffset>4</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IREN</name>
<description>IREN</description>
<bitOffset>3</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IFS</name>
<description>IFS</description>
<bitOffset>2</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>ILS</name>
<description>ILS</description>
<bitOffset>1</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
<field>
<name>IRS</name>
<description>IRS</description>
<bitOffset>0</bitOffset>
<bitWidth>1</bitWidth>
<access>read-write</access>
</field>
</fields>
</register>
<register>
<name>PMEM3</name>
<displayName>PMEM3</displayName>
<description>Common memory space timing register
3</description>
<addressOffset>0x88</addressOffset>
<size>0x20</size>
<access>read-write</access>
<resetValue>0xFCFCFCFC</resetValue>
<fields>
<field>
<name>MEMHIZx</name>
<description>MEMHIZx</description>
<bitOffset>24</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>MEMHOLDx</name>
<description>MEMHOLDx</description>
<bitOffset>16</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>MEMWAITx</name>
<description>MEMWAITx</description>
<bitOffset>8</bitOffset>
<bitWidth>8</bitWidth>
</field>
<field>
<name>MEMSETx</name>
<description>MEMSETx</description>
<bitOffset>0</bitOffset>
<bitWidth>8</bitWidth>
</field>
</fields>
</register>
<register>
<name>PATT3</name>
<displayName>PATT3</displayName>
<description>Attribute memory space timing register