diff --git a/_modules/chipsec/cfg/parsers/core_parsers.html b/_modules/chipsec/cfg/parsers/core_parsers.html deleted file mode 100644 index b3deab72..00000000 --- a/_modules/chipsec/cfg/parsers/core_parsers.html +++ /dev/null @@ -1,390 +0,0 @@ - - - - - - - - chipsec.cfg.parsers.core_parsers — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.cfg.parsers.core_parsers

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-
-import copy
-from chipsec.parsers import BaseConfigParser
-from chipsec.parsers import Stage
-from chipsec.parsers import info_data
-
-CONFIG_TAG = 'configuration'
-
-
-def _get_range_data(xml_node, attr):
-    int_items = []
-    for item in xml_node.attrib[attr].split(','):
-        item = item.strip()
-        if item.upper().endswith('*'):
-            x = int(item.replace('*', '0'), 0)
-            int_items.extend(range(x, x + 0x10))
-        elif '-' in item:
-            item_min, item_max = item.split('-', 1)
-            int_items.extend(range(int(item_min, 0), int(item_max, 0) + 1))
-        else:
-            int_items.append(int(item, 0))
-    return int_items
-
-
-def _config_convert_data(xml_node, did_is_range=False):
-    INT_KEYS = ['dev', 'fun', 'vid', 'did', 'rid', 'offset',
-                'bit', 'size', 'port', 'msr', 'value', 'address',
-                'fixed_address', 'base_align', 'align_bits', 'mask',
-                'reg_align', 'limit_align', 'regh_align',
-                'width', 'reg']
-    BOOL_KEYS = ['req_pch']
-    INT_LIST_KEYS = ['bus']
-    STR_LIST_KEYS = ['config']
-    RANGE_LIST_KEYS = ['detection_value']
-    if did_is_range:
-        INT_KEYS.remove('did')
-        RANGE_LIST_KEYS.append('did')
-    node_data = {}
-    for key in xml_node.attrib:
-        if key in INT_KEYS:
-            node_data[key] = int(xml_node.attrib[key], 0)
-        elif key in INT_LIST_KEYS:
-            node_data[key] = [int(xml_node.attrib[key], 0)]
-        elif key in STR_LIST_KEYS:
-            node_data[key] = [x.strip() for x in xml_node.attrib[key].split(',')]
-        elif key in RANGE_LIST_KEYS:
-            node_data[key] = _get_range_data(xml_node, key)
-        elif key in BOOL_KEYS:
-            node_data[key] = xml_node.attrib[key].lower() == 'true'
-        else:
-            node_data[key] = xml_node.attrib[key]
-    return node_data
-
-
-
[docs]class PlatformInfo(BaseConfigParser):
-
[docs]    def get_metadata(self):
-        return {'info': self.handle_info}

-
-
[docs]    def get_stage(self):
-        return Stage.GET_INFO

-
-
[docs]    def handle_info(self, et_node, stage_data):
-        platform = ''
-        req_pch = None
-        family = None
-        proc_code = None
-        pch_code = None
-        detect_vals = []
-        sku_data = []
-        vid_int = int(stage_data.vid_str, 16)
-
-        # Extract platform information. If no platform found it is just a device entry.
-        cfg_info = _config_convert_data(stage_data.configuration)
-        if 'platform' in cfg_info:
-            platform = cfg_info['platform']
-        if 'req_pch' in cfg_info:
-            req_pch = cfg_info['req_pch']
-        if platform and platform.lower().startswith('pch'):
-            pch_code = platform.upper()
-        else:
-            proc_code = platform.upper()
-
-        # Start processing the <info> tag
-        for info in et_node.iter('info'):
-            cfg_info = _config_convert_data(info)
-            if 'family' in cfg_info:
-                family = cfg_info['family']
-            if 'detection_value' in cfg_info:
-                detect_vals = cfg_info['detection_value']
-            for sku in info.iter('sku'):
-                sku_info = _config_convert_data(sku, True)
-                if 'code' not in sku_info or sku_info['code'] != platform.upper():
-                    sku_info['code'] = platform.upper()
-                if 'vid' not in sku_info:
-                    sku_info['vid'] = vid_int
-                sku_data.append(sku_info)
-
-        return info_data(family, proc_code, pch_code, detect_vals, req_pch, stage_data.vid_str, sku_data)

-
-
-
[docs]class CoreConfig(BaseConfigParser):
-
[docs]    def get_metadata(self):
-        return {'pci': self.handle_pci,
-                'mmio': self.handle_mmio,
-                'io': self.handle_io,
-                'ima': self.handle_ima,
-                'memory': self.handle_memory,
-                'registers': self.handle_registers,
-                'controls': self.handle_controls,
-                'locks': self.handle_locks}

-
-
[docs]    def get_stage(self):
-        return Stage.DEVICE_CFG

-
-    def _process_pci_dev(self, vid_str, dev_name, dev_attr):
-        device_added = False
-        if 'did' in dev_attr:
-            for did in dev_attr['did']:
-                did_str = self.cfg._make_hex_key_str(did)
-                if did_str in self.cfg.CONFIG_PCI_RAW[vid_str]:
-                    pci_data = self.cfg.CONFIG_PCI_RAW[vid_str][did_str]
-                    self._add_dev(vid_str, dev_name, pci_data, dev_attr)
-                    device_added = True
-                    break
-        else:
-            for did_str in self.cfg.CONFIG_PCI_RAW[vid_str]:
-                pci_data = self.cfg.CONFIG_PCI_RAW[vid_str][did_str]
-                
-                if dev_attr['bus'] in pci_data['bus'] and dev_attr['dev'] == pci_data['dev'] and \
-                   dev_attr['fun'] == pci_data['fun']:
-                    self._add_dev(vid_str, dev_name, pci_data, dev_attr)
-                    device_added = True
-                    break
-        if not device_added:
-            self._add_dev(vid_str, dev_name, None, dev_attr)
-
-    def _add_dev(self, vid_str, name, pci_info, dev_attr):
-        if pci_info:
-            self.cfg.BUS[name] = pci_info['bus']
-            self.cfg.CONFIG_PCI[name] = copy.copy(pci_info)
-        else:
-            self.cfg.CONFIG_PCI[name] = copy.deepcopy(dev_attr)
-            self.cfg.BUS[name] = []
-            if 'did' in dev_attr:
-                self.cfg.CONFIG_PCI[name]['did'] = dev_attr['did'][0]
-
-
[docs]    def handle_pci(self, et_node, stage_data):
-        ret_val = []
-
-        for dev in et_node.iter('device'):
-            dev_attr = _config_convert_data(dev, True)
-            if 'name' not in dev_attr:
-                continue
-            dev_name = dev_attr['name']
-            self._process_pci_dev(stage_data.vid_str, dev_name, dev_attr)
-            self.logger.log_debug(f"    + {dev_attr['name']:16}: {dev_attr}")
-
-        return ret_val

-
-
[docs]    def handle_controls(self, et_node, stage_data):
-        return self._add_entry_simple(self.cfg.CONTROLS, stage_data, et_node, 'control')

-
-
[docs]    def handle_io(self, et_node, stage_data):
-        return self._add_entry_simple(self.cfg.IO_BARS, stage_data, et_node, 'bar')

-
-
[docs]    def handle_ima(self, et_node, stage_data):
-        return self._add_entry_simple(self.cfg.IMA_REGISTERS, stage_data, et_node, 'indirect')

-
-
[docs]    def handle_locks(self, et_node, stage_data):
-        return self._add_entry_simple(self.cfg.LOCKS, stage_data, et_node, 'lock')

-
-
[docs]    def handle_memory(self, et_node, stage_data):
-        return self._add_entry_simple(self.cfg.MEMORY_RANGES, stage_data, et_node, 'range')

-
-
[docs]    def handle_mmio(self, et_node, stage_data):
-        return self._add_entry_simple(self.cfg.MMIO_BARS, stage_data, et_node, 'bar')

-
-
[docs]    def handle_registers(self, et_node, stage_data):
-        ret_val = []
-        dest = self.cfg.REGISTERS
-        for reg in et_node.iter('register'):
-            reg_attr = _config_convert_data(reg)
-            if 'name' not in reg_attr:
-                self.logger.log_error(f'Missing name entry for {reg_attr}')
-                continue
-            reg_name = reg_attr['name']
-            if 'undef' in reg_attr:
-                if reg_name in dest:
-                    self.logger.log_debug(f"    - {reg_name:16}: {reg_attr['undef']}")
-                    dest.pop(reg_name, None)
-                continue
-
-            # Patch missing or incorrect data
-            if 'desc' not in reg_attr:
-                reg_attr['desc'] = reg_name
-            if 'size' not in reg_attr:
-                self.logger.log_debug(f'Missing size entry for {reg_name:16}: {reg_attr}. Assuming 4 bytes')
-                reg_attr['size'] = 4
-
-            # Get existing field data
-            if reg_name in self.cfg.REGISTERS:
-                reg_fields = self.cfg.REGISTERS[reg_name]['FIELDS']
-            else:
-                reg_fields = {}
-
-            for field in reg.iter('field'):
-                field_attr = _config_convert_data(field)
-                field_name = field_attr['name']
-
-                # Locked by attributes need to be handled here due to embedding information in field data
-                if 'lockedby' in field_attr:
-                    lockedby = field_attr['lockedby']
-                    if lockedby in self.cfg.LOCKEDBY:
-                        self.cfg.LOCKEDBY[lockedby].append({reg_name, field_name})
-                    else:
-                        self.cfg.LOCKEDBY[lockedby] = [{reg_name, field_name}]
-                # Handle rest of field data here
-                if 'desc' not in field_attr:
-                    field_attr['desc'] = field_name
-                reg_fields[field_name] = field_attr
-
-            # Store all register data
-            reg_attr['FIELDS'] = reg_fields
-            self.cfg.REGISTERS[reg_name] = reg_attr
-            self.logger.log_debug(f'    + {reg_name:16}: {reg_attr}')
-        return ret_val

-
-    def _add_entry_simple(self, dest, stage_data, et_node, node_name):
-        ret_val = []
-        for node in et_node.iter(node_name):
-            attrs = _config_convert_data(node)
-            if 'name' not in attrs:
-                self.logger.log_error(f'Missing name entry for {attrs}')
-                continue
-            if 'undef' in attrs:
-                if attrs['name'] in dest:
-                    self.logger.log_debug(f"    - {attrs['name']:16}: {attrs['undef']}")
-                    dest.pop(attrs['name'], None)
-                continue
-            if 'desc' not in attrs:
-                attrs['desc'] = attrs['name']
-            dest[attrs['name']] = attrs
-            self.logger.log_debug(f"    + {attrs['name']:16}: {attrs}")
-        return ret_val

-
-
-parsers = [PlatformInfo, CoreConfig]
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/config.html b/_modules/chipsec/config.html deleted file mode 100644 index 0907b431..00000000 --- a/_modules/chipsec/config.html +++ /dev/null @@ -1,514 +0,0 @@ - - - - - - - - chipsec.config — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.config

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-from fnmatch import fnmatch
-import importlib
-import os
-import xml.etree.ElementTree as ET
-from chipsec.defines import is_hex
-from chipsec.exceptions import CSConfigError
-from chipsec.file import get_main_dir
-from chipsec.logger import logger
-from chipsec.parsers import Stage
-from chipsec.parsers import stage_info, config_data
-
-LOAD_COMMON = True
-
-CHIPSET_ID_UNKNOWN = 0
-
-CHIPSET_CODE_UNKNOWN = ''
-
-PROC_FAMILY = {}
-
-PCH_CODE_PREFIX = 'PCH_'
-
-
-
[docs]class Cfg:
-    def __init__(self):
-        self.logger = logger()
-        self.CONFIG_PCI = {}
-        self.REGISTERS = {}
-        self.MMIO_BARS = {}
-        self.IO_BARS = {}
-        self.IMA_REGISTERS = {}
-        self.MEMORY_RANGES = {}
-        self.CONTROLS = {}
-        self.BUS = {}
-        self.LOCKS = {}
-        self.LOCKEDBY = {}
-        self.XML_CONFIG_LOADED = False
-
-        self.proc_dictionary = {}
-        self.proc_codes = set()
-        self.pch_dictionary = {}
-        self.pch_codes = set()
-        self.device_dictionary = {}
-        self.platform_xml_files = {}
-        self.load_list = []
-        self.load_extra = []
-        self.parsers = []
-        self.cpuid = 0xFFFFF
-
-        self.detection_dictionary = {}
-
-        # Initialize CPU and PCH artifacts
-        self.vid = 0xFFFF
-        self.did = 0xFFFF
-        self.rid = 0xFF
-        self.code = CHIPSET_CODE_UNKNOWN
-        self.longname = "Unrecognized Platform"
-        self.pch_vid = 0xFFFF
-        self.pch_did = 0xFFFF
-        self.pch_rid = 0xFF
-        self.pch_code = CHIPSET_CODE_UNKNOWN
-        self.pch_longname = 'Unrecognized PCH'
-        self.req_pch = False
-
-    ###
-    # Private functions
-    ###
-    def _make_hex_key_str(self, int_val):
-        str_val = '{:04X}'.format(int_val)
-        return str_val
-
-    ###
-    # PCI device tree enumeration
-    ###
-
[docs]    def set_pci_data(self, enum_devices):
-        if not hasattr(self, 'CONFIG_PCI_RAW'):
-            setattr(self, 'CONFIG_PCI_RAW', {})
-        for b, d, f, vid, did, rid in enum_devices:
-            vid_str = self._make_hex_key_str(vid)
-            did_str = self._make_hex_key_str(did)
-            pci_data = {
-                'bus': [b],
-                'dev': d,
-                'fun': f,
-                'vid': vid,
-                'did': did,
-                'rid': rid}
-            if vid_str not in self.CONFIG_PCI_RAW:
-                self.CONFIG_PCI_RAW[vid_str] = {}
-            if did_str not in self.CONFIG_PCI_RAW[vid_str]:
-                self.CONFIG_PCI_RAW[vid_str][did_str] = pci_data
-            elif b not in self.CONFIG_PCI_RAW[vid_str][did_str]['bus']:
-                self.CONFIG_PCI_RAW[vid_str][did_str]['bus'].append(b)

-
-    ###
-    # Platform detection functions
-    ###
-
[docs]    def get_chipset_code(self):
-        return self.code

-
-
[docs]    def get_pch_code(self):
-        return self.pch_code

-
-
[docs]    def is_pch_req(self):
-        return self.req_pch

-
-
[docs]    def print_platform_info(self):
-        self.logger.log(f"Platform: {self.longname}")
-        self.logger.log(f'\tCPUID: {self.cpuid:X}')
-        self.logger.log(f"\tVID: {self.vid:04X}")
-        self.logger.log(f"\tDID: {self.did:04X}")
-        self.logger.log(f"\tRID: {self.rid:02X}")

-        
-
[docs]    def print_pch_info(self):
-        self.logger.log(f"Platform: {self.pch_longname}")
-        self.logger.log(f"\tVID: {self.pch_vid:04X}")
-        self.logger.log(f"\tDID: {self.pch_did:04X}")
-        self.logger.log(f"\tRID: {self.pch_rid:02X}")

-
-
[docs]    def print_supported_chipsets(self):
-        fmtStr = " {:4} | {:4} | {:14} | {:6} | {:40}"
-        self.logger.log("\nSupported platforms:\n")
-        self.logger.log(fmtStr.format("VID", "DID", "Name", "Code", "Long Name"))
-        self.logger.log("-" * 85)
-        for _vid in sorted(self.proc_dictionary):
-            for _did in sorted(self.proc_dictionary[_vid]):
-                for item in self.proc_dictionary[_vid][_did]:
-                    self.logger.log(fmtStr.format(_vid, _did, item['name'], item['code'].lower(), item['longname'][:40]))

-
-    ###
-    # Private config functions
-    ###
-    def _get_stage_parsers(self, stage):
-        handlers = {}
-        for parser in self.parsers:
-            if parser.get_stage() != stage:
-                continue
-            handlers.update(parser.get_metadata())
-        return handlers
-
-    def _update_supported_platforms(self, conf_data, data):
-        if not data:
-            return
-        if data.family and data.proc_code:
-            fam = data.family.lower()
-            if fam not in PROC_FAMILY:
-                PROC_FAMILY[fam] = []
-            PROC_FAMILY[fam].append(data.proc_code)
-        if data.proc_code:
-            dest = self.proc_dictionary
-            self.proc_codes.add(data.proc_code)
-            if data.proc_code not in self.platform_xml_files:
-                self.platform_xml_files[data.proc_code] = []
-            self.platform_xml_files[data.proc_code].append(conf_data)
-        elif data.pch_code:
-            dest = self.pch_dictionary
-            self.pch_codes.add(data.pch_code)
-            if data.pch_code not in self.platform_xml_files:
-                self.platform_xml_files[data.pch_code] = []
-            self.platform_xml_files[data.pch_code].append(conf_data)
-        else:
-            dest = self.device_dictionary
-            if 'devices' not in self.platform_xml_files:
-                self.platform_xml_files['devices'] = []
-            self.platform_xml_files['devices'].append(conf_data)
-        if data.vid_str not in dest:
-            dest[data.vid_str] = {}
-        for sku in data.sku_list:
-            for did in sku['did']:
-                did_str = self._make_hex_key_str(did)
-                if did_str not in dest[data.vid_str]:
-                    dest[data.vid_str][did_str] = []
-                sku['req_pch'] = data.req_pch
-                sku['detect'] = data.detect_vals
-                dest[data.vid_str][did_str].append(sku)
-
-    def _find_sku_data(self, dict_ref, code, detect_val=None):
-        possible_sku = []
-        for vid_str in dict_ref:
-            for did_str in dict_ref[vid_str]:
-                for sku in dict_ref[vid_str][did_str]:
-                    if code and sku['code'] != code.upper():
-                        continue
-                    if not code:
-                        if vid_str not in self.CONFIG_PCI_RAW:
-                            continue
-                        if did_str not in self.CONFIG_PCI_RAW[vid_str]:
-                            continue
-                        if sku['detect'] and detect_val and detect_val not in sku['detect']:
-                            possible_sku.append(sku)
-                            continue
-                    return sku
-        if possible_sku:
-            if len(possible_sku) > 1:
-                logger().log_warning("Multiple SKUs found for detection value")
-            return possible_sku.pop()
-        return None
-    
-    def _find_did(self, sku):
-        vid_str = self._make_hex_key_str(sku['vid'])
-        if 'did' in sku and sku['did'] is int:
-            return sku['did']
-        else:
-            for did in sku['did']:
-                did_str = self._make_hex_key_str(did)
-                if did_str in self.CONFIG_PCI_RAW[vid_str]:
-                    return did
-        return 0xFFFF
-
-    def _get_config_iter(self, fxml):
-        tree = ET.parse(fxml.xml_file)
-        root = tree.getroot()
-        return root.iter('configuration')
-
-    def _load_sec_configs(self, load_list, stage):
-        stage_str = 'core' if stage == Stage.CORE_SUPPORT else 'custom'
-        tag_handlers = self._get_stage_parsers(stage)
-        if not load_list or not tag_handlers:
-            return
-        for fxml in load_list:
-            self.logger.log_debug('[*] Loading {} config data: [{}] - {}'.format(stage_str,
-                                                                                 fxml.dev_name,
-                                                                                 fxml.xml_file))
-            if not os.path.isfile(fxml.xml_file):
-                self.logger.log_debug('[-] File not found: {}'.format(fxml.xml_file))
-                continue
-            for config_root in self._get_config_iter(fxml):
-                for tag in tag_handlers:
-                    self.logger.log_debug('[*] Loading {} data...'.format(tag))
-                    for node in config_root.iter(tag):
-                        tag_handlers[tag](node, fxml)
-
-    ###
-    # Config loading functions
-    ###
-
[docs]    def load_parsers(self):
-        parser_path = os.path.join(get_main_dir(), 'chipsec', 'cfg', 'parsers')
-        if not os.path.isdir(parser_path):
-            raise CSConfigError('Unable to locate configuration parsers: {}'.format(parser_path))
-        parser_files = [f for f in sorted(os.listdir(parser_path))
-                        if fnmatch(f, '*.py') and not fnmatch(f, '__init__.py')]
-        for parser in parser_files:
-            parser_name = '.'.join(['chipsec', 'cfg', 'parsers', os.path.splitext(parser)[0]])
-            self.logger.log_debug('[*] Importing parser: {}'.format(parser_name))
-            try:
-                module = importlib.import_module(parser_name)
-            except Exception:
-                self.logger.log_debug('[*] Failed to import {}'.format(parser_name))
-                continue
-            if not hasattr(module, 'parsers'):
-                self.logger.log_debug('[*] Missing parsers variable: {}'.format(parser))
-                continue
-            for obj in module.parsers:
-                try:
-                    parser_obj = obj(self)
-                except Exception:
-                    self.logger.log_debug('[*] Failed to create object: {}'.format(parser))
-                    continue
-                parser_obj.startup()
-                self.parsers.append(parser_obj)

-
-
[docs]    def add_extra_configs(self, path, filename=None, loadnow=False):
-        config_path = os.path.join(get_main_dir(), 'chipsec', 'cfg', path)
-        if os.path.isdir(config_path) and filename is None:
-            self.load_extra = [config_data(None, None, os.path.join(config_path, f)) for f in sorted(os.listdir(config_path))
-                               if fnmatch(f, '*.xml')]
-        elif os.path.isdir(config_path) and filename:
-            self.load_extra = [config_data(None, None, os.path.join(config_path, f)) for f in sorted(os.listdir(config_path))
-                               if fnmatch(f, '*.xml') and fnmatch(f, filename)]
-        else:
-            raise CSConfigError('Unable to locate configuration file(s): {}'.format(config_path))
-        if loadnow and self.load_extra:
-            self._load_sec_configs(self.load_extra, Stage.EXTRA)

-
-
[docs]    def load_platform_info(self):
-        tag_handlers = self._get_stage_parsers(Stage.GET_INFO)
-        cfg_path = os.path.join(get_main_dir(), 'chipsec', 'cfg')
-
-        # Locate all root configuration files
-        cfg_files = []
-        cfg_vids = [f for f in os.listdir(cfg_path) if os.path.isdir(os.path.join(cfg_path, f)) and is_hex(f)]
-        for vid_str in cfg_vids:
-            root_path = os.path.join(cfg_path, vid_str)
-            cfg_files.extend([config_data(vid_str, None, os.path.join(root_path, f))
-                             for f in sorted(os.listdir(root_path))
-                             if fnmatch(f, '*.xml')])
-
-        # Process platform info data and generate lookup tables
-        for fxml in cfg_files:
-            self.logger.log_debug('[*] Processing platform config information: {}'.format(fxml.xml_file))
-            for config_root in self._get_config_iter(fxml):
-                stage_data = stage_info(fxml.vid_str, config_root)
-                for tag in tag_handlers:
-                    for node in config_root.iter(tag):
-                        data = tag_handlers[tag](node, stage_data)
-                        if not data:
-                            continue
-                        self._update_supported_platforms(fxml, data)
-
-        # Create platform global data
-        for cc in self.proc_codes:
-            globals()["CHIPSET_CODE_{}".format(cc.upper())] = cc.upper()
-        for pc in self.pch_codes:
-            globals()["PCH_CODE_{}".format(pc[4:].upper())] = pc.upper()

-
-
[docs]    def platform_detection(self, proc_code, pch_code, cpuid):
-        # Detect processor files
-        self.cpuid = cpuid
-        sku = self._find_sku_data(self.proc_dictionary, proc_code, cpuid)
-        if sku:
-            self.vid = sku['vid']
-            self.did = self._find_did(sku)
-            self.code = sku['code']
-            if not proc_code:
-                vid_str = self._make_hex_key_str(self.vid)
-                did_str = self._make_hex_key_str(self.did)
-                self.rid = self.CONFIG_PCI_RAW[vid_str][did_str]['rid']
-            self.longname = sku['longname']
-            self.req_pch = sku['req_pch']
-
-        # Detect PCH files
-        sku = self._find_sku_data(self.pch_dictionary, pch_code)
-        if sku:
-            self.pch_vid = sku['vid']
-            self.pch_did = self._find_did(sku)
-            self.pch_code = sku['code']
-            if not pch_code:
-                vid_str = self._make_hex_key_str(self.pch_vid)
-                did_str = self._make_hex_key_str(self.pch_did)
-                self.pch_rid = self.CONFIG_PCI_RAW[vid_str][did_str]['rid']
-            self.pch_longname = sku['longname']
-
-        # Create XML file load list
-        if LOAD_COMMON:
-            self.load_list.extend(self.get_common_xml())
-        if self.code:
-            self.load_list.extend(self.platform_xml_files[self.code])
-        if self.pch_code:
-            self.load_list.extend(self.platform_xml_files[self.pch_code])
-        if 'devices' in self.platform_xml_files:
-            self.load_list.extend(self.platform_xml_files['devices'])

-
-
[docs]    def load_platform_config(self):
-        sec_load_list = []
-        tag_handlers = self._get_stage_parsers(Stage.DEVICE_CFG)
-        for fxml in self.load_list:
-            self.logger.log_debug('[*] Loading primary config data: {}'.format(fxml.xml_file))
-            for config_root in self._get_config_iter(fxml):
-                for tag in tag_handlers:
-                    self.logger.log_debug('[*] Collecting {} configuration data...'.format(tag))
-                    for node in config_root.iter(tag):
-                        sec_load_list.extend(tag_handlers[tag](node, fxml))
-        self._load_sec_configs(sec_load_list, Stage.CORE_SUPPORT)
-        self._load_sec_configs(sec_load_list, Stage.CUST_SUPPORT)
-        if self.load_extra:
-            self._load_sec_configs(self.load_extra, Stage.EXTRA)

-
-
[docs]    def get_common_xml(self):
-        cfg_path = os.path.join(get_main_dir(), 'chipsec', 'cfg')
-        vid = f'{self.vid:X}'
-
-        # Locate all common configuration files
-        cfg_files = []
-        cfg_vids = [f for f in os.listdir(cfg_path) if os.path.isdir(os.path.join(cfg_path, f)) and is_hex(f)]
-        if vid in cfg_vids:
-            root_path = os.path.join(cfg_path, vid)
-            cfg_files.extend([config_data(vid, None, os.path.join(root_path, f))
-                             for f in sorted(os.listdir(root_path))
-                             if fnmatch(f, '*.xml') and fnmatch(f, 'common*')])
-        return cfg_files

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/fuzzing/primitives.html b/_modules/chipsec/fuzzing/primitives.html deleted file mode 100644 index dc3a12a1..00000000 --- a/_modules/chipsec/fuzzing/primitives.html +++ /dev/null @@ -1,974 +0,0 @@ - - - - - - - - chipsec.fuzzing.primitives — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.fuzzing.primitives

-import random
-import struct
-
-
-########################################################################################################################
-
-
-
[docs]class base_primitive:
-    '''
-    The primitive base class implements common functionality shared across most primitives.
-    '''
-
-    def __init__(self):
-        self.fuzz_complete = False     # this flag is raised when the mutations are exhausted.
-        self.fuzz_library = []        # library of static fuzz heuristics to cycle through.
-        self.fuzzable = True      # flag controlling whether or not the given primitive is to be fuzzed.
-        self.mutant_index = 0         # current mutation index into the fuzz library.
-        self.original_value = None      # original value of primitive.
-        self.rendered = ""        # rendered value of primitive.
-        self.value = None      # current value of primitive.
-
-
[docs]    def exhaust(self):
-        '''
-        Exhaust the possible mutations for this primitive.
-
-        @rtype:  Integer
-        @return: The number of mutations to reach exhaustion
-        '''
-
-        num = self.num_mutations() - self.mutant_index
-
-        self.fuzz_complete = True
-        self.mutant_index = self.num_mutations()
-        self.value = self.original_value
-
-        return num

-
-
[docs]    def mutate(self):
-        '''
-        Mutate the primitive by stepping through the fuzz library, return False on completion.
-
-        @rtype:  Boolean
-        @return: True on success, False otherwise.
-        '''
-
-        # if we've ran out of mutations, raise the completion flag.
-        if self.mutant_index == self.num_mutations():
-            self.fuzz_complete = True
-
-        # if fuzzing was disabled or complete, and mutate() is called, ensure the original value is restored.
-        if not self.fuzzable or self.fuzz_complete:
-            self.value = self.original_value
-            return False
-
-        # update the current value from the fuzz library.
-        self.value = self.fuzz_library[self.mutant_index]
-
-        # increment the mutation count.
-        self.mutant_index += 1
-
-        return True

-
-
[docs]    def num_mutations(self):
-        '''
-        Calculate and return the total number of mutations for this individual primitive.
-
-        @rtype:  Integer
-        @return: Number of mutated forms this primitive can take
-        '''
-
-        return len(self.fuzz_library)

-
-
[docs]    def render(self):
-        '''
-        Nothing fancy on render, simply return the value.
-        '''
-
-        self.rendered = self.value
-        return self.rendered

-
-
[docs]    def reset(self):
-        '''
-        Reset this primitive to the starting mutation state.
-        '''
-
-        self.fuzz_complete = False
-        self.mutant_index = 0
-        self.value = self.original_value

-
-
-########################################################################################################################
-
[docs]class delim(base_primitive):
-    def __init__(self, value, fuzzable=True, name=None):
-        '''
-        Represent a delimiter such as :,\r,\n, ,=,>,< etc... Mutations include repetition, substitution and exclusion.
-
-        @type  value:    Character
-        @param value:    Original value
-        @type  fuzzable: Boolean
-        @param fuzzable: (Optional, def=True) Enable/disable fuzzing of this primitive
-        @type  name:     String
-        @param name:     (Optional, def=None) Specifying a name gives you direct access to a primitive
-        '''
-        super(delim, self).__init__()
-        self.value = self.original_value = value
-        self.fuzzable = fuzzable
-        self.name = name
-
-        self.s_type = "delim"   # for ease of object identification
-
-        #
-        # build the library of fuzz heuristics.
-        #
-
-        # if the default delim is not blank, repeat it a bunch of times.
-        if self.value:
-            self.fuzz_library.append(self.value * 2)
-            self.fuzz_library.append(self.value * 5)
-            self.fuzz_library.append(self.value * 10)
-            self.fuzz_library.append(self.value * 25)
-            self.fuzz_library.append(self.value * 100)
-            self.fuzz_library.append(self.value * 500)
-            self.fuzz_library.append(self.value * 1000)
-
-        # try omitting the delimiter.
-        self.fuzz_library.append("")
-
-        # if the delimiter is a space, try throwing out some tabs.
-        if self.value == " ":
-            self.fuzz_library.append("\t")
-            self.fuzz_library.append("\t" * 2)
-            self.fuzz_library.append("\t" * 100)
-
-        # toss in some other common delimiters:
-        self.fuzz_library.append(" ")
-        self.fuzz_library.append("\t")
-        self.fuzz_library.append("\t " * 100)
-        self.fuzz_library.append("\t\r\n" * 100)
-        self.fuzz_library.append("!")
-        self.fuzz_library.append("@")
-        self.fuzz_library.append("#")
-        self.fuzz_library.append("$")
-        self.fuzz_library.append("%")
-        self.fuzz_library.append("^")
-        self.fuzz_library.append("&")
-        self.fuzz_library.append("*")
-        self.fuzz_library.append("(")
-        self.fuzz_library.append(")")
-        self.fuzz_library.append("-")
-        self.fuzz_library.append("_")
-        self.fuzz_library.append("+")
-        self.fuzz_library.append("=")
-        self.fuzz_library.append(":")
-        self.fuzz_library.append(": " * 100)
-        self.fuzz_library.append(":7" * 100)
-        self.fuzz_library.append(";")
-        self.fuzz_library.append("'")
-        self.fuzz_library.append("\"")
-        self.fuzz_library.append("/")
-        self.fuzz_library.append("\\")
-        self.fuzz_library.append("?")
-        self.fuzz_library.append("<")
-        self.fuzz_library.append(">")
-        self.fuzz_library.append(".")
-        self.fuzz_library.append(",")
-        self.fuzz_library.append("\r")
-        self.fuzz_library.append("\n")
-        self.fuzz_library.append("\r\n" * 64)
-        self.fuzz_library.append("\r\n" * 128)
-        self.fuzz_library.append("\r\n" * 512)

-
-
-########################################################################################################################
-
[docs]class group(base_primitive):
-    def __init__(self, name, values):
-        '''
-        This primitive represents a list of static values, stepping through each one on mutation. You can tie a block
-        to a group primitive to specify that the block should cycle through all possible mutations for *each* value
-        within the group. The group primitive is useful for example for representing a list of valid opcodes.
-
-        @type  name:   String
-        @param name:   Name of group
-        @type  values: List or raw data
-        @param values: List of possible raw values this group can take.
-        '''
-        super(group, self).__init__()
-        self.name = name
-        self.values = values
-        self.fuzzable = True
-
-        self.s_type = "group"
-        self.value = self.values[0]
-        self.original_value = self.values[0]
-
-        # sanity check that values list only contains strings (or raw data)
-        if self.values != []:
-            for val in self.values:
-                assert isinstance(val, str), "Value list may only contain strings or raw data"
-
-
[docs]    def mutate(self):
-        '''
-        Move to the next item in the values list.
-
-        @rtype:  False
-        @return: False
-        '''
-
-        if self.mutant_index == self.num_mutations():
-            self.fuzz_complete = True
-
-        # if fuzzing was disabled or complete, and mutate() is called, ensure the original value is restored.
-        if not self.fuzzable or self.fuzz_complete:
-            self.value = self.values[0]
-            return False
-
-        # step through the value list.
-        self.value = self.values[self.mutant_index]
-
-        # increment the mutation count.
-        self.mutant_index += 1
-
-        return True

-
-
[docs]    def num_mutations(self):
-        '''
-        Number of values in this primitive.
-
-        @rtype:  Integer
-        @return: Number of values in this primitive.
-        '''
-
-        return len(self.values)

-
-
-########################################################################################################################
-
[docs]class random_data(base_primitive):
-    def __init__(self, value, min_length, max_length, max_mutations=25, fuzzable=True, step=None, name=None):
-        '''
-        Generate a random chunk of data while maintaining a copy of the original. A random length range can be specified.
-        For a static length, set min/max length to be the same.
-
-        @type  value:         Raw
-        @param value:         Original value
-        @type  min_length:    Integer
-        @param min_length:    Minimum length of random block
-        @type  max_length:    Integer
-        @param max_length:    Maximum length of random block
-        @type  max_mutations: Integer
-        @param max_mutations: (Optional, def=25) Number of mutations to make before reverting to default
-        @type  fuzzable:      Boolean
-        @param fuzzable:      (Optional, def=True) Enable/disable fuzzing of this primitive
-        @type  step:          Integer
-        @param step:          (Optional, def=None) If not null, step count between min and max reps, otherwise random
-        @type  name:          String
-        @param name:          (Optional, def=None) Specifying a name gives you direct access to a primitive
-        '''
-
-        super(random_data, self).__init__()
-        self.value = self.original_value = str(value)
-        self.min_length = min_length
-        self.max_length = max_length
-        self.max_mutations = max_mutations
-        self.fuzzable = fuzzable
-        self.step = step
-        self.name = name
-
-        self.s_type = "random_data"  # for ease of object identification
-
-        if self.step:
-            self.max_mutations = (self.max_length - self.min_length) // self.step + 1
-
-
[docs]    def mutate(self):
-        '''
-        Mutate the primitive value returning False on completion.
-
-        @rtype:  Boolean
-        @return: True on success, False otherwise.
-        '''
-
-        # if we've ran out of mutations, raise the completion flag.
-        if self.mutant_index == self.num_mutations():
-            self.fuzz_complete = True
-
-        # if fuzzing was disabled or complete, and mutate() is called, ensure the original value is restored.
-        if not self.fuzzable or self.fuzz_complete:
-            self.value = self.original_value
-            return False
-
-        # select a random length for this string.
-        if not self.step:
-            length = random.randint(self.min_length, self.max_length)
-        # select a length function of the mutant index and the step.
-        else:
-            length = self.min_length + self.mutant_index * self.step
-
-        # reset the value and generate a random string of the determined length.
-        self.value = b""
-        for i in range(length):
-            self.value += struct.pack("B", random.randint(0, 255))
-
-        # increment the mutation count.
-        self.mutant_index += 1
-
-        return True

-
-
[docs]    def num_mutations(self):
-        '''
-        Calculate and return the total number of mutations for this individual primitive.
-
-        @rtype:  Integer
-        @return: Number of mutated forms this primitive can take
-        '''
-
-        return self.max_mutations

-
-
-########################################################################################################################
-
[docs]class static(base_primitive):
-    def __init__(self, value, name=None):
-        '''
-        Primitive that contains static content.
-
-        @type  value: Raw
-        @param value: Raw static data
-        @type  name:  String
-        @param name:  (Optional, def=None) Specifying a name gives you direct access to a primitive
-        '''
-
-        super(static, self).__init__()
-        self.value = self.original_value = value
-        self.name = name
-        self.fuzzable = False       # every primitive needs this attribute.
-        self.s_type = "static"    # for ease of object identification
-        self.fuzz_complete = True
-
-
[docs]    def mutate(self):
-        '''
-        Do nothing.
-
-        @rtype:  False
-        @return: False
-        '''
-
-        return False

-
-
[docs]    def num_mutations(self):
-        '''
-        Return 0.
-
-        @rtype:  0
-        @return: 0
-        '''
-
-        return 0

-
-
-########################################################################################################################
-
[docs]class string(base_primitive):
-    # store fuzz_library as a class variable to avoid copying the ~70MB structure across each instantiated primitive.
-    fuzz_library = []
-
-    def __init__(self, value, size=-1, padding="\x00", encoding="ascii", fuzzable=True, max_len=0, name=None):
-        '''
-        Primitive that cycles through a library of "bad" strings. The class variable 'fuzz_library' contains a list of
-        smart fuzz values global across all instances. The 'this_library' variable contains fuzz values specific to
-        the instantiated primitive. This allows us to avoid copying the near ~70MB fuzz_library data structure across
-        each instantiated primitive.
-
-        @type  value:    String
-        @param value:    Default string value
-        @type  size:     Integer
-        @param size:     (Optional, def=-1) Static size of this field, leave -1 for dynamic.
-        @type  padding:  Character
-        @param padding:  (Optional, def="\\x00") Value to use as padding to fill static field size.
-        @type  encoding: String
-        @param encoding: (Optonal, def="ascii") String encoding, ex: utf_16_le for Microsoft Unicode.
-        @type  fuzzable: Boolean
-        @param fuzzable: (Optional, def=True) Enable/disable fuzzing of this primitive
-        @type  max_len:  Integer
-        @param max_len:  (Optional, def=0) Maximum string length
-        @type  name:     String
-        @param name:     (Optional, def=None) Specifying a name gives you direct access to a primitive
-        '''
-
-        super(string, self).__init__()
-        self.value = self.original_value = value
-        self.size = size
-        self.padding = padding
-        self.encoding = encoding
-        self.fuzzable = fuzzable
-        self.name = name
-
-        self.s_type = "string"  # for ease of object identification
-
-        # add this specific primitives repitition values to the unique fuzz library.
-        self.this_library = \
-            [
-                self.value * 2,
-                self.value * 10,
-                self.value * 100,
-
-                # UTF-8
-                self.value * 2 + "\xfe",
-                self.value * 10 + "\xfe",
-                self.value * 100 + "\xfe",
-            ]
-
-        # if the fuzz library has not yet been initialized, do so with all the global values.
-        if not self.fuzz_library:
-            string.fuzz_library = \
-                [
-                    # omission.
-                    "",
-
-                    # strings ripped from spike (and some others I added)
-                    "/.:/" + "A" * 5000 + "\x00\x00",
-                    "/.../" + "A" * 5000 + "\x00\x00",
-                    "/.../.../.../.../.../.../.../.../.../.../",
-                    "/../../../../../../../../../../../../etc/passwd",
-                    "/../../../../../../../../../../../../boot.ini",
-                    "..:..:..:..:..:..:..:..:..:..:..:..:..:",
-                    "\\\\*",
-                    "\\\\?\\",
-                    "/\\" * 5000,
-                    "/." * 5000,
-                    "!@#$%%^#$%#$@#$%$$@#$%^^**(()",
-                    "%01%02%03%04%0a%0d%0aADSF",
-                    "%01%02%03@%04%0a%0d%0aADSF",
-                    "/%00/",
-                    "%00/",
-                    "%00",
-                    "%u0000",
-                    "%\xfe\xf0%\x00\xff",
-                    "%\xfe\xf0%\x01\xff" * 20,
-
-                    # format strings.
-                    "%n" * 100,
-                    "%n" * 500,
-                    "\"%n\"" * 500,
-                    "%s" * 100,
-                    "%s" * 500,
-                    "\"%s\"" * 500,
-
-                    # command injection.
-                    "|touch /tmp/SULLEY",
-                    ";touch /tmp/SULLEY;",
-                    "|notepad",
-                    ";notepad;",
-                    "\nnotepad\n",
-
-                    # SQL injection.
-                    "1;SELECT%20*",
-                    "'sqlattempt1",
-                    "(sqlattempt2)",
-                    "OR%201=1",
-
-                    # some binary strings.
-                    "\xde\xad\xbe\xef",
-                    "\xde\xad\xbe\xef" * 10,
-                    "\xde\xad\xbe\xef" * 100,
-                    "\xde\xad\xbe\xef" * 1000,
-                    "\xde\xad\xbe\xef" * 10000,
-                    "\x00" * 1000,
-
-                    # miscellaneous.
-                    "\r\n" * 100,
-                    "<>" * 500,         # sendmail crackaddr (http://lsd-pl.net/other/sendmail.txt)
-                ]
-
-            # add some long strings.
-            self.add_long_strings("A")
-            self.add_long_strings("B")
-            self.add_long_strings("1")
-            self.add_long_strings("2")
-            self.add_long_strings("3")
-            self.add_long_strings("<")
-            self.add_long_strings(">")
-            self.add_long_strings("'")
-            self.add_long_strings("\"")
-            self.add_long_strings("/")
-            self.add_long_strings("\\")
-            self.add_long_strings("?")
-            self.add_long_strings("=")
-            self.add_long_strings("a=")
-            self.add_long_strings("&")
-            self.add_long_strings(".")
-            self.add_long_strings(",")
-            self.add_long_strings("(")
-            self.add_long_strings(")")
-            self.add_long_strings("]")
-            self.add_long_strings("[")
-            self.add_long_strings("%")
-            self.add_long_strings("*")
-            self.add_long_strings("-")
-            self.add_long_strings("+")
-            self.add_long_strings("{")
-            self.add_long_strings("}")
-            self.add_long_strings("\x14")
-            self.add_long_strings("\xFE")   # expands to 4 characters under utf16
-            self.add_long_strings("\xFF")   # expands to 4 characters under utf16
-
-            # add some long strings with null bytes thrown in the middle of it.
-            for length in [128, 256, 1024, 2048, 4096, 32767, 0xFFFF]:
-                s = "B" * length
-                s = s[:len(s) // 2] + "\x00" + s[len(s) // 2:]
-                string.fuzz_library.append(s)
-
-            # if the optional file '.fuzz_strings' is found, parse each line as a new entry for the fuzz library.
-            try:
-                fh = open(".fuzz_strings", "r")
-
-                for fuzz_string in fh.readlines():
-                    fuzz_string = fuzz_string.rstrip("\r\n")
-
-                    if fuzz_string != "":
-                        string.fuzz_library.append(fuzz_string)
-
-                fh.close()
-            except:
-                pass
-
-        # delete strings which length is greater than max_len.
-        if max_len > 0:
-            if any(len(s) > max_len for s in self.this_library):
-                self.this_library = list(set([s[:max_len] for s in self.this_library]))
-
-            if any(len(s) > max_len for s in self.fuzz_library):
-                self.fuzz_library = list(set([s[:max_len] for s in self.fuzz_library]))
-
-
[docs]    def add_long_strings(self, sequence):
-        '''
-        Given a sequence, generate a number of selectively chosen strings lengths of the given sequence and add to the
-        string heuristic library.
-
-        @type  sequence: String
-        @param sequence: Sequence to repeat for creation of fuzz strings.
-        '''
-
-        for length in [128, 255, 256, 257, 511, 512, 513, 1023, 1024, 2048, 2049, 4095, 4096, 4097, 5000, 10000, 20000,
-                       32762, 32763, 32764, 32765, 32766, 32767, 32768, 32769, 0xFFFF - 2, 0xFFFF - 1, 0xFFFF, 0xFFFF + 1,
-                       0xFFFF + 2, 99999, 100000, 500000, 1000000]:
-
-            long_string = sequence * length
-            string.fuzz_library.append(long_string)

-
-
[docs]    def mutate(self):
-        '''
-        Mutate the primitive by stepping through the fuzz library extended with the "this" library, return False on
-        completion.
-
-        @rtype:  Boolean
-        @return: True on success, False otherwise.
-        '''
-
-        # loop through the fuzz library until a suitable match is found.
-        while 1:
-            # if we've ran out of mutations, raise the completion flag.
-            if self.mutant_index == self.num_mutations():
-                self.fuzz_complete = True
-
-            # if fuzzing was disabled or complete, and mutate() is called, ensure the original value is restored.
-            if not self.fuzzable or self.fuzz_complete:
-                self.value = self.original_value
-                return False
-
-            # update the current value from the fuzz library.
-            self.value = (self.fuzz_library + self.this_library)[self.mutant_index]
-
-            # increment the mutation count.
-            self.mutant_index += 1
-
-            # if the size parameter is disabled, break out of the loop right now.
-            if self.size == -1:
-                break
-
-            # ignore library items greater then user-supplied length.
-            # TODO: might want to make this smarter.
-            if len(self.value) > self.size:
-                continue
-
-            # pad undersized library items.
-            if len(self.value) < self.size:
-                self.value = self.value + self.padding * (self.size - len(self.value))
-                break
-
-        return True

-
-
[docs]    def num_mutations(self):
-        '''
-        Calculate and return the total number of mutations for this individual primitive.
-
-        @rtype:  Integer
-        @return: Number of mutated forms this primitive can take
-        '''
-
-        return len(self.fuzz_library) + len(self.this_library)

-
-
[docs]    def render(self):
-        '''
-        Render the primitive, encode the string according to the specified encoding.
-        '''
-
-        # try to encode the string properly and fall back to the default value on failure.
-        try:
-            self.rendered = str(self.value).encode(self.encoding)
-        except:
-            self.rendered = str(self.value).encode('latin-1')
-
-        return self.rendered

-
-
-########################################################################################################################
-
[docs]class bit_field(base_primitive):
-    def __init__(self, value, width, max_num=None, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
-        '''
-        The bit field primitive represents a number of variable length and is used to define all other integer types.
-
-        @type  value:      Integer
-        @param value:      Default integer value
-        @type  width:      Integer
-        @param width:      Width of bit fields
-        @type  endian:     Character
-        @param endian:     (Optional, def=LITTLE_ENDIAN) Endianess of the bit field (LITTLE_ENDIAN: <, BIG_ENDIAN: >)
-        @type  format:     String
-        @param format:     (Optional, def=binary) Output format, "binary" or "ascii"
-        @type  signed:     Boolean
-        @param signed:     (Optional, def=False) Make size signed vs. unsigned (applicable only with format="ascii")
-        @type  full_range: Boolean
-        @param full_range: (Optional, def=False) If enabled the field mutates through *all* possible values.
-        @type  fuzzable:   Boolean
-        @param fuzzable:   (Optional, def=True) Enable/disable fuzzing of this primitive
-        @type  name:       String
-        @param name:       (Optional, def=None) Specifying a name gives you direct access to a primitive
-        '''
-
-        super(bit_field, self).__init__()
-        assert isinstance(width, int)
-
-        if isinstance(value, (int, list, tuple)):
-            self.value = self.original_value = value
-        else:
-            raise ValueError("The supplied value must be either an Int, Long, List or Tuple.")
-
-        self.width = width
-        self.max_num = max_num
-        self.endian = endian
-        self.format = format
-        self.signed = signed
-        self.full_range = full_range
-        self.fuzzable = fuzzable
-        self.name = name
-
-        self.rendered = b""        # rendered value
-        self.cyclic_index = 0         # when cycling through non-mutating values
-
-        if self.max_num is None:
-            self.max_num = self.to_decimal("1" + "0" * width)
-
-        assert isinstance(self.max_num, int)
-
-        # build the fuzz library.
-        if self.full_range:
-            # add all possible values.
-            for i in range(0, self.max_num):
-                self.fuzz_library.append(i)
-        else:
-            if isinstance(value, (list, tuple)):
-                # Use the supplied values as the fuzz library.
-                for val in value:
-                    self.fuzz_library.append(val)
-            else:
-                # try only "smart" values.
-                self.add_integer_boundaries(0)
-                self.add_integer_boundaries(self.max_num // 2)
-                self.add_integer_boundaries(self.max_num // 3)
-                self.add_integer_boundaries(self.max_num // 4)
-                self.add_integer_boundaries(self.max_num // 8)
-                self.add_integer_boundaries(self.max_num // 16)
-                self.add_integer_boundaries(self.max_num // 32)
-                self.add_integer_boundaries(self.max_num)
-
-        # if the optional file '.fuzz_ints' is found, parse each line as a new entry for the fuzz library.
-        try:
-            fh = open(".fuzz_ints", "r")
-
-            for fuzz_int in fh.readlines():
-                # convert the line into an integer, continue on failure.
-                try:
-                    fuzz_int = int(fuzz_int, 16)
-                except:
-                    continue
-
-                if fuzz_int < self.max_num:
-                    self.fuzz_library.append(fuzz_int)
-
-            fh.close()
-        except:
-            pass
-
-
[docs]    def add_integer_boundaries(self, integer):
-        '''
-        Add the supplied integer and border cases to the integer fuzz heuristics library.
-
-        @type  integer: Int
-        @param integer: Integer to append to fuzz heuristics
-        '''
-
-        for i in range(-10, 10):
-            case = integer + i
-
-            # ensure the border case falls within the valid range for this field.
-            if 0 <= case < self.max_num:
-                if case not in self.fuzz_library:
-                    self.fuzz_library.append(case)

-
-
[docs]    def render(self):
-        '''
-        Render the primitive.
-        '''
-
-        #
-        # binary formatting.
-        #
-
-        if self.format == "binary":
-            bit_stream = ""
-            rendered = b""
-
-            # pad the bit stream to the next byte boundary.
-            if self.width % 8 == 0:
-                bit_stream += self.to_binary()
-            else:
-                bit_stream = "0" * (8 - (self.width % 8))
-                bit_stream += self.to_binary()
-
-            # convert the bit stream from a string of bits into raw bytes.
-            for i in range(len(bit_stream) // 8):
-                chunk = bit_stream[8 * i:8 * i + 8]
-                rendered += struct.pack("B", self.to_decimal(chunk))
-
-            # if necessary, convert the endianess of the raw bytes.
-            if self.endian == "<":
-                rendered = rendered[::-1]
-
-            self.rendered = rendered
-
-        #
-        # ascii formatting.
-        #
-
-        else:
-            # if the sign flag is raised and we are dealing with a signed integer (first bit is 1).
-            if self.signed and self.to_binary()[0] == "1":
-                max_num = self.to_decimal("1" + "0" * (self.width - 1))
-
-                # mask off the sign bit.
-                val = self.value & self.to_decimal("1" * (self.width - 1))
-
-                # account for the fact that the negative scale works backwards.
-                val = max_num - val - 1
-
-                # toss in the negative sign.
-                self.rendered = "%d" % ~val
-
-            # unsigned integer or positive signed integer.
-            else:
-                self.rendered = "%d" % self.value
-        return self.rendered

-
-
[docs]    def to_binary(self, number=None, bit_count=None):
-        '''
-        Convert a number to a binary string.
-
-        @type  number:    Integer
-        @param number:    (Optional, def=self.value) Number to convert
-        @type  bit_count: Integer
-        @param bit_count: (Optional, def=self.width) Width of bit string
-
-        @rtype:  String
-        @return: Bit string
-        '''
-        if number is None:
-            if isinstance(self.value, (list, tuple)):
-                # We have been given a list to cycle through that is not being mutated...
-                if self.cyclic_index == len(self.value):
-                    # Reset the index.
-                    self.cyclic_index = 0
-                number = self.value[self.cyclic_index]
-                self.cyclic_index += 1
-            else:
-                number = self.value
-
-        if bit_count is None:
-            bit_count = self.width
-
-        return "".join(map(lambda x: str((number >> x) & 1), range(bit_count - 1, -1, -1)))

-
-
[docs]    def to_decimal(self, binary):
-        '''
-        Convert a binary string to a decimal number.
-
-        @type  binary: String
-        @param binary: Binary string
-
-        @rtype:  Integer
-        @return: Converted bit string
-        '''
-
-        return int(binary, 2)

-
-
-########################################################################################################################
-
[docs]class byte (bit_field):
-    def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
-        self.s_type = "byte"
-        if not isinstance(value, (int, list, tuple)):
-            value = struct.unpack(endian + "B", value)[0]
-
-        bit_field.__init__(self, value, 8, None, endian, format, signed, full_range, fuzzable, name)

-
-
-########################################################################################################################
-
[docs]class word (bit_field):
-    def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
-        self.s_type = "word"
-        if not isinstance(value, (int, list, tuple)):
-            value = struct.unpack(endian + "H", value)[0]
-
-        bit_field.__init__(self, value, 16, None, endian, format, signed, full_range, fuzzable, name)

-
-
-########################################################################################################################
-
[docs]class dword (bit_field):
-    def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
-        self.s_type = "dword"
-        if not isinstance(value, (int, list, tuple)):
-            value = struct.unpack(endian + "L", value)[0]
-
-        bit_field.__init__(self, value, 32, None, endian, format, signed, full_range, fuzzable, name)

-
-
-########################################################################################################################
-
[docs]class qword (bit_field):
-    def __init__(self, value, endian="<", format="binary", signed=False, full_range=False, fuzzable=True, name=None):
-        self.s_type = "qword"
-        if not isinstance(value, (int, list, tuple)):
-            value = struct.unpack(endian + "Q", value)[0]
-
-        bit_field.__init__(self, value, 64, None, endian, format, signed, full_range, fuzzable, name)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/acpi.html b/_modules/chipsec/hal/acpi.html deleted file mode 100644 index c840828b..00000000 --- a/_modules/chipsec/hal/acpi.html +++ /dev/null @@ -1,655 +0,0 @@ - - - - - - - - chipsec.hal.acpi — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.acpi

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-HAL component providing access to and decoding of ACPI tables
-"""
-
-__version__ = '0.1'
-
-import struct
-from typing import Dict, List, Tuple, Optional, Callable, Union
-from collections import defaultdict
-from collections import namedtuple
-
-from chipsec.defines import bytestostring
-from chipsec.exceptions import UnimplementedAPIError
-from chipsec.file import read_file
-from chipsec.hal import acpi_tables
-from chipsec.hal.hal_base import HALBase
-from chipsec.hal.uefi import UEFI
-from chipsec.logger import logger, print_buffer_bytes
-from chipsec.hal.acpi_tables import ACPI_TABLE
-
-# ACPI Table Header Format
-ACPI_TABLE_HEADER_FORMAT = '=4sIBB6s8sI4sI'
-ACPI_TABLE_HEADER_SIZE = struct.calcsize(ACPI_TABLE_HEADER_FORMAT)  # 36
-assert 36 == ACPI_TABLE_HEADER_SIZE
-
-
-
[docs]class ACPI_TABLE_HEADER(namedtuple('ACPI_TABLE_HEADER', 'Signature Length Revision Checksum OEMID OEMTableID OEMRevision CreatorID CreatorRevision')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""  Table Header
-------------------------------------------------------------------
-  Signature        : {self.Signature}
-  Length           : 0x{self.Length:08X}
-  Revision         : 0x{self.Revision:02X}
-  Checksum         : 0x{self.Checksum:02X}
-  OEM ID           : {self.OEMID}
-  OEM Table ID     : {self.OEMTableID}
-  OEM Revision     : 0x{self.OEMRevision:08X}
-  Creator ID       : {self.CreatorID}
-  Creator Revision : 0x{self.CreatorRevision:08X}
-"""

-
-
-ACPI_TABLE_SIG_SIZE = 0x4
-
-ACPI_TABLE_SIG_ROOT = 'ROOT'
-ACPI_TABLE_SIG_RSDP = 'RSDP'
-ACPI_TABLE_SIG_RSDT = 'RSDT'
-ACPI_TABLE_SIG_XSDT = 'XSDT'
-ACPI_TABLE_SIG_FACP = 'FACP'
-ACPI_TABLE_SIG_FACS = 'FACS'
-ACPI_TABLE_SIG_DSDT = 'DSDT'
-ACPI_TABLE_SIG_SSDT = 'SSDT'
-ACPI_TABLE_SIG_PSDT = 'PSDT'
-ACPI_TABLE_SIG_APIC = 'APIC'
-ACPI_TABLE_SIG_SBST = 'SBST'
-ACPI_TABLE_SIG_ECDT = 'ECDT'
-ACPI_TABLE_SIG_SRAT = 'SRAT'
-ACPI_TABLE_SIG_SLIC = 'SLIC'
-ACPI_TABLE_SIG_SLIT = 'SLIT'
-ACPI_TABLE_SIG_BOOT = 'BOOT'
-ACPI_TABLE_SIG_CPEP = 'CPEP'
-ACPI_TABLE_SIG_DBGP = 'DBGP'
-ACPI_TABLE_SIG_ETDT = 'ETDT'
-ACPI_TABLE_SIG_HPET = 'HPET'
-ACPI_TABLE_SIG_MCFG = 'MCFG'
-ACPI_TABLE_SIG_SPCR = 'SPCR'
-ACPI_TABLE_SIG_SPMI = 'SPMI'
-ACPI_TABLE_SIG_TCPA = 'TCPA'
-ACPI_TABLE_SIG_WDAT = 'WDAT'
-ACPI_TABLE_SIG_WDRT = 'WDRT'
-ACPI_TABLE_SIG_WSPT = 'WSPT'
-ACPI_TABLE_SIG_WDDT = 'WDDT'
-ACPI_TABLE_SIG_ASF = 'ASF!'
-ACPI_TABLE_SIG_MSEG = 'MSEG'
-ACPI_TABLE_SIG_DMAR = 'DMAR'
-ACPI_TABLE_SIG_UEFI = 'UEFI'
-ACPI_TABLE_SIG_FPDT = 'FPDT'
-ACPI_TABLE_SIG_PCCT = 'PCCT'
-ACPI_TABLE_SIG_MSDM = 'MSDM'
-ACPI_TABLE_SIG_BATB = 'BATB'
-ACPI_TABLE_SIG_BGRT = 'BGRT'
-ACPI_TABLE_SIG_LPIT = 'LPIT'
-ACPI_TABLE_SIG_ASPT = 'ASPT'
-ACPI_TABLE_SIG_FIDT = 'FIDT'
-ACPI_TABLE_SIG_HEST = 'HEST'
-ACPI_TABLE_SIG_BERT = 'BERT'
-ACPI_TABLE_SIG_ERST = 'ERST'
-ACPI_TABLE_SIG_EINJ = 'EINJ'
-ACPI_TABLE_SIG_TPM2 = 'TPM2'
-ACPI_TABLE_SIG_WSMT = 'WSMT'
-ACPI_TABLE_SIG_DBG2 = 'DBG2'
-ACPI_TABLE_SIG_NHLT = 'NHLT'
-ACPI_TABLE_SIG_MSCT = 'MSCT'
-ACPI_TABLE_SIG_RASF = 'RASF'
-ACPI_TABLE_SIG_OEM1 = 'OEM1'
-ACPI_TABLE_SIG_OEM2 = 'OEM2'
-ACPI_TABLE_SIG_OEM3 = 'OEM3'
-ACPI_TABLE_SIG_OEM4 = 'OEM4'
-ACPI_TABLE_SIG_NFIT = 'NFIT'
-
-ACPI_TABLES: Dict[str, Callable] = {
-    ACPI_TABLE_SIG_ROOT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_RSDT: acpi_tables.RSDT,
-    ACPI_TABLE_SIG_XSDT: acpi_tables.XSDT,
-    ACPI_TABLE_SIG_FACP: acpi_tables.FADT,
-    ACPI_TABLE_SIG_FACS: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_DSDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_SSDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_PSDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_APIC: acpi_tables.APIC,
-    ACPI_TABLE_SIG_SBST: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_ECDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_SRAT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_SLIC: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_SLIT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_BOOT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_CPEP: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_DBGP: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_ETDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_HPET: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_MCFG: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_SPCR: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_TCPA: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_WDAT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_WDRT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_WSPT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_WDDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_ASF: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_MSEG: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_DMAR: acpi_tables.DMAR,
-    ACPI_TABLE_SIG_UEFI: acpi_tables.UEFI_TABLE,
-    ACPI_TABLE_SIG_FPDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_PCCT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_MSDM: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_BATB: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_BGRT: acpi_tables.BGRT,
-    ACPI_TABLE_SIG_LPIT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_ASPT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_FIDT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_HEST: acpi_tables.HEST,
-    ACPI_TABLE_SIG_BERT: acpi_tables.BERT,
-    ACPI_TABLE_SIG_ERST: acpi_tables.ERST,
-    ACPI_TABLE_SIG_EINJ: acpi_tables.EINJ,
-    ACPI_TABLE_SIG_TPM2: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_WSMT: acpi_tables.WSMT,
-    ACPI_TABLE_SIG_DBG2: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_NHLT: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_MSCT: acpi_tables.MSCT,
-    ACPI_TABLE_SIG_RASF: acpi_tables.RASF,
-    ACPI_TABLE_SIG_SPMI: acpi_tables.SPMI,
-    ACPI_TABLE_SIG_OEM1: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_OEM2: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_OEM3: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_OEM4: acpi_tables.ACPI_TABLE,
-    ACPI_TABLE_SIG_NFIT: acpi_tables.NFIT
-}
-
-########################################################################################################
-#
-# RSDP
-#
-########################################################################################################
-
-RSDP_GUID_ACPI2_0 = '8868E871-E4F1-11D3-BC22-0080C73C8881'
-RSDP_GUID_ACPI1_0 = 'EB9D2D31-2D88-11D3-9A16-0090273FC14D'
-ACPI_RSDP_SIG = 'RSD PTR '
-
-########################################################################################################
-#
-# ACPI HAL Component
-#
-########################################################################################################
-
-
-
[docs]class ACPI(HALBase):
-    def __init__(self, cs):
-        super(ACPI, self).__init__(cs)
-        self.uefi = UEFI(self.cs)
-        self.tableList: Dict[str, List[int]] = defaultdict(list)
-        self.get_ACPI_table_list()
-
-
[docs]    def read_RSDP(self, rsdp_pa: int) -> acpi_tables.RSDP:
-        rsdp_buf = self.cs.mem.read_physical_mem(rsdp_pa, acpi_tables.ACPI_RSDP_SIZE)
-        rsdp = acpi_tables.RSDP()
-        rsdp.parse(rsdp_buf)
-        if rsdp.Revision >= 0x2:
-            rsdp_buf = self.cs.mem.read_physical_mem(rsdp_pa, acpi_tables.ACPI_RSDP_EXT_SIZE)
-            rsdp = acpi_tables.RSDP()
-            rsdp.parse(rsdp_buf)
-        return rsdp

-
-    #
-    # Check RSDP in Extended BIOS Data Area
-    #
-    def _find_RSDP_in_EBDA(self) -> Tuple[Optional[acpi_tables.RSDP], Optional[int]]:
-        rsdp_pa = None
-        rsdp = None
-        logger().log_hal('[acpi] searching RSDP in EBDA...')
-        ebda_ptr_addr = 0x40E
-        ebda_addr = struct.unpack('<H', self.cs.mem.read_physical_mem(ebda_ptr_addr, 2))[0] << 4
-        if ebda_addr > 0x400 and ebda_addr < 0xA0000:
-            membuf = self.cs.mem.read_physical_mem(ebda_addr, 0xA0000 - ebda_addr)
-            pos = bytestostring(membuf).find(ACPI_RSDP_SIG)
-            if -1 != pos:
-                rsdp_pa = ebda_addr + pos
-                rsdp = self.read_RSDP(rsdp_pa)
-                if rsdp.is_RSDP_valid():
-                    logger().log_hal(f'[acpi] found RSDP in EBDA at: 0x{rsdp_pa:016X}')
-                else:
-                    rsdp_pa = None
-        return rsdp, rsdp_pa
-
-    #
-    # Search RSDP in legacy BIOS E/F segments (0xE0000 - 0xFFFFF)
-    #
-    def _find_RSDP_in_legacy_BIOS_segments(self) -> Tuple[Optional[acpi_tables.RSDP], Optional[int]]:
-        rsdp_pa = None
-        rsdp = None
-        membuf = self.cs.mem.read_physical_mem(0xE0000, 0x20000)
-        membuf = bytestostring(membuf)
-        pos = bytestostring(membuf).find(ACPI_RSDP_SIG)
-        if -1 != pos:
-            rsdp_pa = 0xE0000 + pos
-            rsdp = self.read_RSDP(rsdp_pa)
-            if rsdp.is_RSDP_valid():
-                logger().log_hal(f'[acpi] Found RSDP in BIOS E/F segments: 0x{rsdp_pa:016X}')
-            else:
-                rsdp_pa = None
-        return rsdp, rsdp_pa
-
-    #
-    # Search for RSDP in the EFI memory (EFI Configuration Table)
-    #
-    def _find_RSDP_in_EFI_config_table(self) -> Tuple[Optional[acpi_tables.RSDP], Optional[int]]:
-        rsdp_pa = None
-        rsdp = None
-        logger().log_hal('[acpi] Searching RSDP pointers in EFI Configuration Table...')
-        (isFound, _, ect, _) = self.uefi.find_EFI_Configuration_Table()
-        if isFound and (ect is not None):
-            if RSDP_GUID_ACPI2_0 in ect.VendorTables:
-                rsdp_pa = ect.VendorTables[RSDP_GUID_ACPI2_0]
-                logger().log_hal(f'[acpi] ACPI 2.0+ RSDP {{{RSDP_GUID_ACPI2_0}}} in EFI Config Table: 0x{rsdp_pa:016X}')
-            elif RSDP_GUID_ACPI1_0 in ect.VendorTables:
-                rsdp_pa = ect.VendorTables[RSDP_GUID_ACPI1_0]
-                logger().log_hal('[acpi] ACPI 1.0 RSDP {{{RSDP_GUID_ACPI1_0}}} in EFI Config Table: 0x{rsdp_pa:016X}')
-
-        if rsdp_pa:
-            rsdp = self.read_RSDP(rsdp_pa)
-            if rsdp.is_RSDP_valid():
-                logger().log_hal(f'[acpi] Found RSDP in EFI Config Table: 0x{rsdp_pa:016X}')
-            else:
-                rsdp_pa = None
-        return rsdp, rsdp_pa
-
-    #
-    # Search for RSDP in all EFI memory
-    #
-    def _find_RSDP_in_EFI(self) -> Tuple[Optional[acpi_tables.RSDP], Optional[int]]:
-        rsdp_pa = None
-        rsdp = None
-        logger().log_hal("[acpi] Searching all EFI memory for RSDP (this may take a minute).")
-        CHUNK_SZ = 1024 * 1024  # 1MB
-        (smram_base, _, _) = self.cs.cpu.get_SMRAM()
-        pa = smram_base - CHUNK_SZ
-        while pa > CHUNK_SZ:
-            membuf = self.cs.mem.read_physical_mem(pa, CHUNK_SZ)
-            pos = bytestostring(membuf).find(ACPI_RSDP_SIG)
-            if -1 != pos:
-                rsdp_pa = pa + pos
-                logger().log_hal(f"[acpi] Found '{ACPI_RSDP_SIG}' signature at 0x{rsdp_pa:16X}. Checking if valid RSDP.")
-                rsdp = self.read_RSDP(rsdp_pa)
-                if rsdp.is_RSDP_valid():
-                    logger().log_hal(f'[acpi] Found RSDP in EFI memory: 0x{rsdp_pa:016X}')
-                    break
-            pa -= CHUNK_SZ
-        return rsdp, rsdp_pa
-
-    #
-    # Searches for Root System Description Pointer (RSDP) in various locations for legacy/EFI systems
-    #
-
[docs]    def find_RSDP(self) -> Tuple[Optional[int], Optional[acpi_tables.RSDP]]:
-        rsdp, rsdp_pa = self._find_RSDP_in_EBDA()
-
-        if rsdp_pa is None:
-            rsdp, rsdp_pa = self._find_RSDP_in_legacy_BIOS_segments()
-
-        if rsdp_pa is None:
-            rsdp, rsdp_pa = self._find_RSDP_in_EFI_config_table()
-
-        if rsdp_pa is None:
-            rsdp, rsdp_pa = self._find_RSDP_in_EFI()
-
-        if rsdp is not None:
-            logger().log_hal(str(rsdp))
-
-        return (rsdp_pa, rsdp)

-
-    RsdtXsdt = Union[acpi_tables.RSDT, acpi_tables.XSDT]
-    #
-    # Retrieves System Description Table (RSDT or XSDT) either from RSDP or using OS API
-    #
-
[docs]    def get_SDT(self, search_rsdp: bool = True) -> Tuple[bool, Optional[int], Optional[RsdtXsdt], Optional[ACPI_TABLE_HEADER]]:
-        is_xsdt = False
-        sdt_pa = None
-        sdt_header = None
-        sdt_buf = b''
-        if search_rsdp:
-            (_, rsdp) = self.find_RSDP()
-            if rsdp is not None:
-                if 0x0 == rsdp.Revision:
-                    sdt_pa = rsdp.RsdtAddress
-                    is_xsdt = False
-                elif 0x2 == rsdp.Revision:
-                    sdt_pa = rsdp.XsdtAddress
-                    is_xsdt = True
-                else:
-                    return (False, None, None, None)
-                found_str = 'XSDT' if is_xsdt else 'RSDT'
-                logger().log_hal(f'[acpi] Found {found_str} at PA: 0x{sdt_pa:016X}')
-                sdt_header_buf = self.cs.mem.read_physical_mem(sdt_pa, ACPI_TABLE_HEADER_SIZE)
-                sdt_header = self._parse_table_header(sdt_header_buf)
-                sdt_buf = self.cs.mem.read_physical_mem(sdt_pa, sdt_header.Length)
-        else:
-            sdt_pa = None
-            if logger().HAL:
-                logger().log("[acpi] Reading RSDT/XSDT using OS API...")
-            (sdt_buf, is_xsdt) = self.cs.helper.get_ACPI_SDT()
-            sdt_header = self._parse_table_header(sdt_buf[:ACPI_TABLE_HEADER_SIZE])
-
-        sdt_contents = sdt_buf[ACPI_TABLE_HEADER_SIZE:]
-        sdt = ACPI_TABLES[ACPI_TABLE_SIG_XSDT if is_xsdt else ACPI_TABLE_SIG_RSDT]()
-        sdt.parse(sdt_contents)
-        return (is_xsdt, sdt_pa, sdt, sdt_header)

-
-    #
-    # Populates a list of ACPI tables available on the system
-    #
-
[docs]    def get_ACPI_table_list(self) -> Dict[str, List[int]]:
-        try:
-            # 1. Try to extract ACPI table(s) from physical memory
-            #    read_physical_mem can be implemented using both
-            #    CHIPSEC kernel module and OS native API
-            logger().log_hal("[acpi] Trying to enumerate ACPI tables from physical memory...")
-            # find RSDT/XSDT table
-            (is_xsdt, sdt_pa, sdt, sdt_header) = self.get_SDT()
-
-            # cache RSDT/XSDT in the list of ACPI tables
-            if (sdt_pa is not None) and (sdt_header is not None):
-                self.tableList[bytestostring(sdt_header.Signature)].append(sdt_pa)
-            if sdt is not None:
-                self.get_table_list_from_SDT(sdt, is_xsdt)
-            self.get_DSDT_from_FADT()
-        except UnimplementedAPIError:
-            # 2. If didn't work, try using get_ACPI_table if a helper implemented
-            #    reading ACPI tables via native API which some OS may provide
-            logger().log_hal("[acpi] Trying to enumerate ACPI tables using get_ACPI_table...")
-            for t in ACPI_TABLES.keys():
-                table = self.cs.helper.get_ACPI_table(t)
-                if table:
-                    self.tableList[t].append(0)
-
-        return self.tableList

-
-    #
-    # Gets table list from entries in RSDT/XSDT
-    #
-
[docs]    def get_table_list_from_SDT(self, sdt: RsdtXsdt, is_xsdt: bool) -> None:
-        logger().log_hal(f'[acpi] Getting table list from entries in {"XSDT" if is_xsdt else "RSDT"}')
-        for a in sdt.Entries:
-            _sig = self.cs.mem.read_physical_mem(a, ACPI_TABLE_SIG_SIZE)
-            _sig = bytestostring(_sig)
-            if _sig not in ACPI_TABLES.keys():
-                if logger().HAL:
-                    logger().log_warning(f'Unknown ACPI table signature: {_sig}')
-            self.tableList[_sig].append(a)

-
-    #
-    # Gets DSDT from FADT
-    #
-
[docs]    def get_DSDT_from_FADT(self) -> None:
-        logger().log_hal('[acpi] Getting DSDT from FADT')
-
-        if ACPI_TABLE_SIG_FACP in self.tableList:
-            (_, parsed_fadt_content, _, _) = self.get_parse_ACPI_table('FACP')[0]
-        else:
-            if logger().HAL:
-                found_table = 'XSDT' if ACPI_TABLE_SIG_XSDT in self.tableList else 'RSDT'
-                logger().log_warning(f'Cannot find FADT in {found_table}')
-            return
-
-        dsdt_address_to_use = parsed_fadt_content.get_DSDT_address_to_use()
-
-        if dsdt_address_to_use is None:
-            dsdt_address = parsed_fadt_content.dsdt
-            x_dsdt_address = parsed_fadt_content.x_dsdt
-            if logger().HAL:
-                logger().log_error('Unable to determine the correct DSDT address')
-            if logger().HAL:
-                logger().log_error(f'  DSDT   address = 0x{dsdt_address:08X}')
-            if logger().HAL:
-                address_str = f'{x_dsdt_address:16X}' if x_dsdt_address is not None else 'Not found'
-                logger().log_error(f'  X_DSDT address = 0x{address_str}')
-            return
-
-        self.tableList[ACPI_TABLE_SIG_DSDT].append(dsdt_address_to_use)

-
-    #
-    # Checks is ACPI table with <name> is available on the system
-    #
-
[docs]    def is_ACPI_table_present(self, name: str) -> bool:
-        return (name in self.tableList)

-
-    #
-    # Prints a list of ACPI tables available on the system
-    #
-
[docs]    def print_ACPI_table_list(self) -> None:
-        if len(self.tableList) == 0:
-            logger().log_error("Couldn't get a list of ACPI tables")
-        else:
-            logger().log_hal('[acpi] Found the following ACPI tables:')
-            for tableName in sorted(self.tableList.keys()):
-                table_values_str = ', '.join([f'0x{addr:016X}' for addr in self.tableList[tableName]])
-                logger().log(f' - {tableName}: {table_values_str}')

-
-    #
-    # Retrieves contents of ACPI table from memory or from file
-    #
-
[docs]    def get_parse_ACPI_table(self, name: str, isfile: bool = False) -> List['ParseTable']:
-        acpi_tables = self.get_ACPI_table(name, isfile)
-        return [self._parse_table(name, table_header_blob, table_blob) for (table_header_blob, table_blob) in acpi_tables if table_header_blob is not None]

-
-
[docs]    def get_ACPI_table(self, name: str, isfile: bool = False) -> List[Tuple[bytes, bytes]]:
-        acpi_tables_data: List[bytes] = []
-        if isfile:
-            acpi_tables_data.append(read_file(name))
-        else:
-            try:
-                # 1. Try to extract ACPI table(s) from physical memory
-                #    read_physical_mem can be implemented using both
-                #    CHIPSEC kernel module and OS native API
-                logger().log_hal('[acpi] trying to extract ACPI table from physical memory...')
-                for table_address in self.tableList[name]:
-                    t_size = self.cs.mem.read_physical_mem_dword(table_address + 4)
-                    t_data = self.cs.mem.read_physical_mem(table_address, t_size)
-                    acpi_tables_data.append(t_data)
-            except UnimplementedAPIError:
-                # 2. If didn't work, try using get_ACPI_table if a helper implemented
-                #    reading ACPI tables via native API which some OS may provide
-                logger().log_hal("[acpi] trying to extract ACPI table using get_ACPI_table...")
-                t_data = self.cs.helper.get_ACPI_table(name)
-                acpi_tables_data.append(t_data)
-
-        acpi_tables = []
-        for data in acpi_tables_data:
-            acpi_tables.append((data[: ACPI_TABLE_HEADER_SIZE], data[ACPI_TABLE_HEADER_SIZE:]))
-
-        return acpi_tables

-
-    #
-    # Dumps contents of ACPI table
-    #
-
[docs]    def dump_ACPI_table(self, name: str, isfile: bool = False) -> None:
-        acpi_tables = self.get_parse_ACPI_table(name, isfile)
-        for acpi_table in acpi_tables:
-            (table_header, table, table_header_blob, table_blob) = acpi_table
-            logger().log("==================================================================")
-            logger().log(f'ACPI Table: {name}')
-            logger().log("==================================================================")
-            # print table header
-            logger().log(str(table_header))
-            print_buffer_bytes(table_header_blob)
-            # print table contents
-            logger().log('')
-            logger().log(str(table))
-            print_buffer_bytes(table_blob)
-            logger().log('')

-
-    # --------------------------------------------------------------------
-    # Internal ACPI table parsing functions
-    # --------------------------------------------------------------------
-
-    ParseTable = Tuple[ACPI_TABLE_HEADER, Optional[ACPI_TABLE], bytes, bytes]
-
-    def _parse_table(self, name: str, table_header_blob: bytes, table_blob: bytes) -> ParseTable:
-        table_header = self._parse_table_header(table_header_blob)
-        table = self._parse_table_contents(name, table_blob, table_header_blob)
-        return (table_header, table, table_header_blob, table_blob)
-
-    def _parse_table_header(self, header: bytes) -> ACPI_TABLE_HEADER:
-        acpi_table_hdr = ACPI_TABLE_HEADER(*struct.unpack_from(ACPI_TABLE_HEADER_FORMAT, header))
-        logger().log_hal(str(acpi_table_hdr))
-        return acpi_table_hdr
-
-    def _parse_table_contents(self, signature: str, contents: bytes, header: bytes) -> Optional[ACPI_TABLE]:
-        table = None
-        if ACPI_TABLES.__contains__(signature):
-            logger().log_hal(f'{signature}')
-            if 'BERT' in signature:
-                BootRegionLen = struct.unpack('<L', contents[0:4])[0]
-                BootRegionAddr = struct.unpack('<Q', contents[4:12])[0]
-                bootRegion = self.cs.mem.read_physical_mem(BootRegionAddr, BootRegionLen)
-                table = (ACPI_TABLES[signature])(bootRegion)
-            elif 'NFIT' in signature:
-                table = (ACPI_TABLES[signature])(header)
-            else:
-                table = (ACPI_TABLES[signature])()
-            table.parse(contents)
-        return table

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/acpi_tables.html b/_modules/chipsec/hal/acpi_tables.html deleted file mode 100644 index df59e6a3..00000000 --- a/_modules/chipsec/hal/acpi_tables.html +++ /dev/null @@ -1,2445 +0,0 @@ - - - - - - - - chipsec.hal.acpi_tables — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.acpi_tables

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-# Authors:
-#  Sarah Van Sickle, INTEL DCG RED team
-#
-
-
-"""
-HAL component decoding various ACPI tables
-"""
-
-__version__ = '0.1'
-
-import struct
-from collections import namedtuple
-from uuid import UUID
-from typing import List, Optional, Tuple
-from chipsec.logger import logger, dump_buffer_bytes
-from chipsec.hal.uefi_common import EFI_GUID_FMT, EFI_GUID_STR
-
-
-
[docs]class ACPI_TABLE:
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        return

-
-    def __str__(self) -> str:
-        return """------------------------------------------------------------------
-  Table Content
-------------------------------------------------------------------
-"""

-
-########################################################################################################
-#
-# RSDP
-#
-########################################################################################################
-
-
-# RSDP Format
-ACPI_RSDP_FORMAT = '<8sB6sBI'
-ACPI_RSDP_EXT_FORMAT = 'IQB3s'
-ACPI_RSDP_SIZE = struct.calcsize(ACPI_RSDP_FORMAT)
-ACPI_RSDP_EXT_SIZE = struct.calcsize(ACPI_RSDP_FORMAT + ACPI_RSDP_EXT_FORMAT)
-assert ACPI_RSDP_EXT_SIZE == 36
-
-
-
[docs]class RSDP(ACPI_TABLE):
-
[docs]    def parse(self, table_content: bytes) -> None:
-        if len(table_content) == ACPI_RSDP_SIZE:
-            (self.Signature, self.Checksum, self.OEMID,
-             self.Revision, self.RsdtAddress) = struct.unpack(ACPI_RSDP_FORMAT, table_content)
-        else:
-            (self.Signature, self.Checksum, self.OEMID,
-             self.Revision, self.RsdtAddress, self.Length,
-             self.XsdtAddress, self.ExtChecksum, self.Reserved) = struct.unpack(ACPI_RSDP_FORMAT + ACPI_RSDP_EXT_FORMAT, table_content)

-
-    def __str__(self) -> str:
-        default = ("==================================================================\n"
-                   "  Root System Description Pointer (RSDP)\n"
-                   "==================================================================\n"
-                   f"  Signature        : {self.Signature}\n"
-                   f"  Checksum         : 0x{self.Checksum:02X}\n"
-                   f"  OEM ID           : {self.OEMID}\n"
-                   f"  Revision         : 0x{self.Revision:02X}\n"
-                   f"  RSDT Address     : 0x{self.RsdtAddress:08X}\n")
-        if hasattr(self, "Length"):
-            default += (f"  Length           : 0x{self.Length:08X}\n"
-                        f"  XSDT Address     : 0x{self.XsdtAddress:016X}\n"
-                        f"  Extended Checksum: 0x{self.ExtChecksum:02X}\n"
-                        f"  Reserved         : {self.Reserved.hex()}\n"
-                        )
-        return default
-
-    # some sanity checking on RSDP
-
[docs]    def is_RSDP_valid(self) -> bool:
-        return 0 != self.Checksum and (0x0 == self.Revision or 0x2 == self.Revision)

-
-
-########################################################################################################
-#
-# DMAR Table
-#
-########################################################################################################
-
-
-ACPI_TABLE_FORMAT_DMAR = '=BB10s'
-ACPI_TABLE_SIZE_DMAR = struct.calcsize(ACPI_TABLE_FORMAT_DMAR)
-
-
-
[docs]class DMAR (ACPI_TABLE):
-    def __init__(self):
-        self.dmar_structures = []
-        self.DMAR_TABLE_FORMAT = {
-            'DeviceScope_FORMAT': '=BBBBBB',
-            'DRHD_FORMAT': '=HHBBHQ',
-            'RMRR_FORMAT': '=HHHHQQ',
-            'ATSR_FORMAT': '=HHBBH',
-            'RHSA_FORMAT': '=HHIQI',
-            'ANDD_FORMAT': 'HH3sB',
-            'SATC_FORMAT': 'HHBBH',
-            'SIDP_FORMAT': 'HHHH'
-        }
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        off = ACPI_TABLE_SIZE_DMAR
-        struct_fmt = '=HH'
-        while off < len(table_content) - 1:
-            (_type, length) = struct.unpack(struct_fmt, table_content[off: off + struct.calcsize(struct_fmt)])
-            if 0 == length:
-                break
-            self.dmar_structures.append(self._get_structure_DMAR(_type, table_content[off: off + length]))
-            off += length
-        (self.HostAddrWidth, self.Flags, self.Reserved) = struct.unpack_from(ACPI_TABLE_FORMAT_DMAR, table_content)
-        return

-
-    def __str__(self) -> str:
-        _str = f"""------------------------------------------------------------------
-  DMAR Table Contents
-------------------------------------------------------------------
-  Host Address Width  : {self.HostAddrWidth:d}
-  Flags               : 0x{self.Flags:02X}
-  Reserved            : {self.Reserved.hex()}
-"""
-        _str += "\n  Remapping Structures:\n"
-        for st in self.dmar_structures:
-            _str += str(st)
-        return _str
-
-    def _get_structure_DMAR(self, _type: int, DataStructure: bytes) -> str:
-        if 0x00 == _type:
-            ret = self._get_DMAR_structure_DRHD(DataStructure)
-        elif 0x01 == _type:
-            ret = self._get_DMAR_structure_RMRR(DataStructure)
-        elif 0x02 == _type:
-            ret = self._get_DMAR_structure_ATSR(DataStructure)
-        elif 0x03 == _type:
-            ret = self._get_DMAR_structure_RHSA(DataStructure)
-        elif 0x04 == _type:
-            ret = self._get_DMAR_structure_ANDD(DataStructure)
-        elif 0x05 == _type:
-            return self._get_DMAR_structure_SATC(DataStructure)
-        elif 0x06 == _type:
-            return self._get_DMAR_structure_SIDP(DataStructure)
-        else:
-            ret = (f"\n  Unknown DMAR structure 0x{_type:02X}\n")
-        return str(ret)
-
-    def _get_DMAR_structure_DRHD(self, structure: bytes) -> 'ACPI_TABLE_DMAR_DRHD':
-        off = struct.calcsize(self.DMAR_TABLE_FORMAT["DRHD_FORMAT"])
-        device_scope = self._get_DMAR_Device_Scope_list(structure[off:])
-        return ACPI_TABLE_DMAR_DRHD(*struct.unpack_from(self.DMAR_TABLE_FORMAT["DRHD_FORMAT"], structure), DeviceScope=device_scope)
-
-    def _get_DMAR_structure_RMRR(self, structure: bytes) -> 'ACPI_TABLE_DMAR_RMRR':
-        off = struct.calcsize(self.DMAR_TABLE_FORMAT["RMRR_FORMAT"])
-        device_scope = self._get_DMAR_Device_Scope_list(structure[off:])
-        return ACPI_TABLE_DMAR_RMRR(*struct.unpack_from(self.DMAR_TABLE_FORMAT["RMRR_FORMAT"], structure), DeviceScope=device_scope)
-
-    def _get_DMAR_structure_ATSR(self, structure: bytes) -> 'ACPI_TABLE_DMAR_ATSR':
-        off = struct.calcsize(self.DMAR_TABLE_FORMAT["ATSR_FORMAT"])
-        device_scope = self._get_DMAR_Device_Scope_list(structure[off:])
-        return ACPI_TABLE_DMAR_ATSR(*struct.unpack_from(self.DMAR_TABLE_FORMAT["ATSR_FORMAT"], structure), DeviceScope=device_scope)
-
-    def _get_DMAR_structure_RHSA(self, structure: bytes) -> 'ACPI_TABLE_DMAR_RHSA':
-        return ACPI_TABLE_DMAR_RHSA(*struct.unpack_from(self.DMAR_TABLE_FORMAT["RHSA_FORMAT"], structure))
-
-    def _get_DMAR_structure_ANDD(self, structure: bytes) -> 'ACPI_TABLE_DMAR_ANDD':
-        sz = struct.calcsize('=H')
-        length = struct.unpack('=H', structure[sz:sz + sz])[0]
-        dmr_len = length - struct.calcsize(self.DMAR_TABLE_FORMAT["ANDD_FORMAT"])
-        f = self.DMAR_TABLE_FORMAT["ANDD_FORMAT"] + (f'{dmr_len:d}s')
-        return ACPI_TABLE_DMAR_ANDD(*struct.unpack_from(f, structure))
-
-    def _get_DMAR_structure_SATC(self, structure: bytes) -> 'ACPI_TABLE_DMAR_SATC':
-        off = struct.calcsize(self.DMAR_TABLE_FORMAT["SATC_FORMAT"])
-        device_scope = self._get_DMAR_Device_Scope_list(structure[off:])
-        return ACPI_TABLE_DMAR_SATC(*struct.unpack_from(self.DMAR_TABLE_FORMAT["SATC_FORMAT"], structure), DeviceScope=device_scope)
-
-    def _get_DMAR_structure_SIDP(self, structure: bytes) -> 'ACPI_TABLE_DMAR_SIDP':
-        off = struct.calcsize(self.DMAR_TABLE_FORMAT["SIDP_FORMAT"])
-        device_scope = self._get_DMAR_Device_Scope_list(structure[off:])
-        return ACPI_TABLE_DMAR_SIDP(*struct.unpack_from(self.DMAR_TABLE_FORMAT["SIDP_FORMAT"], structure), DeviceScope=device_scope)
-
-    def _get_DMAR_Device_Scope_list(self, structure: bytes) -> List['ACPI_TABLE_DMAR_DeviceScope']:
-        device_scope = []
-        fmt = '=BB'
-        step = struct.calcsize(fmt)
-        off = 0
-        while off < len(structure) - 1:
-            (_type, length) = struct.unpack(fmt, structure[off:off + step])
-            if 0 == length:
-                break
-            path_sz = length - struct.calcsize(self.DMAR_TABLE_FORMAT["DeviceScope_FORMAT"])
-            f = self.DMAR_TABLE_FORMAT["DeviceScope_FORMAT"] + ('{:d}s'.format(path_sz))
-            device_scope.append(ACPI_TABLE_DMAR_DeviceScope(*struct.unpack_from(f, structure[off:off + length])))
-            off += length
-        return device_scope

-
-#
-# DMAR Device Scope
-#
-
-
-DMAR_DS_TYPE_PCI_ENDPOINT = 0x1
-DMAR_DS_TYPE_PCIPCI_BRIDGE = 0x2
-DMAR_DS_TYPE_IOAPIC = 0x3
-DMAR_DS_TYPE_MSI_CAPABLE_HPET = 0x4
-DMAR_DS_TYPE_ACPI_NAMESPACE = 0x5
-DMAR_DS_TYPE = {
-    DMAR_DS_TYPE_PCI_ENDPOINT: 'PCI Endpoint Device',
-    DMAR_DS_TYPE_PCIPCI_BRIDGE: 'PCI-PCI Bridge',
-    DMAR_DS_TYPE_IOAPIC: 'I/O APIC Device',
-    DMAR_DS_TYPE_MSI_CAPABLE_HPET: 'MSI Capable HPET',
-    DMAR_DS_TYPE_ACPI_NAMESPACE: 'ACPI Namespace Device'
-}
-
-
-
[docs]class ACPI_TABLE_DMAR_DeviceScope(namedtuple('ACPI_TABLE_DMAR_DeviceScope', 'Type Length Flags Reserved EnumerationID StartBusNum Path')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""      {DMAR_DS_TYPE[self.Type]} ({self.Type:02X}): Len: 0x{self.Length:02X}, Flags: 0x{self.Flags:02X}, Rsvd: 0x{self.Reserved:02X}, Enum ID: 0x{self.EnumerationID:02X}, Start Bus#: 0x{self.StartBusNum:02X}, Path: {self.Path.hex()}\n"""

-
-#
-# DMAR DMA Remapping Hardware Unit Definition (DRHD) Structure
-#
-
-
-
[docs]class ACPI_TABLE_DMAR_DRHD(namedtuple('ACPI_TABLE_DMAR_DRHD', 'Type Length Flags Reserved SegmentNumber RegisterBaseAddr DeviceScope')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        _str = f"""
-  DMA Remapping Hardware Unit Definition (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Flags                 : 0x{self.Flags:02X}
-    Reserved              : 0x{self.Reserved:02X}
-    Segment Number        : 0x{self.SegmentNumber:04X}
-    Register Base Address : 0x{self.RegisterBaseAddr:016X}
-"""
-        _str += '    Device Scope          :\n'
-        for ds in self.DeviceScope:
-            _str += str(ds)
-        return _str

-
-#
-# DMAR Reserved Memory Range Reporting (RMRR) Structure
-#
-
-
-
[docs]class ACPI_TABLE_DMAR_RMRR(namedtuple('ACPI_TABLE_DMAR_RMRR', 'Type Length Reserved SegmentNumber RMRBaseAddr RMRLimitAddr DeviceScope')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        _str = f"""
-  Reserved Memory Range (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Reserved              : 0x{self.Reserved:04X}
-    Segment Number        : 0x{self.SegmentNumber:04X}
-    Reserved Memory Base  : 0x{self.RMRBaseAddr:016X}
-    Reserved Memory Limit : 0x{self.RMRLimitAddr:016X}
-"""
-        _str += '    Device Scope          :\n'
-        for ds in self.DeviceScope:
-            _str += str(ds)
-        return _str

-#
-# DMAR Root Port ATS Capability Reporting (ATSR) Structure
-#
-
-
-
[docs]class ACPI_TABLE_DMAR_ATSR(namedtuple('ACPI_TABLE_DMAR_ATSR', 'Type Length Flags Reserved SegmentNumber DeviceScope')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        _str = f"""
-  Root Port ATS Capability (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Flags                 : 0x{self.Flags:02X}
-    Reserved (0)          : 0x{self.Reserved:02X}
-    Segment Number        : 0x{self.SegmentNumber:04X}
-"""
-        _str += '    Device Scope          :\n'
-        for ds in self.DeviceScope:
-            _str += str(ds)
-        return _str

-
-#
-# DMAR Remapping Hardware Status Affinity (RHSA) Structure
-#
-
-
-
[docs]class ACPI_TABLE_DMAR_RHSA(namedtuple('ACPI_TABLE_DMAR_RHSA', 'Type Length Reserved RegisterBaseAddr ProximityDomain')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Remapping Hardware Status Affinity (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Reserved (0)          : 0x{self.Reserved:08X}
-    Register Base Address : 0x{self.RegisterBaseAddr:016X}
-    Proximity Domain      : 0x{self.ProximityDomain:08X}
-"""

-
-
-#
-# DMAR ACPI Name-space Device Declaration (ANDD) Structure
-#
-ACPI_TABLE_DMAR_ANDD_FORMAT = '=HH3sB'
-ACPI_TABLE_DMAR_ANDD_SIZE = struct.calcsize(ACPI_TABLE_DMAR_ANDD_FORMAT)
-assert 8 == ACPI_TABLE_DMAR_ANDD_SIZE
-
-
-
[docs]class ACPI_TABLE_DMAR_ANDD(namedtuple('ACPI_TABLE_DMAR_ANDD', 'Type Length Reserved ACPIDevNum ACPIObjectName')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Remapping Hardware Status Affinity (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Reserved (0)          : {self.Reserved.hex()}
-    ACPI Device Number    : 0x{self.ACPIDevNum:02X}
-    ACPI Object Name      : {self.ACPIObjectName}
-"""

-
-
-#
-# DMAR SoC Integrated Address Translation Cache Reporting (SATC) Structure
-#
-
[docs]class ACPI_TABLE_DMAR_SATC(namedtuple('ACPI_TABLE_DMAR_SATC', 'Type Length Flags Reserved SegmentNumber DeviceScope')):
-    __slots__ = ()
-
-    def __str__(self):
-        _str = f"""
-  SoC Integrated Address Translation Cache (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Flags                 : 0x{self.Flags:02X}
-    Reserved (0)          : 0x{self.Reserved:02X}
-    Segment Number        : 0x{self.SegmentNumber:016X}
-"""
-        _str += '    Device Scope          :\n'
-        for ds in self.DeviceScope:
-            _str += str(ds)
-        return _str

-
-
-#
-# DMAR SoC Integrated Address Translation Cache Reporting (SIDP) Structure
-#
-
[docs]class ACPI_TABLE_DMAR_SIDP(namedtuple('ACPI_TABLE_DMAR_SIDP', 'Type Length Reserved SegmentNumber DeviceScope')):
-    __slots__ = ()
-
-    def __str__(self):
-        _str = f"""
-  SoC Integrated Address Translation Cache Reporting Structure (0x{self.Type:04X}):
-    Length                : 0x{self.Length:04X}
-    Reserved (0)          : 0x{self.Reserved:02X}
-    Segment Number        : 0x{self.SegmentNumber:016X}
-"""
-        _str += '    Device Scope          :\n'
-        for ds in self.DeviceScope:
-            _str += str(ds)
-        return _str

-
-########################################################################################################
-#
-# APIC Table
-#
-########################################################################################################
-
-
-ACPI_TABLE_FORMAT_APIC = '=II'
-ACPI_TABLE_SIZE_APIC = struct.calcsize(ACPI_TABLE_FORMAT_APIC)
-
-
-
[docs]class APIC (ACPI_TABLE):
-    def __init__(self):
-        self.apic_structs = []
-        self.ACPI_TABLE_FORMAT = {}
-
-        # APIC Table Structures
-        self.APIC_TABLE_FORMAT = {
-            "PROCESSOR_LAPIC": '<BBBBI',
-            "IOAPIC": '<BBBBII',
-            "INTERRUPT_SOURSE_OVERRIDE": '<BBBBIH',
-            "NMI_SOURCE": '<BBHI',
-            "LAPIC_NMI": '<BBBHB',
-            "LAPIC_ADDRESS_OVERRIDE": '<BBHQ',
-            "IOSAPIC": '<BBBBIQ',
-            "PROCESSOR_LSAPIC": '<BBBBBHII',
-            "PLATFORM_INTERRUPT_SOURCES": '<BBHBBBII',
-            "PROCESSOR_Lx2APIC": '<BBHIII',
-            "Lx2APIC_NMI": '<BBHIB3s',
-            "GICC_CPU": '<BBHIIIIIQQQQIQQ',
-            "GIC_DISTRIBUTOR": '<BBHIQII',
-            "GIC_MSI": '<BBHIQIHH',
-            "GIC_REDISTRIBUTOR": '<BBHQI'
-        }
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        (self.LAPICBase, self.Flags) = struct.unpack('=II', table_content[0: 8])
-        cont = 8
-        while cont < len(table_content) - 1:
-            (value, length) = struct.unpack('=BB', table_content[cont: cont + 2])
-            if 0 == length:
-                break
-            self.apic_structs.append(self.get_structure_APIC(value, table_content[cont: cont + length]))
-            cont += length
-        return

-
-    def __str__(self) -> str:
-        apic_str = f"""------------------------------------------------------------------
-  APIC Table Contents
-------------------------------------------------------------------
-  Local APIC Base  : 0x{self.LAPICBase:016X}
-  Flags            : 0x{self.Flags:08X}
-"""
-        apic_str += "\n  Interrupt Controller Structures:\n"
-        for st in self.apic_structs:
-            apic_str += str(st)
-        return apic_str
-
-
[docs]    def get_structure_APIC(self, value: int, DataStructure: bytes) -> str:
-        if 0x00 == value:
-            ret = ACPI_TABLE_APIC_PROCESSOR_LAPIC(*struct.unpack_from(self.APIC_TABLE_FORMAT["PROCESSOR_LAPIC"], DataStructure))
-        elif 0x01 == value:
-            ret = ACPI_TABLE_APIC_IOAPIC(*struct.unpack_from(self.APIC_TABLE_FORMAT["IOAPIC"], DataStructure))
-        elif 0x02 == value:
-            ret = ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE(*struct.unpack_from(self.APIC_TABLE_FORMAT["INTERRUPT_SOURSE_OVERRIDE"], DataStructure))
-        elif 0x03 == value:
-            ret = ACPI_TABLE_APIC_NMI_SOURCE(*struct.unpack_from(self.APIC_TABLE_FORMAT["NMI_SOURCE"], DataStructure))
-        elif 0x04 == value:
-            ret = ACPI_TABLE_APIC_LAPIC_NMI(*struct.unpack_from(self.APIC_TABLE_FORMAT["LAPIC_NMI"], DataStructure))
-        elif 0x05 == value:
-            ret = ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE(*struct.unpack_from(self.APIC_TABLE_FORMAT["LAPIC_ADDRESS_OVERRIDE"], DataStructure))
-        elif 0x06 == value:
-            ret = ACPI_TABLE_APIC_IOSAPIC(*struct.unpack_from(self.APIC_TABLE_FORMAT["IOSAPIC"], DataStructure))
-        elif 0x07 == value:
-            ret = ACPI_TABLE_APIC_PROCESSOR_LSAPIC(*struct.unpack_from(f'{self.APIC_TABLE_FORMAT["PROCESSOR_LSAPIC"]}{str(len(DataStructure) - 16)}s', DataStructure))
-        elif 0x08 == value:
-            ret = ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES(*struct.unpack_from(self.APIC_TABLE_FORMAT["PLATFORM_INTERRUPT_SOURCES"], DataStructure))
-        elif 0x09 == value:
-            ret = ACPI_TABLE_APIC_PROCESSOR_Lx2APIC(*struct.unpack_from(self.APIC_TABLE_FORMAT["PROCESSOR_Lx2APIC"], DataStructure))
-        elif 0x0A == value:
-            ret = ACPI_TABLE_APIC_Lx2APIC_NMI(*struct.unpack_from(self.APIC_TABLE_FORMAT["Lx2APIC_NMI"], DataStructure))
-        elif 0x0B == value:
-            ret = ACPI_TABLE_APIC_GICC_CPU(*struct.unpack_from(self.APIC_TABLE_FORMAT["GICC_CPU"], DataStructure))
-        elif 0x0C == value:
-            ret = ACPI_TABLE_APIC_GIC_DISTRIBUTOR(*struct.unpack_from(self.APIC_TABLE_FORMAT["GIC_DISTRIBUTOR"], DataStructure))
-        elif 0x0D == value:
-            ret = ACPI_TABLE_APIC_GIC_MSI(*struct.unpack_from(self.APIC_TABLE_FORMAT["GIC_MSI"], DataStructure))
-        elif 0x0E == value:
-            ret = ACPI_TABLE_APIC_GIC_REDISTRIBUTOR(*struct.unpack_from(self.APIC_TABLE_FORMAT["GIC_REDISTRIBUTOR"], DataStructure))
-        else:
-            DataStructure_str = dump_buffer_bytes(DataStructure, length=16)
-            ret = f"""
-Reserved ....................................{value}"
-{DataStructure_str}"
-"""
-        return str(ret)

-
-
-
[docs]class ACPI_TABLE_APIC_PROCESSOR_LAPIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_LAPIC', 'Type Length ACPIProcID APICID Flags')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Processor Local APIC (0x00)
-    Type         : 0x{self.Type:02X}
-    Length       : 0x{self.Length:02X}
-    ACPI Proc ID : 0x{self.ACPIProcID:02X}
-    APIC ID      : 0x{self.APICID:02X}
-    Flags        : 0x{self.Flags:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_IOAPIC(namedtuple('ACPI_TABLE_APIC_IOAPIC', 'Type Length IOAPICID Reserved IOAPICAddr GlobalSysIntBase')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  I/O APIC (0x01)
-    Type                : 0x{self.Type:02X}
-    Length              : 0x{self.Length:02X}
-    Reserved            : 0x{self.IOAPICID:02X}
-    I/O APIC ID         : 0x{self.Reserved:02X}
-    I/O APIC Base       : 0x{self.IOAPICAddr:02X}
-    Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE(namedtuple('ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE', 'Type Length Bus Source GlobalSysIntBase Flags')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Interrupt Source Override (0x02)
-    Type                : 0x{self.Type:02X}
-    Length              : 0x{self.Length:02X}
-    Bus                 : 0x{self.Bus:02X}
-    Source              : 0x{self.Source:02X}
-    Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
-    Flags               : 0x{self.Flags:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_NMI_SOURCE(namedtuple('ACPI_TABLE_APIC_NMI_SOURCE', 'Type Length Flags GlobalSysIntBase')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Non-maskable Interrupt (NMI) Source (0x03)
-    Type                : 0x{self.Type:02X}
-    Length              : 0x{self.Length:02X}
-    Flags               : 0x{self.Flags:02X}
-    Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_LAPIC_NMI(namedtuple('ACPI_TABLE_APIC_LAPIC_NMI', 'Type Length ACPIProcessorID Flags LocalAPICLINT')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Local APIC NMI (0x04)
-    Type              : 0x{self.Type:02X}
-    Length            : 0x{self.Length:02X}
-    ACPI Processor ID : 0x{self.ACPIProcessorID:02X}
-    Flags             : 0x{self.Flags:02X}
-    Local APIC LINT   : 0x{self.LocalAPICLINT:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE(namedtuple('ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE', 'Type Length Reserved LocalAPICAddress')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Local APIC Address Override (0x05)
-    Type               : 0x{self.Type:02X}
-    Length             : 0x{self.Length:02X}
-    Reserved           : 0x{self.Reserved:02X}
-    Local APIC Address : 0x{self.LocalAPICAddress:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_IOSAPIC(namedtuple('ACPI_TABLE_APIC_IOSAPIC', 'Type Length IOAPICID Reserved GlobalSysIntBase IOSAPICAddress')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  I/O SAPIC (0x06)
-    Type                : 0x{self.Type:02X}
-    Length              : 0x{self.Length:02X}
-    IO APIC ID          : 0x{self.IOAPICID:02X}
-    Reserved            : 0x{self.Reserved:02X}
-    Global Sys Int Base : 0x{self.GlobalSysIntBase:02X}
-    IO SAPIC Address    : 0x{self.IOSAPICAddress:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_PROCESSOR_LSAPIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_LSAPIC', 'Type Length ACPIProcID LocalSAPICID LocalSAPICEID Reserved Flags ACPIProcUIDValue ACPIProcUIDString'), ):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Local SAPIC (0x07)
-    Type                 : 0x{self.Type:02X}
-    Length               : 0x{self.Length:02X}
-    ACPI Proc ID         : 0x{self.ACPIProcID:02X}
-    Local SAPIC ID       : 0x{self.LocalSAPICID:02X}
-    Local SAPIC EID      : 0x{self.LocalSAPICEID:02X}
-    Reserved             : 0x{self.Reserved:02X}
-    Flags                : 0x{self.Flags:02X}
-    ACPI Proc UID Value  : 0x{self.ACPIProcUIDValue:02X}
-    ACPI Proc UID String : 0x{self.ACPIProcUIDString:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES(namedtuple('ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES', 'Type Length Flags InterruptType ProcID ProcEID IOSAPICVector GlobalSystemInterrupt PlatIntSourceFlags')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Platform Interrupt Sources (0x08)
-    Type                    : 0x{self.Type:02X}
-    Length                  : 0x{self.Length:02X}
-    Flags                   : 0x{self.Flags:02X}
-    Interrupt Type          : 0x{self.InterruptType:02X}
-    Proc ID                 : 0x{self.ProcID:02X}
-    Proc EID                : 0x{self.ProcEID:02X}
-    I/O SAPIC Vector        : 0x{self.IOSAPICVector:02X}
-    Global System Interrupt : 0x{self.GlobalSystemInterrupt:02X}
-    Plat Int Source Flags   : 0x{self.PlatIntSourceFlags:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_PROCESSOR_Lx2APIC(namedtuple('ACPI_TABLE_APIC_PROCESSOR_Lx2APIC', 'Type Length Reserved x2APICID Flags ACPIProcUID')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Processor Local x2APIC (0x09)
-    Type          : 0x{self.Type:02X}
-    Length        : 0x{self.Length:02X}
-    Reserved      : 0x{self.Reserved:02X}
-    x2APIC ID     : 0x{self.x2APICID:02X}
-    Flags         : 0x{self.Flags:02X}
-    ACPI Proc UID : 0x{self.ACPIProcUID:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_Lx2APIC_NMI(namedtuple('ACPI_TABLE_APIC_Lx2APIC_NMI', 'Type Length Flags ACPIProcUID Localx2APICLINT Reserved')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  Local x2APIC NMI (0x0A)
-    Type              : 0x{self.Type:02X}
-    Length            : 0x{self.Length:02X}
-    Flags             : 0x{self.Flags:02X}
-    ACPI Proc UID     : 0x{self.ACPIProcUID:02X}
-    Local x2APIC LINT : 0x{self.Localx2APICLINT:02X}
-    Reserved          : 0x{self.Reserved:}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_GICC_CPU(namedtuple('ACPI_TABLE_APIC_GICC_CPU', 'Type Length Reserved CPUIntNumber ACPIProcUID Flags ParkingProtocolVersion PerformanceInterruptGSIV ParkedAddress PhysicalAddress GICV GICH VGICMaintenanceINterrupt GICRBaseAddress MPIDR')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  GICC CPU Interface Structure (0x0B)
-    Type                       : 0x{self.Type:02X}
-    Length                     : 0x{self.Length:02X}
-    Reserved                   : 0x{self.Reserved:02X}
-    CPU Int Number             : 0x{self.CPUIntNumber:02X}
-    ACPI Proc UID              : 0x{self.ACPIProcUID:02X}
-    Flags                      : 0x{self.Flags:02X}
-    Parking Protocol Version   : 0x{self.ParkingProtocolVersion:02X}
-    Performance Interrupt GSIV : 0x{self.PerformanceInterruptGSIV:02X}
-    Parked Address             : 0x{self.ParkedAddress:02X}
-    Physical Address           : 0x{self.PhysicalAddress:02X}
-    GICV                       : 0x{self.GICV:02X}
-    GICH                       : 0x{self.GICH:02X}
-    VGIC Maintenance INterrupt : 0x{self.VGICMaintenanceINterrupt:02X}
-    GICR Base Address          : 0x{self.GICRBaseAddress:02X}
-    MPIDR                      : 0x{self.MPIDR:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_GIC_DISTRIBUTOR(namedtuple('ACPI_TABLE_APIC_GIC_DISTRIBUTOR', 'Type Length Reserved GICID PhysicalBaseAddress SystemVectorBase Reserved2 ')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  GICD GIC Distributor Structure (0x0C)
-    Type                  : 0x{self.Type:02X}
-    Length                : 0x{self.Length:02X}
-    Reserved              : 0x{self.Reserved:02X}
-    GICID                 : 0x{self.GICID:02X}
-    Physical Base Address : 0x{self.PhysicalBaseAddress:02X}
-    System Vector Base    : 0x{self.SystemVectorBase:02X}
-    Reserved              : 0x{self.Reserved2:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_GIC_MSI(namedtuple('ACPI_TABLE_APIC_GIC_MSI', 'Type Length Reserved GICMSIFrameID PhysicalBaseAddress Flags SPICount SPIBase')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  GICv2m MSI Frame (0x0D)
-    Type                  : 0x{self.Type:02X}
-    Length                : 0x{self.Length:02X}
-    Reserved              : 0x{self.Reserved:02X}
-    GIC MSI Frame ID      : 0x{self.GICMSIFrameID:02X}
-    Physical Base Address : 0x{self.PhysicalBaseAddress:02X}
-    Flags                 : 0x{self.Flags:02X}
-    SPI Count             : 0x{self.SPICount:02X}
-    SPI Base              : 0x{self.SPIBase:02X}
-"""

-
-
-
[docs]class ACPI_TABLE_APIC_GIC_REDISTRIBUTOR(namedtuple('ACPI_TABLE_APIC_GIC_REDISTRIBUTOR', 'Type Length Reserved DiscoverRangeBaseAdd DiscoverRangeLength')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-  GICR Redistributor Structure (0x0E)
-    Type                  : 0x{self.Type:02X}
-    Length                : 0x{self.Length:02X}
-    Reserved              : 0x{self.Reserved:02X}
-    Discover Range Base   : 0x{self.DiscoverRangeBaseAdd:02X}
-    Discover Range Length : 0x{self.DiscoverRangeLength:02X}
-"""

-
-########################################################################################################
-#
-# XSDT Table
-#
-########################################################################################################
-
-
-
[docs]class XSDT (ACPI_TABLE):
-    def __init__(self):
-        self.Entries = []
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        num_of_tables = len(table_content) // 8
-        self.Entries = struct.unpack(f'={num_of_tables:d}Q', table_content)
-        return

-
-    def __str__(self) -> str:
-        entries_str = ''.join([f'0x{addr:016X}\n' for addr in self.Entries])
-        return f"""==================================================================
-  Extended System Description Table (XSDT)
-==================================================================
-ACPI Table Entries:
-{entries_str}
-"""

-
-########################################################################################################
-#
-# RSDT Table
-#
-########################################################################################################
-
-
-
[docs]class RSDT (ACPI_TABLE):
-    def __init__(self):
-        self.Entries = []
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        num_of_tables = len(table_content) // 4
-        self.Entries = struct.unpack(f'={num_of_tables:d}I', table_content)
-        return

-
-    def __str__(self) -> str:
-        entries_str = ''.join([f'0x{addr:016X}\n' for addr in self.Entries])
-        return f"""==================================================================
-  Root System Description Table (RSDT)
-==================================================================
-ACPI Table Entries:
-{entries_str}
-"""

-
-########################################################################################################
-#
-# FADT Table
-#
-########################################################################################################
-
-
-
[docs]class FADT (ACPI_TABLE):
-    def __init__(self):
-        self.dsdt = None
-        self.x_dsdt = None
-        self.smi = None
-        self.acpi_enable = None
-        self.acpi_disable = None
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        self.dsdt = struct.unpack('<I', table_content[4:8])[0]
-        self.smi = struct.unpack('<I', table_content[12:16])[0]
-        self.acpi_enable = struct.unpack('B', table_content[16:17])[0]
-        self.acpi_disable = struct.unpack('B', table_content[17:18])[0]
-        if len(table_content) >= 112:
-            self.x_dsdt = struct.unpack('<Q', table_content[104:112])[0]
-        else:
-            if logger().HAL:
-                logger().log('[acpi] Cannot find X_DSDT entry in FADT.')

-
-
[docs]    def get_DSDT_address_to_use(self) -> Optional[int]:
-        dsdt_address_to_use = None
-        if self.x_dsdt is None:
-            if self.dsdt != 0:
-                dsdt_address_to_use = self.dsdt
-        else:
-            if self.x_dsdt != 0 and self.dsdt == 0:
-                dsdt_address_to_use = self.x_dsdt
-            elif self.x_dsdt == 0 and self.dsdt != 0:
-                dsdt_address_to_use = self.dsdt
-            elif self.x_dsdt != 0 and self.x_dsdt == self.dsdt:
-                dsdt_address_to_use = self.x_dsdt
-        return dsdt_address_to_use

-
-    def __str__(self) -> str:
-        dsdt_str = f'0x{self.x_dsdt:016X}' if self.x_dsdt is not None else 'Not found'
-        return f"""------------------------------------------------------------------
-  Fixed ACPI Description Table (FADT) Contents
-------------------------------------------------------------------
-  DSDT    : 0x{self.dsdt:08X}
-  X_DSDT  : {dsdt_str}
-  SMI_CMD : 0x{self.smi:04X}
-  ACPI_EN : 0x{self.acpi_enable:01X}
-  ACPI_DIS: 0x{self.acpi_disable:01X}
-"""

-
-########################################################################################################
-#
-# BGRT Table
-#
-########################################################################################################
-
-
-
[docs]class BGRT (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        self.Version = struct.unpack('<H', table_content[0:2])[0]
-        self.Status = struct.unpack('<b', table_content[2:3])[0]
-        self.ImageType = struct.unpack('<b', table_content[3:4])[0]
-        self.ImageAddress = struct.unpack('<Q', table_content[4:12])[0]
-        self.ImageOffsetX = struct.unpack('<I', table_content[12:16])[0]
-        self.ImageOffsetY = struct.unpack('<I', table_content[16:20])[0]
-        if self.Status == 0:
-            self.OrientationOffset = '0 degrees'
-        elif self.Status == 1:
-            self.OrientationOffset = '90 degrees'
-        elif self.Status == 2:
-            self.OrientationOffset = '180 degrees'
-        elif self.Status == 3:
-            self.OrientationOffset = '270 degrees'
-        else:
-            self.OrientationOffset = 'Reserved bits are used'
-        if self.ImageType == 0:
-            self.ImageTypeStr = ' - Bitmap'
-        else:
-            self.ImageTypeStr = 'Reserved'

-
-    def __str__(self) -> str:
-        return f"""
-------------------------------------------------------------------
-  Version                       : {self.Version:d}
-  Status                        : {self.Status:d}
-   Clockwise Orientation Offset : {self.OrientationOffset}
-  Image Type                    : {self.ImageType:d} {self.ImageTypeStr}
-  Image Address                 : 0x{self.ImageAddress:016X}
-  Image Offset X                : 0x{self.ImageOffsetX:08X}
-  Image Offset Y                : 0x{self.ImageOffsetY:08X}
-"""

-
-########################################################################################################
-#
-# BERT Table
-#
-########################################################################################################
-
-
-
[docs]class BERT (ACPI_TABLE):
-    def __init__(self, bootRegion: bytes) -> None:
-        self.bootRegion = bootRegion
-        return
-
-
[docs]    def parseSectionType(self, table_content: bytes) -> str:
-        # Processor Generic: {0x9876CCAD, 0x47B4, 0x4bdb, {0xB6, 0x5E, 0x16, 0xF1, 0x93, 0xC4, 0xF3, 0xDB}}
-        # Processor Specific: IA32/X64:{0xDC3EA0B0, 0xA144, 0x4797, {0xB9, 0x5B, 0x53, 0xFA, 0x24, 0x2B, 0x6E, 0x1D}}
-        # Processor Specific: IPF: {0xe429faf1, 0x3cb7, 0x11d4, {0xb, 0xca, 0x7, 0x00, 0x80,0xc7, 0x3c, 0x88, 0x81}}
-        # Processor Specific: ARM: { 0xE19E3D16, 0xBC11,0x11E4,{0x9C, 0xAA, 0xC2, 0x05,0x1D, 0x5D, 0x46, 0xB0}}
-        # Platform Memory: {0xA5BC1114, 0x6F64, 0x4EDE, {0xB8, 0x63, 0x3E, 0x83, 0xED, 0x7C, 0x83, 0xB1}}
-        # PCIe: {0xD995E954, 0xBBC1, 0x430F, {0xAD, 0x91, 0xB4, 0x4D, 0xCB,0x3C, 0x6F, 0x35}}
-        # Firmware Error Record Reference: {0x81212A96, 0x09ED, 0x4996, {0x94, 0x71, 0x8D, 0x72, 0x9C,0x8E, 0x69, 0xED}}
-        # PCI/PCI-X Bus: {0xC5753963, 0x3B84, 0x4095, {0xBF, 0x78, 0xED, 0xDA, 0xD3,0xF9, 0xC9, 0xDD}}
-        # PCI Component/Device: {0xEB5E4685, 0xCA66, 0x4769, {0xB6, 0xA2, 0x26, 0x06, 0x8B,0x00, 0x13, 0x26}}
-        # DMAr Generic: {0x5B51FEF7, 0xC79D, 0x4434, {0x8F, 0x1B, 0xAA, 0x62, 0xDE, 0x3E, 0x2C, 0x64}}
-        # Intel VT for Directed I/O Specific DMAr Section:  {0x71761D37, 0x32B2, 0x45cd, {0xA7, 0xD0, 0xB0, 0xFE 0xDD, 0x93, 0xE8, 0xCF}}
-        # IOMMU Specific DMAr Section: {0x036F84E1, 0x7F37, 0x428c, {0xA7, 0x9E, 0x57, 0x5F, 0xDF, 0xAA, 0x84, 0xEC}}
-        val1 = struct.unpack('<L', table_content[0:4])[0]
-        val2 = struct.unpack('<L', table_content[4:8])[0]
-        val3 = struct.unpack('<L', table_content[8:12])[0]
-        val4 = struct.unpack('<L', table_content[12:16])[0]
-        results = f'''0x{val1:08X} 0x{val2:08X} 0x{val3:08X} 0x{val4:08X} - '''
-        """if val1 == 0x9876CCAD and val2 == 0x47B4 and val3 == 0x4bdb and val4 in [0xB6, 0x5E, 0x16, 0xF1, 0x93, 0xC4, 0xF3, 0xDB]:
-            return results + '''Generic Processor'''
-        elif val1 == 0xDC3EA0B0 and val2 == 0xA144 and val3 == 0x4797 and val4 in [0xB9, 0x5B, 0x53, 0xFA, 0x24, 0x2B, 0x6E, 0x1D]:
-            return results + '''Processor Specific: IA32/X64'''
-        elif val1 == 0xe429faf1 and val2 == 0x3cb7 and val3 == 0x11d4 and val4 in [0xb, 0xca, 0x7, 0x00, 0x80,0xc7, 0x3c, 0x88, 0x81]:
-            return results + '''Processor Specific: IPF'''
-        elif val1 == 0xE19E3D16 and val2 == 0xBC11 and val3 == 0x11E4 and val4 in [0x9C, 0xAA, 0xC2, 0x05,0x1D, 0x5D, 0x46, 0xB0]:
-            return results + '''Processor Specific: ARM'''
-        elif val1 == 0xA5BC1114 and val2 == 0x6F64 and val3 == 0x4EDE and val4 in [0xB8, 0x63, 0x3E, 0x83, 0xED, 0x7C, 0x83, 0xB1]:
-            return results + '''Platform Memory'''
-        elif val1 == 0xD995E954 and val2 == 0xBBC1 and val3 == 0x430F and val4 in [0xAD, 0x91, 0xB4, 0x4D, 0xCB,0x3C, 0x6F, 0x35]:
-            return results + '''PCIe'''
-        elif val1 == 0x81212A96 and val2 == 0x09ED and val3 == 0x4996 and val4 in [0x94, 0x71, 0x8D, 0x72, 0x9C, 0x8E, 0x69, 0xED]:
-            return results + '''Firmware Error Record Reference'''
-        elif val1 == 0xC5753963 and val2 == 0x3B84 and val3 == 0x4095 and val4 in [0xBF, 0x78, 0xED, 0xDA, 0xD3, 0xF9, 0xC9, 0xDD]:
-            return results + '''PCI/PCI-X Bus'''
-        elif val1 == 0xEB5E4685 and val2 == 0xCA66 and val3 == 0x4769 and val4 in [0xB6, 0xA2, 0x26, 0x06, 0x8B, 0x00, 0x13, 0x26]:
-            return results + '''PCI Component/Device'''
-        elif val1 == 0x5B51FEF7 and val2 == 0xC79D and val3 == 0x4434 and val4 in [0x8F, 0x1B, 0xAA, 0x62, 0xDE, 0x3E, 0x2C, 0x64]:
-            return results + '''DMAr Generic'''
-        elif val1 == 0x71761D37 and val2 == 0x32B2 and val3 == 0x45cd and val4 in [0xA7, 0xD0, 0xB0, 0xFE, 0xDD, 0x93, 0xE8, 0xCF]:
-            return results + '''Intel VT for Directed I/O Specific DMAr Section'''
-        elif val1 == 0x036F84E1 and val2 == 0x7F37 and val3 == 0x428c and val4 in [0xA7, 0x9E, 0x57, 0x5F, 0xDF, 0xAA, 0x84, 0xEC]:
-            return results + '''IOMMU Specific DMAr Section'''"""
-        return results + '''Unknown'''

-
-
[docs]    def parseTime(self, table_content: bytes) -> str:
-        seconds = struct.unpack('<B', table_content[0:1])[0]
-        minutes = struct.unpack('<B', table_content[1:2])[0]
-        hours = struct.unpack('<B', table_content[2:3])[0]
-        percision = struct.unpack('<B', table_content[3:4])[0]
-        day = struct.unpack('<B', table_content[4:5])[0]
-        month = struct.unpack('<B', table_content[5:6])[0]
-        year = struct.unpack('<B', table_content[6:7])[0]
-        century = struct.unpack('<B', table_content[7:8])[0]
-        precision_str = ''
-        if percision > 0:
-            precision_str = '(time is percise and correlates to time of event)'
-        return f''' {hours:d}:{minutes:d}:{seconds:d} {month:d}/{day:d}/{century:d}{year:d} [m/d/y] {precision_str}'''

-
-
[docs]    def parseGenErrorEntries(self, table_content: bytes) -> str:
-        errorSeverities = ['Recoverable', 'Fatal', 'Corrected', 'None', 'Unknown severity entry']
-        sectionType = self.parseSectionType(table_content[0:16])
-        errorSeverity = struct.unpack('<L', table_content[16:20])[0]
-        revision = struct.unpack('<H', table_content[20:22])[0]
-        validationBits = struct.unpack('<B', table_content[22:23])[0]
-        flags = struct.unpack('<B', table_content[23:24])[0]
-        errDataLen = struct.unpack('<L', table_content[24:28])[0]
-        FRU_Id1 = struct.unpack('<L', table_content[28:32])[0]
-        FRU_Id2 = struct.unpack('<L', table_content[32:36])[0]
-        FRU_Id3 = struct.unpack('<L', table_content[36:40])[0]
-        FRU_Id4 = struct.unpack('<L', table_content[40:44])[0]
-        FRU_Text = struct.unpack('<20s', table_content[44:64])[0]
-        timestamp = struct.unpack('<Q', table_content[64:72])[0]
-        timestamp_str = self.parseTime(table_content[64:72])
-        if errDataLen > 0:
-            data = str(struct.unpack('<P', table_content[72:errDataLen + 72])[0])
-        else:
-            data = 'None'
-        errorSeverity_str = errorSeverities[4]
-        if errorSeverity < 4:
-            errorSeverity_str = errorSeverities[errorSeverity]
-        revision_str = ''
-        if revision != 3:
-            revision_str = ' - Should be 0x003'
-        FRU_Id_str = ''
-        if FRU_Id1 == 0 and FRU_Id2 == 0 and FRU_Id3 == 0 and FRU_Id4 == 0:
-            FRU_Id_str = ' - Default value, invalid FRU ID'
-        return f'''
-      Section Type                                  : {sectionType}
-      Error Severity                                : {errorSeverity} - {errorSeverity_str}
-      Revision                                      : 0x{revision:04X}{revision_str}
-      Validation Bits                               : 0x{validationBits:02X}
-      Flags                                         : 0x{flags:02X}
-        Primary                                     : 0x{flags & 1:02X}
-        Containment Warning                         : 0x{flags & 2:02X}
-        Reset                                       : 0x{flags & 4:02X}
-        Error Threshold Exceeded                    : 0x{flags & 8:02X}
-        Resource Not Accessible                     : 0x{flags & 16:02X}
-        Latent Error                                : 0x{flags & 32:02X}
-        Propagated                                  : 0x{flags & 64:02X}
-        Overflow                                    : 0x{flags & 128:02X}
-        Reserved                                    : 0x{flags & 256:02X}
-      Error Data Length                             : 0x{errDataLen:08X} ( {errDataLen:d} )
-      FRU Id                                        : {FRU_Id1} {FRU_Id2} {FRU_Id3} {FRU_Id4}{FRU_Id_str}
-      FRU Text                                      : {FRU_Text}
-      Timestamp                                     : {timestamp:d} - {timestamp_str}
-      Data                                          : {data}'''

-
-
[docs]    def parseErrorBlock(self, table_content: bytes) -> None:
-        errorSeverities = ['Recoverable', 'Fatal', 'Corrected', 'None', 'Unknown severity entry']
-        blockStatus = struct.unpack('<L', table_content[0:4])[0]
-        rawDataOffset = struct.unpack('<L', table_content[4:8])[0]
-        rawDataLen = struct.unpack('<L', table_content[8:12])[0]
-        dataLen = struct.unpack('<L', table_content[12:16])[0]
-        errorSeverity = struct.unpack('<L', table_content[16:20])[0]
-        genErrorDataEntries = self.parseGenErrorEntries(table_content[20:])
-        errorSeverity_str = errorSeverities[4]
-        if errorSeverity < 4:
-            errorSeverity_str = errorSeverities[errorSeverity]
-        self.BootRegion = f'''
-Generic Error Status Block
-    Block Status                                    : 0x{blockStatus:08X}
-      Correctable Error Valid                       : 0x{blockStatus & 1:08X}
-      Uncorrectable Error Valid                     : 0x{blockStatus & 2:08X}
-      Multiple Uncorrectable Errors                 : 0x{blockStatus & 4:08X}
-      Multiple Correctable Errors                   : 0x{blockStatus & 8:08X}
-      Error Data Entry Count                        : 0x{blockStatus & 1023:08X}
-      Reserved                                      : 0x{blockStatus & 262143:08X}
-    Raw Data Offset                                 : 0x{rawDataOffset:08X} ( {rawDataOffset:d} )
-    Raw Data Length                                 : 0x{rawDataLen:08X} ( {rawDataLen:d} )
-    Data Length                                     : 0x{dataLen:08X} ( {dataLen:d} )
-    Error Severity                                  : 0x{errorSeverity:08X} - {errorSeverity_str}
-    Generic Error Data Entries{genErrorDataEntries}
-'''

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        self.BootRegionLen = struct.unpack('<L', table_content[0:4])[0]
-        self.BootRegionAddr = struct.unpack('<Q', table_content[4:12])[0]
-        self.parseErrorBlock(self.bootRegion)

-
-    def __str__(self) -> str:
-        return f"""
-------------------------------------------------------------------
-  Boot Region Length                                : {self.BootRegionLen:d}
-  Boot Region Address	                            : 0x{self.BootRegionAddr:016X}
-  Boot Region - {self.BootRegion}
-"""

-
-########################################################################################################
-#
-# EINJ Table
-#
-########################################################################################################
-
-
-
[docs]class EINJ (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parseAddress(self, table_content: bytes) -> str:
-        return str(GAS(table_content))

-
-
[docs]    def parseInjection(self, table_content: bytes) -> None:
-        errorInjectActions = ['BEGIN_INJECTION_OPERATION', 'GET_TRIGGER_ERROR_ACTION', 'SET_ERROR_TYPE', 'GET_ERROR_TYPE', 'END_OPERATION', 'EXECUTE_OPERATION',
-                              'CHECK_BUSY_STATUS', 'GET_COMMAND_STATUS', 'SET_ERROR_TYPE_WITH_ADDRESS', 'GET_EXECUTE_OPERATION_TIMING', 'not recognized as valid aciton']
-        injectionInstructions = ['READ_REGISTER', 'READ_REGISTER_VALUE', 'WRITE_REGISTER', 'WRITE_REGISTER_VALUE', 'NOOP', 'not recognized as valid instruction']
-        injectionAction = struct.unpack('<B', table_content[0:1])[0]
-        instruction = struct.unpack('<B', table_content[1:2])[0]
-        flags = struct.unpack('<B', table_content[2:3])[0]
-        reserved = struct.unpack('<B', table_content[3:4])[0]
-        injectionHeaderSz = struct.unpack('<L', table_content[0:4])[0]
-        registerRegion = self.parseAddress(table_content[4:16])
-        value = struct.unpack('<Q', table_content[16:24])[0]
-        mask = struct.unpack('<Q', table_content[24:32])[0]
-        if injectionAction < 10:
-            injectionAction_str = errorInjectActions[injectionAction]
-        elif injectionAction == 255:
-            injectionAction_str = 'TRIGGER_ERROR'
-        else:
-            injectionAction_str = errorInjectActions[10]
-        if instruction < 5:
-            instruction_str = injectionInstructions[instruction]
-        else:
-            instruction_str = injectionInstructions[5]
-        if flags == 1 and (instruction == 2 or instruction == 3):
-            flags_str = ' - PRESERVE_REGISTER'
-        elif flags == 0:
-            flags_str = ' - Ignore'
-        else:
-            flags_str = ''
-        if reserved != 0:
-            reserved_str = ' - Error, must be 0'
-        else:
-            reserved_str = ''
-        self.results_str += f"""
-  Injection Instruction Entry
-    Injection Action                                : 0x{injectionAction:02X} ( {injectionAction:d} ) - {injectionAction_str}
-    Instruction                                     : 0x{instruction:02X} ( {instruction:d} ) - {instruction_str}
-    Flags                                           : 0x{flags:02X} ( {flags:d} ){flags_str}
-    Reserved                                        : 0x{reserved:02X} ( {reserved:d} ){reserved_str}
-    Register Region - {registerRegion}
-    Value                                           : 0x{value:016X} ( {value:d} )
-    Mask                                            : 0x{mask:016X} ( {mask:d} )
-    """

-
-
[docs]    def parseInjectionActionTable(self, table_contents: bytes, numInjections: int) -> None:
-        curInjection = 0
-        while curInjection < numInjections:
-            self.parseInjection(table_contents[curInjection * 32:(curInjection + 1) * 32])
-            curInjection += 1

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        injectionHeaderSz = struct.unpack('<L', table_content[0:4])[0]
-        injectionFlags = struct.unpack('<B', table_content[4:5])[0]
-        reserved1 = struct.unpack('<B', table_content[5:6])[0]
-        reserved2 = struct.unpack('<B', table_content[6:7])[0]
-        reserved3 = struct.unpack('<B', table_content[7:8])[0]
-        reserved3 = reserved3 << 16
-        reserved2 = reserved2 << 8
-        reserved = reserved3 | reserved2 | reserved1
-        injectionEntryCount = struct.unpack('<L', table_content[8:12])[0]
-        injection_str = ''
-        reserved_str = ''
-        if injectionFlags != 0:
-            injection_str = ' - Error, this feild should be 0'
-        if reserved != 0:
-            reserved_str = ' - Error, this field should be 0'
-        self.results_str = f"""
-------------------------------------------------------------------
-  Injection Header Size                             : 0x{injectionHeaderSz:016X} ( {injectionHeaderSz:d} )
-  Injection Flags                                   : 0x{injectionFlags:02X}{injection_str}
-  Reserved                                          : 0x{reserved:06X}{reserved_str}
-  Injection Entry Count                             : 0x{injectionEntryCount:08X} ( {injectionEntryCount:d} )
-  Injection Instruction Entries
-"""

-
-    def __str__(self) -> str:
-        return self.results_str

-
-########################################################################################################
-#
-# ERST Table
-#
-########################################################################################################
-
-
-
[docs]class ERST (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parseAddress(self, table_content: bytes) -> str:
-        return str(GAS(table_content))

-
-
[docs]    def parseActionTable(self, table_content: bytes, instrCountEntry: int) -> None:
-        curInstruction = 0
-        while curInstruction < instrCountEntry:
-            self.parseInstructionEntry(table_content[32 * curInstruction:])
-            curInstruction += 1

-
-
[docs]    def parseInstructionEntry(self, table_content: bytes) -> None:
-        serializationInstr_str = ''
-        serializationAction = struct.unpack('<B', table_content[0:1])[0]
-        instruction = struct.unpack('<B', table_content[1:2])[0]
-        flags = struct.unpack('<B', table_content[2:3])[0]
-        reserved = struct.unpack('<B', table_content[3:4])[0]
-        registerRegion = self.parseAddress(table_content[4:16])
-        value = struct.unpack('<Q', table_content[16:24])[0]
-        mask = struct.unpack('<Q', table_content[24:32])[0]
-        serializationActions = ['BEGIN_WRITE_OPERATION', 'BEGIN_READ_OPERATION', 'BEGIN_CLEAR_OPERATION', 'END_OPERATION', 'SET_RECORD_OFFESET', 'EXECUTE_OPERATION', 'CHECK_BUSY_STATUS',
-                                'GET_COMMAND_STATUS', 'GET_RECORD_IDENTIFIER', 'SET_RECORD_IDENTIFIER', 'GET_RECORD_COUNT', 'BEGIN_DUMMY_WRITE_OPERATION', 'RESERVED', 'GET_ERROR_LOG_ADDRESS_RANGE',
-                                'GET_ERROR_LOG_ADDRESS_RANGE_LENGTH', 'GET_ERROR_LOG_ADDRESS_RANGE_ATTEIBUTES', 'GET_EXECUTE_OPERATION_TIMINGS']
-        serializationInstructions = ['READ_REGISTER', 'READ_REGISTER_VALUE', 'WRITE_REGISTER', 'WRITE_REGISTER_VALUE', 'NOOP', 'LOAD_VAR1', 'LOAD_VAR2', 'STORE_VAR1', 'ADD', 'SUBTRACT',
-                                     'ADD_VALUE', 'SUBTRACT_VALUE', 'STALL', 'STALL_WHILE_TRUE', 'SKIP_NEXT_INSTRUCTION_IF_TRUE', 'GOTO', 'SET_SCR_ADDRESS_BASE', 'SET_DST_ADDRESS_BASE', 'MOVE_DATA']
-        if serializationAction < 17:
-            serializationAction_str = serializationActions[serializationAction]
-        else:
-            serializationAction_str = 'Unknown'
-        if instruction < 17:
-            serializationInstr_str = serializationInstructions[instruction]
-        else:
-            serializationAction_str = 'Unknown'
-        if reserved != 0:
-            reserved_str = ' - Error, this should be 0'
-        else:
-            reserved_str = ''
-        if flags == 1:
-            flags_str = ' - PRESERVE_REGISTER'
-        else:
-            flags_str = ''
-
-        self.results_str += f'''
-    Serialization Intruction Entry
-      Serialized Action                             : 0x{serializationAction:02X} - {serializationAction_str}
-      Instruction                                   : 0x{instruction:02X} - {serializationInstr_str}
-      Flags                                         : 0x{flags:02X}{flags_str}
-      Reserved                                      : 0x{reserved:02X}{reserved_str}
-      Register Region - {registerRegion}
-      Value                                         : 0x{value:016X}
-      Mask                                          : 0x{mask:016X}
-    '''

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        headerSz = struct.unpack('<L', table_content[0:4])[0]
-        reserved = struct.unpack('<L', table_content[4:8])[0]
-        instrCountEntry = struct.unpack('<L', table_content[8:12])[0]
-        if reserved != 0:
-            reserved_str = ' - Error, this should be 0'
-        else:
-            reserved_str = ''
-        self.results_str = f"""
-------------------------------------------------------------------
-  Serialization Header Size                       : 0x{headerSz:08X} ( {headerSz:d} )
-  Reserved                                        : 0x{reserved:08X}{reserved_str}
-  Instruction Count Entry                         : 0x{instrCountEntry:08X} ( {instrCountEntry:d} )
-  Serialization Action Table
-"""
-        self.parseActionTable(table_content[12:], instrCountEntry)

-
-    def __str__(self) -> str:
-        return self.results_str

-
-########################################################################################################
-#
-# HEST Table
-#
-########################################################################################################
-
-
-
[docs]class HEST (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parseErrEntry(self, table_content: bytes) -> Optional[int]:
-        _type = struct.unpack('<H', table_content[0:2])[0]
-        if _type == 0:  # Arch Machine Check Execption Structure
-            return self.parseAMCES(table_content)
-        elif _type == 1:  # Arch Corrected Mach Check Structure or ArchitectureDeferred machine Check Structure
-            return self.parseAMCS(table_content, _type)
-        elif _type == 2:  # NMI Error Structure
-            return self.parseNMIStructure(table_content)
-        elif _type == 6 or _type == 7 or _type == 8:  # PCIe Root Port AER Structure or PCIe Device AER Structure or PCIe Bridge AER Structure
-            return self.parsePCIe(table_content, _type)
-        elif _type == 9 or _type == 10:  # Generic hardware Error Source Structure or Generic Hardware Error Source version 2
-            return self.parseGHESS(table_content, _type)
-        return

-
-
[docs]    def parseNotify(self, table_content: bytes) -> str:
-        types = ['Polled', 'External Interrupt', 'Local Interrupt', 'SCI', 'NMI', 'CMCI', 'MCE', 'GPI-Signal',
-                 'ARMv8 SEA', 'ARMv8 SEI', 'External Interrupt - GSIV', 'Software Delicated Exception', 'Reserved']
-        errorType = struct.unpack('<B', table_content[0:1])[0]
-        length = struct.unpack('<B', table_content[1:2])[0]
-        configWrEn = struct.unpack('<H', table_content[2:4])[0]
-        pollInterval = struct.unpack('<L', table_content[4:8])[0]
-        vector = struct.unpack('<L', table_content[8:12])[0]
-        switchPollingThreshVal = struct.unpack('<L', table_content[12:16])[0]
-        switchPollThresWind = struct.unpack('<L', table_content[16:20])[0]
-        errThreshVal = struct.unpack('<L', table_content[20:24])[0]
-        errThreshWind = struct.unpack('<L', table_content[24:28])[0]
-
-        if errorType <= 12:
-            typeStr = types[errorType]
-        else:
-            typeStr = types[12]
-
-        vector_str = ''
-        if errorType == 10:
-            vector_str = 'Specifies the GSIV triggerd by error source'
-
-        return f"""Hardware Error Notification Structure
-      Type                                        : {errorType:d} - {typeStr}
-      Length                                      : 0x{length:02X}
-      Configuration Write Enable                  : 0x{configWrEn:04X}
-        Type                                      : {configWrEn & 1:d}
-        Poll Interval                             : {configWrEn & 2:d}
-        Switch To Polling Threshold Value         : {configWrEn & 4:d}
-        Switch To Polling Threshold Window        : {configWrEn & 8:d}
-        Error Threshold Value                     : {configWrEn & 16:d}
-        Error Threshold Window                    : {configWrEn & 32:d}
-      Poll Interval                               : {pollInterval:d} milliseconds
-      Vector                                      : {vector:d}{vector_str}
-      Switch To Polling Threshold Value           : 0x{switchPollingThreshVal:08X}
-      Switch To Polling Threshold Window          : {errThreshVal:d} milliseconds
-      Error Threshold Value                       : 0x{errThreshVal:08X}
-      Error Threshold Window                      : {errThreshWind:d} milliseconds
-      """

-
-
[docs]    def machineBankParser(self, table_content: bytes) -> None:
-        bankNum = struct.unpack('<B', table_content[0:1])[0]
-        clearStatus = struct.unpack('<B', table_content[1:2])[0]
-        statusDataFormat = struct.unpack('<B', table_content[2:3])[0]
-        reserved1 = struct.unpack('<L', table_content[3:4])[0]
-        controlRegMsrAddr = struct.unpack('<L', table_content[4:8])[0]
-        controlInitData = struct.unpack('<L', table_content[8:16])[0]
-        statusRegMSRAddr = struct.unpack('<L', table_content[16:20])[0]
-        addrRegMSRAddr = struct.unpack('<L', table_content[20:24])[0]
-        miscRegMSTAddr = struct.unpack('<L', table_content[24:28])[0]
-
-        if clearStatus == 0:
-            clearStatus_str = 'Clear'
-        else:
-            clearStatus_str = "Don't Clear"
-
-        statusDataFormatStrList = ['IA-32 MCA', 'Intel 64 MCA', 'AMD64MCA', 'Reserved']
-        if statusDataFormat < 3:
-            statusDataFormat_str = statusDataFormatStrList[statusDataFormat]
-        else:
-            statusDataFormat_str = statusDataFormatStrList[3]
-
-        if controlRegMsrAddr != 0:
-            controlRegMsrAddr_str = ''
-        else:
-            controlRegMsrAddr_str = ' - Ignore'
-
-        if statusRegMSRAddr != 0:
-            statusRegMSRAddr_str = ''
-        else:
-            statusRegMSRAddr_str = ' - Ignore'
-
-        if addrRegMSRAddr != 0:
-            addrRegMSRAddr_str = ''
-        else:
-            addrRegMSRAddr_str = ' - Ignore'
-
-        if miscRegMSTAddr != 0:
-            miscRegMSTAddr_str = ''
-        else:
-            miscRegMSTAddr_str = ' - Ignore'
-
-        self.resultsStr += f"""Machine Check Error Bank Structure
-      Bank Number                                 : 0x{bankNum:04X}
-      Clear Status On Initialization              : 0x{clearStatus:04X} - {clearStatus_str}
-      Status Data Format                          : 0x{statusDataFormat:04X} - {statusDataFormat_str}
-      Reserved                                    : 0x{reserved1:04X}
-      Control Register MSR Address                : 0x{controlRegMsrAddr:04X}{controlRegMsrAddr_str}
-      Control Init Data                           : 0x{controlInitData:04X}
-      Status Register MSR Address                 : 0x{statusRegMSRAddr:04X}{statusRegMSRAddr_str}
-      Address Register MSR Address                : 0x{addrRegMSRAddr:04X}{addrRegMSRAddr_str}
-      Misc Register MSR Address                   : 0x{miscRegMSTAddr:04X}{miscRegMSTAddr_str}"""

-
-
[docs]    def parseAddress(self, table_content: bytes) -> str:
-        return str(GAS(table_content))

-
-
[docs]    def parseAMCES(self, table_content: bytes) -> int:
-        sourceID = struct.unpack('<H', table_content[2:4])[0]
-        reserved1 = struct.unpack('<H', table_content[4:6])[0]
-        flags = struct.unpack('<B', table_content[6:7])[0]
-        enabled = struct.unpack('<B', table_content[7:8])[0]
-        recordsToPreAllocate = struct.unpack('<L', table_content[8:12])[0]
-        maxSectorsPerRecord = struct.unpack('<L', table_content[12:16])[0]
-        globalCapabilityInitData = struct.unpack('<Q', table_content[16:24])[0]
-        globalControlInitData = struct.unpack('<Q', table_content[24:32])[0]
-        numHardwareBanks = struct.unpack('<B', table_content[32:33])[0]
-        reserved2_1 = struct.unpack('<B', table_content[33:34])[0]
-        reserved2_2 = struct.unpack('<B', table_content[34:35])[0]
-        reserved2_3 = struct.unpack('<B', table_content[35:36])[0]
-        reserved2_4 = struct.unpack('<B', table_content[36:37])[0]
-        reserved2_5 = struct.unpack('<B', table_content[37:38])[0]
-        reserved2_6 = struct.unpack('<B', table_content[38:39])[0]
-        reserved2_7 = struct.unpack('<B', table_content[39:40])[0]
-
-        if (flags & 1) == 1:
-            firmware_first = 1
-            firmware_first_str = 'System firmware handles errors from the source first'
-        else:
-            firmware_first = 0
-            firmware_first_str = 'System firmware does not handle errors from the source first'
-
-        if (flags & 4) == 4:
-            ghes_assist = 1
-            ghes_assist_str = 'Additional information given'
-        else:
-            ghes_assist = 0
-            ghes_assist_str = 'Additional information not given'
-
-        if firmware_first == 0:
-            ghes_assist_str = 'Bit is reserved'
-
-        self.resultsStr += f"""
-  Architecture Machine Check Exception Structure
-    Source ID                                     : 0x{sourceID:04X}
-    Reserved                                      : 0x{reserved1:04X}
-    Flags                                         : 0x{flags:02X}
-    FIRMWARE_FIRST                                : {firmware_first} - {firmware_first_str}
-    GHES_ASSIST                                   : {ghes_assist} - {ghes_assist_str}
-    Enabled                                       : 0x{enabled:02X}
-    Number of Records to Pre-allocate             : 0x{recordsToPreAllocate:08X}
-    Max Sections Per Record                       : 0x{maxSectorsPerRecord:08X}
-    Global Capability Init Data                   : 0x{globalCapabilityInitData:016X}
-    Number of Hardware Banks                      : 0x{numHardwareBanks:02X}
-    Reserved                                      : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X} 0x{reserved2_4:02X} 0x{reserved2_5:02X} 0x{reserved2_6:02X} 0x{reserved2_7:02X}
-    """
-        curBankNum = 0
-        while curBankNum < numHardwareBanks:
-            self.machineBankParser(table_content[40 + curBankNum * 28:40 + (curBankNum + 1) * 28])
-            curBankNum += 1
-        return 40 + numHardwareBanks * 28

-
-
[docs]    def parseAMCS(self, table_content: bytes, _type: int) -> int:
-        sourceID = struct.unpack('<H', table_content[2:4])[0]
-        reserved1 = struct.unpack('<H', table_content[4:6])[0]
-        flags = struct.unpack('<B', table_content[6:7])[0]
-        enabled = struct.unpack('<B', table_content[7:8])[0]
-        recordsToPreAllocate = struct.unpack('<L', table_content[8:12])[0]
-        maxSectorsPerRecord = struct.unpack('<L', table_content[12:16])[0]
-        notificationStructure = self.parseNotify(table_content[16:44])
-        numHardwareBanks = struct.unpack('<B', table_content[44:45])[0]
-        reserved2_1 = struct.unpack('<B', table_content[45:46])[0]
-        reserved2_2 = struct.unpack('<B', table_content[46:47])[0]
-        reserved2_3 = struct.unpack('<B', table_content[47:48])[0]
-
-        if (flags & 1) == 1:
-            firmware_first = 1
-            firmware_first_str = 'System firmware handles errors from the source first'
-        else:
-            firmware_first = 0
-            firmware_first_str = 'System firmware does not handle errors from the source first'
-
-        if (flags & 4) == 4:
-            ghes_assist = 1
-            ghes_assist_str = 'Additional information given'
-        else:
-            ghes_assist = 0
-            ghes_assist_str = 'Additional information not given'
-
-        flags_str = ''
-        if flags != 1 and flags != 4 and flags != 5:
-            flags_str = ' - Error, Reserved Bits are not 0'
-
-        if firmware_first == 0:
-            ghes_assist_str = 'Bit is reserved'
-
-        if _type == 1:
-            title = 'Architecture Corrected Machine Check Structure'
-        else:
-            title = 'Architecture Deferred Machine Check Structure'
-
-        self.resultsStr += f"""
-    {title}
-    Source ID         				  : 0x{sourceID:04X}
-    Reserved                                      : 0x{reserved1:04X}
-    Flags                                         : 0x{flags:02X}{flags_str}
-      FIRMWARE_FIRST                              : {firmware_first} - {firmware_first_str}
-      GHES_ASSIST                                 : {ghes_assist} - {ghes_assist_str}
-    Enabled                                       : 0x{enabled:02X}
-    Number of Records to Pre-allocate             : 0x{recordsToPreAllocate:08X}
-    Max Sections Per Record                       : 0x{maxSectorsPerRecord:08X}
-    {notificationStructure}
-    Number of Hardware Banks                      : 0x{numHardwareBanks:02X}
-    Reserved                                      : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X}
-
-    """
-        currBank = 0
-        while currBank < numHardwareBanks:
-            self.machineBankParser(table_content[48 + currBank * 28:48 + (currBank + 1) * 28])
-            currBank += 1
-        return 48 + numHardwareBanks * 28

-
-
[docs]    def parseNMIStructure(self, table_content: bytes) -> int:
-        sourceID = struct.unpack('<H', table_content[2:4])[0]
-        reserved = struct.unpack('<L', table_content[4:8])[0]
-        numRecordsToPreAllocate = struct.unpack('<L', table_content[8:12])[0]
-        maxSectorsPerRecord = struct.unpack('<L', table_content[12:16])[0]
-        maxRawDataLength = struct.unpack('<L', table_content[16:20])[0]
-
-        if reserved == 0:
-            reserved_str = ''
-        else:
-            reserved_str = ' - Error, not 0'
-
-        self.resultsStr += f"""
-  Architecture NMI Error Structure
-    Source ID                                     : 0x{sourceID:04X}
-    Reserved                                      : 0x{reserved:08X}{reserved_str}
-    Number of Records to Pre-Allocate             : 0x{numRecordsToPreAllocate:08X}
-    Max Sections Per Record                       : 0x{maxSectorsPerRecord:08X}
-    Max Raw Data Length                           : 0x{maxRawDataLength:08X}
-    """
-        return 20

-
-
[docs]    def parsePCIe(self, table_content: bytes, _type: int) -> int:
-        sourceID = struct.unpack('<H', table_content[2:4])[0]
-        reserved1 = struct.unpack('<H', table_content[4:6])[0]
-        flags = struct.unpack('<B', table_content[6:7])[0]
-        enabled = struct.unpack('<B', table_content[7:8])[0]
-        numRecordsToPreAllocate = struct.unpack('<L', table_content[8:12])[0]
-        maxSectorsPerRecord = struct.unpack('<L', table_content[12:16])[0]
-        bus = struct.unpack('<L', table_content[16:20])[0]
-        device = struct.unpack('<H', table_content[20:22])[0]
-        function = struct.unpack('<H', table_content[22:24])[0]
-        deviceControl = struct.unpack('<H', table_content[24:26])[0]
-        reserved2 = struct.unpack('<H', table_content[26:28])[0]
-        uncorrectableErrorMask = struct.unpack('<L', table_content[28:32])[0]
-        uncorrectableErrorServerity = struct.unpack('<L', table_content[32:36])[0]
-        correctableErrorMask = struct.unpack('<L', table_content[36:40])[0]
-        advancedErrorCapabilitiesAndControl = struct.unpack('<L', table_content[40:44])[0]
-        if _type == 6:
-            title = 'PCI Express Root Port AER Structure'
-            rootErrCommand = struct.unpack('<L', table_content[44:48])[0]
-            extra_str = f'''
-    Root Error Command                            : 0x{rootErrCommand:08X}'''
-            size = 48
-        elif _type == 8:
-            title = 'PCI Express Bridge AER Structure'
-            secondaryUncorrErrMask = struct.unpack('<L', table_content[44:48])[0]
-            secondaryUncorrErrServ = struct.unpack('<L', table_content[48:52])[0]
-            secondaryAdvCapabAndControl = struct.unpack('<L', table_content[52:56])[0]
-            extra_str = f'''
-    Secondary Uncorrectable Error Mask            : 0x{secondaryUncorrErrMask:08X}
-    Secondary Uncorrectable Error Severity        : 0x{secondaryUncorrErrServ:08X}
-    Secondary Advanced Capabilities and Control   : 0x{secondaryAdvCapabAndControl:08X}'''
-            size = 56
-        else:
-            title = 'PCI Express Device AER Structure'
-            extra_str = ''
-            size = 44
-
-        if (flags & 1) == 1:
-            firmware_first = 1
-            firmware_first_str = 'System firmware handles errors from the source first'
-        else:
-            firmware_first = 0
-            firmware_first_str = 'System firmware does not handle errors from the source first'
-
-        if (flags & 2) == 2:
-            global_flag = 1
-            global_flag_str = 'Settings in table are for all PCIe Devices'
-        else:
-            global_flag = 0
-            global_flag_str = 'Settings in table are not for all PCIe Devices'
-        flags_str = ''
-        reserved2_str = ''
-        isGlobal_str = ''
-        isFirmware_str = ''
-
-        if flags >= 4:
-            flags_str = 'Error, reserved bits are not 0'
-        if reserved2 != 0:
-            reserved2_str = ' - Error, reserved bits should be 0'
-        if global_flag != 0:
-            isGlobal_str = ' - This field should be ignored since Global is set'
-        if firmware_first != 0:
-            isFirmware_str = ' - This field should be ignored since FIRMWARE_FIRST is set'
-
-        self.resultsStr += f"""
-  {title}
-    Source ID                                     : 0x{sourceID:04X}
-    Reserved                                      : 0x{reserved1:08X}
-    Flags                                         : 0x{flags:02X}{flags_str}
-      FIRMWARE_FIRST                              : {firmware_first} - {firmware_first_str} {isFirmware_str}
-      GLOBAL                                      : {global_flag} - {global_flag_str}
-    Enabled                                       : 0x{enabled:08X}
-    Number of Records to Pre-Allocate             : 0x{numRecordsToPreAllocate:08X}
-    Max Sections Per Record                       : 0x{maxSectorsPerRecord:08X}
-    Bus                                           : 0x{bus:08X}
-    Device                                        : 0x{device:04X}{isGlobal_str}
-    Function                                      : 0x{function:04X}{isGlobal_str}
-    Device Control                                : 0x{deviceControl:04X}
-    Reserved                                      : 0x{reserved2:04X}{reserved2_str}
-    Uncorrectable Error Mask                      : 0x{uncorrectableErrorMask:08X}
-    Uncorrected Error Severity                    : 0x{uncorrectableErrorServerity:08X}
-    Corrected Error Mask                          : 0x{correctableErrorMask:08X}
-    Advanced Error Capabilities and Control       : 0x{advancedErrorCapabilitiesAndControl:08X}{extra_str}
-    """
-        return size

-
-
[docs]    def parseGHESS(self, table_content: bytes, _type: int) -> int:
-        sourceID = struct.unpack('<H', table_content[2:4])[0]
-        relatedSourceID = struct.unpack('<H', table_content[4:6])[0]
-        flags = struct.unpack('<B', table_content[6:7])[0]
-        enabled = struct.unpack('<B', table_content[7:8])[0]
-        numRecordsToPreAllocate = struct.unpack('<L', table_content[8:12])[0]
-        maxSectorsPerRecord = struct.unpack('<L', table_content[12:16])[0]
-        maxRawDataLength = struct.unpack('<L', table_content[16:20])[0]
-        address_str = self.parseAddress(table_content[20:32])
-        notification_str = self.parseNotify(table_content[32:60])
-        errStatusBlockLen = struct.unpack('<L', table_content[60:64])[0]
-        if _type == 9:
-            title = 'Generic Hardware Error Source Structure'
-            extra_str = ''
-        else:
-            title = 'Generic Hardware Error Source Version 2'
-            readAckReg_str = self.parseAddress(table_content[64:76])
-            readAckPresv = struct.unpack('<Q', table_content[76:84])[0]
-            readAckWr = struct.unpack('<Q', table_content[84:88])[0]
-            extra_str = f'''
-    Read Ack Register - {readAckReg_str}
-    Read Ack Preserve                             : 0x{readAckPresv:016X}
-    Read Ack Write                                : 0x{readAckWr:016X}'''
-        if relatedSourceID == 65535:
-            relatedSourceID_str = 'Does not represent an alternate souce'
-        else:
-            relatedSourceID_str = ''
-
-        self.resultsStr += f"""
-  {title}
-    Source ID                                     : 0x{sourceID:04X}
-    Related Source Id                             : 0x{relatedSourceID:08X}{relatedSourceID_str}
-    Flags                                         : 0x{flags:02X} - Reserved
-    Enabled                                       : 0x{enabled:02X}
-    Number of Records to Pre-Allocate             : 0x{numRecordsToPreAllocate:08X}
-    Max Sections Per Record                       : 0x{maxSectorsPerRecord:08X}
-    Max Raw Data Length                           : 0x{maxRawDataLength:08X}
-    Error Status Address - {address_str}
-    {notification_str}
-    Error Status Block Length                     : 0x{errStatusBlockLen:08X}{extra_str}
-    """
-        return 64

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        self.ErrorSourceCount = struct.unpack('<L', table_content[0:4])[0]
-        self.resultsStr = f"""
-------------------------------------------------------------------
-  Error Source Count                              : {self.ErrorSourceCount}
-"""
-        nextTable = 4
-        currErrSource = 0
-        while currErrSource < self.ErrorSourceCount:
-            table_entry = self.parseErrEntry(table_content[nextTable:])
-            if table_entry is not None:
-                nextTable += table_entry
-            currErrSource += 1

-
-    def __str__(self) -> str:
-        return self.resultsStr

-
-
-########################################################################################################
-#
-# SPMI Table
-#
-########################################################################################################
-
-
[docs]class SPMI (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parseAddress(self, table_content: bytes) -> str:
-        return str(GAS(table_content))

-
-
[docs]    def parseNonUID(self, table_content: bytes) -> str:
-        pciSegGrpNum = struct.unpack('<B', table_content[0:1])[0]
-        pciBusNum = struct.unpack('<B', table_content[1:2])[0]
-        pciDevNum = struct.unpack('<B', table_content[2:3])[0]
-        pciFuncNum = struct.unpack('<B', table_content[3:4])[0]
-        return f'''  PCI Segment GroupNumber                                 : 0x{pciSegGrpNum:02X}
-  PCI Bus Number                                          : 0x{pciBusNum:02X}
-  PCI Device Number                                       : 0x{pciDevNum:02X}
-  PCI Function Number                                     : 0x{pciFuncNum:02X}'''

-
-
[docs]    def parseUID(self, table_content: bytes) -> str:
-        uid = struct.unpack('<L', table_content[0:4])[0]
-        return f'''  UID                                                     : 0x{uid:02X}'''

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        interfaceType = struct.unpack('<B', table_content[0:1])[0]
-        reserved1 = struct.unpack('<B', table_content[1:2])[0]
-        specRev = struct.unpack('<B', table_content[2:3])[0]
-        interruptType = struct.unpack('<H', table_content[3:5])[0]
-        gpe = struct.unpack('<B', table_content[5:6])[0]
-        reserved2 = struct.unpack('<B', table_content[6:7])[0]
-        pciDeviceFlag = struct.unpack('<B', table_content[7:8])[0]
-        globalSysInter = struct.unpack('<L', table_content[8:12])[0]
-        baseAdder = self.parseAddress(table_content[12:24])
-        reserved3 = struct.unpack('<B', table_content[28:29])[0]
-        if interfaceType == 1:
-            intTypeStr = "Keyboard Controller Style (KCS)"
-        elif interfaceType == 2:
-            intTypeStr = "Server Management Interface Chip (SMIC)"
-        elif interfaceType == 3:
-            intTypeStr = "Block Transfer (BT)"
-        elif interfaceType == 4:
-            intTypeStr = "SMBus System Interface (SSIF)"
-        else:
-            intTypeStr = "Reserved"
-        specRevStr = (f'0x{specRev:02X}')
-        intType_0 = interruptType & 1
-        intType_1 = interruptType & 2 >> 1
-        intType_other = interruptType ^ 3 >> 2
-        if intType_0 == 1:
-            intTypeSCIGPE = "supported"
-        else:
-            intTypeSCIGPE = "not supported"
-        if intType_1 == 1:
-            intTypeIO = "supported"
-        else:
-            intTypeIO = "not supported"
-        GPE_str = ''
-        if (interruptType & 1) != 1:
-            GPE_str = " - should be set to 00h"
-        pciDeviceFlag_0 = pciDeviceFlag & 1
-        if pciDeviceFlag_0 == 1:
-            pci_str = 'For PCi IPMI devices'
-            otherStr = self.parseNonUID(table_content[25:28])
-        else:
-            pci_str = 'non-PCI device'
-            otherStr = self.parseUID(table_content[25:28])
-        pciDeviceFlag_reserved = 1 ^ pciDeviceFlag_0
-        globalSysInt_str = ''
-        if intType_1 != 1:
-            globalSysInt_str = ' - this field should be 0'
-        self.results = f'''==================================================================
-  Service Processor Management Interface Description Table ( SPMI )
-==================================================================
-  Interface Type                                          : 0x{interfaceType:02X} - {intTypeStr}
-  Reserved                                                : 0x{reserved1:02X} - Must always be 01h to be compatible with any software implementing previous versions of the spec
-  Specification Revision (version)                        : {specRevStr}
-  Interrupt Type                                          : 0x{interruptType:04X}
-    SCI triggered through GPE                             : 0x{intType_0:02X} - {intTypeSCIGPE}
-    I/0 APIC/SAPIC interrupt (Global System Interrupt)    : 0x{intType_1:02X} - {intTypeIO}
-    Reserved                                              : 0x{intType_other:02X} - Must be 0
-  GPE                                                     : 0x{gpe:02X}{GPE_str}
-  Reserved                                                : 0x{reserved2:02X} - should be 00h
-  PCI Device Flag                                         : 0x{pciDeviceFlag:02X}
-    PCI Device Flag                                       : {pciDeviceFlag_0:d} {pci_str}
-    Reserved                                              : {pciDeviceFlag_reserved:d} - must be 0
-  Global System Interrupt                                 : 0x{globalSysInter:08X}{globalSysInt_str}
-  Base Address - {baseAdder}
-{otherStr}
-  Reserved                                                : 0x{reserved3:02X}
-
-'''

-
-    def __str__(self) -> str:
-        return self.results

-
-
-########################################################################################################
-#
-# RASF Table
-#
-########################################################################################################
-
-
[docs]class RASF (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        rpcci1 = struct.unpack('<B', table_content[0:1])[0]
-        rpcci2 = struct.unpack('<B', table_content[1:2])[0]
-        rpcci3 = struct.unpack('<B', table_content[2:3])[0]
-        rpcci4 = struct.unpack('<B', table_content[3:4])[0]
-        rpcci5 = struct.unpack('<B', table_content[4:5])[0]
-        rpcci6 = struct.unpack('<B', table_content[5:6])[0]
-        rpcci7 = struct.unpack('<B', table_content[6:7])[0]
-        rpcci8 = struct.unpack('<B', table_content[7:8])[0]
-        rpcci9 = struct.unpack('<B', table_content[8:9])[0]
-        rpcci10 = struct.unpack('<B', table_content[9:10])[0]
-        rpcci11 = struct.unpack('<B', table_content[10:11])[0]
-        rpcci12 = struct.unpack('<B', table_content[11:12])[0]
-        self.results = f'''==================================================================
-  ACPI RAS Feature Table ( RASF )
-==================================================================
-  RASF Platform Communication Channel Identifier          : 0x{rpcci1:02X} 0x{rpcci2:02X} 0x{rpcci3:02X} 0x{rpcci4:02X} 0x{rpcci5:02X} 0x{rpcci6:02X} 0x{rpcci7:02X} 0x{rpcci8:02X} 0x{rpcci9:02X} 0x{rpcci10:02X} 0x{rpcci11:02X} 0x{rpcci12:02X}
-
-'''

-
-    def __str__(self) -> str:
-        return self.results

-
-
-########################################################################################################
-#
-# MSCT Table
-#
-########################################################################################################
-
-
[docs]class MSCT (ACPI_TABLE):
-    def __init__(self):
-        return
-
-
[docs]    def parseProx(self, table_content: bytes, val: int) -> str:
-        rev = struct.unpack('<B', table_content[0:1])[0]
-        length = struct.unpack('<B', table_content[1:2])[0]
-        maxDomRangeL = struct.unpack('<L', table_content[2:6])[0]
-        maxDomRangeH = struct.unpack('<L', table_content[6:10])[0]
-        maxProcCap = struct.unpack('<L', table_content[10:14])[0]
-        maxMemCap = struct.unpack('<Q', table_content[14:22])[0]
-        maxProcCap_str = ''
-        maxMemCap_str = ''
-        if maxProcCap == 0:
-            maxProcCap_str = ' - Proximity domains do not contain a processor'
-        if maxMemCap == 0:
-            maxMemCap_str = '- Proximity domains do not contain memory'
-        return f'''
-    Maximum Proximity Domain Informaiton Structure[{val:d}]
-      Revision                                              : 0x{rev:02X} ( {rev:d} )
-      Length                                                : 0x{length:02X} ( {length:d} )
-      Proximity Domain Range (low)                          : 0x{maxDomRangeL:04X}
-      Proximity Domain Range (high)                         : 0x{maxDomRangeH:04X}
-      Maximum Processor Capacity                            : 0x{maxProcCap:04X} ( {maxProcCap:d} ){maxProcCap_str}
-      Maximum Memory Capacity                               : 0x{maxMemCap:016X} ( {maxMemCap:d} ) bytes {maxMemCap_str}
-
-'''

-
-
[docs]    def parseProxDomInfoStruct(self, table_contents: bytes, num: int) -> str:
-        val = 0
-        result = ''
-        while val < num:
-            result += self.parseProx(table_contents[22 * val: 22 * (val + 1)], val)
-            val = val + 1
-        return result

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        offsetProxDomInfo = struct.unpack('<L', table_content[0:4])[0]
-        maxNumProxDoms = struct.unpack('<L', table_content[4:8])[0]
-        maxNumClockDoms = struct.unpack('<L', table_content[8:12])[0]
-        maxPhysAddr = struct.unpack('<Q', table_content[12:20])[0]
-        proxDomInfoStructStr = self.parseProxDomInfoStruct(table_content[20:], maxNumProxDoms)
-        self.results = f'''==================================================================
-  Maximum System Characteristics Table ( MSCT )
-==================================================================
-  Offset to Proximity Domain Information Structure        : 0x{offsetProxDomInfo:08X}
-  Maximum Number of Proximity Domains                     : 0x{maxNumProxDoms:08X} ( {maxNumProxDoms:d} )
-  Maximum Number of Clock Domains                         : 0x{maxNumClockDoms:08X} ( {maxNumClockDoms:d} )
-  Maximum Physical Address                                : 0x{maxPhysAddr:016X}
-  Proximity Domain  Information Structure{proxDomInfoStructStr}
-
-'''

-
-    def __str__(self) -> str:
-        return self.results

-
-
-########################################################################################################
-#
-# NFIT Table
-#
-########################################################################################################
-
-
[docs]class NFIT (ACPI_TABLE):
-    def __init__(self, header):
-        length = struct.unpack('<L', header[4:8])[0]
-        self.total_length = length
-        return
-
-
[docs]    def platCapStruct(self, tableLen: int, table_content: bytes) -> str:
-        highestValidCap = struct.unpack('<B', table_content[4:5])[0]
-        reserved1_1 = struct.unpack('<B', table_content[5:6])[0]
-        reserved1_2 = struct.unpack('<B', table_content[6:7])[0]
-        reserved1_3 = struct.unpack('<B', table_content[7:8])[0]
-        capabilities = struct.unpack('<L', table_content[8:12])[0]
-        cap1 = capabilities & 1
-        cap2 = capabilities & 2
-        cap3 = capabilities & 4
-        capRes = capabilities & ~(7)
-        reserved2 = struct.unpack('<L', table_content[12:16])[0]
-        if cap1 == 1:
-            cap1_str = 'Platform ensures the entire CPU store data path is flushed to persistent memory on system power loss'
-        else:
-            cap1_str = 'Platform does not ensure the entire CPU store data path is flushed to persistent memory on system power loss'
-        if cap2 == 2:
-            cap2_str = 'Platform provides mehanisms to automatically flush outstanding write data from the memory controller to persistent memory in the event of power loss'
-        else:
-            if cap1 == 1:
-                cap2_str = 'Platform does not provides mehanisms to automatically flush outstanding write data from the memory controller to persistent memory in the event of power loss'
-            else:
-                cap2_str = 'This should be set to 1 - Platform does not support'
-        if cap3 == 4:
-            cap3_str = 'Platform supports mirroring multiple byte addressable persistent memory regions together'
-        else:
-            cap3_str = 'Platform does not support mirroring multiple byte addressable persistent memory regions together'
-        return f'''
-    Platform Capabilities Structure [Type 7]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      Highest Valid Capability                                    : 0x{highestValidCap:02X}
-      Reserved                                                    : 0x{reserved1_1:02X} 0x{reserved1_2:02X} 0x{reserved1_3:02X}
-      Capabilities                                                : 0x{capabilities:08X}
-        CPU Cache Flush to NVDIMM Durability on Power Loss        : 0x{cap1:08X} - {cap1_str}
-        Mem Controller Flush to NVDIMM Durability on Power Loss   : 0x{cap2:08X} - {cap2_str}
-        Byte Addressible Persistent Mem Hw Mirroring Capable      : 0x{cap3:08X} - {cap3_str}
-        Reserved                                                  : 0x{capRes:08X}
-      Reserved                                                    : 0x{reserved2:08X}
-'''

-
-
[docs]    def flushHintAddrStruct(self, tableLen: int, table_content: bytes) -> Tuple[int, str]:
-        nfitDevHandle = struct.unpack('<L', table_content[4:8])[0]
-        numFlushHintAddr = struct.unpack('<L', table_content[4:8])[0]
-        reserved = struct.unpack('<L', table_content[4:8])[0]
-        curLine = 0
-        lines = ''
-        while curLine < numFlushHintAddr:
-            lineInfo = struct.unpack('<Q', table_content[curLine * 8 + 8:curLine * 8 + 16])[0]
-            lines += f'''
-        Flush Hint Address {curLine + 1:d}                                     : 0x{lineInfo:016X} '''
-            curLine += 1
-        return (curLine - 1) * 8 + 16, f'''
-    Flush Hint Address Structure [Type 6]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      NFIT Device Handle                                          : 0x{nfitDevHandle:08X}
-      Number of Flush Hint Addresses in this Structure            : 0x{numFlushHintAddr:08X} ( {numFlushHintAddr:d} )
-      Reserved                                                    : 0x{reserved:08X}
-      Flush Hint Addresses{lines}
-'''

-
-
[docs]    def nvdimmBlockDataWindowsRegionStruct(self, tableLen: int, table_content: bytes) -> str:
-        nvdimmControlRegionStructureIndex = struct.unpack('<H', table_content[4:6])[0]
-        numBlockDataWindows = struct.unpack('<H', table_content[6:8])[0]
-        blockDataWindowsStartOffset = struct.unpack('<Q', table_content[8:16])[0]
-        szBlckDataWindow = struct.unpack('<Q', table_content[16:24])[0]
-        blckAccMemCap = struct.unpack('<Q', table_content[24:32])[0]
-        begAddr = struct.unpack('<Q', table_content[32:40])[0]
-        return f'''
-    NVDIMM Block Data Region Structure [Type 5]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      NVDIMM Control Region Structure Index                       : 0x{nvdimmControlRegionStructureIndex:04X} - Should not be 0
-      Number of Block Data Windows                                : 0x{numBlockDataWindows:04X} ( {numBlockDataWindows:d} )
-      Block Data Window Start Offest                              : 0x{blockDataWindowsStartOffset:016X} ( {blockDataWindowsStartOffset:d} bytes )
-      Size of Block Data Window                                   : 0x{szBlckDataWindow:016X} ( {szBlckDataWindow:d} bytes )
-      Block Accessible Memory Capacity                            : 0x{blckAccMemCap:016X} ( {blckAccMemCap:d} bytes )
-      Start Addr for 1st Block in Block Accessible Mem            : 0x{begAddr:016X} ( {begAddr:d} bytes )
-'''

-
-
[docs]    def nvdimmControlRegionStructMark(self, tableLen: int, table_content: bytes) -> str:
-        nvdimmControlRegionStructureIndex = struct.unpack('<H', table_content[4:6])[0]
-        vendorID = struct.unpack('<H', table_content[6:8])[0]
-        deviceID = struct.unpack('<H', table_content[8:10])[0]
-        revID = struct.unpack('<H', table_content[10:12])[0]
-        subsystemVendorID = struct.unpack('<H', table_content[12:14])[0]
-        subsysDevID = struct.unpack('<H', table_content[14:16])[0]
-        subsysRevID = struct.unpack('<H', table_content[16:18])[0]
-        validFields = struct.unpack('<B', table_content[18:19])[0]
-        manLocation = struct.unpack('<B', table_content[19:20])[0]
-        manDate = struct.unpack('<H', table_content[20:22])[0]
-        # need more parsing of the date
-        reserved = struct.unpack('<H', table_content[22:24])[0]
-        serialNum = struct.unpack('<L', table_content[24:28])[0]
-        regionFormatInterfaceCode = struct.unpack('<H', table_content[28:30])[0]
-        rfic1 = struct.unpack('<B', table_content[28:29])[0]
-        rfic2 = struct.unpack('<B', table_content[29:30])[0]
-        rfic_r1 = rfic1 & 224
-        rfic_fif = rfic1 & 31
-        rfic_r2 = rfic2 & 224
-        rfic_fcf = rfic2 & 31
-        numBlockControlWindows = struct.unpack('<H', table_content[30:32])[0]
-        cont_str = 'ERROR - Table is shorter than expected.'
-        if numBlockControlWindows != 0:
-            szBlckControlWindow = struct.unpack('<Q', table_content[32:40])[0]
-            commandRegOffset = struct.unpack('<Q', table_content[40:48])[0]
-            szCommandReg = struct.unpack('<Q', table_content[48:56])[0]
-            statusRegOffset = struct.unpack('<Q', table_content[56:64])[0]
-            szStatus = struct.unpack('<Q', table_content[64:72])[0]
-            nvdimmControlRegionFl = struct.unpack('<H', table_content[72:74])[0]
-            reserved2_1 = struct.unpack('<B', table_content[74:75])[0]
-            reserved2_2 = struct.unpack('<B', table_content[75:76])[0]
-            reserved2_3 = struct.unpack('<B', table_content[76:77])[0]
-            reserved2_4 = struct.unpack('<B', table_content[77:78])[0]
-            reserved2_5 = struct.unpack('<B', table_content[78:79])[0]
-            reserved2_6 = struct.unpack('<B', table_content[79:80])[0]
-            cont_str = f'''      Size of Block Control Windows                               : 0x{szBlckControlWindow:016X} ({szBlckControlWindow:d} bytes)
-      Command Reg Offset in Block Control Windows                 : 0x{commandRegOffset:016X}
-      Size of Command Register in Block Control Windows           : 0x{szCommandReg:016X}
-      Status Register Offset in Block Control Windows             : 0x{statusRegOffset:016X}
-      Size of Status Register in Block Control Windows            : 0x{szStatus:016X}
-      NVDIMM Control Region Flag                                  : 0x{nvdimmControlRegionFl:04X}
-      Reserved                                                    : 0x{reserved2_1:02X} 0x{reserved2_2:02X} 0x{reserved2_3:02X} 0x{reserved2_4:02X} 0x{reserved2_5:02X} 0x{reserved2_6:02X}
-      {cont_str}'''
-        valid_0 = validFields & 1
-        valid_str = ''
-        valid_man_str = ''
-        if valid_0 == 0:
-            valid_str = 'System is compliant with ACPI 6.0 - Manufacturing Location & Date fields are invalid and should be ignored'
-            valid_man_str = 'Value is invalid and should be ignored'
-        return f'''
-    NVDIMM Control Region Structure [Type 4]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      NVDIMM Control Region Structure Index                       : 0x{nvdimmControlRegionStructureIndex:04X}
-      Vendor ID                                                   : 0x{vendorID:04X}
-      Device ID                                                   : 0x{deviceID:04X}
-      Revision ID                                                 : 0x{revID:04X}
-      Subsystem Vendor ID                                         : 0x{subsystemVendorID:04X}
-      Subsystem Device ID                                         : 0x{subsysDevID:04X}
-      Subsystem Revision ID                                       : 0x{subsysRevID:04X}
-      Valid Fields                                                : 0x{validFields:02X}
-        Bit[0]                                                    : {valid_0}{valid_str}
-      Manufacturing Location                                      : 0x{manLocation:02X}{valid_man_str}
-      Manufacturing Date                                          : 0x{manDate:04X}{valid_man_str}
-      Reserved                                                    : 0x{reserved:04X}
-      Serial Number                                               : 0x{serialNum:08X}
-      Region Format Interface Code                                : 0x{regionFormatInterfaceCode:04X}
-        Reserved                                                  : 0x{rfic_r1:02X}
-        Function Interface Field                                  : 0x{rfic_fif:02X}
-        Reserved                                                  : 0x{rfic_r2:02X}
-        Function Class Field                                      : 0x{rfic_fcf:02X}
-      Number of Block Control Windows                             : 0x{numBlockControlWindows:08X}
-'''

-
-
[docs]    def smbiosManagementInfo(self, tableLen: int, table_content: bytes) -> str:
-        smbios_tables = ['BIOS Information', 'System Information', 'Baseboard (or Module) Information', 'System Enclosure or Chassis', 'Processor Information', 'Memory Controller Information, obsolete', 'Memory Module Information, obsolete', 'Cache Information', 'Port Connector Information', 'System Slots', 'On Board Devices Information, obsolete', 'OEM Strings', 'System Confirguration Options', 'BIOS Language Information', 'Group Associations', 'System Event Log', 'Physical Memory Array', 'Memory Device', '32-Bit Memory Error Information', 'Memory Array Mapped Address', 'Memory Device Mapped Address',
-                         'Built-in Pointing Device', 'Portable Battery', 'System Reset', 'Hardware Security', 'System Power Controls', 'Voltage Probe', 'Cooling Device', 'Temperature Probe', 'Electrical Current Probe', 'Out-of-Band Remote Address', 'Boot Integrity Services (BIS) Entry Point', 'System Boot Information', '64-Bit Mmemory Error Information', 'Management Device', 'Management Device Component', 'Management Device Threshold Data', 'Memory Channel', 'IPMI Device Information', 'System Power Supply', 'Additional Information', 'Onboard Devices Extended Information', 'Mangement Controller Host Interface']
-        reserved = struct.unpack('<L', table_content[4:8])[0]
-        curPos = 8
-        dataStr = ''
-        return f'''
-    SMBIOS Management Information Structure [Type 3]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      Reserved                                                    : 0x{reserved:08X}
-      ----Unable to further at this time.----
-'''  # TODO

-
-
[docs]    def interleave(self, tableLen: int, table_content: bytes) -> Tuple[int, str]:
-        interleaveStructureIndex = struct.unpack('<H', table_content[4:6])[0]
-        reserved = struct.unpack('<H', table_content[6:8])[0]
-        numLinesDescribed = struct.unpack('<L', table_content[8:12])[0]
-        lineSz = struct.unpack('<L', table_content[12:16])[0]
-        curLine = 0
-        lines = ''
-        while curLine < numLinesDescribed:
-            lineInfo = struct.unpack('<L', table_content[curLine * 4 + 16:curLine * 4 + 20])[0]
-            lines += f'''
-        Line {curLine + 1:d} Offset                                            : 0x{lineInfo:08X} ( {lineInfo:d} bytes )'''
-            curLine += 1
-        return (curLine - 1) * 4 + 20, f'''
-    Interleave Structure [Type 2]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      Reserved                                                    : 0x{reserved:04X}
-      Number of Lines Described                                   : 0x{numLinesDescribed:08X} ( {numLinesDescribed:d} )
-      Line Size                                                   : 0x{lineSz:08X} ( {lineSz:d} bytes )
-      Lines {lines}
-'''

-
-
[docs]    def parseMAP(self, tableLen: int, table_content: bytes) -> str:
-        nfitDeviceHandle = struct.unpack('<L', table_content[4:8])[0]
-        nvdimmPhysID = struct.unpack('<H', table_content[8:10])[0]
-        nvdimmRegionID = struct.unpack('<H', table_content[10:12])[0]
-        spaRangeStructureIndex = struct.unpack('<H', table_content[12:14])[0]
-        nvdimmControlRegionSz = struct.unpack('<H', table_content[14:16])[0]
-        nvdimmRegionSz = struct.unpack('<Q', table_content[16:24])[0]
-        regionOffset = struct.unpack('<Q', table_content[24:32])[0]
-        nvdimmPhysicalAddressRegionBase = struct.unpack('<Q', table_content[32:40])[0]
-        interleaveStructIndex = struct.unpack('<H', table_content[40:42])[0]
-        interleaveWays = struct.unpack('<H', table_content[42:44])[0]
-        nvdimmStateFlags = struct.unpack('<H', table_content[44:46])[0]
-        reserve = struct.unpack('<H', table_content[46:48])[0]
-        return f'''
-    NVDIMM Region Mapping Structure [Type 1]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      NFIT Device Handle                                          : 0x{nfitDeviceHandle:08X}
-      NVDIMM Physical ID                                          : 0x{nvdimmPhysID:04X}
-      NVDIMM Region ID                                            : 0x{nvdimmRegionID:04X}
-      SPA Range Structure Index                                   : 0x{spaRangeStructureIndex:04X}
-      NVDIMM Control Region Structure Index                       : 0x{nvdimmControlRegionSz:016X}
-      NVDIMM Region Size                                          : 0x{nvdimmRegionSz:016X}
-      Region Offset                                               : 0x{regionOffset:016X}
-      NVDIMM Physical Address Region Base                         : 0x{nvdimmPhysicalAddressRegionBase:016X}
-      Interleave Structure Index                                  : 0x{interleaveStructIndex:04X}
-      Interleave Ways                                             : 0x{interleaveWays:04X}
-      NVDIMM State Flags                                          : 0x{nvdimmStateFlags:04X}
-      Reserved                                                    : 0x{reserve:04X}
-'''

-
-
[docs]    def parseSPA(self, tableLen: int, table_content: bytes) -> str:
-        volitileMemGUID = [0x7305944f, 0xfdda, 0x44e3, 0xb1, 0x6c, 0x3f, 0x22, 0xd2, 0x52, 0xe5, 0xd0]
-        byteAddrPMGUID = [0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33, 0x18, 0xb7, 0x8c, 0xdb]
-        nvdimmControlRegionGUID = [0x92f701f6, 0x13b4, 0x405d, 0x91, 0x0b, 0x29, 0x93, 0x67, 0xe8, 0x23, 0x4c]
-        nvdimmBlckDataWindowRegionGUID = [0x91af0530, 0x5d86, 0x470e, 0xa6, 0xb0, 0x0a, 0x2d, 0xb9, 0x40, 0x82, 0x49]
-        ramDiskVirtualDiskVolGUID = [0x77ab535a, 0x45fc, 0x624b, 0x55, 0x60, 0xf7, 0xb2, 0x81, 0xd1, 0xf9, 0x6e]
-        ramDiskVirtualCDVolGUID = [0x3d5abd30, 0x4175, 0x87ce, 0x6d, 0x64, 0xd2, 0xad, 0xe5, 0x23, 0xc4, 0xbb]
-        ramDiskVirtualDiskPersisGUID = [0x5cea02c9, 0x4d07, 0x69d3, 0x26, 0x9f, 0x44, 0x96, 0xfb, 0xe0, 0x96, 0xf9]
-        ramDiskVirtualCDPersisGUID = [0x08018188, 0x42cd, 0xbb48, 0x10, 0x0f, 0x53, 0x87, 0xd5, 0x3d, 0xed, 0x3d]
-        spaRangeStructure = struct.unpack('<H', table_content[4:6])[0]
-        flags = struct.unpack('<H', table_content[6:8])[0]
-        flag1 = flags & 1
-        flag2 = flags & 2
-        flag3 = flags >> 2
-        reserved = struct.unpack('<L', table_content[8:12])[0]
-        proximityDomain = struct.unpack('<L', table_content[12:16])[0]
-        addressRangeTypeGUID_1 = struct.unpack('<L', table_content[16:20])[0]
-        addressRangeTypeGUID_2 = struct.unpack('<H', table_content[20:22])[0]
-        addressRangeTypeGUID_3 = struct.unpack('<H', table_content[22:24])[0]
-        addressRangeTypeGUID_4 = struct.unpack('<B', table_content[24:25])[0]
-        addressRangeTypeGUID_5 = struct.unpack('<B', table_content[25:26])[0]
-        addressRangeTypeGUID_6 = struct.unpack('<B', table_content[26:27])[0]
-        addressRangeTypeGUID_7 = struct.unpack('<B', table_content[27:28])[0]
-        addressRangeTypeGUID_8 = struct.unpack('<B', table_content[28:29])[0]
-        addressRangeTypeGUID_9 = struct.unpack('<B', table_content[29:30])[0]
-        addressRangeTypeGUID_10 = struct.unpack('<B', table_content[30:31])[0]
-        addressRangeTypeGUID_11 = struct.unpack('<B', table_content[31:32])[0]
-        systemPARangeBase = struct.unpack('<Q', table_content[32:40])[0]
-        SPARLen = struct.unpack('<Q', table_content[40:48])[0]
-        addrRangeMemMapAttr = struct.unpack('<Q', table_content[48:56])[0]
-        spaRangeStructure_str = ''
-        if spaRangeStructure == 0:
-            spaRangeStructure_str = ' - Value of 0 is reserved and shall not be used as an index'
-        if flag1 == 1:
-            flag1_str = ' - Control region only for hot add/online operation'
-        else:
-            flag1_str = ' - Control region not only for hot add/online operation'
-        if flag2 != 1:
-            flag2_str = ' - Data in proximity region is not valid'
-        else:
-            if (addrRangeMemMapAttr & 1) == 1:
-                flag2_str = 'EFI_MEMORY_UC'
-            elif (addrRangeMemMapAttr & 2) == 2:
-                flag2_str = 'EFI_MEMORY_WC'
-            elif (addrRangeMemMapAttr & 4) == 4:
-                flag2_str = 'EFI_MEMORY_WT'
-            elif (addrRangeMemMapAttr & 8) == 8:
-                flag2_str = 'EFI_MEMORY_WB'
-            elif (addrRangeMemMapAttr & 16) == 16:
-                flag2_str = 'EFI_MEMORY_UCE'
-            elif (addrRangeMemMapAttr & 4096) == 4096:
-                flag2_str = 'EFI_MEMORY_WP'
-            elif (addrRangeMemMapAttr & 8192) == 8192:
-                flag2_str = 'EFI_MEMORY_RP'
-            elif (addrRangeMemMapAttr & 16384) == 16384:
-                flag2_str = 'EFI_MEMORY_XP'
-            elif (addrRangeMemMapAttr & 32768) == 32768:
-                flag2_str = 'EFI_MEMORY_NV'
-            elif (addrRangeMemMapAttr & 65536) == 65536:
-                flag2_str = 'EFI_MEMORY_MORE_RELIABLE'
-            else:
-                flag2_str = 'undefined'
-        addressRangeTypeGUID = [addressRangeTypeGUID_1, addressRangeTypeGUID_2, addressRangeTypeGUID_3, addressRangeTypeGUID_4, addressRangeTypeGUID_5,
-                                addressRangeTypeGUID_6, addressRangeTypeGUID_7, addressRangeTypeGUID_8, addressRangeTypeGUID_9, addressRangeTypeGUID_10, addressRangeTypeGUID_11]
-        if addressRangeTypeGUID == volitileMemGUID:
-            artg_str = 'Volitile Memory Region'
-        elif addressRangeTypeGUID == byteAddrPMGUID:
-            artg_str = 'Byte Addressable Persistent Memory (PM) Region'
-        elif addressRangeTypeGUID == nvdimmControlRegionGUID:
-            artg_str = 'NVDIMM Control Region'
-        elif addressRangeTypeGUID == nvdimmBlckDataWindowRegionGUID:
-            artg_str = 'NVDIMM Block Data Window Region'
-        elif addressRangeTypeGUID == ramDiskVirtualDiskVolGUID:
-            artg_str = 'RAM Disk supporting a Virtual Disk Region - Volitile (volitile memory region containing raw disk format)'
-        elif addressRangeTypeGUID == ramDiskVirtualCDVolGUID:
-            artg_str = 'RAM Disk supporting a Virtual CD Region - Volitile (volitile memory region containing an ISO image)'
-        elif addressRangeTypeGUID == ramDiskVirtualDiskPersisGUID:
-            artg_str = 'RAM Disk supporting Virtual Disk Region - Persistent (persistent memroy region containing raw disk format)'
-        elif addressRangeTypeGUID == ramDiskVirtualCDPersisGUID:
-            artg_str = 'RAM Disk supporting a Virtual CD Region - Persistent (persistent memory region containing an ISO image)'
-        else:
-            artg_str = 'Not in specification, could be a vendor defined GUID'
-        return f'''
-    System Physical Address (SPA) Range Structure [Type 1]
-      Length                                                      : 0x{tableLen:04X} ( {tableLen:d} bytes )
-      SPA Range Structure Index                                   : 0x{spaRangeStructure:04X}{spaRangeStructure_str}
-      Flags                                                       : 0x{flags:04X}
-        Bit[0] (Add/Online Operation Only)                        : 0x{flag1:04X}{flag1_str}
-        Bit[1] (Proximity Domain Validity)                        : 0x{flag2:04X}{flag2_str}
-        Bits[15:2]                                                : 0x{flag3:04X} - Reserved
-      Reserved                                                    : 0x{reserved:08X}
-      Proximity Domain                                            : 0x{proximityDomain:08X} - must match value in SRAT table
-      Address Range Type GUID                                     : 0x{addressRangeTypeGUID_1:08X} 0x{addressRangeTypeGUID_2:04X} 0x{addressRangeTypeGUID_3:04X} 0x{addressRangeTypeGUID_4:02X} 0x{addressRangeTypeGUID_5:02X} 0x{addressRangeTypeGUID_6:02X} 0x{addressRangeTypeGUID_7:02X} 0x{addressRangeTypeGUID_8:02X} 0x{addressRangeTypeGUID_9:02X} 0x{addressRangeTypeGUID_10:02X} 0x{addressRangeTypeGUID_11:02X} - {artg_str}
-      System Physical Address Range Base                          : 0x{systemPARangeBase:016X}
-      System Physical Address Range Length                        : 0x{SPARLen:016X} ({SPARLen:d} bytes)
-      Address Range Memory Mapping Attribute                      : 0x{addrRangeMemMapAttr:016X}
-'''

-
-
[docs]    def parseStructures(self, table_content: bytes) -> str:
-        notFinished = True
-        curPos = 0
-        result = ''
-        while notFinished:
-            tableType = struct.unpack('<H', table_content[curPos:curPos + 2])[0]
-            tableLen = struct.unpack('<H', table_content[curPos + 2:curPos + 4])[0]
-            result += f''' Length:                    {self.total_length:d}'''
-            if tableType == 0:
-                result += self.parseSPA(tableLen, table_content[curPos:])
-                curPos = curPos + tableLen
-            elif tableType == 1:
-                result += self.parseMAP(tableLen, table_content[curPos:])
-                curPos = curPos + tableLen
-            elif tableType == 2:
-                sz, result_str = self.interleave(tableLen, table_content[curPos:])
-                result += result_str
-                curPos = curPos + tableLen
-            elif tableType == 3:
-                result += self.smbiosManagementInfo(tableLen, table_content[curPos:])
-                curPos = curPos + tableLen
-            elif tableType == 4:
-                result += self.nvdimmControlRegionStructMark(tableLen, table_content[curPos:])
-                curPos += tableLen
-            elif tableType == 5:
-                result += self.nvdimmBlockDataWindowsRegionStruct(tableLen, table_content[curPos:])
-                curPos = curPos + tableLen
-            elif tableType == 6:
-                sz, result_str = self.flushHintAddrStruct(tableLen, table_content[curPos:])
-                result += result_str
-                curPos = curPos + tableLen
-            elif tableType == 7:
-                result += self.platCapStruct(tableLen, table_content[curPos:])
-                curPos = curPos + tableLen
-            else:
-                pass
-            if curPos >= self.total_length:
-                notFinished = False
-        return result

-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        reserved = struct.unpack('<L', table_content[0:4])[0]
-        NFITstructures = self.parseStructures(table_content[4:])
-        self.results = f'''==================================================================
-  NVDIMM Firmware Interface Table ( NFIT )
-==================================================================
-  Reserved                                                      : {reserved:08X}
-  NFIT Structures{NFITstructures}
-
-'''

-
-    def __str__(self) -> str:
-        return self.results

-
-
-########################################################################################################
-#
-# UEFI Table
-#
-########################################################################################################
-SMM_COMM_TABLE = str(UUID('c68ed8e29dc64cbd9d94db65acc5c332')).upper()
-
-
-
[docs]class UEFI_TABLE (ACPI_TABLE):
-    def __init__(self):
-        self.buf_addr = 0
-        self.smi = 0
-        self.invoc_reg = None
-        return
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        self.results = '''==================================================================
-  Table Content
-=================================================================='''
-        # Ensure can get identifier and dataOffset fields
-        if len(table_content) < 18:
-            return
-        # Get Guid and Data Offset
-        guid = struct.unpack(EFI_GUID_FMT, table_content[:16])[0]
-        identifier = EFI_GUID_STR(guid)
-        offset = struct.unpack('H', table_content[16:18])[0]
-        self.results += f"""
-  identifier                 : {identifier}
-  Data Offset                : {offset:d}"""
-        # check if SMM Communication ACPI Table
-        if not (SMM_COMM_TABLE == identifier):
-            return
-        content_offset = offset - 36
-        # check to see if there is enough data to get SW SMI Number and Buffer Ptr Address
-        if content_offset < 0 or content_offset + 12 > len(table_content):
-            return
-        self.smi = struct.unpack('I', table_content[content_offset:content_offset + 4])[0]
-        content_offset += 4
-        self.buf_addr = struct.unpack('Q', table_content[content_offset:content_offset + 8])[0]
-        content_offset += 8
-        self.results += f"""
-  SW SMI NUM                 : {self.smi}
-  Buffer Ptr Address         : {self.buf_addr:X}"""
-        # Check to see if there is enough data for Invocation Register
-        if content_offset + 12 <= len(table_content):
-            self.invoc_reg = GAS(table_content[content_offset:content_offset + 12])
-            self.results += f"\n  Invocation Register        :\n{str(self.invoc_reg)}"
-        else:
-            self.results += "\n  Invocation Register        : None\n"

-
-    def __str__(self) -> str:
-        return self.results
-
-    CommBuffInfo = Tuple[int, int, Optional['GAS']]
-
-
[docs]    def get_commbuf_info(self) -> CommBuffInfo:
-        return (self.smi, self.buf_addr, self.invoc_reg)

-
-########################################################################################################
-#
-# WSMT Table
-#
-########################################################################################################
-
-
-
[docs]class WSMT (ACPI_TABLE):
-
-    FIXED_COMM_BUFFERS = 1
-    COMM_BUFFER_NESTED_PTR_PROTECTION = 2
-    SYSTEM_RESOURCE_PROTECTION = 4
-
-    def __init__(self):
-        self.fixed_comm_buffers = False
-        self.comm_buffer_nested_ptr_protection = False
-        self.system_resource_protection = False
-
-
[docs]    def parse(self, table_content: bytes) -> None:
-        if len(table_content) < 4:
-            return
-
-        mitigations = struct.unpack("<L", table_content)[0]
-
-        self.fixed_comm_buffers = bool(mitigations & WSMT.FIXED_COMM_BUFFERS)
-        self.comm_buffer_nested_ptr_protection = bool(mitigations & WSMT.COMM_BUFFER_NESTED_PTR_PROTECTION)
-        self.system_resource_protection = bool(mitigations & WSMT.SYSTEM_RESOURCE_PROTECTION)

-
-    def __str__(self) -> str:
-        return f"""------------------------------------------------------------------
-Windows SMM Mitigations Table (WSMT) Contents
-------------------------------------------------------------------
-FIXED_COMM_BUFFERS                  : {self.fixed_comm_buffers}
-COMM_BUFFER_NESTED_PTR_PROTECTION   : {self.comm_buffer_nested_ptr_protection}
-SYSTEM_RESOURCE_PROTECTION          : {self.system_resource_protection}
-    """

-
-
-
-########################################################################################################
-#
-# Generic Address Structure
-#
-########################################################################################################
-
-
-
[docs]class GAS:
-    def __init__(self, table_content: bytes):
-        self.addrSpaceID = struct.unpack('<B', table_content[0:1])[0]
-        self.regBitWidth = struct.unpack('<B', table_content[1:2])[0]
-        self.regBitOffset = struct.unpack('<B', table_content[2:3])[0]
-        self.accessSize = struct.unpack('<B', table_content[3:4])[0]
-        self.addr = struct.unpack('<Q', table_content[4:12])[0]
-        if self.addrSpaceID == 0:
-            self.addrSpaceID_str = 'System Memory Space'
-        elif self.addrSpaceID == 1:
-            self.addrSpaceID_str = 'System I/O Space'
-        elif self.addrSpaceID == 2:
-            self.addrSpaceID_str = 'PCI Configuration Space'
-        elif self.addrSpaceID == 3:
-            self.addrSpaceID_str = 'Embedded Controller'
-        elif self.addrSpaceID == 4:
-            self.addrSpaceID_str = 'SMBus'
-        elif self.addrSpaceID == 0x0A:
-            self.addrSpaceID_str = 'Platform Communications Channel (PCC)'
-        elif self.addrSpaceID == 0x7F:
-            self.addrSpaceID_str = 'Functional Fixed Hardware'
-        elif self.addrSpaceID >= 0xC0 and self.addrSpaceID <= 0xFF:
-            self.addrSpaceID_str = 'OEM Defined'
-        else:
-            self.addrSpaceID_str = 'Reserved'
-        accessSizeList = ['Undefined (legacy reasons)', 'Byte Access', 'Word Access', 'Dword Access', 'QWord Access', 'Not a defined value, check if defined by Address Space ID']
-        if self.accessSize < 6:
-            self.accessSize_str = accessSizeList[self.accessSize]
-        else:
-            self.accessSize_str = accessSizeList[5]
-
-    def __str__(self) -> str:
-        return f"""  Generic Address Structure
-    Address Space ID                            : {self.addrSpaceID:02X} - {self.accessSize_str}
-    Register Bit Width                          : {self.regBitWidth:02X}
-    Register Bit Offset                         : {self.regBitOffset:02X}
-    Access Size                                 : {self.accessSize:02X} - {self.accessSize_str}
-    Address                                     : {self.addr:16X}
-    """
-
-
[docs]    def get_info(self) -> Tuple[int, int, int, int, int]:
-        return (self.addrSpaceID, self.regBitWidth, self.regBitOffset, self.accessSize, self.addr)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/cmos.html b/_modules/chipsec/hal/cmos.html deleted file mode 100644 index 0d47ab54..00000000 --- a/_modules/chipsec/hal/cmos.html +++ /dev/null @@ -1,215 +0,0 @@ - - - - - - - - chipsec.hal.cmos — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.cmos

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-CMOS memory specific functions (dump, read/write)
-
-usage:
-    >>> cmos.dump_low()
-    >>> cmos.dump_high()
-    >>> cmos.dump()
-    >>> cmos.read_cmos_low( offset )
-    >>> cmos.write_cmos_low( offset, value )
-    >>> cmos.read_cmos_high( offset )
-    >>> cmos.write_cmos_high( offset, value )
-"""
-from typing import List
-from chipsec.hal import hal_base
-import chipsec.logger
-
-CMOS_ADDR_PORT_LOW = 0x70
-CMOS_DATA_PORT_LOW = 0x71
-CMOS_ADDR_PORT_HIGH = 0x72
-CMOS_DATA_PORT_HIGH = 0x73
-
-
-
[docs]class CMOS(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(CMOS, self).__init__(cs)
-
-
[docs]    def read_cmos_high(self, offset: int) -> int:
-        self.cs.io.write_port_byte(CMOS_ADDR_PORT_HIGH, offset)
-        return self.cs.io.read_port_byte(CMOS_DATA_PORT_HIGH)

-
-
[docs]    def write_cmos_high(self, offset: int, value: int) -> None:
-        self.cs.io.write_port_byte(CMOS_ADDR_PORT_HIGH, offset)
-        self.cs.io.write_port_byte(CMOS_DATA_PORT_HIGH, value)

-
-
[docs]    def read_cmos_low(self, offset: int) -> int:
-        self.cs.io.write_port_byte(CMOS_ADDR_PORT_LOW, 0x80 | offset)
-        return self.cs.io.read_port_byte(CMOS_DATA_PORT_LOW)

-
-
[docs]    def write_cmos_low(self, offset: int, value: int) -> None:
-        self.cs.io.write_port_byte(CMOS_ADDR_PORT_LOW, offset)
-        self.cs.io.write_port_byte(CMOS_DATA_PORT_LOW, value)

-
-
[docs]    def dump_low(self) -> List[int]:
-        cmos_buf = [0xFF] * 0x80
-        orig = self.cs.io.read_port_byte(CMOS_ADDR_PORT_LOW)
-        for off in range(0x80):
-            cmos_buf[off] = self.read_cmos_low(off)
-        self.cs.io.write_port_byte(CMOS_ADDR_PORT_LOW, orig)
-        return cmos_buf

-
-
[docs]    def dump_high(self) -> List[int]:
-        cmos_buf = [0xFF] * 0x80
-        orig = self.cs.io.read_port_byte(CMOS_ADDR_PORT_HIGH)
-        for off in range(0x80):
-            cmos_buf[off] = self.read_cmos_high(off)
-        self.cs.io.write_port_byte(CMOS_ADDR_PORT_HIGH, orig)
-        return cmos_buf

-
-
[docs]    def dump(self) -> None:
-        self.logger.log("Low CMOS memory contents:")
-        chipsec.logger.pretty_print_hex_buffer(self.dump_low())
-        self.logger.log("\nHigh CMOS memory contents:")
-        chipsec.logger.pretty_print_hex_buffer(self.dump_high())

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/cpu.html b/_modules/chipsec/hal/cpu.html deleted file mode 100644 index 1f8ba076..00000000 --- a/_modules/chipsec/hal/cpu.html +++ /dev/null @@ -1,364 +0,0 @@ - - - - - - - - chipsec.hal.cpu — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.cpu

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-CPU related functionality
-
-"""
-from typing import Dict, List, Tuple, Optional
-from chipsec.hal import acpi, hal_base, paging
-from chipsec.logger import logger
-
-VMM_NONE = 0
-VMM_XEN = 0x1
-VMM_HYPER_V = 0x2
-VMM_VMWARE = 0x3
-VMM_KVM = 0x4
-
-
-########################################################################################################
-#
-# CORES HAL Component
-#
-########################################################################################################
-
-
[docs]class CPU(hal_base.HALBase):
-    def __init__(self, cs):
-        super(CPU, self).__init__(cs)
-        self.helper = cs.helper
-
-
[docs]    def read_cr(self, cpu_thread_id: int, cr_number: int) -> int:
-        value = self.helper.read_cr(cpu_thread_id, cr_number)
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] read CR{cr_number:d}: value = 0x{value:08X}')
-        return value

-
-
[docs]    def write_cr(self, cpu_thread_id: int, cr_number: int, value: int) -> int:
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] write CR{cr_number:d}: value = 0x{value:08X}')
-        status = self.helper.write_cr(cpu_thread_id, cr_number, value)
-        return status

-
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        logger().log_hal(f'[cpu] CPUID in : EAX=0x{eax:08X}, ECX=0x{ecx:08X}')
-        (eax, ebx, ecx, edx) = self.helper.cpuid(eax, ecx)
-        logger().log_hal(f'[cpu] CPUID out: EAX=0x{eax:08X}, EBX=0x{ebx:08X}, ECX=0x{ecx:08X}, EDX=0x{edx:08X}')
-        return (eax, ebx, ecx, edx)

-
-    # Using cpuid check if running under vmm control
-
[docs]    def check_vmm(self) -> int:
-        # check Hypervisor Present
-        (_, ebx, ecx, edx) = self.cpuid(0x01, 0)
-        if (ecx & 0x80000000):
-            (_, ebx, ecx, edx) = self.cpuid(0x40000000, 0)
-            is_xen = ((ebx == 0x566e6558) and (ecx == 0x65584d4d) and (edx == 0x4d4d566e))
-            if is_xen:
-                return VMM_XEN
-            is_hyperv = ((ebx == 0x7263694D) and (ecx == 0x666F736F) and (edx == 0x76482074))
-            if is_hyperv:
-                return VMM_HYPER_V
-            is_vmware = ((ebx == 0x61774d56) and (ecx == 0x4d566572) and (edx == 0x65726177))
-            if is_vmware:
-                return VMM_VMWARE
-            is_kvm = ((ebx == 0x4b4d564b) and (ecx == 0x564b4d56) and (edx == 0x0000004d))
-            if is_kvm:
-                return VMM_KVM
-        return VMM_NONE

-
-    # Using CPUID we can determine if Hyper-Threading is enabled in the CPU
-
[docs]    def is_HT_active(self) -> bool:
-        logical_processor_per_core = self.get_number_logical_processor_per_core()
-        return logical_processor_per_core > 1

-
-    # Using the CPUID we determine the number of logical processors per core
-
[docs]    def get_number_logical_processor_per_core(self) -> int:
-        (_, ebx, _, _) = self.cpuid(0x0b, 0x0)
-        return ebx

-
-    # Using CPUID we can determine the number of logical processors per package
-
[docs]    def get_number_logical_processor_per_package(self) -> int:
-        (_, ebx, _, _) = self.cpuid(0x0b, 0x1)
-        return ebx

-
-    # Using CPUID we can determine the number of physical processors per package
-
[docs]    def get_number_physical_processor_per_package(self) -> int:
-        logical_processor_per_core = self.get_number_logical_processor_per_core()
-        logical_processor_per_package = self.get_number_logical_processor_per_package()
-        return (logical_processor_per_package // logical_processor_per_core)

-
-    # determine number of logical processors in the core
-
[docs]    def get_number_threads_from_APIC_table(self) -> int:
-        _acpi = acpi.ACPI(self.cs)
-        dACPIID = {}
-        for apic in _acpi.get_parse_ACPI_table(acpi.ACPI_TABLE_SIG_APIC):  # (table_header, APIC_object, table_header_blob, table_blob)
-            _, APIC_object, _, _ = apic
-            for structure in APIC_object.apic_structs:
-                if 0x00 == structure.Type:
-                    if not structure.ACICID in dACPIID:
-                        if 1 == structure.Flags:
-                            dACPIID[structure.APICID] = structure.ACPIProcID
-        return len(dACPIID)

-
-    # determine the cpu threads location within a package/core
-
[docs]    def get_cpu_topology(self) -> Dict[str, Dict[int, List[int]]]:
-        num_threads = self.cs.helper.get_threads_count()
-        packages: Dict[int, List[int]] = {}
-        cores: Dict[int, List[int]] = {}
-        for thread in range(num_threads):
-            if num_threads > 1:
-                self.logger.log_hal(f'Setting affinity to: {thread:d}')
-                self.cs.helper.set_affinity(thread)
-            eax = 0xb   # cpuid leaf 0B contains x2apic info
-            ecx = 1     # ecx 1 will get us pkg_id in edx after shifting right by _eax
-            (_eax, _, _, _edx) = self.cs.cpu.cpuid(eax, ecx)
-            pkg_id = _edx >> (_eax & 0xf)
-            if pkg_id not in packages:
-                packages[pkg_id] = []
-            packages[pkg_id].append(thread)
-
-            ecx = 0     # ecx 0 will get us the core_id in edx after shifting right by _eax
-            (_eax, _, _, _edx) = self.cs.cpu.cpuid(eax, ecx)
-            core_id = _edx >> (_eax & 0xf)
-            if core_id not in cores:
-                cores[core_id] = []
-            cores[core_id].append(thread)
-            self.logger.log_hal(f'pkg id is {pkg_id:x}')
-            self.logger.log_hal(f'core id is {core_id:x}')
-        topology = {'packages': packages, 'cores': cores}
-        return topology

-
-    # determine number of physical sockets using the CPUID and APIC ACPI table
-
[docs]    def get_number_sockets_from_APIC_table(self) -> int:
-        number_threads = self.get_number_threads_from_APIC_table()
-        logical_processor_per_package = self.get_number_logical_processor_per_package()
-        return (number_threads // logical_processor_per_package)

-
-    #
-    # Return SMRR MSR physical base and mask
-    #
-
[docs]    def get_SMRR(self) -> Tuple[int, int]:
-        smrambase = self.cs.read_register_field('IA32_SMRR_PHYSBASE', 'PhysBase', True)
-        smrrmask = self.cs.read_register_field('IA32_SMRR_PHYSMASK', 'PhysMask', True)
-        return (smrambase, smrrmask)

-
-    #
-    # Return SMRAM region base, limit and size as defined by SMRR
-    #
-
[docs]    def get_SMRR_SMRAM(self) -> Tuple[int, int, int]:
-        (smram_base, smrrmask) = self.get_SMRR()
-        smram_base &= smrrmask
-        smram_size = ((~smrrmask) & 0xFFFFFFFF) + 1
-        smram_limit = smram_base + smram_size - 1
-        return (smram_base, smram_limit, smram_size)

-
-    #
-    # Returns TSEG base, limit and size
-    #
-
[docs]    def get_TSEG(self) -> Tuple[int, int, int]:
-        if self.cs.is_server():
-            # tseg register has base and limit
-            tseg_base = self.cs.read_register_field('TSEG_BASE', 'base', preserve_field_position=True)
-            tseg_limit = self.cs.read_register_field('TSEG_LIMIT', 'limit', preserve_field_position=True)
-            tseg_limit += 0xFFFFF
-        else:
-            # TSEG base is in TSEGMB, TSEG limit is BGSM - 1
-            tseg_base = self.cs.read_register_field('PCI0.0.0_TSEGMB', 'TSEGMB', preserve_field_position=True)
-            bgsm = self.cs.read_register_field('PCI0.0.0_BGSM', 'BGSM', preserve_field_position=True)
-            tseg_limit = bgsm - 1
-
-        tseg_size = tseg_limit - tseg_base + 1
-        return (tseg_base, tseg_limit, tseg_size)

-
-    #
-    # Returns SMRAM base from either SMRR MSR or TSEG PCIe config register
-    #
-
[docs]    def get_SMRAM(self) -> Tuple[int, int, int]:
-        smram_base = None
-        smram_limit = None
-        smram_size = 0
-        try:
-            if self.check_SMRR_supported():
-                (smram_base, smram_limit, smram_size) = self.get_SMRR_SMRAM()
-        except Exception:
-            self.logger.log_hal('[cpu] Error using get_SMRR_SMRAM() to get SMRAM!')
-
-        if (smram_base is None) or (smram_limit is None):
-            try:
-                (smram_base, smram_limit, smram_size) = self.get_TSEG()
-            except Exception:
-                self.logger.log_hal('[cpu] Error using get_TSEG() to get SMRAM!')
-                smram_base = 0
-                smram_limit = 0
-        return (smram_base, smram_limit, smram_size)

-
-    #
-    # Check that SMRR is supported by CPU in IA32_MTRRCAP_MSR[SMRR]
-    #
-
[docs]    def check_SMRR_supported(self) -> bool:
-        mtrrcap_msr_reg = self.cs.read_register('MTRRCAP')
-        if logger().HAL:
-            self.cs.print_register('MTRRCAP', mtrrcap_msr_reg)
-        smrr = self.cs.get_register_field('MTRRCAP', mtrrcap_msr_reg, 'SMRR')
-        return (1 == smrr)

-
-    #
-    # Dump CPU page tables at specified physical base of paging-directory hierarchy (CR3)
-    #
-
[docs]    def dump_page_tables(self, cr3: int, pt_fname: Optional[str] = None) -> None:
-        _orig_logname = logger().LOG_FILE_NAME
-        hpt = paging.c_ia32e_page_tables(self.cs)
-        logger().log_hal(f'[cpu] dumping paging hierarchy at physical base (CR3) = 0x{cr3:08X}...')
-        if pt_fname is None:
-            pt_fname = f'pt_{cr3:08X}'
-        logger().set_log_file(pt_fname)
-        hpt.read_pt_and_show_status(pt_fname, 'PT', cr3)
-        logger().set_log_file(_orig_logname)
-        if hpt.failure:
-            logger().log_error('could not dump page tables')

-
-
[docs]    def dump_page_tables_all(self) -> None:
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            cr3 = self.read_cr(tid, 3)
-            logger().log_hal(f'[cpu{tid:d}] found paging hierarchy base (CR3): 0x{cr3:08X}')
-            self.dump_page_tables(cr3)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/cpuid.html b/_modules/chipsec/hal/cpuid.html deleted file mode 100644 index d9d7a566..00000000 --- a/_modules/chipsec/hal/cpuid.html +++ /dev/null @@ -1,172 +0,0 @@ - - - - - - - - chipsec.hal.cpuid — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.cpuid

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-CPUID information
-
-usage:
-    >>> cpuid(0)
-"""
-
-from typing import Tuple
-from chipsec.hal import hal_base
-from chipsec.logger import logger
-
-
-
[docs]class CpuID(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(CpuID, self).__init__(cs)
-        self.helper = cs.helper
-
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        logger().log_hal(f'[cpuid] in: EAX=0x{eax:08X}, ECX=0x{ecx:08X}')
-        (eax, ebx, ecx, edx) = self.helper.cpuid(eax, ecx)
-        logger().log_hal(f'[cpuid] out: EAX=0x{eax:08X}, EBX=0x{ebx:08X}, ECX=0x{ecx:08X}, EDX=0x{edx:08X}')
-        return (eax, ebx, ecx, edx)

-
-
[docs]    def get_proc_info(self):
-        (eax, _, _, _) = self.cpuid(0x01, 0x00)
-        return eax

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/ec.html b/_modules/chipsec/hal/ec.html deleted file mode 100644 index c3d03ddb..00000000 --- a/_modules/chipsec/hal/ec.html +++ /dev/null @@ -1,306 +0,0 @@ - - - - - - - - chipsec.hal.ec — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.ec

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-Access to Embedded Controller (EC)
-
-Usage:
-
-    >>> write_command( command )
-    >>> write_data( data )
-    >>> read_data()
-    >>> read_memory( offset )
-    >>> write_memory( offset, data )
-    >>> read_memory_extended( word_offset )
-    >>> write_memory_extended( word_offset, data )
-    >>> read_range( start_offset, size )
-    >>> write_range( start_offset, buffer )
-
-"""
-from typing import List, Optional
-from chipsec.hal import hal_base
-from chipsec.logger import print_buffer_bytes
-
-#
-# Embedded Controller ACPI ports
-#
-IO_PORT_EC_DATA = 0x62
-IO_PORT_EC_COMMAND = 0x66
-IO_PORT_EC_STATUS = 0x66
-
-IO_PORT_EC_INDEX = 0x380
-IO_PORT_EC_INDEX_ADDRH = (IO_PORT_EC_INDEX + 0x1)
-IO_PORT_EC_INDEX_ADDRL = (IO_PORT_EC_INDEX + 0x2)
-IO_PORT_EC_INDEX_DATA = (IO_PORT_EC_INDEX + 0x3)
-
-
-EC_STS_OBF = 0x01  # EC Output buffer full
-EC_STS_IBF = 0x02  # EC Input buffer empty
-
-
-#
-# Embedded Controller ACPI commands
-# These commands should be submitted to EC ACPI I/O ports
-#
-EC_COMMAND_ACPI_READ = 0x080  # Read EC ACPI memory
-EC_COMMAND_ACPI_WRITE = 0x081  # Write EC ACPI memory
-EC_COMMAND_ACPI_LOCK = 0x082  # Lock EC for burst use
-EC_COMMAND_ACPI_UNLOCK = 0x083  # Unlock EC from burst use
-EC_COMMAND_ACPI_QUERY = 0x084  # Query EC event
-EC_COMMAND_ACPI_READ_EXT = 0x0F0  # Read EC ACPI extended memory
-EC_COMMAND_ACPI_WRITE_EXT = 0x0F1  # Write EC ACPI extended memory
-
-
-
[docs]class EC(hal_base.HALBase):
-
-    #
-    # EC ACPI memory access
-    #
-
-    # Wait for EC input buffer empty
-    def _wait_ec_inbuf_empty(self) -> bool:
-        to = 1000
-        while (self.cs.io.read_port_byte(IO_PORT_EC_STATUS) & EC_STS_IBF) and to:
-            to = to - 1
-        return True
-
-    # Wait for EC output buffer full
-    def _wait_ec_outbuf_full(self) -> bool:
-        to = 1000
-        while not (self.cs.io.read_port_byte(IO_PORT_EC_STATUS) & EC_STS_OBF) and to:
-            to = to - 1
-        return True
-
-
[docs]    def write_command(self, command: int) -> None:
-        self._wait_ec_inbuf_empty()
-        return self.cs.io.write_port_byte(IO_PORT_EC_COMMAND, command)

-
-
[docs]    def write_data(self, data: int) -> None:
-        self._wait_ec_inbuf_empty()
-        return self.cs.io.write_port_byte(IO_PORT_EC_DATA, data)

-
-
[docs]    def read_data(self) -> Optional[int]:
-        if not self._wait_ec_outbuf_full():
-            return None
-        return self.cs.io.read_port_byte(IO_PORT_EC_DATA)

-
-
[docs]    def read_memory(self, offset: int) -> Optional[int]:
-        self.write_command(EC_COMMAND_ACPI_READ)
-        self.write_data(offset)
-        return self.read_data()

-
-
[docs]    def write_memory(self, offset: int, data: int) -> None:
-        self.write_command(EC_COMMAND_ACPI_WRITE)
-        self.write_data(offset)
-        return self.write_data(data)

-
-
[docs]    def read_memory_extended(self, word_offset: int) -> Optional[int]:
-        self.write_command(EC_COMMAND_ACPI_READ)
-        self.write_data(0x2)
-        self.write_data(word_offset & 0xFF)
-        self.write_command(EC_COMMAND_ACPI_READ_EXT)
-        self.write_data(word_offset >> 8)
-        return self.read_data()

-
-
[docs]    def write_memory_extended(self, word_offset: int, data: int) -> None:
-        self.write_command(EC_COMMAND_ACPI_WRITE)
-        self.write_data(0x2)
-        self.write_data(word_offset & 0xFF)
-        self.write_command(EC_COMMAND_ACPI_WRITE_EXT)
-        self.write_data(word_offset >> 8)
-        return self.write_data(data)

-
-
[docs]    def read_range(self, start_offset: int, size: int) -> bytes:
-        buffer = [0xFF] * size
-        for i in range(size):
-            if start_offset + i < 0x100:
-                mem_value = self.read_memory(start_offset + i)
-                if mem_value is not None:
-                    buffer[i] = mem_value
-                else:
-                    self.logger.log_hal(f'[ec] Unable to read EC offset 0x{start_offset + i:X}')
-            else:
-                mem_value = self.read_memory_extended(start_offset + i)
-                if mem_value is not None:
-                    buffer[i] = mem_value
-                else:
-                    self.logger.log_hal(f'[ec] Unable to read EC offset 0x{start_offset + i:X}')
-
-        self.logger.log_hal(f'[ec] read EC memory from offset {start_offset:X} size {size:X}:')
-        if self.logger.HAL:
-            print_buffer_bytes(buffer)
-        return bytes(buffer)

-
-
[docs]    def write_range(self, start_offset: int, buffer: bytes) -> bool:
-        for i, b in enumerate(buffer):
-            self.write_memory(start_offset + i, b)
-        self.logger.log_hal(f'[ec] write EC memory to offset {start_offset:X} size {len(buffer):X}:')
-        if self.logger.HAL:
-            print_buffer_bytes(buffer)
-        return True

-
-    #
-    # EC Intex I/O access
-    #
-
[docs]    def read_idx(self, offset: int) -> int:
-        self.cs.io.write_port_byte(IO_PORT_EC_INDEX_ADDRL, offset & 0xFF)
-        self.cs.io.write_port_byte(IO_PORT_EC_INDEX_ADDRH, (offset >> 8) & 0xFF)
-        value = self.cs.io.read_port_byte(IO_PORT_EC_INDEX_DATA)
-        self.logger.log_hal(f'[ec] index read: offset 0x{offset:02X} > 0x{value:02X}:')
-        return value

-
-
[docs]    def write_idx(self, offset: int, value: int) -> bool:
-        self.logger.log_hal(f'[ec] index write: offset 0x{offset:02X} < 0x{value:02X}:')
-        self.cs.io.write_port_byte(IO_PORT_EC_INDEX_ADDRL, offset & 0xFF)
-        self.cs.io.write_port_byte(IO_PORT_EC_INDEX_ADDRH, (offset >> 8) & 0xFF)
-        self.cs.io.write_port_byte(IO_PORT_EC_INDEX_DATA, value & 0xFF)
-        return True

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/hal_base.html b/_modules/chipsec/hal/hal_base.html deleted file mode 100644 index 83ca6a92..00000000 --- a/_modules/chipsec/hal/hal_base.html +++ /dev/null @@ -1,157 +0,0 @@ - - - - - - - - chipsec.hal.hal_base — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.hal_base

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2016, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Base for HAL Components
-"""
-
-import chipsec.logger
-
-
-
[docs]class HALBase:
-    def __init__(self, cs):
-        self.cs = cs
-        self.logger = chipsec.logger.logger()

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/igd.html b/_modules/chipsec/hal/igd.html deleted file mode 100644 index a8997dc9..00000000 --- a/_modules/chipsec/hal/igd.html +++ /dev/null @@ -1,348 +0,0 @@ - - - - - - - - chipsec.hal.igd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.igd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-Working with Intel processor Integrated Graphics Device (IGD)
-
-usage:
-    >>> gfx_aperture_dma_read(0x80000000, 0x100)
-"""
-
-from typing import Optional, Tuple
-from chipsec.hal import hal_base
-from chipsec.logger import print_buffer_bytes
-
-
-
[docs]class IGD(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(IGD, self).__init__(cs)
-        self.helper = cs.helper
-        self.is_legacy = False
-        self.enabled = None
-
-    def __identify_device(self) -> Tuple[bool, bool]:
-        if self.enabled is None:
-            try:
-                self.dev_id = self.cs.read_register("PCI0.2.0_DID")
-                self.enabled = (self.dev_id != 0xFFFF)
-                if self.enabled:
-                    self.is_legacy = bool(self.dev_id < 0x1600)
-            except Exception:
-                self.enabled = False
-
-        return (self.enabled, self.is_legacy)
-
-
[docs]    def is_enabled(self) -> bool:
-        if self.cs.register_has_field("PCI0.0.0_DEVEN", "D2EN") and self.cs.register_has_field("PCI0.0.0_CAPID0_A", "IGD"):
-            if self.cs.read_register_field("PCI0.0.0_DEVEN", "D2EN") == 1 and self.cs.read_register_field("PCI0.0.0_CAPID0_A", "IGD") == 0:
-                return True
-        elif self.cs.register_has_field("PCI0.0.0_DEVEN", "D2EN"):
-            if self.cs.read_register_field("PCI0.0.0_DEVEN", "D2EN") == 1:
-                return True
-        elif self.cs.register_has_field("PCI0.0.0_CAPID0_A", "IGD"):
-            if self.cs.read_register_field("PCI0.0.0_CAPID0_A", "IGD") == 0:
-                return True
-        return self.is_device_enabled()

-
-
[docs]    def is_device_enabled(self) -> bool:
-        enabled, _ = self.__identify_device()
-        return enabled

-
-
[docs]    def is_legacy_gen(self) -> bool:
-        _, legacy = self.__identify_device()
-        return legacy

-
-
[docs]    def get_GMADR(self) -> int:
-        base, _ = self.cs.mmio.get_MMIO_BAR_base_address('GMADR')
-        self.logger.log_hal(f'[igd] Aperture (GMADR): 0x{base:016X}')
-        return base

-
-
[docs]    def get_GTTMMADR(self) -> int:
-        base, _ = self.cs.mmio.get_MMIO_BAR_base_address('GTTMMADR')
-        self.logger.log_hal(f'[igd] Graphics MMIO and GTT (GTTMMADR): 0x{base:016X}')
-        return base

-
-
[docs]    def get_GGTT_base(self) -> int:
-        gtt_off = 0x200000 if self.is_legacy_gen() else 0x800000
-        return self.get_GTTMMADR() + gtt_off

-
-
[docs]    def get_PTE_size(self) -> int:
-        return 4 if self.is_legacy_gen() else 8

-
-
[docs]    def read_GGTT_PTE(self, pte_num: int) -> int:
-        gtt_base = self.get_GGTT_base()
-        reg_off = (self.get_PTE_size() * pte_num)
-
-        pte_lo = self.cs.mmio.read_MMIO_reg(gtt_base, reg_off)
-        pte_hi = 0
-        if self.get_PTE_size() == 8:
-            pte_hi = self.cs.mmio.read_MMIO_reg(gtt_base, reg_off + 4)
-        return (pte_lo | (pte_hi << 32))

-
-
[docs]    def write_GGTT_PTE(self, pte_num: int, pte: int) -> int:
-        gtt_base = self.get_GGTT_base()
-        self.cs.mmio.write_MMIO_reg(gtt_base, self.get_PTE_size() * pte_num, pte & 0xFFFFFFFF)
-        if self.get_PTE_size() == 8:
-            self.cs.mmio.write_MMIO_reg(gtt_base, self.get_PTE_size() * pte_num + 4, pte >> 32)
-        return pte

-
-
[docs]    def write_GGTT_PTE_from_PA(self, pte_num: int, pa: int) -> int:
-        pte = self.get_GGTT_PTE_from_PA(pa)
-        gtt_base = self.get_GGTT_base()
-        self.cs.mmio.write_MMIO_reg(gtt_base, self.get_PTE_size() * pte_num, pte & 0xFFFFFFFF)
-        if self.get_PTE_size() == 8:
-            self.cs.mmio.write_MMIO_reg(gtt_base, self.get_PTE_size() * pte_num + 4, pte >> 32)
-        return pte

-
-
[docs]    def dump_GGTT_PTEs(self, num: int) -> None:
-        gtt_base = self.get_GGTT_base()
-        self.logger.log('[igd] Global GTT contents:')
-        ptes = self.cs.mmio.read_MMIO(gtt_base, num * self.get_PTE_size())
-        pte_num = 0
-        for pte in ptes:
-            self.logger.log(f'PTE[{pte_num:03d}]: {pte:08X}')
-            pte_num = pte_num + 1

-
-
[docs]    def get_GGTT_PTE_from_PA(self, pa: int) -> int:
-        if self.is_legacy_gen():
-            return self.get_GGTT_PTE_from_PA_legacy(pa)
-        else:
-            return self.get_GGTT_PTE_from_PA_gen8(pa)

-
-
[docs]    def get_GGTT_PTE_from_PA_legacy(self, pa: int) -> int:
-        #
-        # GTT PTE format:
-        # 0     - valid
-        # 2:1   - cache type (00 - reserved, 01 - UC, 10 - LLC only, 11 - MLC/LLC)
-        # 3     - GFDT
-        # 11:4  - PA bits 39:32
-        # 31:12 - PA bits 31:12
-        #
-        return ((pa & 0xFFFFF000) | ((pa >> 32 & 0xFF) << 4) | 0x3)

-
-
[docs]    def get_PA_from_PTE_legacy(self, pte: int) -> int:
-        return (((pte & 0x00000FF0) << 28) | (pte & 0xFFFFF000))

-
-
[docs]    def get_GGTT_PTE_from_PA_gen8(self, pa: int) -> int:
-        return ((pa & ~0xFFF) | 0x1)

-
-
[docs]    def get_PA_from_PTE_gen8(self, pte: int) -> int:
-        return (pte & ~0xFFF)

-
-
[docs]    def get_PA_from_PTE(self, pte: int) -> int:
-        if self.is_legacy_gen():
-            return self.get_PA_from_PTE_legacy(pte)
-        else:
-            return self.get_PA_from_PTE_gen8(pte)

-
-
[docs]    def gfx_aperture_dma_read_write(self, address: int, size: int = 0x4, value: Optional[bytes] = None, pte_num: int = 0) -> bytes:
-        r = 0
-        pages = 0
-
-        gmadr = self.get_GMADR()
-        off = address % 0x1000
-        h = 0x1000 - off
-        igd_addr = gmadr + pte_num * 0x1000
-        pte_orig = self.read_GGTT_PTE(pte_num)
-
-        self.logger.log_hal(f'[igd] Reading 0x{size:X} bytes at PA 0x{address:016X} through IGD aperture (DMA) using PTE{pte_num:d}')
-        self.logger.log_hal(f'[igd] GFx aperture (GMADR): 0x{gmadr:016X}')
-        self.logger.log_hal(f'[igd] GFx GTT base        : 0x{self.get_GGTT_base():016X}')
-        self.logger.log_hal(f'[igd] Original GTT PTE{pte_num:03d}: 0x{pte_orig:08X}')
-
-        if (h > 0) and (size > h):
-            r = (size - h) % 0x1000
-            pages = 2 + (size - h) // 0x1000
-        else:
-            r = size % 0x1000
-            pages = 1 + size // 0x1000
-
-        N = pages
-        self.logger.log_hal(f'[igd] Pages = 0x{pages:X}, r = 0x{r:X}, N = {N:d}')
-
-        self.logger.log_hal(f'[igd] Original data at address 0x{address:016X}:')
-        if self.logger.HAL:
-            print_buffer_bytes(self.cs.mem.read_physical_mem(address, size))
-
-        buffer = b''
-        pa = address
-        for p in range(N):
-            pte = self.get_GGTT_PTE_from_PA(pa)
-            if self.logger.HAL:
-                self.logger.log(f'[igd] GFx PTE for address 0x{address:016X}: 0x{pte:08X}')
-            self.write_GGTT_PTE(pte_num, pte)
-            if (p == 0):
-                pa_off = off
-                size = h if (pa_off > 0) else 0x1000
-            else:
-                pa_off = 0
-            if (p == N - 1):
-                size = r if (r > 0) else 0x1000
-            if value is None:
-                self.logger.log_hal(f'[igd] Reading 0x{size:X} bytes at 0x{pa:016X} through GFx aperture 0x{igd_addr + pa_off:016X}...')
-                page = self.cs.mem.read_physical_mem(igd_addr + pa_off, size)
-                buffer += page
-                if self.logger.HAL:
-                    print_buffer_bytes(page[:size])
-            else:
-                self.logger.log_hal(f'[igd] Writing 0x{size:X} bytes to 0x{pa:016X} through GFx aperture 0x{igd_addr + pa_off:016X}...')
-                page = value[p * 0x1000:p * 0x1000 + size]
-                self.cs.mem.write_physical_mem(igd_addr + pa_off, size, page)
-                if self.logger.HAL:
-                    print_buffer_bytes(page)
-            pa += size
-
-        # restore original PTE
-        self.logger.log_hal(f'[igd] Restoring GFx PTE{pte_num:d} 0x{pte_orig:X}...')
-        self.write_GGTT_PTE(pte_num, pte_orig)
-
-        return buffer

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/interrupts.html b/_modules/chipsec/hal/interrupts.html deleted file mode 100644 index 0826f689..00000000 --- a/_modules/chipsec/hal/interrupts.html +++ /dev/null @@ -1,313 +0,0 @@ - - - - - - - - chipsec.hal.interrupts — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.interrupts

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Functionality encapsulating interrupt generation
-CPU Interrupts specific functions (SMI, NMI)
-
-usage:
-    >>> send_SMI_APMC( 0xDE )
-    >>> send_NMI()
-"""
-
-# TODO IPIs through Local APIC??
-
-import struct
-import uuid
-from typing import Optional, Tuple
-from chipsec.hal import hal_base
-from chipsec.logger import logger, print_buffer_bytes
-from chipsec.hal.acpi import ACPI
-from chipsec.hal.acpi_tables import UEFI_TABLE, GAS
-from chipsec.defines import bytestostring
-
-SMI_APMC_PORT = 0xB2
-SMI_DATA_PORT = 0xB3
-
-NMI_TCO1_CTL = 0x8  # NMI_NOW is bit [8] in TCO1_CTL (or bit [1] in TCO1_CTL + 1)
-NMI_NOW = 0x1
-
-
-
[docs]class Interrupts(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(Interrupts, self).__init__(cs)
-
-
[docs]    def send_SW_SMI(self, thread_id: int, SMI_code_port_value: int, SMI_data_port_value: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) -> Optional[Tuple[int, int, int, int, int, int, int]]:
-        SMI_code_data = (SMI_data_port_value << 8 | SMI_code_port_value)
-        logger().log_hal(
-            f"[intr] Sending SW SMI: code port 0x{SMI_APMC_PORT:02X} <- 0x{SMI_code_port_value:02X}, data port 0x{SMI_APMC_PORT + 1:02X} <- 0x{SMI_data_port_value:02X} (0x{SMI_code_data:04X})")
-        logger().log_hal(f"       RAX = 0x{_rax:016X} (AX will be overridden with values of SW SMI ports B2/B3)")
-        logger().log_hal(f"       RBX = 0x{_rbx:016X}")
-        logger().log_hal(f"       RCX = 0x{_rcx:016X}")
-        logger().log_hal(f"       RDX = 0x{_rdx:016X} (DX will be overridden with 0x00B2)")
-        logger().log_hal(f"       RSI = 0x{_rsi:016X}")
-        logger().log_hal(f"       RDI = 0x{_rdi:016X}")
-        return self.cs.helper.send_sw_smi(thread_id, SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi)

-
-
[docs]    def send_SMI_APMC(self, SMI_code_port_value: int, SMI_data_port_value: int) -> None:
-        logger().log_hal(f"[intr] sending SMI via APMC ports: code 0xB2 <- 0x{SMI_code_port_value:02X}, data 0xB3 <- 0x{SMI_data_port_value:02X}")
-        self.cs.io.write_port_byte(SMI_DATA_PORT, SMI_data_port_value)
-        return self.cs.io.write_port_byte(SMI_APMC_PORT, SMI_code_port_value)

-
-
[docs]    def send_NMI(self) -> None:
-        logger().log_hal("[intr] Sending NMI# through TCO1_CTL[NMI_NOW]")
-        reg, ba = self.cs.get_IO_space("TCOBASE")
-        tcobase = self.cs.read_register_field(reg, ba)
-        return self.cs.io.write_port_byte(tcobase + NMI_TCO1_CTL + 1, NMI_NOW)

-
-
[docs]    def find_ACPI_SMI_Buffer(self) -> Optional[UEFI_TABLE.CommBuffInfo]:
-        logger().log_hal("Parsing ACPI tables to identify Communication Buffer")
-        _acpi = ACPI(self.cs).get_ACPI_table("UEFI")
-        if len(_acpi):
-            _uefi = UEFI_TABLE()
-            _uefi.parse(_acpi[0][1])
-            logger().log_hal(str(_uefi))
-            return _uefi.get_commbuf_info()
-        logger().log_hal("Unable to find Communication Buffer")
-        return None

-
-
[docs]    def send_ACPI_SMI(self, thread_id: int, smi_num: int, buf_addr: int, invoc_reg: GAS, guid: str, data: bytes) -> Optional[int]:
-        # Prepare Communication Data buffer
-        # typedef struct {
-        #   EFI_GUID HeaderGuid;
-        #   UINTN MessageLength;
-        #   UINT8 Data[ANYSIZE_ARRAY];
-        # } EFI_SMM_COMMUNICATE_HEADER;
-        _guid = uuid.UUID(guid).bytes_le
-        data_hdr = _guid + struct.pack("Q", len(data)) + data
-        if not invoc_reg is None:
-            # need to write data_hdr to comm buffer
-            self.cs.helper.write_phys_mem(buf_addr, len(data_hdr), data_hdr)
-            # USING GAS need to write buf_addr into invoc_reg
-            if invoc_reg.addrSpaceID == 0:
-                self.cs.helper.write_phys_mem(invoc_reg.addr, invoc_reg.accessSize, buf_addr)
-                # check for return status
-                ret_buf = self.cs.helper.read_phys_mem(buf_addr, 8)
-            elif invoc_reg.addrSpaceID == 1:
-                self.cs.helper.write_io_port(invoc_reg.addr, invoc_reg.accessSize, buf_addr)
-                # check for return status
-                ret_buf = self.cs.helper.read_io_port(buf_addr, 8)
-            else:
-                logger().log_error("Functionality is currently not implemented")
-                ret_buf = None
-            return ret_buf
-
-        else:
-            # Wait for Communication buffer to be empty
-            buf = 1
-            while not buf == b"\x00\x00":
-                buf = self.cs.helper.read_phys_mem(buf_addr, 2)
-            # write data to commbuffer
-            self.cs.helper.write_phys_mem(buf_addr, len(data_hdr), data_hdr)
-            # call SWSMI
-            self.send_SW_SMI(thread_id, smi_num, 0, 0, 0, 0, 0, 0, 0)
-            # clear CommBuffer
-            self.cs.helper.write_phys_mem(buf_addr, len(data_hdr), b"\x00" * len(data_hdr))
-            return None

-
-    # scan phys mem range start-end looking for 'smmc'
-
[docs]    def find_smmc(self, start: int, end: int) -> int:
-        chunk_sz = 1024 * 8  # 8KB chunks
-        phys_address = start
-        found_at = 0
-        while phys_address <= end:
-            buffer = self.cs.mem.read_physical_mem(phys_address, chunk_sz)
-            buffer = bytestostring(buffer)
-            offset = buffer.find('smmc')
-            if offset != -1:
-                found_at = phys_address + offset
-                break
-            phys_address += chunk_sz
-        return found_at

-
-    '''
-Send SWSMI in the same way as EFI_SMM_COMMUNICATION_PROTOCOL
-    - Write Commbuffer location and Commbuffer size to 'smmc' structure
-    - Write 0 to 0xb3 and 0xb2
-
-MdeModulePkg/Core/PiSmmCore/PiSmmCorePrivateData.h
-
-#define SMM_CORE_PRIVATE_DATA_SIGNATURE  SIGNATURE_32 ('s', 'm', 'm', 'c')
- struct {
-  UINTN                           Signature;
-   This field is used by the SMM Communicatioon Protocol to pass a buffer into
-   a software SMI handler and for the software SMI handler to pass a buffer back to
-   the caller of the SMM Communication Protocol.
-  VOID                            *CommunicationBuffer;
-  UINTN                           BufferSize;
-
-  EFI_STATUS                      ReturnStatus;
-} SMM_CORE_PRIVATE_DATA;
-    '''
-
-
[docs]    def send_smmc_SMI(self, smmc: int, guid: str, payload: bytes, payload_loc: int, CommandPort: int = 0x0, DataPort: int = 0x0) -> int:
-        guid_b = uuid.UUID(guid).bytes_le
-        payload_sz = len(payload)
-
-        data_hdr = guid_b + struct.pack("Q", payload_sz) + payload
-        # write payload to payload_loc
-        CommBuffer_offset = 56
-        BufferSize_offset = CommBuffer_offset + 8
-        ReturnStatus_offset = BufferSize_offset + 8
-
-        self.cs.mem.write_physical_mem(smmc + CommBuffer_offset, 8, struct.pack("Q", payload_loc))
-        self.cs.mem.write_physical_mem(smmc + BufferSize_offset, 8, struct.pack("Q", len(data_hdr)))
-        self.cs.mem.write_physical_mem(payload_loc, len(data_hdr), data_hdr)
-
-        if self.logger.VERBOSE:
-            self.logger.log("[*] Communication buffer on input")
-            print_buffer_bytes(self.cs.mem.read_physical_mem(payload_loc, len(data_hdr)))
-            self.logger.log("")
-
-        self.send_SMI_APMC(CommandPort, DataPort)
-
-        if self.logger.VERBOSE:
-            self.logger.log("[*] Communication buffer on output")
-            print_buffer_bytes(self.cs.mem.read_physical_mem(payload_loc, len(data_hdr)))
-            self.logger.log("")
-
-        ReturnStatus = struct.unpack("Q", self.cs.mem.read_physical_mem(smmc + ReturnStatus_offset, 8))[0]
-        return ReturnStatus

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/io.html b/_modules/chipsec/hal/io.html deleted file mode 100644 index 014f5b49..00000000 --- a/_modules/chipsec/hal/io.html +++ /dev/null @@ -1,236 +0,0 @@ - - - - - - - - chipsec.hal.io — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.io

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Access to Port I/O
-
-usage:
-    >>> read_port_byte( 0x61 )
-    >>> read_port_word( 0x61 )
-    >>> read_port_dword( 0x61 )
-    >>> write_port_byte( 0x71, 0 )
-    >>> write_port_word( 0x71, 0 )
-    >>> write_port_dword( 0x71, 0 )
-"""
-
-from typing import List
-from chipsec.logger import logger
-
-
-
[docs]class PortIO:
-
-    def __init__(self, cs):
-        self.helper = cs.helper
-        self.cs = cs
-
-    def _read_port(self, io_port: int, size: int) -> int:
-        value = self.helper.read_io_port(io_port, size)
-        if logger().HAL:
-            logger().log(f"[io] IN 0x{io_port:04X}: value = 0x{value:08X}, size = 0x{size:02X}")
-        return value
-
-    def _write_port(self, io_port: int, value: int, size: int) -> int:
-        if logger().HAL:
-            logger().log(f"[io] OUT 0x{io_port:04X}: value = 0x{value:08X}, size = 0x{size:02X}")
-        status = self.helper.write_io_port(io_port, value, size)
-        return status
-
-
[docs]    def read_port_dword(self, io_port: int) -> int:
-        value = self.helper.read_io_port(io_port, 4)
-        if logger().HAL:
-            logger().log(f"[io] reading dword from I/O port 0x{io_port:04X} -> 0x{value:08X}")
-        return value

-
-
[docs]    def read_port_word(self, io_port: int) -> int:
-        value = self.helper.read_io_port(io_port, 2)
-        if logger().HAL:
-            logger().log(f"[io] reading word from I/O port 0x{io_port:04X} -> 0x{value:04X}")
-        return value

-
-
[docs]    def read_port_byte(self, io_port: int) -> int:
-        value = self.helper.read_io_port(io_port, 1)
-        if logger().HAL:
-            logger().log(f"[io] reading byte from I/O port 0x{io_port:04X} -> 0x{value:02X}")
-        return value

-
-
[docs]    def write_port_byte(self, io_port: int, value: int) -> None:
-        if logger().HAL:
-            logger().log(f"[io] writing byte to I/O port 0x{io_port:04X} <- 0x{value:02X}")
-        self.helper.write_io_port(io_port, value, 1)
-        return

-
-
[docs]    def write_port_word(self, io_port: int, value: int) -> None:
-        if logger().HAL:
-            logger().log(f"[io] writing word to I/O port 0x{io_port:04X} <- 0x{value:04X}")
-        self.helper.write_io_port(io_port, value, 2)
-        return

-
-
[docs]    def write_port_dword(self, io_port: int, value: int) -> None:
-        if logger().HAL:
-            logger().log(f"[io] writing dword to I/O port 0x{io_port:04X} <- 0x{value:08X}")
-        self.helper.write_io_port(io_port, value, 4)
-        return

-
-    #
-    # Read registers from I/O range
-    #
-
[docs]    def read_IO(self, range_base: int, range_size: int, size: int = 1) -> List[int]:
-        n = range_size // size
-        io_ports = []
-        for i in range(n):
-            io_ports.append(self._read_port(range_base + i * size, size))
-        return io_ports

-
-    #
-    # Dump I/O range
-    #
-
[docs]    def dump_IO(self, range_base: int, range_size: int, size: int = 1) -> None:
-        n = range_size // size
-        fmt = f'0{size * 2:d}X'
-        logger().log(f"[io] I/O register range [0x{range_base:04X}:0x{range_base:04X}+{range_size:04X}]:")
-        for i in range(n):
-            reg = self._read_port(range_base + i * size, size)
-            logger().log(f'+{size * i:04X}: {reg:{fmt}}')

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/iobar.html b/_modules/chipsec/hal/iobar.html deleted file mode 100644 index 81c041c9..00000000 --- a/_modules/chipsec/hal/iobar.html +++ /dev/null @@ -1,318 +0,0 @@ - - - - - - - - chipsec.hal.iobar — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.iobar

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-I/O BAR access (dump, read/write)
-
-usage:
-    >>> get_IO_BAR_base_address( bar_name )
-    >>> read_IO_BAR_reg( bar_name, offset, size )
-    >>> write_IO_BAR_reg( bar_name, offset, size, value )
-    >>> dump_IO_BAR( bar_name )
-"""
-from typing import Tuple, List
-from chipsec.hal import hal_base
-from chipsec.logger import logger
-from chipsec.exceptions import IOBARNotFoundError
-from chipsec.exceptions import CSReadError
-
-DEFAULT_IO_BAR_SIZE = 0x100
-
-
-
[docs]class IOBAR(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(IOBAR, self).__init__(cs)
-
-    #
-    # Check if I/O BAR with bar_name has been defined in XML config
-    # Use this function to fall-back to hardcoded config in case XML config is not available
-    #
-
[docs]    def is_IO_BAR_defined(self, bar_name: str) -> bool:
-        try:
-            return (self.cs.Cfg.IO_BARS[bar_name] is not None)
-        except KeyError:
-            if logger().HAL:
-                logger().log_error(f"'{bar_name}' I/O BAR definition not found in XML config")
-            return False

-
-    #
-    # Get base address of I/O range by IO BAR name
-    #
-
[docs]    def get_IO_BAR_base_address(self, bar_name: str) -> Tuple[int, int]:
-        bar = self.cs.Cfg.IO_BARS[bar_name]
-        if bar is None or bar == {}:
-            raise IOBARNotFoundError(f'IOBARNotFound: {bar_name}')
-
-        if 'register' in bar:
-            bar_reg = bar['register']
-            if 'base_field' in bar:
-                base_field = bar['base_field']
-                try:
-                    base = self.cs.read_register_field(bar_reg, base_field, preserve_field_position=True)
-                except Exception:
-                    base = 0
-                try:
-                    empty_base = self.cs.get_register_field_mask(bar_reg, base_field, preserve_field_position=True)
-                except Exception:
-                    empty_base = 0
-            else:
-                try:
-                    base = self.cs.read_register(bar_reg)
-                except Exception:
-                    base = 0
-                try:
-                    empty_base = self.cs.get_register_field_mask(bar_reg, preserve_field_position=True)
-                except Exception:
-                    empty_base = 0
-        else:
-            # this method is not preferred
-            base = self.cs.pci.read_word(self.cs.get_first_bus(bar), bar['dev'], bar['fun'], bar['reg'])
-            empty_base = 0xFFFF
-
-        if 'fixed_address' in bar and (base == empty_base or base == 0):
-            base = bar['fixed_address']
-            if logger().HAL:
-                logger().log(f'[iobar] Using fixed address for {bar_name}: 0x{base:016X}')
-
-        if 'mask' in bar:
-            base = base & bar['mask']
-        if 'offset' in bar:
-            base = base + bar['offset']
-        size = bar['size'] if ('size' in bar) else DEFAULT_IO_BAR_SIZE
-
-        if logger().HAL:
-            logger().log(f'[iobar] {bar_name}: 0x{base:04X} (size = 0x{size:X})')
-        if base == 0:
-            raise CSReadError(f'IOBAR ({bar_name}) base address is 0')
-        return base, size

-
-    #
-    # Read I/O register from I/O range defined by I/O BAR name
-    #
-
[docs]    def read_IO_BAR_reg(self, bar_name: str, offset: int, size: int) -> int:
-        if logger().HAL:
-            logger().log(f'[iobar] read {bar_name} + 0x{offset:X} ({size:d})')
-        (bar_base, bar_size) = self.get_IO_BAR_base_address(bar_name)
-        io_port = bar_base + offset
-        if offset > bar_size and logger().HAL:
-            logger().log_warning(f'offset 0x{offset:X} is outside {bar_name} size (0x{size:X})')
-        value = self.cs.io._read_port(io_port, size)
-        return value

-
-    #
-    # Write I/O register from I/O range defined by I/O BAR name
-    #
-
[docs]    def write_IO_BAR_reg(self, bar_name: str, offset: int, size: int, value: int) -> int:
-        (bar_base, bar_size) = self.get_IO_BAR_base_address(bar_name)
-        if logger().HAL:
-            logger().log(f'[iobar] write {bar_name} + 0x{offset:X} ({size:d}): 0x{value:X}')
-        io_port = bar_base + offset
-        if offset > bar_size and logger().HAL:
-            logger().log_warning(f'offset 0x{offset:X} is outside {bar_name} size (0x{size:X})')
-        return self.cs.io._write_port(io_port, value, size)

-
-    #
-    # Check if I/O range is enabled by BAR name
-    #
-
[docs]    def is_IO_BAR_enabled(self, bar_name: str) -> bool:
-        bar = self.cs.Cfg.IO_BARS[bar_name]
-        is_enabled = True
-        if 'register' in bar:
-            bar_reg = bar['register']
-            if 'enable_field' in bar:
-                bar_en_field = bar['enable_field']
-                is_enabled = (1 == self.cs.read_register_field(bar_reg, bar_en_field))
-        return is_enabled

-
-
[docs]    def list_IO_BARs(self) -> None:
-        logger().log('')
-        logger().log('--------------------------------------------------------------------------------')
-        logger().log(' I/O Range    | BAR Register   | Base             | Size     | En? | Description')
-        logger().log('--------------------------------------------------------------------------------')
-        for _bar_name in self.cs.Cfg.IO_BARS:
-            if not self.is_IO_BAR_defined(_bar_name):
-                continue
-            _bar = self.cs.Cfg.IO_BARS[_bar_name]
-            try:
-                (_base, _size) = self.get_IO_BAR_base_address(_bar_name)
-            except CSReadError:
-                if self.logger.HAL:
-                    self.logger.log(f"Unable to find IO BAR {_bar_name}")
-                continue
-            _en = self.is_IO_BAR_enabled(_bar_name)
-
-            if 'register' in _bar:
-                _s = _bar['register']
-                if 'offset' in _bar:
-                    _s += (f' + 0x{int(_bar["offset"], 16):X}')
-            else:
-                _s = f'{int(_bar["bus"], 16):02X}:{int(_bar["dev"], 16):02X}.{int(_bar["fun"], 16):01X} + {_bar["reg"]}'
-
-            logger().log(f' {_bar_name:12} | {_s:14} | {_base:016X} | {_size:08X} | {_en:d}   | {_bar["desc"]}')

-
-    #
-    # Read I/O range by I/O BAR name
-    #
-
[docs]    def read_IO_BAR(self, bar_name: str, size: int = 1) -> List[int]:
-        (range_base, range_size) = self.get_IO_BAR_base_address(bar_name)
-        n = range_size // size
-        io_ports = []
-        for i in range(n):
-            io_ports.append(self.cs.io._read_port(range_base + i * size, size))
-        return io_ports

-
-    #
-    # Dump I/O range by I/O BAR name
-    #
-
[docs]    def dump_IO_BAR(self, bar_name: str, size: int = 1) -> None:
-        (range_base, range_size) = self.get_IO_BAR_base_address(bar_name)
-        n = range_size // size
-        fmt = f'0{size * 2:d}X'
-        logger().log(f"[iobar] I/O BAR {bar_name}:")
-        for i in range(n):
-            reg = self.cs.io._read_port(range_base + i * size, size)
-            logger().log(f'{size * i:+04X}: {reg:{fmt}}')

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/iommu.html b/_modules/chipsec/hal/iommu.html deleted file mode 100644 index 8e32d9ed..00000000 --- a/_modules/chipsec/hal/iommu.html +++ /dev/null @@ -1,290 +0,0 @@ - - - - - - - - chipsec.hal.iommu — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.iommu

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Access to IOMMU engines
-"""
-
-from chipsec.hal import hal_base, mmio, paging
-from chipsec.exceptions import IOMMUError
-
-IOMMU_ENGINE_DEFAULT = 'VTD'
-IOMMU_ENGINE_GFX = 'GFXVTD'
-
-
-IOMMU_ENGINES = {
-    IOMMU_ENGINE_GFX: 'GFXVTBAR',
-    IOMMU_ENGINE_DEFAULT: 'VTBAR'
-}
-
-
-
[docs]class IOMMU(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(IOMMU, self).__init__(cs)
-        self.mmio = mmio.MMIO(cs)
-
-
[docs]    def get_IOMMU_Base_Address(self, iommu_engine: str) -> int:
-        if iommu_engine in IOMMU_ENGINES:
-            vtd_base_name = IOMMU_ENGINES[iommu_engine]
-        else:
-            raise IOMMUError(f'IOMMUError: unknown IOMMU engine 0x{iommu_engine:X}')
-
-        if self.mmio.is_MMIO_BAR_defined(vtd_base_name):
-            (base, _) = self.mmio.get_MMIO_BAR_base_address(vtd_base_name)
-        else:
-            raise IOMMUError(f'IOMMUError: IOMMU BAR {vtd_base_name} is not defined in the config')
-        return base

-
-
[docs]    def is_IOMMU_Engine_Enabled(self, iommu_engine: str) -> bool:
-        if iommu_engine in IOMMU_ENGINES:
-            vtd_base_name = IOMMU_ENGINES[iommu_engine]
-        else:
-            raise IOMMUError(f'IOMMUError: unknown IOMMU engine 0x{iommu_engine:X}')
-        return self.mmio.is_MMIO_BAR_defined(vtd_base_name) and self.mmio.is_MMIO_BAR_enabled(vtd_base_name)

-
-
[docs]    def is_IOMMU_Translation_Enabled(self, iommu_engine: str) -> bool:
-        tes = self.cs.read_register_field(f'{IOMMU_ENGINES[iommu_engine]}_GSTS', 'TES')
-        return (1 == tes)

-
-
[docs]    def set_IOMMU_Translation(self, iommu_engine: str, te: int) -> bool:
-        return self.cs.write_register_field(f'{IOMMU_ENGINES[iommu_engine]}_GCMD', 'TE', te)

-
-
[docs]    def dump_IOMMU_configuration(self, iommu_engine: str) -> None:
-        self.logger.log("==================================================================")
-        vtd = IOMMU_ENGINES[iommu_engine]
-        self.logger.log(f'[iommu] {iommu_engine} IOMMU Engine Configuration')
-        self.logger.log("==================================================================")
-        self.logger.log(f'Base register (BAR)       : {vtd}')
-        reg = self.cs.read_register(vtd)
-        self.logger.log(f'BAR register value        : 0x{reg:X}')
-        if reg == 0:
-            return
-        base = self.get_IOMMU_Base_Address(iommu_engine)
-        self.logger.log(f'MMIO base                 : 0x{base:016X}')
-        self.logger.log("------------------------------------------------------------------")
-        ver_min = self.cs.read_register_field(f'{vtd}_VER', 'MIN')
-        ver_max = self.cs.read_register_field(f'{vtd}_VER', 'MAX')
-        self.logger.log(f'Version                   : {ver_max:X}.{ver_min:X}')
-        enabled = self.is_IOMMU_Engine_Enabled(iommu_engine)
-        self.logger.log(f'Engine enabled            : {enabled:d}')
-        te = self.is_IOMMU_Translation_Enabled(iommu_engine)
-        self.logger.log(f'Translation enabled       : {te:d}')
-        rtaddr_rta = self.cs.read_register_field(f'{vtd}_RTADDR', 'RTA', True)
-        self.logger.log(f'Root Table Address        : 0x{rtaddr_rta:016X}')
-        irta = self.cs.read_register_field(f'{vtd}_IRTA', 'IRTA')
-        self.logger.log(f'Interrupt Remapping Table : 0x{irta:016X}')
-        self.logger.log("------------------------------------------------------------------")
-        self.logger.log("Protected Memory:")
-        pmen_epm = self.cs.read_register_field(f'{vtd}_PMEN', 'EPM')
-        pmen_prs = self.cs.read_register_field(f'{vtd}_PMEN', 'PRS')
-        self.logger.log(f'  Enabled                 : {pmen_epm:d}')
-        self.logger.log(f'  Status                  : {pmen_prs:d}')
-        plmbase = self.cs.read_register_field(f'{vtd}_PLMBASE', 'PLMB')
-        plmlimit = self.cs.read_register_field(f'{vtd}_PLMLIMIT', 'PLML')
-        phmbase = self.cs.read_register_field(f'{vtd}_PHMBASE', 'PHMB')
-        phmlimit = self.cs.read_register_field(f'{vtd}_PHMLIMIT', 'PHML')
-        self.logger.log(f'  Low Memory Base         : 0x{plmbase:016X}')
-        self.logger.log(f'  Low Memory Limit        : 0x{plmlimit:016X}')
-        self.logger.log(f'  High Memory Base        : 0x{phmbase:016X}')
-        self.logger.log(f'  High Memory Limit       : 0x{phmlimit:016X}')
-        self.logger.log("------------------------------------------------------------------")
-        self.logger.log("Capabilities:\n")
-        cap_reg = self.cs.read_register(f'{vtd}_CAP')
-        self.cs.print_register(f'{vtd}_CAP', cap_reg)
-        ecap_reg = self.cs.read_register(f'{vtd}_ECAP')
-        self.cs.print_register(f'{vtd}_ECAP', ecap_reg)
-        self.logger.log('')

-
-
[docs]    def dump_IOMMU_page_tables(self, iommu_engine: str) -> None:
-        vtd = IOMMU_ENGINES[iommu_engine]
-        if self.cs.read_register(vtd) == 0:
-            self.logger.log(f'[iommu] {vtd} value is zero')
-            return
-        te = self.is_IOMMU_Translation_Enabled(iommu_engine)
-        self.logger.log(f'[iommu] Translation enabled    : {te:d}')
-        rtaddr_reg = self.cs.read_register(f'{vtd}_RTADDR')
-        rtaddr_rta = self.cs.get_register_field(f'{vtd}_RTADDR', rtaddr_reg, 'RTA', True)
-        rtaddr_rtt = self.cs.get_register_field(f'{vtd}_RTADDR', rtaddr_reg, 'RTT')
-        self.logger.log(f'[iommu] Root Table Address/Type: 0x{rtaddr_rta:016X}/{rtaddr_rtt:X}')
-
-        ecap_reg = self.cs.read_register(f'{vtd}_ECAP')
-        ecs = self.cs.get_register_field(f'{vtd}_ECAP', ecap_reg, 'ECS')
-        pasid = self.cs.get_register_field(f'{vtd}_ECAP', ecap_reg, 'PASID')
-        self.logger.log(f'[iommu] PASID / ECS            : {pasid:X} / {ecs:X}')
-
-        if 0xFFFFFFFFFFFFFFFF != rtaddr_reg:
-            if te:
-                self.logger.log(f'[iommu] Dumping VT-d page table hierarchy at 0x{rtaddr_rta:016X} (vtd_context_{rtaddr_rta:08X})')
-                paging_vtd = paging.c_vtd_page_tables(self.cs)
-                paging_vtd.read_vtd_context(f'vtd_context_{rtaddr_rta:08X}', rtaddr_rta)
-                self.logger.log(f'[iommu] Total VTd domains: {len(paging_vtd.domains):d}')
-                for domain in paging_vtd.domains:
-                    paging_vtd.read_pt_and_show_status(f'vtd_{domain:08X}', 'VTd', domain)
-            else:
-                self.logger.log(f"[iommu] translation via VT-d engine '{iommu_engine}' is not enabled")
-        else:
-            self.logger.log_error("Cannot access VT-d registers")

-
-
[docs]    def dump_IOMMU_status(self, iommu_engine: str) -> None:
-        vtd = IOMMU_ENGINES[iommu_engine]
-        self.logger.log('==================================================================')
-        self.logger.log(f'[iommu] {iommu_engine} IOMMU Engine Status:')
-        self.logger.log('==================================================================')
-        if self.cs.read_register(vtd) == 0:
-            self.logger.log(f'[iommu] {vtd} value is zero')
-            return None
-        gsts_reg = self.cs.read_register(f'{vtd}_GSTS')
-        self.cs.print_register(f'{vtd}_GSTS', gsts_reg)
-        fsts_reg = self.cs.read_register(f'{vtd}_FSTS')
-        self.cs.print_register(f'{vtd}_FSTS', fsts_reg)
-        frcdl_reg = self.cs.read_register(f'{vtd}_FRCDL')
-        self.cs.print_register(f'{vtd}_FRCDL', frcdl_reg)
-        frcdh_reg = self.cs.read_register(f'{vtd}_FRCDH')
-        self.cs.print_register(f'{vtd}_FRCDH', frcdh_reg)
-        ics_reg = self.cs.read_register(f'{vtd}_ICS')
-        self.cs.print_register(f'{vtd}_ICS', ics_reg)
-        return None

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/locks.html b/_modules/chipsec/hal/locks.html deleted file mode 100644 index 60d6b03d..00000000 --- a/_modules/chipsec/hal/locks.html +++ /dev/null @@ -1,201 +0,0 @@ - - - - - - - - chipsec.hal.locks — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.locks

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-__version__ = '1.0'
-
-from typing import List, Optional
-from chipsec.defines import bit, is_set
-from chipsec.hal.hal_base import HALBase
-from chipsec.exceptions import CSReadError, HWAccessViolationError
-
-
-
[docs]class LockResult:
-    DEFINED = bit(0)  # lock exists within configuration
-    HAS_CONFIG = bit(1)  # lock configuration exists
-    LOCKED = bit(2)  # lock matches value within xml
-    CAN_READ = bit(3)  # system is able to access the lock
-    INCONSISTENT = bit(4)  # all lock results do not match

-
-
-
[docs]class locks(HALBase):
-    def __init__(self, cs):
-        super(locks, self).__init__(cs)
-
-
[docs]    def get_locks(self) -> List[str]:
-        """
-        Return a list of locks defined within the configuration file
-        """
-        return self.cs.get_lock_list()

-
-
[docs]    def lock_valid(self, lock_name: str, bus: Optional[int] = None) -> int:
-        res = 0
-        if self.cs.is_lock_defined(lock_name):
-            res |= LockResult.DEFINED
-        try:
-            self.cs.get_locked_value(lock_name)
-            self.cs.get_lock(lock_name, bus=bus)
-            res |= LockResult.HAS_CONFIG
-            res |= LockResult.CAN_READ
-        except KeyError:
-            pass
-        except CSReadError:
-            res |= LockResult.HAS_CONFIG
-        except HWAccessViolationError:
-            res |= LockResult.HAS_CONFIG
-        return res

-
-
[docs]    def is_locked(self, lock_name: str, bus: Optional[int] = None) -> int:
-        """
-        Return whether the lock has the value setting
-        """
-        res = self.lock_valid(lock_name, bus)
-        if is_set(res, LockResult.HAS_CONFIG) and is_set(res, LockResult.CAN_READ):
-            locked = self.cs.get_locked_value(lock_name)
-            lock_setting = self.cs.get_lock(lock_name, bus=bus)
-            if not all(lock_setting[0] == elem for elem in lock_setting):
-                res |= LockResult.INCONSISTENT
-            if all(locked == elem for elem in lock_setting):
-                res |= LockResult.LOCKED
-        return res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/mmio.html b/_modules/chipsec/hal/mmio.html deleted file mode 100644 index 94ccef3e..00000000 --- a/_modules/chipsec/hal/mmio.html +++ /dev/null @@ -1,697 +0,0 @@ - - - - - - - - chipsec.hal.mmio — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.mmio

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Access to MMIO (Memory Mapped IO) BARs and Memory-Mapped PCI Configuration Space (MMCFG)
-
-usage:
-    >>> read_MMIO_reg(cs, bar_base, 0x0, 4)
-    >>> write_MMIO_reg(cs, bar_base, 0x0, 0xFFFFFFFF, 4)
-    >>> read_MMIO(cs, bar_base, 0x1000)
-    >>> dump_MMIO(cs, bar_base, 0x1000)
-
-    Access MMIO by BAR name:
-
-    >>> read_MMIO_BAR_reg(cs, 'MCHBAR', 0x0, 4)
-    >>> write_MMIO_BAR_reg(cs, 'MCHBAR', 0x0, 0xFFFFFFFF, 4)
-    >>> get_MMIO_BAR_base_address(cs, 'MCHBAR')
-    >>> is_MMIO_BAR_enabled(cs, 'MCHBAR')
-    >>> is_MMIO_BAR_programmed(cs, 'MCHBAR')
-    >>> dump_MMIO_BAR(cs, 'MCHBAR')
-    >>> list_MMIO_BARs(cs)
-
-    Access Memory Mapped Config Space:
-
-    >>> get_MMCFG_base_address(cs)
-    >>> read_mmcfg_reg(cs, 0, 0, 0, 0x10, 4)
-    >>> read_mmcfg_reg(cs, 0, 0, 0, 0x10, 4, 0xFFFFFFFF)
-"""
-from typing import List, Optional, Tuple
-from chipsec.hal import hal_base
-from chipsec.exceptions import CSReadError
-from chipsec.logger import logger
-from chipsec.defines import get_bits
-
-DEFAULT_MMIO_BAR_SIZE = 0x1000
-
-PCI_PCIEXBAR_REG_LENGTH_256MB = 0x0
-PCI_PCIEXBAR_REG_LENGTH_128MB = 0x1
-PCI_PCIEXBAR_REG_LENGTH_64MB = 0x2
-PCI_PCIEXBAR_REG_LENGTH_512MB = 0x3
-PCI_PCIEXBAR_REG_LENGTH_1024MB = 0x4
-PCI_PCIEXBAR_REG_LENGTH_2048MB = 0x5
-PCI_PCIEXBAR_REG_LENGTH_4096MB = 0x6
-PCI_PCIEBAR_REG_MASK = 0x7FFC000000
-
-
-
[docs]class MMIO(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(MMIO, self).__init__(cs)
-        self.cached_bar_addresses = {}
-        self.cache_bar_addresses_resolution = False
-
-    ###########################################################################
-    # Access to MMIO BAR defined by configuration files (chipsec/cfg/*.py)
-    ###########################################################################
-    #
-    # To add your own MMIO bar:
-    #   1. Add new MMIO BAR id (any)
-    #   2. Write a function get_yourBAR_base_address() with no args that
-    #      returns base address of new bar
-    #   3. Add a pointer to this function to MMIO_BAR_base map
-    #   4. Don't touch read/write_MMIO_reg functions ;)
-    #
-    ###########################################################################
-
-    #
-    # Read MMIO register as an offset off of MMIO range base address
-    #
-
-
[docs]    def read_MMIO_reg(self, bar_base: int, offset: int, size: int = 4, bar_size: Optional[int] = None) -> int:
-        if size > 8:
-            if self.logger.HAL:
-                self.logger.log_warning("MMIO read cannot exceed 8")
-        reg_value = self.cs.helper.read_mmio_reg(bar_base+offset, size)
-        self.logger.log_hal(f'[mmio] 0x{bar_base:08X} + 0x{offset:08X} = 0x{reg_value:08X}')
-        return reg_value

-
-
[docs]    def read_MMIO_reg_byte(self, bar_base: int, offset: int) -> int:
-        return self.read_MMIO_reg(bar_base, offset, 1)

-
-
[docs]    def read_MMIO_reg_word(self, bar_base: int, offset: int) -> int:
-        return self.read_MMIO_reg(bar_base, offset, 2)

-
-
[docs]    def read_MMIO_reg_dword(self, bar_base: int, offset: int) -> int:
-        return self.read_MMIO_reg(bar_base, offset, 4)

-
-    #
-    # Write MMIO register as an offset off of MMIO range base address
-    #
-
[docs]    def write_MMIO_reg(self, bar_base: int, offset: int, value: int, size: int = 4) -> int:
-        address = bar_base + offset
-        self.logger.log_hal(f'[mmio] write 0x{bar_base:08X} + 0x{offset:08X} = 0x{value:08X}')
-        return self.cs.helper.write_mmio_reg(address, size, value)

-
-
[docs]    def write_MMIO_reg_byte(self, bar_base: int, offset: int, value: int) -> int:
-        address = bar_base + offset
-        self.logger.log_hal(f'[mmio] write 0x{bar_base:08X} + 0x{offset:08X} = 0x{value:08X}')
-        return self.cs.helper.write_mmio_reg(address, 1, value)

-
-
[docs]    def write_MMIO_reg_word(self, bar_base: int, offset: int, value: int) -> int:
-        address = bar_base + offset
-        self.logger.log_hal(f'[mmio] write 0x{bar_base:08X} + 0x{offset:08X} = 0x{value:08X}')
-        return self.cs.helper.write_mmio_reg(address, 2, value)

-
-
[docs]    def write_MMIO_reg_dword(self, bar_base: int, offset: int, value: int) -> int:
-        address = bar_base + offset
-        self.logger.log_hal(f'[mmio] write 0x{bar_base:08X} + 0x{offset:08X} = 0x{value:08X}')
-        return self.cs.helper.write_mmio_reg(address, 4, value)

-
-    #
-    # Read MMIO registers as offsets off of MMIO range base address
-    #
-
[docs]    def read_MMIO(self, bar_base: int, size: int) -> List[int]:
-        regs = []
-        size -= size % 4
-        for offset in range(0, size, 4):
-            regs.append(self.read_MMIO_reg(bar_base, offset))
-        return regs

-
-    #
-    # Dump MMIO range
-    #
-
[docs]    def dump_MMIO(self, bar_base: int, size: int) -> None:
-        self.logger.log(f'[mmio] MMIO register range [0x{bar_base:016X}:0x{bar_base:016X}+{size:08X}]:')
-        size -= size % 4
-        for offset in range(0, size, 4):
-            self.logger.log(f'+{offset:08X}: {self.read_MMIO_reg(bar_base, offset):08X}')

-
-    ###############################################################################
-    # Access to MMIO BAR defined by XML configuration files (chipsec/cfg/*.xml)
-    ###############################################################################
-
-    #
-    # Check if MMIO BAR with bar_name has been defined in XML config
-    # Use this function to fall-back to hardcoded config in case XML config is not available
-    #
-
-
[docs]    def is_MMIO_BAR_defined(self, bar_name: str) -> bool:
-        is_bar_defined = False
-        try:
-            _bar = self.cs.Cfg.MMIO_BARS[bar_name]
-            if _bar is not None:
-                if 'register' in _bar:
-                    is_bar_defined = self.cs.is_register_defined(_bar['register'])
-                elif ('bus' in _bar) and ('dev' in _bar) and ('fun' in _bar) and ('reg' in _bar):
-                    # old definition
-                    is_bar_defined = True
-        except KeyError:
-            pass
-
-        if not is_bar_defined:
-            if self.logger.HAL:
-                self.logger.log_warning(f"'{bar_name}' MMIO BAR definition not found/correct in XML config")
-        return is_bar_defined

-
-    #
-    # Enable caching of BAR addresses
-    #
-
[docs]    def enable_cache_address_resolution(self, enable: bool) -> None:
-        if enable:
-            self.cache_bar_addresses_resolution = True
-        else:
-            self.cache_bar_addresses_resolution = False
-            self.flush_bar_address_cache()

-
-
[docs]    def flush_bar_address_cache(self) -> None:
-        self.cached_bar_addresses = {}

-
-    #
-    # Get base address of MMIO range by MMIO BAR name
-    #
-
[docs]    def get_MMIO_BAR_base_address(self, bar_name: str, bus: Optional[int] = None) -> Tuple[int, int]:
-        if self.cache_bar_addresses_resolution and (bar_name, bus) in self.cached_bar_addresses:
-            return self.cached_bar_addresses[(bar_name, bus)]
-        bar = self.cs.Cfg.MMIO_BARS[bar_name]
-        if bar is None or bar == {}:
-            return -1, -1
-        _bus = bus
-        limit = 0
-
-        if 'register' in bar:
-            preserve = True
-            bar_reg = bar['register']
-            if _bus is None:
-                _buses = self.cs.get_register_bus(bar_reg)
-                _bus = _buses[0] if _buses else None
-            if 'align_bits' in bar:
-                preserve = False
-            if 'base_field' in bar:
-                base_field = bar['base_field']
-                try:
-                    base = self.cs.read_register_field(bar_reg, base_field, preserve, bus=_bus)
-                except CSReadError:
-                    base = 0
-                    self.logger.log_hal(f'[mmio] Unable to determine MMIO Base.  Using Base = 0x{base:X}')
-                try:
-                    reg_mask = self.cs.get_register_field_mask(bar_reg, base_field, preserve)
-                except CSReadError:
-                    reg_mask = 0xFFFF
-                    self.logger.log_hal(f'[mmio] Unable to determine MMIO Mask.  Using Mask = 0x{reg_mask:X}')
-            else:
-                base = self.cs.read_register(bar_reg, bus=_bus)
-                reg_mask = self.cs.get_register_field_mask(bar_reg, preserve_field_position=preserve)
-            if 'limit_field' in bar:
-                limit_field = bar['limit_field']
-                limit = self.cs.read_register_field(bar_reg, limit_field, bus=_bus)
-            else:
-                if self.logger.HAL:
-                    self.logger.log_warning(f"[mmio] 'limit_field' field not defined for bar, using limit = 0x{limit:X}")
-        else:
-            # this method is not preferred (less flexible)
-            if _bus is not None:
-                b = _bus
-            else:
-                b = self.cs.get_first_bus(bar)
-            d = bar['dev']
-            f = bar['fun']
-            r = bar['reg']
-            width = bar['width']
-            reg_mask = (1 << (width * 8)) - 1
-            if 8 == width:
-                base_lo = self.cs.pci.read_dword(b, d, f, r)
-                base_hi = self.cs.pci.read_dword(b, d, f, r + 4)
-                base = (base_hi << 32) | base_lo
-            else:
-                base = self.cs.pci.read_dword(b, d, f, r)
-
-        if 'fixed_address' in bar and (base == reg_mask or base == 0):
-            base = bar['fixed_address']
-            self.logger.log_hal(f'[mmio] Using fixed address for {bar_name}: 0x{base:016X}')
-        if 'mask' in bar:
-            base &= bar['mask']
-        if 'offset' in bar:
-            base = base + bar['offset']
-        if 'align_bits' in bar:
-            _buses = self.cs.get_register_bus(bar['base_reg'])
-            _bus = _buses[0] if _buses else None
-            start = self.cs.read_register_field(bar['base_reg'], bar['base_addr'], bus=_bus)
-            start <<= int(bar['base_align'])
-            base <<= int(bar['align_bits'])
-            limit <<= int(bar['align_bits'])
-            base += start
-            limit += ((0x1 << int(bar['align_bits'])) - 1)
-            limit += start
-            size = limit - base
-        else:
-            size = bar['size'] if ('size' in bar) else DEFAULT_MMIO_BAR_SIZE
-
-        self.logger.log_hal(f'[mmio] {bar_name}: 0x{base:016X} (size = 0x{size:X})')
-        if base == 0:
-            self.logger.log_hal('[mmio] Base address was determined to be 0.')
-            raise CSReadError('[mmio] Base address was determined to be 0')
-
-        if self.cache_bar_addresses_resolution:
-            self.cached_bar_addresses[(bar_name, bus)] = (base, size)
-        return base, size

-
-    #
-    # Check if MMIO range is enabled by MMIO BAR name
-    #
-
[docs]    def is_MMIO_BAR_enabled(self, bar_name: str, bus: Optional[int] = None) -> bool:
-        if not self.is_MMIO_BAR_defined(bar_name):
-            return False
-        bar = self.cs.Cfg.MMIO_BARS[bar_name]
-        is_enabled = True
-        if 'register' in bar:
-            bar_reg = bar['register']
-            if 'enable_field' in bar:
-                bar_en_field = bar['enable_field']
-                is_enabled = (1 == self.cs.read_register_field(bar_reg, bar_en_field, bus=bus))
-        else:
-            # this method is not preferred (less flexible)
-            if bus is not None:
-                b = bus
-            else:
-                b = self.cs.get_first_bus(bar)
-            d = bar['dev']
-            f = bar['fun']
-            r = bar['reg']
-            width = bar['width']
-            if not self.cs.pci.is_enabled(b, d, f):
-                return False
-            if 8 == width:
-                base_lo = self.cs.pci.read_dword(b, d, f, r)
-                base_hi = self.cs.pci.read_dword(b, d, f, r + 4)
-                base = (base_hi << 32) | base_lo
-            else:
-                base = self.cs.pci.read_dword(b, d, f, r)
-
-            if 'enable_bit' in bar:
-                en_mask = 1 << int(bar['enable_bit'])
-                is_enabled = (0 != base & en_mask)
-
-        return is_enabled

-
-    #
-    # Check if MMIO range is programmed by MMIO BAR name
-    #
-
[docs]    def is_MMIO_BAR_programmed(self, bar_name: str) -> bool:
-        bar = self.cs.Cfg.MMIO_BARS[bar_name]
-
-        if 'register' in bar:
-            bar_reg = bar['register']
-            if 'base_field' in bar:
-                base_field = bar['base_field']
-                base = self.cs.read_register_field(bar_reg, base_field, preserve_field_position=True)
-            else:
-                base = self.cs.read_register(bar_reg)
-        else:
-            # this method is not preferred (less flexible)
-            b = self.cs.get_first_bus(bar)
-            d = bar['dev']
-            f = bar['fun']
-            r = bar['reg']
-            width = bar['width']
-            if 8 == width:
-                base_lo = self.cs.pci.read_dword(b, d, f, r)
-                base_hi = self.cs.pci.read_dword(b, d, f, r + 4)
-                base = (base_hi << 32) | base_lo
-            else:
-                base = self.cs.pci.read_dword(b, d, f, r)
-
-        #if 'mask' in bar: base &= bar['mask']
-        return (0 != base)

-
-    #
-    # Read MMIO register from MMIO range defined by MMIO BAR name
-    #
-
[docs]    def read_MMIO_BAR_reg(self, bar_name: str, offset: int, size: int = 4, bus: Optional[int] = None) -> int:
-        (bar_base, bar_size) = self.get_MMIO_BAR_base_address(bar_name, bus)
-        # @TODO: check offset exceeds BAR size
-        return self.read_MMIO_reg(bar_base, offset, size, bar_size)

-
-    #
-    # Write MMIO register from MMIO range defined by MMIO BAR name
-    #
-
[docs]    def write_MMIO_BAR_reg(self, bar_name: str, offset: int, value: int, size: int = 4, bus: Optional[int] = None) -> Optional[int]:
-        (bar_base, _) = self.get_MMIO_BAR_base_address(bar_name, bus)
-        # @TODO: check offset exceeds BAR size
-
-        return self.write_MMIO_reg(bar_base, offset, value, size)

-
-
[docs]    def read_MMIO_BAR(self, bar_name: str, bus: Optional[int] = None) -> List[int]:
-        (bar_base, bar_size) = self.get_MMIO_BAR_base_address(bar_name, bus)
-        return self.read_MMIO(bar_base, bar_size)

-
-    #
-    # Dump MMIO range by MMIO BAR name
-    #
-
[docs]    def dump_MMIO_BAR(self, bar_name: str) -> None:
-        (bar_base, bar_size) = self.get_MMIO_BAR_base_address(bar_name)
-        self.dump_MMIO(bar_base, bar_size)

-
-
[docs]    def list_MMIO_BARs(self) -> None:
-        self.logger.log('')
-        self.logger.log('--------------------------------------------------------------------------------------')
-        self.logger.log(' MMIO Range   | BUS | BAR Register   | Base             | Size     | En? | Description')
-        self.logger.log('--------------------------------------------------------------------------------------')
-        for _bar_name in self.cs.Cfg.MMIO_BARS:
-            if not self.is_MMIO_BAR_defined(_bar_name):
-                continue
-            _bar = self.cs.Cfg.MMIO_BARS[_bar_name]
-            bus_data = []
-            if 'register' in _bar:
-                bus_data = self.cs.get_register_bus(_bar['register'])
-                if not bus_data:
-                    if 'bus' in self.cs.get_register_def(_bar['register']):
-                        bus_data.extend(self.cs.get_register_def(_bar['register'])['bus'])
-            elif 'bus' in _bar:
-                bus_data.extend(_bar['bus'])
-            else:
-                continue
-            for bus in bus_data:
-                bus = self.cs.get_first(bus)
-                try:
-                    (_base, _size) = self.get_MMIO_BAR_base_address(_bar_name, bus)
-                except:
-                    self.logger.log_hal(f'Unable to find MMIO BAR {_bar}')
-                    continue
-                _en = self.is_MMIO_BAR_enabled(_bar_name)
-
-                if 'register' in _bar:
-                    _s = _bar['register']
-                    if 'offset' in _bar:
-                        _s += (f' + 0x{_bar["offset"]:X}')
-                else:
-                    bus_value = self.cs.get_first(_bar["bus"])
-                    dev_value = _bar["dev"]
-                    fun_value = _bar["fun"]
-                    _s = f'{bus_value:02X}:{dev_value:02X}.{fun_value:01X} + {_bar["reg"]}'
-
-                self.logger.log(f' {_bar_name:12} |  {bus or 0:02X} | {_s:14} | {_base:016X} | {_size:08X} | {_en:d}   | {_bar["desc"]}')

-
-    ##################################################################################
-    # Access to Memory Mapped PCIe Configuration Space
-    ##################################################################################
-
-
[docs]    def get_MMCFG_base_address(self) -> Tuple[int, int]:
-        (bar_base, bar_size) = self.get_MMIO_BAR_base_address('MMCFG')
-        if self.cs.register_has_field("PCI0.0.0_PCIEXBAR", "LENGTH") and not self.cs.is_server():
-            len = self.cs.read_register_field("PCI0.0.0_PCIEXBAR", "LENGTH")
-            if len == PCI_PCIEXBAR_REG_LENGTH_256MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 2)
-            elif len == PCI_PCIEXBAR_REG_LENGTH_128MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 1)
-            if len == PCI_PCIEXBAR_REG_LENGTH_64MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 0)
-            if len == PCI_PCIEXBAR_REG_LENGTH_512MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 3)
-            if len == PCI_PCIEXBAR_REG_LENGTH_1024MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 4)
-            if len == PCI_PCIEXBAR_REG_LENGTH_2048MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 5)
-            if len == PCI_PCIEXBAR_REG_LENGTH_4096MB:
-                bar_base &= (PCI_PCIEBAR_REG_MASK << 6)
-        if self.cs.register_has_field("MmioCfgBaseAddr", "BusRange"):
-            num_buses = self.cs.read_register_field("MmioCfgBaseAddr", "BusRange")
-            if num_buses <= 8:
-                bar_size = 2**20 * 2**num_buses
-            else:
-                self.logger.log_hal(f'[mmcfg] Unexpected MmioCfgBaseAddr bus range: 0x{num_buses:01X}')
-        self.logger.log_hal(f'[mmcfg] Memory Mapped CFG Base: 0x{bar_base:016X}')
-        return bar_base, bar_size

-
-
[docs]    def read_mmcfg_reg(self, bus: int, dev: int, fun: int, off: int, size: int) -> int:
-        pciexbar, _ = self.get_MMCFG_base_address()
-        pciexbar_off = (bus * 32 * 8 + dev * 8 + fun) * 0x1000 + off
-        value = self.read_MMIO_reg(pciexbar, pciexbar_off, size)
-        self.logger.log_hal(f'[mmcfg] reading {bus:02d}:{dev:02d}.{fun:d} + 0x{off:02X} (MMCFG + 0x{pciexbar_off:08X}): 0x{value:08X}')
-        if 1 == size:
-            return (value & 0xFF)
-        elif 2 == size:
-            return (value & 0xFFFF)
-        return value

-
-
[docs]    def write_mmcfg_reg(self, bus: int, dev: int, fun: int, off: int, size: int, value: int) -> bool:
-        pciexbar, _ = self.get_MMCFG_base_address()
-        pciexbar_off = (bus * 32 * 8 + dev * 8 + fun) * 0x1000 + off
-        if size == 1:
-            mask = 0xFF
-        elif size == 2:
-            mask = 0xFFFF
-        else:
-            mask = 0xFFFFFFFF
-        self.write_MMIO_reg(pciexbar, pciexbar_off, (value & mask), size)
-        self.logger.log_hal(f'[mmcfg] writing {bus:02d}:{dev:02d}.{fun:d} + 0x{off:02X} (MMCFG + 0x{pciexbar_off:08X}): 0x{value:08X}')
-        return True

-
-
[docs]    def get_extended_capabilities(self, bus: int, dev: int, fun: int) -> List['ECEntry']:
-        retcap = []
-        off = 0x100
-        while off and off != 0xFFF:
-            cap = self.read_mmcfg_reg(bus, dev, fun, off, 4)
-            retcap.append(ECEntry(bus, dev, fun, off, cap))
-            off = get_bits(cap, 20, 12)
-        return retcap

-
-
[docs]    def get_vsec(self, bus: int, dev: int, fun: int, ecoff: int) -> 'VSECEntry':
-        off = ecoff + 4
-        vsec = self.read_mmcfg_reg(bus, dev, fun, off, 4)
-        return VSECEntry(vsec)

-
-
-
[docs]class ECEntry:
-    def __init__(self, bus: int, dev: int, fun: int, off: int, value: int):
-        self.bus = bus
-        self.dev = dev
-        self.fun = fun
-        self.off = off
-        self.next = get_bits(value, 20, 12)
-        self.ver = get_bits(value, 16, 4)
-        self.id = get_bits(value, 0, 16)
-
-    def __str__(self) -> str:
-        ret = f'\tNext Capability Offset: {self.next:03X}'
-        ret += f'\tCapability Version: {self.ver:01X}'
-        ret += f'\tCapability ID: {self.id:04X} - {ecIDs.get(self.id, "Reserved")}'
-        return ret

-
-
-
[docs]class VSECEntry:
-    def __init__(self, value: int):
-        self.size = get_bits(value, 20, 12)
-        self.rev = get_bits(value, 16, 4)
-        self.id = get_bits(value, 0, 16)
-
-    def __str__(self) -> str:
-        ret = f'\tVSEC Size: {self.size:03X}'
-        ret += f'\tVSEC Revision: {self.rev:01X}'
-        ret += f'\tVSEC ID: {self.id:04X}'
-        return ret

-
-
-
-
-
-# pci extended capability IDs
-ecIDs = {
-    0x0: 'Null Capability',
-    0x1: 'Advanced Error Reporting (AER)',
-    0x2: 'Virtual Channel (VC)',
-    0x3: 'Device Serial Number',
-    0x4: 'Power Budgeting',
-    0x5: 'Root Complex Link Declaration',
-    0x6: 'Root Complex Internal Link Control',
-    0x7: 'Root Complex Event Collector Endpoint Association',
-    0x8: 'Multi-Function Virtual Channel (MFVC)',
-    0x9: 'Virtual Channel (VC)',
-    0xA: 'Root Complex Register Block (RCRB) Header',
-    0xB: 'Vendor-Specific Extended Capability (VSEC)',
-    0xC: 'Configuration Access Correlation (CAC)',
-    0xD: 'Access Control Services (ACS)',
-    0xE: 'Alternative Routing-ID Interpretation (ARI)',
-    0xF: 'Address Translation Services (ATS)',
-    0x10: 'Single Root I/O Virtualizaiton (SR-IOV)',
-    0x11: 'Multi-Root I/O Virtualization (MR-IOV)',
-    0x12: 'Multicast',
-    0x13: 'Page Request Interface (PRI)',
-    0x14: 'Reserved for AMD',
-    0x15: 'Resizable BAR',
-    0x16: 'Dynamic Power Allocation (DPA)',
-    0x17: 'TPH Requester',
-    0x18: 'Latency Tolerance Reporting (LTR)',
-    0x19: 'Secondary PCI Express',
-    0x1A: 'Protocol Multiplexing (PMUX)',
-    0x1B: 'Process Address Space ID (PASID)',
-    0x1C: 'LN Requester (LNR)',
-    0x1D: 'Downstream Port Containment (DPC)',
-    0x1E: 'L1 PM Substates',
-    0x1F: 'Precision Time Measurement (PTM)',
-    0x20: 'PCI Express over M-PHY (M-PCIe)',
-    0x21: 'FRS Queueing',
-    0x22: 'Readiness Time Reporting',
-    0x23: 'Designanated Vendor-Specific Extended Capability',
-    0x24: 'VF Resizable BAR',
-    0x25: 'Data Link Feature',
-    0x26: 'Physical Layer 16.0 GT/s',
-    0x27: 'Lane Margining at the Receiver',
-    0x28: 'Hiearchy ID',
-    0x29: 'Native PCIe Enclosure Management (NPEM)',
-    0x2A: 'Physical Layer 32.0 GT/s',
-    0x2B: 'Alternative Protocol',
-    0x2C: 'System Firmware Intermediary (SFI)',
-    0x2D: 'Shadow Functions',
-    0x2E: 'Data Object Exchange'
-}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/msgbus.html b/_modules/chipsec/hal/msgbus.html deleted file mode 100644 index 9eaa1d54..00000000 --- a/_modules/chipsec/hal/msgbus.html +++ /dev/null @@ -1,331 +0,0 @@ - - - - - - - - chipsec.hal.msgbus — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.msgbus

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Access to message bus (IOSF sideband) interface registers on Intel SoCs
-
-References:
-
-- Intel(R) Atom(TM) Processor D2000 and N2000 Series Datasheet, Volume 2, July 2012, Revision 003
-  http://www.intel.com/content/dam/doc/datasheet/atom-d2000-n2000-vol-2-datasheet.pdf (section 1.10.2)
-
-usage:
-    >>> msgbus_reg_read( port, register )
-    >>> msgbus_reg_write( port, register, data )
-    >>> msgbus_read_message( port, register, opcode )
-    >>> msgbus_write_message( port, register, opcode, data )
-    >>> msgbus_send_message( port, register, opcode, data )
-"""
-
-from typing import Optional
-from chipsec.hal import hal_base
-from chipsec.exceptions import RegisterNotFoundError
-
-
-#
-# IOSF Message bus message opcodes
-# Reference: http://lxr.free-electrons.com/source/arch/x86/include/asm/iosf_mbi.h
-#
-
[docs]class MessageBusOpcode:
-    MB_OPCODE_MMIO_READ = 0x00
-    MB_OPCODE_MMIO_WRITE = 0x01
-    MB_OPCODE_IO_READ = 0x02
-    MB_OPCODE_IO_WRITE = 0x03
-    MB_OPCODE_CFG_READ = 0x04
-    MB_OPCODE_CFG_WRITE = 0x05
-    MB_OPCODE_CR_READ = 0x06
-    MB_OPCODE_CR_WRITE = 0x07
-    MB_OPCODE_REG_READ = 0x10
-    MB_OPCODE_REG_WRITE = 0x11
-    MB_OPCODE_ESRAM_READ = 0x12
-    MB_OPCODE_ESRAM_WRITE = 0x13

-
-#
-# IOSF Message bus unit ports
-# Reference: http://lxr.free-electrons.com/source/arch/x86/include/asm/iosf_mbi.h
-# @TODO: move these to per-platform XML config?
-#
-
-
-
[docs]class MessageBusPort_Atom:
-    UNIT_AUNIT = 0x00
-    UNIT_SMC = 0x01
-    UNIT_CPU = 0x02
-    UNIT_BUNIT = 0x03
-    UNIT_PMC = 0x04
-    UNIT_GFX = 0x06
-    UNIT_SMI = 0x0C
-    UNIT_USB = 0x43
-    UNIT_SATA = 0xA3
-    UNIT_PCIE = 0xA6

-
-
-
[docs]class MessageBusPort_Quark:
-    UNIT_HBA = 0x00
-    UNIT_HB = 0x03
-    UNIT_RMU = 0x04
-    UNIT_MM = 0x05
-    UNIT_SOC = 0x31

-
-
-
[docs]class MsgBus(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(MsgBus, self).__init__(cs)
-        self.helper = cs.helper
-        self.p2sbHide = None
-
-    def __MB_MESSAGE_MCR(self, port: int, reg: int, opcode: int) -> int:
-        mcr = 0x0
-        mcr = self.cs.set_register_field('MSG_CTRL_REG', mcr, 'MESSAGE_WR_BYTE_ENABLES', 0xF)
-        mcr = self.cs.set_register_field('MSG_CTRL_REG', mcr, 'MESSAGE_ADDRESS_OFFSET', reg)
-        mcr = self.cs.set_register_field('MSG_CTRL_REG', mcr, 'MESSAGE_PORT', port)
-        mcr = self.cs.set_register_field('MSG_CTRL_REG', mcr, 'MESSAGE_OPCODE', opcode)
-        return mcr
-
-    def __MB_MESSAGE_MCRX(self, reg: int) -> int:
-        mcrx = 0x0
-        mcrx = self.cs.set_register_field('MSG_CTRL_REG_EXT', mcrx, 'MESSAGE_ADDRESS_OFFSET_EXT', (reg >> 8), preserve_field_position=True)
-        return mcrx
-
-    def __MB_MESSAGE_MDR(self, data: int) -> int:
-        mdr = 0x0
-        mdr = self.cs.set_register_field('MSG_DATA_REG', mdr, 'MESSAGE_DATA', data)
-        return mdr
-
-    def __hide_p2sb(self, hide: bool) -> bool:
-        if not self.p2sbHide:
-            if self.cs.register_has_field("P2SBC", "HIDE"):
-                self.p2sbHide = {'reg': 'P2SBC', 'field': 'HIDE'}
-            elif self.cs.register_has_field("P2SB_HIDE", "HIDE"):
-                self.p2sbHide = {'reg': 'P2SB_HIDE', 'field': 'HIDE'}
-            else:
-                raise RegisterNotFoundError('RegisterNotFound: P2SBC')
-
-        hidden = not self.cs.is_device_enabled('P2SBC')
-        if hide:
-            self.cs.write_register_field(self.p2sbHide['reg'], self.p2sbHide['field'], 1)
-        else:
-            self.cs.write_register_field(self.p2sbHide['reg'], self.p2sbHide['field'], 0)
-        return hidden
-
-    #
-    # Issues read message on the message bus
-    #
-
[docs]    def msgbus_read_message(self, port: int, register: int, opcode: int) -> Optional[int]:
-        mcr = self.__MB_MESSAGE_MCR(port, register, opcode)
-        mcrx = self.__MB_MESSAGE_MCRX(register)
-
-        self.logger.log_hal(f'[msgbus] Read: port 0x{port:02X} + 0x{register:08X} (op = 0x{opcode:02X})')
-        self.logger.log_hal(f'[msgbus]       MCR = 0x{mcr:08X}, MCRX = 0x{mcrx:08X}')
-
-        mdr_out = self.helper.msgbus_send_read_message(mcr, mcrx)
-
-        self.logger.log_hal(f'[msgbus]       < 0x{mdr_out:08X}')
-
-        return mdr_out

-
-    #
-    # Issues write message on the message bus
-    #
-
[docs]    def msgbus_write_message(self, port: int, register: int, opcode: int, data: int) -> None:
-        mcr = self.__MB_MESSAGE_MCR(port, register, opcode)
-        mcrx = self.__MB_MESSAGE_MCRX(register)
-        mdr = self.__MB_MESSAGE_MDR(data)
-
-        self.logger.log_hal(f'[msgbus] Write: port 0x{port:02X} + 0x{register:08X} (op = 0x{opcode:02X}) < data = 0x{data:08X}')
-        self.logger.log_hal(f'[msgbus]        MCR = 0x{mcr:08X}, MCRX = 0x{mcrx:08X}, MDR = 0x{mdr:08X}')
-
-        return self.helper.msgbus_send_write_message(mcr, mcrx, mdr)

-
-    #
-    # Issues generic message on the message bus
-    #
-
[docs]    def msgbus_send_message(self, port: int, register: int, opcode: int, data: Optional[int] = None) -> Optional[int]:
-        mcr = self.__MB_MESSAGE_MCR(port, register, opcode)
-        mcrx = self.__MB_MESSAGE_MCRX(register)
-        mdr = None if data is None else self.__MB_MESSAGE_MDR(data)
-
-        self.logger.log_hal(f'[msgbus] message: port 0x{port:02X} + 0x{register:08X} (op = 0x{opcode:02X})')
-        if data is not None:
-            self.logger.log_hal(f'[msgbus]          data = 0x{data:08X}')
-        self.logger.log_hal(f'[msgbus]          MCR = 0x{mcr:08X}, MCRX = 0x{mcrx:08X}, MDR = 0x{mdr:08X}')
-
-        mdr_out = self.helper.msgbus_send_message(mcr, mcrx, mdr)
-
-        self.logger.log_hal(f'[msgbus]          < 0x{mdr_out:08X}')
-
-        return mdr_out

-
-    #
-    # Message bus register read/write
-    #
-
-
[docs]    def msgbus_reg_read(self, port: int, register: int) -> Optional[int]:
-        return self.msgbus_read_message(port, register, MessageBusOpcode.MB_OPCODE_REG_READ)

-
-
[docs]    def msgbus_reg_write(self, port: int, register: int, data: int) -> None:
-        return self.msgbus_write_message(port, register, MessageBusOpcode.MB_OPCODE_REG_WRITE, data)

-
-
[docs]    def mm_msgbus_reg_read(self, port: int, register: int) -> int:
-        was_hidden = False
-        if self.cs.is_register_defined('P2SBC'):
-            was_hidden = self.__hide_p2sb(False)
-        mmio_addr = self.cs.mmio.get_MMIO_BAR_base_address('SBREGBAR')[0]
-        reg_val = self.cs.mmio.read_MMIO_reg_dword(mmio_addr, ((port & 0xFF) << 16) | (register & 0xFFFF))
-        if self.cs.is_register_defined('P2SBC') and was_hidden:
-            self.__hide_p2sb(True)
-        return reg_val

-
-
[docs]    def mm_msgbus_reg_write(self, port: int, register: int, data: int) -> Optional[int]:
-        was_hidden = False
-        if self.cs.is_register_defined('P2SBC'):
-            was_hidden = self.__hide_p2sb(False)
-        mmio_addr = self.cs.mmio.get_MMIO_BAR_base_address('SBREGBAR')[0]
-        reg_val = self.cs.mmio.write_MMIO_reg_dword(mmio_addr, ((port & 0xFF) << 16) | (register & 0xFFFF), data)
-        if self.cs.is_register_defined('P2SBC') and was_hidden:
-            self.__hide_p2sb(True)
-        return reg_val

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/msr.html b/_modules/chipsec/hal/msr.html deleted file mode 100644 index 7bad4ad1..00000000 --- a/_modules/chipsec/hal/msr.html +++ /dev/null @@ -1,295 +0,0 @@ - - - - - - - - chipsec.hal.msr — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.msr

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Access to CPU resources (for each CPU thread): Model Specific Registers (MSR), IDT/GDT
-
-usage:
-    >>> read_msr( 0x8B )
-    >>> write_msr( 0x79, 0x12345678 )
-    >>> get_IDTR( 0 )
-    >>> get_GDTR( 0 )
-    >>> dump_Descriptor_Table( 0, DESCRIPTOR_TABLE_CODE_IDTR )
-    >>> IDT( 0 )
-    >>> GDT( 0 )
-    >>> IDT_all()
-    >>> GDT_all()
-"""
-
-from typing import Dict, Tuple, Optional
-from chipsec.logger import logger, print_buffer_bytes
-
-
-DESCRIPTOR_TABLE_CODE_IDTR = 0
-DESCRIPTOR_TABLE_CODE_GDTR = 1
-DESCRIPTOR_TABLE_CODE_LDTR = 2
-
-MTRR_MEMTYPE_UC = 0x0
-MTRR_MEMTYPE_WC = 0x1
-MTRR_MEMTYPE_WT = 0x4
-MTRR_MEMTYPE_WP = 0x5
-MTRR_MEMTYPE_WB = 0x6
-MemType: Dict[int, str] = {
-    MTRR_MEMTYPE_UC: 'Uncacheable (UC)',
-    MTRR_MEMTYPE_WC: 'Write Combining (WC)',
-    MTRR_MEMTYPE_WT: 'Write-through (WT)',
-    MTRR_MEMTYPE_WP: 'Write-protected (WP)',
-    MTRR_MEMTYPE_WB: 'Writeback (WB)'
-}
-
-
-
[docs]class Msr:
-
-    def __init__(self, cs):
-        self.helper = cs.helper
-        self.cs = cs
-
-
[docs]    def get_cpu_thread_count(self) -> int:
-        thread_count = self.helper.get_threads_count()
-        if thread_count is None or thread_count < 0:
-            logger().log_hal("helper.get_threads_count didn't return anything. Reading MSR 0x35 to find out number of logical CPUs (use CPUID Leaf B instead?)")
-            thread_count = self.cs.read_register_field("IA32_MSR_CORE_THREAD_COUNT", "Thread_Count")
-
-        if 0 == thread_count:
-            thread_count = 1
-        logger().log_hal(f'[cpu] # of logical CPUs: {thread_count:d}')
-        return thread_count

-
-    # @TODO: fix
-
[docs]    def get_cpu_core_count(self) -> int:
-        core_count = self.cs.read_register_field("IA32_MSR_CORE_THREAD_COUNT", "Core_Count")
-        return core_count

-
-
-##########################################################################################################
-#
-# Read/Write CPU MSRs
-#
-##########################################################################################################
-
-
-
[docs]    def read_msr(self, cpu_thread_id: int, msr_addr: int) -> Tuple[int, int]:
-        (eax, edx) = self.helper.read_msr(cpu_thread_id, msr_addr)
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] RDMSR( 0x{msr_addr:x} ): EAX = 0x{eax:08X}, EDX = 0x{edx:08X}')
-        return (eax, edx)

-
-
[docs]    def write_msr(self, cpu_thread_id: int, msr_addr: int, eax: int, edx: int) -> None:
-        self.helper.write_msr(cpu_thread_id, msr_addr, eax, edx)
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] WRMSR( 0x{msr_addr:x} ): EAX = 0x{eax:08X}, EDX = 0x{edx:08X}')
-        return None

-
-##########################################################################################################
-#
-# Get CPU Descriptor Table Registers (IDTR, GDTR, LDTR..)
-#
-##########################################################################################################
-
-
[docs]    def get_Desc_Table_Register(self, cpu_thread_id: int, code: int) -> Tuple[int, int, int]:
-        desc_table = self.helper.get_descriptor_table(cpu_thread_id, code)
-        if desc_table is None:
-            logger().log_hal(f'[msr] Unable to locate CPU Descriptor Table: Descriptor table code = {code:d}')
-            return (0, 0, 0)
-        return desc_table

-
-
[docs]    def get_IDTR(self, cpu_thread_id: int) -> Tuple[int, int, int]:
-        (limit, base, pa) = self.get_Desc_Table_Register(cpu_thread_id, DESCRIPTOR_TABLE_CODE_IDTR)
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] IDTR Limit = 0x{limit:04X}, Base = 0x{base:016X}, Physical Address = 0x{pa:016X}')
-        return (limit, base, pa)

-
-
[docs]    def get_GDTR(self, cpu_thread_id: int) -> Tuple[int, int, int]:
-        (limit, base, pa) = self.get_Desc_Table_Register(cpu_thread_id, DESCRIPTOR_TABLE_CODE_GDTR)
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] GDTR Limit = 0x{limit:04X}, Base = 0x{base:016X}, Physical Address = 0x{pa:016X}')
-        return (limit, base, pa)

-
-
[docs]    def get_LDTR(self, cpu_thread_id: int) -> Tuple[int, int, int]:
-        (limit, base, pa) = self.get_Desc_Table_Register(cpu_thread_id, DESCRIPTOR_TABLE_CODE_LDTR)
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] LDTR Limit = 0x{limit:04X}, Base = 0x{base:016X}, Physical Address = 0x{pa:016X}')
-        return (limit, base, pa)

-
-
-##########################################################################################################
-#
-# Dump CPU Descriptor Tables (IDT, GDT, LDT..)
-#
-##########################################################################################################
-
-
-
[docs]    def dump_Descriptor_Table(self, cpu_thread_id: int, code: int, num_entries: Optional[int] = None) -> Tuple[int, int]:
-        (limit, _, pa) = self.helper.get_descriptor_table(cpu_thread_id, code)
-        dt = self.helper.read_phys_mem(pa, limit + 1)
-        total_num = len(dt) // 16
-        if (num_entries is None) or (total_num < num_entries):
-            num_entries = total_num
-        logger().log(f'[cpu{cpu_thread_id:d}] Physical Address: 0x{pa:016X}')
-        logger().log(f'[cpu{cpu_thread_id:d}] # of entries    : {total_num:d}')
-        logger().log(f'[cpu{cpu_thread_id:d}] Contents ({num_entries:d} entries):')
-        print_buffer_bytes(dt)
-        logger().log('--------------------------------------')
-        logger().log('#    segment:offset         attributes')
-        logger().log('--------------------------------------')
-        for i in range(0, num_entries):
-            offset = (dt[i * 16 + 11] << 56) | (dt[i * 16 + 10] << 48) | (dt[i * 16 + 9] << 40) | (dt[i * 16 + 8] << 32) | (dt[i * 16 + 7] << 24) | (dt[i * 16 + 6] << 16) | (dt[i * 16 + 1] << 8) | dt[i * 16 + 0]
-            segsel = (dt[i * 16 + 3] << 8) | dt[i * 16 + 2]
-            attr = (dt[i * 16 + 5] << 8) | dt[i * 16 + 4]
-            logger().log(f'{i:03d}  {segsel:04X}:{offset:016X}  0x{attr:04X}')
-
-        return (pa, dt)

-
-
[docs]    def IDT(self, cpu_thread_id: int, num_entries: Optional[int] = None) -> Tuple[int, int]:
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] IDT:')
-        return self.dump_Descriptor_Table(cpu_thread_id, DESCRIPTOR_TABLE_CODE_IDTR, num_entries)

-
-
[docs]    def GDT(self, cpu_thread_id: int, num_entries: Optional[int] = None) -> Tuple[int, int]:
-        logger().log_hal(f'[cpu{cpu_thread_id:d}] GDT:')
-        return self.dump_Descriptor_Table(cpu_thread_id, DESCRIPTOR_TABLE_CODE_GDTR, num_entries)

-
-
[docs]    def IDT_all(self, num_entries: Optional[int] = None) -> None:
-        for tid in range(self.get_cpu_thread_count()):
-            self.IDT(tid, num_entries)

-
-
[docs]    def GDT_all(self, num_entries: Optional[int] = None) -> None:
-        for tid in range(self.get_cpu_thread_count()):
-            self.GDT(tid, num_entries)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/paging.html b/_modules/chipsec/hal/paging.html deleted file mode 100644 index 5396547b..00000000 --- a/_modules/chipsec/hal/paging.html +++ /dev/null @@ -1,744 +0,0 @@ - - - - - - - - chipsec.hal.paging — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.paging

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-x64/IA-64 Paging functionality including x86 page tables, Extended Page Tables (EPT) and VT-d page tables
-"""
-
-import sys
-import struct
-from typing import Dict, List, Optional, Any
-import chipsec.defines
-from chipsec.logger import logger
-from chipsec.exceptions import InvalidMemoryAddress
-
-ADDR_MASK = chipsec.defines.MASK_64b
-MAXPHYADDR = 0x000FFFFFFFFFF000
-
-SIZE_4KB = chipsec.defines.BOUNDARY_4KB
-SIZE_2MB = chipsec.defines.BOUNDARY_2MB
-SIZE_1GB = chipsec.defines.BOUNDARY_1GB
-ADDR_4KB = 0xFFFFFFFFFFFFF000 & MAXPHYADDR
-ADDR_2MB = 0xFFFFFFFFFFE00000 & MAXPHYADDR
-ADDR_1GB = 0xFFFFFFFFC0000000 & MAXPHYADDR
-
-TranslationType = Dict[int, Dict[str, Any]]  # TODO: TypedDict (PEP589)
-
-
[docs]class c_translation:
-
-    def __init__(self):
-        self.translation: TranslationType = {}
-
-
[docs]    def is_translation_exist(self, addr: int, mask: int, size: str) -> bool:
-        return ((addr & mask) in self.translation) and (self.translation[addr & mask]['size'] == size)

-
-
[docs]    def get_translation(self, addr: int) -> Optional[int]:
-        if len(self.translation) == 0:
-            return addr
-        ADDR_4KB = 0xFFFFFFFFFFFFF000
-        ADDR_2MB = 0xFFFFFFFFFFE00000
-        ADDR_1GB = 0xFFFFFFFFC0000000
-        if self.is_translation_exist(addr, ADDR_4KB, '4KB'):
-            result = self.translation[addr & ADDR_4KB]['addr'] | (addr & ~ADDR_4KB)
-        elif self.is_translation_exist(addr, ADDR_2MB, '2MB'):
-            result = self.translation[addr & ADDR_2MB]['addr'] | (addr & ~ADDR_2MB)
-        elif self.is_translation_exist(addr, ADDR_1GB, '1GB'):
-            result = self.translation[addr & ADDR_1GB]['addr'] | (addr & ~ADDR_1GB)
-        else:
-            result = None
-        return result

-
-
[docs]    def get_pages_by_physaddr(self, addr: int) -> List[Dict[str, int]]:
-        SIZE = {'4KB': ADDR_4KB, '2MB': ADDR_2MB, '1GB': ADDR_1GB}
-        result = []
-        for i in self.translation.keys():
-            page = self.translation[i]
-            size = SIZE[page['size']]
-            if (page['addr'] & size) == (addr & size):
-                result.append(page)
-        return result

-
-
[docs]    def get_address_space(self) -> int:
-        total = 0
-        mem_range = self.get_mem_range()
-        for i in mem_range:
-            total += i[1] - i[0]
-        return total

-
-
[docs]    def get_mem_range(self, noattr: bool = False) -> List[List[int]]:
-        SIZE = {'4KB': SIZE_4KB, '2MB': SIZE_2MB, '1GB': SIZE_1GB}
-        perm = {self.translation[a]['addr']: self.translation[a] for a in self.translation.keys()}
-        mem_range = []
-        for addr in sorted(perm.keys()):
-            attr = perm[addr]['attr']
-            size = SIZE[perm[addr]['size']]
-            if noattr:
-                attr = ''
-            if (mem_range == []):
-                mem_range += [[addr, addr + size, attr]]
-            elif (mem_range[-1][1] == addr) and (mem_range[-1][2] == attr):
-                mem_range[-1][1] += size
-            else:
-                mem_range += [[addr, addr + size, attr]]
-        return mem_range

-
-
[docs]    def add_page(self, virt: int, phys: int, size: str, attr: str) -> None:
-        if size not in ['4KB', '2MB', '4MB', '1GB']:
-            raise Exception('Invalid size!')
-        self.translation[virt] = {'addr': phys, 'size': size, 'attr': attr}
-        return

-
-
[docs]    def del_page(self, addr: int) -> None:
-        if addr in self.translation:
-            del self.translation[addr]
-        return

-
-
[docs]    def expand_pages(self, exp_size: str) -> None:
-        SIZE = {'1GB': '2MB', '2MB': '4KB'}
-        for virt in self.translation.keys():
-            size = self.translation[virt]['size']
-            attr = self.translation[virt]['attr']
-            phys = self.translation[virt]['addr']
-            pgsize = (1 << 12) if size == '2MB' else (1 << 20)
-            if size == exp_size:
-                for i in range(512):
-                    self.add_page(virt + i * pgsize, phys + i * pgsize, SIZE[exp_size], attr)
-        return

-
-
-
[docs]class c_reverse_translation:
-
-    def __init__(self, translation: TranslationType):
-        self.reverse_translation: Dict[int, List[Dict[str, Any]]] = {}
-        for virt in translation.keys():
-            phys = translation[virt]['addr']
-            size = translation[virt]['size']
-            attr = translation[virt]['attr']
-            if phys not in self.reverse_translation:
-                self.reverse_translation[phys] = []
-            self.reverse_translation[phys].append({'addr': virt, 'size': size, 'attr': attr})
-
-
[docs]    def get_reverse_translation(self, addr: int) ->  List[Dict[str, Any]]:
-        ADDR_4KB = 0xFFFFFFFFFFFFF000
-        addr &= ADDR_4KB
-        return self.reverse_translation[addr] if addr in self.reverse_translation else []

-
-
-
[docs]class c_paging_memory_access:
-
-    def __init__(self, cs):
-        self.cs = cs
-
-
[docs]    def readmem(self, name: str, addr: int, size: int = 4096) -> bytes:
-        return self.cs.mem.read_physical_mem(addr, size)

-
-
-
[docs]class c_paging_with_2nd_level_translation(c_paging_memory_access):
-
-    def __init__(self, cs):
-        c_paging_memory_access.__init__(self, cs)
-        self.translation_level2 = c_translation()
-
-
[docs]    def readmem(self, name: str, addr: int, size: int = 4096) -> bytes:
-        phys = self.translation_level2.get_translation(addr)
-        if phys is None:
-            logger().log_hal('[paging] get_translation(): phys is None. Returning 0.')
-            return b''
-        if phys != addr:
-            name += f'_0x{phys:08X}'
-        return super(c_paging_with_2nd_level_translation, self).readmem(name, phys, size)

-
-
-
[docs]class c_paging(c_paging_with_2nd_level_translation, c_translation):
-    def __init__(self, cs):
-        c_paging_with_2nd_level_translation.__init__(self, cs)
-        c_translation.__init__(self)
-        # variables
-        self.did = 0
-        self.out = sys.stdout
-        self.name = ''
-        self.pt = {}
-        self.pointer = None
-        self.failure = False
-        self.canonical_msb = 47
-
-
[docs]    def get_canonical(self, va: int) -> int:
-        canonical_mask = (ADDR_MASK << (self.canonical_msb + 1)) & ADDR_MASK
-        canonical_va = (va | canonical_mask) if (va >> self.canonical_msb) & 0x1 else va
-        return canonical_va

-
-
[docs]    def get_field(self, entry: int, desc: Dict[str, int]) -> int:
-        return (entry >> desc['offset']) & desc['mask']

-
-
[docs]    def set_field(self, value: int, desc: Dict[str, int]) -> int:
-        return (value & desc['mask']) << desc['offset']

-
-
[docs]    def read_entries(self, info: str, addr: int, size: int = 8) -> List[Any]:
-        data = self.readmem(f'{self.name}_{info}_0x{addr:08X}', addr, 0x1000)
-        entries = struct.unpack('<512Q', data)
-        if size == 16:
-            entries = [[entries[i], entries[i + 1]] for i in range(0, 512, 2)]
-
-        same = True
-        for i in range(len(entries)):
-            same = same and (entries[0] == entries[i])
-        if same:
-            return [entries[0]]
-        return entries

-
-
[docs]    def print_info(self, name: str) -> None:
-        logger().log(f'\n  {name} physical address ranges:')
-        mem_range = self.get_mem_range()
-        for index in range(len(mem_range)):
-            i = mem_range[index]
-            logger().log(f'    0x{i[0]:013X} - 0x{i[1] - 1:013X} {(i[1] - i[0]) >> 12:8d}  {i[2]}')
-
-        logger().log(f'\n  {name} pages:')
-        for i in sorted(self.pt.keys()):
-            logger().log(f'    0x{i:013X}  {self.pt[i]}')
-        logger().log('\n')
-        logger().log(f'  {name} size: {len(self.pt.keys()) * 4:d} KB, address space: {self.get_address_space() >> 20:d} MB')
-        return

-
-
[docs]    def check_misconfig(self, addr_list: List[int]) -> None:
-        addr_list = [x & MAXPHYADDR for x in addr_list]
-        mem_range = self.get_mem_range()
-        for addr in addr_list:
-            for i in range(len(mem_range)):
-                if (mem_range[i][0] <= addr) and (addr < mem_range[i][1]):
-                    logger().log_hal(f'*** WARNING: PAGE TABLES MISCONFIGURATION  0x{addr:013X}')
-        return

-
-
[docs]    def save_configuration(self, path: str) -> None:
-        with open(path, 'w') as cfg:
-            try:
-                cfg.write(str(self.translation_level2.translation) + '\n')
-                cfg.write(str(self.translation) + '\n')
-                cfg.write(str(self.pt))
-            except:
-                logger().log_hal(f'[paging] Error saving: {path}')
-        return

-
-
[docs]    def load_configuration(self, path: str) -> None:
-        with open(path, 'r') as cfg:
-            try:
-                self.translation_level2.translation = eval(cfg.readline())
-                self.translation = eval(cfg.readline())
-                self.pt = eval(cfg.readline())
-            except:
-                logger().log_hal(f'[paging] Error loading: {path}')
-        return

-
-
[docs]    def read_pt_and_show_status(self, path: str, name: str, ptr: int) -> None:
-        logger().log_hal(f'[paging] Reading {name} page tables at 0x{ptr:016X}...')
-        try:
-            self.read_page_tables(ptr)
-        except InvalidMemoryAddress:
-            self.translation_level2.translation = {}
-            self.translation = {}
-            self.pt = {}
-            self.failure = True
-            if logger().HAL:
-                logger().log_error(f'    Invalid {name} Page Tables!')
-        else:
-            self.print_info(f'[paging] {name} page tables')
-            self.failure = False
-            logger().log_hal(f'[paging] size: {len(self.pt.keys()) * 4:d} KB, address space: {self.get_address_space() >> 20:d} MB')
-        return

-
-
[docs]    def read_page_tables(self, entry: int):
-        raise Exception("Function needs to be implemented by child class")

-
-
-
[docs]class c_4level_page_tables(c_paging):
-
-    def __init__(self, cs):
-        c_paging.__init__(self, cs)
-        # constants
-        self.PHYSICAL_ADDR_NAME = ''
-        self.PML4_INDX = {'mask': 0x1FF, 'offset': 39}
-        self.PDPT_INDX = {'mask': 0x1FF, 'offset': 30}
-        self.PD_INDX = {'mask': 0x1FF, 'offset': 21}
-        self.PT_INDX = {'mask': 0x1FF, 'offset': 12}
-        self.PT_NAME = ['EPTP', 'PML4E', 'PDPTE', 'PDE', 'PTE']
-        self.PT_SIZE = ['', '', '1GB', '2MB', '4KB']
-
-
[docs]    def get_virt_addr(self, pml4e_index: int, pdpte_index: int = 0, pde_index: int = 0, pte_index: int = 0) -> int:
-        ofs1 = self.set_field(pml4e_index, self.PML4_INDX)
-        ofs2 = self.set_field(pdpte_index, self.PDPT_INDX)
-        ofs3 = self.set_field(pde_index, self.PD_INDX)
-        ofs4 = self.set_field(pte_index, self.PT_INDX)
-        return (ofs1 | ofs2 | ofs3 | ofs4)

-
-
[docs]    def print_entry(self, lvl: int, pa: int, va: int = 0, perm: str = '') -> None:
-        canonical_va = self.get_canonical(va)
-        info = f'  {"  " * lvl}{self.PT_NAME[lvl]:6}: {pa:013X}'
-        if perm != '':
-            size = self.PT_SIZE[lvl]
-            info += f' - {size} PAGE  {perm}'
-            info = info.ljust(64)
-            if pa == va:
-                info += '1:1 mapping'
-            else:
-                info += f'{self.PHYSICAL_ADDR_NAME}: {canonical_va:013X}'
-
-            self.add_page(canonical_va, pa, size, perm)
-
-        logger().log(info)
-        return

-
-
[docs]    def read_page_tables(self, ptr: int) -> None:
-        addr = ptr & ADDR_4KB
-        self.pointer = addr
-        self.pt = {addr: 'pml4'}
-        self.translation = {}
-        self.print_entry(0, addr)
-        self.read_pml4(addr)
-        return

-
-
[docs]    def is_present(self, entry: int) -> int:
-        return entry & chipsec.defines.BIT0

-
-
[docs]    def is_bigpage(self, entry: int) -> int:
-        return entry & chipsec.defines.BIT7

-
-
[docs]    def read_pml4(self, addr: int) -> None:
-        pml4 = self.read_entries('pml4', addr)
-        for pml4e_index in range(len(pml4)):
-            pml4e = pml4[pml4e_index]
-            if self.is_present(pml4e):
-                addr = pml4e & ADDR_4KB
-                self.pt[addr] = 'pdpt'
-                self.print_entry(1, addr)
-                self.read_pdpt(addr, pml4e_index)
-        return

-
-
[docs]    def get_attr(self, entry: int) -> str:
-        ret = ''
-        if entry & chipsec.defines.BIT1:
-            ret += 'W'
-        else:
-            ret += "R"
-        if entry & chipsec.defines.BIT2:
-            ret += 'U'
-        else:
-            ret += 'S'
-        return ret

-
-
[docs]    def read_pdpt(self, addr: int, pml4e_index: int) -> None:
-        pdpt = self.read_entries('pdpt', addr)
-        for pdpte_index in range(len(pdpt)):
-            pdpte = pdpt[pdpte_index]
-            if self.is_present(pdpte):
-                if self.is_bigpage(pdpte):
-                    virt = self.get_virt_addr(pml4e_index, pdpte_index)
-                    phys = pdpte & ADDR_1GB
-                    self.print_entry(2, phys, virt, self.get_attr(pdpte))
-                else:
-                    addr = pdpte & ADDR_4KB
-                    self.pt[addr] = 'pd'
-                    self.print_entry(2, addr)
-                    self.read_pd(addr, pml4e_index, pdpte_index)
-        return

-
-
[docs]    def read_pd(self, addr: int, pml4e_index: int, pdpte_index: int) -> None:
-        pd = self.read_entries('pd', addr)
-        for pde_index in range(len(pd)):
-            pde = pd[pde_index]
-            if self.is_present(pde):
-                if self.is_bigpage(pde):
-                    virt = self.get_virt_addr(pml4e_index, pdpte_index, pde_index)
-                    phys = pde & ADDR_2MB
-                    self.print_entry(3, phys, virt, self.get_attr(pde))
-                else:
-                    addr = pde & ADDR_4KB
-                    self.pt[addr] = 'pt'
-                    self.print_entry(3, addr)
-                    self.read_pt(addr, pml4e_index, pdpte_index, pde_index)
-        return

-
-
[docs]    def read_pt(self, addr: int, pml4e_index: int, pdpte_index: int, pde_index: int) -> None:
-        pt = self.read_entries('pt', addr)
-        for pte_index in range(len(pt)):
-            pte = pt[pte_index]
-            if self.is_present(pte):
-                virt = self.get_virt_addr(pml4e_index, pdpte_index, pde_index, pte_index)
-                phys = pte & ADDR_4KB
-                self.print_entry(4, phys, virt, self.get_attr(pte))
-        return

-
-
[docs]    def read_entry_by_virt_addr(self, virt: int) -> Dict[str, Any]:
-        if self.pointer is None:
-            raise Exception('Page Table pointer is undefined!')
-        addr = self.pointer
-        pml4 = self.read_entries('pml4', addr)
-        pml4e = pml4[self.get_field(virt, self.PML4_INDX)]
-        if self.is_present(pml4e):
-            addr = pml4e & ADDR_4KB
-            pdpt = self.read_entries('pdpt', addr)
-            pdpte = pdpt[self.get_field(virt, self.PDPT_INDX)]
-            if self.is_present(pdpte):
-                if self.is_bigpage(pdpte):
-                    addr = (pdpte & ADDR_1GB) | (virt & ~ADDR_1GB)
-                    return {'addr': addr, 'attr': self.get_attr(pdpte), 'size': '1GB'}
-                else:
-                    addr = pdpte & ADDR_4KB
-                    pd = self.read_entries('pd', addr)
-                    pde = pd[self.get_field(virt, self.PD_INDX)]
-                    if self.is_present(pde):
-                        if self.is_bigpage(pde):
-                            addr = (pde & ADDR_2MB) | (virt & ~ADDR_2MB)
-                            return {'addr': addr, 'attr': self.get_attr(pde), 'size': '2MB'}
-                        else:
-                            addr = pde & ADDR_4KB
-                            pt = self.read_entries('pt', addr)
-                            pte = pt[self.get_field(virt, self.PT_INDX)]
-                            if self.is_present(pte):
-                                addr = (pte & ADDR_4KB) | (virt & ~ADDR_4KB)
-                                return {'addr': addr, 'attr': self.get_attr(pte), 'size': '4KB'}
-        return {'addr': 0, 'attr': '', 'size': ''}

-
-
-
[docs]class c_ia32e_page_tables(c_4level_page_tables):
-
-    def __init__(self, cs):
-        c_4level_page_tables.__init__(self, cs)
-        # constants
-        self.PHYSICAL_ADDR_NAME = 'VA'
-        self.PT_NAME = ['CR3P', 'PML4E', 'PDPTE', 'PDE', 'PTE']
-        self.P = {'mask': 0x1, 'offset': 0}
-        self.RW = {'mask': 0x1, 'offset': 1}
-        self.US = {'mask': 0x1, 'offset': 2}
-        self.BIGPAGE = {'mask': 0x1, 'offset': 7}
-
-
[docs]    def is_present(self, entry: int) -> bool:
-        return self.get_field(entry, self.P) != 0

-
-
[docs]    def is_bigpage(self, entry: int) -> bool:
-        return self.get_field(entry, self.BIGPAGE) != 0

-
-
[docs]    def get_attr(self, entry: int) -> str:
-        RW_DESC = ['R', 'W']
-        US_DESC = ['S', 'U']
-        return f'{RW_DESC[self.get_field(entry, self.RW)]} {US_DESC[self.get_field(entry, self.US)]}'

-
-
-
[docs]class c_pae_page_tables(c_ia32e_page_tables):
-
-    def __init__(self, cs):
-        c_ia32e_page_tables.__init__(self, cs)
-        # constants
-        self.PML4_INDX = {'mask': 0x000, 'offset': 39}
-        self.PDPT_INDX = {'mask': 0x003, 'offset': 30}
-        self.PT_NAME = ['', 'CR3', 'PDPTE', 'PDE', 'PTE']
-
-
[docs]    def read_page_tables(self, ptr: int) -> None:
-        addr = ptr & ADDR_4KB
-        self.pointer = addr
-        self.pt = {addr: 'pdpt'}
-        self.translation = {}
-        self.print_entry(1, addr)
-        self.read_pdpt(addr, None)
-        return

-
-
[docs]    def read_pml4(self, addr: int):
-        raise Exception('PAE Page tables have no PML4!')

-
-
[docs]    def read_pdpt(self, addr: int, pml4e_index: Optional[int] = None) -> None:
-        if not pml4e_index:
-            raise Exception('PAE Page tables have no PML4!')
-        pdpt = self.read_entries('pdpt', addr)
-        for pdpte_index in range(4):
-            pdpte = pdpt[pdpte_index]
-            if self.is_present(pdpte):
-                if self.is_bigpage(pdpte):
-                    virt = self.get_virt_addr(0, pdpte_index)
-                    phys = pdpte & ADDR_1GB
-                    self.print_entry(2, phys, virt, self.get_attr(pdpte))
-                else:
-                    addr = pdpte & ADDR_4KB
-                    self.pt[addr] = 'pd'
-                    self.print_entry(2, addr)
-                    self.read_pd(addr, 0, pdpte_index)
-        return

-
-
-
[docs]class c_extended_page_tables(c_4level_page_tables):
-
-    def __init__(self, cs):
-        c_4level_page_tables.__init__(self, cs)
-        # constants
-        self.PHYSICAL_ADDR_NAME = 'GPA'
-        self.XWR = {'mask': 0x7, 'offset': 0}
-        self.MEM_TYPE = {'mask': 0x7, 'offset': 3}
-        self.BIGPAGE = {'mask': 0x1, 'offset': 7}
-        self.canonical_msb = 63
-
-
[docs]    def is_present(self, entry: int) ->  bool:
-        return self.get_field(entry, self.XWR) != 0

-
-
[docs]    def is_bigpage(self, entry: int) -> bool:
-        return self.get_field(entry, self.BIGPAGE) != 0

-
-
[docs]    def get_attr(self, entry: int) -> str:
-        XWR_DESC = ['---', '--R', '-W-', '-WR', 'X--', 'X-R', 'XW-', 'XWR']
-        MEM_DESC = ['UC', 'WC', '02', '03', 'WT', 'WP', 'WB', 'UC-']
-        return f'{XWR_DESC[self.get_field(entry, self.XWR)]} {MEM_DESC[self.get_field(entry, self.MEM_TYPE)]}'

-
-
[docs]    def read_pt_and_show_status(self, path: str, name: str, ptr: int) -> None:
-        super(c_extended_page_tables, self).read_pt_and_show_status(path, name, ptr)
-        self.check_misconfig(list(self.pt))
-        return

-
-
[docs]    def map_bigpage_1G(self, virt: int, i: int) -> None:
-        if self.pointer is None:
-            raise Exception('Page Table pointer is undefined!')
-        addr = self.pointer
-        pml4 = self.read_entries('pml4', addr)
-        pml4e = pml4[self.get_field(virt, self.PML4_INDX)]
-        if self.is_present(pml4e):
-            addr = pml4e & ADDR_4KB
-            pdpt = self.read_entries('pdpt', addr)
-            new_entry = struct.pack('<Q', ((pdpt[i] | 0x87) & ~ADDR_4KB) | (i << 30))
-            self.cs.mem.write_physical_mem(addr + i * 8, 8, new_entry)
-        return None

-
-
-
[docs]class c_vtd_page_tables(c_extended_page_tables):
-
-    def __init__(self, cs):
-        c_extended_page_tables.__init__(self, cs)
-        # constants
-        self.DID_BUS = {'mask': 0xFF, 'offset': 8}
-        self.DID_DEV = {'mask': 0x1F, 'offset': 3}
-        self.DID_FUN = {'mask': 0x07, 'offset': 0}
-        self.RE_LO_P = {'mask': 0x01, 'offset': 0}
-        self.CE_HI_AW = {'mask': 0x07, 'offset': 0}
-        self.CE_HI_AVAIL = {'mask': 0x0F, 'offset': 3}
-        self.CE_HI_DID = {'mask': 0xFF, 'offset': 8}
-        self.CE_LO_P = {'mask': 0x01, 'offset': 0}
-        self.CE_LO_FPD = {'mask': 0x01, 'offset': 1}
-        self.CE_LO_T = {'mask': 0x03, 'offset': 2}
-        # variables
-        self.context = {}
-        self.domains = {}
-        self.cpt = {}
-
-
[docs]    def read_vtd_context(self, path: str, ptr: int) -> None:
-        txt = open(path, 'w')
-        try:
-            self.out = txt
-            addr = ptr & ADDR_4KB
-            self.context = {}
-            self.domains = {}
-            self.cpt = {addr: 'root'}
-            self.read_re(addr)
-
-            if len(self.domains) != 0:
-                logger().log('[paging] VT-d domains:')
-                for domain in sorted(self.domains.keys()):
-                    logger().log(f'  0x{domain:016X} ')
-            logger().log(f'[paging] Total VT-d domains: {len(self.domains):d}\n')
-
-            logger().log('[paging] VT-d context entries:')
-            for source_id in sorted(self.context.keys()):
-                self.print_context_entry(source_id, self.context[source_id])
-
-            logger().log('[paging] VT-d context pages:')
-            for i in sorted(self.cpt.keys()):
-                logger().log(f'    0x{i:013X}  {self.cpt[i]}')
-        finally:
-            txt.close()
-        return

-
-
[docs]    def read_re(self, addr: int) -> None:
-        re = self.read_entries('re', addr, 16)
-        for ree_index in range(len(re)):
-            ree_lo = re[ree_index][0]
-            ree_hi = re[ree_index][1]
-            if self.get_field(ree_lo, self.RE_LO_P):
-                addr = ree_lo & ADDR_4KB
-                self.read_ce(addr, ree_index)
-                self.cpt[addr] = 'context'
-        return

-
-
[docs]    def read_ce(self, addr: int, ree_index: int) -> None:
-        ce = self.read_entries('ce', addr, 16)
-        for cee_index in range(len(ce)):
-            cee_lo = ce[cee_index][0]
-            cee_hi = ce[cee_index][1]
-            if self.get_field(cee_lo, self.CE_LO_P):
-                source_id = (ree_index << 8) | cee_index
-                self.context[source_id] = [cee_lo, cee_hi]
-                if self.get_field(cee_lo, self.CE_LO_T) in (0, 1):
-                    slptptr = cee_lo & MAXPHYADDR
-                    self.domains[slptptr] = 1
-        return

-
-
[docs]    def print_context_entry(self, source_id: int, cee: Dict[int, int]) -> None:
-        if self.get_field(cee[0], self.CE_LO_P):
-            info = (
-                self.get_field(source_id, self.DID_BUS),
-                self.get_field(source_id, self.DID_DEV),
-                self.get_field(source_id, self.DID_FUN),
-                self.get_field(cee[1], self.CE_HI_DID),
-                self.get_field(cee[1], self.CE_HI_AVAIL),
-                self.get_field(cee[1], self.CE_HI_AW),
-                self.get_field(cee[0], self.CE_LO_T),
-                self.get_field(cee[0], self.CE_LO_FPD),
-                cee[0] & MAXPHYADDR
-            )
-            logger().log('  {:02X}:{:02X}.{:X}  DID: {:02X}  AVAIL: {:X}  AW: {:X}  T: {:X}  FPD: {:X}  SLPTPTR: {:016X}'.format(*info))
-        return

-
-
[docs]    def read_page_tables(self, ptr: int) -> None:
-        logger().log(f'  Page Tables for domain 0x{ptr:013X}: ')
-        super(c_vtd_page_tables, self).read_page_tables(ptr)
-        return

-
-
[docs]    def read_pt_and_show_status(self, path: str, name: str, ptr: int) -> None:
-        super(c_vtd_page_tables, self).read_pt_and_show_status(path, name, ptr)
-        self.check_misconfig(list(self.cpt))
-        return

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/pci.html b/_modules/chipsec/hal/pci.html deleted file mode 100644 index 7822372f..00000000 --- a/_modules/chipsec/hal/pci.html +++ /dev/null @@ -1,650 +0,0 @@ - - - - - - - - chipsec.hal.pci — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.pci

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2022, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Access to of PCI/PCIe device hierarchy
-- enumerating PCI/PCIe devices
-- read/write access to PCI configuration headers/registers
-- enumerating PCI expansion (option) ROMs
-- identifying PCI/PCIe devices MMIO and I/O ranges (BARs)
-
-usage:
-    >>> self.cs.pci.read_byte( 0, 0, 0, 0x88 )
-    >>> self.cs.pci.write_byte( 0, 0, 0, 0x88, 0x1A )
-    >>> self.cs.pci.enumerate_devices()
-    >>> self.cs.pci.enumerate_xroms()
-    >>> self.cs.pci.find_XROM( 2, 0, 0, True, True, 0xFED00000 )
-    >>> self.cs.pci.get_device_bars( 2, 0, 0 )
-    >>> self.cs.pci.get_DIDVID( 2, 0, 0 )
-    >>> self.cs.pci.is_enabled( 2, 0, 0 )
-"""
-
-import struct
-from collections import namedtuple
-import itertools
-from typing import List, Tuple, Optional
-from chipsec.logger import logger, pretty_print_hex_buffer
-from chipsec.file import write_file
-from chipsec.hal.pcidb import VENDORS, DEVICES
-from chipsec.exceptions import OsHelperError
-from chipsec.defines import is_all_ones, MASK_16b, MASK_32b, MASK_64b, BOUNDARY_4KB
-
-#
-# PCI configuration header registers
-#
-
-# Common (type 0/1) registers
-PCI_HDR_VID_OFF = 0x0
-PCI_HDR_DID_OFF = 0x2
-PCI_HDR_CMD_OFF = 0x4
-PCI_HDR_STS_OFF = 0x6
-PCI_HDR_RID_OFF = 0x8
-PCI_HDR_CLSCODE_OFF = 0x9
-PCI_HDR_PI_OFF = 0x9
-PCI_HDR_SUB_CLS_OFF = 0xA
-PCI_HDR_CLS_OFF = 0xB
-PCI_HDR_CLSIZE_OFF = 0xC
-PCI_HDR_MLT_OFF = 0xD
-PCI_HDR_TYPE_OFF = 0xE
-PCI_HDR_BIST_OFF = 0xF
-PCI_HDR_CAP_OFF = 0x34
-PCI_HDR_INTRLN_OFF = 0x3C
-PCI_HDR_INTRPIN_OFF = 0x3D
-PCI_HDR_BAR0_LO_OFF = 0x10
-PCI_HDR_BAR0_HI_OFF = 0x14
-
-# PCIe BAR register fields
-PCI_HDR_BAR_CFGBITS_MASK = 0xF
-
-PCI_HDR_BAR_IOMMIO_MASK = 0x1
-PCI_HDR_BAR_IOMMIO_MMIO = 0
-PCI_HDR_BAR_IOMMIO_IO = 1
-
-PCI_HDR_BAR_TYPE_MASK = (0x3 << 1)
-PCI_HDR_BAR_TYPE_SHIFT = 1
-PCI_HDR_BAR_TYPE_64B = 2
-PCI_HDR_BAR_TYPE_1MB = 1
-PCI_HDR_BAR_TYPE_32B = 0
-
-PCI_HDR_BAR_BASE_MASK_MMIO64 = 0xFFFFFFFFFFFFFFF0
-PCI_HDR_BAR_BASE_MASK_MMIO = 0xFFFFFFF0
-PCI_HDR_BAR_BASE_MASK_IO = 0xFFFC
-
-# Type 0 specific registers
-PCI_HDR_TYPE0_BAR1_LO_OFF = 0x18
-PCI_HDR_TYPE0_BAR1_HI_OFF = 0x1C
-PCI_HDR_TYPE0_BAR2_LO_OFF = 0x20
-PCI_HDR_TYPE0_BAR2_HI_OFF = 0x24
-PCI_HDR_TYPE0_XROM_BAR_OFF = 0x30
-
-# Type 1 specific registers
-PCI_HDR_TYPE1_XROM_BAR_OFF = 0x38
-
-# Field defines
-
-PCI_HDR_CMD_MS_MASK = 0x2
-
-PCI_HDR_TYPE_TYPE_MASK = 0x7F
-PCI_HDR_TYPE_MF_MASK = 0x80
-
-PCI_TYPE0 = 0x0
-PCI_TYPE1 = 0x1
-
-PCI_HDR_XROM_BAR_EN_MASK = 0x00000001
-PCI_HDR_XROM_BAR_BASE_MASK = 0xFFFFF000
-
-PCI_HDR_BAR_STEP = 0x4
-
-
-#
-# Generic/standard PCI Expansion (Option) ROM
-#
-
-XROM_SIGNATURE = 0xAA55
-PCI_XROM_HEADER_FMT = '<H22sH'
-PCI_XROM_HEADER_SIZE = struct.calcsize(PCI_XROM_HEADER_FMT)
-
-
-
[docs]class PCI_XROM_HEADER(namedtuple('PCI_XROM_HEADER', 'Signature ArchSpecific PCIROffset')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-PCI XROM
------------------------------------
-Signature       : 0x{self.Signature:04X} (= 0xAA55)
-ArchSpecific    : {self.ArchSpecific.encode('hex').upper()}
-PCIR Offset     : 0x{self.PCIROffset:04X}
-"""

-
-# @TBD: PCI Data Structure
-
-#
-# EFI specific PCI Expansion (Option) ROM
-#
-
-
-EFI_XROM_SIGNATURE = 0x0EF1
-EFI_XROM_HEADER_FMT = '<HHIHHHBHH'
-EFI_XROM_HEADER_SIZE = struct.calcsize(EFI_XROM_HEADER_FMT)
-
-
-
[docs]class EFI_XROM_HEADER(namedtuple('EFI_XROM_HEADER', 'Signature InitSize EfiSignature EfiSubsystem EfiMachineType CompressType Reserved EfiImageHeaderOffset PCIROffset')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-EFI PCI XROM
----------------------------------------
-Signature           : 0x{self.Signature:04X} (= 0xAA55)
-Init Size           : 0x{self.InitSize:04X} (x 512 B)
-EFI Signature       : 0x{self.EfiSignature:08X} (= 0x0EF1)
-EFI Subsystem       : 0x{self.EfiSubsystem:04X}
-EFI Machine Type    : 0x{self.EfiMachineType:04X}
-Compression Type    : 0x{self.CompressType:04X}
-Reserved            : 0x{self.Reserved:02X}
-EFI Image Hdr Offset: 0x{self.EfiImageHeaderOffset:04X}
-PCIR Offset         : 0x{self.PCIROffset:04X}
-"""

-
-#
-# Legacy PCI Expansion (Option) ROM
-#
-
-
-XROM_HEADER_FMT = '<HBI17sH'
-XROM_HEADER_SIZE = struct.calcsize(XROM_HEADER_FMT)
-
-
-
[docs]class XROM_HEADER(namedtuple('XROM_HEADER', 'Signature InitSize InitEP Reserved PCIROffset')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-XROM
---------------------------------------
-Signature           : 0x{self.Signature:04X}
-Init Size           : 0x{self.InitSize:02X} (x 512 B)
-Init Entry-point    : 0x{self.InitEP:08X}
-Reserved            : {self.Reserved.encode('hex').upper()}
-PCIR Offset         : 0x{self.PCIROffset:04X}
-"""

-
-
-
[docs]class XROM:
-    def __init__(self, bus, dev, fun, en, base, size):
-        self.bus: int = bus
-        self.dev: int = dev
-        self.fun: int = fun
-        self.vid: int = 0xFFFF
-        self.did: int = 0xFFFF
-        self.en: int = en
-        self.base: int = base
-        self.size: int = size
-        self.header: Optional[PCI_XROM_HEADER] = None

-
-
-
[docs]def get_vendor_name_by_vid(vid: int) -> str:
-    if vid in VENDORS:
-        return VENDORS[vid]
-    return ''

-
-
-
[docs]def get_device_name_by_didvid(vid: int, did: int) -> str:
-    if vid in DEVICES:
-        if did in DEVICES[vid]:
-            return DEVICES[vid][did]
-    return ''

-
-
-
-
-
-
-
-
-
[docs]class Pci:
-
-    def __init__(self, cs):
-        self.cs = cs
-        self.helper = cs.helper
-
-    #
-    # Access to PCI configuration registers
-    #
-
-
[docs]    def read_dword(self, bus: int, device: int, function: int, address: int) -> int:
-        value = self.helper.read_pci_reg(bus, device, function, address, 4)
-        logger().log_hal(f'[pci] reading B/D/F: {bus:d}/{device:d}/{function:d}, offset: 0x{address:02X}, value: 0x{value:08X}')
-        return value

-
-
[docs]    def read_word(self, bus: int, device: int, function: int, address: int) -> int:
-        word_value = self.helper.read_pci_reg(bus, device, function, address, 2)
-        logger().log_hal(f'[pci] reading B/D/F: {bus:d}/{device:d}/{function:d}, offset: 0x{address:02X}, value: 0x{word_value:04X}')
-        return word_value

-
-
[docs]    def read_byte(self, bus: int, device: int, function: int, address: int) -> int:
-        byte_value = self.helper.read_pci_reg(bus, device, function, address, 1)
-        logger().log_hal(f'[pci] reading B/D/F: {bus:d}/{device:d}/{function:d}, offset: 0x{address:02X}, value: 0x{byte_value:02X}')
-        return byte_value

-
-
[docs]    def write_byte(self, bus: int, device: int, function: int, address: int, byte_value: int) -> None:
-        self.helper.write_pci_reg(bus, device, function, address, byte_value, 1)
-        logger().log_hal(f'[pci] writing B/D/F: {bus:d}/{device:d}/{function:d}, offset: 0x{address:02X}, value: 0x{byte_value:02X}')
-        return None

-
-
[docs]    def write_word(self, bus: int, device: int, function: int, address: int, word_value: int) -> None:
-        self.helper.write_pci_reg(bus, device, function, address, word_value, 2)
-        logger().log_hal(f'[pci] writing B/D/F: {bus:d}/{device:d}/{function:d}, offset: 0x{address:02X}, value: 0x{word_value:04X}')
-        return None

-
-
[docs]    def write_dword(self, bus: int, device: int, function: int, address: int, dword_value: int) -> None:
-        self.helper.write_pci_reg(bus, device, function, address, dword_value, 4)
-        logger().log_hal(f'[pci] writing B/D/F: {bus:d}/{device:d}/{function:d}, offset: 0x{address:02X}, value: 0x{dword_value:08X}')
-        return None

-
-    #
-    # Enumerating PCI devices and dumping configuration space
-    #
-
-
[docs]    def enumerate_devices(self, bus: Optional[int] = None, device: Optional[int] = None, function: Optional[int] = None, spec: Optional[bool] = True) -> List[Tuple[int, int, int, int, int, int]]:
-        devices = []
-
-        if bus is not None:
-            bus_range = [bus]
-        else:
-            bus_range = range(256)
-        if device is not None:
-            dev_range = [device]
-        else:
-            dev_range = range(32)
-        if function is not None:
-            func_range = [function]
-        else:
-            func_range = range(8)
-
-        for b, d in itertools.product(bus_range, dev_range):
-            for f in func_range:
-                try:
-                    did_vid = self.read_dword(b, d, f, 0x0)
-                    if 0xFFFFFFFF != did_vid:
-                        vid = did_vid & 0xFFFF
-                        did = (did_vid >> 16) & 0xFFFF
-                        rid = self.read_byte(b, d, f, 0x8)
-                        devices.append((b, d, f, vid, did, rid))
-                    elif f == 0 and spec:
-                        break
-                except OsHelperError:
-                    self.logger.log_hal(f"[pci] unable to access B/D/F: {b:d}/{d:d}/{f:d}")
-        return devices

-
-
[docs]    def dump_pci_config(self, bus: int, device: int, function: int) -> List[int]:
-        cfg = []
-        for off in range(0, 0x100, 4):
-            tmp_val = self.read_dword(bus, device, function, off)
-            for shift in range(0, 32, 8):
-                cfg.append((tmp_val >> shift) & 0xFF)
-        return cfg

-
-
[docs]    def print_pci_config_all(self) -> None:
-        logger().log("[pci] enumerating available PCI devices...")
-        pci_devices = self.enumerate_devices()
-        for (b, d, f, vid, did, rid) in pci_devices:
-            cfg_buf = self.dump_pci_config(b, d, f)
-            logger().log(f"\n[pci] PCI device {b:02X}:{d:02X}.{f:02X} configuration:")
-            pretty_print_hex_buffer(cfg_buf)

-
-    #
-    # PCI Expansion ROM functions
-    #
-
-
[docs]    def parse_XROM(self, xrom: XROM, xrom_dump: bool = False) -> Optional[PCI_XROM_HEADER]:
-        xrom_sig = self.cs.mem.read_physical_mem_word(xrom.base)
-        if xrom_sig != XROM_SIGNATURE:
-            return None
-        xrom_hdr_buf = self.cs.mem.read_physical_mem(xrom.base, PCI_XROM_HEADER_SIZE)
-        xrom_hdr = PCI_XROM_HEADER(*struct.unpack_from(PCI_XROM_HEADER_FMT, xrom_hdr_buf))
-        if xrom_dump:
-            xrom_fname = f'xrom_{xrom.bus:X}-{xrom.dev:X}-{xrom.fun:X}_{xrom.vid:X}{xrom.did:X}.bin'
-            xrom_buf = self.cs.mem.read_physical_mem(xrom.base, xrom.size)  # use xrom_hdr.InitSize ?
-            write_file(xrom_fname, xrom_buf)
-        return xrom_hdr

-
-
[docs]    def find_XROM(self, bus: int, dev: int, fun: int, try_init: bool = False, xrom_dump: bool = False, xrom_addr: Optional[int] = None) -> Tuple[bool, Optional[XROM]]:
-        # return results
-        xrom_found, xrom = False, None
-
-        logger().log_hal(f'[pci] checking XROM in {bus:02X}:{dev:02X}.{fun:02X}')
-
-        cmd = self.read_word(bus, dev, fun, PCI_HDR_CMD_OFF)
-        ms = (cmd & PCI_HDR_CMD_MS_MASK) == PCI_HDR_CMD_MS_MASK
-        logger().log_hal(f'[pci]   PCI CMD (memory space = {ms:d}): 0x{cmd:04X}')
-
-        hdr_type = self.read_byte(bus, dev, fun, PCI_HDR_TYPE_OFF)
-        _mf = hdr_type & PCI_HDR_TYPE_MF_MASK
-        _type = hdr_type & PCI_HDR_TYPE_TYPE_MASK
-        xrom_bar_off = PCI_HDR_TYPE1_XROM_BAR_OFF if _type == PCI_TYPE1 else PCI_HDR_TYPE0_XROM_BAR_OFF
-
-        xrom_bar = self.read_dword(bus, dev, fun, xrom_bar_off)
-        xrom_exists = (xrom_bar != 0)
-
-        if xrom_exists:
-            logger().log_hal(f'[pci]   device programmed XROM BAR: 0x{xrom_bar:08X}')
-        else:
-            logger().log_hal(f'[pci]   device did not program XROM BAR: 0x{xrom_bar:08X}')
-            if try_init:
-                self.write_dword(bus, dev, fun, xrom_bar_off, PCI_HDR_XROM_BAR_BASE_MASK)
-                xrom_bar = self.read_dword(bus, dev, fun, xrom_bar_off)
-                xrom_exists = (xrom_bar != 0)
-                logger().log_hal(f'[pci]   returned 0x{xrom_bar:08X} after writing {PCI_HDR_XROM_BAR_BASE_MASK:08X}')
-                if xrom_exists and (xrom_addr is not None):
-                    # device indicates XROM may exist. Initialize its base with supplied MMIO address
-                    size_align = ~(xrom_bar & PCI_HDR_XROM_BAR_BASE_MASK)  # actual XROM alignment
-                    if (xrom_addr & size_align) != 0:
-                        logger().log_warning(f'XROM address 0x{xrom_addr:08X} must be aligned at 0x{size_align:08X}')
-                        return False, None
-                    self.write_dword(bus, dev, fun, xrom_bar_off, (xrom_addr | PCI_HDR_XROM_BAR_EN_MASK))
-                    xrom_bar = self.read_dword(bus, dev, fun, xrom_bar_off)
-                    logger().log_hal(f'[pci]   programmed XROM BAR with 0x{xrom_bar:08X}')
-
-        #
-        # At this point, a device indicates that XROM exists. Let's check if XROM is really there
-        #
-        xrom_en = (xrom_bar & PCI_HDR_XROM_BAR_EN_MASK) == 0x1
-        xrom_base = xrom_bar & PCI_HDR_XROM_BAR_BASE_MASK
-        xrom_size = ~xrom_base + 1
-
-        if xrom_exists:
-            logger().log_hal(f'[pci]   XROM: BAR = 0x{xrom_bar:08X}, base = 0x{xrom_base:08X}, size = 0x{xrom_size:X}, en = {xrom_en:d}')
-            xrom = XROM(bus, dev, fun, xrom_en, xrom_base, xrom_size)
-            if xrom_en and (xrom_base != PCI_HDR_XROM_BAR_BASE_MASK):
-                xrom.header = self.parse_XROM(xrom, xrom_dump)
-                xrom_found = (xrom is not None) and (xrom.header is not None)
-                if xrom_found:
-                    logger().log_hal(f"[pci]   XROM found at 0x{xrom_base:08X}")
-                    logger().log_hal(str(xrom.header))
-
-        if not xrom_found:
-            logger().log_hal('[pci]   XROM was not found')
-
-        return xrom_found, xrom

-
-
[docs]    def enumerate_xroms(self, try_init: bool = False, xrom_dump: bool = False, xrom_addr: Optional[int] = None) -> List[Optional[XROM]]:
-        pci_xroms = []
-        logger().log("[pci] enumerating available PCI devices...")
-        pci_devices = self.enumerate_devices()
-        for (b, d, f, vid, did, rid) in pci_devices:
-            exists, xrom = self.find_XROM(b, d, f, try_init, xrom_dump, xrom_addr)
-            if exists and (xrom is not None):
-                xrom.vid = vid
-                xrom.did = did
-                pci_xroms.append(xrom)
-        return pci_xroms

-
-
[docs]    def get_header_type(self, bus, dev, fun):
-        res = self.read_byte(bus, dev, fun, PCI_HDR_TYPE_OFF)
-        return res & PCI_HDR_TYPE_TYPE_MASK

-
-    #
-    # Calculates actual size of MMIO BAR range
-
[docs]    def calc_bar_size(self, bus: int, dev: int, fun: int, off: int, is64: bool, isMMIO: bool) -> int:
-        self.logger.log_hal(f'calc_bar_size {bus}:{dev}.{fun} offset{off}')
-        # Read the original value of the register
-        orig_regL = self.read_dword(bus, dev, fun, off)
-        self.logger.log_hal(f'orig_regL: {orig_regL:X}')
-        if is64:
-            orig_regH = self.read_dword(bus, dev, fun, off + PCI_HDR_BAR_STEP)
-            self.logger.log_hal(f'orig_regH: {orig_regH:X}')
-        # Write all 1's to the register
-        self.write_dword(bus, dev, fun, off + PCI_HDR_BAR_STEP, MASK_32b)
-        if is64:
-            self.write_dword(bus, dev, fun, off, MASK_32b)
-        # Read the register back
-        regL = self.read_dword(bus, dev, fun, off)
-        self.logger.log_hal(f'regL: {regL:X}')
-        if is64:
-            regH = self.read_dword(bus, dev, fun, off + PCI_HDR_BAR_STEP)
-            self.logger.log_hal(f'regH: {regH:X}')
-        # Write original value back to register
-        self.write_dword(bus, dev, fun, off, orig_regL)
-        if is64:
-            self.write_dword(bus, dev, fun, off + PCI_HDR_BAR_STEP, orig_regH)
-        # Calculate Sizing
-        if isMMIO and is64:
-            reg = regL | (regH << 32)
-            orig_reg = orig_regL | (orig_regH << 32)
-            if orig_reg == reg:
-                size = BOUNDARY_4KB
-            else:
-                size = (~(reg & PCI_HDR_BAR_BASE_MASK_MMIO64) & MASK_64b) + 1
-        elif isMMIO:
-            if regL == orig_regL:
-                size = BOUNDARY_4KB
-            else:
-                size = (~(regL & PCI_HDR_BAR_BASE_MASK_MMIO) & MASK_32b) + 1
-        else:
-            if regL == orig_regL:
-                size = 0x100
-            else:
-                size = (~(regL & PCI_HDR_BAR_BASE_MASK_IO) & MASK_16b) + 1
-        return size

-
-    # Returns all I/O and MMIO BARs defined in the PCIe header of the device
-    # Returns array of elements in format (BAR_address, isMMIO, is64bit, BAR_reg_offset, BAR_reg_value)
-
[docs]    def get_device_bars(self, bus: int, dev: int, fun: int, bCalcSize: bool = False) -> List[Tuple[int, bool, bool, int, int, int]]:
-        _bars = []
-        hdr_type = self.get_header_type(bus, dev, fun)
-        if hdr_type == 0:
-            bounds = PCI_HDR_TYPE0_BAR2_HI_OFF
-        elif hdr_type == 1:
-            bounds = PCI_HDR_TYPE0_BAR1_LO_OFF
-        else:
-            bounds = PCI_HDR_BAR0_LO_OFF
-
-        off = PCI_HDR_BAR0_LO_OFF
-        size = BOUNDARY_4KB
-        while off <= bounds:
-            reg = self.read_dword(bus, dev, fun, off)
-            if reg and reg != MASK_32b:
-                # BAR is initialized
-                isMMIO = (PCI_HDR_BAR_IOMMIO_MMIO == (reg & PCI_HDR_BAR_IOMMIO_MASK))
-                if isMMIO:
-                    # MMIO BAR
-                    mem_type = (reg & PCI_HDR_BAR_TYPE_MASK) >> PCI_HDR_BAR_TYPE_SHIFT
-                    if PCI_HDR_BAR_TYPE_64B == mem_type:
-                        # 64-bit MMIO BAR
-                        if bCalcSize and hdr_type == 0:
-                            size = self.calc_bar_size(bus, dev, fun, off, True, True)
-                        off += PCI_HDR_BAR_STEP
-                        reg_hi = self.read_dword(bus, dev, fun, off)
-                        reg |= (reg_hi << 32)
-                        base = (reg & PCI_HDR_BAR_BASE_MASK_MMIO64)
-                        if base != 0:
-                            _bars.append((base, isMMIO, True, off - PCI_HDR_BAR_STEP, reg, size))
-                    elif PCI_HDR_BAR_TYPE_1MB == mem_type:
-                        # MMIO BAR below 1MB - not supported
-                        pass
-                    elif PCI_HDR_BAR_TYPE_32B == mem_type:
-                        # 32-bit only MMIO BAR
-                        base = (reg & PCI_HDR_BAR_BASE_MASK_MMIO)
-                        if base != 0:
-                            if bCalcSize and hdr_type == 0:
-                                size = self.calc_bar_size(bus, dev, fun, off, False, True)
-                            _bars.append((base, isMMIO, False, off, reg, size))
-                else:
-                    # I/O BAR
-                    base = (reg & PCI_HDR_BAR_BASE_MASK_IO)
-                    if base != 0:
-                        if bCalcSize and hdr_type == 0:
-                            size = self.calc_bar_size(bus, dev, fun, off, False, False)
-                        else:
-                            size = 0x100
-                        _bars.append((base, isMMIO, False, off, reg, size))
-            off += PCI_HDR_BAR_STEP
-        return _bars

-
-
[docs]    def get_DIDVID(self, bus: int, dev: int, fun: int) -> Tuple[int, int]:
-        didvid = self.read_dword(bus, dev, fun, 0x0)
-        vid = didvid & 0xFFFF
-        did = (didvid >> 16) & 0xFFFF
-        return (did, vid)

-
-
[docs]    def is_enabled(self, bus: int, dev: int, fun: int) -> bool:
-        (did, vid) = self.get_DIDVID(bus, dev, fun)
-        if (is_all_ones(vid, 2)) or (is_all_ones(did, 2)):
-            return False
-        return True

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/physmem.html b/_modules/chipsec/hal/physmem.html deleted file mode 100644 index 90636688..00000000 --- a/_modules/chipsec/hal/physmem.html +++ /dev/null @@ -1,257 +0,0 @@ - - - - - - - - chipsec.hal.physmem — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.physmem

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Access to physical memory
-
-usage:
-    >>> read_physical_mem( 0xf0000, 0x100 )
-    >>> write_physical_mem( 0xf0000, 0x100, buffer )
-    >>> write_physical_mem_dowrd( 0xf0000, 0xdeadbeef )
-    >>> read_physical_mem_dowrd( 0xfed40000 )
-"""
-
-from struct import unpack, pack
-from typing import Tuple, Optional
-from chipsec.hal.hal_base import HALBase
-from chipsec.logger import print_buffer_bytes
-
-
-
[docs]class Memory(HALBase):
-    def __init__(self, cs):
-        super(Memory, self).__init__(cs)
-        self.helper = cs.helper
-
-    ####################################################################################
-    #
-    # Physical memory API using 64b Physical Address
-    # (Same functions as below just using 64b PA instead of High and Low 32b parts of PA)
-    #
-    ####################################################################################
-
-    # Reading physical memory
-
-
[docs]    def read_physical_mem(self, phys_address: int, length: int) -> bytes:
-        self.logger.log_hal(f'[mem] 0x{phys_address:016X}')
-        return self.helper.read_phys_mem(phys_address, length)

-
-
[docs]    def read_physical_mem_qword(self, phys_address: int) -> int:
-        out_buf = self.read_physical_mem(phys_address, 8)
-        value = unpack('=Q', out_buf)[0]
-        self.logger.log_hal(f'[mem] qword at PA = 0x{phys_address:016X}: 0x{value:016X}')
-        return value

-
-
[docs]    def read_physical_mem_dword(self, phys_address: int) -> int:
-        out_buf = self.read_physical_mem(phys_address, 4)
-        value = unpack('=I', out_buf)[0]
-        self.logger.log_hal(f'[mem] dword at PA = 0x{phys_address:016X}: 0x{value:08X}')
-        return value

-
-
[docs]    def read_physical_mem_word(self, phys_address: int) -> int:
-        out_buf = self.read_physical_mem(phys_address, 2)
-        value = unpack('=H', out_buf)[0]
-        self.logger.log_hal(f'[mem] word at PA = 0x{phys_address:016X}: 0x{value:04X}')
-        return value

-
-
[docs]    def read_physical_mem_byte(self, phys_address: int) -> int:
-        out_buf = self.read_physical_mem(phys_address, 1)
-        value = unpack('=B', out_buf)[0]
-        self.logger.log_hal(f'[mem] byte at PA = 0x{phys_address:016X}: 0x{value:02X}')
-        return value

-
-    # Writing physical memory
-
-
[docs]    def write_physical_mem(self, phys_address: int, length: int, buf: bytes) -> int:
-        if self.logger.HAL:
-            self.logger.log(f'[mem] buffer len = 0x{length:X} to PA = 0x{phys_address:016X}')
-            print_buffer_bytes(buf)
-        return self.helper.write_phys_mem(phys_address, length, buf)

-
-
[docs]    def write_physical_mem_dword(self, phys_address: int, dword_value: int) -> int:
-        self.logger.log_hal(f'[mem] dword to PA = 0x{phys_address:016X} <- 0x{dword_value:08X}')
-        return self.write_physical_mem(phys_address, 4, pack('I', dword_value))

-
-
[docs]    def write_physical_mem_word(self, phys_address: int, word_value: int) -> int:
-        self.logger.log_hal(f'[mem] word to PA = 0x{phys_address:016X} <- 0x{word_value:04X}')
-        return self.write_physical_mem(phys_address, 2, pack('H', word_value))

-
-
[docs]    def write_physical_mem_byte(self, phys_address: int, byte_value: int) -> int:
-        self.logger.log_hal(f'[mem] byte to PA = 0x{phys_address:016X} <- 0x{byte_value:02X}')
-        return self.write_physical_mem(phys_address, 1, pack('B', byte_value))

-
-    # Allocate physical memory buffer
-
-
[docs]    def alloc_physical_mem(self, length: int, max_phys_address: int = 0xFFFFFFFFFFFFFFFF) -> Tuple[int, int]:
-        (va, pa) = self.helper.alloc_phys_mem(length, max_phys_address)
-        self.logger.log_hal(f'[mem] Allocated: PA = 0x{pa:016X}, VA = 0x{va:016X}')
-        return (va, pa)

-
-
[docs]    def va2pa(self, va: int) -> Optional[int]:
-        (pa, error_code) = self.helper.va2pa(va)
-        if error_code:
-            self.logger.log_hal(f'[mem] Looks like VA (0x{va:016X}) not mapped')
-            return None
-        self.logger.log_hal(f'[mem] VA (0x{va:016X}) -> PA (0x{pa:016X})')
-        return pa

-
-    # Map physical address to virtual
-
-
[docs]    def map_io_space(self, pa: int, length: int, cache_type: int) -> int:
-        va = self.helper.map_io_space(pa, length, cache_type)
-        self.logger.log_hal(f'[mem] Mapped: PA = 0x{pa:016X}, VA = 0x{va:016X}')
-        return va

-
-    # Free physical memory buffer
-
-
[docs]    def free_physical_mem(self, pa: int) -> bool:
-        ret = self.helper.free_phys_mem(pa)
-        self.logger.log_hal(f'[mem] Deallocated : PA = 0x{pa:016X}')
-        return True if ret == 1 else False

-
-
[docs]    def set_mem_bit(self, addr: int, bit: int) -> int:
-        addr += bit >> 3
-        byte = self.read_physical_mem_byte(addr)
-        self.write_physical_mem_byte(addr, (byte | (0x1 << (bit & 0x7))))
-        return byte

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/smbios.html b/_modules/chipsec/hal/smbios.html deleted file mode 100644 index c8245d3f..00000000 --- a/_modules/chipsec/hal/smbios.html +++ /dev/null @@ -1,637 +0,0 @@ - - - - - - - - chipsec.hal.smbios — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.smbios

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-HAL component providing access to and decoding of SMBIOS structures
-"""
-
-import struct
-from collections import namedtuple
-from typing import Dict, List, Optional, Tuple, Any, Union, Type
-from chipsec.defines import BOUNDARY_1MB, bytestostring
-from chipsec.hal import hal_base, uefi
-from chipsec.logger import logger
-
-SCAN_LOW_LIMIT = 0xF0000
-SCAN_SIZE = 0x10000
-
-SMBIOS_2_x_SIG = b"_SM_"
-SMBIOS_2_x_ENTRY_SIZE = 0x1F
-SMBIOS_2_x_ENTRY_SIZE_OLD = 0x1E
-SMBIOS_2_x_MAJOR_VER = 0x02
-SMBIOS_2_x_INT_SIG = b"_DMI_"
-SMBIOS_2_x_GUID = "EB9D2D31-2D88-11D3-9A16-0090273FC14D"
-SMBIOS_2_x_ENTRY_POINT_FMT = "=4sBBBBHB5B5sBHIHB"
-SMBIOS_2_x_ENTRY_POINT_SIZE = struct.calcsize(SMBIOS_2_x_ENTRY_POINT_FMT)
-
-
-
[docs]class SMBIOS_2_x_ENTRY_POINT(namedtuple('SMBIOS_2_x_ENTRY_POINT', 'Anchor EntryCs EntryLen MajorVer MinorVer MaxSize EntryRev \
-        FormatArea0 FormatArea1 FormatArea2 FormatArea3 FormatArea4 IntAnchor IntCs TableLen TableAddr NumStructures BcdRev')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-SMBIOS 2.x Entry Point Structure:
-  Anchor String             : {bytestostring(self.Anchor)}
-  Checksum                  : 0x{self.EntryCs:02X}
-  Entry Point Length        : 0x{self.EntryLen:02X}
-  Entry Point Version       : {self.MajorVer:d}.{self.MinorVer:d}
-  Max Structure Size        : 0x{self.MaxSize:04X}
-  Entry Point Revision      : 0x{self.EntryRev:02X}
-  Formatted Area            : 0x{self.FormatArea0:02X}, 0x{self.FormatArea1:02X}, 0x{self.FormatArea2:02X}, 0x{self.FormatArea3:02X}, 0x{self.FormatArea4:02X}
-  Intermediate Anchor String: {bytestostring(self.IntAnchor)}
-  Intermediate Checksum     : 0x{self.IntCs:02X}
-  Structure Table Length    : 0x{self.TableLen:04X}
-  Structure Table Address   : 0x{self.TableAddr:08X}
-  SMBIOS Structure Count    : 0x{self.NumStructures:04X}
-  SMBIOS BCD Revision       : 0x{self.BcdRev:02X}
-"""

-
-
-SMBIOS_3_x_SIG = b"_SM3_"
-SMBIOS_3_x_ENTRY_SIZE = 0x18
-SMBIOS_3_x_MAJOR_VER = 0x03
-SMBIOS_3_x_GUID = "F2FD1544-9794-4A2C-992E-E5BBCF20E394"
-SMBIOS_3_x_ENTRY_POINT_FMT = "=5sBBBBBBBIQ"
-SMBIOS_3_x_ENTRY_POINT_SIZE = struct.calcsize(SMBIOS_3_x_ENTRY_POINT_FMT)
-
-
-
[docs]class SMBIOS_3_x_ENTRY_POINT(namedtuple('SMBIOS_3_x_ENTRY_POINT', 'Anchor EntryCs EntryLen MajorVer MinorVer Docrev EntryRev \
-        Reserved MaxSize TableAddr')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-SMBIOS 3.x Entry Point Structure:
-  Anchor String             : {bytestostring(self.Anchor)}
-  Checksum                  : 0x{self.EntryCs:02X}
-  Entry Point Length        : 0x{self.EntryLen:02X}
-  Entry Ponnt Version       : {self.MajorVer:d}.{self.MinorVer:d}
-  SMBIOS Docrev             : 0x{self.Docrev:02X}
-  Entry Point Revision      : 0x{self.EntryRev:02X}
-  Reserved                  : 0x{self.Reserved:02X}
-  Max Structure Size        : 0x{self.MaxSize:08X}
-  Structure Table Address   : 0x{self.TableAddr:016X}
-"""

-
-
-SMBIOS_STRUCT_HEADER_FMT = "=BBH"
-SMBIOS_STRUCT_HEADER_SIZE = struct.calcsize(SMBIOS_STRUCT_HEADER_FMT)
-
-
-
[docs]class SMBIOS_STRUCT_HEADER(namedtuple('SMBIOS_STRUCT_HEADER', 'Type Length Handle')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-SMBIOS Struct Header:
-  Type                      : 0x{self.Type:02X} ({self.Type:d})
-  Length                    : 0x{self.Length:02X}
-  Handle                    : 0x{self.Handle:04X}
-"""

-
-
-SMBIOS_STRUCT_TERM_FMT = "=H"
-SMBIOS_STRUCT_TERM_SIZE = struct.calcsize(SMBIOS_STRUCT_TERM_FMT)
-SMBIOS_STRUCT_TERM_VAL = 0x0000
-
-
-SMBIOS_BIOS_INFO_ENTRY_ID = 0
-SMBIOS_BIOS_INFO_2_0_ENTRY_FMT = '=BBHBBHBBQ'
-SMBIOS_BIOS_INFO_2_0_ENTRY_SIZE = struct.calcsize(SMBIOS_BIOS_INFO_2_0_ENTRY_FMT)
-SMBIOS_BIOS_INFO_2_0_FORMAT_STRING_FAILED = """
-SMBIOS BIOS Information structure decode failed
-"""
-
-
-
[docs]class SMBIOS_BIOS_INFO_2_0(namedtuple('SMBIOS_BIOS_INFO_2_0_ENTRY', 'type length handle vendor_str version_str segment \
-        release_str rom_sz bios_char strings')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        str_count = len(self.strings)
-        ven_str = ''
-        ver_str = ''
-        rel_str = ''
-        if self.vendor_str != 0 and self.vendor_str <= str_count:
-            ven_str = self.strings[self.vendor_str - 1]
-        if self.version_str != 0 and self.version_str <= str_count:
-            ver_str = self.strings[self.version_str - 1]
-        if self.release_str != 0 and self.release_str <= str_count:
-            rel_str = self.strings[self.release_str - 1]
-        return f"""
-SMBIOS BIOS Information:
-  Type                      : 0x{self.type:02X} ({self.type:d})
-  Length                    : 0x{self.length:02X}
-  Handle                    : 0x{self.handle:04X}
-  Vendor                    : {ven_str:s}
-  BIOS Version              : {ver_str:s}
-  BIOS Starting Segment     : 0x{self.segment:04X}
-  BIOS Release Date         : {rel_str:s}
-  BIOS ROM Size             : 0x{self.rom_sz:02X}
-  BIOS Characteristics      : 0x{self.bios_char:016X}
-"""

-
-
-SMBIOS_SYSTEM_INFO_ENTRY_ID = 1
-SMBIOS_SYSTEM_INFO_2_0_ENTRY_FMT = '=BBHBBBB'
-SMBIOS_SYSTEM_INFO_2_0_ENTRY_SIZE = struct.calcsize(SMBIOS_SYSTEM_INFO_2_0_ENTRY_FMT)
-SMBIOS_SYSTEM_INFO_2_0_FORMAT_STRING_FAILED = """
-SMBIOS System Information structure decode failed
-"""
-
-
-
[docs]class SMBIOS_SYSTEM_INFO_2_0(namedtuple('SMBIOS_SYSTEM_INFO_2_0_ENTRY', 'type length handle manufacturer_str product_str \
-        version_str serial_str strings')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        str_count = len(self.strings)
-        man_str = ''
-        pro_str = ''
-        ver_str = ''
-        ser_str = ''
-        if self.manufacturer_str != 0 and self.manufacturer_str <= str_count:
-            man_str = self.strings[self.manufacturer_str - 1]
-        if self.product_str != 0 and self.product_str <= str_count:
-            pro_str = self.strings[self.product_str - 1]
-        if self.version_str != 0 and self.version_str <= str_count:
-            ver_str = self.strings[self.version_str - 1]
-        if self.serial_str != 0 and self.serial_str <= str_count:
-            ser_str = self.strings[self.serial_str - 1]
-        return f"""
-SMBIOS System Information:
-  Type                      : 0x{self.type:02X} ({self.type:d})
-  Length                    : 0x{self.length:02X}
-  Handle                    : 0x{self.handle:04X}
-  Manufacturer              : {man_str:s}
-  Product Name              : {pro_str:s}
-  Version                   : {ver_str:s}
-  Serial Number             : {ser_str:s}
-"""

-
-
-SmbiosInfo = Union[SMBIOS_BIOS_INFO_2_0, SMBIOS_SYSTEM_INFO_2_0]
-StructDecode = Dict[str, Any]  # TODO: Replace Any when TypeDict (PEP 589) supported
-
-struct_decode_tree: Dict[int, StructDecode] = {
-    SMBIOS_BIOS_INFO_ENTRY_ID: {'class': SMBIOS_BIOS_INFO_2_0, 'format': SMBIOS_BIOS_INFO_2_0_ENTRY_FMT},
-    SMBIOS_SYSTEM_INFO_ENTRY_ID: {'class': SMBIOS_SYSTEM_INFO_2_0, 'format': SMBIOS_SYSTEM_INFO_2_0_ENTRY_FMT}
-}
-
-
-
[docs]class SMBIOS(hal_base.HALBase):
-    def __init__(self, cs):
-        super(SMBIOS, self).__init__(cs)
-        self.uefi = uefi.UEFI(cs)
-        self.smbios_2_guid_found = False
-        self.smbios_2_pa = None
-        self.smbios_2_ep = None
-        self.smbios_2_data = None
-        self.smbios_3_guid_found = False
-        self.smbios_3_pa = None
-        self.smbios_3_ep = None
-        self.smbios_3_data = None
-
-    def __get_raw_struct(self, table: bytes, start_offset: int) -> Tuple[Optional[bytes], Optional[int]]:
-        """
-        Returns a tuple including the raw data and the offset to the next entry.  This allows the function
-        to be called multiple times to process all the entries in a table.
-
-        Return Value:
-        (raw_data, next_offset)
-
-        Error/End:
-        (None, None)
-        """
-        # Check for end of table and remaining size to parse
-        if table is None:
-            logger().log_hal('- Invalid table')
-            return (None, None)
-        table_len = len(table)
-        logger().log_hal(f'Start Offset: 0x{start_offset:04X}, Table Size: 0x{table_len:04X}')
-        if start_offset >= table_len:
-            logger().log_hal(f'- Bad table length (table_len): 0x{table_len:04X}')
-            return (None, None)
-        size_left = len(table[start_offset:])
-        if size_left < SMBIOS_STRUCT_HEADER_SIZE:
-            logger().log_hal(f'- Table too small (size_left): 0x{size_left:04X}')
-            return (None, None)
-
-        # Read the header to determine structure fixed size
-        try:
-            header = SMBIOS_STRUCT_HEADER(*struct.unpack_from(SMBIOS_STRUCT_HEADER_FMT,
-                                                              table[start_offset:start_offset + SMBIOS_STRUCT_HEADER_SIZE]))
-        except:
-            logger().log_hal('- Unable to unpack data')
-            return (None, None)
-        str_offset = start_offset + header.Length
-        if str_offset + SMBIOS_STRUCT_TERM_SIZE >= table_len:
-            logger().log_hal(f'- Not enough space for termination (str_offset): 0x{str_offset:04X}')
-            return (None, None)
-
-        # Process any remaining content (strings)
-        logger().log_hal(f'String start offset: 0x{str_offset:04X}')
-        tmp_offset = str_offset
-        while (tmp_offset + SMBIOS_STRUCT_TERM_SIZE < table_len):
-            (value, ) = struct.unpack_from(SMBIOS_STRUCT_TERM_FMT, table[tmp_offset:tmp_offset + SMBIOS_STRUCT_TERM_SIZE])
-            if value == SMBIOS_STRUCT_TERM_VAL:
-                logger().log_hal('+ Found structure termination')
-                break
-            tmp_offset += 1
-        if tmp_offset >= table_len:
-            logger().log_hal('- End of table reached')
-            return (None, None)
-        tmp_offset += SMBIOS_STRUCT_TERM_SIZE
-
-        logger().log_hal(f'Structure Size: 0x{tmp_offset - start_offset:04X}')
-        return (table[start_offset:tmp_offset], tmp_offset)
-
-    def __validate_ep_2_values(self, pa: int) -> Optional[SMBIOS_2_x_ENTRY_POINT]:
-        # Force a second read of memory so we don't have to worry about it falling outside the
-        # original buffer.
-        try:
-            logger().log_hal(f'Validating 32bit SMBIOS header @ 0x{pa:08X}')
-            mem_buffer = self.cs.mem.read_physical_mem(pa, SMBIOS_2_x_ENTRY_POINT_SIZE)
-            ep_data = SMBIOS_2_x_ENTRY_POINT(*struct.unpack_from(SMBIOS_2_x_ENTRY_POINT_FMT, mem_buffer))
-        except:
-            logger().log_hal('- Memory read failed')
-            return None
-        if ep_data.Anchor != SMBIOS_2_x_SIG:
-            logger().log_hal('- Invalid signature')
-            return None
-        if not (ep_data.EntryLen == SMBIOS_2_x_ENTRY_SIZE or ep_data.EntryLen == SMBIOS_2_x_ENTRY_SIZE_OLD):
-            logger().log_hal('- Invalid structure size')
-            return None
-        if ep_data.IntAnchor != SMBIOS_2_x_INT_SIG:
-            logger().log_hal('- Invalid intermediate signature')
-            return None
-        if (ep_data.TableAddr == 0) or (ep_data.TableLen == 0):
-            logger().log_hal('- Invalid table address or length')
-            return None
-        return ep_data
-
-    def __validate_ep_3_values(self, pa: int) -> Optional[SMBIOS_3_x_ENTRY_POINT]:
-        # Force a second read of memory so we don't have to worry about it falling outside the
-        # original buffer.
-        try:
-            logger().log_hal(f'Validating 64bit SMBIOS header @ 0x{pa:08X}')
-            mem_buffer = self.cs.mem.read_physical_mem(pa, SMBIOS_3_x_ENTRY_POINT_SIZE)
-            ep_data = SMBIOS_3_x_ENTRY_POINT(*struct.unpack_from(SMBIOS_3_x_ENTRY_POINT_FMT, mem_buffer))
-        except:
-            logger().log_hal('- Memory read failed')
-            return None
-        if ep_data.Anchor != SMBIOS_3_x_SIG:
-            logger().log_hal('- Invalid signature')
-            return None
-        if not (ep_data.EntryLen == SMBIOS_3_x_ENTRY_SIZE):
-            logger().log_hal('- Invalid structure size')
-            return None
-        if ep_data.MaxSize == 0 or ep_data.TableAddr == 0:
-            logger().log_hal('- Invalid table address or maximum size')
-            return None
-        return ep_data
-
-
[docs]    def find_smbios_table(self) -> bool:
-        # Handle the case were we already found the tables
-        if self.smbios_2_ep is not None or self.smbios_3_ep is not None:
-            return True
-
-        # Initialize search parameters
-        entries_to_find = entries_found = 0
-
-        # Fist get the configuration table using the UEFI HAL.  You may not be able to use the addresses
-        # in the table because in some cases they have been converted to a VA and are not mapped.
-        logger().log_hal('Checking UEFI Configuration Table for SMBIOS entry')
-        (ect_found, _, ect, _) = self.uefi.find_EFI_Configuration_Table()
-        if ect_found and (ect is not None):
-            logger().log_hal(str(ect))
-            if SMBIOS_2_x_GUID in ect.VendorTables:
-                logger().log_hal('+ Found 32bit SMBIOS entry')
-                logger().log_hal(f'+ Potential 2.x table address: 0x{ect.VendorTables[SMBIOS_2_x_GUID]:016X}')
-                self.smbios_2_guid_found = True
-                entries_to_find += 1
-            if SMBIOS_3_x_GUID in ect.VendorTables:
-                logger().log_hal('+ Found 64bit SMBIOS entry')
-                logger().log_hal(f'+ Potential 3.x table address: 0x{ect.VendorTables[SMBIOS_3_x_GUID]:016X}')
-                self.smbios_3_guid_found = True
-                entries_to_find += 1
-
-        # Determine regions to scan
-        if self.smbios_2_guid_found or self.smbios_3_guid_found:
-            (smm_base, _, _) = self.cs.cpu.get_SMRAM()
-            pa = smm_base - SCAN_SIZE
-        else:
-            entries_to_find = 2
-            pa = BOUNDARY_1MB - SCAN_SIZE
-
-        # Scan memory for the signature
-        logger().log_hal(f'Scanning memory for {entries_to_find:d} signature(s)')
-        while (pa >= SCAN_LOW_LIMIT):
-            mem_buffer = self.cs.mem.read_physical_mem(pa, SCAN_SIZE)
-            sig_pa = mem_buffer.find(SMBIOS_2_x_SIG) + pa
-            if sig_pa >= pa and self.smbios_2_pa is None:
-                logger().log_hal(f'+ Found SMBIOS 2.x signature @ 0x{sig_pa:08X}')
-                self.smbios_2_ep = self.__validate_ep_2_values(sig_pa)
-                if self.smbios_2_ep is not None:
-                    logger().log_hal('+ Verified SMBIOS 2.x Entry Point structure')
-                    self.smbios_2_pa = sig_pa
-                    entries_found += 1
-            sig_pa = mem_buffer.find(SMBIOS_3_x_SIG) + pa
-            if sig_pa >= pa and self.smbios_3_pa is None:
-                logger().log_hal(f'+ Found SMBIOS 3.x signature @ 0x{sig_pa:08X}')
-                self.smbios_3_ep = self.__validate_ep_3_values(sig_pa)
-                if self.smbios_3_ep is not None:
-                    logger().log_hal('+ Verified SMBIOS 3.x Entry Point structure')
-                    self.smbios_3_pa = sig_pa
-                    entries_found += 1
-            if entries_found >= entries_to_find:
-                break
-            pa -= SCAN_SIZE
-
-        # Check to see if we thing we found the structure
-        if self.smbios_2_pa is None and self.smbios_3_pa is None:
-            logger().log_hal('- Unable to find SMBIOS tables')
-            return False
-
-        # Read the raw data regions
-        logger().log_hal('Reading SMBIOS data tables:')
-        if self.smbios_2_ep is not None and self.smbios_2_ep.TableAddr != 0 and self.smbios_2_ep.TableLen != 0:
-            self.smbios_2_data = self.cs.mem.read_physical_mem(self.smbios_2_ep.TableAddr, self.smbios_2_ep.TableLen)
-            if self.smbios_2_data is None:
-                logger().log_hal('- Failed to read 32bit SMBIOS data')
-        if self.smbios_3_ep is not None and self.smbios_3_ep.TableAddr != 0 and self.smbios_3_ep.MaxSize != 0:
-            self.smbios_3_data = self.cs.mem.read_physical_mem(self.smbios_3_ep.TableAddr, self.smbios_3_ep.MaxSize)
-            if self.smbios_3_data is None:
-                logger().log_hal('- Failed to read 64bit SMBIOS data')
-
-        return True

-
-
[docs]    def get_raw_structs(self, struct_type: Optional[int], force_32bit: bool):
-        """
-        Returns a list of raw data blobs for each SMBIOS structure.  The default is to process the 64bit
-        entries if available unless specifically specified.
-
-        Error:
-        None
-        """
-        ret_val = []
-
-        if self.smbios_3_data is not None and not force_32bit:
-            logger().log_hal('Using 64bit SMBIOS table')
-            table = self.smbios_3_data
-        elif self.smbios_2_data is not None:
-            logger().log_hal('Using 32bit SMBIOS table')
-            table = self.smbios_2_data
-        else:
-            logger().log_hal('- No SMBIOS data available')
-            return None
-
-        logger().log_hal('Getting SMBIOS structures...')
-        raw_data, next_offset = self.__get_raw_struct(table, 0)
-        while (next_offset is not None) and (raw_data is not None):
-            if struct_type is None:
-                ret_val.append(raw_data)
-            else:
-                header = SMBIOS_STRUCT_HEADER(*struct.unpack_from(SMBIOS_STRUCT_HEADER_FMT, raw_data[:SMBIOS_STRUCT_HEADER_SIZE]))
-                if header is not None and header.Type == struct_type:
-                    ret_val.append(raw_data)
-            raw_data, next_offset = self.__get_raw_struct(table, next_offset)
-
-        return ret_val

-
-
[docs]    def get_header(self, raw_data: bytes) -> Optional[SMBIOS_STRUCT_HEADER]:
-        logger().log_hal('Getting generic SMBIOS header information')
-        if raw_data is None:
-            logger().log_hal('- Raw data pointer is None')
-            return None
-        if len(raw_data) < SMBIOS_STRUCT_HEADER_SIZE:
-            logger().log_hal('- Raw data too small for header information')
-            return None
-
-        try:
-            header = SMBIOS_STRUCT_HEADER(*struct.unpack_from(SMBIOS_STRUCT_HEADER_FMT, raw_data[:SMBIOS_STRUCT_HEADER_SIZE]))
-        except:
-            logger().log_hal('- Failed to extract information from raw data')
-            return None
-
-        return header

-
-
[docs]    def get_string_list(self, raw_data: bytes) -> Optional[List[str]]:
-        ret_val = []
-
-        logger().log_hal('Getting strings from structure')
-        raw_data_size = len(raw_data)
-        header = self.get_header(raw_data)
-        if header is None:
-            return None
-        if header.Length + SMBIOS_STRUCT_TERM_SIZE > raw_data_size:
-            logger().log_hal('- Data buffer too small for structure')
-            return None
-        if header.Length + SMBIOS_STRUCT_TERM_SIZE == raw_data_size:
-            logger().log_hal('+ No strings in this structure')
-            return ret_val
-
-        index = 0
-        tmp_offset = header.Length
-        while tmp_offset + index + 1 < raw_data_size:
-            (value, ) = struct.unpack_from('=B', raw_data[tmp_offset + index:])
-            if value == 0:
-                logger().log_hal(f'+ Unpacking string of size {index:d}')
-                (string, ) = struct.unpack_from(f'={index:d}s', raw_data[tmp_offset:])
-                string = bytestostring(string)
-                logger().log_hal(f'+ Found: {string:s}')
-                ret_val.append(string)
-                tmp_offset += index + 1
-                index = 0
-                continue
-            index += 1
-
-        logger().log_hal(f'+ Found {len(ret_val):d} strings')
-        return ret_val

-
-
[docs]    def get_decoded_structs(self, struct_type: Optional[int] = None, force_32bit: bool = False) -> Optional[List[Type[SmbiosInfo]]]:
-        ret_val = []
-
-        # Determine if the structure exists in the table
-        logger().log_hal('Getting decoded SMBIOS structures')
-        structs = self.get_raw_structs(struct_type, force_32bit)
-        if structs is None:
-            return None
-
-        # Process all the entries
-        for data in structs:
-            # Get the structures header information so we can determine the correct decode method
-            header = self.get_header(data)
-            if header is None:
-                logger().log_hal('- Could not decode header')
-                continue
-            if header.Type not in struct_decode_tree:
-                logger().log_hal(f'- Structure {header.Type:d} not in decode list')
-                continue
-
-            # Unpack the structure and then get the strings
-            tmp_decode = struct_decode_tree[header.Type]
-            try:
-                decode_data = struct.unpack_from(tmp_decode['format'], data)
-            except:
-                logger().log_hal('- Could not decode structure')
-                continue
-            if decode_data is None:
-                logger().log_hal('- No structure data was decoded')
-                continue
-            strings = self.get_string_list(data)
-            if strings is not None:
-                decode_data = decode_data + (strings, )
-
-            # Create the actual object
-            try:
-                decode_object = tmp_decode['class'](*decode_data)
-            except:
-                logger().log_hal('- Failed to create structure')
-                continue
-            ret_val.append(decode_object)
-
-        return ret_val

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/smbus.html b/_modules/chipsec/hal/smbus.html deleted file mode 100644 index 211d7353..00000000 --- a/_modules/chipsec/hal/smbus.html +++ /dev/null @@ -1,360 +0,0 @@ - - - - - - - - chipsec.hal.smbus — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.smbus

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-Access to SMBus Controller
-"""
-from typing import List
-from chipsec.hal import iobar, hal_base
-from chipsec.exceptions import IOBARNotFoundError, RegisterNotFoundError
-
-SMBUS_COMMAND_QUICK = 0
-SMBUS_COMMAND_BYTE = 1
-SMBUS_COMMAND_BYTE_DATA = 2
-SMBUS_COMMAND_WORD_DATA = 3
-SMBUS_COMMAND_PROCESS_CALL = 4
-SMBUS_COMMAND_BLOCK = 5
-SMBUS_COMMAND_I2C_READ = 6
-SMBUS_COMMAND_BLOCK_PROCESS = 7
-
-SMBUS_POLL_COUNT = 1000
-
-SMBUS_COMMAND_WRITE = 0
-SMBUS_COMMAND_READ = 1
-
-
-
[docs]class SMBus(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(SMBus, self).__init__(cs)
-        self.iobar = iobar.IOBAR(self.cs)
-        self.smb_reg_status = 'SMBUS_HST_STS'
-        self.smb_reg_command = 'SMBUS_HST_CMD'
-        self.smb_reg_address = 'SMBUS_HST_SLVA'
-        self.smb_reg_control = 'SMBUS_HST_CNT'
-        self.smb_reg_data0 = 'SMBUS_HST_D0'
-        self.smb_reg_data1 = 'SMBUS_HST_D1'
-
-
[docs]    def get_SMBus_Base_Address(self) -> int:
-        if self.iobar.is_IO_BAR_defined('SMBUS_BASE'):
-            (sba_base, _) = self.iobar.get_IO_BAR_base_address('SMBUS_BASE')
-            return sba_base
-        else:
-            raise IOBARNotFoundError('IOBARAccessError: SMBUS_BASE')

-
-
[docs]    def get_SMBus_HCFG(self) -> int:
-        if self.cs.is_register_defined('SMBUS_HCFG'):
-            reg_value = self.cs.read_register('SMBUS_HCFG')
-            if self.logger.HAL:
-                self.cs.print_register('SMBUS_HCFG', reg_value)
-            return reg_value
-        else:
-            raise RegisterNotFoundError('RegisterNotFound: SMBUS_HCFG')

-
-
[docs]    def display_SMBus_info(self) -> None:
-        self.logger.log_hal(f'[smbus] SMBus Base Address: 0x{self.get_SMBus_Base_Address():04X}')
-        self.get_SMBus_HCFG()

-
-
[docs]    def is_SMBus_enabled(self) -> bool:
-        return self.cs.is_device_enabled('SMBUS')

-
-
[docs]    def is_SMBus_supported(self) -> bool:
-        (did, vid) = self.cs.get_DeviceVendorID('SMBUS')
-        self.logger.log_hal(f'[smbus] SMBus Controller (DID,VID) = (0x{did:04X},0x{vid:04X})')
-        if (0x8086 == vid):
-            return True
-        else:
-            self.logger.log_error(f'Unknown SMBus Controller (DID,VID) = (0x{did:04X},0x{vid:04X})')
-            return False

-
-
[docs]    def is_SMBus_host_controller_enabled(self) -> int:
-        hcfg = self.get_SMBus_HCFG()
-        return self.cs.get_register_field("SMBUS_HCFG", hcfg, "HST_EN")

-
-
[docs]    def enable_SMBus_host_controller(self) -> None:
-        # Enable SMBus Host Controller Interface in HCFG
-        reg_value = self.cs.read_register('SMBUS_HCFG')
-        if 0 == (reg_value & 0x1):
-            self.cs.write_register('SMBUS_HCFG', (reg_value | 0x1))
-        # @TODO: check SBA is programmed
-        sba = self.get_SMBus_Base_Address()
-        # Enable SMBus I/O Space
-        cmd = self.cs.read_register('SMBUS_CMD')
-        if 0 == (cmd & 0x1):
-            self.cs.write_register('SMBUS_CMD', (cmd | 0x1))

-
-
[docs]    def reset_SMBus_controller(self) -> bool:
-        reg_value = self.cs.read_register('SMBUS_HCFG')
-        self.cs.write_register('SMBUS_HCFG', reg_value | 0x08)
-        for i in range(SMBUS_POLL_COUNT):
-            if (self.cs.read_register('SMBUS_HCFG') & 0x08) == 0:
-                return True
-        return False

-
-    #
-    # SMBus commands
-    #
-
-    # waits for SMBus to become ready
-    def _is_smbus_ready(self) -> bool:
-        busy = None
-        for i in range(SMBUS_POLL_COUNT):
-            #time.sleep( SMBUS_POLL_SLEEP_INTERVAL )
-            busy = self.cs.read_register_field(self.smb_reg_status, 'BUSY')
-            if 0 == busy:
-                return True
-        return 0 == busy
-
-    # waits for SMBus transaction to complete
-    def _wait_for_cycle(self) -> bool:
-        busy = None
-        for i in range(SMBUS_POLL_COUNT):
-            #time.sleep( SMBUS_POLL_SLEEP_INTERVAL )
-            sts = self.cs.read_register(self.smb_reg_status)
-            busy = self.cs.get_register_field(self.smb_reg_status, sts, 'BUSY')
-            intr = self.cs.get_register_field(self.smb_reg_status, sts, 'INTR')
-            failed = self.cs.get_register_field(self.smb_reg_status, sts, 'FAILED')
-            if 0 == busy and 1 == intr:
-                # if self.logger.HAL:
-                #    intr = chipsec.chipset.get_register_field( self.cs, self.smb_reg_status, sts, 'INTR' )
-                #    self.logger.log( "[smbus]: INTR = {:d}".format(intr) )
-                break
-            elif 1 == failed:
-                #kill = 0
-                # if chipsec.chipset.register_has_field( self.cs, self.smb_reg_control, 'KILL' ):
-                #    kill = chipsec.chipset.read_register_field( self.cs, self.smb_reg_control, 'KILL' )
-                if self.logger.HAL:
-                    self.logger.log_error("SMBus transaction failed (FAILED/ERROR bit = 1)")
-                return False
-            else:
-                if self.cs.register_has_field(self.smb_reg_status, 'DEV_ERR'):
-                    if 1 == self.cs.get_register_field(self.smb_reg_status, sts, 'DEV_ERR'):
-                        if self.logger.HAL:
-                            self.logger.log_error("SMBus device error (invalid cmd, unclaimed cycle or time-out error)")
-                        return False
-                if self.cs.register_has_field(self.smb_reg_status, 'BUS_ERR'):
-                    if 1 == self.cs.get_register_field(self.smb_reg_status, sts, 'BUS_ERR'):
-                        if self.logger.HAL:
-                            self.logger.log_error("SMBus bus error")
-                        return False
-        return 0 == busy
-
-
[docs]    def read_byte(self, target_address: int, offset: int) -> int:
-        # clear status bits
-        self.cs.write_register(self.smb_reg_status, 0xFF)
-
-        # SMBus txn RW direction = Read, SMBus slave address = target_address
-        hst_sa = 0x0
-        hst_sa = self.cs.set_register_field(self.smb_reg_address, hst_sa, 'RW', SMBUS_COMMAND_READ)
-        hst_sa = self.cs.set_register_field(self.smb_reg_address, hst_sa, 'Address', target_address, True)
-        self.cs.write_register(self.smb_reg_address, hst_sa)
-        # command data = byte offset (bus txn address)
-        self.cs.write_register_field(self.smb_reg_command, 'DataOffset', offset)
-        # command = Byte Data
-        # if self.cs.register_has_field( self.smb_reg_control, 'SMB_CMD' ):
-        self.cs.write_register_field(self.smb_reg_control, 'SMB_CMD', SMBUS_COMMAND_BYTE_DATA)
-        # send SMBus txn
-        self.cs.write_register_field(self.smb_reg_control, 'START', 1)
-
-        # wait for cycle to complete
-        if not self._wait_for_cycle():
-            return 0xFF
-        # read the data
-        value = self.cs.read_register_field(self.smb_reg_data0, 'Data')
-        # clear status bits
-        self.cs.write_register(self.smb_reg_status, 0xFF)
-        # clear address/offset registers
-        #chipsec.chipset.write_register( self.cs, self.smb_reg_address, 0x0 )
-        #chipsec.chipset.write_register( self.cs, self.smb_reg_command, 0x0 )
-        self.logger.log_hal(f'[smbus] read device {target_address:X} off {offset:X} = {value:X}')
-        return value

-
-
[docs]    def write_byte(self, target_address: int, offset: int, value: int) -> bool:
-        # clear status bits
-        self.cs.write_register(self.smb_reg_status, 0xFF)
-
-        # SMBus txn RW direction = Write, SMBus slave address = target_address
-        hst_sa = 0x0
-        hst_sa = self.cs.set_register_field(self.smb_reg_address, hst_sa, 'RW', SMBUS_COMMAND_WRITE)
-        hst_sa = self.cs.set_register_field(self.smb_reg_address, hst_sa, 'Address', target_address, True)
-        self.cs.write_register(self.smb_reg_address, hst_sa)
-        # command data = byte offset (bus txn address)
-        self.cs.write_register_field(self.smb_reg_command, 'DataOffset', offset)
-        # write the data
-        self.cs.write_register_field(self.smb_reg_data0, 'Data', value)
-        # command = Byte Data
-        # if self.cs.register_has_field( self.smb_reg_control, 'SMB_CMD' ):
-        self.cs.write_register_field(self.smb_reg_control, 'SMB_CMD', SMBUS_COMMAND_BYTE_DATA)
-        # send SMBus txn
-        self.cs.write_register_field(self.smb_reg_control, 'START', 1)
-
-        # wait for cycle to complete
-        if not self._wait_for_cycle():
-            return False
-        # clear status bits
-        self.cs.write_register(self.smb_reg_status, 0xFF)
-        # clear address/offset registers
-        #chipsec.chipset.write_register( self.cs, self.smb_reg_address, 0x0 )
-        #chipsec.chipset.write_register( self.cs, self.smb_reg_command, 0x0 )
-        self.logger.log_hal(f'[smbus] write to device {target_address:X} off {offset:X} = {value:X}')
-        return True

-
-
[docs]    def read_range(self, target_address: int, start_offset: int, size: int) -> bytes:
-        buffer = bytes(self.read_byte(target_address, start_offset + i) for i in range(size))
-        self.logger.log_hal(f'[smbus] reading {size:d} bytes from device 0x{target_address:X} at offset {start_offset:X}')
-        return buffer

-
-
[docs]    def write_range(self, target_address: int, start_offset: int, buffer: bytes) -> bool:
-        for i, b in enumerate(buffer):
-            self.write_byte(target_address, start_offset + i, b)
-        self.logger.log_hal(f'[smbus] writing {size:d} bytes to device 0x{target_address:X} at offset {start_offset:X}')
-        return True

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/spd.html b/_modules/chipsec/hal/spd.html deleted file mode 100644 index 1ef5ee3d..00000000 --- a/_modules/chipsec/hal/spd.html +++ /dev/null @@ -1,532 +0,0 @@ - - - - - - - - chipsec.hal.spd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.spd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Access to Memory (DRAM) Serial Presence Detect (SPD) EEPROM
-
-References:
-
-http://www.jedec.org/sites/default/files/docs/4_01_02R19.pdf
-http://www.jedec.org/sites/default/files/docs/4_01_02_10R17.pdf
-http://www.jedec.org/sites/default/files/docs/4_01_02_11R24.pdf
-http://www.jedec.org/sites/default/files/docs/4_01_02_12R23A.pdf
-https://www.simmtester.com/News/PublicationArticle/184
-https://www.simmtester.com/News/PublicationArticle/153
-https://www.simmtester.com/News/PublicationArticle/101
-http://en.wikipedia.org/wiki/Serial_presence_detect
-"""
-
-import struct
-from typing import Any, List
-from collections import namedtuple
-
-from chipsec.logger import logger, print_buffer_bytes
-
-SPD_SMBUS_ADDRESS = 0xA0  # A2, A4, A6, A8, AA, AC, AE
-SPD_SMBUS_ADDRESS_DIMM0 = SPD_SMBUS_ADDRESS
-SPD_SMBUS_ADDRESS_DIMM1 = SPD_SMBUS_ADDRESS + 0x2
-SPD_SMBUS_ADDRESS_DIMM2 = SPD_SMBUS_ADDRESS + 0x4
-SPD_SMBUS_ADDRESS_DIMM3 = SPD_SMBUS_ADDRESS + 0x6
-SPD_SMBUS_ADDRESS_DIMM4 = SPD_SMBUS_ADDRESS + 0x8
-SPD_SMBUS_ADDRESS_DIMM5 = SPD_SMBUS_ADDRESS + 0xA
-SPD_SMBUS_ADDRESS_DIMM6 = SPD_SMBUS_ADDRESS + 0xC
-SPD_SMBUS_ADDRESS_DIMM7 = SPD_SMBUS_ADDRESS + 0xE
-MAX_DIMM_SPD_COUNT = 8
-
-SPD_DIMMS = {}
-for i in range(MAX_DIMM_SPD_COUNT):
-    SPD_DIMMS[SPD_SMBUS_ADDRESS + i * 2] = f'DIMM{i:d}'
-
-SPD_DIMM_ADDRESSES = {}
-for i in range(MAX_DIMM_SPD_COUNT):
-    SPD_DIMM_ADDRESSES[f'DIMM{i:d}'] = SPD_SMBUS_ADDRESS + i * 2
-
-###############################################################################
-#
-# SPD Decode
-#
-# References:
-# http://www.jedec.org/sites/default/files/docs/4_01_02R19.pdf
-# http://www.jedec.org/sites/default/files/docs/4_01_02_10R17.pdf
-# http://www.jedec.org/sites/default/files/docs/4_01_02_11R24.pdf
-# http://www.jedec.org/sites/default/files/docs/4_01_02_12R23A.pdf
-# http://www.simmtester.com/page/news/showpubnews.asp?num=184
-# http://www.simmtester.com/page/news/showpubnews.asp?num=153
-# http://www.simmtester.com/page/news/showpubnews.asp?num=101
-# http://en.wikipedia.org/wiki/Serial_presence_detect
-#
-# @TODO: add decode of other fields
-#
-###############################################################################
-
-#
-# DDR/DDR2/DDR3/DDR4 SPD
-#
-SPD_OFFSET_DRAM_DEVICE_TYPE = 2  # Fundamental Memory (DRAM) Type
-
-#
-# DDR SPD
-#
-SPD_OFFSET_DDR_SPD_BYTES = 0
-SPD_OFFSET_DDR_SPD_SIZE = 1
-SPD_OFFSET_DDR_ROW_ADDRESS_COUNT = 3
-SPD_OFFSET_DDR_COL_ADDRESS_COUNT = 4
-SPD_OFFSET_DDR_BANKDS_COUNT = 5
-SPD_OFFSET_DDR_MODULE_WIDTH_LOW = 6
-SPD_OFFSET_DDR_MODULE_WIDTH_HIGH = 7
-SPD_OFFSET_DDR_VOLTAGE_IFACE_LEVEL = 8
-SPD_OFFSET_DDR_CLOCK_FREQUENCY = 9
-SPD_OFFSET_DDR_tAC = 10
-SPD_OFFSET_DDR_DIMM_CONFIGURATION_TYPE = 11
-SPD_OFFSET_DDR_REFRESH_RATE_TYPE = 12
-SPD_OFFSET_DDR_PRIMARY_SDRAM_WIDTH = 13
-SPD_OFFSET_DDR_ECC_SDRAM_WIDTH = 14
-SPD_OFFSET_DDR_tCCD_MIN = 15
-
-#
-# DDR3 SPD
-#
-SPD_OFFSET_DDR3_SPD_BYTES = 0  # SPD Bytes Written, Device Size, CRC coverage/range
-SPD_OFFSET_DDR3_SPD_REVISION = 1  # SPD Revision
-SPD_OFFSET_DDR3_MODULE_TYPE = 3  # Module Type
-SPD_OFFSET_DDR3_SDRAM_DENSITY_BANKS = 4  # SDRAM Density and Banks
-SPD_OFFSET_DDR3_SDRAM_ADDRESSING = 5  # SDRAM Addressing
-SPD_OFFSET_DDR3_VDD = 6  # Module Nominal Voltage, VDD
-SPD_OFFSET_DDR3_MODULE_ORGANIZATION = 7  # Module Organization
-SPD_OFFSET_DDR3_MEMORY_BUS_WIDTH_ECC = 8  # Module Memory Bus Width
-SPD_OFFSET_DDR3_FTB = 9  # Fine Time Base (FTB) Divident / Divisor
-SPD_OFFSET_DDR3_MTB_DIVIDENT = 10  # Medium Time Base (MTB) Divident
-SPD_OFFSET_DDR3_MTB_DIVISOR = 11  # Medium Time Base (MTB) Divisor
-SPD_OFFSET_DDR3_tCK_MIN = 12  # SDRAM Minimum Cycle Time (tCKmin)
-SPD_OFFSET_DDR3_RESERVED13 = 13  # Reserved
-SPD_OFFSET_DDR3_CAS_LATENCY_LOW = 14  # CAS Latencies Supported, LSB
-SPD_OFFSET_DDR3_CAS_LATENCY_HIGH = 15  # CAS Latencies Supported, MSB
-
-#
-# DDR4 SPD
-#
-# Base Configuration and DRAM Parameters
-SPD_OFFSET_DDR4_SPD_BYTES = 0  # SPD Bytes Written, Device Size, CRC coverage/range
-SPD_OFFSET_DDR4_SPD_REVISION = 1  # SPD Revision
-SPD_OFFSET_DDR4_MODULE_TYPE = 3  # Module Type
-SPD_OFFSET_DDR4_SDRAM_DENSITY_BANKS = 4  # SDRAM Density and Banks
-SPD_OFFSET_DDR4_SDRAM_ADDRESSING = 5  # SDRAM Addressing
-SPD_OFFSET_DDR4_SDRAM_PACKAGE_TYPE = 6  # SDRAM Package Type
-SPD_OFFSET_DDR4_OPTIONAL_FEATURES = 7  # SDRAM Optional Features
-SPD_OFFSET_DDR4_THERMAL_AND_REFRESH = 8  # SDRAM Thermal and Refresh Options
-SPD_OFFSET_DDR4_OPTIONAL_FEATURES_1 = 9  # Other Optional Features
-SPD_OFFSET_DDR4_RESERVED10 = 10  # Reserved (must be 0x00)
-SPD_OFFSET_DDR4_VDD = 11  # Module Nominal Voltage, VDD
-SPD_OFFSET_DDR4_MODULE_ORGANIZATION = 12  # Module Organization
-SPD_OFFSET_DDR4_MEMORY_BUS_WIDTH_ECC = 13  # Module Memory Bus Width
-SPD_OFFSET_DDR4_MODULE_THERMAL_SENSOR = 14  # Module Thermal Sensor
-SPD_OFFSET_DDR4_MODULE_TYPE_EXTENDED = 15  # Extended Module Type
-
-
-#
-# Fundamental Memory Type
-# Ref: http://www.jedec.org/sites/default/files/docs/4_01_02_01R12.pdf
-#
-DRAM_DEVICE_TYPE_FPM_DRAM = 0x1
-DRAM_DEVICE_TYPE_EDO = 0x2
-DRAM_DEVICE_TYPE_PIPELINED_NIBBLE = 0x3
-DRAM_DEVICE_TYPE_SDR = 0x4
-DRAM_DEVICE_TYPE_MULTIPLEXED_ROM = 0x5
-DRAM_DEVICE_TYPE_DDR = 0x7
-DRAM_DEVICE_TYPE_DDR2 = 0x8
-DRAM_DEVICE_TYPE_DDR3 = 0x0B
-DRAM_DEVICE_TYPE_DDR4 = 0x0C
-DRAM_DEVICE_TYPE = {
-    DRAM_DEVICE_TYPE_FPM_DRAM: 'Standard Fast Page Mode DRAM',
-    DRAM_DEVICE_TYPE_EDO: 'EDO DRAM',
-    DRAM_DEVICE_TYPE_PIPELINED_NIBBLE: 'Pipelined Nibble',
-    DRAM_DEVICE_TYPE_SDR: 'Sync DRAM (SDRAM)',
-    DRAM_DEVICE_TYPE_MULTIPLEXED_ROM: 'Multiplexed ROM',
-    DRAM_DEVICE_TYPE_DDR: 'DDR SDRAM',
-    DRAM_DEVICE_TYPE_DDR2: 'DDR2 SDRAM',
-    DRAM_DEVICE_TYPE_DDR3: 'DDR3 SDRAM',
-    DRAM_DEVICE_TYPE_DDR4: 'DDR4 SDRAM'
-}
-
-MODULE_TYPE_UNDEFINED = 0x0
-MODULE_TYPE_RDIMM = 0x1
-MODULE_TYPE_UDIMM = 0x2
-MODULE_TYPE_SODIMM = 0x3
-MODULE_TYPE_LRDIMM = 0x4
-MODULE_TYPE = {
-    MODULE_TYPE_UNDEFINED: 'Undefined',
-    MODULE_TYPE_RDIMM: 'Registered Long DIMM',
-    MODULE_TYPE_UDIMM: 'Unbuffered Long DIMM',
-    MODULE_TYPE_SODIMM: 'Small Outline DIMM',
-    MODULE_TYPE_LRDIMM: 'LR-DIMM'
-}
-
-SPD_REVISION_0_0 = 0x00
-SPD_REVISION_0_7 = 0x07
-SPD_REVISION_0_8 = 0x08
-SPD_REVISION_0_9 = 0x09
-SPD_REVISION_1_0 = 0x10
-SPD_REVISION_1_1 = 0x11
-SPD_REVISION_1_2 = 0x12
-SPD_REVISION_1_3 = 0x13
-
-
-
[docs]def SPD_REVISION(revision: int) -> str:
-    return (f'{revision >> 4:d}.{revision & 0xF:d}')

-
-
-
[docs]def dram_device_type_name(dram_type: int) -> str:
-    dt_name = DRAM_DEVICE_TYPE[dram_type] if dram_type in DRAM_DEVICE_TYPE else 'unknown'
-    return dt_name

-
-
-
[docs]def module_type_name(module_type: int) -> str:
-    mt_name = MODULE_TYPE[module_type] if module_type in MODULE_TYPE else 'unknown'
-    return mt_name

-
-
-SPD_DDR_FORMAT = '=4B'
-
-
-
[docs]class SPD_DDR(namedtuple('SPD_DDR', 'SPDBytes TotalBytes DeviceType RowAddressCount')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""------------------------------------------------------------------
-SPD DDR
-------------------------------------------------------------------
-[0] Number of SPD bytes written: 0x{self.SPDBytes:02X}
-[1] Total number of bytes      : 0x{self.TotalBytes:02X}
-[2] DRAM Memory Type           : 0x{self.DeviceType:02X} ({dram_device_type_name(self.DeviceType)})
-[3] Number of Row Addresses    : 0x{self.RowAddressCount:02X}
-------------------------------------------------------------------
-"""

-
-
-SPD_DDR2_FORMAT = '=4B'
-
-
-
[docs]class SPD_DDR2(namedtuple('SPD_DDR2', 'SPDBytes TotalBytes DeviceType RowAddressCount')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""------------------------------------------------------------------
-SPD DDR2
-------------------------------------------------------------------
-[0] Number of SPD bytes written: 0x{self.SPDBytes:02X}
-[1] Total number of bytes      : 0x{self.TotalBytes:02X}
-[2] DRAM Memory Type           : 0x{self.DeviceType:02X} ({dram_device_type_name(self.DeviceType)})
-[3] Number of Row Addresses    : 0x{self.RowAddressCount:02X}
-------------------------------------------------------------------
-"""

-
-
-SPD_DDR3_FORMAT = '=16B'
-
-
-
[docs]class SPD_DDR3(namedtuple('SPD_DDR3', 'SPDBytes Revision DeviceType ModuleType ChipSize Addressing Voltages ModuleOrg BusWidthECC FTB MTBDivident MTBDivisor tCKMin RsvdD CASLo CASHi')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""------------------------------------------------------------------
-SPD DDR3
-------------------------------------------------------------------
-[0x00] SPD Bytes Written, Device Size, CRC: 0x{self.SPDBytes:02X}
-[0x01] SPD Revision                       : 0x{self.Revision:02X} ({SPD_REVISION(self.Revision)})
-[0x02] DRAM Memory Type                   : 0x{self.DeviceType:02X} ({dram_device_type_name(self.DeviceType)})
-[0x03] Module Type                        : 0x{self.ModuleType:02X} ({module_type_name(self.ModuleType)})
-[0x04] SDRAM Density and Banks            : 0x{self.ChipSize:02X}
-[0x05] SDRAM Addressing (Row/Column Bits) : 0x{self.Addressing:02X}
-[0x06] Module Nominal Voltage, VDD        : 0x{self.Voltages:02X}
-[0x07] Module Organization                : 0x{self.ModuleOrg:02X}
-[0x08] Module Memory Bus Width, ECC       : 0x{self.BusWidthECC:02X}
-[0x09] FTB Divident/Divisor               : 0x{self.FTB:02X}
-[0x0A] MTB Divident                       : 0x{self.MTBDivident:02X}
-[0x0B] MTB Divisor                        : 0x{self.MTBDivisor:02X}
-[0x0C] SDRAM Minimum Cycle Time (tCKmin)  : 0x{self.tCKMin:02X}
-[0x0D] Reserved                           : 0x{self.RsvdD:02X}
-[0x0E] CAS Latencies Supported (LSB)      : 0x{self.CASLo:02X}
-[0x0F] CAS Latencies Supported (MSB)      : 0x{self.CASHi:02X}
-------------------------------------------------------------------
-"""

-
-
-SPD_DDR4_FORMAT = '=16B'
-
-
-
[docs]class SPD_DDR4(namedtuple('SPD_DDR4', 'SPDBytes Revision DeviceType ModuleType Density Addressing PackageType OptFeatures ThermalRefresh OptFeatures1 ReservedA VDD ModuleOrg BusWidthECC ThermSensor ModuleTypeExt')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""------------------------------------------------------------------
-SPD DDR4
-------------------------------------------------------------------
-Base Configuration and DRAM Parameters
-[0x00] SPD Bytes Written, Device Size, CRC: 0x{self.SPDBytes:02X}
-[0x01] SPD Revision                       : 0x{self.Revision:02X} ({SPD_REVISION(self.Revision)})
-[0x02] DRAM Memory Type                   : 0x{self.DeviceType:02X} ({dram_device_type_name(self.DeviceType)})
-[0x03] Module Type                        : 0x{self.ModuleType:02X} ({module_type_name(self.ModuleType)})
-[0x04] SDRAM Density and Banks            : 0x{self.Density:02X}
-[0x05] SDRAM Addressing (Row/Column Bits) : 0x{self.Addressing:02X}
-[0x06] SDRAM Package Type                 : 0x{self.PackageType:02X}
-[0x07] SDRAM Optional Features            : 0x{self.OptFeatures:02X}
-[0x08] SDRAM Thermal and Refresh Options  : 0x{self.ThermalRefresh:02X}
-[0x09] Other Optional Features            : 0x{self.OptFeatures1:02X}
-[0x0A] Reserved (== 0x00)                 : 0x{self.ReservedA:02X}
-[0x0B] Module Nominal Voltage, VDD        : 0x{self.VDD:02X}
-[0x0C] Module Organization                : 0x{self.ModuleOrg:02X}
-[0x0D] Module Memory Bus Width            : 0x{self.BusWidthECC:02X}
-[0x0E] Module Thermal Sensor              : 0x{self.ThermSensor:02X}
-[0x0F] Extended Module Type               : 0x{self.ModuleTypeExt:02X}
-------------------------------------------------------------------
-"""

-
-
-###############################################################################
-#
-# Main SPD HAL component class
-#
-###############################################################################
-
-
[docs]class SPD:
-    def __init__(self, smbus):
-        self.smbus = smbus
-
-
[docs]    def read_byte(self, offset: int, device: int = SPD_SMBUS_ADDRESS) -> int:
-        return self.smbus.read_byte(device, offset)

-
-
[docs]    def write_byte(self, offset: int, value: int, device: int = SPD_SMBUS_ADDRESS) -> bool:
-        return self.smbus.write_byte(device, offset, value)

-
-
[docs]    def read_range(self, start_offset: int, size: int, device: int = SPD_SMBUS_ADDRESS) -> bytes:
-        return bytes(self.read_byte(start_offset + i, device) for i in range(size))

-
-
[docs]    def write_range(self, start_offset: int, buffer: bytes, device: int = SPD_SMBUS_ADDRESS) -> bool:
-        for i, b in enumerate(buffer):
-            self.write_byte(start_offset + i, b, device)
-        return True

-
-
[docs]    def dump_spd_rom(self, device: int = SPD_SMBUS_ADDRESS) -> bytes:
-        return self.read_range(0x0, 0x100, device)

-
-    #
-    # Decoding certain bytes of DIMM SPD: may be dependent on the DRAM type
-    #
-
[docs]    def getDRAMDeviceType(self, device: int = SPD_SMBUS_ADDRESS) -> int:
-        dram_type = self.read_byte(SPD_OFFSET_DRAM_DEVICE_TYPE, device)
-        logger().log_hal(f'[spd][0x{device:02X}] DRAM Device Type (byte 2): 0x{dram_type:01X}')
-        return dram_type

-
-
[docs]    def getModuleType(self, device: int = SPD_SMBUS_ADDRESS) -> int:
-        module_type = self.read_byte(SPD_OFFSET_DDR3_MODULE_TYPE, device)
-        logger().log_hal(f'[spd][0x{device:02X}] Module Type (byte 3): 0x{module_type:01X}')
-        return module_type

-
-
[docs]    def isECC(self, device: int = SPD_SMBUS_ADDRESS) -> bool:
-        device_type = self.getDRAMDeviceType(device)
-        ecc_supported = False
-        ecc_off = 0
-        ecc = None
-        if DRAM_DEVICE_TYPE_DDR3 == device_type:
-            ecc_off = SPD_OFFSET_DDR3_MEMORY_BUS_WIDTH_ECC
-            ecc = self.read_byte(ecc_off, device)
-            ecc_supported = (0xB == ecc)
-        elif DRAM_DEVICE_TYPE_DDR4 == device_type:
-            ecc_off = SPD_OFFSET_DDR4_MEMORY_BUS_WIDTH_ECC
-            ecc = self.read_byte(ecc_off, device)
-            ecc_supported = (0xB == ecc)
-        elif DRAM_DEVICE_TYPE_DDR == device_type or DRAM_DEVICE_TYPE_DDR2 == device_type:
-            ecc_off = SPD_OFFSET_DDR_DIMM_CONFIGURATION_TYPE
-            ecc = self.read_byte(ecc_off, device)
-            ecc_supported = (0x2 == ecc)
-            ecc_width = self.read_byte(SPD_OFFSET_DDR_ECC_SDRAM_WIDTH, device)
-            logger().log_hal(f'[spd][0x{device:02X}] DDR/DDR2 ECC width (byte {SPD_OFFSET_DDR_ECC_SDRAM_WIDTH:d}): 0x{ecc_width:02X}')
-
-        if logger().HAL:
-            if ecc is None:
-                logger().log(f'[spd][0x{device:02X}] Unable to determine ECC support')
-            else:
-                not_str = '' if ecc_supported else 'not '
-                logger().log(f'[spd][0x{device:02X}] ECC is {not_str}supported by the DIMM (byte {ecc_off:d} = 0x{ecc:02X})')
-        return ecc_supported

-
-
[docs]    def detect(self) -> List[int]:
-        _dimms = []
-        for d in SPD_DIMMS:
-            if self.isSPDPresent(d):
-                _dimms.append(d)
-        if logger().HAL:
-            logger().log('Detected the following SPD devices:')
-            for _dimm in _dimms:
-                logger().log(f"{SPD_DIMMS[_dimm]}: 0x{_dimm:02X}")
-        return _dimms

-
-
[docs]    def isSPDPresent(self, device: int = SPD_SMBUS_ADDRESS) -> bool:
-        device_type = self.getDRAMDeviceType(device)
-        is_spd_present = (device_type != 0xFF)
-        not_str = '' if is_spd_present else 'not '
-        logger().log_hal(f'[spd][0x{device:02X}] Detecting SPD.. {not_str}found (DRAM memory type = 0x{device_type:X})')
-        return is_spd_present

-
-
[docs]    def decode(self, device: int = SPD_SMBUS_ADDRESS) -> None:
-        spd: Any = None
-        device_type = self.getDRAMDeviceType(device)
-        spd_buffer = self.dump_spd_rom(device)
-        logger().log(f'[spd][0x{device:02X}] Serial Presence Detect (SPD) EEPROM contents:')
-        print_buffer_bytes(spd_buffer)
-
-        if DRAM_DEVICE_TYPE_DDR == device_type:
-            spd = SPD_DDR(*struct.unpack_from(SPD_DDR_FORMAT, spd_buffer))
-        elif DRAM_DEVICE_TYPE_DDR2 == device_type:
-            spd = SPD_DDR2(*struct.unpack_from(SPD_DDR2_FORMAT, spd_buffer))
-        elif DRAM_DEVICE_TYPE_DDR3 == device_type:
-            spd = SPD_DDR3(*struct.unpack_from(SPD_DDR3_FORMAT, spd_buffer))
-        elif DRAM_DEVICE_TYPE_DDR4 == device_type:
-            spd = SPD_DDR4(*struct.unpack_from(SPD_DDR4_FORMAT, spd_buffer))
-        else:
-            logger().log_warning('[spd] Unsupported SPD format')
-
-        if spd is not None:
-            logger().log(str(spd))

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/spi.html b/_modules/chipsec/hal/spi.html deleted file mode 100644 index 0230a614..00000000 --- a/_modules/chipsec/hal/spi.html +++ /dev/null @@ -1,926 +0,0 @@ - - - - - - - - chipsec.hal.spi — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.spi

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Access to SPI Flash parts
-
-usage:
-    >>> read_spi( spi_fla, length )
-    >>> write_spi( spi_fla, buf )
-    >>> erase_spi_block( spi_fla )
-    >>> get_SPI_JEDEC_ID()
-    >>> get_SPI_JEDEC_ID_decoded()
-
-.. note::
-    !! IMPORTANT:
-    Size of the data chunk used in SPI read cycle (in bytes)
-    default = maximum 64 bytes (remainder is read in 4 byte chunks)
-
-    If you want to change logic to read SPI Flash in 4 byte chunks:
-    SPI_READ_WRITE_MAX_DBC = 4
-
-    @TBD: SPI write cycles operate on 4 byte chunks (not optimized yet)
-
-    Approximate performance (on 2-core SMT Intel Core i5-4300U (Haswell) CPU 1.9GHz):
-    SPI read: ~7 sec per 1MB (with DBC=64)
-"""
-
-import struct
-import time
-from typing import Dict, Tuple, Optional
-from chipsec.defines import ALIGNED_4KB, BIT0, BIT1, BIT2, BIT5
-from chipsec.file import write_file, read_file
-from chipsec.logger import print_buffer_bytes
-from chipsec.hal import hal_base, mmio
-from chipsec.hal.spi_jedec_ids import JEDEC_ID
-from chipsec.exceptions import SpiRuntimeError, UnimplementedAPIError
-
-SPI_READ_WRITE_MAX_DBC = 64
-SPI_READ_WRITE_DEF_DBC = 4
-SFDP_HEADER = 0x50444653
-
-SPI_MAX_PR_COUNT = 5
-SPI_FLA_SHIFT = 12
-SPI_FLA_PAGE_MASK = ALIGNED_4KB
-
-SPI_MMIO_BASE_LENGTH = 0x200
-PCH_RCBA_SPI_HSFSTS_SCIP = BIT5                          # SPI cycle in progress
-PCH_RCBA_SPI_HSFSTS_AEL = BIT2                          # Access Error Log
-PCH_RCBA_SPI_HSFSTS_FCERR = BIT1                          # Flash Cycle Error
-PCH_RCBA_SPI_HSFSTS_FDONE = BIT0                          # Flash Cycle Done
-
-PCH_RCBA_SPI_HSFCTL_FCYCLE_READ = 0                             # Flash Cycle Read
-PCH_RCBA_SPI_HSFCTL_FCYCLE_WRITE = 2                             # Flash Cycle Write
-PCH_RCBA_SPI_HSFCTL_FCYCLE_ERASE = 3                             # Flash Cycle Block Erase
-PCH_RCBA_SPI_HSFCTL_FCYCLE_SFDP = 5
-PCH_RCBA_SPI_HSFCTL_FCYCLE_JEDEC = 6                             # Flash Cycle Read JEDEC ID
-PCH_RCBA_SPI_HSFCTL_FCYCLE_FGO = BIT0                          # Flash Cycle GO
-
-PCH_RCBA_SPI_FADDR_MASK = 0x07FFFFFF                      # SPI Flash Address Mask [0:26]
-
-PCH_RCBA_SPI_FREGx_LIMIT_MASK = 0x7FFF0000                    # Size
-PCH_RCBA_SPI_FREGx_BASE_MASK = 0x00007FFF                    # Base
-
-PCH_RCBA_SPI_OPTYPE_RDNOADDR = 0x00
-PCH_RCBA_SPI_OPTYPE_WRNOADDR = 0x01
-PCH_RCBA_SPI_OPTYPE_RDADDR = 0x02
-PCH_RCBA_SPI_OPTYPE_WRADDR = 0x03
-
-PCH_RCBA_SPI_FDOC_FDSS_FSDM = 0x0000                        # Flash Signature and Descriptor Map
-PCH_RCBA_SPI_FDOC_FDSS_COMP = 0x1000                        # Component
-PCH_RCBA_SPI_FDOC_FDSS_REGN = 0x2000                        # Region
-PCH_RCBA_SPI_FDOC_FDSS_MSTR = 0x3000                        # Master
-PCH_RCBA_SPI_FDOC_FDSI_MASK = 0x0FFC                        # Flash Descriptor Section Index
-
-# agregated SPI Flash commands
-HSFCTL_READ_CYCLE = ((PCH_RCBA_SPI_HSFCTL_FCYCLE_READ << 1) | PCH_RCBA_SPI_HSFCTL_FCYCLE_FGO)
-HSFCTL_WRITE_CYCLE = ((PCH_RCBA_SPI_HSFCTL_FCYCLE_WRITE << 1) | PCH_RCBA_SPI_HSFCTL_FCYCLE_FGO)
-HSFCTL_ERASE_CYCLE = ((PCH_RCBA_SPI_HSFCTL_FCYCLE_ERASE << 1) | PCH_RCBA_SPI_HSFCTL_FCYCLE_FGO)
-HSFCTL_JEDEC_CYCLE = ((PCH_RCBA_SPI_HSFCTL_FCYCLE_JEDEC << 1) | PCH_RCBA_SPI_HSFCTL_FCYCLE_FGO)
-HSFCTL_SFDP_CYCLE = ((PCH_RCBA_SPI_HSFCTL_FCYCLE_SFDP << 1) | PCH_RCBA_SPI_HSFCTL_FCYCLE_FGO)
-
-# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
-# FGO bit cleared (for safety ;)
-# !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!
-#HSFCTL_WRITE_CYCLE = ( (PCH_RCBA_SPI_HSFCTL_FCYCLE_WRITE<<1) )
-#HSFCTL_ERASE_CYCLE = ( (PCH_RCBA_SPI_HSFCTL_FCYCLE_ERASE<<1) )
-
-HSFSTS_CLEAR = (PCH_RCBA_SPI_HSFSTS_AEL | PCH_RCBA_SPI_HSFSTS_FCERR | PCH_RCBA_SPI_HSFSTS_FDONE)
-
-#
-# Hardware Sequencing Flash Status (HSFSTS)
-#
-SPI_HSFSTS_OFFSET = 0x04
-# HSFSTS bit masks
-SPI_HSFSTS_FLOCKDN_MASK = (1 << 15)
-SPI_HSFSTS_FDOPSS_MASK = (1 << 13)
-
-#
-# Flash Regions
-#
-
-SPI_REGION_NUMBER_IN_FD = 12
-
-FLASH_DESCRIPTOR = 0
-BIOS = 1
-ME = 2
-GBE = 3
-PLATFORM_DATA = 4
-FREG5 = 5
-FREG6 = 6
-FREG7 = 7
-EMBEDDED_CONTROLLER = 8
-FREG9 = 9
-FREG10 = 10
-FREG11 = 11
-
-SPI_REGION: Dict[int, str] = {
-    FLASH_DESCRIPTOR: 'FREG0_FLASHD',
-    BIOS: 'FREG1_BIOS',
-    ME: 'FREG2_ME',
-    GBE: 'FREG3_GBE',
-    PLATFORM_DATA: 'FREG4_PD',
-    FREG5: 'FREG5',
-    FREG6: 'FREG6',
-    FREG7: 'FREG7',
-    EMBEDDED_CONTROLLER: 'FREG8_EC',
-    FREG9: 'FREG9',
-    FREG10: 'FREG10',
-    FREG11: 'FREG11'
-}
-
-SPI_REGION_NAMES: Dict[int, str] = {
-    FLASH_DESCRIPTOR: 'Flash Descriptor',
-    BIOS: 'BIOS',
-    ME: 'Intel ME',
-    GBE: 'GBe',
-    PLATFORM_DATA: 'Platform Data',
-    FREG5: 'Flash Region 5',
-    FREG6: 'Flash Region 6',
-    FREG7: 'Flash Region 7',
-    EMBEDDED_CONTROLLER: 'Embedded Controller',
-    FREG9: 'Flash Region 9',
-    FREG10: 'Flash Region 10',
-    FREG11: 'Flash Region 11'
-}
-
-#
-# Flash Descriptor Master Defines
-#
-
-MASTER_HOST_CPU_BIOS = 0
-MASTER_ME = 1
-MASTER_GBE = 2
-MASTER_EC = 3
-
-SPI_MASTER_NAMES: Dict[int, str] = {
-    MASTER_HOST_CPU_BIOS: 'CPU',
-    MASTER_ME: 'ME',
-    MASTER_GBE: 'GBe',
-    MASTER_EC: 'EC'
-}
-
-# @TODO: DEPRECATED
-
-
-
[docs]def get_SPI_region(flreg: int) -> Tuple[int, int]:
-    range_base = (flreg & PCH_RCBA_SPI_FREGx_BASE_MASK) << SPI_FLA_SHIFT
-    range_limit = ((flreg & PCH_RCBA_SPI_FREGx_LIMIT_MASK) >> 4)
-    range_limit |= SPI_FLA_PAGE_MASK
-    return (range_base, range_limit)

-
-
-
[docs]class SPI(hal_base.HALBase):
-
-    def __init__(self, cs):
-        super(SPI, self).__init__(cs)
-        self.mmio = mmio.MMIO(cs)
-        self.rcba_spi_base = self.get_SPI_MMIO_base()
-        # We try to map SPIBAR in the process memory, this will increase the
-        # speed of MMIO access later on.
-        try:
-            self.cs.helper.map_io_space(self.rcba_spi_base, SPI_MMIO_BASE_LENGTH, 0)
-        except UnimplementedAPIError:
-            pass
-
-        # Reading definitions of SPI flash controller registers
-        # which are required to send SPI cycles once for performance reasons
-        self.hsfs_off = self.cs.get_register_def("HSFS")['offset']
-        self.hsfc_off = self.cs.get_register_def("HSFC")['offset']
-        self.faddr_off = self.cs.get_register_def("FADDR")['offset']
-        self.fdata0_off = self.cs.get_register_def("FDATA0")['offset']
-        self.fdata1_off = self.cs.get_register_def("FDATA1")['offset']
-        self.fdata2_off = self.cs.get_register_def("FDATA2")['offset']
-        self.fdata3_off = self.cs.get_register_def("FDATA3")['offset']
-        self.fdata4_off = self.cs.get_register_def("FDATA4")['offset']
-        self.fdata5_off = self.cs.get_register_def("FDATA5")['offset']
-        self.fdata6_off = self.cs.get_register_def("FDATA6")['offset']
-        self.fdata7_off = self.cs.get_register_def("FDATA7")['offset']
-        self.fdata8_off = self.cs.get_register_def("FDATA8")['offset']
-        self.fdata9_off = self.cs.get_register_def("FDATA9")['offset']
-        self.fdata10_off = self.cs.get_register_def("FDATA10")['offset']
-        self.fdata11_off = self.cs.get_register_def("FDATA11")['offset']
-        self.fdata12_off = self.cs.get_register_def("FDATA12")['offset']
-        self.fdata13_off = self.cs.get_register_def("FDATA13")['offset']
-        self.fdata14_off = self.cs.get_register_def("FDATA14")['offset']
-        self.fdata15_off = self.cs.get_register_def("FDATA15")['offset']
-        self.bios_ptinx = self.cs.get_register_def("BIOS_PTINX")['offset']
-        self.bios_ptdata = self.cs.get_register_def("BIOS_PTDATA")['offset']
-
-        self.logger.log_hal("[spi] Reading SPI flash controller registers definitions:")
-        self.logger.log_hal(f'      HSFS   offset = 0x{self.hsfs_off:04X}')
-        self.logger.log_hal(f'      HSFC   offset = 0x{self.hsfc_off:04X}')
-        self.logger.log_hal(f'      FADDR  offset = 0x{self.faddr_off:04X}')
-        self.logger.log_hal(f'      FDATA0 offset = 0x{self.fdata0_off:04X}')
-
-
[docs]    def get_SPI_MMIO_base(self) -> int:
-        spi_base = 0
-        if self.mmio.is_MMIO_BAR_defined('SPIBAR'):
-            (spi_base, _) = self.mmio.get_MMIO_BAR_base_address('SPIBAR')
-        else:
-            self.logger.log_hal('[spi] get_SPI_MMIO_base(): SPIBAR not defined. Returning spi_base = 0.')
-        self.logger.log_hal(f'[spi] SPI MMIO base: 0x{spi_base:016X} (assuming below 4GB)')
-        return spi_base

-
-
[docs]    def spi_reg_read(self, reg: int, size: int = 4) -> int:
-        return self.mmio.read_MMIO_reg(self.rcba_spi_base, reg, size)

-
-
[docs]    def spi_reg_write(self, reg: int, value: int, size: int = 4) -> Optional[int]:
-        return self.mmio.write_MMIO_reg(self.rcba_spi_base, reg, value, size)

-
-
[docs]    def get_SPI_region(self, spi_region_id: int) -> Tuple[int, int, int]:
-        freg_name = SPI_REGION[spi_region_id]
-        if not self.cs.is_register_defined(freg_name):
-            return (0, 0, 0)
-        freg = self.cs.read_register(freg_name)
-        # Region Base corresponds to FLA bits 24:12
-        range_base = self.cs.get_register_field(freg_name, freg, 'RB') << SPI_FLA_SHIFT
-        # Region Limit corresponds to FLA bits 24:12
-        range_limit = self.cs.get_register_field(freg_name, freg, 'RL') << SPI_FLA_SHIFT
-        # FLA bits 11:0 are assumed to be FFFh for the limit comparison
-        range_limit |= SPI_FLA_PAGE_MASK
-        return (range_base, range_limit, freg)

-
-    SpiRegions = Dict[int, Tuple[int, int, int, str, int]]
-
-    # all_regions = True : return all SPI regions
-    # all_regions = False: return only available SPI regions (limit >= base)
-
[docs]    def get_SPI_regions(self, all_regions: bool = True) -> SpiRegions:
-        spi_regions: Dict[int, Tuple[int, int, int, str, int]] = {}
-        for r in SPI_REGION:
-            (range_base, range_limit, freg) = self.get_SPI_region(r)
-            if range_base is None:
-                continue
-            if all_regions or (range_limit >= range_base):
-                range_size = range_limit - range_base + 1
-                spi_regions[r] = (range_base, range_limit, range_size, SPI_REGION_NAMES[r], freg)
-        return spi_regions

-
-
[docs]    def get_SPI_Protected_Range(self, pr_num: int) -> Tuple[int, int, int, int, int, int]:
-        if pr_num > SPI_MAX_PR_COUNT:
-            return (0, 0, 0, 0, 0, 0)
-
-        pr_name = f'PR{pr_num:x}'
-        pr_j_reg = self.cs.get_register_def(pr_name)['offset']
-        pr_j = self.cs.read_register(pr_name)
-
-        # Protected Range Base corresponds to FLA bits 24:12
-        base = self.cs.get_register_field(pr_name, pr_j, 'PRB') << SPI_FLA_SHIFT
-        # Protected Range Limit corresponds to FLA bits 24:12
-        limit = self.cs.get_register_field(pr_name, pr_j, 'PRL') << SPI_FLA_SHIFT
-
-        wpe = (0 != self.cs.get_register_field(pr_name, pr_j, 'WPE'))
-        rpe = (0 != self.cs.get_register_field(pr_name, pr_j, 'RPE'))
-
-        # Check if this is a valid PRx config
-        if wpe or rpe:
-            # FLA bits 11:0 are assumed to be FFFh for the limit comparison
-            limit |= SPI_FLA_PAGE_MASK
-
-        return (base, limit, wpe, rpe, pr_j_reg, pr_j)

-
-    ##############################################################################################################
-    # SPI configuration
-    ##############################################################################################################
-
-
[docs]    def display_SPI_Flash_Descriptor(self) -> None:
-        self.logger.log("============================================================")
-        self.logger.log("SPI Flash Descriptor")
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log("\nFlash Signature and Descriptor Map:")
-        for j in range(5):
-            self.cs.write_register('FDOC', (PCH_RCBA_SPI_FDOC_FDSS_FSDM | (j << 2)))
-            fdod = self.cs.read_register('FDOD')
-            self.logger.log(f'{fdod:08X}')
-
-        self.logger.log("\nComponents:")
-        for j in range(3):
-            self.cs.write_register('FDOC', (PCH_RCBA_SPI_FDOC_FDSS_COMP | (j << 2)))
-            fdod = self.cs.read_register('FDOD')
-            self.logger.log(f'{fdod:08X}')
-
-        self.logger.log("\nRegions:")
-        for j in range(5):
-            self.cs.write_register('FDOC', (PCH_RCBA_SPI_FDOC_FDSS_REGN | (j << 2)))
-            fdod = self.cs.read_register('FDOD')
-            self.logger.log(f'{fdod:08X}')
-
-        self.logger.log("\nMasters:")
-        for j in range(3):
-            self.cs.write_register('FDOC', (PCH_RCBA_SPI_FDOC_FDSS_MSTR | (j << 2)))
-            fdod = self.cs.read_register('FDOD')
-            self.logger.log(f'{fdod:08X}')

-
-
[docs]    def display_SPI_opcode_info(self) -> None:
-        self.logger.log("============================================================")
-        self.logger.log("SPI Opcode Info")
-        self.logger.log("------------------------------------------------------------")
-        preop = self.cs.read_register('PREOP')
-        self.logger.log(f'PREOP : 0x{preop:04X}')
-        optype = self.cs.read_register('OPTYPE')
-        self.logger.log(f'OPTYPE: 0x{optype:04X}')
-        opmenu_lo = self.cs.read_register('OPMENU_LO')
-        opmenu_hi = self.cs.read_register('OPMENU_HI')
-        opmenu = ((opmenu_hi << 32) | opmenu_lo)
-        self.logger.log(f'OPMENU: 0x{opmenu:016X}')
-        self.logger.log('')
-        preop0 = preop & 0xFF
-        preop1 = (preop >> 8) & 0xFF
-        self.logger.log(f'Prefix Opcode 0 = 0x{preop0:02X}')
-        self.logger.log(f'Prefix Opcode 1 = 0x{preop1:02X}')
-
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log("Opcode # | Opcode | Optype | Description")
-        self.logger.log("------------------------------------------------------------")
-        for j in range(8):
-            optype_j = ((optype >> j * 2) & 0x3)
-            if (PCH_RCBA_SPI_OPTYPE_RDNOADDR == optype_j):
-                desc = 'SPI read cycle without address'
-            elif (PCH_RCBA_SPI_OPTYPE_WRNOADDR == optype_j):
-                desc = 'SPI write cycle without address'
-            elif (PCH_RCBA_SPI_OPTYPE_RDADDR == optype_j):
-                desc = 'SPI read cycle with address'
-            elif (PCH_RCBA_SPI_OPTYPE_WRADDR == optype_j):
-                desc = 'SPI write cycle with address'
-            else:
-                desc = ''
-            self.logger.log(f'Opcode{j:d}  | 0x{(opmenu >> j * 8) & 0xFF:02X}   | {optype_j:x}      | {desc} ')

-
-
[docs]    def display_SPI_Flash_Regions(self) -> None:
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log("Flash Region             | FREGx Reg | Base     | Limit     ")
-        self.logger.log("------------------------------------------------------------")
-        regions = self.get_SPI_regions()
-        for (region_id, region) in regions.items():
-            base, limit, size, name, freg = region
-            self.logger.log(f'{region_id:d} {name:22} | {freg:08X}  | {base:08X} | {limit:08X} ')

-
-
[docs]    def display_BIOS_region(self) -> None:
-        bfpreg = self.cs.read_register('BFPR')
-        base = self.cs.get_register_field('BFPR', bfpreg, 'PRB') << SPI_FLA_SHIFT
-        limit = self.cs.get_register_field('BFPR', bfpreg, 'PRL') << SPI_FLA_SHIFT
-        limit |= SPI_FLA_PAGE_MASK
-        self.logger.log("BIOS Flash Primary Region")
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log(f'BFPREG = {bfpreg:08X}:')
-        self.logger.log(f'  Base  : {base:08X}')
-        self.logger.log(f'  Limit : {limit:08X}')

-
-
[docs]    def display_SPI_Ranges_Access_Permissions(self) -> None:
-        self.logger.log("SPI Flash Region Access Permissions")
-        self.logger.log("------------------------------------------------------------")
-        fracc = self.cs.read_register('FRAP')
-        if self.logger.HAL:
-            self.cs.print_register('FRAP', fracc)
-        brra = self.cs.get_register_field('FRAP', fracc, 'BRRA')
-        brwa = self.cs.get_register_field('FRAP', fracc, 'BRWA')
-        bmrag = self.cs.get_register_field('FRAP', fracc, 'BMRAG')
-        bmwag = self.cs.get_register_field('FRAP', fracc, 'BMWAG')
-        self.logger.log('')
-        self.logger.log(f'BIOS Region Write Access Grant ({bmwag:02X}):')
-        regions = self.get_SPI_regions()
-        for region_id in regions:
-            self.logger.log(f'  {SPI_REGION[region_id]:12}: {0 != bmwag & (1 << region_id):1d}')
-        self.logger.log(f'BIOS Region Read Access Grant ({bmrag:02X}):')
-        for region_id in regions:
-            self.logger.log(f'  {SPI_REGION[region_id]:12}: {0 != bmrag & (1 << region_id):1d}')
-        self.logger.log(f'BIOS Region Write Access ({brwa:02X}):')
-        for region_id in regions:
-            self.logger.log(f'  {SPI_REGION[region_id]:12}: {0 != brwa & (1 << region_id):1d}')
-        self.logger.log(f'BIOS Region Read Access ({brra:02X}):')
-        for region_id in regions:
-            self.logger.log(f'  {SPI_REGION[region_id]:12}: {0 != brra & (1 << region_id):1d}')

-
-
[docs]    def display_SPI_Protected_Ranges(self) -> None:
-        self.logger.log("SPI Protected Ranges")
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log("PRx (offset) | Value    | Base     | Limit    | WP? | RP?")
-        self.logger.log("------------------------------------------------------------")
-        for j in range(5):
-            (base, limit, wpe, rpe, pr_reg_off, pr_reg_value) = self.get_SPI_Protected_Range(j)
-            self.logger.log(f'PR{j:d} ({pr_reg_off:02X})     | {pr_reg_value:08X} | {base:08X} | {limit:08X} | {wpe:d}   | {rpe:d} ')

-
-
[docs]    def display_SPI_map(self) -> None:
-        self.logger.log("============================================================")
-        self.logger.log("SPI Flash Map")
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log('')
-        self.display_BIOS_region()
-        self.logger.log('')
-        self.display_SPI_Flash_Regions()
-        self.logger.log('')
-        self.display_SPI_Flash_Descriptor()
-        self.logger.log('')
-        self.display_SPI_opcode_info()
-        self.logger.log('')
-        self.logger.log("============================================================")
-        self.logger.log("SPI Flash Protection")
-        self.logger.log("------------------------------------------------------------")
-        self.logger.log('')
-        self.display_SPI_Ranges_Access_Permissions()
-        self.logger.log('')
-        self.logger.log("BIOS Region Write Protection")
-        self.logger.log("------------------------------------------------------------")
-        self.display_BIOS_write_protection()
-        self.logger.log('')
-        self.display_SPI_Protected_Ranges()
-        self.logger.log('')

-
-    ##############################################################################################################
-    # BIOS Write Protection
-    ##############################################################################################################
-
-
[docs]    def display_BIOS_write_protection(self) -> None:
-        if self.cs.is_register_defined('BC'):
-            reg_value = self.cs.read_register('BC')
-            self.cs.print_register('BC', reg_value)
-        else:
-            if self.logger.HAL:
-                self.logger.log_error("Could not locate the definition of 'BIOS Control' register..")

-
-
[docs]    def disable_BIOS_write_protection(self) -> bool:
-        if self.logger.HAL:
-            self.display_BIOS_write_protection()
-        ble = self.cs.get_control('BiosLockEnable')
-        bioswe = self.cs.get_control('BiosWriteEnable')
-        smmbwp = self.cs.get_control('SmmBiosWriteProtection')
-
-        if smmbwp == 1:
-            self.logger.log_hal("[spi] SMM BIOS write protection (SmmBiosWriteProtection) is enabled")
-
-        if bioswe == 1:
-            self.logger.log_hal("[spi] BIOS write protection (BiosWriteEnable) is not enabled")
-            return True
-        elif ble == 0:
-            self.logger.log_hal("[spi] BIOS write protection is enabled but not locked. Disabling..")
-        else:  # bioswe == 0 and ble == 1
-            self.logger.log_hal("[spi] BIOS write protection is enabled. Attempting to disable..")
-
-        # Set BiosWriteEnable control bit
-        self.cs.set_control('BiosWriteEnable', 1)
-
-        # read BiosWriteEnable back to check if BIOS writes are enabled
-        bioswe = self.cs.get_control('BiosWriteEnable')
-
-        if self.logger.HAL:
-            self.display_BIOS_write_protection()
-        if self.logger.HAL:
-            protection = 'disabled' if bioswe else 'still enabled'
-            self.logger.log_important(f'BIOS write protection is {protection} (BiosWriteEnable = {bioswe:d})')
-
-        return (bioswe == 1)

-
-    ##############################################################################################################
-    # SPI Controller access functions
-    ##############################################################################################################
-
-    def _wait_SPI_flash_cycle_done(self) -> bool:
-        self.logger.log_hal('[spi] Wait for SPI cycle ready/done...')
-        hsfsts = 0
-        cycle_done = False
-
-        for i in range(1000):
-            # time.sleep(0.001)
-            hsfsts = self.spi_reg_read(self.hsfs_off, 1)
-
-            #cycle_done = (hsfsts & Cfg.Cfg.PCH_RCBA_SPI_HSFSTS_FDONE) and (0 == (hsfsts & Cfg.PCH_RCBA_SPI_HSFSTS_SCIP))
-            cycle_done = not (hsfsts & PCH_RCBA_SPI_HSFSTS_SCIP)
-            if cycle_done:
-                break
-
-        if not cycle_done:
-            self.logger.log_hal('[spi] SPI cycle still in progress. Waiting 0.1 sec...')
-            time.sleep(0.1)
-            hsfsts = self.spi_reg_read(self.hsfs_off, 1)
-            cycle_done = not (hsfsts & PCH_RCBA_SPI_HSFSTS_SCIP)
-
-        if cycle_done:
-            self.logger.log_hal('[spi] Clear FDONE/FCERR/AEL bits...')
-            self.spi_reg_write(self.hsfs_off, HSFSTS_CLEAR, 1)
-            hsfsts = self.spi_reg_read(self.hsfs_off, 1)
-            cycle_done = not ((hsfsts & PCH_RCBA_SPI_HSFSTS_AEL) or (hsfsts & PCH_RCBA_SPI_HSFSTS_FCERR))
-
-        self.logger.log_hal(f'[spi] HSFS: 0x{hsfsts:02X}')
-
-        return cycle_done
-
-    def _send_spi_cycle(self, hsfctl_spi_cycle_cmd: int, dbc: int, spi_fla: int) -> bool:
-        self.logger.log_hal(f'[spi] > Send SPI cycle 0x{hsfctl_spi_cycle_cmd:x} to address 0x{spi_fla:08X}')
-
-        # No need to check for SPI cycle DONE status before each cycle
-        # DONE status is checked once before entire SPI operation
-
-        self.spi_reg_write(self.faddr_off, (spi_fla & PCH_RCBA_SPI_FADDR_MASK))
-        # Other options ;)
-        #chipsec.chipset.write_register( self.cs, "FADDR", (spi_fla & Cfg.PCH_RCBA_SPI_FADDR_MASK) )
-        #write_MMIO_reg( self.cs, spi_base, self.faddr_off, (spi_fla & Cfg.PCH_RCBA_SPI_FADDR_MASK) )
-        #self.cs.mem.write_physical_mem_dword( spi_base + self.faddr_off, (spi_fla & Cfg.PCH_RCBA_SPI_FADDR_MASK) )
-
-        if self.logger.HAL:
-            _faddr = self.spi_reg_read(self.faddr_off)
-            self.logger.log(f'[spi] FADDR: 0x{_faddr:08X}')
-
-        self.logger.log_hal(f'[spi] SPI cycle GO (DBC <- 0x{dbc:02X}, HSFC <- 0x{hsfctl_spi_cycle_cmd:x})')
-
-        if (HSFCTL_ERASE_CYCLE != hsfctl_spi_cycle_cmd):
-            self.spi_reg_write(self.hsfc_off + 0x1, dbc, 1)
-
-        self.spi_reg_write(self.hsfc_off, hsfctl_spi_cycle_cmd, 1)
-        #self.spi_reg_write( self.hsfc_off, ((dbc<<8)|hsfctl_spi_cycle_cmd), 2 )
-
-        # Read HSFC back (logging only)
-        if self.logger.HAL:
-            _hsfc = self.spi_reg_read(self.hsfc_off, 1)
-            self.logger.log(f'[spi] HSFC: 0x{_hsfc:04X}')
-
-        cycle_done = self._wait_SPI_flash_cycle_done()
-        if not cycle_done:
-            self.logger.log_warning("SPI cycle not done")
-        else:
-            self.logger.log_hal('[spi] < SPI cycle done')
-
-        return cycle_done
-
-
[docs]    def check_hardware_sequencing(self) -> None:
-        # Test if the flash decriptor is valid (and hardware sequencing enabled)
-        fdv = self.cs.read_register_field('HSFS', 'FDV')
-        if fdv == 0:
-            self.logger.log_error("HSFS.FDV is 0, hardware sequencing is disabled")
-            raise SpiRuntimeError("Chipset does not support hardware sequencing")

-
-    #
-    # SPI Flash operations
-    #
-
-
[docs]    def read_spi_to_file(self, spi_fla: int, data_byte_count: int, filename: str) -> bytes:
-        buf = self.read_spi(spi_fla, data_byte_count)
-        if buf is None:
-            return b''
-        if filename is not None:
-            write_file(filename, buf)
-        else:
-            print_buffer_bytes(buf, 16)
-        return buf

-
-
[docs]    def write_spi_from_file(self, spi_fla: int, filename: str) -> bool:
-        buf = read_file(filename)
-        return self.write_spi(spi_fla, buf)

-        # return self.write_spi( spi_fla, struct.unpack('B'*len(buf), buf) )
-
-
[docs]    def read_spi(self, spi_fla: int, data_byte_count: int) -> bytes:
-
-        self.check_hardware_sequencing()
-
-        buf = bytearray()
-        dbc = SPI_READ_WRITE_DEF_DBC
-        if (data_byte_count >= SPI_READ_WRITE_MAX_DBC):
-            dbc = SPI_READ_WRITE_MAX_DBC
-
-        n = data_byte_count // dbc
-        r = data_byte_count % dbc
-        if self.logger.UTIL_TRACE or self.logger.HAL:
-            self.logger.log(f'[spi] Reading 0x{data_byte_count:x} bytes from SPI at FLA = 0x{spi_fla:x} (in {n:d} 0x{dbc:x}-byte chunks + 0x{r:x}-byte remainder)')
-
-        cycle_done = self._wait_SPI_flash_cycle_done()
-        if not cycle_done:
-            self.logger.log_error("SPI cycle not ready")
-            return b''
-
-        for i in range(n):
-            self.logger.log_hal(f'[spi] Reading chunk {i:d} of 0x{dbc:x} bytes from 0x{spi_fla + i * dbc:x}')
-            if not self._send_spi_cycle(HSFCTL_READ_CYCLE, dbc - 1, spi_fla + i * dbc):
-                self.logger.log_error("SPI flash read failed")
-            else:
-                for fdata_idx in range(0, dbc // 4):
-                    dword_value = self.spi_reg_read(self.fdata0_off + fdata_idx * 4)
-                    if self.logger.HAL:
-                        self.logger.log(f'[spi] FDATA00 + 0x{fdata_idx * 4:x}: 0x{dword_value:x}')
-                    buf += struct.pack("I", dword_value)
-
-        if (0 != r):
-            self.logger.log_hal(f'[spi] Reading remaining 0x{r:x} bytes from 0x{spi_fla + n * dbc:x}')
-            if not self._send_spi_cycle(HSFCTL_READ_CYCLE, r - 1, spi_fla + n * dbc):
-                self.logger.log_error("SPI flash read failed")
-            else:
-                t = 4
-                n_dwords = (r + 3) // 4
-                for fdata_idx in range(0, n_dwords):
-                    dword_value = self.spi_reg_read(self.fdata0_off + fdata_idx * 4)
-                    if self.logger.HAL:
-                        self.logger.log(f'[spi] FDATA00 + 0x{fdata_idx * 4:x}: 0x{dword_value:08X}')
-                    if (fdata_idx == (n_dwords - 1)) and (0 != r % 4):
-                        t = r % 4
-                    for j in range(t):
-                        buf += struct.pack('B', (dword_value >> (8 * j)) & 0xff)
-
-        self.logger.log_hal('[spi] Buffer read from SPI:')
-        if self.logger.HAL:
-            print_buffer_bytes(buf)
-
-        return buf

-
-
[docs]    def write_spi(self, spi_fla: int, buf: bytes) -> bool:
-
-        self.check_hardware_sequencing()
-
-        write_ok = True
-        data_byte_count = len(buf)
-        dbc = 4
-        n = data_byte_count // dbc
-        r = data_byte_count % dbc
-        if self.logger.UTIL_TRACE or self.logger.HAL:
-            self.logger.log(f'[spi] Writing 0x{data_byte_count:x} bytes to SPI at FLA = 0x{spi_fla:x} (in {n:d} 0x{dbc:x}-byte chunks + 0x{r:x}-byte remainder)')
-
-        cycle_done = self._wait_SPI_flash_cycle_done()
-        if not cycle_done:
-            self.logger.log_error("SPI cycle not ready")
-            return False
-
-        for i in range(n):
-            if self.logger.UTIL_TRACE or self.logger.HAL:
-                self.logger.log(f'[spi] Writing chunk {i:d} of 0x{dbc:x} bytes to 0x{spi_fla + i * dbc:x}')
-            dword_value = ((buf[i * dbc + 3]) << 24) | ((buf[i * dbc + 2]) << 16) | ((buf[i * dbc + 1]) << 8) | (buf[i * dbc])
-            if self.logger.HAL:
-                self.logger.log(f'[spi] in FDATA00 = 0x{dword_value:08X}')
-            self.spi_reg_write(self.fdata0_off, dword_value)
-            if not self._send_spi_cycle(HSFCTL_WRITE_CYCLE, dbc - 1, spi_fla + i * dbc):
-                write_ok = False
-                self.logger.log_error("SPI flash write cycle failed")
-
-        if (0 != r):
-            if self.logger.UTIL_TRACE or self.logger.HAL:
-                self.logger.log(f'[spi] Writing remaining 0x{r:x} bytes to FLA = 0x{spi_fla + n * dbc:x}')
-            dword_value = 0
-            for j in range(r):
-                dword_value |= (buf[n * dbc + j] << 8 * j)
-            if self.logger.HAL:
-                self.logger.log(f'[spi] in FDATA00 = 0x{dword_value:08X}')
-            self.spi_reg_write(self.fdata0_off, dword_value)
-            if not self._send_spi_cycle(HSFCTL_WRITE_CYCLE, r - 1, spi_fla + n * dbc):
-                write_ok = False
-                self.logger.log_error("SPI flash write cycle failed")
-
-        return write_ok

-
-
[docs]    def erase_spi_block(self, spi_fla: int) -> bool:
-
-        self.check_hardware_sequencing()
-
-        if self.logger.UTIL_TRACE or self.logger.HAL:
-            self.logger.log(f'[spi] Erasing SPI Flash block @ 0x{spi_fla:x}')
-
-        cycle_done = self._wait_SPI_flash_cycle_done()
-        if not cycle_done:
-            self.logger.log_error("SPI cycle not ready")
-            return cycle_done
-
-        erase_ok = self._send_spi_cycle(HSFCTL_ERASE_CYCLE, 0, spi_fla)
-        if not erase_ok:
-            self.logger.log_error("SPI Flash erase cycle failed")
-
-        return erase_ok

-
-    #
-    # SPI SFDP operations
-    #
-
[docs]    def ptmesg(self, offset: int) -> int:
-        self.spi_reg_write(self.bios_ptinx, offset)
-        self.spi_reg_read(self.bios_ptinx)
-        return self.spi_reg_read(self.bios_ptdata)

-
-
[docs]    def get_SPI_SFDP(self) -> bool:
-        ret = False
-        for component in range(0, 2):
-            self.logger.log(f'Scanning for Flash device {component + 1:d}')
-            offset = 0x0000 | (component << 14)
-            sfdp_signature = self.ptmesg(offset)
-            if sfdp_signature == SFDP_HEADER:
-                self.logger.log(f'  * Found valid SFDP header for Flash device {component + 1:d}')
-                ret = True
-            else:
-                self.logger.log(f"  * Didn't find a valid SFDP header for Flash device {component + 1:d}")
-                continue
-            # Increment offset to read second dword of SFDP header structure
-            sfdp_data = self.ptmesg(offset + 0x4)
-            sfdp_minor_version = sfdp_data & 0xFF
-            sfdp_major_version = (sfdp_data >> 8) & 0xFF
-            self.logger.log(f'    SFDP version number: {sfdp_major_version}.{sfdp_minor_version}')
-            num_of_param_headers = ((sfdp_data >> 16) & 0xFF) + 1
-            self.logger.log(f'    Number of parameter headers: {num_of_param_headers:d}')
-            # Set offset to read 1st Parameter Table in the SFDP header structure
-            offset = offset | 0x1000
-            parameter_1 = self.ptmesg(offset)
-            param1_minor_version = (parameter_1 >> 8) & 0xFF
-            param1_major_version = (parameter_1 >> 16) & 0xFF
-            param1_length = (parameter_1 >> 24) & 0xFF
-            self.logger.log("  * Parameter Header 1 (JEDEC)")
-            self.logger.log(f'    ** Parameter version number: {param1_major_version}.{param1_minor_version}')
-            self.logger.log(f'    ** Parameter length in double words: {hex(param1_length)}')
-            if (num_of_param_headers > 1) and self.cs.register_has_field('HSFS', 'FCYCLE'):
-                self.check_hardware_sequencing()
-                self.spi_reg_write(self.fdata12_off, 0x00000000)
-                self.spi_reg_write(self.fdata13_off, 0x00000000)
-                self.spi_reg_write(self.fdata14_off, 0x00000000)
-                self.spi_reg_write(self.fdata15_off, 0x00000000)
-                if not self._send_spi_cycle(HSFCTL_SFDP_CYCLE, 0x3F, 0):
-                    self.logger.log_error('SPI SFDP signature cycle failed')
-                    continue
-                pTable_offset_list = []
-                pTable_length = []
-                # Calculate which fdata_offset registers to read, based on number of parameter headers present
-                for i in range(1, num_of_param_headers):
-                    self.logger.log(f'  * Parameter Header:{i + 1:d}')
-                    data_reg_1 = f'self.fdata{str(2 + (2 * i))}_off'
-                    data_reg_2 = f'self.fdata{str(2 + (2 * i) + 1)}_off'
-                    data_dword_1 = self.spi_reg_read(eval(data_reg_1))
-                    data_dword_2 = self.spi_reg_read(eval(data_reg_2))
-                    id_manuf = (data_dword_2 & 0xFF000000) >> 16 | (data_dword_1 & 0xFF)
-                    param_minor_version = (data_dword_1 >> 8) & 0xFF
-                    param_major_version = (data_dword_1 >> 16) & 0xFF
-                    param_length = (data_dword_1 >> 24) & 0xFF
-                    param_table_pointer = (data_dword_2 & 0x00FFFFFF)
-                    self.logger.log(f'    ** Parameter version number:{param_major_version}.{param_minor_version}')
-                    self.logger.log(f'    ** Parameter length in double words: {hex(param_length)}')
-                    self.logger.log(f'    ** Parameter ID: {hex(id_manuf)}')
-                    self.logger.log(f'    ** Parameter Table Pointer(byte address): {hex(param_table_pointer)} ')
-                    pTable_offset_list.append(param_table_pointer)
-                    pTable_length.append(param_length)
-            offset = 0x0000 | (component << 14)
-            # Set offset to read 1st Parameter table ( JEDEC Basic Flash Parameter Table) content and Parse it
-            offset = offset | 0x2000
-            self.logger.log("                                ")
-            self.logger.log("  * 1'st Parameter Table Content ")
-            for count in range(1, param1_length + 1):
-                sfdp_data = self.ptmesg(offset)
-                offset += 4
-                self.cs.print_register(f'DWORD{count}', sfdp_data)
-        return ret

-
-    #
-    # SPI JEDEC ID operations
-    #
-
-
[docs]    def get_SPI_JEDEC_ID(self) -> int:
-
-        if self.cs.register_has_field('HSFS', 'FCYCLE'):
-            self.check_hardware_sequencing()
-
-            if not self._send_spi_cycle(HSFCTL_JEDEC_CYCLE, 4, 0):
-                self.logger.log_error('SPI JEDEC ID cycle failed')
-            id = self.spi_reg_read(self.fdata0_off)
-        else:
-            return False
-
-        return ((id & 0xFF) << 16) | (id & 0xFF00) | ((id >> 16) & 0xFF)

-
-
[docs]    def get_SPI_JEDEC_ID_decoded(self) -> Tuple[int, str, str]:
-
-        jedec_id = self.get_SPI_JEDEC_ID()
-        if jedec_id is False:
-            return (False, '', '')
-        manu = JEDEC_ID.MANUFACTURER.get((jedec_id >> 16) & 0xff, 'Unknown')
-        part = JEDEC_ID.DEVICE.get(jedec_id, 'Unknown')
-
-        return (jedec_id, manu, part)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/spi_descriptor.html b/_modules/chipsec/hal/spi_descriptor.html deleted file mode 100644 index ee4be0dc..00000000 --- a/_modules/chipsec/hal/spi_descriptor.html +++ /dev/null @@ -1,385 +0,0 @@ - - - - - - - - chipsec.hal.spi_descriptor — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.spi_descriptor

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-SPI Flash Descriptor binary parsing functionality
-
-
-usage:
-    >>> fd = read_file( fd_file )
-    >>> parse_spi_flash_descriptor( fd )
-"""
-
-import struct
-from typing import Dict, List, Optional, Tuple
-from chipsec.logger import logger, print_buffer_bytes
-from chipsec.hal import spi
-
-SPI_FLASH_DESCRIPTOR_SIGNATURE = struct.pack('=I', 0x0FF0A55A)
-SPI_FLASH_DESCRIPTOR_SIZE = 0x1000
-
-
-
[docs]def get_spi_flash_descriptor(rom: bytes) -> Tuple[int, bytes]:
-    pos = rom.find(SPI_FLASH_DESCRIPTOR_SIGNATURE)
-    if (-1 == pos or pos < 0x10):
-        return (-1, b'')
-    fd_off = pos - 0x10
-    fd = rom[fd_off: fd_off + SPI_FLASH_DESCRIPTOR_SIZE]
-    return (fd_off, fd)

-
-
-
[docs]def get_SPI_master(flmstr: int) -> Tuple[int, int, int]:
-    requester_id = (flmstr & 0xFFFF)
-    master_region_ra = ((flmstr >> 16) & 0xFF)
-    master_region_wa = ((flmstr >> 24) & 0xFF)
-    return (requester_id, master_region_ra, master_region_wa)

-
-
-
[docs]def get_spi_regions(fd: bytes) -> Optional[List[Tuple[int, str, int, int, int, bool]]]:
-    pos = fd.find(SPI_FLASH_DESCRIPTOR_SIGNATURE)
-    if not (pos == 0x10):
-        return None
-
-    flmap0 = struct.unpack_from('=I', fd[0x14:0x18])[0]
-    # Flash Region Base Address (bits [23:16])
-    frba = ((flmap0 & 0x00FF0000) >> 12)
-
-    flregs = []
-    for r in range(spi.SPI_REGION_NUMBER_IN_FD):
-        flreg_off = frba + r * 4
-        flreg = struct.unpack_from('=I', fd[flreg_off:flreg_off + 0x4])[0]
-        (base, limit) = spi.get_SPI_region(flreg)
-        notused = (base > limit)
-        flregs.append((r, spi.SPI_REGION_NAMES[r], flreg, base, limit, notused))
-
-    fd_size = flregs[spi.FLASH_DESCRIPTOR][4] - flregs[spi.FLASH_DESCRIPTOR][3] + 1
-    fd_notused = flregs[spi.FLASH_DESCRIPTOR][5]
-    if fd_notused or (fd_size != SPI_FLASH_DESCRIPTOR_SIZE):
-        return None
-
-    return flregs

-
-
-
[docs]def parse_spi_flash_descriptor(cs, rom: bytes) -> None:
-    if not (isinstance(rom, str) or isinstance(rom, bytes)):
-        logger().log_error(f'Invalid fd object type {type(rom)}')
-        return
-
-    pos = rom.find(SPI_FLASH_DESCRIPTOR_SIGNATURE)
-    if (-1 == pos) or (pos < 0x10):
-        desc_signature = struct.unpack('=I', SPI_FLASH_DESCRIPTOR_SIGNATURE)[0]
-        logger().log_error(f'Valid SPI flash descriptor is not found (should have signature {desc_signature:08X})')
-        return None
-
-    fd_off = pos - 0x10
-    logger().log(f'[spi_fd] Valid SPI flash descriptor found at offset 0x{fd_off:08X}')
-
-    logger().log('')
-    logger().log('########################################################')
-    logger().log('# SPI FLASH DESCRIPTOR')
-    logger().log('########################################################')
-    logger().log('')
-
-    fd = rom[fd_off: fd_off + SPI_FLASH_DESCRIPTOR_SIZE]
-    fd_sig = struct.unpack_from('=I', fd[0x10:0x14])[0]
-
-    logger().log(f'+ 0x0000 Reserved : 0x{fd[0x0:0xF].hex().upper()}')
-    logger().log(f'+ 0x0010 Signature: 0x{fd_sig:08X}')
-
-    #
-    # Flash Descriptor Map Section
-    #
-    flmap0 = struct.unpack_from('=I', fd[0x14:0x18])[0]
-    flmap1 = struct.unpack_from('=I', fd[0x18:0x1C])[0]
-    flmap2 = struct.unpack_from('=I', fd[0x1C:0x20])[0]
-    cs.print_register('FLMAP0', flmap0)
-    cs.print_register('FLMAP1', flmap1)
-    cs.print_register('FLMAP2', flmap2)
-
-    fcba = cs.get_register_field('FLMAP0', flmap0, 'FCBA')
-    nc = cs.get_register_field('FLMAP0', flmap0, 'NC')
-    frba = cs.get_register_field('FLMAP0', flmap0, 'FRBA')
-    fcba = fcba << 4
-    frba = frba << 4
-    nc += 1
-    logger().log('')
-    logger().log('+ 0x0014 Flash Descriptor Map:')
-    logger().log('========================================================')
-    logger().log(f'  Flash Component Base Address: 0x{fcba:08X}')
-    logger().log(f'  Flash Region Base Address   : 0x{frba:08X}')
-    logger().log(f'  Number of Flash Components  : {nc:d}')
-
-    nr = spi.SPI_REGION_NUMBER_IN_FD
-    if cs.register_has_field('FLMAP0', 'NR'):
-        nr = cs.get_register_field('FLMAP0', flmap0, 'NR')
-        if nr == 0:
-            logger().log_warning('only 1 region (FD) is found. Looks like flash descriptor binary is from Skylake platform or later. Try with option --platform')
-        nr += 1
-        logger().log(f'  Number of Regions           : {nr:d}')
-
-    fmba = cs.get_register_field('FLMAP1', flmap1, 'FMBA')
-    nm = cs.get_register_field('FLMAP1', flmap1, 'NM')
-    fpsba = cs.get_register_field('FLMAP1', flmap1, 'FPSBA')
-    psl = cs.get_register_field('FLMAP1', flmap1, 'PSL')
-    fmba = fmba << 4
-    fpsba = fpsba << 4
-    logger().log(f'  Flash Master Base Address   : 0x{fmba:08X}')
-    logger().log(f'  Number of Masters           : {nm:d}')
-    logger().log(f'  Flash PCH Strap Base Address: 0x{fpsba:08X}')
-    logger().log(f'  PCH Strap Length            : 0x{psl:X}')
-
-    fcpusba = cs.get_register_field('FLMAP2', flmap2, 'FCPUSBA')
-    cpusl = cs.get_register_field('FLMAP2', flmap2, 'CPUSL')
-    logger().log(f'  Flash CPU Strap Base Address: 0x{fcpusba:08X}')
-    logger().log(f'  CPU Strap Length            : 0x{cpusl:X}')
-
-    #
-    # Flash Descriptor Component Section
-    #
-    logger().log('')
-    logger().log(f'+ 0x{fcba:04X} Component Section:')
-    logger().log('========================================================')
-
-    flcomp = struct.unpack_from('=I', fd[fcba + 0x0:fcba + 0x4])[0]
-    logger().log(f'+ 0x{fcba:04X} FLCOMP   : 0x{flcomp:08X}')
-    flil = struct.unpack_from('=I', fd[fcba + 0x4:fcba + 0x8])[0]
-    logger().log(f'+ 0x{fcba + 0x4:04X} FLIL     : 0x{flil:08X}')
-    flpb = struct.unpack_from('=I', fd[fcba + 0x8:fcba + 0xC])[0]
-    logger().log(f'+ 0x{fcba + 0x8:04X} FLPB     : 0x{flpb:08X}')
-
-    #
-    # Flash Descriptor Region Section
-    #
-    logger().log('')
-    logger().log(f'+ 0x{frba:04X} Region Section:')
-    logger().log('========================================================')
-
-    flregs: Dict[int, Tuple[int, int, int, str]] = {}
-    for r in range(nr):
-        flreg_off = frba + r * 4
-        flreg = struct.unpack_from('=I', fd[flreg_off:flreg_off + 0x4])[0]
-        if not cs.is_register_defined(f'FLREG{r:d}'):
-            continue
-        base = cs.get_register_field((f'FLREG{r:d}'), flreg, 'RB') << spi.SPI_FLA_SHIFT
-        limit = cs.get_register_field((f'FLREG{r:d}'), flreg, 'RL') << spi.SPI_FLA_SHIFT
-        notused = '(not used)' if base > limit or flreg == 0xFFFFFFFF else ''
-        flregs[r] = (flreg, base, limit, notused)
-        logger().log(f'+ 0x{flreg_off:04X} FLREG{r:d}   : 0x{flreg:08X} {notused}')
-
-    logger().log('')
-    logger().log('Flash Regions')
-    logger().log('--------------------------------------------------------')
-    logger().log(' Region                | FLREGx    | Base     | Limit   ')
-    logger().log('--------------------------------------------------------')
-    for r in flregs:
-        if flregs[r]:
-            logger().log(f'{r:d} {spi.SPI_REGION_NAMES[r]:20s} | {flregs[r][0]:08X}  | {flregs[r][1]:08X} | {flregs[r][2]:08X} {flregs[r][3]}')
-
-    #
-    # Flash Descriptor Master Section
-    #
-    logger().log('')
-    logger().log(f'+ 0x{fmba:04X} Master Section:')
-    logger().log('========================================================')
-
-    flmstrs: Dict[int, Tuple[int, int]] = {}
-    for m in range(nm):
-        flmstr_off = fmba + m * 4
-        flmstr = struct.unpack_from('=I', fd[flmstr_off:flmstr_off + 0x4])[0]
-        master_region_ra = cs.get_register_field('FLMSTR1', flmstr, 'MRRA')
-        master_region_wa = cs.get_register_field('FLMSTR1', flmstr, 'MRWA')
-        flmstrs[m] = (master_region_ra, master_region_wa)
-        logger().log(f'+ 0x{flmstr_off:04X} FLMSTR{m + 1:d}   : 0x{flmstr:08X}')
-
-    logger().log('')
-    logger().log('Master Read/Write Access to Flash Regions')
-    logger().log('--------------------------------------------------------')
-    s = ' Region                 '
-    for m in range(nm):
-        if m in spi.SPI_MASTER_NAMES:
-            s = f'{s}| {spi.SPI_MASTER_NAMES[m]:9}'
-        else:
-            s = f'{s}| Master {m:-2d}'
-    logger().log(s)
-    logger().log('--------------------------------------------------------')
-    for r in range(nr):
-        s = f'{r:-2d} {spi.SPI_REGION_NAMES[r]:20s} '
-        for m in range(nm):
-            access_s = ''
-            mask = (0x1 << r)
-            if (flmstrs[m][0] & mask):
-                access_s += 'R'
-            if (flmstrs[m][1] & mask):
-                access_s += 'W'
-            s = f'{s}| {access_s:9}'
-        logger().log(s)
-
-    #
-    # Flash Descriptor Upper Map Section
-    #
-    logger().log('')
-    logger().log(f'+ 0x{0xEFC:04X} Flash Descriptor Upper Map:')
-    logger().log('========================================================')
-
-    flumap1 = struct.unpack_from('=I', fd[0xEFC:0xF00])[0]
-    logger().log(f'+ 0x{0xEFC:04X} FLUMAP1   : 0x{flumap1:08X}')
-
-    vtba = ((flumap1 & 0x000000FF) << 4)
-    vtl = (((flumap1 & 0x0000FF00) >> 8) & 0xFF)
-    logger().log(f'  VSCC Table Base Address    = 0x{vtba:08X}')
-    logger().log(f'  VSCC Table Length          = 0x{vtl:02X}')
-
-    #
-    # OEM Section
-    #
-    logger().log('')
-    logger().log(f'+ 0x{0xF00:04X} OEM Section:')
-    logger().log('========================================================')
-    print_buffer_bytes(fd[0xF00:])
-
-    logger().log('')
-    logger().log('########################################################')
-    logger().log('# END OF SPI FLASH DESCRIPTOR')
-    logger().log('########################################################')

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/spi_jedec_ids.html b/_modules/chipsec/hal/spi_jedec_ids.html deleted file mode 100644 index 63d3fc87..00000000 --- a/_modules/chipsec/hal/spi_jedec_ids.html +++ /dev/null @@ -1,164 +0,0 @@ - - - - - - - - chipsec.hal.spi_jedec_ids — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.spi_jedec_ids

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-JEDED ID : Manufacturers and Device IDs
-"""
-
-from typing import Dict
-
-
[docs]class JEDEC_ID:
-
-    MANUFACTURER: Dict[int, str] = {0xEF: 'Winbond',
-                                    0xC2: 'Macronix'}
-
-    DEVICE: Dict[int, str] = {0xEF4018: 'W25Q128 (SPI)',
-                              0xEF6018: 'W25Q128 (QPI)',
-                              0xEF4017: 'W25Q64FV (SPI)',
-                              0xEF6017: 'W25Q64FV (QPI)',
-                              0xEF7016: 'W25Q32JV',
-                              0xEF4019: 'W25Q256',
-                              0xC22017: 'MX25L6408',
-                              0xC22018: 'MX25L12805'}

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/spi_uefi.html b/_modules/chipsec/hal/spi_uefi.html deleted file mode 100644 index 331cb5e5..00000000 --- a/_modules/chipsec/hal/spi_uefi.html +++ /dev/null @@ -1,742 +0,0 @@ - - - - - - - - chipsec.hal.spi_uefi — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.spi_uefi

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-UEFI firmware image parsing and manipulation functionality
-
-usage:
-    >>> parse_uefi_region_from_file(_uefi, filename, fwtype, outpath):
-"""
-
-import os
-import struct
-import random
-import json
-import string
-from uuid import UUID
-from typing import Dict, List, Optional, Union, Any, Callable, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.hal.uefi_fv import EFI_MODULE
-from chipsec.logger import logger
-from chipsec.file import write_file, read_file
-from chipsec.hal.uefi_compression import COMPRESSION_TYPE_LZMA, COMPRESSION_TYPE_EFI_STANDARD, COMPRESSION_TYPES_ALGORITHMS, COMPRESSION_TYPE_UNKNOWN, COMPRESSION_TYPE_LZMAF86
-from chipsec.hal.uefi_common import bit_set, EFI_GUID_SIZE, EFI_GUID_FMT
-from chipsec.hal.uefi_platform import FWType, fw_types, EFI_NVRAM_GUIDS, EFI_PLATFORM_FS_GUIDS, NVAR_NVRAM_FS_FILE
-from chipsec.hal.uefi import identify_EFI_NVRAM, parse_EFI_variables
-from chipsec.hal.uefi_fv import EFI_SECTION_PE32, EFI_SECTION_TE, EFI_SECTION_PIC, EFI_SECTION_COMPATIBILITY16, EFI_FIRMWARE_FILE_SYSTEM2_GUID
-from chipsec.hal.uefi_fv import EFI_FIRMWARE_FILE_SYSTEM_GUID, EFI_SECTIONS_EXE, EFI_SECTION_USER_INTERFACE, EFI_SECTION_GUID_DEFINED
-from chipsec.hal.uefi_fv import EFI_GUID_DEFINED_SECTION, EFI_GUID_DEFINED_SECTION_size, NextFwFile, NextFwFileSection, NextFwVolume, GetFvHeader
-from chipsec.hal.uefi_fv import EFI_CRC32_GUIDED_SECTION_EXTRACTION_PROTOCOL_GUID, LZMA_CUSTOM_DECOMPRESS_GUID, TIANO_DECOMPRESSED_GUID, LZMAF86_DECOMPRESS_GUID
-from chipsec.hal.uefi_fv import EFI_CERT_TYPE_RSA_2048_SHA256_GUID, EFI_CERT_TYPE_RSA_2048_SHA256_GUID_size, EFI_SECTION, EFI_FV, EFI_FILE
-from chipsec.hal.uefi_fv import EFI_FIRMWARE_CONTENTS_SIGNED_GUID, WIN_CERT_TYPE_EFI_GUID, WIN_CERTIFICATE_size, WIN_CERTIFICATE
-from chipsec.hal.uefi_fv import EFI_SECTION_COMPRESSION, EFI_SECTION_FIRMWARE_VOLUME_IMAGE, EFI_SECTION_RAW, SECTION_NAMES, DEF_INDENT
-from chipsec.hal.uefi_fv import FILE_TYPE_NAMES, EFI_FS_GUIDS, EFI_FILE_HEADER_INVALID, EFI_FILE_HEADER_VALID, EFI_FILE_HEADER_CONSTRUCTION
-from chipsec.hal.uefi_fv import EFI_COMPRESSION_SECTION_size, EFI_FV_FILETYPE_ALL, EFI_FV_FILETYPE_FFS_PAD, EFI_FVB2_ERASE_POLARITY, EFI_FV_FILETYPE_RAW
-from chipsec.hal.uefi_compression import UEFICompression
-
-CMD_UEFI_FILE_REMOVE = 0
-CMD_UEFI_FILE_INSERT_BEFORE = 1
-CMD_UEFI_FILE_INSERT_AFTER = 2
-CMD_UEFI_FILE_REPLACE = 3
-
-type2ext = {EFI_SECTION_PE32: 'pe32', EFI_SECTION_TE: 'te', EFI_SECTION_PIC: 'pic', EFI_SECTION_COMPATIBILITY16: 'c16'}
-
-#
-# Calculate hashes for all FVs, FW files and sections (PE/COFF or TE executables)
-# and write them on the file system
-#
-WRITE_ALL_HASHES = False
-
-
-
[docs]def decompress_section_data(section_dir_path: str, sec_fs_name: str, compressed_data: bytes, compression_type: int) -> bytes:
-    uefi_uc = UEFICompression()
-    uncompressed_name = os.path.join(section_dir_path, sec_fs_name)
-    logger().log_hal(f'[uefi] Decompressing EFI binary (type = 0x{compression_type:X})\n       {uncompressed_name} ->\n')
-    uncompressed_image = uefi_uc.decompress_EFI_binary(compressed_data, compression_type)
-    return uncompressed_image

-
-
-
[docs]def compress_image(image: bytes, compression_type: int) -> bytes:
-    uefi_uc = UEFICompression()
-    logger().log_hal(f'[uefi] Compressing EFI binary (type = 0x{compression_type:X})\n')
-    compressed_image = uefi_uc.compress_EFI_binary(image, compression_type)
-    return compressed_image

-
-
-
[docs]def modify_uefi_region(data: bytes, command: int, guid: UUID, uefi_file: bytes = b'') -> bytes:
-    FvEndOffset = 0  # Default
-    fv = NextFwVolume(data)
-    while fv is not None:
-        FvLengthChange = 0
-        polarity = bit_set(fv.Attributes, EFI_FVB2_ERASE_POLARITY)
-        if ((fv.Guid == EFI_FIRMWARE_FILE_SYSTEM2_GUID) or (fv.Guid == EFI_FIRMWARE_FILE_SYSTEM_GUID)):
-            fwbin = NextFwFile(fv.Image, fv.Size, fv.HeaderSize, polarity)
-            while fwbin is not None:
-                next_offset = fwbin.Size + fwbin.Offset
-                if (fwbin.Guid == guid):
-                    uefi_file_size = (len(uefi_file) + 7) & 0xFFFFFFF8
-                    CurFileOffset = fv.Offset + fwbin.Offset + FvLengthChange
-                    NxtFileOffset = fv.Offset + next_offset + FvLengthChange
-                    if command == CMD_UEFI_FILE_REMOVE:
-                        FvLengthChange -= (next_offset - fwbin.Offset)
-                        logger().log(f'Removing UEFI file with GUID={fwbin.Guid} at offset={CurFileOffset:08X}, size change: {FvLengthChange:d} bytes')
-                        data = data[:CurFileOffset] + data[NxtFileOffset:]
-                    elif command == CMD_UEFI_FILE_INSERT_BEFORE:
-                        FvLengthChange += uefi_file_size
-                        logger().log(f'Inserting UEFI file before file with GUID={fwbin.Guid} at offset={CurFileOffset:08X}, size change: {FvLengthChange:d} bytes')
-                        data = data[:CurFileOffset] + uefi_file.ljust(uefi_file_size, b'\xFF') + data[CurFileOffset:]
-                    elif command == CMD_UEFI_FILE_INSERT_AFTER:
-                        FvLengthChange += uefi_file_size
-                        logger().log(f'Inserting UEFI file after file with GUID={fwbin.Guid} at offset={CurFileOffset:08X}, size change: {FvLengthChange:d} bytes')
-                        data = data[:NxtFileOffset] + uefi_file.ljust(uefi_file_size, b'\xFF') + data[NxtFileOffset:]
-                    elif command == CMD_UEFI_FILE_REPLACE:
-                        FvLengthChange += uefi_file_size - (next_offset - fwbin.Offset)
-                        logger().log(f'Replacing UEFI file with GUID={fwbin.Guid} at offset={CurFileOffset:08X}, new size: {len(uefi_file):d}, old size: {fwbin.Size:d}, size change: {FvLengthChange:d} bytes')
-                        data = data[:CurFileOffset] + uefi_file.ljust(uefi_file_size, b'\xFF') + data[NxtFileOffset:]
-                    else:
-                        raise Exception('Invalid command')
-                if next_offset - fwbin.Offset >= 24:
-                    FvEndOffset = fv.Offset + next_offset + FvLengthChange
-
-                fwbin = NextFwFile(fv.Image, fv.Size, next_offset, polarity)
-            if FvEndOffset == 0:
-                logger().log_hal(f'Using FvEndOffset = 0')
-            if FvLengthChange >= 0:
-                data = data[:FvEndOffset] + data[FvEndOffset + FvLengthChange:]
-            else:
-                data = data[:FvEndOffset] + (abs(FvLengthChange) * b'\xFF') + data[FvEndOffset:]
-
-            FvLengthChange = 0
-
-            # if FvLengthChange != 0:
-            #    logger().log( "Rebuilding Firmware Volume with GUID={} at offset={:08X}".format(FsGuid, FvOffset) )
-            #    FvHeader = data[FvOffset: FvOffset + FvHeaderLength]
-            #    FvHeader = FvHeader[:0x20] + struct.pack('<Q', FvLength) + FvHeader[0x28:]
-            #    NewChecksum = FvChecksum16(FvHeader[:0x32] + '\x00\x00' + FvHeader[0x34:])
-            #    FvHeader = FvHeader[:0x32] + struct.pack('<H', NewChecksum) + FvHeader[0x34:]
-            #    data = data[:FvOffset] + FvHeader + data[FvOffset + FvHeaderLength:]
-
-        fv = NextFwVolume(data, fv.Offset, fv.Size)
-    return data

-
-
-
[docs]def build_efi_modules_tree(fwtype: str, data: bytes, Size: int, offset: int, polarity: bool) -> List[EFI_SECTION]:
-    sections: List[EFI_SECTION] = []
-    secn = 0
-
-    sec = NextFwFileSection(data, Size, offset, polarity)
-    while sec is not None:
-        # pick random file name in case dumpall=False - we'll need it to decompress the section
-        file_name = ''.join(random.choice(string.ascii_lowercase) for _ in range(4))
-        sec_fs_name = f'sect{secn:02d}_{file_name}'
-
-        if sec.Type in EFI_SECTIONS_EXE:
-            # "leaf" executable section: update hashes and check against match criteria
-            sec.calc_hashes(sec.HeaderSize)
-        elif sec.Type == EFI_SECTION_USER_INTERFACE:
-            # "leaf" UI section: update section's UI name
-            try:
-                sec.ui_string = sec.Image[sec.HeaderSize:-2].decode("utf-16")
-            except UnicodeDecodeError:
-                pass
-        elif sec.Type == EFI_SECTION_GUID_DEFINED:
-            if len(sec.Image) < sec.HeaderSize + EFI_GUID_DEFINED_SECTION_size:
-                logger().log_warning("EFI Section seems to be malformed")
-                if len(sec.Image) < sec.HeaderSize + EFI_GUID_SIZE:
-                    logger().log_warning("Creating fake GUID of 0000-00-00-0000000")
-                    guid0 = b"\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
-                else:
-                    guid0 = struct.unpack(EFI_GUID_FMT, sec.Image[sec.HeaderSize:sec.HeaderSize + EFI_GUID_SIZE])[0]
-                    sec.DataOffset = len(sec.Image) - 1
-            else:
-                guid0, sec.DataOffset, sec.Attributes = struct.unpack(EFI_GUID_DEFINED_SECTION, sec.Image[sec.HeaderSize:sec.HeaderSize + EFI_GUID_DEFINED_SECTION_size])
-            if not isinstance(guid0, bytes):
-                logger().log_warning("GUID is corrupted")
-                logger().log_warning("Creating fake GUID of 0000-00-00-0000000")
-                guid0 = b"\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00"
-
-            sec.Guid = UUID(bytes_le=guid0)
-
-            if sec.Guid == EFI_CRC32_GUIDED_SECTION_EXTRACTION_PROTOCOL_GUID:
-                sec.children = build_efi_modules_tree(fwtype, sec.Image[sec.DataOffset:], Size - sec.DataOffset, 0, polarity)
-            elif sec.Guid == LZMA_CUSTOM_DECOMPRESS_GUID or sec.Guid == TIANO_DECOMPRESSED_GUID or sec.Guid == LZMAF86_DECOMPRESS_GUID:
-                if sec.Guid == LZMA_CUSTOM_DECOMPRESS_GUID:
-                    d = decompress_section_data("", sec_fs_name, sec.Image[sec.DataOffset:], COMPRESSION_TYPE_LZMA)
-                elif sec.Guid == LZMAF86_DECOMPRESS_GUID:
-                    d = decompress_section_data("", sec_fs_name, sec.Image[sec.DataOffset:], COMPRESSION_TYPE_LZMAF86)
-                else:
-                    d = decompress_section_data("", sec_fs_name, sec.Image[sec.DataOffset:], COMPRESSION_TYPE_EFI_STANDARD)
-                if d is None:
-                    sec.Comments = "Unable to decompress image"
-                    d = decompress_section_data("", sec_fs_name, sec.Image[sec.HeaderSize + EFI_GUID_DEFINED_SECTION_size:], COMPRESSION_TYPE_UNKNOWN)
-                if d:
-                    sec.children = build_efi_modules_tree(fwtype, d, len(d), 0, polarity)
-            elif sec.Guid == EFI_CERT_TYPE_RSA_2048_SHA256_GUID:
-                offset = sec.DataOffset + EFI_CERT_TYPE_RSA_2048_SHA256_GUID_size
-                sec.Comments = "Certificate Type RSA2048/SHA256"
-                if len(sec.Image) > offset:
-                    sec.children = build_efi_modules_tree(fwtype, sec.Image[offset:], len(sec.Image[offset:]), 0, polarity)
-            elif sec.Guid == EFI_FIRMWARE_CONTENTS_SIGNED_GUID:
-                start = sec.HeaderSize + EFI_GUID_DEFINED_SECTION_size
-                stop = start + WIN_CERTIFICATE_size
-                length, _, cert_type, guid = struct.unpack(WIN_CERTIFICATE, sec.Image[start:stop])
-                certGuid = UUID(bytes_le=guid)
-                if cert_type == WIN_CERT_TYPE_EFI_GUID:
-                    sec.Comments = "Found UEFI Certificate."
-                    if certGuid == EFI_CERT_TYPE_RSA_2048_SHA256_GUID:
-                        sec.Comments += " Cert of type RSA2048/SHA256!"
-                    else:
-                        sec.Comments += f" Cert of unknown type! But the guid is: {certGuid}"
-                else:
-                    sec.Comments = f"Unknown cert type: {cert_type}"
-                offset = sec.DataOffset + length
-                if len(sec.Image) > offset:
-                    sec.children = build_efi_modules_tree(fwtype, sec.Image[offset:], len(sec.Image[offset:]), 0, polarity)
-            else:
-                sec.children = build_efi_model(sec.Image[sec.HeaderSize:], fwtype)
-
-        elif sec.Type == EFI_SECTION_COMPRESSION:
-            for mct in COMPRESSION_TYPES_ALGORITHMS:
-                d = decompress_section_data("", sec_fs_name, sec.Image[sec.HeaderSize + EFI_COMPRESSION_SECTION_size:], mct)
-                if d:
-                    sec.children = build_efi_modules_tree(fwtype, d, len(d), 0, polarity)
-                if sec.children:
-                    break
-
-        elif sec.Type == EFI_SECTION_FIRMWARE_VOLUME_IMAGE:
-            children = build_efi_file_tree(sec.Image[sec.HeaderSize:], fwtype)
-            if children is not None:
-                sec.children = children
-
-        elif sec.Type == EFI_SECTION_RAW:
-            sec.children = build_efi_model(sec.Image[sec.HeaderSize:], fwtype)
-
-        elif sec.Type not in SECTION_NAMES.keys():
-            sec.children = build_efi_model(sec.Image[sec.HeaderSize:], fwtype)
-            if not sec.children:
-                sec.children = build_efi_model(data, fwtype)
-
-        sections.append(sec)
-        sec = NextFwFileSection(data, Size, sec.Size + sec.Offset, polarity)
-        secn += 1
-    return sections

-
-
-#
-# build_efi_file_tree - extract EFI FV file from EFI image and build an object tree
-#
-# Input arguements:
-# fv_image - fv_image containing files
-# fwtype - platform specific firmware type used to detect NVRAM format (VSS, EVSA, NVAR...)
-
[docs]def build_efi_file_tree(fv_img: bytes, fwtype: str) -> List[EFI_FILE]:
-    fv_size, HeaderSize, Attributes = GetFvHeader(fv_img)
-    polarity = bool(Attributes & EFI_FVB2_ERASE_POLARITY)
-    fwbin = NextFwFile(fv_img, fv_size, HeaderSize, polarity)
-    fv = []
-    padding = 0
-    while fwbin is not None:
-        fw_offset = fwbin.Size + fwbin.Offset
-        fwbin.calc_hashes()
-        if padding != fwbin.Offset:
-            non_UEFI = EFI_SECTION(padding, 'Padding', EFI_FV_FILETYPE_FFS_PAD, fv_img[padding:fw_offset - 1], 0, fwbin.Offset - padding)
-            non_UEFI.Comments = 'Attempting to identify modules in Padding Section'
-            non_UEFI.children = efi_data_search(fv_img[padding:fwbin.Offset - 1], fwtype, polarity)
-            if non_UEFI.children:
-                fv.append(non_UEFI)
-        padding += fw_offset
-        if fwbin.Type not in (EFI_FV_FILETYPE_ALL, EFI_FV_FILETYPE_RAW, EFI_FV_FILETYPE_FFS_PAD):
-            fwbin.children = efi_data_search(fwbin.Image[fwbin.HeaderSize:], fwtype, polarity)
-            fv.append(fwbin)
-        elif fwbin.Type == EFI_FV_FILETYPE_RAW:
-            if fwbin.Name != NVAR_NVRAM_FS_FILE:
-                fwbin.children = efi_data_search(fwbin.Image, fwtype, polarity)
-                fv.append(fwbin)
-            else:
-                fwbin.isNVRAM = True
-                fwbin.NVRAMType = FWType.EFI_FW_TYPE_NVAR
-                fv.append(fwbin)
-        elif fwbin.Type == EFI_FV_FILETYPE_FFS_PAD:
-            non_UEFI = EFI_SECTION(fwbin.Offset, 'Padding', fwbin.Type, fv_img[fw_offset:], 0, fwbin.Size)
-            non_UEFI.Comments = 'Attempting to identify modules in Padding Section'
-            non_UEFI.children = efi_data_search(fwbin.Image, fwtype, polarity)
-            if non_UEFI.children:
-                fv.append(non_UEFI)
-        elif fwbin.State not in (EFI_FILE_HEADER_CONSTRUCTION, EFI_FILE_HEADER_INVALID, EFI_FILE_HEADER_VALID):
-            fwbin.children = efi_data_search(fwbin.Image[fwbin.HeaderSize:], fwtype, polarity)
-            fv.append(fwbin)
-        fwbin = NextFwFile(fv_img, fv_size, fw_offset, polarity)
-        if fwbin is None and fv_size > fw_offset:
-            non_UEFI = EFI_SECTION(fw_offset, 'Non-UEFI_data', 0xFF, fv_img[fw_offset:], 0, fv_size - fw_offset)
-            non_UEFI.Comments = 'Attempting to identify modules in non_UEFI Data Section'
-            non_UEFI.children = efi_data_search(fv_img[fw_offset:], fwtype, polarity)
-            if non_UEFI.children:
-                fv.append(non_UEFI)
-    return fv

-
-
-#
-# build_efi_tree - extract EFI modules (FV, files, sections) from EFI image and build an object tree
-#
-# Input arguments:
-#   data           - an image containing UEFI firmware volumes
-#   fwtype         - platform specific firmware type used to detect NVRAM format (VSS, EVSA, NVAR...)
-#
-
[docs]def build_efi_tree(data: bytes, fwtype: str) -> List['EFI_MODULE']:
-    fvolumes = []
-    fv = NextFwVolume(data)
-    while fv is not None:
-        fv.calc_hashes()
-
-        # Detect File System firmware volumes
-        if fv.Guid in EFI_PLATFORM_FS_GUIDS or fv.Guid in EFI_FS_GUIDS:
-            fwbin = build_efi_file_tree(fv.Image, fwtype)
-            for i in fwbin:
-                fv.children.append(i)
-
-        # Detect NVRAM firmware volumes
-        elif fv.Guid in EFI_NVRAM_GUIDS:  # == VARIABLE_STORE_FV_GUID:
-            fv.isNVRAM = True
-            try:
-                fv.NVRAMType = identify_EFI_NVRAM(fv.Image) if fwtype is None else fwtype
-            except Exception:
-                logger().log_warning(f"Couldn't identify NVRAM in FV {{{fv.Guid}}}")
-
-        fvolumes.append(fv)
-        fv = NextFwVolume(data, fv.Offset, fv.Size)
-
-    return fvolumes

-
-
-#
-# Attempt to find efi modules using calls to build_efi_tree, build_efi_file_tree,
-# and build_efi_modules_tree in succession.  Return once one of the calls is successful
-#
-
-
-
-#
-# update_efi_tree propagates EFI file's GUID down to all sections and
-# UI_string from the corresponding section, if found, up to the EFI file at the same time
-# File GUID and UI string are then used when searching for EFI files and executable sections
-#
-
[docs]def update_efi_tree(modules: List['EFI_MODULE'], parent_guid: Optional[UUID] = None) -> str:
-    ui_string = ''
-    for m in modules:
-        if type(m) == EFI_FILE:
-            parent_guid = m.Guid
-        elif type(m) == EFI_SECTION:
-            # if it's a section update its parent file's GUID
-            m.parentGuid = parent_guid
-            if m.Type == EFI_SECTION_USER_INTERFACE:
-                # if UI section (leaf), update ui_string in sibling sections including in PE/TE,
-                # and propagate it up until and including parent EFI file
-                for m1 in modules:
-                    m1.ui_string = m.ui_string
-                ui_string = m.ui_string
-        # update parent file's GUID in all children nodes
-        if len(m.children) > 0:
-            ui_string = update_efi_tree(m.children, parent_guid)
-            # if it's a EFI file then update its ui_string with ui_string extracted from UI section
-            if ui_string and (type(m) in (EFI_FILE, EFI_SECTION)):
-                m.ui_string = ui_string
-                if (type(m) == EFI_FILE):
-                    ui_string = ''
-    return ui_string

-
-
-
[docs]def build_efi_model(data: bytes, fwtype: str) -> List['EFI_MODULE']:
-    model = build_efi_tree(data, fwtype)
-    update_efi_tree(model)
-    return model

-
-
-
[docs]def FILENAME(mod: Union[EFI_FILE, EFI_SECTION], parent: Optional['EFI_MODULE'], modn: int) -> str:
-    fname = f'{modn:02d}_{mod.Guid}'
-    if type(mod) == EFI_FILE:
-        type_s = FILE_TYPE_NAMES[mod.Type] if mod.Type in FILE_TYPE_NAMES.keys() else f'UNKNOWN_{mod.Type:02X}'
-        fname = f'{fname}.{type_s}'
-    elif type(mod) == EFI_SECTION:
-        fname = f'{modn:02d}_{mod.Name}'
-        if mod.Type in EFI_SECTIONS_EXE:
-            if (parent is not None) and parent.ui_string:
-                if (parent.ui_string.endswith(".efi")):
-                    fname = parent.ui_string
-                else:
-                    fname = f'{parent.ui_string}.efi'
-            else:
-                fname = f'{fname}.{type2ext[mod.Type]}'
-    return fname

-
-
-
[docs]def dump_efi_module(mod, parent: Optional['EFI_MODULE'], modn: int, path: str) -> str:
-    fname = FILENAME(mod, parent, modn)
-    mod_path = os.path.join(path, fname)
-    write_file(mod_path, mod.Image[mod.HeaderSize:] if type(mod) == EFI_SECTION else mod.Image)
-    if type(mod) == EFI_SECTION or WRITE_ALL_HASHES:
-        if mod.MD5:
-            write_file(f'{mod_path}.md5', mod.MD5)
-        if mod.SHA1:
-            write_file(f'{mod_path}.sha1', mod.SHA1)
-        if mod.SHA256:
-            write_file(f'{mod_path}.sha256', mod.SHA256)
-    return mod_path

-
-
-
[docs]class EFIModuleType:
-    SECTION_EXE = 0
-    SECTION = 1
-    FV = 2
-    FILE = 4

-
-
-
[docs]def search_efi_tree(modules: List['EFI_MODULE'],
-                    search_callback: Optional[Callable],
-                    match_module_types: int = EFIModuleType.SECTION_EXE,
-                    findall: bool = True
-                    ) -> List['EFI_MODULE']:
-    matching_modules = []
-    for module in modules:
-        if search_callback is not None:
-            if ((match_module_types & EFIModuleType.SECTION == EFIModuleType.SECTION) and type(module) == EFI_SECTION) or \
-               ((match_module_types & EFIModuleType.SECTION_EXE == EFIModuleType.SECTION_EXE) and (type(module) == EFI_SECTION and module.Type in EFI_SECTIONS_EXE)) or \
-               ((match_module_types & EFIModuleType.FV == EFIModuleType.FV) and type(module) == EFI_FV) or \
-               ((match_module_types & EFIModuleType.FILE == EFIModuleType.FILE) and type(module) == EFI_FILE):
-                if search_callback(module):
-                    matching_modules.append(module)
-                    if not findall:
-                        return [module]
-
-        # recurse search if current module node has children nodes
-        if len(module.children) > 0:
-            matches = search_efi_tree(module.children, search_callback, match_module_types, findall)
-            if len(matches) > 0:
-                matching_modules.extend(matches)
-                if not findall:
-                    return [module]
-
-    return matching_modules

-
-
-
[docs]def save_efi_tree(modules: List['EFI_MODULE'],
-                  parent: Optional['EFI_MODULE'] = None,
-                  save_modules: bool = True,
-                  path: str = '',
-                  save_log: bool = True,
-                  lvl: int = 0
-                  ) -> List[Dict[str, Any]]:
-    mod_dir_path = ''
-    modules_arr = []
-    modn = 0
-    for m in modules:
-        md: Dict[str, Any] = {}
-        m.indent = DEF_INDENT * lvl
-        if save_log:
-            logger().log(str(m))
-
-        # extract all non-function non-None members of EFI_MODULE objects
-        attrs = [a for a in dir(m) if not callable(getattr(m, a)) and not a.startswith("__") and (getattr(m, a) is not None)]
-        for a in attrs:
-            md[a] = getattr(m, a)
-        md["class"] = type(m).__name__
-        # remove extra attributes
-        for f in ["Image", "indent"]:
-            del md[f]
-
-        # save EFI module image, make sub-directory for children
-        if save_modules:
-            mod_path = dump_efi_module(m, parent, modn, path)
-            try:
-                md["file_path"] = os.path.relpath(mod_path[4:] if mod_path.startswith("\\\\?\\") else mod_path)
-            except Exception:
-                md["file_path"] = mod_path.split(os.sep)[-1]
-            if m.isNVRAM or len(m.children) > 0:
-                mod_dir_path = f'{mod_path}.dir'
-                if not os.path.exists(mod_dir_path):
-                    os.makedirs(mod_dir_path)
-                if m.isNVRAM:
-                    try:
-                        if m.NVRAMType and (parent is not None):
-                            # @TODO: technically, NVRAM image should be m.Image but
-                            # getNVstore_xxx functions expect FV than a FW file within FV
-                            # so for EFI_FILE type of module using parent's Image as NVRAM
-                            nvram = parent.Image if (type(m) == EFI_FILE and type(parent) == EFI_FV) else m.Image
-                            file_path = os.path.join(mod_dir_path, 'NVRAM')
-                            parse_EFI_variables(file_path, nvram, False, m.NVRAMType)
-                        else:
-                            raise Exception("NVRAM type cannot be None")
-                    except Exception:
-                        logger().log_warning(f"Couldn't extract NVRAM in {{{m.Guid}}} using type '{m.NVRAMType}'")
-
-        # save children modules
-        if len(m.children) > 0:
-            md["children"] = save_efi_tree(m.children, m, save_modules, mod_dir_path, save_log, lvl + 1)
-        else:
-            del md["children"]
-
-        modules_arr.append(md)
-        modn += 1
-
-    return modules_arr

-
-
-
[docs]class UUIDEncoder(json.JSONEncoder):
-
[docs]    def default(self, obj: Any):
-        if isinstance(obj, UUID):
-            return str(obj).upper()
-        return json.JSONEncoder.default(self, obj)

-
-
-
[docs]def parse_uefi_region_from_file(filename: str, fwtype: str, outpath: Optional[str] = None, filetype: List[int] = []) -> None:
-    # Create an output folder to dump EFI module tree
-    if outpath is None:
-        outpath = f'{filename}.dir'
-    if not os.path.exists(outpath):
-        os.makedirs(outpath)
-
-    # Read UEFI image binary to parse
-    rom = read_file(filename)
-
-    # Parse UEFI image binary and build a tree hierarchy of EFI modules
-    tree = build_efi_model(rom, fwtype)
-
-    # Save entire EFI module hierarchy on a file-system and export into JSON
-    if filetype:
-        tree_json = save_efi_tree_filetype(tree, path=outpath, filetype=filetype)
-    else:
-        tree_json = save_efi_tree(tree, path=outpath)
-    write_file(f'{filename}.UEFI.json', json.dumps(tree_json, indent=2, separators=(',', ': '), cls=UUIDEncoder))

-
-
-
[docs]def decode_uefi_region(pth: str, fname: str, fwtype: str, filetype: List[int] = []) -> None:
-
-    bios_pth = os.path.join(pth, f'{fname}.dir')
-    if not os.path.exists(bios_pth):
-        os.makedirs(bios_pth)
-    fv_pth = os.path.join(bios_pth, 'FV')
-    if not os.path.exists(fv_pth):
-        os.makedirs(fv_pth)
-
-    # Decoding UEFI Firmware Volumes
-    logger().log_hal("[spi_uefi] Decoding UEFI firmware volumes...")
-    parse_uefi_region_from_file(fname, fwtype, fv_pth, filetype)
-    # If a specific filetype is wanted, there is no need to check for EFI Variables
-    if filetype:
-        return
-
-    # Decoding EFI Variables NVRAM
-    logger().log_hal("[spi_uefi] Decoding UEFI NVRAM...")
-    region_data = read_file(fname)
-    if fwtype is None:
-        fwtype = identify_EFI_NVRAM(region_data)
-        if fwtype is None:
-            return
-    elif fwtype not in fw_types:
-        if logger().HAL:
-            logger().log_error(f'Unrecognized NVRAM type {fwtype}')
-        return
-    nvram_fname = os.path.join(bios_pth, (f'nvram_{fwtype}'))
-    logger().set_log_file(f'{nvram_fname}.nvram.lst', False)
-    parse_EFI_variables(nvram_fname, region_data, False, fwtype)

-
-
-
[docs]def save_efi_tree_filetype(modules: List['EFI_MODULE'],
-                           parent: Optional['EFI_MODULE'] = None,
-                           path: str = '',
-                           lvl: int = 0,
-                           filetype: List[int] = [],
-                           save: bool = False
-                           ) -> List[Dict[str, Any]]:
-    mod_dir_path = path
-    modules_arr = []
-    modn = 0
-    for m in modules:
-        md: Dict[str, Any] = {}
-        m.indent = DEF_INDENT * lvl
-        if (isinstance(m, EFI_FILE) and m.Type in filetype) or save:
-            logger().log(str(m))
-
-        # extract all non-function non-None members of EFI_MODULE objects
-        attrs = [a for a in dir(m) if not callable(getattr(m, a)) and not a.startswith("__") and (getattr(m, a) is not None)]
-        for a in attrs:
-            md[a] = getattr(m, a)
-        md["class"] = type(m).__name__
-        # remove extra attributes
-        for f in ["Image", "indent"]:
-            del md[f]
-
-        # save EFI module image, make sub-directory for children
-        if (isinstance(m, EFI_FILE) and m.Type in filetype) or save:
-            mod_path = dump_efi_module(m, parent, modn, path)
-            try:
-                md["file_path"] = os.path.relpath(mod_path[4:] if mod_path.startswith("\\\\?\\") else mod_path)
-            except Exception:
-                md["file_path"] = mod_path.split(os.sep)[-1]
-            if m.isNVRAM or len(m.children) > 0:
-                mod_dir_path = f'{mod_path}.dir'
-                if not os.path.exists(mod_dir_path):
-                    os.makedirs(mod_dir_path)
-        # save children modules
-        if len(m.children) > 0:
-            md["children"] = save_efi_tree_filetype(m.children, m, mod_dir_path, lvl + 1, filetype)
-        else:
-            del md["children"]
-
-        modules_arr.append(md)
-        modn += 1
-
-    return modules_arr

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/tpm.html b/_modules/chipsec/hal/tpm.html deleted file mode 100644 index 942a19ab..00000000 --- a/_modules/chipsec/hal/tpm.html +++ /dev/null @@ -1,494 +0,0 @@ - - - - - - - - chipsec.hal.tpm — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.tpm

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Trusted Platform Module (TPM) HAL component
-
-https://trustedcomputinggroup.org
-"""
-
-import struct
-from collections import namedtuple
-from typing import Dict, Tuple, Callable
-
-from chipsec.logger import print_buffer_bytes
-from chipsec.hal import hal_base
-import chipsec.hal.tpm12_commands
-
-
-COMMANDREADY = 0x40
-TPMGO = 0x20
-HEADERSIZE = 0x0A
-HEADERFORMAT = '>HII'
-BEENSEIZED = 0x10
-REQUESTUSE = 0x2
-ACTIVELOCALITY = 0x20
-DATAAVAIL = 0x10
-
-TPM_DATAFIFO = 0x0024
-TPM_STS = 0x0018
-TPM_DIDVID = 0x0F00
-TPM_ACCESS = 0x0000
-TPM_RID = 0x0F04
-TPM_INTCAP = 0x0014
-TPM_INTENABLE = 0x0008
-
-STATUS: Dict[int, str] = {
-    0x00: "Success",
-    0x01: "ERROR: Authentication Failed",
-    0x02: "ERROR: The index to a PCR, DIR or other register is incorrect",
-    0x03: "ERROR: One or more parameter is bad",
-    0x04: "ERROR: An operation completed successfully but the auditing of that operation failed",
-    0x05: "ERROR: The clear disable flag is set and all clear operations now require physical access",
-    0x06: "ERROR: The TPM is deactivated",
-    0x07: "ERROR: The TPM is disabled",
-    0x08: "ERROR: The target command has been disabled",
-    0x09: "ERROR: The operation failed",
-    0x0A: "ERROR: The ordinal was unknown or inconsistent",
-    0x0B: "ERROR: The ability to install an owner is disabled",
-    0x0C: "ERROR: The key handle can not be interpreted",
-    0x0D: "ERROR: The key handle points to an invalid key",
-    0x0E: "ERROR: Unacceptable encryption scheme",
-    0x0F: "ERROR: Migration authorization failed",
-    0x10: "ERROR: PCR information could not be interpreted",
-    0x11: "ERROR: No room to load key",
-    0x12: "ERROR: There is no SRK set",
-    0x13: "ERROR: An encrypted blob is invalid or was not created by this TPM",
-    0x14: "ERROR: There is already an Owner",
-    0x15: "ERROR: The TPM has insufficient internal resources to perform the requested action",
-    0x16: "ERROR: A random string was too short",
-    0x17: "ERROR: The TPM does not have the space to perform the operation",
-    0x18: "ERROR: The named PCR value does not match the current PCR value.",
-    0x19: "ERROR: The paramSize argument to the command has the incorrect value",
-    0x1A: "ERROR: There is no existing SHA-1 thread.",
-    0x1B: "ERROR: The calculation is unable to proceed because the existing SHA-1 thread has already encountered an error",
-    0x1C: "ERROR: Self-test has failed and the TPM has shut-down",
-    0x1D: "ERROR: The authorization for the second key in a 2 key function failed authorization",
-    0x1E: "ERROR: The tag value sent to for a command is invalid",
-    0x1F: "ERROR: An IO error occurred transmitting information to the TPM",
-    0x20: "ERROR: The encryption process had a problem",
-    0x21: "ERROR: The decryption process did not complete",
-    0x22: "ERROR: An invalid handle was used",
-    0x23: "ERROR: The TPM does not a EK installed",
-    0x24: "ERROR: The usage of a key is not allowed",
-    0x25: "ERROR: The submitted entity type is not allowed",
-    0x26: "ERROR: The command was received in the wrong sequence relative to TPM_Init and a subsequent TPM_Startup",
-    0x27: "ERROR: Signed data cannot include additional DER information",
-    0x28: "ERROR: The key properties in TPM_KEY_PARMs are not supported by this TPM",
-    0x29: "ERROR: The migration properties of this key are incorrect",
-    0x2A: "ERROR: The signature or encryption scheme for this key is incorrect or not permitted in this situation",
-    0x2B: "ERROR: The size of the data (or blob) parameter is bad or inconsistent with the referenced key",
-    0x2C: "ERROR: A parameter is bad",
-    0x2D: "ERROR: Either the physicalPresence or physicalPresenceLock bits have the wrong value",
-    0x2E: "ERROR: The TPM cannot perform this version of the capability",
-    0x2F: "ERROR: The TPM does not allow for wrapped transport sessions",
-    0x30: "ERROR: TPM audit construction failed and the underlying command was returning a failure code also",
-    0x31: "ERROR: TPM audit construction failed and the underlying command was returning success",
-    0x32: "ERROR: Attempt to reset a PCR register that does not have the resettable attribute",
-    0x33: "ERROR: Attempt to reset a PCR register that requires locality and locality modifier not part of command transport",
-    0x34: "ERROR: Make identity blob not properly typed",
-    0x35: "ERROR: When saving context identified resource type does not match actual resource",
-    0x36: "ERROR: The TPM is attempting to execute a command only available when in FIPS mode",
-    0x37: "ERROR: The command is attempting to use an invalid family ID",
-    0x38: "ERROR: The permission to manipulate the NV storage is not available",
-    0x39: "ERROR: The operation requires a signed command",
-    0x3A: "ERROR: Wrong operation to load an NV key",
-    0x3B: "ERROR: NV_LoadKey blob requires both owner and blob authorization",
-    0x3C: "ERROR: The NV area is locked and not writeable",
-    0x3D: "ERROR: The locality is incorrect for the attempted operation",
-    0x3E: "ERROR: The NV area is read only and can?t be written to",
-    0x3F: "ERROR: There is no protection on the write to the NV area",
-    0x40: "ERROR: The family count value does not match",
-    0x41: "ERROR: The NV area has already been written to",
-    0x42: "ERROR: The NV area attributes conflict",
-    0x43: "ERROR: The structure tag and version are invalid or inconsistent",
-    0x44: "ERROR: The key is under control of the TPM Owner and can only be evicted by the TPM Owner",
-    0x45: "ERROR: The counter handle is incorrect",
-    0x46: "ERROR: The write is not a complete write of the area",
-    0x47: "ERROR: The gap between saved context counts is too large",
-    0x48: "ERROR: The maximum number of NV writes without an owner has been exceeded",
-    0x49: "ERROR: No operator AuthData value is set",
-    0x4A: "ERROR: The resource pointed to by context is not loaded",
-    0x4B: "ERROR: The delegate administration is locked",
-    0x4C: "ERROR: Attempt to manage a family other then the delegated family",
-    0x4D: "ERROR: Delegation table management not enabled",
-    0x4E: "ERROR: There was a command executed outside of an exclusive transport session",
-    0x4F: "ERROR: Attempt to context save a owner evict controlled key",
-    0x50: "ERROR: The DAA command has no resources available to execute the command",
-    0x51: "ERROR: The consistency check on DAA parameter inputData0 has failed",
-    0x52: "ERROR: The consistency check on DAA parameter inputData1 has failed",
-    0x53: "ERROR: The consistency check on DAA_issuerSettings has failed",
-    0x54: "ERROR: The consistency check on DAA_tpmSpecific has failed",
-    0x55: "ERROR: The atomic process indicated by the submitted DAA command is not the expected process",
-    0x56: "ERROR: The issuer's validity check has detected an inconsistency",
-    0x57: "ERROR: The consistency check on w has failed",
-    0x58: "ERROR: The handle is incorrect",
-    0x59: "ERROR: Delegation is not correct",
-    0x5A: "ERROR: The context blob is invalid",
-    0x5B: "ERROR: Too many contexts held by the TPM",
-    0x5C: "ERROR: Migration authority signature validation failure",
-    0x5D: "ERROR: Migration destination not authenticated",
-    0x5E: "ERROR: Migration source incorrect",
-    0x5F: "ERROR: Incorrect migration authority",
-    0x60: "ERROR: TBD",
-    0x61: "ERROR: Attempt to revoke the EK and the EK is not revocable",
-    0x62: "ERROR: Bad signature of CMK ticket",
-    0x63: "ERROR: There is no room in the context list for additional contexts",
-    0x800: "NON-FATAL ERROR: The TPM is too busy to respond to the command immediately, but the command could be resubmitted at a later time",
-    0x801: "NON-FATAL ERROR: TPM_ContinueSelfTest has not been run.",
-    0x802: "NON-FATAL ERROR: The TPM is currently executing the actions of TPM_ContinueSelfTest because the ordinal required resources that have not been tested",
-    0x803: "NON-FATAL ERROR: The TPM is defending against dictionary attacks and is in some time-out period."
-}
-
-LOCALITY: Dict[str, int] = {
-    '0': 0x0000,
-    '1': 0x1000,
-    '2': 0x2000,
-    '3': 0x3000,
-    '4': 0x4000
-}
-
-COMMANDS: Dict[str, Callable] = {
-    "pcrread": chipsec.hal.tpm12_commands.pcrread,
-    "nvread": chipsec.hal.tpm12_commands.nvread,
-    "startup": chipsec.hal.tpm12_commands.startup,
-    "continueselftest": chipsec.hal.tpm12_commands.continueselftest,
-    "forceclear": chipsec.hal.tpm12_commands.forceclear
-}
-
-
-
[docs]class TPM_RESPONSE_HEADER(namedtuple('TPM_RESPONSE_HEADER', 'ResponseTag DataSize ReturnCode')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        _str = f"""----------------------------------------------------------------
-                     TPM response header
-----------------------------------------------------------------
-   Response TAG: 0x{self.ResponseTag:x}
-   Data Size   : 0x{self.DataSize:x}
-   Return Code : 0x{self.ReturnCode:x}
-"""
-        _str += "\t"
-        try:
-            _str += STATUS[self.ReturnCode]
-        except:
-            _str += "Invalid return code"
-        _str += "\n"
-        return _str

-
-
-
[docs]class TPM(hal_base.HALBase):
-    def __init__(self, cs):
-        super(TPM, self).__init__(cs)
-        self.helper = cs.helper
-        self.TPM_BASE = self.cs.Cfg.MEMORY_RANGES["TPM"]["address"]
-
-
[docs]    def command(self, commandName: str, locality: str, *command_argv: str) -> None:
-        """
-        Send command to the TPM and receive data
-        """
-        try:
-            Locality = LOCALITY[locality]
-        except:
-            if self.logger.HAL:
-                self.logger.log_bad("Invalid locality value\n")
-            return
-
-        requestedUse = False
-
-        #
-        # Request locality use if needed
-        #
-        access_address = self.TPM_BASE | Locality | TPM_ACCESS
-        if self.helper.read_mmio_reg(access_address, 4) == BEENSEIZED:
-            self.helper.write_mmio_reg(access_address, 4, REQUESTUSE)
-            requestedUse = True
-
-        #
-        # Build command (big endian) and send/receive
-        #
-        (command, size) = COMMANDS[commandName](command_argv)
-        self._send_command(Locality, command, size)
-
-        (header, _, _, data_blob) = self._read_response(Locality)
-        self.logger.log(str(header))
-        print_buffer_bytes(data_blob)
-        self.logger.log('\n')
-
-        #
-        # Release locality if needed
-        #
-        if requestedUse == True:
-            self.helper.write_mmio_reg(access_address, 4, BEENSEIZED)
-        self.helper.write_mmio_reg(access_address, 1, ACTIVELOCALITY)

-
-    def _send_command(self, Locality: int, command: bytes, size: int) -> None:
-        """Send a command to the TPM using the locality specified"""
-        count = 0
-
-        datafifo_address = self.TPM_BASE | Locality | TPM_DATAFIFO
-        sts_address = self.TPM_BASE | Locality | TPM_STS
-        access_address = self.TPM_BASE | Locality | TPM_ACCESS
-
-        self.helper.write_mmio_reg(access_address, 1, REQUESTUSE)
-        #
-        # Set status to command ready
-        #
-        sts_value = self.helper.read_mmio_reg(sts_address, 1)
-        while (0 == (sts_value & COMMANDREADY)):
-            self.helper.write_mmio_reg(sts_address, 1, COMMANDREADY)
-            sts_value = self.helper.read_mmio_reg(sts_address, 1)
-
-        while count < size:
-            sts_value = self.helper.read_mmio_reg(sts_address, 4)
-            burst_count = ((sts_value >> 8) & 0xFFFFFF)
-            burst_index = 0
-            while (burst_index < burst_count) and (count < size):
-                datafifo_value = command[count]
-                self.helper.write_mmio_reg(datafifo_address, 1, datafifo_value)
-                count += 1
-                burst_index += 0x1
-
-        self.helper.write_mmio_reg(sts_address, 1, TPMGO)
-
-    def _read_response(self, Locality: int) -> Tuple[TPM_RESPONSE_HEADER, bytes, bytearray, bytearray]:
-        """Read the TPM's response using the specified locality"""
-        count = 0
-        header = b''
-        header_blob = bytearray()
-        data = b''
-        data_blob = bytearray()
-        #
-        # Build FIFO address
-        #
-        datafifo_address = self.TPM_BASE | Locality | TPM_DATAFIFO
-        access_address = self.TPM_BASE | Locality | TPM_ACCESS
-        sts_address = self.TPM_BASE | Locality | TPM_STS
-
-        sts_value = self.helper.read_mmio_reg(sts_address, 1)
-        data_avail = bin(sts_value & (1 << 4))[2]
-        #
-        # Read data available
-        #
-        # watchdog?
-        while data_avail == '0':
-            sts_value = self.helper.read_mmio_reg(sts_address, 1)
-            self.helper.write_mmio_reg(sts_address, 1, DATAAVAIL)
-            data_avail = bin(sts_value & (1 << 4))[2]
-
-        while count < HEADERSIZE:
-            sts_value = self.helper.read_mmio_reg(sts_address, 4)
-            burst_count = ((sts_value >> 8) & 0xFFFFFF)
-            burst_index = 0
-            while (burst_index < burst_count) and (count < HEADERSIZE):
-                header_blob.append(self.helper.read_mmio_reg(datafifo_address, 1))
-                count += 1
-                burst_index += 0x1
-
-        header = TPM_RESPONSE_HEADER(*struct.unpack_from(HEADERFORMAT, header_blob))
-
-        count = 0
-        if header.DataSize > 10 and header.ReturnCode == 0:
-            length = header.DataSize - HEADERSIZE
-            while count < length:
-                sts_value = self.helper.read_mmio_reg(sts_address, 4)
-                burst_count = ((sts_value >> 8) & 0xFFFFFF)
-                burst_index = 0
-                while (burst_index < burst_count) and (count < length):
-                    data_blob.append(self.helper.read_mmio_reg(datafifo_address, 1))
-                    count += 1
-                    burst_index += 0x1
-
-        return (header, data, header_blob, data_blob)
-
-
[docs]    def dump_access(self, locality: str) -> None:
-        """View the contents of the register used to gain ownership of the TPM"""
-        register = 'TPM_ACCESS'
-        self.dump_register(register, locality)

-
-
[docs]    def dump_status(self, locality: str) -> None:
-        """View general status details"""
-        register = 'TPM_STS'
-        self.dump_register(register, locality)

-
-
[docs]    def dump_didvid(self, locality: str) -> None:
-        """TPM's Vendor and Device ID"""
-        register = 'TPM_DID_VID'
-        self.dump_register(register, locality)

-
-
[docs]    def dump_rid(self, locality: str) -> None:
-        """TPM's Revision ID"""
-        register = 'TPM_RID'
-        self.dump_register(register, locality)

-
-
[docs]    def dump_intcap(self, locality: str) -> None:
-        """Provides information of which interrupts that particular TPM supports"""
-        register = 'TPM_INTF_CAPABILITY'
-        self.dump_register(register, locality)

-
-
[docs]    def dump_intenable(self, locality: str) -> None:
-        """View the contents of the register used to enable specific interrupts"""
-        register = 'TPM_INT_ENABLE'
-        self.dump_register(register, locality)

-
-
[docs]    def log_register_header(self, register_name: str, locality: str) -> None:
-        num_spaces = 32 + (-len(register_name) // 2)  # ceiling division
-        self.logger.log('=' * 64)
-        self.logger.log(f'{" " * num_spaces}{register_name}_{locality}')
-        self.logger.log('=' * 64)

-
-
[docs]    def dump_register(self, register_name: str, locality: str) -> None:
-        self.cs.Cfg.REGISTERS[register_name]['address'] = self.cs.Cfg.REGISTERS[register_name]['address'] ^ LOCALITY[locality]
-        register = self.cs.read_register_dict(register_name)
-
-        self.log_register_header(register_name, locality)
-
-        max_field_len = 0
-        for field in register['FIELDS']:
-            if len(field) > max_field_len:
-                max_field_len = len(field)
-        for field in register['FIELDS']:
-            self.logger.log(f'\t{field}{" " * (max_field_len - len(field))}: {hex(register["FIELDS"][field]["value"])}')

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/tpm12_commands.html b/_modules/chipsec/hal/tpm12_commands.html deleted file mode 100644 index c4c28951..00000000 --- a/_modules/chipsec/hal/tpm12_commands.html +++ /dev/null @@ -1,297 +0,0 @@ - - - - - - - - chipsec.hal.tpm12_commands — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.tpm12_commands

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Definition for TPMv1.2 commands to use with TPM HAL
-
-TCG PC Client TPM Specification
-TCG TPM v1.2 Specification
-"""
-
-import struct
-from typing import Dict, Tuple
-from chipsec.logger import logger
-
-COMMAND_FORMAT = "=HIIIII"
-
-TPM_TAG_RQU_COMMAND = 0xc100
-TPM_TAG_RQU_AUTH1_COMMAND = 0xc200
-TPM_TAG_RQU_AUTH2_COMMAND = 0xC300
-TPM_TAG_RSP_COMMAND = 0xC400
-TPM_TAG_RSP_AUTH1_COMMAND = 0xC500
-TPM_TAG_RSP_AUTH2_COMMAND = 0xC600
-
-TPM_ORD_CONTINUESELFTEST = 0x53000000
-TPM_ORD_FORCECLEAR = 0x5D000000
-TPM_ORD_GETCAPABILITY = 0x65000000
-TPM_ORD_NV_DEFINESPACE = 0xCC000000
-TPM_ORD_NV_READVALUE = 0xCF000000
-TPM_ORD_NV_WRITEVALUE = 0xCD000000
-TPM_ORD_PCRREAD = 0x15000000
-TPM_ORD_PHYSICALDISABLE = 0x70000000
-TPM_ORD_PHYSICALENABLE = 0x6F000000
-TPM_ORD_PHYSICALSETDEACTIVATED = 0x72000000
-TPM_ORD_STARTUP = 0x99000000
-TPM_ORD_SAVESTATE = 0x98000000
-TSC_ORD_PHYSICALPRESENCE = 0x0A000040
-TSC_ORD_RESETESTABLISHMENTBIT = 0x0B000040
-
-STARTUP: Dict[int, int] = {
-    1: 0x0100,
-    2: 0x0200,
-    3: 0x0300
-}
-
-PCR: Dict[int, int] = {
-    0: 0x00000000,
-    1: 0x01000000,
-    2: 0x02000000,
-    3: 0x03000000,
-    4: 0x04000000,
-    5: 0x05000000,
-    6: 0x06000000,
-    7: 0x07000000,
-    8: 0x08000000,
-    9: 0x09000000,
-    10: 0x0a000000,
-    11: 0x0b000000,
-    12: 0x0c000000,
-    13: 0x0d000000,
-    14: 0x0e000000,
-    15: 0x0f000000,
-    16: 0x10000000,
-    17: 0x11000000,
-    18: 0x12000000,
-    19: 0x13000000,
-    20: 0x14000000,
-    21: 0x15000000,
-    22: 0x16000000,
-    23: 0x17000000,
-    24: 0x18000000,
-    25: 0x19000000,
-    26: 0x1a000000,
-    27: 0x1b000000,
-    28: 0x1c000000,
-    29: 0x1d000000,
-    30: 0x1e000000
-}
-
-
-
[docs]def pcrread(*command_argv: str) -> Tuple[bytes, int]:
-    """
-    The TPM_PCRRead operation provides non-cryptographic reporting  of the contents of a named PCR
-    """
-    Size = 0x0E000000
-    try:
-        Pcr = PCR[int(command_argv[0])]
-    except:
-        if logger().HAL:
-            logger().log_bad("Invalid PCR value\n")
-        return (b'', 0)
-    command = struct.pack(COMMAND_FORMAT, TPM_TAG_RQU_COMMAND, Size, TPM_ORD_PCRREAD, Pcr, 0, 0)
-    size = Size >> 0x18
-    return (command, size)

-
-
-
[docs]def nvread(*command_argv: str) -> Tuple[bytes, int]:
-    """
-    Read a value from the NV store
-    Index, Offset, Size
-    """
-    Size = 0x18000000
-    command = struct.pack(COMMAND_FORMAT, TPM_TAG_RQU_COMMAND, Size, TPM_ORD_NV_READVALUE, int(command_argv[0], 16), int(command_argv[1], 16), int(command_argv[2], 16))
-    size = Size >> 0x18
-    return (command, size)

-
-
-
[docs]def startup(*command_argv: str) -> Tuple[bytes, int]:
-    """
-    Execute a tpm_startup command. TPM_Startup is always preceded by TPM_Init, which is the physical indication (a system wide reset) that TPM initialization is necessary
-    Type of Startup to be used:
-    1: TPM_ST_CLEAR
-    2: TPM_ST_STATE
-    3: TPM_ST_DEACTIVATED
-    """
-    try:
-        startupType = STARTUP[int(command_argv[0])]
-    except:
-        if logger().HAL:
-            logger().log_bad("Invalid startup type option value\n")
-        return (b'', 0)
-    Size = 0x0E000000
-    command = struct.pack(COMMAND_FORMAT, TPM_TAG_RQU_COMMAND, Size, TPM_ORD_STARTUP, startupType, 0, 0)
-    size = Size >> 0x18
-    return (command, size)

-
-
-
[docs]def continueselftest(*command_argv: str) -> Tuple[bytes, int]:
-    """
-    TPM_ContinueSelfTest informs the TPM that it should complete self-test of all TPM functions. The TPM may return success immediately and then perform the self-test, or it may perform the self-test and then return success or failure.
-    """
-    Size = 0x0A000000
-    command = struct.pack(COMMAND_FORMAT, TPM_TAG_RQU_COMMAND, Size, TPM_ORD_CONTINUESELFTEST, 0, 0, 0)
-    size = Size >> 0x18
-    return (command, size)

-
-
-
[docs]def getcap(*command_argv: str) -> Tuple[bytes, int]:
-    """
-    Returns current information regarding the TPM
-    CapArea    - Capabilities Area
-    SubCapSize - Size of SubCapabilities
-    SubCap     - Subcapabilities
-    """
-    Size = 0x18000000
-    command = struct.pack(COMMAND_FORMAT, TPM_TAG_RQU_COMMAND, Size, TPM_ORD_GETCAPABILITY, int(command_argv[0], 16), int(command_argv[1], 16), int(command_argv[2], 16))
-    size = Size >> 0x18
-    return (command, size)

-
-
-
[docs]def forceclear(*command_argv: str) -> Tuple[bytes, int]:
-    Size = 0x0A000000
-    command = struct.pack(COMMAND_FORMAT, TPM_TAG_RQU_COMMAND, Size, TPM_ORD_FORCECLEAR, 0, 0, 0)
-    size = Size >> 0x18
-    return (command, size)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/tpm_eventlog.html b/_modules/chipsec/hal/tpm_eventlog.html deleted file mode 100644 index 7d863d2a..00000000 --- a/_modules/chipsec/hal/tpm_eventlog.html +++ /dev/null @@ -1,307 +0,0 @@ - - - - - - - - chipsec.hal.tpm_eventlog — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.tpm_eventlog

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2017, Google Inc
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-"""
-Trusted Platform Module Event Log
-
-Based on the following specifications:
-
-`TCG EFI Platform Specification For TPM Family 1.1 or 1.2 <https://trustedcomputinggroup.org/wp-content/uploads/TCG_EFI_Platform_1_22_Final_-v15.pdf>`_
-
-`TCG PC Client Specific Implementation Specification for Conventional BIOS", version 1.21 <https://trustedcomputinggroup.org/wp-content/uploads/TCG_PCClientImplementation_1-21_1_00.pdf>`_
-
-`TCG EFI Protocol Specification, Family "2.0" <https://trustedcomputinggroup.org/wp-content/uploads/EFI-Protocol-Specification-rev13-160330final.pdf>`_
-
-`TCG PC Client Platform Firmware Profile Specification <https://trustedcomputinggroup.org/wp-content/uploads/PC-ClientSpecific_Platform_Profile_for_TPM_2p0_Systems_v51.pdf>`_
-"""
-
-import struct
-
-from typing import Any, Dict, BinaryIO, Optional, Type, TypeVar
-from chipsec.logger import logger
-
-EventType = TypeVar('EventType', bound='TcgPcrEvent')
-
-
[docs]class TcgPcrEvent:
-    """An Event (TPM 1.2 format) as recorded in the SML."""
-
-    _header_fmt = "II20sI"
-    _header_size = struct.calcsize(_header_fmt)
-
-    def __init__(self, pcr_index: int, event_type: int, digest: bytes, event_size: int, event: Any):
-        self.pcr_index = pcr_index
-        self.event_type = event_type
-        name = SML_EVENT_TYPE.get(self.event_type)
-        if isinstance(name, str):
-            self.event_type_name = name
-        self.digest = digest
-        self.event_size = event_size
-        self.event = event
-
-
[docs]    @classmethod
-    def parse(cls: Type[EventType], log: BinaryIO) -> Optional[EventType]:
-        """Try to read an event from the log.
-
-        Args:
-            log (file-like): Log where the event is stored.
-
-        Returns:
-            An instance of the created event. If a subclass
-            exists for such event_type, an object of this class
-            is returned. Otherwise, a TcgPcrEvent is returned.
-        """
-        header = log.read(cls._header_size)
-        if not header:
-            return None
-        fields = struct.unpack(cls._header_fmt, header)
-        pcr_index, event_type, digest, event_size = fields
-        event = log.read(event_size)
-        if len(event) != event_size:
-            logger().log_warning("[tpm_eventlog] event data length does not match the expected size")
-        name = SML_EVENT_TYPE.get(event_type)
-        kls = cls if isinstance(name, str) else name
-        if kls is None:
-            return None
-        return kls(pcr_index, event_type, digest, event_size, event)

-
-    def __str__(self) -> str:
-        if self.event_type_name:
-            t = self.event_type_name
-        else:
-            t = f'(0x{self.event_type:x}'
-        return f'PCR: {self.pcr_index:d}\ttype: {t.ljust(EVENT_TYPE_MAX_LENGTH)}\tsize: 0x{self.event_size:x}\tdigest: {self.digest.hex()}'

-
-
-
[docs]class SCRTMVersion(TcgPcrEvent):
-    def __init__(self, *args: Any):
-        super(SCRTMVersion, self).__init__(*args)
-        self.event_type_name = "EV_S_CRTM_VERSION"
-        self.version: bytes = self.event
-
-    def __str__(self) -> str:
-        _str = super(SCRTMVersion, self).__str__()
-        try:
-            _str += f'\n\t+ version: {self.version.decode("utf-16")}'
-        except:
-            if logger().HAL:
-                logger().log_warning("[tpm_eventlog] CRTM Version is not a valid string")
-        return _str

-
-
-
[docs]class EFIFirmwareBlob(TcgPcrEvent):
-    # Although [4] 9.2.5 mentions UNIT64 for the length, [1] 7.7 uses
-    # a UINTN. Use a native unsigned long to cover the most general case.
-    _event_fmt = "@QL"
-
-    def __init__(self, *args: Any):
-        super(EFIFirmwareBlob, self).__init__(*args)
-        self.event_type_name = "EV_EFI_PLATFORM_FIRMWARE_BLOB"
-        base, length = struct.unpack(self._event_fmt, self.event)
-        self.base = base
-        self.length = length
-
-    def __str__(self) -> str:
-        _blob = super(EFIFirmwareBlob, self).__str__()
-        _str = f'{_blob}\n\t+ base: 0x{self.base:x}\tlength: 0x{self.length:x}'
-        return _str

-
-
-SML_EVENT_TYPE: Dict[int, Any] = {
-    # From reference [2]
-    0x0: "EV_PREBOOT_CERT",
-    0x1: "EV_POST_CODE",
-    0x2: "EV_UNUSED",
-    0x3: "EV_NO_ACTION",
-    0x4: "EV_SEPARATOR",
-    0x5: "EV_ACTION",
-    0x6: "EV_EVENT_TAG",
-    0x7: "EV_S_CRTM_CONTENTS",
-    0x8: SCRTMVersion,
-    0x9: "EV_CPU_MICROCODE",
-    0xA: "EV_PLATFORM_CONFIG_FLAGS",
-    0xB: "EV_TABLE_OF_DEVICES",
-    0xC: "EV_COMPACT_HASH",
-    0xD: "EV_IPL",
-    0xE: "EV_IPL_PARTITION_DATA",
-    0xF: "EV_NONHOST_CODE",
-    0x10: "EV_NONHOST_CONFIG",
-    0x11: "EV_NONHOST_INFO",
-    0x12: "EV_OMIT_BOOT_DEVICE_EVENTS",
-
-    # From reference [1]
-    0x80000000: "EV_EFI_EVENT_BASE",
-    0x80000001: "EV_EFI_VARIABLE_DRIVER_CONFIG",
-    0x80000002: "EV_EFI_VARIABLE_BOOT",
-    0x80000003: "EV_EFI_BOOT_SERVICES_APPLICATION",
-    0x80000004: "EV_EFI_BOOT_SERVICES_DRIVER",
-    0x80000005: "EV_EFI_RUNTIME_SERVICES_DRIVER",
-    0x80000006: "EV_EFI_GPT_EVENT",
-    0x80000007: "EV_EFI_ACTION",
-    0x80000008: EFIFirmwareBlob,
-    0x80000009: "EV_EFI_HANDOFF_TABLES",
-    0x800000E0: "EV_EFI_VARIABLE_AUTHORITY"
-}
-
-EVENT_TYPE_MAX_LENGTH: int = max([len(v) for v in SML_EVENT_TYPE.values()
-                             if isinstance(v, str)])
-
-
-
[docs]class PcrLogParser:
-    """Iterator over the events of a log."""
-
-    def __init__(self, log: BinaryIO):
-        self.log = log
-
-    def __iter__(self) -> 'PcrLogParser':
-        return self
-
-    def __next__(self) -> TcgPcrEvent:
-        event = TcgPcrEvent.parse(self.log)
-        if not event:
-            raise StopIteration()
-        return event
-
-
[docs]    def next(self) -> TcgPcrEvent:
-        return self.__next__()

-
-
-
[docs]def parse(log: BinaryIO) -> None:
-    """Simple wrapper around PcrLogParser."""
-    for event in PcrLogParser(log):
-        logger().log(str(event))

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/ucode.html b/_modules/chipsec/hal/ucode.html deleted file mode 100644 index 111ebc06..00000000 --- a/_modules/chipsec/hal/ucode.html +++ /dev/null @@ -1,252 +0,0 @@ - - - - - - - - chipsec.hal.ucode — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.ucode

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Microcode update specific functionality (for each CPU thread)
-
-usage:
-    >>> ucode_update_id( 0 )
-    >>> load_ucode_update( 0, ucode_buf )
-    >>> update_ucode_all_cpus( 'ucode.pdb' )
-    >>> dump_ucode_update_header( 'ucode.pdb' )
-"""
-
-import struct
-import os
-from typing import AnyStr
-from chipsec.logger import logger
-from chipsec.file import read_file
-
-IA32_MSR_BIOS_UPDT_TRIG = 0x79
-IA32_MSR_BIOS_SIGN_ID = 0x8B
-IA32_MSR_BIOS_SIGN_ID_STATUS = 0x1
-
-
-from collections import namedtuple
-
-
-
[docs]class UcodeUpdateHeader(namedtuple('UcodeUpdateHeader', 'header_version update_revision date processor_signature checksum loader_revision processor_flags data_size total_size reserved1 reserved2 reserved3')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-Microcode Update Header
---------------------------------
-Header Version      : 0x{self.header_version:08X}
-Update Revision     : 0x{self.update_revision:08X}
-Date                : 0x{self.date:08X}
-Processor Signature : 0x{self.processor_signature:08X}
-Checksum            : 0x{self.checksum:08X}
-Loader Revision     : 0x{self.loader_revision:08X}
-Processor Flags     : 0x{self.processor_flags:08X}
-Update Data Size    : 0x{self.data_size:08X}
-Total Size          : 0x{self.total_size:08X}
-Reserved1           : 0x{self.reserved1:08X}
-Reserved2           : 0x{self.reserved2:08X}
-Reserved3           : 0x{self.reserved3:08X}
-"""

-
-
-UCODE_HEADER_SIZE = 0x30
-
-
-
[docs]def dump_ucode_update_header(pdb_ucode_buffer: bytes) -> UcodeUpdateHeader:
-    ucode_header = UcodeUpdateHeader(*struct.unpack_from('12I', pdb_ucode_buffer))
-    logger().log_hal(str(ucode_header))
-    return ucode_header

-
-
-
[docs]def read_ucode_file(ucode_filename: str) -> bytes:
-    ucode_buf = read_file(ucode_filename)
-    if (ucode_filename.endswith('.pdb')):
-        logger().log_hal(f"[ucode] PDB file '{ucode_filename:256}' has ucode update header (size = 0x{UCODE_HEADER_SIZE:X})")
-        dump_ucode_update_header(ucode_buf)
-        return ucode_buf[UCODE_HEADER_SIZE:]
-    else:
-        return ucode_buf

-
-
-
[docs]class Ucode:
-    def __init__(self, cs):
-        self.helper = cs.helper
-        self.cs = cs
-
-    # @TODO remove later/replace with msr.get_cpu_thread_count()
-
[docs]    def get_cpu_thread_count(self) -> int:
-        thread_count = self.cs.read_register_field("IA32_MSR_CORE_THREAD_COUNT", "Thread_Count")
-        return thread_count

-
-
[docs]    def ucode_update_id(self, cpu_thread_id: int) -> int:
-        (bios_sign_id_lo, bios_sign_id_hi) = self.helper.read_msr(cpu_thread_id, IA32_MSR_BIOS_SIGN_ID)
-        ucode_update_id = bios_sign_id_hi
-
-        if (bios_sign_id_lo & IA32_MSR_BIOS_SIGN_ID_STATUS):
-            logger().log_hal(f'[ucode] CPU{cpu_thread_id:d}: last Microcode update failed (current microcode id = 0x{ucode_update_id:08X})')
-        else:
-            logger().log_hal(f'[ucode] CPU{cpu_thread_id:d}: Microcode update ID = 0x{ucode_update_id:08X}')
-
-        return ucode_update_id

-
-
[docs]    def update_ucode_all_cpus(self, ucode_file: str) -> bool:
-        if not (os.path.exists(ucode_file) and os.path.isfile(ucode_file)):
-            logger().log_error(f"Ucode file not found: '{ucode_file:.256}'")
-            return False
-        ucode_buf = read_ucode_file(ucode_file)
-        if (ucode_buf is not None) and (len(ucode_buf) > 0):
-            for tid in range(self.get_cpu_thread_count()):
-                self.load_ucode_update(tid, ucode_buf)
-        return True

-
-
[docs]    def update_ucode(self, cpu_thread_id: int, ucode_file: str) -> int:
-        if not (os.path.exists(ucode_file) and os.path.isfile(ucode_file)):
-            logger().log_error(f"Ucode file not found: '{ucode_file:.256}'")
-            return False
-        _ucode_buf = read_ucode_file(ucode_file)
-        return self.load_ucode_update(cpu_thread_id, _ucode_buf)

-
-
[docs]    def load_ucode_update(self, cpu_thread_id: int, ucode_buf: AnyStr) -> int:
-        logger().log_hal(f'[ucode] Loading microcode update on CPU{cpu_thread_id:d}')
-        self.helper.load_ucode_update(cpu_thread_id, ucode_buf)
-        return self.ucode_update_id(cpu_thread_id)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/uefi.html b/_modules/chipsec/hal/uefi.html deleted file mode 100644 index 4fc3bf8c..00000000 --- a/_modules/chipsec/hal/uefi.html +++ /dev/null @@ -1,785 +0,0 @@ - - - - - - - - chipsec.hal.uefi — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.uefi

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Main UEFI component using platform specific and common UEFI functionality
-"""
-
-import struct
-import os
-from typing import Dict, List, Optional, Tuple, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.hal.uefi_common import S3BOOTSCRIPT_ENTRY, EFI_SYSTEM_TABLE
-    from chipsec.hal.uefi_platform import EfiVariableType, EfiTableType
-from chipsec.hal import hal_base, uefi_platform
-from chipsec.hal.uefi_common import EFI_VENDOR_TABLE, EFI_VENDOR_TABLE_SIZE, EFI_VENDOR_TABLE_FORMAT, EFI_TABLE_HEADER_SIZE, EFI_TABLE_HEADER, EFI_TABLES, MAX_EFI_TABLE_SIZE
-from chipsec.hal.uefi_common import S3BootScriptOpcode, S3_BOOTSCRIPT_VARIABLES, parse_efivar_file, EFI_REVISIONS, AUTH_SIG_VAR, ESAL_SIG_VAR
-from chipsec.hal.uefi_common import EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_APPEND_WRITE, EFI_VARIABLE_NON_VOLATILE
-from chipsec.hal.uefi_common import EFI_VARIABLE_BOOTSERVICE_ACCESS, EFI_VARIABLE_RUNTIME_ACCESS, EFI_VARIABLE_HARDWARE_ERROR_RECORD, SECURE_BOOT_SIG_VAR
-from chipsec.hal.uefi_common import IS_VARIABLE_ATTRIBUTE, EFI_TABLE_HEADER_FMT, EFI_SYSTEM_TABLE_SIGNATURE, EFI_RUNTIME_SERVICES_SIGNATURE, EFI_BOOT_SERVICES_SIGNATURE
-from chipsec.hal.uefi_common import EFI_DXE_SERVICES_TABLE_SIGNATURE, EFI_CONFIGURATION_TABLE, ACPI_VARIABLE_SET_STRUCT_SIZE
-from chipsec.logger import logger, print_buffer_bytes
-from chipsec.file import write_file, read_file
-from chipsec.defines import bytestostring
-from chipsec.helper.oshelper import OsHelperError
-
-
-
-########################################################################################################
-#
-# S3 Resume Boot-Script Parsing Functionality
-#
-########################################################################################################
-
-
[docs]def parse_script(script: bytes, log_script: bool = False) -> List['S3BOOTSCRIPT_ENTRY']:
-    off = 0
-    entry_type = 0
-    s3_boot_script_entries = []
-    len_s = len(script)
-
-    if log_script:
-        logger().log('[uefi] +++ S3 Resume Boot-Script +++\n')
-    script_type, script_header_length = uefi_platform.id_s3bootscript_type(script, log_script)
-    off += script_header_length
-
-    while (off < len_s) and (entry_type != S3BootScriptOpcode.EFI_BOOT_SCRIPT_TERMINATE_OPCODE):
-        entry_type, s3script_entry = uefi_platform.parse_s3bootscript_entry(script_type, script, off, log_script)
-        # couldn't parse the next entry - return what has been parsed so far
-        if s3script_entry is None:
-            return s3_boot_script_entries
-        s3_boot_script_entries.append(s3script_entry)
-        off += s3script_entry.length
-
-    if log_script:
-        logger().log('[uefi] +++ End of S3 Resume Boot-Script +++')
-
-    logger().log_hal(f'[uefi] S3 Resume Boot-Script size: 0x{off:X}')
-    logger().log_hal('\n[uefi] [++++++++++ S3 Resume Boot-Script Buffer ++++++++++]')
-    if logger().HAL:
-        print_buffer_bytes(script[: off])
-
-    return s3_boot_script_entries

-
-
-########################################################################################################
-#
-# UEFI Variables Parsing Functionality
-#
-########################################################################################################
-
-
-EFI_VAR_NAME_PK = 'PK'
-EFI_VAR_NAME_KEK = 'KEK'
-EFI_VAR_NAME_db = 'db'
-EFI_VAR_NAME_dbx = 'dbx'
-EFI_VAR_NAME_SecureBoot = 'SecureBoot'
-EFI_VAR_NAME_SetupMode = 'SetupMode'
-EFI_VAR_NAME_CustomMode = 'CustomMode'
-EFI_VAR_NAME_SignatureSupport = 'SignatureSupport'
-EFI_VAR_NAME_certdb = 'certdb'
-EFI_VAR_NAME_AuthVarKeyDatabase = 'AuthVarKeyDatabase'
-
-#
-# \MdePkg\Include\Guid\ImageAuthentication.h
-#
-# define EFI_IMAGE_SECURITY_DATABASE_GUID \
-#  { \
-#    0xd719b2cb, 0x3d3a, 0x4596, { 0xa3, 0xbc, 0xda, 0xd0, 0xe, 0x67, 0x65, 0x6f } \
-#  }
-#
-# \MdePkg\Include\Guid\GlobalVariable.h
-#
-# define EFI_GLOBAL_VARIABLE \
-#  { \
-#    0x8BE4DF61, 0x93CA, 0x11d2, {0xAA, 0x0D, 0x00, 0xE0, 0x98, 0x03, 0x2B, 0x8C } \
-#  }
-#
-EFI_GLOBAL_VARIABLE_GUID = '8be4df61-93ca-11d2-aa0d-00e098032b8c'
-EFI_IMAGE_SECURITY_DATABASE_GUID = 'd719b2cb-3d3a-4596-a3bc-dad00e67656f'
-# EFI_VAR_GUID_SecureBoot = EFI_GLOBAL_VARIABLE
-# EFI_VAR_GUID_db         = EFI_IMAGE_SECURITY_DATABASE_GUID
-
-EFI_VARIABLE_DICT: Dict[str, str] = {
-    EFI_VAR_NAME_PK: EFI_GLOBAL_VARIABLE_GUID,
-    EFI_VAR_NAME_KEK: EFI_GLOBAL_VARIABLE_GUID,
-    EFI_VAR_NAME_db: EFI_IMAGE_SECURITY_DATABASE_GUID,
-    EFI_VAR_NAME_dbx: EFI_IMAGE_SECURITY_DATABASE_GUID,
-    EFI_VAR_NAME_SecureBoot: EFI_GLOBAL_VARIABLE_GUID,
-    EFI_VAR_NAME_SetupMode: EFI_GLOBAL_VARIABLE_GUID,
-    EFI_VAR_NAME_CustomMode: EFI_GLOBAL_VARIABLE_GUID,
-    EFI_VAR_NAME_SignatureSupport: EFI_GLOBAL_VARIABLE_GUID
-}
-
-
-SECURE_BOOT_KEY_VARIABLES = (EFI_VAR_NAME_PK, EFI_VAR_NAME_KEK, EFI_VAR_NAME_db)
-SECURE_BOOT_OPTIONAL_VARIABLES = (EFI_VAR_NAME_dbx,)
-SECURE_BOOT_VARIABLES = (EFI_VAR_NAME_SecureBoot, EFI_VAR_NAME_SetupMode) + SECURE_BOOT_KEY_VARIABLES + SECURE_BOOT_OPTIONAL_VARIABLES
-SECURE_BOOT_VARIABLES_ALL = (EFI_VAR_NAME_CustomMode, EFI_VAR_NAME_SignatureSupport) + SECURE_BOOT_VARIABLES
-AUTHENTICATED_VARIABLES = (EFI_VAR_NAME_AuthVarKeyDatabase, EFI_VAR_NAME_certdb) + SECURE_BOOT_KEY_VARIABLES
-
-
-
[docs]def get_auth_attr_string(attr: int) -> str:
-    attr_str = ' '
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS):
-        attr_str = f'{attr_str}AWS+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS):
-        attr_str = f'{attr_str}TBAWS+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_APPEND_WRITE):
-        attr_str = f'{attr_str}AW+'
-    return attr_str[:-1].lstrip()

-
-
-
[docs]def get_attr_string(attr: int) -> str:
-    attr_str = ' '
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_NON_VOLATILE):
-        attr_str = f'{attr_str}NV+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_BOOTSERVICE_ACCESS):
-        attr_str = f'{attr_str}BS+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_RUNTIME_ACCESS):
-        attr_str = f'{attr_str}RT+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_HARDWARE_ERROR_RECORD):
-        attr_str = f'{attr_str}HER+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS):
-        attr_str = f'{attr_str}AWS+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS):
-        attr_str = f'{attr_str}TBAWS+'
-    if IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_APPEND_WRITE):
-        attr_str = f'{attr_str}AW+'
-    return attr_str[:-1].lstrip()

-
-
-
-
-
-
-
-
[docs]def decode_EFI_variables(efi_vars: Dict[str, List['EfiVariableType']], nvram_pth: str) -> None:
-    # print decoded and sorted EFI variables into a log file
-    print_sorted_EFI_variables(efi_vars)
-    # write each EFI variable into its own binary file
-    for name in efi_vars.keys():
-        n = 0
-        data: bytes
-        guid: str
-        attrs: int
-        for (_, _, _, data, guid, attrs) in efi_vars[name]: # Type: EfiVariableType
-            attr_str = get_attr_string(attrs)
-            var_fname = os.path.join(nvram_pth, f'{name}_{guid}_{attr_str.strip()}_{n:d}.bin')
-            write_file(var_fname, data)
-            if name in SECURE_BOOT_KEY_VARIABLES:
-                parse_efivar_file(var_fname, data, SECURE_BOOT_SIG_VAR)
-            elif name == EFI_VAR_NAME_certdb:
-                parse_efivar_file(var_fname, data, AUTH_SIG_VAR)
-            elif name == EFI_VAR_NAME_AuthVarKeyDatabase:
-                parse_efivar_file(var_fname, data, ESAL_SIG_VAR)
-            n = n + 1

-
-
-
[docs]def identify_EFI_NVRAM(buffer: bytes) -> str:
-    b = buffer
-    for fw_type in uefi_platform.fw_types:
-        if uefi_platform.EFI_VAR_DICT[fw_type]['func_getnvstore']:
-            (offset, _, _) = uefi_platform.EFI_VAR_DICT[fw_type]['func_getnvstore'](b)
-            if offset != -1:
-                return fw_type
-    return ''

-
-
-
[docs]def parse_EFI_variables(fname: str, rom: bytes, authvars: bool, _fw_type: Optional[str] = None) -> bool:
-    if (_fw_type in uefi_platform.fw_types) and (_fw_type is not None):
-        logger().log(f'[uefi] Using FW type (NVRAM format): {_fw_type}')
-    else:
-        logger().log_error(f"Unrecognized FW type '{_fw_type}' (NVRAM format) '{_fw_type}'.")
-        return False
-
-    logger().log('[uefi] Searching for NVRAM in the binary..')
-    efi_vars_store = find_EFI_variable_store(rom, _fw_type)
-    if efi_vars_store:
-        nvram_fname = f'{fname}.nvram.bin'
-        write_file(nvram_fname, efi_vars_store)
-        nvram_pth = f'{fname}.nvram.dir'
-        if not os.path.exists(nvram_pth):
-            os.makedirs(nvram_pth)
-        logger().log('[uefi] Extracting EFI Variables in the NVRAM..')
-        efi_vars = uefi_platform.EFI_VAR_DICT[_fw_type]['func_getefivariables'](efi_vars_store)
-        decode_EFI_variables(efi_vars, nvram_pth)
-    else:
-        logger().log_error('Did not find NVRAM')
-        return False
-
-    return True

-
-
-
[docs]def find_EFI_variable_store(rom_buffer: Optional[bytes], _FWType: Optional[str]) -> bytes:
-    if rom_buffer is None:
-        logger().log_error('rom_buffer is None')
-        return b''
-
-    rom = rom_buffer
-    offset = 0
-    size = len(rom_buffer)
-    nvram_header = None
-
-    if _FWType is None:
-        logger().log_hal(f'[uefi] find_EFI_variable_store(): _FWType is None. Bypassing find_EFI_variable_store().')
-        return b''
-    if uefi_platform.EFI_VAR_DICT[_FWType]['func_getnvstore']:
-        (offset, size, nvram_header) = uefi_platform.EFI_VAR_DICT[_FWType]['func_getnvstore'](rom)
-        if (-1 == offset):
-            logger().log_error("'func_getnvstore' is defined but could not find EFI NVRAM. Exiting..")
-            return b''
-    else:
-        logger().log("[uefi] 'func_getnvstore' is not defined in EFI_VAR_DICT. Assuming start offset 0.")
-
-    if -1 == size:
-        size = len(rom_buffer)
-    nvram_buf = rom[offset: offset + size]
-
-    if logger().UTIL_TRACE:
-        logger().log(f'[uefi] Found EFI NVRAM at offset 0x{offset:08X}')
-        logger().log("""
-==================================================================
-NVRAM: EFI Variable Store
-==================================================================""")
-        if nvram_header:
-            logger().log(nvram_header)
-    return nvram_buf

-
-########################################################################################################
-#
-# UEFI HAL Component
-#
-########################################################################################################
-
-
-
[docs]class UEFI(hal_base.HALBase):
-    def __init__(self, cs):
-        super(UEFI, self).__init__(cs)
-        self.helper = cs.helper
-        # if cs is not None:
-        #    self.cs = cs
-        #    self.helper = cs.helper
-        # else:
-        #    self.helper = helper
-        self._FWType = uefi_platform.FWType.EFI_FW_TYPE_UEFI
-
-    ######################################################################
-    # FWType defines platform/BIOS dependent formats like
-    # format of EFI NVRAM, format of FV, etc.
-    #
-    # FWType chooses an element from the EFI_VAR_DICT Dictionary
-    #
-    # Default current platform type is EFI_FW_TYPE_UEFI
-    ######################################################################
-
-
[docs]    def set_FWType(self, efi_nvram_format: str) -> None:
-        if efi_nvram_format in uefi_platform.fw_types:
-            self._FWType = efi_nvram_format

-
-    ######################################################################
-    # EFI NVRAM Parsing Functions
-    ######################################################################
-
-
[docs]    def dump_EFI_variables_from_SPI(self) -> bytes:
-        return self.read_EFI_variables_from_SPI(0, 0x800000)

-
-
[docs]    def read_EFI_variables_from_SPI(self, BIOS_region_base: int, BIOS_region_size: int) -> bytes:
-        rom = self.cs.spi.read_spi(BIOS_region_base, BIOS_region_size)
-        efi_var_store = find_EFI_variable_store(rom, self._FWType)
-        if efi_var_store:
-            efi_vars = uefi_platform.EFI_VAR_DICT[self._FWType]['func_getefivariables']
-            return efi_vars
-        return efi_var_store

-
-
[docs]    def read_EFI_variables_from_file(self, filename: str) -> bytes:
-        rom = read_file(filename)
-        efi_var_store = find_EFI_variable_store(rom, self._FWType)
-        if efi_var_store:
-            efi_vars = uefi_platform.EFI_VAR_DICT[self._FWType]['func_getefivariables']
-            return efi_vars
-        return efi_var_store

-
-    # @TODO: Do not use, will be removed
-
-
[docs]    def read_EFI_variables(self, efi_var_store: Optional[bytes], authvars: bool) -> Dict[str, List['EfiVariableType']]:
-        if efi_var_store is None:
-            logger().log_error('efi_var_store is None')
-            return {}
-        variables: Dict[str, List[EfiVariableType]] = uefi_platform.EFI_VAR_DICT[self._FWType]['func_getefivariables'](efi_var_store)
-        if logger().UTIL_TRACE:
-            print_sorted_EFI_variables(variables)
-        return variables

-
-    ######################################################################
-    # S3 Resume Boot-Script Parsing Functions
-    ######################################################################
-
-    #
-    # Finds physical address of the S3 resume boot script from UEFI variables
-    # Returns:
-    #   found               - status is the script is found
-    #   AcpiBootScriptTable - physical address of the S3 resume boot script, 0 if (not found)
-    #
-
[docs]    def find_s3_bootscript(self) -> Tuple[bool, List[int]]:
-        found = False
-        BootScript_addresses = []
-
-        efivars = self.list_EFI_variables()
-        if efivars is None:
-            logger().log_error('Could not enumerate UEFI variables at runtime')
-            return (found, BootScript_addresses)
-        logger().log_hal(f'[uefi] Searching for EFI variable(s): {str(S3_BOOTSCRIPT_VARIABLES)}')
-
-        for efivar_name in efivars:
-            (off, buf, hdr, data, guid, attrs) = efivars[efivar_name][0]
-            if efivar_name in S3_BOOTSCRIPT_VARIABLES:
-                logger().log_hal(f'[uefi] Found: {efivar_name} {{{guid}}} {get_attr_string(attrs)} variable')
-                logger().log_hal(f'[uefi] {efivar_name} variable data:')
-                if logger().HAL:
-                    print_buffer_bytes(data)
-
-                varsz = len(data)
-                if 4 == varsz:
-                    AcpiGlobalAddr_fmt = '<L'
-                elif 8 == varsz:
-                    AcpiGlobalAddr_fmt = '<Q'
-                else:
-                    logger().log_error(f"Unrecognized format of '{efivar_name}' UEFI variable (data size = 0x{varsz:X})")
-                    break
-                AcpiGlobalAddr = struct.unpack_from(AcpiGlobalAddr_fmt, data)[0]
-                if 0 == AcpiGlobalAddr:
-                    logger().log_error(f'Pointer to ACPI Global Data structure in {efivar_name} variable is 0')
-                    break
-                logger().log_hal(f"[uefi] Pointer to ACPI Global Data structure: 0x{AcpiGlobalAddr:016X}")
-                logger().log_hal('[uefi] Decoding ACPI Global Data structure...')
-                AcpiVariableSet = self.helper.read_phys_mem(AcpiGlobalAddr, ACPI_VARIABLE_SET_STRUCT_SIZE)
-                logger().log_hal('[uefi] AcpiVariableSet structure:')
-                if logger().HAL:
-                    print_buffer_bytes(AcpiVariableSet)
-                AcpiVariableSet_fmt = '<6Q'
-                # if len(AcpiVariableSet) < struct.calcsize(AcpiVariableSet_fmt):
-                #    logger().log_error( 'Unrecognized format of AcpiVariableSet structure' )
-                #    return (False,0)
-                _, _, _, AcpiBootScriptTable, _, _ = struct.unpack_from(AcpiVariableSet_fmt, AcpiVariableSet)
-                logger().log_hal(f'[uefi] ACPI Boot-Script table base = 0x{AcpiBootScriptTable:016X}')
-                found = True
-                BootScript_addresses.append(AcpiBootScriptTable)
-                # break
-        return (found, BootScript_addresses)

-
-    #
-    # Upper level function to find and parse S3 resume boot script
-    # Returns:
-    #   bootscript_pa  - physical address of the S3 resume boot script
-    #   script_entries - a list of parse S3 resume boot script operations
-    #
-
[docs]    def get_s3_bootscript(self, log_script: bool = False) -> Tuple[List[int], Optional[Dict[int, List['S3BOOTSCRIPT_ENTRY']]]]:
-        parsed_scripts = {}
-        script_entries = []
-        #
-        # Find the S3 Resume Boot-Script from UEFI variables
-        #
-        found, bootscript_PAs = self.find_s3_bootscript()
-        if not found:
-            return (bootscript_PAs, None)
-        logger().log_hal(f'[uefi] Found {len(bootscript_PAs):d} S3 resume boot-scripts')
-
-        for bootscript_pa in bootscript_PAs:
-            if (bootscript_pa == 0):
-                continue
-            logger().log_hal(f'[uefi] S3 resume boot-script at 0x{bootscript_pa:016X}')
-            #
-            # Decode the S3 Resume Boot-Script into a sequence of operations/opcodes
-            #
-            # @TODO: should be dumping memory contents in a loop until end opcode is found or id'ing actual size
-            script_buffer = self.helper.read_phys_mem(bootscript_pa, 0x200000)
-            logger().log_hal('[uefi] Decoding S3 Resume Boot-Script...')
-            script_entries = parse_script(script_buffer, log_script)
-            parsed_scripts[bootscript_pa] = script_entries
-        return (bootscript_PAs, parsed_scripts)

-
-    ######################################################################
-    # Runtime Variable API Functions
-    ######################################################################
-
-
[docs]    def list_EFI_variables(self) -> Optional[Dict[str, List[Tuple[int, bytes, int, bytes, str, int]]]]:
-        return self.helper.list_EFI_variables()

-
-
[docs]    def get_EFI_variable(self, name: str, guid: str, filename: Optional[str] = None) -> Optional[bytes]:
-        var = self.helper.get_EFI_variable(name, guid)
-        if var:
-            if filename:
-                write_file(filename, var)
-            if logger().UTIL_TRACE or logger().HAL:
-                logger().log(f'[uefi] EFI variable {guid}:{name} :')
-                print_buffer_bytes(var)
-        return var

-
-
[docs]    def set_EFI_variable(self, name: str, guid: str, var: bytes, datasize: Optional[int] = None, attrs: Optional[int] = None) -> Optional[int]:
-        atts_str = '' if attrs is None else f'(attributes = {attrs})'
-        logger().log_hal(f'[uefi] Writing EFI variable {guid}:{name} {atts_str}')
-        return self.helper.set_EFI_variable(name, guid, var, datasize, attrs)

-
-
[docs]    def set_EFI_variable_from_file(self, name: str, guid: str, filename: str, datasize: Optional[int] = None, attrs: Optional[int] = None) -> Optional[int]:
-        if filename is None:
-            logger().log_error('File with EFI variable is not specified')
-            return False
-        var = read_file(filename)
-        return self.set_EFI_variable(name, guid, var, datasize, attrs)

-
-
[docs]    def delete_EFI_variable(self, name: str, guid: str) -> Optional[int]:
-        logger().log_hal(f'[uefi] Deleting EFI variable {guid}:{name}')
-        return self.helper.delete_EFI_variable(name, guid)

-
-    ######################################################################
-    # UEFI System Tables
-    ######################################################################
-
-    EfiTable = Tuple[bool, int, Optional[EFI_TABLE_HEADER], Optional['EFI_SYSTEM_TABLE'], bytes]
-
-
[docs]    def find_EFI_Table(self, table_sig: str) -> EfiTable:
-        (smram_base, _, _) = self.cs.cpu.get_SMRAM()
-        CHUNK_SZ = 1024 * 1024  # 1MB
-        logger().log_hal(f"[uefi] Searching memory for EFI table with signature '{table_sig}'...")
-        table_pa = 0
-        table_header = None
-        table = None
-        table_buf = b''
-        pa = smram_base - CHUNK_SZ
-        isFound = False
-
-        (tseg_base, tseg_limit, _) = self.cs.cpu.get_TSEG()
-
-        while pa > CHUNK_SZ:
-            if (pa <= tseg_limit) and (pa >= tseg_base):
-                logger().log_hal(f'[uefi] Skipping memory read at pa: {pa:016X}')
-                pa -= CHUNK_SZ
-                continue
-            logger().log_hal(f'[uefi] Reading 0x{pa:016X}...')
-            try:
-                membuf = self.cs.mem.read_physical_mem(pa, CHUNK_SZ)
-            except OsHelperError as err:
-                logger().log_hal(f'[uefi] Unable to read memory at pa: {pa:016X} Error: {err}')
-                pa -= CHUNK_SZ
-                continue
-            pos = bytestostring(membuf).find(table_sig)
-            if -1 != pos:
-                table_pa = pa + pos
-                logger().log_hal(f"[uefi] Round signature '{table_sig}' at 0x{table_pa:016X}...")
-                if pos < (CHUNK_SZ - EFI_TABLE_HEADER_SIZE):
-                    hdr = membuf[pos: pos + EFI_TABLE_HEADER_SIZE]
-                else:
-                    hdr = self.cs.mem.read_physical_mem(table_pa, EFI_TABLE_HEADER_SIZE)
-                table_header = EFI_TABLE_HEADER(*struct.unpack_from(EFI_TABLE_HEADER_FMT, hdr))
-                # do some sanity checks on the header
-                is_reserved = table_header.Reserved != 0
-                is_bad_crc = table_header.CRC32 == 0
-                is_not_table_rev = table_header.Revision not in EFI_REVISIONS
-                is_not_correct_size = table_header.HeaderSize > MAX_EFI_TABLE_SIZE
-                if is_reserved or is_bad_crc or is_not_table_rev or is_not_correct_size:
-                    logger().log_hal(f"[uefi] Found '{table_sig}' at 0x{table_pa:016X} but doesn't look like an actual table. Keep searching...")
-                    logger().log_hal(str(table_header))
-                else:
-                    isFound = True
-                    logger().log_hal(f"[uefi] Found EFI table at 0x{table_pa:016X} with signature '{table_sig}'...")
-                    table_size = struct.calcsize(EFI_TABLES[table_sig]['fmt'])
-                    if pos < (CHUNK_SZ - EFI_TABLE_HEADER_SIZE - table_size):
-                        table_buf = membuf[pos: pos + EFI_TABLE_HEADER_SIZE + table_size]
-                    else:
-                        table_buf = self.cs.mem.read_physical_mem(table_pa, EFI_TABLE_HEADER_SIZE + table_size)
-                    table = EFI_TABLES[table_sig]['struct'](*struct.unpack_from(EFI_TABLES[table_sig]['fmt'], table_buf[EFI_TABLE_HEADER_SIZE:]))
-                    if logger().HAL:
-                        print_buffer_bytes(table_buf)
-                    logger().log_hal(f'[uefi] {EFI_TABLES[table_sig]["name"]}:')
-                    logger().log_hal(str(table_header))
-                    logger().log_hal(str(table))
-                    break
-            pa -= CHUNK_SZ
-        if not isFound:
-            logger().log_hal(f"[uefi] Could not find EFI table with signature '{table_sig}'")
-        return (isFound, table_pa, table_header, table, table_buf)

-
-
[docs]    def find_EFI_System_Table(self) -> EfiTable:
-        return self.find_EFI_Table(EFI_SYSTEM_TABLE_SIGNATURE)

-
-
[docs]    def find_EFI_RuntimeServices_Table(self) -> EfiTable:
-        return self.find_EFI_Table(EFI_RUNTIME_SERVICES_SIGNATURE)

-
-
[docs]    def find_EFI_BootServices_Table(self) -> EfiTable:
-        return self.find_EFI_Table(EFI_BOOT_SERVICES_SIGNATURE)

-
-
[docs]    def find_EFI_DXEServices_Table(self) -> EfiTable:
-        return self.find_EFI_Table(EFI_DXE_SERVICES_TABLE_SIGNATURE)

-    # def find_EFI_PEI_Table( self ):
-    #    return self.find_EFI_Table( EFI_FRAMEWORK_PEI_SERVICES_TABLE_SIGNATURE )
-    # def find_EFI_SMM_System_Table( self ):
-    #    return self.find_EFI_Table( EFI_SMM_SYSTEM_TABLE_SIGNATURE )
-
-
[docs]    def find_EFI_Configuration_Table(self) -> Tuple[bool, int, Optional[EFI_CONFIGURATION_TABLE], bytes]:
-        ect_pa = 0
-        ect = None
-        ect_buf = b''
-        (isFound, _, _, est, _) = self.find_EFI_System_Table()
-        if isFound and est is not None:
-            if 0 != est.BootServices:
-                logger().log_hal('[uefi] UEFI appears to be in Boot mode')
-                ect_pa = est.ConfigurationTable
-            else:
-                logger().log_hal('[uefi] UEFI appears to be in Runtime mode')
-                ect_pa = self.cs.mem.va2pa(est.ConfigurationTable)
-                if not ect_pa:
-                    # Most likely the VA in the System Table is not mapped so find the RST by signature and
-                    # then compute the address of the configuration table.  This assumes the VA mapping keeps
-                    # the pages in the same relative location as in physical memory.
-                    (rst_found, rst_pa, rst_header, rst, rst_buf) = self.find_EFI_RuntimeServices_Table()
-                    if rst_found:
-                        if logger().HAL:
-                            logger().log_warning('Attempting to derive configuration table address')
-                        ect_pa = rst_pa + (est.ConfigurationTable - est.RuntimeServices)
-                    else:
-                        if logger().HAL:
-                            logger().log_warning("Can't find UEFI ConfigurationTable")
-                        return (False, ect_pa, ect, ect_buf)
-        if est is not None:
-            logger().log_hal(f'[uefi] EFI Configuration Table ({est.NumberOfTableEntries:d} entries): VA = 0x{est.ConfigurationTable:016X}, PA = 0x{ect_pa:016X}')
-        else:
-            logger().log_hal(f'[uefi] EFI Configuration Table (No entries found)')
-
-        found = ect_pa is not None
-        if found and (est is not None):
-            ect_buf = self.cs.mem.read_physical_mem(ect_pa, EFI_VENDOR_TABLE_SIZE * est.NumberOfTableEntries)
-            ect = EFI_CONFIGURATION_TABLE()
-            for i in range(est.NumberOfTableEntries):
-                vt = EFI_VENDOR_TABLE(*struct.unpack_from(EFI_VENDOR_TABLE_FORMAT, ect_buf[i * EFI_VENDOR_TABLE_SIZE:]))
-                ect.VendorTables[vt.VendorGuid()] = vt.VendorTable
-        return (found, ect_pa, ect, ect_buf)

-
-
[docs]    def dump_EFI_tables(self) -> None:
-        (found, pa, hdr, table, table_buf) = self.find_EFI_System_Table()
-        if found:
-            logger().log('[uefi] EFI System Table:')
-            if table_buf is not None:
-                print_buffer_bytes(table_buf)
-            logger().log(str(hdr))
-            logger().log(str(table))
-        (found, _, ect, ect_buf) = self.find_EFI_Configuration_Table()
-        if found:
-            logger().log('\n[uefi] EFI Configuration Table:')
-            if ect_buf is not None:
-                print_buffer_bytes(ect_buf)
-            logger().log(str(ect))
-        (found, pa, hdr, table, table_buf) = self.find_EFI_RuntimeServices_Table()
-        if found:
-            logger().log('\n[uefi] EFI Runtime Services Table:')
-            if table_buf is not None:
-                print_buffer_bytes(table_buf)
-            logger().log(str(hdr))
-            logger().log(str(table))
-        (found, pa, hdr, table, table_buf) = self.find_EFI_BootServices_Table()
-        if found:
-            logger().log('\n[uefi] EFI Boot Services Table:')
-            if table_buf is not None:
-                print_buffer_bytes(table_buf)
-            logger().log(str(hdr))
-            logger().log(str(table))
-        (found, pa, hdr, table, table_buf) = self.find_EFI_DXEServices_Table()
-        if found:
-            logger().log('\n[uefi] EFI DXE Services Table:')
-            if table_buf is not None:
-                print_buffer_bytes(table_buf)
-            logger().log(str(hdr))
-            logger().log(str(table))

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/uefi_common.html b/_modules/chipsec/hal/uefi_common.html deleted file mode 100644 index 1e925c42..00000000 --- a/_modules/chipsec/hal/uefi_common.html +++ /dev/null @@ -1,1250 +0,0 @@ - - - - - - - - chipsec.hal.uefi_common — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.uefi_common

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Common UEFI/EFI functionality including UEFI variables, Firmware Volumes, Secure Boot variables, S3 boot-script, UEFI tables, etc.
-"""
-
-import os
-import struct
-import codecs
-from collections import namedtuple
-from uuid import UUID
-from typing import Dict, List, Tuple, Optional, Any, Callable
-
-from chipsec.file import read_file, write_file
-from chipsec.logger import logger, dump_buffer, dump_buffer_bytes
-from chipsec.defines import bytestostring
-
-# from chipsec.helper.oshelper import helper
-
-
-################################################################################################
-#
-# EFI Variable and Variable Store Defines
-#
-################################################################################################
-
-# UDK2010.SR1\MdeModulePkg\Include\Guid\VariableFormat.h
-#
-# Variable data start flag.
-#
-VARIABLE_DATA = 0x55aa
-VARIABLE_DATA_SIGNATURE = struct.pack('=H', VARIABLE_DATA)
-
-
-#
-# Variable Attributes
-#
-EFI_VARIABLE_NON_VOLATILE = 0x00000001  # Variable is non volatile
-EFI_VARIABLE_BOOTSERVICE_ACCESS = 0x00000002  # Variable is boot time accessible
-EFI_VARIABLE_RUNTIME_ACCESS = 0x00000004  # Variable is run-time accessible
-EFI_VARIABLE_HARDWARE_ERROR_RECORD = 0x00000008
-EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS = 0x00000010  # Variable is authenticated
-EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS = 0x00000020  # Variable is time based authenticated
-EFI_VARIABLE_APPEND_WRITE = 0x00000040  # Variable allows append
-EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS = 0x00000080
-UEFI23_1_AUTHENTICATED_VARIABLE_ATTRIBUTES = (EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS)
-
-
-
[docs]def IS_VARIABLE_ATTRIBUTE(_c: int, _Mask: int) -> bool:
-    return ((_c & _Mask) != 0)

-
-
-
[docs]def IS_EFI_VARIABLE_AUTHENTICATED(attr: int) -> bool:
-    return (IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS) or 
-            IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS) or
-            IS_VARIABLE_ATTRIBUTE(attr, EFI_VARIABLE_ENHANCED_AUTHENTICATED_ACCESS))

-
-
-MAX_VARIABLE_SIZE = 1024
-MAX_NVRAM_SIZE = 1024 * 1024
-
-
-
[docs]def get_nvar_name(nvram: bytes, name_offset: int, isAscii: bool):
-    if isAscii:
-        nend = nvram.find(b'\x00', name_offset)
-        name = nvram[name_offset:nend].decode('latin1')
-        name_size = len(name) + 1
-        return (name, name_size)
-    else:
-        nend = nvram.find(b'\x00\x00', name_offset)
-        name = nvram[name_offset:nend].decode('utf-16le')
-        name_size = len(name) + 2
-        return (name, name_size)

-
-
-VARIABLE_SIGNATURE_VSS = VARIABLE_DATA_SIGNATURE
-
-
-VARIABLE_STORE_FV_GUID = UUID('FFF12B8D-7696-4C8B-A985-2747075B4F50')
-
-
-################################################################################################
-#
-# Misc Defines
-#
-################################################################################################
-
-#
-# Status codes
-# edk2: MdePkg/Include/Base.h
-#
-
-# @TODO
-# define ENCODE_ERROR(StatusCode)     ((RETURN_STATUS)(MAX_BIT | (StatusCode)))
-# define ENCODE_WARNING(a)            (a)
-
-
[docs]class StatusCode:
-    EFI_SUCCESS = 0
-    EFI_LOAD_ERROR = 1
-    EFI_INVALID_PARAMETER = 2
-    EFI_UNSUPPORTED = 3
-    EFI_BAD_BUFFER_SIZE = 4
-    EFI_BUFFER_TOO_SMALL = 5
-    EFI_NOT_READY = 6
-    EFI_DEVICE_ERROR = 7
-    EFI_WRITE_PROTECTED = 8
-    EFI_OUT_OF_RESOURCES = 9
-    EFI_VOLUME_CORRUPTED = 10
-    EFI_VOLUME_FULL = 11
-    EFI_NO_MEDIA = 12
-    EFI_MEDIA_CHANGED = 13
-    EFI_NOT_FOUND = 14
-    EFI_ACCESS_DENIED = 15
-    EFI_NO_RESPONSE = 16
-    EFI_NO_MAPPING = 17
-    EFI_TIMEOUT = 18
-    EFI_NOT_STARTED = 19
-    EFI_ALREADY_STARTED = 20
-    EFI_ABORTED = 21
-    EFI_ICMP_ERROR = 22
-    EFI_TFTP_ERROR = 23
-    EFI_PROTOCOL_ERROR = 24
-    EFI_INCOMPATIBLE_VERSION = 25
-    EFI_SECURITY_VIOLATION = 26
-    EFI_CRC_ERROR = 27
-    EFI_END_OF_MEDIA = 28
-    EFI_END_OF_FILE = 31
-    EFI_INVALID_LANGUAGE = 32
-    EFI_COMPROMISED_DATA = 33
-    EFI_HTTP_ERROR = 35
-    '''
-  EFI_WARN_UNKNOWN_GLYPH    = 1
-  EFI_WARN_DELETE_FAILURE   = 2
-  EFI_WARN_WRITE_FAILURE    = 3
-  EFI_WARN_BUFFER_TOO_SMALL = 4
-  EFI_WARN_STALE_DATA       = 5
-  EFI_WARN_FILE_SYSTEM      = 6
-  '''

-
-
-EFI_STATUS_DICT: Dict[int, str] = {
-    StatusCode.EFI_SUCCESS: "EFI_SUCCESS",
-    StatusCode.EFI_LOAD_ERROR: "EFI_LOAD_ERROR",
-    StatusCode.EFI_INVALID_PARAMETER: "EFI_INVALID_PARAMETER",
-    StatusCode.EFI_UNSUPPORTED: "EFI_UNSUPPORTED",
-    StatusCode.EFI_BAD_BUFFER_SIZE: "EFI_BAD_BUFFER_SIZE",
-    StatusCode.EFI_BUFFER_TOO_SMALL: "EFI_BUFFER_TOO_SMALL",
-    StatusCode.EFI_NOT_READY: "EFI_NOT_READY",
-    StatusCode.EFI_DEVICE_ERROR: "EFI_DEVICE_ERROR",
-    StatusCode.EFI_WRITE_PROTECTED: "EFI_WRITE_PROTECTED",
-    StatusCode.EFI_OUT_OF_RESOURCES: "EFI_OUT_OF_RESOURCES",
-    StatusCode.EFI_VOLUME_CORRUPTED: "EFI_VOLUME_CORRUPTED",
-    StatusCode.EFI_VOLUME_FULL: "EFI_VOLUME_FULL",
-    StatusCode.EFI_NO_MEDIA: "EFI_NO_MEDIA",
-    StatusCode.EFI_MEDIA_CHANGED: "EFI_MEDIA_CHANGED",
-    StatusCode.EFI_NOT_FOUND: "EFI_NOT_FOUND",
-    StatusCode.EFI_ACCESS_DENIED: "EFI_ACCESS_DENIED",
-    StatusCode.EFI_NO_RESPONSE: "EFI_NO_RESPONSE",
-    StatusCode.EFI_NO_MAPPING: "EFI_NO_MAPPING",
-    StatusCode.EFI_TIMEOUT: "EFI_TIMEOUT",
-    StatusCode.EFI_NOT_STARTED: "EFI_NOT_STARTED",
-    StatusCode.EFI_ALREADY_STARTED: "EFI_ALREADY_STARTED",
-    StatusCode.EFI_ABORTED: "EFI_ABORTED",
-    StatusCode.EFI_ICMP_ERROR: "EFI_ICMP_ERROR",
-    StatusCode.EFI_TFTP_ERROR: "EFI_TFTP_ERROR",
-    StatusCode.EFI_PROTOCOL_ERROR: "EFI_PROTOCOL_ERROR",
-    StatusCode.EFI_INCOMPATIBLE_VERSION: "EFI_INCOMPATIBLE_VERSION",
-    StatusCode.EFI_SECURITY_VIOLATION: "EFI_SECURITY_VIOLATION",
-    StatusCode.EFI_CRC_ERROR: "EFI_CRC_ERROR",
-    StatusCode.EFI_END_OF_MEDIA: "EFI_END_OF_MEDIA",
-    StatusCode.EFI_END_OF_FILE: "EFI_END_OF_FILE",
-    StatusCode.EFI_INVALID_LANGUAGE: "EFI_INVALID_LANGUAGE",
-    StatusCode.EFI_COMPROMISED_DATA: "EFI_COMPROMISED_DATA",
-    StatusCode.EFI_HTTP_ERROR: "EFI_HTTP_ERROR"
-}
-
-EFI_MAX_BIT = 0x8000000000000000
-
-
-
[docs]def EFI_ERROR_STR(error: int) -> str:
-    """
-    Translates an EFI_STATUS value into its corresponding textual representation.
-    """
-    error &= ~EFI_MAX_BIT
-    try:
-        return EFI_STATUS_DICT[error]
-    except KeyError:
-        return "UNKNOWN"

-
-
-EFI_GUID_FMT = "16s"
-EFI_GUID_SIZE = struct.calcsize(EFI_GUID_FMT)
-
-
-
[docs]def EFI_GUID_STR(guid: bytes) -> str:
-    guid_str = UUID(bytes_le=guid)
-    return str(guid_str).upper()

-
-
-
[docs]def align(of:int, size: int) -> int:
-    of = (((of + size - 1) // size) * size)
-    return of

-
-
-
[docs]def bit_set(value: int, mask: int, polarity: bool = False) -> bool:
-    if polarity:
-        value = ~value
-    return ((value & mask) == mask)

-
-
-
[docs]def get_3b_size(s_data: bytes) -> int:
-    s_str = bytestostring(s_data)
-    return (ord(s_str[0]) + (ord(s_str[1]) << 8) + (ord(s_str[2]) << 16))

-
-
-# #################################################################################################
-#
-# UEFI Variable (NVRAM) Parsing Functionality
-#
-# #################################################################################################
-
-SIGNATURE_LIST = "<16sIII"
-SIGNATURE_LIST_size = struct.calcsize(SIGNATURE_LIST)
-
-
-
[docs]def parse_sha256(data):
-    return

-
-
-
[docs]def parse_rsa2048(data):
-    return

-
-
-
[docs]def parse_rsa2048_sha256(data):
-    return

-
-
-
[docs]def parse_sha1(data):
-    return

-
-
-
[docs]def parse_rsa2048_sha1(data):
-    return

-
-
-
[docs]def parse_x509(data):
-    return

-
-
-
[docs]def parse_sha224(data):
-    return

-
-
-
[docs]def parse_sha384(data):
-    return

-
-
-
[docs]def parse_sha512(data):
-    return

-
-
-
[docs]def parse_x509_sha256(data):
-    return

-
-
-
[docs]def parse_x509_sha384(data):
-    return

-
-
-
[docs]def parse_x509_sha512(data):
-    return

-
-
-
[docs]def parse_external(data):
-    return

-
-
-
[docs]def parse_pkcs7(data):
-    return

-
-
-sig_types: Dict[str, Tuple[str, Callable, int, str]] = {
-    "C1C41626-504C-4092-ACA9-41F936934328": ("EFI_CERT_SHA256_GUID", parse_sha256, 0x30, "SHA256"),
-    "3C5766E8-269C-4E34-AA14-ED776E85B3B6": ("EFI_CERT_RSA2048_GUID", parse_rsa2048, 0x110, "RSA2048"),
-    "E2B36190-879B-4A3D-AD8D-F2E7BBA32784": ("EFI_CERT_RSA2048_SHA256_GUID", parse_rsa2048_sha256, 0x110, "RSA2048_SHA256"),
-    "826CA512-CF10-4AC9-B187-BE01496631BD": ("EFI_CERT_SHA1_GUID", parse_sha1, 0x24, "SHA1"),
-    "67F8444F-8743-48F1-A328-1EAAB8736080": ("EFI_CERT_RSA2048_SHA1_GUID", parse_rsa2048_sha1, 0x110, "RSA2048_SHA1"),
-    "A5C059A1-94E4-4AA7-87B5-AB155C2BF072": ("EFI_CERT_X509_GUID", parse_x509, 0, "X509"),
-    "0B6E5233-A65C-44C9-9407-D9AB83BFC8BD": ("EFI_CERT_SHA224_GUID", parse_sha224, 0x2c, "SHA224"),
-    "FF3E5307-9FD0-48C9-85F1-8AD56C701E01": ("EFI_CERT_SHA384_GUID", parse_sha384, 0x40, "SHA384"),
-    "093E0FAE-A6C4-4F50-9F1B-D41E2B89C19A": ("EFI_CERT_SHA512_GUID", parse_sha512, 0x50, "SHA512"),
-    "3bd2a492-96c0-4079-b420-fcf98ef103ed": ("EFI_CERT_X509_SHA256_GUID", parse_x509_sha256, 0x40, "X509_SHA256"),
-    "7076876e-80c2-4ee6-aad2-28b349a6865b": ("EFI_CERT_X509_SHA384_GUID", parse_x509_sha384, 0x50, "X509_SHA384"),
-    "446dbf63-2502-4cda-bcfa-2465d2b0fe9d": ("EFI_CERT_X509_SHA512_GUID", parse_x509_sha512, 0x60, "X509_SHA512"),
-    "452e8ced-dfff-4b8c-ae01-5118862e682c": ("EFI_CERT_EXTERNAL_MANAGEMENT_GUID", parse_external, 0x11, "EXTERNAL_MANAGEMENT"),
-    "4AAFD29D-68DF-49EE-8AA9-347D375665A7": ("EFI_CERT_TYPE_PKCS7_GUID", parse_pkcs7, 0, "PKCS7"),
-    }
-
-
-
[docs]def parse_sb_db(db: bytes, decode_dir: str) -> List[bytes]:
-    entries = []
-    dof = 0
-    nsig = 0
-    db_size = len(db)
-    if 0 == db_size:
-        return entries
-
-    # some platforms have 0's in the beginnig, skip all 0 (no known SignatureType starts with 0x00):
-    while (dof + SIGNATURE_LIST_size) < db_size:
-        SignatureType0, SignatureListSize, SignatureHeaderSize, SignatureSize \
-            = struct.unpack(SIGNATURE_LIST, db[dof:dof + SIGNATURE_LIST_size])
-
-        # prevent infinite loop when parsing malformed var
-        if SignatureListSize == 0:
-            logger().log_bad("db parsing failed!")
-            return entries
-
-        # Determine the signature type
-        SignatureType = EFI_GUID_STR(SignatureType0)
-        sig_parse_f = None
-        sig_size = 0
-        if (SignatureType in sig_types.keys()):
-            sig_name, sig_parse_f, sig_size, short_name = sig_types[SignatureType]
-        else:
-            logger().log_bad(f'Unknown signature type {SignatureType}, skipping signature decode.')
-            dof += SignatureListSize
-            continue
-
-        # Extract signature data blobs
-        if (((sig_size > 0) and (sig_size == SignatureSize)) or ((sig_size == 0) and (SignatureSize >= 0x10))):
-            sof = 0
-            sig_list = db[dof + SIGNATURE_LIST_size + SignatureHeaderSize:dof + SignatureListSize]
-            sig_list_size = len(sig_list)
-            while ((sof + EFI_GUID_SIZE) < sig_list_size):
-                sig_data = sig_list[sof:sof + SignatureSize]
-                owner0 = struct.unpack(EFI_GUID_FMT, sig_data[:EFI_GUID_SIZE])[0]
-                owner = EFI_GUID_STR(owner0)
-                data = sig_data[EFI_GUID_SIZE:]
-                entries.append(data)
-                sig_file_name = f'{short_name}-{owner}-{nsig:02d}.bin'
-                sig_file_name = os.path.join(decode_dir, sig_file_name)
-                write_file(sig_file_name, data)
-                if (sig_parse_f is not None):
-                    sig_parse_f(data)
-                sof = sof + SignatureSize
-                nsig = nsig + 1
-        else:
-            err_str = f'Wrong SignatureSize for {SignatureType} type: 0x{SignatureSize:X}.'
-            if (sig_size > 0):
-                err_str = err_str + f' Must be 0x{sig_size:X}.'
-            else:
-                err_str = err_str + " Must be >= 0x10."
-            logger().log_error(err_str)
-            logger().log_error('Skipping signature decode for this list.')
-        dof = dof + SignatureListSize
-
-    return entries

-
-
-#
-#  "certdb" variable stores the signer's certificates for non PK/KEK/DB/DBX
-# variables with EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS|EFI_VARIABLE_NON_VOLATILE set.
-#  "certdbv" variable stores the signer's certificates for non PK/KEK/DB/DBX
-# variables with EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS set
-#
-# GUID: gEfiCertDbGuid
-#
-# We need maintain atomicity.
-#
-# Format:
-# +----------------------------+
-# | UINT32                     | <-- CertDbListSize, including this UINT32
-# +----------------------------+
-# | AUTH_CERT_DB_DATA          | <-- First CERT
-# +----------------------------+
-# | ........                   |
-# +----------------------------+
-# | AUTH_CERT_DB_DATA          | <-- Last CERT
-# +----------------------------+
-#
-# typedef struct {
-#   EFI_GUID    VendorGuid;
-#   UINT32      CertNodeSize;
-#   UINT32      NameSize;
-#   UINT32      CertDataSize;
-#   /// CHAR16  VariableName[NameSize];
-#   /// UINT8   CertData[CertDataSize];
-# } AUTH_CERT_DB_DATA;
-#
-AUTH_CERT_DB_LIST_HEAD = "<I"
-AUTH_CERT_DB_LIST_HEAD_size = struct.calcsize(AUTH_CERT_DB_LIST_HEAD)
-AUTH_CERT_DB_DATA = "<16sIII"
-AUTH_CERT_DB_DATA_size = struct.calcsize(AUTH_CERT_DB_DATA)
-
-
-
[docs]def parse_auth_var(db: bytes, decode_dir: str) -> List[bytes]:
-    entries = []
-    dof = 0
-    nsig = 0
-    db_size = len(db)
-
-    # Verify that list makes sense
-    if db_size < AUTH_CERT_DB_LIST_HEAD_size:
-        logger().log_warning("Cert list empty.")
-        return entries
-    expected_size = struct.unpack(AUTH_CERT_DB_LIST_HEAD, db[dof:dof + AUTH_CERT_DB_LIST_HEAD_size])[0]
-    if db_size != expected_size:
-        logger().log_error("Expected size of cert list did not match actual size.")
-        return entries
-    dof += AUTH_CERT_DB_LIST_HEAD_size
-
-    # Loop through all the certs in the list.
-    while dof + AUTH_CERT_DB_DATA_size < db_size:
-        ven_guid0, cert_node_size, name_size, cert_data_size = struct.unpack(AUTH_CERT_DB_DATA, db[dof:dof + AUTH_CERT_DB_DATA_size])
-        vendor_guid = EFI_GUID_STR(ven_guid0)
-        name_size *= 2  # Name size is actually the number of CHAR16 in the name array
-        tof = dof + AUTH_CERT_DB_DATA_size
-        try:
-            var_name = codecs.decode(db[tof:tof + name_size], 'utf-16')
-        except UnicodeDecodeError:
-            logger().log_warning(f'Unable to decode {db[tof:tof + name_size]}')
-            var_name = "chipsec.exceptions!"
-        tof += name_size
-        sig_data = db[tof:tof + cert_data_size]
-        entries.append(sig_data)
-        sig_file_name = f'{vendor_guid}-{codecs.encode(var_name)}-{nsig:02X}.bin'
-        sig_file_name = os.path.join(decode_dir, sig_file_name)
-        write_file(sig_file_name, sig_data)
-        dof += cert_node_size
-        nsig += 1
-
-    return entries

-
-
-ESAL_SIG_SIZE = 256
-
-
-
[docs]def parse_esal_var(db: bytes, decode_dir: str) -> List[bytes]:
-    entries = []
-    dof = 0
-    nsig = 0
-    db_size = len(db)
-
-    # Check to see how many signatures exist
-    if db_size < ESAL_SIG_SIZE:
-        logger().log('No signatures present.')
-        return entries
-
-    # Extract signatures
-    while dof + ESAL_SIG_SIZE <= db_size:
-        key_data = db[dof:dof + ESAL_SIG_SIZE]
-        entries.append(key_data)
-        key_file_name = os.path.join(decode_dir, f'AuthVarKeyDatabase-cert-{nsig:02X}.bin')
-        write_file(key_file_name, key_data)
-        dof += ESAL_SIG_SIZE
-        nsig += 1
-
-    return entries

-
-
-SECURE_BOOT_SIG_VAR = 1
-AUTH_SIG_VAR = 2
-ESAL_SIG_VAR = 3
-
-
-
[docs]def parse_efivar_file(fname: str, var: Optional[bytes] = None, var_type: int = SECURE_BOOT_SIG_VAR) -> None:
-    logger().log(f'Processing certs in file: {fname}')
-    if not var:
-        var = read_file(fname)
-    var_path = fname + '.dir'
-    if not os.path.exists(var_path):
-        os.makedirs(var_path)
-    if var_type == SECURE_BOOT_SIG_VAR:
-        parse_sb_db(var, var_path)
-    elif var_type == AUTH_SIG_VAR:
-        parse_auth_var(var, var_path)
-    elif var_type == ESAL_SIG_VAR:
-        parse_esal_var(var, var_path)
-    else:
-        logger().log_warning(f'Unsupported variable type requested: {var_type}')

-
-
-########################################################################################################
-#
-# S3 Resume Boot-Script Parsing Functionality
-#
-########################################################################################################
-
-BOOTSCRIPT_TABLE_OFFSET = 24
-RUNTIME_SCRIPT_TABLE_BASE_OFFSET = 32
-ACPI_VARIABLE_SET_STRUCT_SIZE = 0x48
-S3_BOOTSCRIPT_VARIABLES = ['AcpiGlobalVariable']
-
-MAX_S3_BOOTSCRIPT_ENTRY_LENGTH = 0x200
-
-
-#
-# MdePkg\Include\Pi\PiS3BootScript.h
-#
-# //*******************************************
-# // EFI Boot Script Opcode definitions
-# //*******************************************
-
-
[docs]class S3BootScriptOpcode:
-    EFI_BOOT_SCRIPT_IO_WRITE_OPCODE = 0x00
-    EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE = 0x01
-    EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE = 0x02
-    EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE = 0x03
-    EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE = 0x04
-    EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE = 0x05
-    EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE = 0x06
-    EFI_BOOT_SCRIPT_STALL_OPCODE = 0x07
-    EFI_BOOT_SCRIPT_DISPATCH_OPCODE = 0x08
-    EFI_BOOT_SCRIPT_TERMINATE_OPCODE = 0xFF

-
-
-
[docs]class S3BootScriptOpcode_MDE (S3BootScriptOpcode):
-    EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE = 0x09
-    EFI_BOOT_SCRIPT_INFORMATION_OPCODE = 0x0A
-    EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE = 0x0B
-    EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE = 0x0C
-    EFI_BOOT_SCRIPT_IO_POLL_OPCODE = 0x0D
-    EFI_BOOT_SCRIPT_MEM_POLL_OPCODE = 0x0E
-    EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE = 0x0F
-    EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE = 0x10

-
-#
-# EdkCompatibilityPkg\Foundation\Framework\Include\EfiBootScript.h
-#
-
-
-
[docs]class S3BootScriptOpcode_EdkCompat (S3BootScriptOpcode):
-    EFI_BOOT_SCRIPT_MEM_POLL_OPCODE = 0x09
-    EFI_BOOT_SCRIPT_INFORMATION_OPCODE = 0x0A
-    EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE = 0x0B
-    EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE = 0x0C
-    EFI_BOOT_SCRIPT_TABLE_OPCODE = 0xAA

-
-
-#
-# Names of S3 Boot Script Opcodes
-#
-script_opcodes: Dict[int, str] = {
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_IO_WRITE_OPCODE: "S3_BOOTSCRIPT_IO_WRITE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE: "S3_BOOTSCRIPT_IO_READ_WRITE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE: "S3_BOOTSCRIPT_MEM_WRITE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE: "S3_BOOTSCRIPT_MEM_READ_WRITE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE: "S3_BOOTSCRIPT_PCI_CONFIG_WRITE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE: "S3_BOOTSCRIPT_PCI_CONFIG_READ_WRITE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE: "S3_BOOTSCRIPT_SMBUS_EXECUTE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_STALL_OPCODE: "S3_BOOTSCRIPT_STALL",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_DISPATCH_OPCODE: "S3_BOOTSCRIPT_DISPATCH",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE:             "S3_BOOTSCRIPT_DISPATCH_2",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_INFORMATION_OPCODE:            "S3_BOOTSCRIPT_INFORMATION",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE:      "S3_BOOTSCRIPT_PCI_CONFIG2_WRITE",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE: "S3_BOOTSCRIPT_PCI_CONFIG2_READ_WRITE",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_IO_POLL_OPCODE:                "S3_BOOTSCRIPT_IO_POLL",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_MEM_POLL_OPCODE:               "S3_BOOTSCRIPT_MEM_POLL",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE:        "S3_BOOTSCRIPT_PCI_CONFIG_POLL",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE:       "S3_BOOTSCRIPT_PCI_CONFIG2_POLL",
-    # S3BootScriptOpcode.EFI_BOOT_SCRIPT_TABLE_OPCODE:                  "S3_BOOTSCRIPT_TABLE",
-    S3BootScriptOpcode.EFI_BOOT_SCRIPT_TERMINATE_OPCODE: "S3_BOOTSCRIPT_TERMINATE"
-}
-
-
-# //*******************************************
-# // EFI_BOOT_SCRIPT_WIDTH
-# //*******************************************
-# typedef enum {
-# EfiBootScriptWidthUint8,
-# EfiBootScriptWidthUint16,
-# EfiBootScriptWidthUint32,
-# EfiBootScriptWidthUint64,
-# EfiBootScriptWidthFifoUint8,
-# EfiBootScriptWidthFifoUint16,
-# EfiBootScriptWidthFifoUint32,
-# EfiBootScriptWidthFifoUint64,
-# EfiBootScriptWidthFillUint8,
-# EfiBootScriptWidthFillUint16,
-# EfiBootScriptWidthFillUint32,
-# EfiBootScriptWidthFillUint64,
-# EfiBootScriptWidthMaximum
-# } EFI_BOOT_SCRIPT_WIDTH;
-
-
[docs]class S3BootScriptWidth:
-    EFI_BOOT_SCRIPT_WIDTH_UINT8 = 0x00
-    EFI_BOOT_SCRIPT_WIDTH_UINT16 = 0x01
-    EFI_BOOT_SCRIPT_WIDTH_UINT32 = 0x02
-    EFI_BOOT_SCRIPT_WIDTH_UINT64 = 0x03

-
-
-script_width_sizes: Dict[int, int] = {
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT8: 1,
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT16: 2,
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT32: 4,
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT64: 8
-}
-
-script_width_values: Dict[int, int] = {
-    1: S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT8,
-    2: S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT16,
-    4: S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT32,
-    8: S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT64
-}
-
-script_width_formats: Dict[int, str] = {
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT8: 'B',
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT16: 'H',
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT32: 'I',
-    S3BootScriptWidth.EFI_BOOT_SCRIPT_WIDTH_UINT64: 'Q'
-}
-
-# //************************************************
-# // EFI_SMBUS_DEVICE_ADDRESS
-# //************************************************
-# typedef struct _EFI_SMBUS_DEVICE_ADDRESS {
-# UINTN SmbusDeviceAddress:7;
-# } EFI_SMBUS_DEVICE_ADDRESS;
-# //************************************************
-# // EFI_SMBUS_DEVICE_COMMAND
-# //************************************************
-# typedef UINTN EFI_SMBUS_DEVICE_COMMAND;
-#
-# //************************************************
-# // EFI_SMBUS_OPERATION
-# //************************************************
-# typedef enum _EFI_SMBUS_OPERATION {
-# EfiSmbusQuickRead,
-# EfiSmbusQuickWrite,
-# EfiSmbusReceiveByte,
-# EfiSmbusSendByte,
-# EfiSmbusReadByte,
-# EfiSmbusWriteByte,
-# EfiSmbusReadWord,
-# EfiSmbusWriteWord,
-# EfiSmbusReadBlock,
-# EfiSmbusWriteBlock,
-# EfiSmbusProcessCall,
-# EfiSmbusBWBRProcessCall
-# } EFI_SMBUS_OPERATION;
-
-
-
[docs]class S3BootScriptSmbusOperation:
-    QUICK_READ = 0x00
-    QUICK_WRITE = 0x01
-    RECEIVE_BYTE = 0x02
-    SEND_BYTE = 0x03
-    READ_BYTE = 0x04
-    WRITE_BYTE = 0x05
-    READ_WORD = 0x06
-    WRITE_WORD = 0x07
-    READ_BLOCK = 0x08
-    WRITE_BLOCK = 0x09
-    PROCESS_CALL = 0x0A
-    BWBR_PROCESS_CALL = 0x0B

-
-
-
[docs]class op_io_pci_mem:
-    def __init__(self, opcode: int, size: int, width: int, address: int, unknown: Optional[int], count: Optional[int], 
-                 buffer: Optional[bytes], value: Optional[int] = None, mask: Optional[int] = None):
-        self.opcode = opcode
-        self.size = size
-        self.width = width
-        self.address = address
-        self.unknown = unknown
-        self.count = count
-        self.value = value
-        self.mask = mask
-        self.name = script_opcodes[opcode]
-        self.buffer = buffer  # data[ self.size : ]
-        self.values = None
-        if self.count is not None and self.count > 0 and self.buffer is not None:
-            sz = self.count * script_width_sizes[self.width]
-            if len(self.buffer) != sz:
-                logger().log(f'[?] buffer size (0x{len(self.buffer):X}) != Width x Count (0x{sz:X})')
-            else:
-                self.values = list(struct.unpack((f'<{self.count:d}{script_width_formats[self.width]:1}'), self.buffer))
-
-    def __str__(self) -> str:
-        str_r = f'  Opcode : {self.name} (0x{self.opcode:04X})\n'
-        str_r += f'  Width  : 0x{self.width:02X} ({script_width_sizes[self.width]:X} bytes)\n'
-        str_r += f'  Address: 0x{self.address:08X}\n'
-        if self.value is not None:
-            str_r += f'  Value  : 0x{self.value:08X}\n'
-        if self.mask is not None:
-            str_r += f'  Mask   : 0x{self.mask:08X}\n'
-        if self.unknown is not None:
-            str_r += f'  Unknown: 0x{self.unknown:04X}\n'
-        if self.count is not None:
-            str_r += f'  Count  : 0x{self.count:X}\n'
-        if self.values is not None:
-            fmt = f'0x{{:0{script_width_sizes[self.width] * 2:d}X}}'
-            values_str = '  '.join([fmt.format(v) for v in self.values])
-            str_r += f'  Values : {values_str}\n'
-        elif self.buffer is not None:
-            str_r += f'  Buffer (size = 0x{len(self.buffer):X}):\n{dump_buffer(self.buffer, 16)}'
-        return str_r

-
-
-
[docs]class op_smbus_execute:
-    def __init__(self, opcode: int, size: int, address: int, command: int, operation: int, peccheck: int):
-        self.opcode = opcode
-        self.size = size
-        self.address = address
-        self.command = command
-        self.operation = operation
-        self.peccheck = peccheck
-        self.name = script_opcodes[opcode]
-
-    def __str__(self) -> str:
-        str_r = f'  Opcode           : {self.name} (0x{self.opcode:04X})\n'
-        str_r += f'  Secondary Address: 0x{self.address:02X}\n'
-        str_r += f'  Command          : 0x{self.command:08X}\n'
-        str_r += f'  Operation        : 0x{self.operation:02X}\n'
-        str_r += f'  PEC Check        : {self.peccheck:d}\n'
-        return str_r

-
-# typedef struct {
-#  UINT16  OpCode;
-#  UINT8   Length;
-#  UINT64  Duration;
-# } EFI_BOOT_SCRIPT_STALL;
-
-
-
[docs]class op_stall:
-    def __init__(self, opcode: int, size: int, duration: int):
-        self.opcode = opcode
-        self.size = size
-        self.duration = duration
-        self.name = script_opcodes[self.opcode]
-
-    def __str__(self) -> str:
-        str_r = f'  Opcode  : {self.name} (0x{self.opcode:04X})\n'
-        str_r += f'  Duration: 0x{self.duration:08X} (us)\n'
-        return str_r

-
-# typedef struct {
-#  UINT16                OpCode;
-#  UINT8                 Length;
-#  EFI_PHYSICAL_ADDRESS  EntryPoint;
-# } EFI_BOOT_SCRIPT_DISPATCH;
-
-
-
[docs]class op_dispatch:
-    def __init__(self, opcode: int, size: int, entrypoint: int, context: Optional[int] = None):
-        self.opcode = opcode
-        self.size = size
-        self.entrypoint = entrypoint
-        self.context = context
-        self.name = script_opcodes[self.opcode]
-
-    def __str__(self) -> str:
-        str_r = f'  Opcode     : {self.name} (0x{self.opcode:04X})\n'
-        str_r += f'  Entry Point: 0x{self.entrypoint:016X}\n'
-        if self.context is not None:
-            str_r += f'  Context    : 0x{self.context:016X}\n'
-        return str_r

-
-# typedef struct {
-#  UINT16  OpCode;
-#  UINT8   Length;
-#  UINT32  Width;
-#  UINT64  Address;
-#  UINT64  Duration;
-#  UINT64  LoopTimes;
-# } EFI_BOOT_SCRIPT_MEM_POLL;
-
-
-
[docs]class op_mem_poll:
-    def __init__(self, opcode: int, size: int, width: int, address: int, duration: int, looptimes: int):
-        self.opcode = opcode
-        self.size = size
-        self.width = width
-        self.address = address
-        self.duration = duration
-        self.looptimes = looptimes
-        self.name = 'S3_BOOTSCRIPT_MEM_POLL'
-
-    def __str__(self) -> str:
-        str_r = f'  Opcode    : {self.name} (0x{self.opcode:04X})\n'
-        str_r += f'  Width     : 0x{self.width:02X} ({script_width_sizes[self.width]:X} bytes)\n'
-        str_r += f'  Address   : 0x{self.address:016X}\n'
-        str_r += f'  Duration? : 0x{self.duration:016X}\n'
-        str_r += f'  LoopTimes?: 0x{self.looptimes:016X}\n'
-        return str_r

-
-
-
[docs]class op_terminate:
-    def __init__(self, opcode: int, size: int):
-        self.opcode = opcode
-        self.size = size
-        self.name = script_opcodes[self.opcode]
-
-    def __str__(self) -> str:
-        return f'  Opcode     : {self.name} (0x{self.opcode:02X})\n'

-
-
-
[docs]class op_unknown:
-    def __init__(self, opcode: int, size: int):
-        self.opcode = opcode
-        self.size = size
-
-    def __str__(self) -> str:
-        return f'  Opcode     : unknown (0x{self.opcode:02X})\n'

-
-
-
[docs]class S3BOOTSCRIPT_ENTRY:
-    def __init__(self, script_type: int, index: Optional[int], offset_in_script: int, length: int, data: Optional[bytes] = None):
-        self.script_type = script_type
-        self.index = index
-        self.offset_in_script = offset_in_script
-        self.length = length
-        self.data = data
-        self.decoded_opcode = None
-        self.header_length = 0
-
-    def __str__(self) -> str:
-        entry_str = '' if self.index is None else (f'[{self.index:03d}] ')
-        entry_str += f'Entry at offset 0x{self.offset_in_script:04X} (len = 0x{self.length:X}, header len = 0x{self.header_length:X}):'
-        if self.data:
-            entry_str = entry_str + f'\nData:\n{dump_buffer_bytes(self.data, 16)}'
-        if self.decoded_opcode:
-            entry_str = entry_str + f'Decoded:\n{str(self.decoded_opcode)}'
-        return entry_str

-
-
-# #################################################################################################
-#
-# UEFI Table Parsing Functionality
-#
-# #################################################################################################
-MAX_EFI_TABLE_SIZE = 0x1000
-
-# typedef struct {
-#   UINT64  Signature;
-#   UINT32  Revision;
-#   UINT32  HeaderSize;
-#   UINT32  CRC32;
-#   UINT32  Reserved;
-# } EFI_TABLE_HEADER;
-
-EFI_TABLE_HEADER_FMT = '=8sIIII'
-EFI_TABLE_HEADER_SIZE = 0x18
-
-
-
[docs]class EFI_TABLE_HEADER(namedtuple('EFI_TABLE_HEADER', 'Signature Revision HeaderSize CRC32 Reserved')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""Header:
-  Signature     : {bytestostring(self.Signature)}
-  Revision      : {EFI_SYSTEM_TABLE_REVISION(self.Revision)}
-  HeaderSize    : 0x{self.HeaderSize:08X}
-  CRC32         : 0x{self.CRC32:08X}
-  Reserved      : 0x{self.Reserved:08X}"""

-
-
-# #################################################################################################
-# EFI System Table
-# #################################################################################################
-#
-# \MdePkg\Include\Uefi\UefiSpec.h
-
-EFI_SYSTEM_TABLE_SIGNATURE = 'IBI SYST'
-
-EFI_2_80_SYSTEM_TABLE_REVISION = ((2 << 16) | (80))
-EFI_2_70_SYSTEM_TABLE_REVISION = ((2 << 16) | (70))
-EFI_2_60_SYSTEM_TABLE_REVISION = ((2 << 16) | (60))
-EFI_2_50_SYSTEM_TABLE_REVISION = ((2 << 16) | (50))
-EFI_2_40_SYSTEM_TABLE_REVISION = ((2 << 16) | (40))
-EFI_2_31_SYSTEM_TABLE_REVISION = ((2 << 16) | (31))
-EFI_2_30_SYSTEM_TABLE_REVISION = ((2 << 16) | (30))
-EFI_2_20_SYSTEM_TABLE_REVISION = ((2 << 16) | (20))
-EFI_2_10_SYSTEM_TABLE_REVISION = ((2 << 16) | (10))
-EFI_2_00_SYSTEM_TABLE_REVISION = ((2 << 16) | (00))
-EFI_1_10_SYSTEM_TABLE_REVISION = ((1 << 16) | (10))
-EFI_1_02_SYSTEM_TABLE_REVISION = ((1 << 16) | (0o2))
-EFI_REVISIONS: List[int] = [
-    EFI_2_80_SYSTEM_TABLE_REVISION,
-    EFI_2_70_SYSTEM_TABLE_REVISION, 
-    EFI_2_60_SYSTEM_TABLE_REVISION, 
-    EFI_2_50_SYSTEM_TABLE_REVISION, 
-    EFI_2_40_SYSTEM_TABLE_REVISION, 
-    EFI_2_31_SYSTEM_TABLE_REVISION,
-    EFI_2_30_SYSTEM_TABLE_REVISION, 
-    EFI_2_20_SYSTEM_TABLE_REVISION, 
-    EFI_2_10_SYSTEM_TABLE_REVISION, 
-    EFI_2_00_SYSTEM_TABLE_REVISION, 
-    EFI_1_10_SYSTEM_TABLE_REVISION, 
-    EFI_1_02_SYSTEM_TABLE_REVISION
-    ]
-
-
-
[docs]def EFI_SYSTEM_TABLE_REVISION(revision: int) -> str:
-    return f'{revision >> 16:d}.{revision & 0xFFFF:d}'

-
-
-EFI_SYSTEM_TABLE_FMT = '=12Q'
-
-
-
[docs]class EFI_SYSTEM_TABLE(namedtuple('EFI_SYSTEM_TABLE', 'FirmwareVendor FirmwareRevision ConsoleInHandle ConIn ConsoleOutHandle ConOut StandardErrorHandle StdErr RuntimeServices BootServices NumberOfTableEntries ConfigurationTable')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""EFI System Table:
-  FirmwareVendor      : 0x{self.FirmwareVendor:016X}
-  FirmwareRevision    : 0x{self.FirmwareRevision:016X}
-  ConsoleInHandle     : 0x{self.ConsoleInHandle:016X}
-  ConIn               : 0x{self.ConIn:016X}
-  ConsoleOutHandle    : 0x{self.ConsoleOutHandle:016X}
-  ConOut              : 0x{self.ConOut:016X}
-  StandardErrorHandle : 0x{self.StandardErrorHandle:016X}
-  StdErr              : 0x{self.StdErr:016X}
-  RuntimeServices     : 0x{self.RuntimeServices:016X}
-  BootServices        : 0x{self.BootServices:016X}
-  NumberOfTableEntries: 0x{self.NumberOfTableEntries:016X}
-  ConfigurationTable  : 0x{self.ConfigurationTable:016X}
-"""

-
-
-# #################################################################################################
-# EFI Runtime Services Table
-# #################################################################################################
-#
-# \MdePkg\Include\Uefi\UefiSpec.h
-
-EFI_RUNTIME_SERVICES_SIGNATURE = 'RUNTSERV'
-EFI_RUNTIME_SERVICES_REVISION = EFI_2_31_SYSTEM_TABLE_REVISION
-
-EFI_RUNTIME_SERVICES_TABLE_FMT = '=14Q'
-
-
-
[docs]class EFI_RUNTIME_SERVICES_TABLE(namedtuple('EFI_RUNTIME_SERVICES_TABLE', 'GetTime SetTime GetWakeupTime SetWakeupTime SetVirtualAddressMap ConvertPointer GetVariable GetNextVariableName SetVariable GetNextHighMonotonicCount ResetSystem UpdateCapsule QueryCapsuleCapabilities QueryVariableInfo')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""Runtime Services:
-  GetTime                  : 0x{self.GetTime:016X}
-  SetTime                  : 0x{self.SetTime:016X}
-  GetWakeupTime            : 0x{self.GetWakeupTime:016X}
-  SetWakeupTime            : 0x{self.SetWakeupTime:016X}
-  SetVirtualAddressMap     : 0x{self.SetVirtualAddressMap:016X}
-  ConvertPointer           : 0x{self.ConvertPointer:016X}
-  GetVariable              : 0x{self.GetVariable:016X}
-  GetNextVariableName      : 0x{self.GetNextVariableName:016X}
-  SetVariable              : 0x{self.SetVariable:016X}
-  GetNextHighMonotonicCount: 0x{self.GetNextHighMonotonicCount:016X}
-  ResetSystem              : 0x{self.ResetSystem:016X}
-  UpdateCapsule            : 0x{self.UpdateCapsule:016X}
-  QueryCapsuleCapabilities : 0x{self.QueryCapsuleCapabilities:016X}
-  QueryVariableInfo        : 0x{self.QueryVariableInfo:016X}
-"""

-
-
-# #################################################################################################
-# EFI Boot Services Table
-# #################################################################################################
-#
-# \MdePkg\Include\Uefi\UefiSpec.h
-
-EFI_BOOT_SERVICES_SIGNATURE = 'BOOTSERV'
-EFI_BOOT_SERVICES_REVISION = EFI_2_31_SYSTEM_TABLE_REVISION
-
-EFI_BOOT_SERVICES_TABLE_FMT = '=44Q'
-
-
-
[docs]class EFI_BOOT_SERVICES_TABLE(namedtuple('EFI_BOOT_SERVICES_TABLE', 'RaiseTPL RestoreTPL AllocatePages FreePages GetMemoryMap AllocatePool FreePool CreateEvent SetTimer WaitForEvent SignalEvent CloseEvent CheckEvent InstallProtocolInterface ReinstallProtocolInterface UninstallProtocolInterface HandleProtocol Reserved RegisterProtocolNotify LocateHandle LocateDevicePath InstallConfigurationTable LoadImage StartImage Exit UnloadImage ExitBootServices GetNextMonotonicCount Stall SetWatchdogTimer ConnectController DisconnectController OpenProtocol CloseProtocol OpenProtocolInformation ProtocolsPerHandle LocateHandleBuffer LocateProtocol InstallMultipleProtocolInterfaces UninstallMultipleProtocolInterfaces CalculateCrc32 CopyMem SetMem CreateEventEx')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""Boot Services:
-  RaiseTPL                           : 0x{self.RaiseTPL:016X}
-  RestoreTPL                         : 0x{self.RestoreTPL:016X}
-  AllocatePages                      : 0x{self.AllocatePages:016X}
-  FreePages                          : 0x{self.FreePages:016X}
-  GetMemoryMap                       : 0x{self.GetMemoryMap:016X}
-  AllocatePool                       : 0x{self.AllocatePool:016X}
-  FreePool                           : 0x{self.FreePool:016X}
-  CreateEvent                        : 0x{self.CreateEvent:016X}
-  SetTimer                           : 0x{self.SetTimer:016X}
-  WaitForEvent                       : 0x{self.WaitForEvent:016X}
-  SignalEvent                        : 0x{self.SignalEvent:016X}
-  CloseEvent                         : 0x{self.CloseEvent:016X}
-  CheckEvent                         : 0x{self.CheckEvent:016X}
-  InstallProtocolInterface           : 0x{self.InstallProtocolInterface:016X}
-  ReinstallProtocolInterface         : 0x{self.ReinstallProtocolInterface:016X}
-  UninstallProtocolInterface         : 0x{self.UninstallProtocolInterface:016X}
-  HandleProtocol                     : 0x{self.HandleProtocol:016X}
-  Reserved                           : 0x{self.Reserved:016X}
-  RegisterProtocolNotify             : 0x{self.RegisterProtocolNotify:016X}
-  LocateHandle                       : 0x{self.LocateHandle:016X}
-  LocateDevicePath                   : 0x{self.LocateDevicePath:016X}
-  InstallConfigurationTable          : 0x{self.InstallConfigurationTable:016X}
-  LoadImage                          : 0x{self.LoadImage:016X}
-  StartImage                         : 0x{self.StartImage:016X}
-  Exit                               : 0x{self.Exit:016X}
-  UnloadImage                        : 0x{self.UnloadImage:016X}
-  ExitBootServices                   : 0x{self.ExitBootServices:016X}
-  GetNextMonotonicCount              : 0x{self.GetNextMonotonicCount:016X}
-  Stall                              : 0x{self.Stall:016X}
-  SetWatchdogTimer                   : 0x{self.SetWatchdogTimer:016X}
-  ConnectController                  : 0x{self.ConnectController:016X}
-  DisconnectController               : 0x{self.DisconnectController:016X}
-  OpenProtocol                       : 0x{self.OpenProtocol:016X}
-  CloseProtocol                      : 0x{self.CloseProtocol:016X}
-  OpenProtocolInformation            : 0x{self.OpenProtocolInformation:016X}
-  ProtocolsPerHandle                 : 0x{self.ProtocolsPerHandle:016X}
-  LocateHandleBuffer                 : 0x{self.LocateHandleBuffer:016X}
-  LocateProtocol                     : 0x{self.LocateProtocol:016X}
-  InstallMultipleProtocolInterfaces  : 0x{self.InstallMultipleProtocolInterfaces:016X}
-  UninstallMultipleProtocolInterfaces: 0x{self.UninstallMultipleProtocolInterfaces:016X}
-  CalculateCrc32                     : 0x{self.CalculateCrc32:016X}
-  CopyMem                            : 0x{self.CopyMem:016X}
-  SetMem                             : 0x{self.SetMem:016X}
-  CreateEventEx                      : 0x{self.CreateEventEx:016X}
-"""

-
-
-# #################################################################################################
-# EFI System Configuration Table
-# #################################################################################################
-#
-# \MdePkg\Include\Uefi\UefiSpec.h
-# -------------------------------
-
-EFI_VENDOR_TABLE_FORMAT = '<' + EFI_GUID_FMT + 'Q'
-EFI_VENDOR_TABLE_SIZE = struct.calcsize(EFI_VENDOR_TABLE_FORMAT)
-
-
-
[docs]class EFI_VENDOR_TABLE(namedtuple('EFI_VENDOR_TABLE', 'VendorGuidData VendorTable')):
-    __slots__ = ()
-
-
[docs]    def VendorGuid(self) -> str:
-        return EFI_GUID_STR(self.VendorGuidData)

-
-
-
[docs]class EFI_CONFIGURATION_TABLE:
-    def __init__(self):
-        self.VendorTables = {}
-
-    def __str__(self) -> str:
-        vendor_table_str = ''.join([f'{{{vt}}} : 0x{self.VendorTables[vt]:016X}\n' for vt in self.VendorTables])
-        return f'Vendor Tables:\n{vendor_table_str}'

-
-
-# #################################################################################################
-# EFI DXE Services Table
-# #################################################################################################
-#
-# \MdePkg\Include\Pi\PiDxeCis.h
-# -----------------------------
-#
-EFI_DXE_SERVICES_TABLE_SIGNATURE = 'DXE_SERV'  # 0x565245535f455844
-EFI_DXE_SERVICES_TABLE_FMT = '=17Q'
-
-
-
[docs]class EFI_DXE_SERVICES_TABLE(namedtuple('EFI_DXE_SERVICES_TABLE', 'AddMemorySpace AllocateMemorySpace FreeMemorySpace RemoveMemorySpace GetMemorySpaceDescriptor SetMemorySpaceAttributes GetMemorySpaceMap AddIoSpace AllocateIoSpace FreeIoSpace RemoveIoSpace GetIoSpaceDescriptor GetIoSpaceMap Dispatch Schedule Trust ProcessFirmwareVolume')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""DXE Services:
-  AddMemorySpace          : 0x{self.AddMemorySpace:016X}
-  AllocateMemorySpace     : 0x{self.AllocateMemorySpace:016X}
-  FreeMemorySpace         : 0x{self.FreeMemorySpace:016X}
-  RemoveMemorySpace       : 0x{self.RemoveMemorySpace:016X}
-  GetMemorySpaceDescriptor: 0x{self.GetMemorySpaceDescriptor:016X}
-  SetMemorySpaceAttributes: 0x{self.SetMemorySpaceAttributes:016X}
-  GetMemorySpaceMap       : 0x{self.GetMemorySpaceMap:016X}
-  AddIoSpace              : 0x{self.AddIoSpace:016X}
-  AllocateIoSpace         : 0x{self.AllocateIoSpace:016X}
-  FreeIoSpace             : 0x{self.FreeIoSpace:016X}
-  RemoveIoSpace           : 0x{self.RemoveIoSpace:016X}
-  GetIoSpaceDescriptor    : 0x{self.GetIoSpaceDescriptor:016X}
-  GetIoSpaceMap           : 0x{self.GetIoSpaceMap:016X}
-  Dispatch                : 0x{self.Dispatch:016X}
-  Schedule                : 0x{self.Schedule:016X}
-  Trust                   : 0x{self.Trust:016X}
-  ProcessFirmwareVolume   : 0x{self.ProcessFirmwareVolume:016X}
-"""

-
-
-# #################################################################################################
-# EFI PEI Services Table
-# #################################################################################################
-EFI_FRAMEWORK_PEI_SERVICES_TABLE_SIGNATURE = 0x5652455320494550
-FRAMEWORK_PEI_SPECIFICATION_MAJOR_REVISION = 0
-FRAMEWORK_PEI_SPECIFICATION_MINOR_REVISION = 91
-FRAMEWORK_PEI_SERVICES_REVISION = ((FRAMEWORK_PEI_SPECIFICATION_MAJOR_REVISION << 16) | (FRAMEWORK_PEI_SPECIFICATION_MINOR_REVISION))
-
-# #################################################################################################
-# EFI System Management System Table
-# #################################################################################################
-
-EFI_SMM_SYSTEM_TABLE_SIGNATURE = 'SMST'
-EFI_SMM_SYSTEM_TABLE_REVISION = (0 << 16) | (0x09)
-
-
-EFI_TABLES: Dict[str, Dict[str, Any]] = {
-    EFI_SYSTEM_TABLE_SIGNATURE: {'name': 'EFI System Table', 'struct': EFI_SYSTEM_TABLE, 'fmt': EFI_SYSTEM_TABLE_FMT},
-    EFI_RUNTIME_SERVICES_SIGNATURE: {'name': 'EFI Runtime Services Table', 'struct': EFI_RUNTIME_SERVICES_TABLE, 'fmt': EFI_RUNTIME_SERVICES_TABLE_FMT},
-    EFI_BOOT_SERVICES_SIGNATURE: {'name': 'EFI Boot Services Table', 'struct': EFI_BOOT_SERVICES_TABLE, 'fmt': EFI_BOOT_SERVICES_TABLE_FMT},
-    EFI_DXE_SERVICES_TABLE_SIGNATURE: {'name': 'EFI DXE Services Table', 'struct': EFI_DXE_SERVICES_TABLE, 'fmt': EFI_DXE_SERVICES_TABLE_FMT}
-    # EFI_FRAMEWORK_PEI_SERVICES_TABLE_SIGNATURE : {'name' : 'EFI Framework PEI Services Table', 'struct' : EFI_FRAMEWORK_PEI_SERVICES_TABLE, 'fmt' : EFI_FRAMEWORK_PEI_SERVICES_TABLE_FMT },
-    # EFI_SMM_SYSTEM_TABLE_SIGNATURE             : {'name' : 'EFI SMM System Table',             'struct' : EFI_SMM_SYSTEM_TABLE,             'fmt' : EFI_SMM_SYSTEM_TABLE_FMT             },
-    # EFI_CONFIG_TABLE_SIGNATURE                 : {'name' : 'EFI Configuration Table',          'struct' : EFI_CONFIG_TABLE,                 'fmt' : EFI_CONFIG_TABLE_FMT                 }
-}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/uefi_compression.html b/_modules/chipsec/hal/uefi_compression.html deleted file mode 100644 index d7d2d117..00000000 --- a/_modules/chipsec/hal/uefi_compression.html +++ /dev/null @@ -1,309 +0,0 @@ - - - - - - - - chipsec.hal.uefi_compression — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.uefi_compression

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-
-
-try:
-    import brotli
-    has_brotli = True
-except ImportError:
-    has_brotli = False
-try:
-    import lzma
-    has_lzma = True
-except ImportError:
-    has_lzma = False
-try:
-    import EfiCompressor
-    has_eficomp = True
-except ImportError:
-    has_eficomp = False
-
-from typing import List, Any
-from chipsec.logger import logger
-
-#
-# Compression Types
-#
-COMPRESSION_TYPE_NONE = 0
-COMPRESSION_TYPE_TIANO = 1
-COMPRESSION_TYPE_UEFI = 2
-COMPRESSION_TYPE_LZMA = 3
-COMPRESSION_TYPE_BROTLI = 4
-COMPRESSION_TYPE_EFI_STANDARD = 5
-COMPRESSION_TYPE_UNKNOWN = 6
-COMPRESSION_TYPE_LZMAF86 = 7
-COMPRESSION_TYPES_ALGORITHMS: List[int] = [COMPRESSION_TYPE_LZMA,
-                                           COMPRESSION_TYPE_TIANO,
-                                           COMPRESSION_TYPE_UEFI,
-                                           COMPRESSION_TYPE_BROTLI,
-                                           COMPRESSION_TYPE_LZMAF86,
-                                           COMPRESSION_TYPE_NONE, ]
-COMPRESSION_TYPES: List[int] = [COMPRESSION_TYPE_NONE,
-                                COMPRESSION_TYPE_TIANO,
-                                COMPRESSION_TYPE_UEFI,
-                                COMPRESSION_TYPE_LZMA,
-                                COMPRESSION_TYPE_BROTLI,
-                                COMPRESSION_TYPE_EFI_STANDARD,
-                                COMPRESSION_TYPE_UNKNOWN,
-                                COMPRESSION_TYPE_LZMAF86, ]
-
-
-
[docs]class UEFICompression:
-    decompression_oder_type1: List[int] = [COMPRESSION_TYPE_TIANO, COMPRESSION_TYPE_UEFI]
-    decompression_oder_type2: List[int] = [COMPRESSION_TYPE_TIANO,
-                                           COMPRESSION_TYPE_UEFI,
-                                           COMPRESSION_TYPE_LZMA,
-                                           COMPRESSION_TYPE_BROTLI, ]
-
-    def __init__(self):
-        pass
-
-
[docs]    def rotate_list(self, rot_list: List[Any], n: int) -> List[Any]:
-        return rot_list[n:] + rot_list[:n]

-
-
[docs]    def decompress_EFI_binary(self, compressed_data: bytes, compression_type: int) -> bytes:
-        if compression_type in COMPRESSION_TYPES:
-            if compression_type == COMPRESSION_TYPE_UNKNOWN:
-                data = self.unknown_decompress(compressed_data)
-            elif compression_type == COMPRESSION_TYPE_EFI_STANDARD:
-                data = self.unknown_efi_decompress(compressed_data)
-            elif compression_type == COMPRESSION_TYPE_NONE:
-                data = compressed_data
-            elif compression_type == COMPRESSION_TYPE_TIANO and has_eficomp:
-                try:
-                    data = EfiCompressor.TianoDecompress(compressed_data)
-                except Exception:
-                    data = b''
-            elif compression_type == COMPRESSION_TYPE_UEFI and has_eficomp:
-                try:
-                    data = EfiCompressor.UefiDecompress(compressed_data)
-                except Exception:
-                    data = b''
-            elif compression_type in [COMPRESSION_TYPE_LZMA, COMPRESSION_TYPE_LZMAF86] and has_lzma:
-                try:
-                    data = lzma.decompress(compressed_data)
-                except lzma.LZMAError:
-                    # lzma may not be able to decompress
-                    # https://github.com/python/cpython/issues/92018
-                    # suggested workaround is to change the size within the header
-                    try:
-                        buf = compressed_data[:5] + b'\xFF' * 8 + compressed_data[13:]
-                        data = lzma.decompress(buf)
-                    except lzma.LZMAError:
-                        data = b''
-                if compression_type == COMPRESSION_TYPE_LZMAF86:
-                    try:
-                        data = EfiCompressor.LZMAf86Decompress(data)
-                    except Exception as msg:
-                        data = b''
-            elif compression_type == COMPRESSION_TYPE_BROTLI and has_brotli:
-                try:
-                    data = brotli.decompress(compressed_data)
-                except brotli.error:
-                    data = b''
-            else:
-                data = b''
-            if not data:
-                logger().log_hal(f'Cannot decompress data with {compression_type}')
-        else:
-            logger().log_error(f'Unknown EFI compression type 0x{compression_type:X}')
-            data = b''
-        return data

-
-
[docs]    def unknown_decompress(self, compressed_data: bytes) -> bytes:
-        res = b''
-        failed_times = 0
-        for CompressionType in self.decompression_oder_type2:
-            res = self.decompress_EFI_binary(compressed_data, CompressionType)
-            if res:
-                self.rotate_list(self.decompression_oder_type2, failed_times)
-                break
-            else:
-                failed_times += 1
-        return res

-
-
[docs]    def unknown_efi_decompress(self, compressed_data: bytes) -> bytes:
-        res = b''
-        failed_times = 0
-        for CompressionType in self.decompression_oder_type1:
-            res = self.decompress_EFI_binary(compressed_data, CompressionType)
-            if res:
-                self.rotate_list(self.decompression_oder_type1, failed_times)
-                break
-            else:
-                failed_times += 1
-        return res

-
-
[docs]    def compress_EFI_binary(self, uncompressed_data: bytes, compression_type: int) -> bytes:
-        if compression_type in COMPRESSION_TYPES:
-            if compression_type == COMPRESSION_TYPE_NONE:
-                data = uncompressed_data
-            elif compression_type == COMPRESSION_TYPE_TIANO:
-                try:
-                    data = EfiCompressor.TianoCompress(uncompressed_data)
-                except Exception:
-                    data = b''
-            elif compression_type == COMPRESSION_TYPE_UEFI:
-                try:
-                    data = EfiCompressor.UefiCompress(uncompressed_data)
-                except Exception:
-                    data = b''
-            elif compression_type in [COMPRESSION_TYPE_LZMA, COMPRESSION_TYPE_LZMAF86]:
-                if compression_type == COMPRESSION_TYPE_LZMAF86:
-                    uncompressed_data = EfiCompressor.LZMAf86Compress(uncompressed_data)
-                try:
-                    data = lzma.compress(uncompressed_data)
-                except lzma.LZMAError:
-                    data = b''
-            elif compression_type == COMPRESSION_TYPE_BROTLI:
-                try:
-                    data = brotli.compress(uncompressed_data)
-                except brotli.error:
-                    data = b''
-            else:
-                data = b''
-        else:
-            logger().log_error(f'Unknown EFI compression type 0x{compression_type:X}')
-            data = b''
-        return data

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/uefi_fv.html b/_modules/chipsec/hal/uefi_fv.html deleted file mode 100644 index f395e7d9..00000000 --- a/_modules/chipsec/hal/uefi_fv.html +++ /dev/null @@ -1,658 +0,0 @@ - - - - - - - - chipsec.hal.uefi_fv — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.uefi_fv

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2020-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-UEFI Firmware Volume Parsing/Modification Functionality
-"""
-
-import hashlib
-import struct
-from typing import Optional, Tuple
-from uuid import UUID
-from chipsec.defines import bytestostring
-from chipsec.hal.uefi_common import get_3b_size, bit_set, align
-from chipsec.logger import logger
-
-################################################################################################
-#
-# EFI Firmware Volume Defines
-#
-################################################################################################
-
-FFS_ATTRIB_LARGE_FILE = 0x01
-FFS_ATTRIB_FIXED = 0x04
-FFS_ATTRIB_DATA_ALIGNMENT = 0x38
-FFS_ATTRIB_CHECKSUM = 0x40
-
-EFI_FILE_HEADER_CONSTRUCTION = 0x01
-EFI_FILE_HEADER_VALID = 0x02
-EFI_FILE_DATA_VALID = 0x04
-EFI_FILE_MARKED_FOR_UPDATE = 0x08
-EFI_FILE_DELETED = 0x10
-EFI_FILE_HEADER_INVALID = 0x20
-
-FFS_FIXED_CHECKSUM = 0xAA
-
-EFI_FVB2_ERASE_POLARITY = 0x00000800
-
-EFI_FV_FILETYPE_ALL = 0x00
-EFI_FV_FILETYPE_RAW = 0x01
-EFI_FV_FILETYPE_FREEFORM = 0x02
-EFI_FV_FILETYPE_SECURITY_CORE = 0x03
-EFI_FV_FILETYPE_PEI_CORE = 0x04
-EFI_FV_FILETYPE_DXE_CORE = 0x05
-EFI_FV_FILETYPE_PEIM = 0x06
-EFI_FV_FILETYPE_DRIVER = 0x07
-EFI_FV_FILETYPE_COMBINED_PEIM_DRIVER = 0x08
-EFI_FV_FILETYPE_APPLICATION = 0x09
-EFI_FV_FILETYPE_MM = 0x0a
-EFI_FV_FILETYPE_FIRMWARE_VOLUME_IMAGE = 0x0b
-EFI_FV_FILETYPE_COMBINED_MM_DXE = 0x0c
-EFI_FV_FILETYPE_MM_CORE = 0x0d
-EFI_FV_FILETYPE_MM_STANDALONE = 0x0e
-EFI_FV_FILETYPE_MM_CORE_STANDALONE = 0x0f
-EFI_FV_FILETYPE_FFS_PAD = 0xf0
-
-FILE_TYPE_NAMES = {
-    0x00: 'FV_ALL',
-    0x01: 'FV_RAW',
-    0x02: 'FV_FREEFORM',
-    0x03: 'FV_SECURITY_CORE',
-    0x04: 'FV_PEI_CORE',
-    0x05: 'FV_DXE_CORE',
-    0x06: 'FV_PEIM',
-    0x07: 'FV_DRIVER',
-    0x08: 'FV_COMBINED_PEIM_DRIVER',
-    0x09: 'FV_APPLICATION',
-    0x0A: 'FV_MM',
-    0x0B: 'FV_FVIMAGE',
-    0x0C: 'FV_COMBINED_MM_DXE',
-    0x0D: 'FV_MM_CORE',
-    0x0E: 'FV_MM_STANDALONE',
-    0x0F: 'FV_MM_CORE_STANDALONE',
-    0xF0: 'FV_FFS_PAD'
-}
-
-EFI_SECTION_ALL = 0x00
-EFI_SECTION_COMPRESSION = 0x01
-EFI_SECTION_GUID_DEFINED = 0x02
-EFI_SECTION_PE32 = 0x10
-EFI_SECTION_PIC = 0x11
-EFI_SECTION_TE = 0x12
-EFI_SECTION_DXE_DEPEX = 0x13
-EFI_SECTION_VERSION = 0x14
-EFI_SECTION_USER_INTERFACE = 0x15
-EFI_SECTION_COMPATIBILITY16 = 0x16
-EFI_SECTION_FIRMWARE_VOLUME_IMAGE = 0x17
-EFI_SECTION_FREEFORM_SUBTYPE_GUID = 0x18
-EFI_SECTION_RAW = 0x19
-EFI_SECTION_PEI_DEPEX = 0x1B
-EFI_SECTION_MM_DEPEX = 0x1C
-
-SECTION_NAMES = {
-    0x00: 'S_ALL',
-    0x01: 'S_COMPRESSION',
-    0x02: 'S_GUID_DEFINED',
-    0x10: 'S_PE32',
-    0x11: 'S_PIC',
-    0x12: 'S_TE',
-    0x13: 'S_DXE_DEPEX',
-    0x14: 'S_VERSION',
-    0x15: 'S_USER_INTERFACE',
-    0x16: 'S_COMPATIBILITY16',
-    0x17: 'S_FV_IMAGE',
-    0x18: 'S_FREEFORM_SUBTYPE_GUID',
-    0x19: 'S_RAW',
-    0x1B: 'S_PEI_DEPEX',
-    0x1C: 'S_MM_DEPEX'
-}
-
-EFI_SECTIONS_EXE = [EFI_SECTION_PE32, EFI_SECTION_TE, EFI_SECTION_PIC, EFI_SECTION_COMPATIBILITY16]
-
-EFI_FIRMWARE_VOLUME_HEADER = "<16s16sQIIHHHBB"
-EFI_FIRMWARE_VOLUME_HEADER_size = struct.calcsize(EFI_FIRMWARE_VOLUME_HEADER)
-EFI_FV_BLOCK_MAP_ENTRY = "<II"
-EFI_FFS_FILE_HEADER = "<16sHBB3sB"
-EFI_FFS_FILE_HEADER2 = "<16sHBB3sBQ"
-EFI_COMMON_SECTION_HEADER = "<3sB"
-EFI_COMPRESSION_SECTION = "<IB"
-EFI_COMPRESSION_SECTION_size = struct.calcsize(EFI_COMPRESSION_SECTION)
-EFI_GUID_DEFINED_SECTION = "<16sHH"
-EFI_GUID_DEFINED_SECTION_size = struct.calcsize(EFI_GUID_DEFINED_SECTION)
-
-WIN_CERTIFICATE = "<IHH16s"
-WIN_CERTIFICATE_size = struct.calcsize(WIN_CERTIFICATE)
-
-WIN_CERT_TYPE_EFI_GUID = 0x0EF1
-
-EFI_CRC32_GUIDED_SECTION_EXTRACTION_PROTOCOL_GUID = UUID("FC1BCDB0-7D31-49AA-936A-A4600D9DD083")
-EFI_CERT_TYPE_RSA_2048_SHA256_GUID = UUID("A7717414-C616-4977-9420-844712A735BF")
-EFI_CERT_TYPE_RSA_2048_SHA256_GUID_size = struct.calcsize("16s256s256s")
-EFI_FIRMWARE_CONTENTS_SIGNED_GUID = UUID("0F9D89E8-9259-4F76-A5AF-0C89E34023DF")
-EFI_FIRMWARE_FILE_SYSTEM_GUID = UUID("7A9354D9-0468-444A-81CE-0BF617D890DF")
-EFI_FIRMWARE_FILE_SYSTEM2_GUID = UUID("8C8CE578-8A3D-4F1C-9935-896185C32DD3")
-EFI_FIRMWARE_FILE_SYSTEM3_GUID = UUID("5473C07A-3DCB-4DCA-BD6F-1E9689E7349A")
-
-EFI_FS_GUIDS = [EFI_FIRMWARE_FILE_SYSTEM3_GUID, EFI_FIRMWARE_FILE_SYSTEM2_GUID, EFI_FIRMWARE_FILE_SYSTEM_GUID]
-
-LZMAF86_DECOMPRESS_GUID = UUID('D42AE6BD-1352-4BFB-909A-CA72A6EAE889')
-LZMA_CUSTOM_DECOMPRESS_GUID = UUID("EE4E5898-3914-4259-9D6E-DC7BD79403CF")
-TIANO_DECOMPRESSED_GUID = UUID("A31280AD-481E-41B6-95E8-127F4C984779")
-
-FIRMWARE_VOLUME_GUID = UUID("24400798-3807-4A42-B413-A1ECEE205DD8")
-VOLUME_SECTION_GUID = UUID("367AE684-335D-4671-A16D-899DBFEA6B88")
-EFI_FFS_VOLUME_TOP_FILE_GUID = UUID("1BA0062E-C779-4582-8566-336AE8F78F09")
-
-DEF_INDENT = "    "
-
-
-
[docs]class EFI_MODULE:
-    def __init__(self, Offset: int, Guid: Optional[UUID], HeaderSize: int, Attributes: int, Image: bytes):
-        self.Offset = Offset
-        self.Guid = Guid
-        self.HeaderSize = HeaderSize
-        self.Attributes = Attributes
-        self.Image = Image
-        self.ui_string = ''
-        self.isNVRAM = False
-        self.NVRAMType = ''
-
-        self.indent = ''
-
-        self.MD5 = None
-        self.SHA1 = None
-        self.SHA256 = None
-
-        # a list of children EFI_MODULE nodes to build the EFI_MODULE object model
-        self.children = []
-
-
[docs]    def name(self) -> str:
-        _name = type(self).__name__.encode('ascii', 'ignore')
-        _guid = str(self.Guid).upper()
-        _ui_str = self.ui_string.encode('ascii', 'ignore') if self.ui_string else ''
-        return f'{_name} {{{_guid}}} {_ui_str}'

-
-    def __str__(self) -> str:
-        _ind = self.indent + DEF_INDENT
-        _s = ''
-        if self.MD5:
-            _s = f'\n{_ind}MD5   : {self.MD5}'
-        if self.SHA1:
-            _s += f'\n{_ind}SHA1  : {self.SHA1}'
-        if self.SHA256:
-            _s += f'\n{_ind}SHA256: {self.SHA256}'
-        return bytestostring(_s)
-
-
[docs]    def calc_hashes(self, off: int = 0) -> None:
-        if self.Image is None:
-            return
-        hmd5 = hashlib.md5()
-        hmd5.update(self.Image[off:])
-        self.MD5 = hmd5.hexdigest()
-        hsha1 = hashlib.sha1()
-        hsha1.update(self.Image[off:])
-        self.SHA1 = hsha1.hexdigest()
-        hsha256 = hashlib.sha256()
-        hsha256.update(self.Image[off:])
-        self.SHA256 = hsha256.hexdigest()

-
-
-
[docs]class EFI_FV(EFI_MODULE):
-    def __init__(self, Offset: int, Guid: UUID, Size: int, Attributes: int, HeaderSize: int, Checksum: int, ExtHeaderOffset: int, Image: bytes, CalcSum: int):
-        super(EFI_FV, self).__init__(Offset, Guid, HeaderSize, Attributes, Image)
-        self.Size = Size
-        self.Checksum = Checksum
-        self.ExtHeaderOffset = ExtHeaderOffset
-        self.CalcSum = CalcSum
-
-    def __str__(self) -> str:
-        schecksum = f'{self.Checksum:04X}h ({self.CalcSum:04X}h) *** checksum mismatch ***' if self.CalcSum != self.Checksum else f'{self.Checksum:04X}h'
-        _s = f'\n{self.indent}{type(self).__name__} +{self.Offset:08X}h {{{self.Guid}}}: '
-        _s += f"Size {self.Size:08X}h, Attr {self.Attributes:08X}h, HdrSize {self.HeaderSize:04X}h, ExtHdrOffset {self.ExtHeaderOffset:08X}h, Checksum {schecksum}"
-        _s += super(EFI_FV, self).__str__()
-        return bytestostring(_s)

-
-
-
[docs]class EFI_FILE(EFI_MODULE):
-    def __init__(self, Offset: int, Guid: UUID, Type: int, Attributes: int, State: int, Checksum: int, Size: int, Image: bytes, HeaderSize: int, UD: bool, CalcSum: int):
-        super(EFI_FILE, self).__init__(Offset, Guid, HeaderSize, Attributes, Image)
-        self.Name = Guid
-        self.Type = Type
-        self.State = State
-        self.Size = Size
-        self.Checksum = Checksum
-        self.UD = UD
-        self.CalcSum = CalcSum
-
-    def __str__(self) -> str:
-        schecksum = f'{self.Checksum:04X}h ({self.CalcSum:04X}h) *** checksum mismatch ***' if self.CalcSum != self.Checksum else f'{self.Checksum:04X}h'
-        _s = f'\n{self.indent}+{self.Offset:08X}h {self.name()}\n{self.indent}Type {self.Type:02X}h, Attr {self.Attributes:08X}h, State {self.State:02X}h, Size {self.Size:06X}h, Checksum {schecksum}'
-        _s += (super(EFI_FILE, self).__str__() + '\n')
-        return bytestostring(_s)

-
-
-
[docs]class EFI_SECTION(EFI_MODULE):
-    def __init__(self, Offset: int, Name: str, Type: int, Image: bytes, HeaderSize: int, Size: int):
-        super(EFI_SECTION, self).__init__(Offset, None, HeaderSize, 0, Image)
-        self.Name = Name
-        self.Type = Type
-        self.DataOffset = 0
-        self.Comments = ''
-        self.Size = Size
-
-        # parent GUID used in search, export to JSON/log
-        self.parentGuid = None
-
-
[docs]    def name(self) -> str:
-        _name = self.Name.encode('ascii', 'ignore')
-        _guid = self.parentGuid
-        _ui_str = self.ui_string.encode('ascii', 'ignore') if self.ui_string else ''
-        return f'{_name} section of binary {{{_guid}}} {_ui_str}'

-
-    def __str__(self) -> str:
-        _s = f'{self.indent}+{self.Offset:08X}h {self.name()}: Type {self.Type:02X}h'
-        if self.Guid:
-            _s += f' GUID {{{self.Guid}}}'
-        if self.Attributes:
-            _s += f' Attr {self.Attributes:04X}h'
-        if self.DataOffset:
-            _s += f' DataOffset {self.DataOffset:04X}h'
-        if self.Comments:
-            _s += f' Comments {self.Comments}'
-        _s += super(EFI_SECTION, self).__str__()
-        return bytestostring(_s)

-
-
-
[docs]def FvSum8(buffer: bytes) -> int:
-    sum8 = 0
-    for b in bytestostring(buffer):
-        sum8 = (sum8 + ord(b)) & 0xff
-    return sum8

-
-
-
[docs]def FvChecksum8(buffer: bytes) -> int:
-    return ((0x100 - FvSum8(buffer)) & 0xff)

-
-
-
[docs]def FvSum16(buffer: bytes) -> int:
-    sum16 = 0
-    buffer_str = bytestostring(buffer)
-    blen = len(buffer) // 2
-    i = 0
-    while i < blen:
-        el16 = ord(buffer_str[2 * i]) | (ord(buffer_str[2 * i + 1]) << 8)
-        sum16 = (sum16 + el16) & 0xffff
-        i = i + 1
-    return sum16

-
-
-
[docs]def FvChecksum16(buffer: bytes) -> int:
-    return ((0x10000 - FvSum16(buffer)) & 0xffff)

-
-
-
[docs]def ValidateFwVolumeHeader(ZeroVector: str, FsGuid: UUID, FvLength: int, HeaderLength: int, ExtHeaderOffset: int, Reserved: int, size: int, Calcsum: int, Checksum: int) -> bool:
-    fv_rsvd = (Reserved == 0)
-    fv_len = (FvLength <= size)
-    fv_header_len = (ExtHeaderOffset < FvLength) and (HeaderLength < FvLength)
-    if Checksum != Calcsum:
-        logger().log_warning(f'Firmware Volume {{{FsGuid}}} checksum does not match calculated checksum')
-    return fv_rsvd and fv_len and fv_header_len

-
-
-
[docs]def NextFwVolume(buffer: bytes, off: int = 0, last_fv_size: int = 0) -> Optional[EFI_FV]:
-    fof = off if last_fv_size == 0 else off + max(last_fv_size, EFI_FIRMWARE_VOLUME_HEADER_size)
-    size = len(buffer)
-    while ((fof + EFI_FIRMWARE_VOLUME_HEADER_size) < size):
-        fof = bytestostring(buffer).find("_FVH", fof)
-        if fof == -1 or size - fof < EFI_FIRMWARE_VOLUME_HEADER_size:
-            break
-        elif fof < 0x28:
-            # continue searching for signature if header is not valid
-            fof += 0x4
-            continue
-        fof = fof - 0x28
-        ZeroVector, FileSystemGuid0, \
-            FvLength, Signature, Attributes, HeaderLength, Checksum, ExtHeaderOffset,    \
-            Reserved, Revision = struct.unpack(EFI_FIRMWARE_VOLUME_HEADER, buffer[fof:fof + EFI_FIRMWARE_VOLUME_HEADER_size])
-        fvh = struct.pack(EFI_FIRMWARE_VOLUME_HEADER, ZeroVector,
-                          FileSystemGuid0,
-                          FvLength, Signature, Attributes, HeaderLength, 0, ExtHeaderOffset,
-                          Reserved, Revision)
-        if (len(fvh) < HeaderLength):
-            tail = buffer[fof + len(fvh):fof + HeaderLength]
-            fvh = fvh + tail
-        CalcSum = FvChecksum16(fvh)
-        FsGuid = UUID(bytes_le=FileSystemGuid0)
-        if (ValidateFwVolumeHeader(ZeroVector, FsGuid, FvLength, HeaderLength, ExtHeaderOffset, Reserved, size, CalcSum, Checksum)):
-            return EFI_FV(fof, FsGuid, FvLength, Attributes, HeaderLength, Checksum, ExtHeaderOffset, buffer[fof:fof + FvLength], CalcSum)
-        else:
-            fof += 0x2C
-    return None

-
-
-
[docs]def GetFvHeader(buffer: bytes, off: int = 0) -> Tuple[int, int, int]:
-    EFI_FV_BLOCK_MAP_ENTRY_SZ = struct.calcsize(EFI_FV_BLOCK_MAP_ENTRY)
-    header_size = EFI_FIRMWARE_VOLUME_HEADER_size + struct.calcsize(EFI_FV_BLOCK_MAP_ENTRY)
-    if (len(buffer) < header_size):
-        return (0, 0, 0)
-    size = 0
-    fof = off + EFI_FIRMWARE_VOLUME_HEADER_size
-    ZeroVector, FileSystemGuid0, \
-        FvLength, _, Attributes, HeaderLength, Checksum, ExtHeaderOffset,    \
-        Reserved, Revision = struct.unpack(EFI_FIRMWARE_VOLUME_HEADER, buffer[off:off + EFI_FIRMWARE_VOLUME_HEADER_size])
-    numblocks, lenblock = struct.unpack(EFI_FV_BLOCK_MAP_ENTRY, buffer[fof:fof + struct.calcsize(EFI_FV_BLOCK_MAP_ENTRY)])
-    fv_header_str = f'''
-    \nFV volume offset: 0x{fof:08X}
-    \tFvLength:         0x{FvLength:08X}
-    \tAttributes:       0x{Attributes:08X}
-    \tHeaderLength:     0x{HeaderLength:04X}
-    \tChecksum:         0x{Checksum:04X}
-    \tRevision:         0x{Revision:02X}
-    \tExtHeaderOffset:  0x{ExtHeaderOffset:02X}
-    \tReserved:         0x{Reserved:02X}
-    FFS Guid:    {UUID(bytes_le=FileSystemGuid0)}
-    '''
-    logger().log_hal(fv_header_str)
-
-    while not (numblocks == 0 and lenblock == 0):
-        fof += EFI_FV_BLOCK_MAP_ENTRY_SZ
-        if (fof + EFI_FV_BLOCK_MAP_ENTRY_SZ) >= len(buffer):
-            return (0, 0, 0)
-        if numblocks != 0:
-            logger().log_hal(f'Num blocks:   0x{numblocks:08X}\n')
-            logger().log_hal(f'block Len:    0x{lenblock:08X}\n')
-            size = size + (numblocks * lenblock)
-        numblocks, lenblock = struct.unpack(EFI_FV_BLOCK_MAP_ENTRY, buffer[fof:fof + EFI_FV_BLOCK_MAP_ENTRY_SZ])
-    if FvLength != size:
-        logger().log("ERROR: Volume Size not consistent with Block Maps")
-        return (0, 0, 0)
-    if size >= 0x40000000 or size == 0:
-        logger().log("ERROR: Volume is corrupted")
-        return (0, 0, 0)
-    return (size, HeaderLength, Attributes)

-
-
-
[docs]def NextFwFile(FvImage: bytes, FvLength: int, fof: int, polarity: bool) -> Optional[EFI_FILE]:
-    file_header_size = struct.calcsize(EFI_FFS_FILE_HEADER)
-    fof = align(fof, 8)
-    cur_offset = fof
-    res = None
-    update_or_deleted = False
-
-    while cur_offset + file_header_size < min(FvLength, len(FvImage)):
-        fsize = 0
-    # if (fof + file_header_size) <= min(FvLength, len(FvImage)):
-        # Check for a blank header
-        if polarity:
-            blank = b"\xff" * file_header_size
-        else:
-            blank = b"\x00" * file_header_size
-
-        if (blank == FvImage[cur_offset:cur_offset + file_header_size]):
-            #next_offset = fof + 8
-            cur_offset += 8
-            continue
-        Name0, IntegrityCheck, Type, Attributes, Size, State = struct.unpack(EFI_FFS_FILE_HEADER, FvImage[cur_offset:cur_offset + file_header_size])
-        # Get File Header Size
-        if Attributes & FFS_ATTRIB_LARGE_FILE:
-            header_size = struct.calcsize(EFI_FFS_FILE_HEADER2)
-        else:
-            header_size = struct.calcsize(EFI_FFS_FILE_HEADER)
-
-        # Get File size
-        if Attributes & FFS_ATTRIB_LARGE_FILE and len(FvImage) > fof + struct.calcsize(EFI_FFS_FILE_HEADER2):
-            fsize = struct.unpack("Q", FvImage[fof + file_header_size:fof + file_header_size + struct.calcsize("Q")])[0]
-            fsize &= 0xFFFFFFFF
-        if fsize == 0 or fsize > FvLength - cur_offset:
-            fsize = get_3b_size(Size)
-
-        # Validate fsize is a legal value
-        if fsize == 0 or fsize > FvLength - cur_offset:
-            logger().log("Unable to get correct file size for NextFwFile corrupt header information")
-            break
-        # Get next_offset
-        update_or_deleted = (bit_set(State, EFI_FILE_MARKED_FOR_UPDATE, polarity)) or (bit_set(State, EFI_FILE_DELETED, polarity))
-        if not((bit_set(State, EFI_FILE_DATA_VALID, polarity)) or update_or_deleted):
-            # else:
-            cur_offset = align(cur_offset + 1, 8)
-            continue
-        Name = UUID(bytes_le=Name0)
-        # TODO need to fix up checksum?
-        fheader = struct.pack(EFI_FFS_FILE_HEADER, Name0, 0, Type, Attributes, Size, 0)
-        hsum = FvChecksum8(fheader)
-        if (Attributes & FFS_ATTRIB_CHECKSUM):
-            fsum = FvChecksum8(FvImage[cur_offset + file_header_size:cur_offset + fsize])
-        else:
-            fsum = FFS_FIXED_CHECKSUM
-        CalcSum = (hsum | (fsum << 8))
-        _image = FvImage[cur_offset:cur_offset + fsize]
-        res = EFI_FILE(cur_offset, Name, Type, Attributes, State, IntegrityCheck, fsize, _image, header_size, update_or_deleted, CalcSum)
-        break
-    return res

-
-
-
[docs]def NextFwFileSection(sections: bytes, ssize: int, sof: int, polarity: bool) -> Optional[EFI_SECTION]:
-    EFI_COMMON_SECTION_HEADER_size = struct.calcsize(EFI_COMMON_SECTION_HEADER)
-    res = None
-    curr_offset = sof
-    ssize = min(ssize, len(sections))
-    while curr_offset + EFI_COMMON_SECTION_HEADER_size < ssize:
-        Size, Type = struct.unpack(EFI_COMMON_SECTION_HEADER, sections[curr_offset:curr_offset + EFI_COMMON_SECTION_HEADER_size])
-        Size = get_3b_size(Size)
-        Header_Size = EFI_COMMON_SECTION_HEADER_size
-        if Size == 0xFFFFFF and (curr_offset + EFI_COMMON_SECTION_HEADER_size + struct.calcsize("I")) < ssize:
-            _start = curr_offset + EFI_COMMON_SECTION_HEADER_size
-            _finish = _start + struct.calcsize("I")
-            Size = struct.unpack("I", sections[_start:_finish])[0]
-            Header_Size = EFI_COMMON_SECTION_HEADER_size + struct.calcsize("I")
-        if Type in SECTION_NAMES.keys():
-            sec_name = SECTION_NAMES[Type]
-        else:
-            sec_name = f'S_UNKNOWN_{Type:02X}'
-        if (Size == 0xffffff and Type == 0xff) or (Size == 0):
-            curr_offset = align(curr_offset + 4, 4)
-            continue
-        sec_body = sections[curr_offset:curr_offset + Size]
-        res = EFI_SECTION(curr_offset, sec_name, Type, sec_body, Header_Size, align(Size, 4))
-        break
-    return res

-
-# #################################################################################################
-#
-# UEFI Firmware Volume Parsing/Modification Functionality
-#
-# #################################################################################################
-
-
-
[docs]def align_image(image: bytes, size: int = 8, fill: bytes = b'\x00') -> bytes:
-    return image.ljust(((len(image) + size - 1) // size) * size, fill)

-
-
-
[docs]def get_guid_bin(guid: UUID) -> bytes:
-    values = str(guid).split('-')
-    if [len(x) for x in values] == [8, 4, 4, 4, 12]:
-        values = values[0:3] + [values[3][0:2], values[3][2:4]] + [values[4][x:x + 2] for x in range(0, 12, 2)]
-        values = [int(x, 16) for x in values]
-        return struct.pack('<LHHBBBBBBBB', *tuple(values))
-    return b''

-
-
-
[docs]def assemble_uefi_file(guid: UUID, image: bytes) -> bytes:
-    EFI_FFS_FILE_HEADER = "<16sHBBL"
-    FileHeaderSize = struct.calcsize(EFI_FFS_FILE_HEADER)
-
-    Type = EFI_FV_FILETYPE_FREEFORM
-    CheckSum = 0x0000
-    Attributes = 0x40
-    Size = FileHeaderSize + len(image)
-    State = 0xF8
-
-    SizeState = (Size & 0x00FFFFFF) | (State << 24)
-    FileHeader = struct.pack(EFI_FFS_FILE_HEADER, get_guid_bin(guid), CheckSum, Type, Attributes, (Size & 0x00FFFFFF))
-
-    hsum = FvChecksum8(FileHeader)
-    if (Attributes & FFS_ATTRIB_CHECKSUM):
-        fsum = FvChecksum8(image)
-    else:
-        fsum = FFS_FIXED_CHECKSUM
-    CheckSum = (hsum | (fsum << 8))
-
-    return struct.pack(EFI_FFS_FILE_HEADER, get_guid_bin(guid), CheckSum, Type, Attributes, SizeState) + image

-
-
-
[docs]def assemble_uefi_section(image: bytes, uncomressed_size: int, compression_type: int) -> bytes:
-    EFI_COMPRESSION_SECTION_HEADER = "<LLB"
-    SectionType = EFI_SECTION_COMPRESSION
-    SectionSize = struct.calcsize(EFI_COMPRESSION_SECTION_HEADER) + len(image)
-    SectionHeader = struct.pack(EFI_COMPRESSION_SECTION_HEADER, (SectionSize & 0x00FFFFFF) | (SectionType << 24), uncomressed_size, compression_type)
-    return SectionHeader + image

-
-
-
[docs]def assemble_uefi_raw(image: bytes) -> bytes:
-    return align_image(struct.pack('<L', ((len(image) + 4) & 0x00FFFFFF) + (EFI_SECTION_RAW << 24)) + image)

-
-
-
[docs]def DecodeSection(SecType, SecBody, SecHeaderSize) -> None:
-    pass

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/uefi_platform.html b/_modules/chipsec/hal/uefi_platform.html deleted file mode 100644 index 0dcf5347..00000000 --- a/_modules/chipsec/hal/uefi_platform.html +++ /dev/null @@ -1,1447 +0,0 @@ - - - - - - - - chipsec.hal.uefi_platform — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.uefi_platform

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Platform specific UEFI functionality (parsing platform specific EFI NVRAM, capsules, etc.)
-"""
-
-import struct
-from collections import namedtuple
-from uuid import UUID
-from typing import Dict, List, Tuple, Optional, Union, Any
-from chipsec import defines
-from chipsec.logger import logger
-from chipsec.hal.uefi_common import bit_set, VARIABLE_SIGNATURE_VSS, S3BootScriptOpcode_MDE, op_io_pci_mem, S3BootScriptOpcode_EdkCompat, EFI_GUID_STR, EFI_GUID_SIZE
-from chipsec.hal.uefi_common import op_stall, op_dispatch, op_terminate, op_mem_poll, op_unknown, get_3b_size, get_nvar_name, op_smbus_execute, script_width_formats
-from chipsec.hal.uefi_common import S3BOOTSCRIPT_ENTRY, MAX_S3_BOOTSCRIPT_ENTRY_LENGTH, VARIABLE_STORE_FV_GUID, IS_VARIABLE_ATTRIBUTE, VARIABLE_DATA
-from chipsec.hal.uefi_common import EFI_VARIABLE_BOOTSERVICE_ACCESS, EFI_VARIABLE_NON_VOLATILE, EFI_VARIABLE_RUNTIME_ACCESS, script_opcodes
-from chipsec.hal.uefi_common import EFI_VARIABLE_HARDWARE_ERROR_RECORD, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
-from chipsec.hal.uefi_fv import NextFwVolume, NextFwFile, EFI_FVB2_ERASE_POLARITY, EFI_FV_FILETYPE_RAW
-
-EfiTableType = Union['EFI_HDR_VSS', 'EFI_HDR_VSS_AUTH', 'EFI_HDR_VSS_APPLE', None]
-EfiVariableType = Tuple[int, bytes, EfiTableType, bytes, str, int]
-
-#
-# List of supported types of EFI NVRAM format (platform/vendor specific)
-#
-
-
-
[docs]class FWType:
-    EFI_FW_TYPE_UEFI = 'uefi'
-    EFI_FW_TYPE_UEFI_AUTH = 'uefi_auth'
-#    EFI_FW_TYPE_WIN       = 'win'      # Windows 8 GetFirmwareEnvironmentVariable format
-    EFI_FW_TYPE_VSS = 'vss'       # NVRAM using format with '$VSS' signature
-    EFI_FW_TYPE_VSS_AUTH = 'vss_auth'  # NVRAM using format with '$VSS' signature with extra fields
-    # See "A Tour Beyond BIOS Implementing UEFI Authenticated
-    # Variables in SMM with EDKII"
-    EFI_FW_TYPE_VSS2 = 'vss2'
-    EFI_FW_TYPE_VSS2_AUTH = 'vss2_auth'
-    EFI_FW_TYPE_VSS_APPLE = 'vss_apple'
-    EFI_FW_TYPE_NVAR = 'nvar'      # 'NVAR' NVRAM format
-    EFI_FW_TYPE_EVSA = 'evsa'      # 'EVSA' NVRAM format

-
-
-fw_types: List[str] = []
-for i in [t for t in dir(FWType) if not callable(getattr(FWType, t))]:
-    if not i.startswith('__'):
-        fw_types.append(getattr(FWType, i))
-
-
-NVRAM_ATTR_RT = 1
-NVRAM_ATTR_DESC_ASCII = 2
-NVRAM_ATTR_GUID = 4
-NVRAM_ATTR_DATA = 8
-NVRAM_ATTR_EXTHDR = 0x10
-NVRAM_ATTR_AUTHWR = 0x40
-NVRAM_ATTR_HER = 0x20
-NVRAM_ATTR_VLD = 0x80
-
-#
-# Known GUIDs of NVRAM stored in EFI firmware volumes, FS files etc. of various firmware implementations
-#
-ADDITIONAL_NV_STORE_GUID = UUID('00504624-8A59-4EEB-BD0F-6B36E96128E0')
-NVAR_NVRAM_FS_FILE = UUID("CEF5B9A3-476D-497F-9FDC-E98143E0422C")
-
-LENOVO_FS1_GUID = UUID("16B45DA2-7D70-4AEA-A58D-760E9ECB841D")
-LENOVO_FS2_GUID = UUID("E360BDBA-C3CE-46BE-8F37-B231E5CB9F35")
-
-EFI_PLATFORM_FS_GUIDS = [LENOVO_FS1_GUID, LENOVO_FS2_GUID]
-EFI_NVRAM_GUIDS = [VARIABLE_STORE_FV_GUID, ADDITIONAL_NV_STORE_GUID, NVAR_NVRAM_FS_FILE]
-
-#
-# This Variable header is defined by UEFI
-#
-
-#
-# Variable Store Status
-#
-# typedef enum {
-#  EfiRaw,
-#  EfiValid,
-#  EfiInvalid,
-#  EfiUnknown
-# } VARIABLE_STORE_STATUS;
-VARIABLE_STORE_STATUS_RAW = 0
-VARIABLE_STORE_STATUS_VALID = 1
-VARIABLE_STORE_STATUS_INVALID = 2
-VARIABLE_STORE_STATUS_UNKNOWN = 3
-
-#
-# Variable State flags
-#
-VAR_IN_DELETED_TRANSITION = 0xfe  # Variable is in obsolete transition
-VAR_DELETED = 0xfd  # Variable is obsolete
-VAR_ADDED = 0x7f  # Variable has been completely added
-
-
[docs]def IS_VARIABLE_STATE(_c: int, _Mask: int) -> bool:
-    return ((((~_c) & 0xFF) & ((~_Mask) & 0xFF)) != 0)

-
-
-#
-# typedef struct {
-#  UINT16    StartId;
-#  UINT8     State;
-#  UINT8     Reserved;
-#  UINT32    Attributes;
-#  UINT32    NameSize;
-#  UINT32    DataSize;
-#  EFI_GUID  VendorGuid;
-# } VARIABLE_HEADER;
-#
-# typedef struct {
-#  UINT32  Data1;
-#  UINT16  Data2;
-#  UINT16  Data3;
-#  UINT8   Data4[8];
-# } EFI_GUID;
-#
-UEFI_VARIABLE_HEADER_SIZE = 28
-
-
-
[docs]class UEFI_VARIABLE_HEADER(namedtuple('UEFI_VARIABLE_HEADER', 'StartId State Reserved Attributes NameSize DataSize VendorGuid0 VendorGuid1 VendorGuid2 VendorGuid3')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-Header (UEFI)
--------------
-StartId    : 0x{self.StartId:04X}
-State      : 0x{self.State:02X}
-Reserved   : 0x{self.Reserved:02X}
-Attributes : 0x{self.Attributes:08X}
-NameSize   : 0x{self.NameSize:08X}
-DataSize   : 0x{self.DataSize:08X}
-VendorGuid : {{0x{self.VendorGuid0:08X}-0x{self.VendorGuid1:04X}-0x{self.VendorGuid2:04X}-0x{self.VendorGuid3:08X}}}
-"""

-
-
-UEFI_VARIABLE_STORE_HEADER = "<16sIBBHI"
-UEFI_VARIABLE_STORE_HEADER_SIZE = struct.calcsize(UEFI_VARIABLE_STORE_HEADER)
-'''
-EFI_VARIABLE_HEADER_AUTH = "<HBBI28sIIIHH8s"
-EFI_VARIABLE_HEADER_AUTH_SIZE = struct.calcsize(EFI_VARIABLE_HEADER_AUTH)
-
-EFI_VARIABLE_HEADER = "<HBBIIIIHH8s"
-EFI_VARIABLE_HEADER_SIZE = struct.calcsize(EFI_VARIABLE_HEADER)
-'''
-VARIABLE_STORE_FORMATTED = 0x5a
-VARIABLE_STORE_HEALTHY = 0xfe
-
-NvStore = Tuple[int, int, None]
-
-def _getNVstore_EFI(nvram_buf: bytes, efi_type: str) -> NvStore:
-    l = (-1, -1, None)
-    FvOffset = 0
-    FvLength = 0
-    fv = NextFwVolume(nvram_buf, FvOffset, FvLength)
-    while True:
-        if (fv is None):
-            break
-        if (fv.Guid == VARIABLE_STORE_FV_GUID):
-            nvram_start = fv.HeaderSize
-            _, _, Format, State, _, _ = struct.unpack(UEFI_VARIABLE_STORE_HEADER, fv.Image[nvram_start:nvram_start + UEFI_VARIABLE_STORE_HEADER_SIZE])
-            if ((Format == VARIABLE_STORE_FORMATTED) and (State == VARIABLE_STORE_HEALTHY)):
-                if (isCorrectVSStype(fv.Image[nvram_start:], efi_type)):
-                    l = (fv.Offset + nvram_start, fv.Size - nvram_start, None)
-                break
-        fv = NextFwVolume(nvram_buf, fv.Offset, fv.Size)
-    return l
-
-
-
[docs]def getNVstore_EFI(nvram_buf: bytes) -> NvStore:
-    return _getNVstore_EFI(nvram_buf, FWType.EFI_FW_TYPE_VSS)

-
-
-
[docs]def getNVstore_EFI_AUTH(nvram_buf: bytes) -> NvStore:
-    return _getNVstore_EFI(nvram_buf, FWType.EFI_FW_TYPE_VSS_AUTH)

-
-
-
[docs]def getEFIvariables_UEFI(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS)

-
-
-
[docs]def getEFIvariables_UEFI_AUTH(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS_AUTH)

-
-
-'''
-def getEFIvariables_UEFI_Ex( nvram_buf, auth = False ):
-    dof = 0
-    length = len(nvram_buf)
-    storen = 0
-    variables = dict()
-    while ((dof+UEFI_VARIABLE_STORE_HEADER_SIZE) < length):
-        store_start = dof
-        StoreGuid0, StoreGuid1, StoreGuid2, StoreGuid03, Size, Format, State, R0, R1 = \
-            struct.unpack(UEFI_VARIABLE_STORE_HEADER, nvram_buf[dof:dof + UEFI_VARIABLE_STORE_HEADER_SIZE])
-        dof = align(dof + UEFI_VARIABLE_STORE_HEADER_SIZE, 4)
-        if ((Format != VARIABLE_STORE_FORMATTED) or (State != VARIABLE_STORE_HEALTHY)):
-            break
-        if ((store_start + Size) >= length): break
-        while ((dof + EFI_VARIABLE_HEADER_SIZE) <= (store_start + Size)):
-            StartId, State, R0, Attributes, Auth, NameSize, DataSize, VendorGuid0, VendorGuid1, VendorGuid2, VendorGuid3 = \
-                struct.unpack(EFI_VARIABLE_HEADER, nvram_buf[dof:dof+EFI_VARIABLE_HEADER_SIZE]);
-            if (StartId != VARIABLE_DATA): break
-            dof += EFI_VARIABLE_HEADER_SIZE
-            if ((State == 0xff) and (DataSize == 0xffffffff) and (NameSize == 0xffffffff) and (Attributes == 0xffffffff)):
-                NameSize = 0
-                DataSize = 0
-                # just skip variable with empty name and data for now
-            else:
-                guid = guid_str(VendorGuid0, VendorGuid1, VendorGuid2, VendorGuid3)
-                Name = nvram_buf[dof:dof+NameSize]
-                NameStr = unicode(Name, "utf-16-le").split('\x00')[0]
-                VarData = nvram_buf[dof+NameSize:dof+NameSize+DataSize]
-                if NameStr not in variables.keys():
-                    variables[NameStr] = []
-                #                          off, buf,  hdr,  data,    guid, attrs
-                variables[NameStr].append((dof, None, None, VarData, guid, Attributes))
-            dof = align(dof+NameSize+DataSize, 4)
-        dof = store_start + Size
-        storen += 1
-    return variables
-'''
-##################################################################################################
-#
-# Platform/Vendor Specific EFI NVRAM Parsing Functions
-#
-# For each platform, EFI NVRAM parsing functionality includes:
-# 1. Function to parse EFI variable within NVRAM binary (func_getefivariables)
-#    May define/use platform specific EFI Variable Header
-#    Function arguments:
-#      In : binary buffer (as a string)
-#      Out:
-#        start           - offset in the buffer to the current EFI variable
-#        next_var_offset - offset in the buffer to the next EFI variable
-#        efi_var_buf     - full EFI variable buffer
-#        efi_var_hdr     - EFI variable header object
-#        efi_var_name    - EFI variable name
-#        efi_var_data    - EFI variable data contents
-#        efi_var_guid    - EFI variable GUID
-#        efi_var_attr    - EFI variable attributes
-# 2. [Optional] Function to find EFI NVRAM within arbitrary binary (func_getnvstore)
-#    If this function is not defined, 'chipsec_util uefi' searches EFI variables from the beginning of the binary
-#    Function arguments:
-#      In : NVRAM binary buffer (as a string)
-#      Out:
-#        start        - offset of NVRAM     (-1 means NVRAM not found)
-#        size         - size of NVRAM       (-1 means NVRAM is entire binary)
-#        nvram_header - NVRAM header object
-#
-##################################################################################################
-
-##################################################################################################
-# NVAR format of NVRAM
-#
-
-
-
[docs]class EFI_HDR_NVAR1(namedtuple('EFI_HDR_NVAR1', 'StartId TotalSize Reserved1 Reserved2 Reserved3 Attributes State')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-Header (NVAR)
-------------
-StartId    : 0x{self.StartId:04X}
-TotalSize  : 0x{self.TotalSize:04X}
-Reserved1  : 0x{self.Reserved1:02X}
-Reserved2  : 0x{self.Reserved2:02X}
-Reserved3  : 0x{self.Reserved3:02X}
-Attributes : 0x{self.Attributes:02X}
-State      : 0x{self.State:02X}
-"""

-
-
-NVAR_EFIvar_signature = b'NVAR'
-
-
-
[docs]def getNVstore_NVAR(nvram_buf: bytes) -> NvStore:
-    l = (-1, -1, None)
-    fv = NextFwVolume(nvram_buf)
-    if (fv is None):
-        return l
-    if (fv.Offset >= len(nvram_buf)):
-        return l
-    if (fv.Offset + fv.Size) > len(nvram_buf):
-        fv.Size = len(nvram_buf) - fv.Offset
-    while fv is not None:
-        polarity = bit_set(fv.Attributes, EFI_FVB2_ERASE_POLARITY)
-        fwbin = NextFwFile(fv.Image, fv.Size, fv.HeaderSize, polarity)
-        while fwbin is not None:
-            if (fwbin.Type == EFI_FV_FILETYPE_RAW) and (fwbin.Guid == NVAR_NVRAM_FS_FILE):
-                l = ((fv.Offset + fwbin.Offset + fwbin.HeaderSize), fwbin.Size - fwbin.HeaderSize, None)
-                if (not fwbin.UD):
-                    return l
-            fwbin = NextFwFile(fv.Image, fv.Size, fwbin.Size + fwbin.Offset, polarity)
-        fv = NextFwVolume(nvram_buf, fv.Offset, fv.Size)
-    return l

-
-
-def _ord(c: Union[str, int]) -> int:
-    return ord(c) if isinstance(c, str) else c
-
-
-
[docs]def getEFIvariables_NVAR(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    name = ''
-    start = nvram_buf.find(NVAR_EFIvar_signature)
-    nvram_size = len(nvram_buf)
-    EFI_HDR_NVAR = "<4sH3sB"
-    nvar_size = struct.calcsize(EFI_HDR_NVAR)
-    variables = dict()
-    nof = 0  # start
-#   EMPTY = 0
-    EMPTY = 0xffffffff
-    while (nof + nvar_size) < nvram_size:
-        start_id, size, next, attributes = struct.unpack(EFI_HDR_NVAR, nvram_buf[nof:nof + nvar_size])
-        if size == 0:
-            break
-        next = get_3b_size(next)
-        valid = (bit_set(attributes, NVRAM_ATTR_VLD) and (not bit_set(attributes, NVRAM_ATTR_DATA)))
-        if not valid:
-            nof = nof + size
-            continue
-        isvar = (start_id == NVAR_EFIvar_signature)
-        if (not isvar) or (size == (EMPTY & 0xffff)):
-            break
-        var_name_off = 1
-        if bit_set(attributes, NVRAM_ATTR_GUID):
-            guid = UUID(bytes_le=nvram_buf[nof + nvar_size: nof + nvar_size + EFI_GUID_SIZE])
-            guid = str(guid).upper()
-            var_name_off = EFI_GUID_SIZE
-        else:
-            guid_idx = _ord(nvram_buf[nof + nvar_size])
-            guid_off = (nvram_size - EFI_GUID_SIZE) - guid_idx * EFI_GUID_SIZE
-            guid = UUID(bytes_le=nvram_buf[guid_off: guid_off + EFI_GUID_SIZE])
-            guid = str(guid).upper()
-        name_size = 0
-        name_offset = nof + nvar_size + var_name_off
-        if not bit_set(attributes, NVRAM_ATTR_DATA):
-            name, name_size = get_nvar_name(nvram_buf, name_offset, bit_set(attributes, NVRAM_ATTR_DESC_ASCII))
-        esize = 0
-        eattrs = 0
-        if bit_set(attributes, NVRAM_ATTR_EXTHDR):
-            esize, = struct.unpack("<H", nvram_buf[nof + size - 2:nof + size])
-            eattrs = _ord(nvram_buf[nof + size - esize])
-        attribs = EFI_VARIABLE_BOOTSERVICE_ACCESS
-        attribs = attribs | EFI_VARIABLE_NON_VOLATILE
-        if bit_set(attributes, NVRAM_ATTR_RT):
-            attribs = attribs | EFI_VARIABLE_RUNTIME_ACCESS
-        if bit_set(attributes, NVRAM_ATTR_HER):
-            attribs = attribs | EFI_VARIABLE_HARDWARE_ERROR_RECORD
-        if bit_set(attributes, NVRAM_ATTR_AUTHWR):
-            if bit_set(eattrs, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS):
-                attribs = attribs | EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS
-            if bit_set(eattrs, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS):
-                attribs = attribs | EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
-        # Get variable data
-        lof = nof
-        lnext = next
-        lattributes = attributes
-        lsize = size
-        lesize = esize
-        while lnext != (0xFFFFFF & EMPTY):
-            lof = lof + lnext
-            lstart_id, lsize, lnext, lattributes = struct.unpack(EFI_HDR_NVAR, nvram_buf[lof:lof + nvar_size])
-            lnext = get_3b_size(lnext)
-        dataof = lof + nvar_size
-        if not bit_set(lattributes, NVRAM_ATTR_DATA):
-            lnameof = 1
-            if bit_set(lattributes, NVRAM_ATTR_GUID):
-                lnameof = EFI_GUID_SIZE
-            name_offset = lof + nvar_size + lnameof
-            name, name_size = get_nvar_name(nvram_buf, name_offset, bit_set(attributes, NVRAM_ATTR_DESC_ASCII))
-            dataof = name_offset + name_size
-        if bit_set(lattributes, NVRAM_ATTR_EXTHDR):
-            lesize, = struct.unpack("<H", nvram_buf[lof + lsize - 2:lof + lsize])
-        data = nvram_buf[dataof:lof + lsize - lesize]
-        if name not in variables.keys():
-            variables[name] = []
-        #                       off, buf,  hdr,  data, guid, attrs
-        variables[name].append((nof, b'', None, data, guid, attribs))
-        nof = nof + size
-    return variables

-
-
-NVAR_HDR_FMT = '=IHBBBBB'
-NVAR_HDR_SIZE = struct.calcsize(NVAR_HDR_FMT)
-
-
-#
-# Linear/simple NVAR format parsing
-#
-
[docs]def getNVstore_NVAR_simple(nvram_buf: bytes) -> Tuple[Optional[int], int, None]:
-    return (nvram_buf.find(NVAR_EFIvar_signature), -1, None)

-
-
-
[docs]def getEFIvariables_NVAR_simple(nvram_buf: bytes) -> Dict[str, Tuple[int, bytes, bytes, int, str, int]]:
-    nvsize = len(nvram_buf)
-    hdr_fmt = NVAR_HDR_FMT
-    hdr_size = struct.calcsize(hdr_fmt)
-    variables = dict()
-    start = nvram_buf.find(NVAR_EFIvar_signature)
-    if -1 == start:
-        return variables
-
-    while (start + hdr_size) < nvsize:
-        efi_var_hdr = EFI_HDR_NVAR1(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-        name_size = 0
-        efi_var_name = "NA"
-        if not IS_VARIABLE_ATTRIBUTE(efi_var_hdr.Attributes, EFI_VARIABLE_HARDWARE_ERROR_RECORD):
-            name_size = nvram_buf[start + hdr_size:].find(b'\x00')
-            efi_var_name = nvram_buf[start + hdr_size: start + hdr_size + name_size].decode('latin1')
-
-        next_var_offset = start + efi_var_hdr.TotalSize
-        data_size = efi_var_hdr.TotalSize - name_size - hdr_size
-        efi_var_buf = nvram_buf[start: next_var_offset]
-        efi_var_data = nvram_buf[start + hdr_size + name_size: next_var_offset]
-
-        if efi_var_name not in variables.keys():
-            variables[efi_var_name] = []
-        #                               off,   buf,         hdr,         data,         guid, attrs
-        variables[efi_var_name].append((start, efi_var_buf, efi_var_hdr, efi_var_data, '', efi_var_hdr.Attributes))
-
-        if start >= next_var_offset:
-            break
-        start = next_var_offset
-
-    return variables

-
-
-#######################################################################
-#
-# VSS NVRAM (signature = '$VSS')
-#
-#
-
-# define VARIABLE_STORE_SIGNATURE  EFI_SIGNATURE_32 ('$', 'V', 'S', 'S')
-VARIABLE_STORE_SIGNATURE_VSS = b'$VSS'
-VARIABLE_STORE_HEADER_FMT_VSS = '=IIBBHI'  # Signature is '$VSS'
-
-
-
[docs]class VARIABLE_STORE_HEADER_VSS(namedtuple('VARIABLE_STORE_HEADER_VSS', 'Signature Size Format State Reserved Reserved1')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        sig_str = struct.pack('=I', self.Signature)
-        return f"""
-EFI Variable Store
------------------------------
-Signature : {sig_str} (0x{self.Signature:08X})
-Size      : 0x{self.Size:08X} bytes
-Format    : 0x{self.Format:02X}
-State     : 0x{self.State:02X}
-Reserved  : 0x{self.Reserved:04X}
-Reserved1 : 0x{self.Reserved1:08X}
-"""

-
-
-VARIABLE_STORE_SIGNATURE_VSS2 = UUID('DDCF3617-3275-4164-98B6-FE85707FFE7D').bytes_le
-VARIABLE_STORE_SIGNATURE_VSS2_AUTH = UUID('AAF32C78-947B-439A-A180-2E144EC37792').bytes_le
-
-VARIABLE_STORE_HEADER_FMT_VSS2 = '=16sIBBHI'
-
-
-
[docs]class VARIABLE_STORE_HEADER_VSS2(namedtuple('VARIABLE_STORE_HEADER_VSS2', 'Signature Size Format State Reserved Reserved1')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-EFI Variable Store
------------------------------
-Signature : {UUID(bytes_le=self.Signature)}
-Size      : 0x{self.Size:08X} bytes
-Format    : 0x{self.Format:02X}
-State     : 0x{self.State:02X}
-Reserved  : 0x{self.Reserved:04X}
-Reserved1 : 0x{self.Reserved1:08X}
-"""

-
-
-VARIABLE_STORE_SIGNATURE_VSS2 = UUID('DDCF3617-3275-4164-98B6-FE85707FFE7D').bytes_le
-VARIABLE_STORE_SIGNATURE_VSS2_AUTH = UUID('AAF32C78-947B-439A-A180-2E144EC37792').bytes_le
-
-HDR_FMT_VSS = '<HBBIII16s'
-#HDR_SIZE_VSS                  = struct.calcsize( HDR_FMT_VSS )
-#NAME_OFFSET_IN_VAR_VSS        = HDR_SIZE_VSS
-
-
-
[docs]class EFI_HDR_VSS(namedtuple('EFI_HDR_VSS', 'StartId State Reserved Attributes NameSize DataSize guid')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-Header (VSS)
-------------
-VendorGuid : {{{EFI_GUID_STR(self.guid)}}}
-StartId    : 0x{self.StartId:04X}
-State      : 0x{self.State:02X}
-Reserved   : 0x{self.Reserved:02X}
-Attributes : 0x{self.Attributes:08X}
-NameSize   : 0x{self.NameSize:08X}
-DataSize   : 0x{self.DataSize:08X}
-"""

-
-
-HDR_FMT_VSS_AUTH = '<HBBIQQQIII16s'
-
-
-
[docs]class EFI_HDR_VSS_AUTH(namedtuple('EFI_HDR_VSS_AUTH', 'StartId State Reserved Attributes MonotonicCount TimeStamp1 TimeStamp2 PubKeyIndex NameSize DataSize guid')):
-    __slots__ = ()
-    # if you don't re-define __str__ method, initialize is to None
-    #__str__ = None
-
-    def __str__(self) -> str:
-        return f"""
-Header (VSS_AUTH)
-----------------
-VendorGuid     : {{{EFI_GUID_STR(self.guid)}}}
-StartId        : 0x{self.StartId:04X}
-State          : 0x{self.State:02X}
-Reserved       : 0x{self.Reserved:02X}
-Attributes     : 0x{self.Attributes:08X}
-MonotonicCount : 0x{self.MonotonicCount:016X}
-TimeStamp1     : 0x{self.TimeStamp1:016X}
-TimeStamp2     : 0x{self.TimeStamp2:016X}
-PubKeyIndex    : 0x{self.PubKeyIndex:08X}
-NameSize       : 0x{self.NameSize:08X}
-DataSize       : 0x{self.DataSize:08X}
-"""

-
-
-HDR_FMT_VSS_APPLE = '<HBBIII16sI'
-
-
-
[docs]class EFI_HDR_VSS_APPLE(namedtuple('EFI_HDR_VSS_APPLE', 'StartId State Reserved Attributes NameSize DataSize guid unknown')):
-    __slots__ = ()
-
-    def __str__(self) -> str:
-        return f"""
-Header (VSS_APPLE)
-------------
-VendorGuid : {{{EFI_GUID_STR(self.guid)}}}
-StartId    : 0x{self.StartId:04X}
-State      : 0x{self.State:02X}
-Reserved   : 0x{self.Reserved:02X}
-Attributes : 0x{self.Attributes:08X}
-NameSize   : 0x{self.NameSize:08X}
-DataSize   : 0x{self.DataSize:08X}
-Unknown    : 0x{self.unknown:08X}
-"""

-
-def _getNVstore_VSS(nvram_buf: bytes, vss_type) -> Tuple[int, int, Union[VARIABLE_STORE_HEADER_VSS, VARIABLE_STORE_HEADER_VSS2, None]]:
-    if vss_type == FWType.EFI_FW_TYPE_VSS2:
-        sign = VARIABLE_STORE_SIGNATURE_VSS2
-    elif vss_type == FWType.EFI_FW_TYPE_VSS2_AUTH:
-        sign = VARIABLE_STORE_SIGNATURE_VSS2_AUTH
-    else:
-        sign = VARIABLE_STORE_SIGNATURE_VSS
-
-    nvram_start = nvram_buf.find(sign)
-    if -1 == nvram_start:
-        return (-1, 0, None)
-    buf = nvram_buf[nvram_start:]
-    if (not isCorrectVSStype(buf, vss_type)):
-        return (-1, 0, None)
-    if vss_type in (FWType.EFI_FW_TYPE_VSS2, FWType.EFI_FW_TYPE_VSS2_AUTH):
-        nvram_hdr = VARIABLE_STORE_HEADER_VSS2(*struct.unpack_from(VARIABLE_STORE_HEADER_FMT_VSS2, buf))
-    else:
-        nvram_hdr = VARIABLE_STORE_HEADER_VSS(*struct.unpack_from(VARIABLE_STORE_HEADER_FMT_VSS, buf))
-    return (nvram_start, nvram_hdr.Size, nvram_hdr)
-
-
-
[docs]def getNVstore_VSS(nvram_buf: bytes):
-    return _getNVstore_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS)

-
-
-
[docs]def getNVstore_VSS_AUTH(nvram_buf: bytes):
-    return _getNVstore_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS_AUTH)

-
-
-
[docs]def getNVstore_VSS2(nvram_buf: bytes):
-    return _getNVstore_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS2)

-
-
-
[docs]def getNVstore_VSS2_AUTH(nvram_buf: bytes):
-    return _getNVstore_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS2_AUTH)

-
-
-
[docs]def getNVstore_VSS_APPLE(nvram_buf: bytes):
-    return _getNVstore_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS_APPLE)

-
-
-VSS_TYPES = (FWType.EFI_FW_TYPE_VSS, FWType.EFI_FW_TYPE_VSS_AUTH, FWType.EFI_FW_TYPE_VSS2, FWType.EFI_FW_TYPE_VSS2_AUTH, FWType.EFI_FW_TYPE_VSS_APPLE)
-MAX_VSS_VAR_ALIGNMENT = 8
-
-
-
[docs]def isCorrectVSStype(nvram_buf: bytes, vss_type: str):
-    if (vss_type not in VSS_TYPES):
-        return False
-
-    buf_size = len(nvram_buf)
-    start = nvram_buf.find(VARIABLE_SIGNATURE_VSS)
-    if (-1 == start):
-        return False
-
-    next_var = nvram_buf.find(VARIABLE_SIGNATURE_VSS, start + struct.calcsize(HDR_FMT_VSS))  # skip the minimum bytes required for the header
-    if (-1 == next_var):
-        next_var = buf_size
-
-    buf_size -= start
-
-    if (vss_type in (FWType.EFI_FW_TYPE_VSS, FWType.EFI_FW_TYPE_VSS2)):
-        hdr_fmt = HDR_FMT_VSS
-        efi_var_hdr = EFI_HDR_VSS(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-    elif (vss_type in (FWType.EFI_FW_TYPE_VSS_AUTH, FWType.EFI_FW_TYPE_VSS2_AUTH)):
-        hdr_fmt = HDR_FMT_VSS_AUTH
-        efi_var_hdr = EFI_HDR_VSS_AUTH(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-    elif (vss_type == FWType.EFI_FW_TYPE_VSS_APPLE):
-        hdr_fmt = HDR_FMT_VSS_APPLE
-        efi_var_hdr = EFI_HDR_VSS_APPLE(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-
-    hdr_size = struct.calcsize(hdr_fmt)
-    # check NameSize and DataSize
-    name_offset = start + hdr_size
-    if ((name_offset < next_var) and ((name_offset + efi_var_hdr.NameSize) < next_var)):
-        valid_name = False
-        if (efi_var_hdr.NameSize > 0):
-            name = nvram_buf[name_offset: name_offset + efi_var_hdr.NameSize]
-            try:
-                name = name.decode("utf-16-le").split('\x00')[0]
-                valid_name = defines.is_printable(name)
-            except Exception as e:
-                pass
-        if (valid_name):
-            end_var_offset = name_offset + efi_var_hdr.NameSize + efi_var_hdr.DataSize
-            off_diff = next_var - end_var_offset
-            if (off_diff == 0):
-                return True
-            elif (off_diff > 0):
-                if (next_var == len(nvram_buf)) or (off_diff <= (MAX_VSS_VAR_ALIGNMENT - 1)):
-                    return True
-            else:
-                if (next_var < len(nvram_buf)):
-                    new_nex_var = nvram_buf.find(VARIABLE_SIGNATURE_VSS, next_var, next_var + len(VARIABLE_SIGNATURE_VSS) + (MAX_VSS_VAR_ALIGNMENT - 1))
-                    if (new_nex_var != -1):
-                        return True
-
-    return False

-
-
-def _getEFIvariables_VSS(nvram_buf: bytes, _fwtype: str) -> Dict[str, List[EfiVariableType]]:
-    variables = dict()
-    nvsize = len(nvram_buf)
-    if _fwtype in (FWType.EFI_FW_TYPE_VSS, FWType.EFI_FW_TYPE_VSS2):
-        hdr_fmt = HDR_FMT_VSS
-    elif _fwtype in (FWType.EFI_FW_TYPE_VSS_AUTH, FWType.EFI_FW_TYPE_VSS2_AUTH):
-        hdr_fmt = HDR_FMT_VSS_AUTH
-    elif (FWType.EFI_FW_TYPE_VSS_APPLE == _fwtype):
-        hdr_fmt = HDR_FMT_VSS_APPLE
-    else:
-        return variables
-    hdr_size = struct.calcsize(hdr_fmt)
-    start = nvram_buf.find(VARIABLE_SIGNATURE_VSS)
-    if -1 == start:
-        return variables
-
-    while (start + hdr_size) < nvsize:
-        efi_var_hdr = None
-        variables = {}
-        if _fwtype in (FWType.EFI_FW_TYPE_VSS, FWType.EFI_FW_TYPE_VSS2):
-            efi_var_hdr = EFI_HDR_VSS(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-        elif _fwtype in (FWType.EFI_FW_TYPE_VSS_AUTH, FWType.EFI_FW_TYPE_VSS2_AUTH):
-            efi_var_hdr = EFI_HDR_VSS_AUTH(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-        elif (FWType.EFI_FW_TYPE_VSS_APPLE == _fwtype):
-            efi_var_hdr = EFI_HDR_VSS_APPLE(*struct.unpack_from(hdr_fmt, nvram_buf[start:]))
-
-        if efi_var_hdr is None:
-            return variables
-        if (efi_var_hdr.StartId != VARIABLE_DATA):
-            break
-
-        if ((efi_var_hdr.State == 0xff) and (efi_var_hdr.DataSize == 0xffffffff) and (efi_var_hdr.NameSize == 0xffffffff) and (efi_var_hdr.Attributes == 0xffffffff)):
-            name_size = 0
-            data_size = 0
-            # just skip variable with empty name and data for now
-            next_var_offset = nvram_buf.find(VARIABLE_SIGNATURE_VSS, start + hdr_size, start + hdr_size + len(VARIABLE_SIGNATURE_VSS) + (MAX_VSS_VAR_ALIGNMENT - 1))
-            if (next_var_offset == -1) or (next_var_offset > nvsize):
-                break
-        else:
-            name_size = efi_var_hdr.NameSize
-            data_size = efi_var_hdr.DataSize
-            efi_var_name = "<not defined>"
-
-            end_var_offset = start + hdr_size + name_size + data_size
-            efi_var_buf = nvram_buf[start: end_var_offset]
-
-            name_offset = hdr_size
-            Name = efi_var_buf[name_offset: name_offset + name_size]
-            if Name:
-                efi_var_name = Name.decode("utf-16-le").split('\x00')[0]
-
-            efi_var_data = efi_var_buf[name_offset + name_size: name_offset + name_size + data_size]
-            guid = EFI_GUID_STR(efi_var_hdr.guid)
-            if efi_var_name not in variables.keys():
-                variables[efi_var_name] = []
-            #                                off,   buf,         hdr,         data,         guid, attrs
-            variables[efi_var_name].append((start, efi_var_buf, efi_var_hdr, efi_var_data, guid, efi_var_hdr.Attributes))
-
-            # deal with different alignments (1-8)
-            next_var_offset = nvram_buf.find(VARIABLE_SIGNATURE_VSS, end_var_offset, end_var_offset + len(VARIABLE_SIGNATURE_VSS) + (MAX_VSS_VAR_ALIGNMENT - 1))
-            if (next_var_offset == -1) or (next_var_offset > nvsize):
-                break
-
-        if start >= next_var_offset:
-            break
-        start = next_var_offset
-
-    return variables
-
-
-
[docs]def getEFIvariables_VSS(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS)

-
-
-
[docs]def getEFIvariables_VSS_AUTH(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS_AUTH)

-
-
-
[docs]def getEFIvariables_VSS2(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS2)

-
-
-
[docs]def getEFIvariables_VSS2_AUTH(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS2_AUTH)

-
-
-
[docs]def getEFIvariables_VSS_APPLE(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    return _getEFIvariables_VSS(nvram_buf, FWType.EFI_FW_TYPE_VSS_APPLE)

-
-
-#######################################################################
-#
-# EVSA NVRAM (signature = 'EVSA')
-#
-#
-VARIABLE_STORE_SIGNATURE_EVSA = b'EVSA'
-
-TLV_HEADER = "<BBH"
-tlv_h_size = struct.calcsize(TLV_HEADER)
-
-
-
[docs]def getNVstore_EVSA(nvram_buf: bytes) -> NvStore:
-    l = (-1, -1, None)
-    fv = NextFwVolume(nvram_buf)
-    while fv is not None:
-        if (fv.Guid == VARIABLE_STORE_FV_GUID):
-            nvram_start = fv.Image.find(VARIABLE_STORE_SIGNATURE_EVSA)
-            if (nvram_start != -1) and (nvram_start >= tlv_h_size):
-                nvram_start = nvram_start - tlv_h_size
-                l = (fv.Offset + nvram_start, fv.Size - nvram_start, None)
-                break
-        if (fv.Guid == ADDITIONAL_NV_STORE_GUID):
-            nvram_start = fv.Image.find(VARIABLE_STORE_SIGNATURE_EVSA)
-            if (nvram_start != -1) and (nvram_start >= tlv_h_size):
-                nvram_start = nvram_start - tlv_h_size
-                l = (fv.Offset + nvram_start, fv.Size - nvram_start, None)
-        fv = NextFwVolume(nvram_buf, fv.Offset, fv.Size)
-    return l

-
-
[docs]def EFIvar_EVSA(nvram_buf: bytes) -> Dict[str, List[EfiVariableType]]:
-    image_size = len(nvram_buf)
-    sn = 0
-    EVSA_RECORD = "<IIII"
-    evsa_rec_size = struct.calcsize(EVSA_RECORD)
-    GUID_RECORD = "<H16s"
-    guid_rc_size = struct.calcsize(GUID_RECORD)
-    fof = 0
-    variables = dict()
-    while fof < image_size:
-        fof = nvram_buf.find(VARIABLE_STORE_SIGNATURE_EVSA, fof)
-        if fof == -1:
-            break
-        if fof < tlv_h_size:
-            fof = fof + 4
-            continue
-        start = fof - tlv_h_size
-        Tag0, Tag1, Size = struct.unpack(TLV_HEADER, nvram_buf[start: start + tlv_h_size])
-        if Tag0 != 0xEC:  # Wrong EVSA block
-            fof = fof + 4
-            continue
-        value = nvram_buf[start + tlv_h_size:start + Size]
-        _, _, Length, _ = struct.unpack(EVSA_RECORD, value)
-        if start + Length > image_size:  # Wrong EVSA record
-            fof = fof + 4
-            continue
-        # NV storage EVSA found
-        bof = 0
-        guid_map = dict()
-        var_list = list()
-        value_list = dict()
-        while (bof + tlv_h_size) < Length:
-            Tag0, Tag1, Size = struct.unpack(TLV_HEADER, nvram_buf[start + bof: start + bof + tlv_h_size])
-            if (Size < tlv_h_size):
-                break
-            value = nvram_buf[start + bof + tlv_h_size:start + bof + Size]
-            bof = bof + Size
-            if (Tag0 == 0xED) or (Tag0 == 0xE1):  # guid
-                GuidId, guid0 = struct.unpack(GUID_RECORD, value)
-                g = EFI_GUID_STR(guid0)
-                guid_map[GuidId] = g
-            elif (Tag0 == 0xEE) or (Tag0 == 0xE2):  # var name
-                VAR_NAME_RECORD = f'<H{Size - tlv_h_size - 2:d}s'
-                VarId, Name = struct.unpack(VAR_NAME_RECORD, value)
-                Name = Name.decode("utf-16-le")[:-1]
-                var_list.append((Name, VarId, Tag0, Tag1))
-            elif (Tag0 == 0xEF) or (Tag0 == 0xE3) or (Tag0 == 0x83):  # values
-                VAR_VALUE_RECORD = f'<HHI{Size - tlv_h_size - 8:d}s'
-                GuidId, VarId, Attributes, Data = struct.unpack(VAR_VALUE_RECORD, value)
-                value_list[VarId] = (GuidId, Attributes, Data, Tag0, Tag1)
-            elif not ((Tag0 == 0xff) and (Tag1 == 0xff) and (Size == 0xffff)):
-                pass
-        var_count = len(var_list)
-        var_list.sort()
-        var1 = {}
-        for i in var_list:
-            name = i[0]
-            VarId = i[1]
-            #NameTag0 = i[2]
-            #NameTag1 = i[3]
-            if VarId in value_list:
-                var_value = value_list[VarId]
-            else:
-                #  Value not found for VarId
-                continue
-            GuidId = var_value[0]
-            guid = "NONE"
-            if GuidId not in guid_map:
-                # Guid not found for GuidId
-                pass
-            else:
-                guid = guid_map[GuidId]
-            if name not in variables.keys():
-                variables[name] = []
-            #                       off,   buf,  hdr,  data,         guid, attrs
-            variables[name].append((start, b'', None, var_value[2], guid, var_value[1]))
-        fof = fof + Length
-    return variables

-
-
-#
-# Uncomment if you want to parse output buffer returned by NtEnumerateSystemEnvironmentValuesEx
-# using 'chipsec_util uefi nvram' command
-#
-#
-# Windows 8 NtEnumerateSystemEnvironmentValuesEx (infcls = 2)
-#
-# def guid_str(guid0, guid1, guid2, guid3):
-#        return ( f'{guid0:08X}-{guid1:04X}-{guid2:04X}-{guid3[:2].encode('hex').upper():4}-{guid3[-6::].encode('hex').upper():6}')
-#
-# class EFI_HDR_WIN( namedtuple('EFI_HDR_WIN', 'Size DataOffset DataSize Attributes guid0 guid1 guid2 guid3') ):
-#        __slots__ = ()
-#        def __str__(self):
-#            return f"""
-#Header (Windows)
-# ----------------
-# VendorGuid= {{self.guid0:08X}-{self.guid1:04X}-{self.guid2:04X}-{self.guid3[:2].encode('hex').upper():4}-{self.guid3[-6::].encode('hex').upper():6}}
-# Size      = 0x{self.Size:08X}
-# DataOffset= 0x{self.DataOffset:08X}
-# DataSize  = 0x{self.DataSize:08X}
-# Attributes= 0x{self.Attributes:08X}
-# """
-"""
-def getEFIvariables_NtEnumerateSystemEnvironmentValuesEx2( nvram_buf ):
-        start = 0
-        buffer = nvram_buf
-        bsize = len(buffer)
-        header_fmt = "<IIIIIHH8s"
-        header_size = struct.calcsize( header_fmt )
-        variables = dict()
-        off = 0
-        while (off + header_size) < bsize:
-           efi_var_hdr = EFI_HDR_WIN( *struct.unpack_from( header_fmt, buffer[ off : off + header_size ] ) )
-
-           next_var_offset = off + efi_var_hdr.Size
-           efi_var_buf     = buffer[ off : next_var_offset ]
-           efi_var_data    = buffer[ off + efi_var_hdr.DataOffset : off + efi_var_hdr.DataOffset + efi_var_hdr.DataSize ]
-
-           #efi_var_name = "".join( buffer[ start + header_size : start + efi_var_hdr.DataOffset ] ).decode('utf-16-le')
-           str_fmt = f'{efi_var_hdr.DataOffset - header_size:d}s'
-           s, = struct.unpack( str_fmt, buffer[ off + header_size : off + efi_var_hdr.DataOffset ] )
-           efi_var_name = unicode(s, "utf-16-le", errors="replace").split(u'\u0000')[0]
-
-           if efi_var_name not in variables.keys():
-               variables[efi_var_name] = []
-           #                                off, buf,         hdr,         data,         guid,                                                                                 attrs
-           variables[efi_var_name].append( (off, efi_var_buf, efi_var_hdr, efi_var_data, guid_str(efi_var_hdr.guid0, efi_var_hdr.guid1, efi_var_hdr.guid2, efi_var_hdr.guid3), efi_var_hdr.Attributes) )
-
-           if 0 == efi_var_hdr.Size: break
-           off = next_var_offset
-
-        return variables
-#    return ( start, next_var_offset, efi_var_buf, efi_var_hdr, efi_var_name, efi_var_data, guid_str(efi_var_hdr.guid0, efi_var_hdr.guid1, efi_var_hdr.guid2, efi_var_hdr.guid3), efi_var_hdr.Attributes )
-"""
-
-
-#
-# Decoding S3 Resume Boot Script
-#
-
-
[docs]class S3BootScriptType:
-    EFI_BOOT_SCRIPT_TYPE_DEFAULT = 0x00
-    EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT = 0xAA

-
-
-
[docs]def decode_s3bs_opcode(s3bootscript_type, script_data):
-    if S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT == s3bootscript_type:
-        return decode_s3bs_opcode_edkcompat(script_data)
-    else:
-        return decode_s3bs_opcode_def(script_data)

-
-
-
[docs]def encode_s3bs_opcode(s3bootscript_type: int, op: S3BOOTSCRIPT_ENTRY) -> bytes:
-    if S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT == s3bootscript_type:
-        return encode_s3bs_opcode_edkcompat(op)
-    else:
-        return encode_s3bs_opcode_def(op)

-
-
-
[docs]def decode_s3bs_opcode_def(data):
-    opcode = None
-    size = None
-    width = None
-    unknown = None
-    count = None
-    value = None
-    mask = None
-
-    op = None
-    opcode, = struct.unpack('<B', data[: 1])
-    try:
-        logger().log_hal(script_opcodes[opcode])
-    except:
-        pass
-    if S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_IO_WRITE_OPCODE == opcode:
-        frmt = '<BBHIQ'
-        size = struct.calcsize(frmt)
-        opcode, width, address, alignment, count = struct.unpack(frmt, data[: size])
-        op = op_io_pci_mem(opcode, size, width, address, unknown, count, data[size:], value, mask)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE == opcode:
-        frmt = '<BBHIQQ'
-        size = struct.calcsize(frmt)
-        opcode, width, address, _, value, mask = struct.unpack(frmt, data[: size])
-        op = op_io_pci_mem(opcode, size, width, address, unknown, count, None, value, mask)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE == opcode:
-        frmt = '<BBHIQQ'
-        size = struct.calcsize(frmt)
-        opcode, width, unknown, _, address, count = struct.unpack(frmt, data[: size])
-        op = op_io_pci_mem(opcode, size, width, address, unknown, count, data[size:], value, mask)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE == opcode:
-        frmt = '<BBHIQQQ'
-        size = struct.calcsize(frmt)
-        opcode, width, unknown, _, address, value, mask = struct.unpack(frmt, data[: size])
-        op = op_io_pci_mem(opcode, size, width, address, unknown, count, None, value, mask)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE == opcode:
-        frmt = '<BBHIQQ'
-        size = struct.calcsize(frmt)
-        opcode, width, unknown, _, address, count = struct.unpack(frmt, data[: size])
-        op = op_io_pci_mem(opcode, size, width, address, unknown, count, data[size:], value, mask)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE == opcode:
-        frmt = '<BBHIQQQ'
-        size = struct.calcsize(frmt)
-        opcode, width, unknown, _, address, value, mask = struct.unpack(frmt, data[: size])
-        op = op_io_pci_mem(opcode, size, width, address, unknown, count, None, value, mask)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE == opcode:
-        frmt = '<BBQBB'
-        size = struct.calcsize(frmt)
-        opcode, address, command, operation, peccheck = struct.unpack(frmt, data[: size])
-        op = op_smbus_execute(opcode, size, address, command, operation, peccheck)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_STALL_OPCODE == opcode:
-        frmt = '<BBQ'
-        size = struct.calcsize(frmt)
-        opcode, _, duration = struct.unpack(frmt, data[: size])
-        op = op_stall(opcode, size, duration)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_DISPATCH_OPCODE == opcode:
-        frmt = '<BBHIQ'
-        size = struct.calcsize(frmt)
-        opcode, _, _, _, entrypoint = struct.unpack(frmt, data[: size])
-        op = op_dispatch(opcode, size, entrypoint)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE == opcode:
-        frmt = '<BBHIQQ'
-        size = struct.calcsize(frmt)
-        opcode, _, _, _, entrypoint, context = struct.unpack(frmt, data[: size])
-        op = op_dispatch(opcode, size, entrypoint, context)
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_TERMINATE_OPCODE == opcode:
-        frmt = '<B'
-        size = struct.calcsize(frmt)
-        opcode, = struct.unpack(frmt, data[: size])
-        op = op_terminate(opcode, size)
-    else:
-        op = op_unknown(opcode, 1)
-        if logger().HAL:
-            logger().log_warning(f'Unrecognized opcode {opcode:X}')
-
-    return op

-
-#
-# @TODO: encode functions are not fully implemented
-#
-
-
-
[docs]def encode_s3bs_opcode_def(op) -> bytes:
-    encoded_opcode = b''
-
-    if S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_IO_WRITE_OPCODE == op.opcode:
-        encoded_hdr = struct.pack('<BBHIQ', op.opcode, op.width, op.address, 0x0, op.count)
-        if op.values is None:
-            encoded_opcode = encoded_hdr + op.buffer
-        else:
-            encoded_opcode = encoded_hdr + struct.pack(script_width_formats[op.width] * op.count, *op.values)
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE == op.opcode:
-        encoded_opcode = struct.pack('<BBHIQQ', op.opcode, op.width, op.address, 0x0, op.value, op.mask)
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE == op.opcode or \
-            S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE == op.opcode:
-        encoded_hdr = struct.pack('<BBHIQQ', op.opcode, op.width, op.unknown, 0x0, op.address, op.count)
-        if op.values is None:
-            encoded_opcode = encoded_hdr + op.buffer
-        else:
-            encoded_opcode = encoded_hdr + struct.pack(script_width_formats[op.width] * op.count, *op.values)
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE == op.opcode:
-        frmt = '<BBHIQQQ'
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE == op.opcode:
-        encoded_opcode = struct.pack('<BBHIQQQ', op.opcode, op.width, op.unknown, 0x0, op.address, op.value, op.mask)
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE == op.opcode:
-        frmt = '<BBQBB'
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_STALL_OPCODE == op.opcode:
-        frmt = '<BBQ'
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_DISPATCH_OPCODE == op.opcode:
-        encoded_opcode = struct.pack('<BBHIQ', op.opcode, 0x0, 0x0, 0x0, op.entrypoint)
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE == op.opcode:
-        encoded_opcode = struct.pack('<BBHIQQ', op.opcode, 0x0, 0x0, 0x0, op.entrypoint, op.context)
-
-    elif S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_TERMINATE_OPCODE == op.opcode:
-        frmt = '<B'
-
-    else:
-        if logger().HAL:
-            logger().log_warning(f'Unrecognized opcode {op.opcode:X}')
-
-    return encoded_opcode

-
-
-
[docs]def decode_s3bs_opcode_edkcompat(data: bytes):
-    opcode = None
-    width = None
-    count = None
-    value = None
-    mask = None
-
-    op = None
-
-    hdr_frmt = '<HB'
-    header_size = struct.calcsize(hdr_frmt)
-    opcode, size = struct.unpack(hdr_frmt, data[: header_size])
-    opcode_data = data[header_size:]
-    try:
-        logger().log_hal(script_opcodes[opcode])
-    except:
-        pass
-
-    if S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_IO_WRITE_OPCODE == opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE == opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE == opcode:
-
-        frmt = '<IIQ'
-        op_size = struct.calcsize(frmt)
-        width, count, address = struct.unpack(frmt, opcode_data[: op_size])
-        op = op_io_pci_mem(opcode, size, width, address, None, count, opcode_data[op_size:], value, mask)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE == opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE == opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE == opcode:
-        frmt = '<IQ'
-        sz = struct.calcsize(frmt)
-        width, address = struct.unpack(frmt, opcode_data[: sz])
-        frmt = 2 * script_width_formats[width]
-        op_size = sz + struct.calcsize(frmt)
-        value, mask = struct.unpack(frmt, opcode_data[sz: op_size])
-        op = op_io_pci_mem(opcode, size, width, address, None, count, None, value, mask)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE == opcode:
-        if logger().UTIL_TRACE or logger().HAL:
-            logger().log_warning(f'Cannot parse opcode {opcode:X} yet')
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_STALL_OPCODE == opcode:
-        frmt = '<Q'
-        op_size = struct.calcsize(frmt)
-        duration, = struct.unpack(frmt, opcode_data[: op_size])
-        op = op_stall(opcode, size, duration)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_DISPATCH_OPCODE == opcode:
-        frmt = '<Q'
-        op_size = struct.calcsize(frmt)
-        entrypoint, = struct.unpack(frmt, opcode_data[: op_size])
-        op = op_dispatch(opcode, size, entrypoint)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_MEM_POLL_OPCODE == opcode:
-        frmt = '<IQQQ'
-        op_size = struct.calcsize(frmt)
-        width, address, duration, looptimes = struct.unpack(frmt, opcode_data[: op_size])
-        op = op_mem_poll(opcode, size, width, address, duration, looptimes)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_TERMINATE_OPCODE == opcode:
-        op = op_terminate(opcode, size)
-
-    else:
-        op = op_unknown(opcode, size)
-        if logger().HAL:
-            logger().log_warning(f'Unrecognized opcode {opcode:X}')
-
-    return op

-
-#
-# @TODO: encode functions are not fully implemented
-#
-
-
-
[docs]def encode_s3bs_opcode_edkcompat(op: S3BOOTSCRIPT_ENTRY) -> bytes:
-    encoded_opcode = b''
-
-    if S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_IO_WRITE_OPCODE == op.opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE == op.opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE == op.opcode:
-
-        encoded_hdr = struct.pack('<IIQ', op.width, op.count, op.address)
-        if op.values is None:
-            encoded_opcode = encoded_hdr + op.buffer
-        else:
-            encoded_opcode = encoded_hdr + struct.pack(script_width_formats[op.width] * op.count, *op.values)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE == op.opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE == op.opcode or \
-            S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE == op.opcode:
-
-        frmt = f'<IQ2{script_width_formats[op.width]}'
-        encoded_opcode = struct.pack(frmt, op.width, op.address, op.value, op.mask)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE == op.opcode:
-        pass
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_STALL_OPCODE == op.opcode:
-        frmt = '<Q'
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_DISPATCH_OPCODE == op.opcode:
-        encoded_opcode = struct.pack('<Q', op.entrypoint)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_MEM_POLL_OPCODE == op.opcode:
-        encoded_opcode = struct.pack('<IQQQ', op.width, op.address, op.duration, op.looptimes)
-
-    elif S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_TERMINATE_OPCODE == op.opcode:
-        pass
-
-    return encoded_opcode

-
-
-
[docs]def parse_s3bootscript_entry(s3bootscript_type: int, script: bytes, off: int, log_script: bool = False):
-    entry_index = None
-    entry_length = 0
-    opcode = None
-    entry_data = None
-
-    remaining_len = len(script[off:])
-
-    if S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT == s3bootscript_type:
-        fhdr = '<HB'
-        hdr_length = struct.calcsize(fhdr)
-        if remaining_len < hdr_length:
-            if logger().HAL:
-                logger().log_warning(f'The script should have at least 0x{hdr_length:X} bytes to parse next entry')
-            return (0, None)
-
-        opcode, entry_length = struct.unpack(fhdr, script[off: off + hdr_length])
-        if S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_TERMINATE_OPCODE == opcode:
-            entry_length = hdr_length
-        entry_data = script[off: off + entry_length]
-
-        if entry_length > MAX_S3_BOOTSCRIPT_ENTRY_LENGTH:
-            logger().log_error(f'[uefi] Unrecognized S3 boot script format (entry length = 0x{entry_length:X})')
-            return (0, None)
-
-        s3script_entry = S3BOOTSCRIPT_ENTRY(s3bootscript_type, entry_index, off, entry_length, entry_data)
-
-    else:  # S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_DEFAULT
-
-        fhdr = '<II'
-        hdr_length = struct.calcsize(fhdr)
-        f = fhdr + 'B'
-        if remaining_len < (hdr_length + 1):
-            if logger().HAL:
-                logger().log_warning(f'The script should have at least 0x{hdr_length + 1:X} bytes to parse next entry')
-            return (0, None)
-
-        entry_index, entry_length, opcode = struct.unpack(f, script[off: off + hdr_length + 1])
-        if S3BootScriptOpcode_MDE.EFI_BOOT_SCRIPT_TERMINATE_OPCODE == opcode:
-            entry_length = hdr_length + 1
-            entry_index = -1
-        entry_data = script[off + hdr_length: off + entry_length]
-
-        if entry_length > MAX_S3_BOOTSCRIPT_ENTRY_LENGTH:
-            logger().log_error(f'[uefi] Unrecognized S3 boot script format (entry length = 0x{entry_length:X})')
-            return (0, None)
-
-        s3script_entry = S3BOOTSCRIPT_ENTRY(s3bootscript_type, entry_index, off, entry_length, entry_data)
-        s3script_entry.header_length = hdr_length
-
-    s3script_entry.decoded_opcode = decode_s3bs_opcode(s3bootscript_type, s3script_entry.data)
-
-    if log_script:
-        logger().log(str(s3script_entry))
-    return (opcode, s3script_entry)

-
-
-
[docs]def encode_s3bootscript_entry(entry) -> Optional[bytes]:
-    if S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT == entry.script_type:
-        entry_hdr_buf = struct.pack('<HB', entry.decoded_opcode.opcode, entry.length)
-    else:  # S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_DEFAULT
-        entry_hdr_buf = struct.pack('<II', entry.index, entry.length)
-
-    entry_val_buf = encode_s3bs_opcode(entry.script_type, entry.decoded_opcode)
-    entry_buf = None
-    if entry_val_buf is not None:
-        entry_buf = entry_hdr_buf + entry_val_buf
-    else:
-        logger().log_warning(f'Could not encode opcode of boot script entry (type 0x{entry.script_type:X})')
-
-    return entry_buf

-
-
-
[docs]def create_s3bootscript_entry_buffer(script_type: int, op, index=None) -> bytes:
-    entry_val_buf = encode_s3bs_opcode(script_type, op)
-    length = len(entry_val_buf)
-    if S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT == script_type:
-        length += struct.calcsize('<HB')
-        entry_hdr_buf = struct.pack('<HB', op.opcode, length)
-    else:  # S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_DEFAULT
-        length += struct.calcsize('<II')
-        entry_hdr_buf = struct.pack('<II', index, length)
-
-    return (entry_hdr_buf + entry_val_buf)

-
-
-
[docs]def id_s3bootscript_type(script: bytes, log_script: bool = False) -> Tuple[int, int]:
-    script_header_length = 0
-
-    start_op, = struct.unpack('<B', script[: 1])
-    if S3BootScriptOpcode_EdkCompat.EFI_BOOT_SCRIPT_TABLE_OPCODE == start_op:
-        logger().log_hal('S3 Boot Script AA Parser')
-        script_type = S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT
-        if log_script:
-            logger().log(f'[uefi] Start opcode 0x{start_op:X}')
-        # MdeModulePkg\Library\PiDxeS3BootScriptLib\BootScriptInternalFormat.h
-        script_header_length = struct.calcsize("<HBHLHH")
-    else:
-        logger().log_hal('S3 Boot Script DEFAULT Parser')
-        script_type = S3BootScriptType.EFI_BOOT_SCRIPT_TYPE_DEFAULT
-
-    return (script_type, script_header_length)

-
-
-#
-# EFI Variable Header Dictionary
-#
-#
-# Add your EFI variable details to the dictionary
-#
-# Fields:
-# name          func_getefivariables            func_getnvstore
-#
-EFI_VAR_DICT: Dict[str, Dict[str, Any]] = {
-    # UEFI
-    FWType.EFI_FW_TYPE_UEFI: {'name': 'UEFI', 'func_getefivariables': getEFIvariables_UEFI, 'func_getnvstore': getNVstore_EFI},
-    FWType.EFI_FW_TYPE_UEFI_AUTH: {'name': 'UEFI_AUTH', 'func_getefivariables': getEFIvariables_UEFI_AUTH, 'func_getnvstore': getNVstore_EFI_AUTH},
-    # Windows 8 NtEnumerateSystemEnvironmentValuesEx (infcls = 2)
-    # FWType.EFI_FW_TYPE_WIN     : {'name' : 'WIN',     'func_getefivariables' : getEFIvariables_NtEnumerateSystemEnvironmentValuesEx2, 'func_getnvstore' : None },
-    # NVAR format
-    FWType.EFI_FW_TYPE_NVAR: {'name': 'NVAR', 'func_getefivariables': getEFIvariables_NVAR, 'func_getnvstore': getNVstore_NVAR},
-    # $VSS NVRAM format
-    FWType.EFI_FW_TYPE_VSS: {'name': 'VSS', 'func_getefivariables': getEFIvariables_VSS, 'func_getnvstore': getNVstore_VSS},
-    # $VSS Authenticated NVRAM format
-    FWType.EFI_FW_TYPE_VSS_AUTH: {'name': 'VSS_AUTH', 'func_getefivariables': getEFIvariables_VSS_AUTH, 'func_getnvstore': getNVstore_VSS_AUTH},
-    # VSS2 NVRAM format
-    FWType.EFI_FW_TYPE_VSS2: {'name': 'VSS2', 'func_getefivariables': getEFIvariables_VSS2, 'func_getnvstore': getNVstore_VSS2},
-    # VSS2 Authenticated NVRAM format
-    FWType.EFI_FW_TYPE_VSS2_AUTH: {'name': 'VSS2_AUTH', 'func_getefivariables': getEFIvariables_VSS2_AUTH, 'func_getnvstore': getNVstore_VSS2_AUTH},
-    # Apple $VSS formart
-    FWType.EFI_FW_TYPE_VSS_APPLE: {'name': 'VSS_APPLE', 'func_getefivariables': getEFIvariables_VSS_APPLE, 'func_getnvstore': getNVstore_VSS_APPLE},
-    # EVSA
-    FWType.EFI_FW_TYPE_EVSA: {'name': 'EVSA', 'func_getefivariables': EFIvar_EVSA, 'func_getnvstore': getNVstore_EVSA},
-}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/uefi_search.html b/_modules/chipsec/hal/uefi_search.html deleted file mode 100644 index 87b218e9..00000000 --- a/_modules/chipsec/hal/uefi_search.html +++ /dev/null @@ -1,346 +0,0 @@ - - - - - - - - chipsec.hal.uefi_search — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.uefi_search

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-UEFI image search auxillary functionality
-
-usage:
-   >>> chipsec.hal.uefi_search.check_match_criteria(efi_module, match_criteria, self.logger)
-"""
-
-import re
-from uuid import UUID
-from typing import Dict, Callable, Optional, Any
-
-from chipsec import defines
-from chipsec.hal.spi_uefi import EFI_SECTION
-from chipsec.logger import logger
-
-#
-# - EFI binaries are searched according to criteria defined by "match" rules.
-# - EFI binaries matching exclusion criteria defined by "exclude" rules are excluded from matching.
-#
-# Format of the matching rules (any field can be empty or missing):
-# - Individual rules are OR'ed
-# - criteria within a given rule are AND'ed
-#
-# Example:
-#
-#  "UEFI_rootkitX": {
-#    "description": "yet another UEFI implant X",
-#    "match": {
-#      "rktX_rule1" : { "guid": "12345678-XXXX-XXXX-XXXX-XXXXXXXXXXXX" },
-#      "rktX_rule2" : { "name": "rootkitX.efi" }
-#    }
-#  }
-#
-# Above UEFI_rootkitX example results in a match if the following EFI binary is found:
-# - with GUID "12345678-XXXX-XXXX-XXXX-XXXXXXXXXXXX"
-# OR
-# - with Name "rootkitX.efi"
-#
-#
-#  "UEFI_vulnerabilityX": {
-#    "description": "yet another UEFI vulnerability X",
-#    "match": {
-#      "vulnX_rule1": { "guid": "XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX", "regexp": "IAMVULNERABLE" },
-#      "vulnX_rule2": { "md5": "aabbccddeeffgghhiijjkkllmmnnoopp", "sha1": "aabbccddeeffgghhiijjkkllmmnnooppqqrrsstt" }
-#    },
-#    "exclude": {
-#      "vulnX_patched": { "md5": "HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH", "sha1": "HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH" }
-#    }
-#  }
-#
-# Above UEFI_vulnerabilityX example results in a match if the following EFI binary is found:
-# - with GUID "XXXXXXXX-XXXX-XXXX-XXXX-XXXXXXXXXXXX" AND contains a byte sequence matching regular expression "IAMVULNERABLE"
-# OR
-# - with MD5 hash "aabbccddeeffgghhiijjkkllmmnnoopp" AND SHA-1 hash "aabbccddeeffgghhiijjkkllmmnnooppqqrrsstt"
-# Unless it's a EFI binary:
-# - with MD5 hash "HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH" AND SHA-1 hash "HHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHHH"
-#
-#
-# "UEFI_vulnerabilityY": {
-#     "description": "Something else to be scared of!",
-#     "match": {
-#       "vulnY_rule1": {"guid": "aaaaaaaa-bbbb-cccc-dddd-eeeeeeeeeeee", "cpuid": "12345,abcde" }
-#     }
-#   }
-#
-# Above UEFI_vulnerabilityY example results in a match if the following EFI binary is found:
-# - with GUID "aaaaaaaa-bbbb-cccc-dddd-eeeeeeeeeeee" AND if the binary is dumped from a live system, check's the system's CPUID to see if it matches one in the list "12345,abcde"
-#
-MATCH_NAME = 0x1
-MATCH_GUID = (0x1 << 1)
-MATCH_REGEXP = (0x1 << 2)
-MATCH_HASH_MD5 = (0x1 << 3)
-MATCH_HASH_SHA1 = (0x1 << 4)
-MATCH_HASH_SHA256 = (0x1 << 5)
-MATCH_CPUID = (0x1 << 6)
-
-
-
[docs]def check_rules(efi: EFI_SECTION, rules: Dict[str, Any], entry_name: str, _log: Callable, bLog: bool = True, cpuid: Optional[str] = None) -> bool:
-    bfound = False
-    for name, rule in rules.items():
-        what = None
-        cpuidwhat = None
-        offset = 0
-        match_mask = 0x00000000
-        match_result = 0x00000000
-        fname = f'{entry_name}.{name}'
-        #
-        # Determine which criteria are defined in the current rule
-        #
-        if ('name' in rule) and (rule['name'] != ''):
-            match_mask |= MATCH_NAME
-        if ('guid' in rule) and (rule['guid'] != ''):
-            match_mask |= MATCH_GUID
-            if type(rule['guid']) == str:
-                rule['guid'] = UUID(rule['guid'])
-        if ('regexp' in rule) and (rule['regexp'] != ''):
-            match_mask |= MATCH_REGEXP
-        if ('md5' in rule) and (rule['md5'] != ''):
-            match_mask |= MATCH_HASH_MD5
-        if ('sha1' in rule) and (rule['sha1'] != ''):
-            match_mask |= MATCH_HASH_SHA1
-        if ('sha256' in rule) and (rule['sha256'] != ''):
-            match_mask |= MATCH_HASH_SHA256
-        if ('cpuid' in rule) and (rule['cpuid'] != ''):
-            match_mask |= MATCH_CPUID
-        #
-        # Check criteria defined in the current rule against the current EFI module
-        #
-        if (match_mask & MATCH_NAME) == MATCH_NAME:
-            if efi.ui_string == rule['name']:
-                match_result |= MATCH_NAME
-        if (match_mask & MATCH_GUID) == MATCH_GUID:
-            if (type(efi) is EFI_SECTION and efi.parentGuid == rule['guid']) or \
-               (efi.Guid == rule['guid']):
-                match_result |= MATCH_GUID
-        if (match_mask & MATCH_REGEXP) == MATCH_REGEXP:
-            m = re.compile(bytes(rule['regexp'], 'utf-8')).search(efi.Image)
-            if m:
-                match_result |= MATCH_REGEXP
-                _str = m.group(0)
-                hexver = _str.hex()
-                printver = f" ('{_str}')" if defines.is_printable(_str) else ''
-                what = f"bytes '{hexver}'{printver}"
-                offset = m.start()
-        if (match_mask & MATCH_HASH_MD5) == MATCH_HASH_MD5:
-            if efi.MD5 == rule['md5']:
-                match_result |= MATCH_HASH_MD5
-        if (match_mask & MATCH_HASH_SHA1) == MATCH_HASH_SHA1:
-            if efi.SHA1 == rule['sha1']:
-                match_result |= MATCH_HASH_SHA1
-        if (match_mask & MATCH_HASH_SHA256) == MATCH_HASH_SHA256:
-            if efi.SHA256 == rule['sha256']:
-                match_result |= MATCH_HASH_SHA256
-        if (match_mask & MATCH_CPUID) == MATCH_CPUID:
-            if cpuid is None:
-                cpuidwhat = f"Unable to identify platform. Check system's CPUID and compare it against list:\n\t\t{rule['cpuid']}"
-                match_result |= MATCH_CPUID
-            else:
-                cpuids = rule['cpuid'].upper().split(',')
-                if f'{cpuid:X}' in cpuids:
-                    cpuidwhat = f'{cpuid:X}'
-                    match_result |= MATCH_CPUID
-
-        brule_match = ((match_result & match_mask) == match_mask)
-        if brule_match and bLog:
-            _log.log_important(f"match '{fname}'")
-            if (match_result & MATCH_NAME) == MATCH_NAME:
-                _log.log(f"\tname  : '{rule['name']}'")
-            if (match_result & MATCH_GUID) == MATCH_GUID:
-                _log.log(f"\tGUID  : {{{rule['guid']}}}")
-            if (match_result & MATCH_REGEXP) == MATCH_REGEXP:
-                _log.log(f"\tregexp: bytes '{what}' at offset {offset:X}h")
-            if (match_result & MATCH_HASH_MD5) == MATCH_HASH_MD5:
-                _log.log(f"\tMD5   : {rule['md5']}")
-            if (match_result & MATCH_HASH_SHA1) == MATCH_HASH_SHA1:
-                _log.log(f"\tSHA1  : {rule['sha1']}")
-            if (match_result & MATCH_HASH_SHA256) == MATCH_HASH_SHA256:
-                _log.log(f"\tSHA256: {rule['sha256']}")
-            if (match_result & MATCH_CPUID) == MATCH_CPUID:
-                _log.log(f"\tCPUID: {cpuidwhat}")
-        #
-        # Rules are OR'ed unless matching rule is explicitly excluded from match
-        #
-        bfound = bfound or brule_match
-
-    return bfound

-
-
-
[docs]def check_match_criteria(efi: EFI_SECTION, criteria: Dict[str, Dict[str, Dict[str, str]]], _log: Callable, cpuid: Optional[str] = None) -> bool:
-    bfound = False
-    if _log is None:
-        _log = logger()
-    _log.log(f'[uefi] Checking {efi.name()}')
-    for k in criteria.keys():
-        entry = criteria[k]
-        # Check if the EFI binary is a match
-        if 'match' in entry:
-            bmatch = check_rules(efi, entry['match'], k, _log, cpuid=cpuid)
-            if bmatch:
-                _log.log_important(f"found EFI binary matching '{k}'")
-                if 'description' in entry:
-                    _log.log(f"    {entry['description']}")
-                _log.log(str(efi))
-                # Check if the matched binary should be excluded
-                # There's no point in checking a binary against exclusions if it wasn't a match
-                if 'exclude' in entry:
-                    if check_rules(efi, entry['exclude'], f'{k}.exclude', _log, cpuid=cpuid):
-                        _log.log_important(f"matched EFI binary is excluded from '{k}'. Skipping...")
-                        continue
-            # we are here if the matched binary wasn't excluded
-            # the binary is a final match if it matches either of search entries
-            bfound = bfound or bmatch
-
-    return bfound

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/virtmem.html b/_modules/chipsec/hal/virtmem.html deleted file mode 100644 index 465d2f1c..00000000 --- a/_modules/chipsec/hal/virtmem.html +++ /dev/null @@ -1,246 +0,0 @@ - - - - - - - - chipsec.hal.virtmem — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.virtmem

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Access to virtual memory
-
-usage:
-    >>> read_virtual_mem( 0xf0000, 0x100 )
-    >>> write_virtual_mem( 0xf0000, 0x100, buffer )
-    >>> write_virtual_mem_dowrd( 0xf0000, 0xdeadbeef )
-    >>> read_virtual_mem_dowrd( 0xfed40000 )
-"""
-
-import struct
-from typing import Tuple
-from chipsec.logger import logger, print_buffer_bytes
-from chipsec.hal import hal_base
-
-
-
[docs]class VirtMemory(hal_base.HALBase):
-    def __init__(self, cs):
-        super(VirtMemory, self).__init__(cs)
-        self.helper = cs.helper
-
-    ####################################################################################
-    #
-    # virtual memory API using 64b virtual Address
-    # (Same functions as below just using 64b PA instead of High and Low 32b parts of PA)
-    #
-    ####################################################################################
-
-    # Reading virtual memory
-
-
[docs]    def read_virtual_mem(self, virt_address: int, length: int) -> int:
-        logger().log_hal(f'[mem] 0x{virt_address:016X}')
-        phys_address = self.va2pa(virt_address)
-        return self.helper.read_phys_mem(phys_address, length)

-
-
[docs]    def read_virtual_mem_dword(self, virt_address: int) -> int:
-        phys_address = self.va2pa(virt_address)
-        out_buf = self.helper.read_phys_mem(phys_address, 4)
-        value = struct.unpack('=I', out_buf)[0]
-        logger().log_hal(f'[mem] dword at VA = 0x{virt_address:016X}: 0x{value:08X}')
-        return value

-
-
[docs]    def read_virtual_mem_word(self, virt_address: int) -> int:
-        phys_address = self.va2pa(virt_address)
-        out_buf = self.helper.read_phys_mem(phys_address, 2)
-        value = struct.unpack('=H', out_buf)[0]
-        logger().log_hal(f'[mem] word at VA = 0x{virt_address:016X}: 0x{value:04X}')
-        return value

-
-
[docs]    def read_virtual_mem_byte(self, virt_address: int) -> int:
-        phys_address = self.va2pa(virt_address)
-        out_buf = self.helper.read_phys_mem(phys_address, 1)
-        value = struct.unpack('=B', out_buf)[0]
-        logger().log_hal(f'[mem] byte at VA = 0x{virt_address:016X}: 0x{value:02X}')
-        return value

-
-    # Writing virtual memory
-
-
[docs]    def write_virtual_mem(self, virt_address: int, length: int, buf: bytes) -> int:
-        logger().log_hal(f'[mem] buffer len = 0x{length:X} to VA = 0x{virt_address:016X}')
-        if logger().HAL:
-            print_buffer_bytes(buf)
-        phys_address = self.va2pa(virt_address)
-        return self.helper.write_phys_mem(phys_address, length, buf)

-
-
[docs]    def write_virtual_mem_dword(self, virt_address: int, dword_value: int) -> int:
-        logger().log_hal(f'[mem] dword to VA = 0x{virt_address:016X} <- 0x{dword_value:08X}')
-        phys_address = self.va2pa(virt_address)
-        return self.helper.write_phys_mem(phys_address, 4, struct.pack('I', dword_value))

-
-
[docs]    def write_virtual_mem_word(self, virt_address: int, word_value: int) -> int:
-        logger().log_hal(f'[mem] word to VA = 0x{virt_address:016X} <- 0x{word_value:04X}')
-        phys_address = self.va2pa(virt_address)
-        return self.helper.write_phys_mem(phys_address, 2, struct.pack('H', word_value))

-
-
[docs]    def write_virtual_mem_byte(self, virt_address: int, byte_value: int) -> int:
-        logger().log_hal(f'[mem] byte to VA = 0x{virt_address:016X} <- 0x{byte_value:02X}')
-        phys_address = self.va2pa(virt_address)
-        return self.helper.write_phys_mem(phys_address, 1, struct.pack('B', byte_value))

-
-    # Allocate virtual memory buffer
-
-
[docs]    def alloc_virtual_mem(self, length: int, max_phys_address: int = 0xFFFFFFFFFFFFFFFF) -> Tuple[int, int]:
-        (va, pa) = self.helper.alloc_phys_mem(length, max_phys_address)
-        logger().log_hal(f'[mem] Allocated: PA = 0x{pa:016X}, VA = 0x{va:016X}')
-        return (va, pa)

-
-
[docs]    def va2pa(self, va: int) -> int:
-        (pa, error_code) = self.helper.va2pa(va)
-        if error_code:
-            logger().log_hal(f'[mem] Looks like VA (0x{va:016X}) not mapped')
-            return va
-        logger().log_hal(f'[mem] VA (0x{va:016X}) -> PA (0x{pa:016X})')
-        return pa

-
-
[docs]    def free_virtual_mem(self, virt_address: int) -> bool:
-        pa = self.va2pa(virt_address)
-        ret = self.helper.free_phys_mem(pa)
-        logger().log_hal(f'[mem] Deallocated : VA = 0x{virt_address:016X}')
-        return ret == 1

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/hal/vmm.html b/_modules/chipsec/hal/vmm.html deleted file mode 100644 index 9ec2dc05..00000000 --- a/_modules/chipsec/hal/vmm.html +++ /dev/null @@ -1,281 +0,0 @@ - - - - - - - - chipsec.hal.vmm — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.hal.vmm

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-VMM specific functionality
-1. Hypervisor hypercall interfaces
-2. Second-level Address Translation (SLAT)
-3. VirtIO devices
-4. ...
-
-"""
-
-import struct
-
-from typing import AnyStr, Dict, List, Optional, Tuple
-from chipsec.logger import logger, pretty_print_hex_buffer
-import chipsec.hal.pcidb
-
-
-
[docs]class VMM:
-
-    def __init__(self, cs):
-        self.cs = cs
-        self.helper = cs.helper
-        self.output = ''
-        (self.membuf0_va, self.membuf0_pa) = (0, 0)
-        (self.membuf1_va, self.membuf1_pa) = (0, 0)
-
-        chipsec.hal.pcidb.VENDORS[VIRTIO_VID] = VIRTIO_VENDOR_NAME
-        chipsec.hal.pcidb.DEVICES[VIRTIO_VID] = VIRTIO_DEVICES
-
-    def __del__(self):
-        if self.membuf0_va != 0:
-            (self.membuf0_va, self.membuf0_pa) = (0, 0)
-            (self.membuf1_va, self.membuf1_pa) = (0, 0)
-
-
[docs]    def init(self) -> None:
-        (self.membuf0_va, self.membuf0_pa) = self.cs.mem.alloc_physical_mem(0x2000, 0xFFFFFFFFFFFFFFFF)
-        (self.membuf1_va, self.membuf1_pa) = (self.membuf0_va + 0x1000, self.membuf0_pa + 0x1000)
-        if self.membuf0_va == 0:
-            logger().log("[vmm] Could not allocate memory!")
-            raise Exception("[vmm] Could not allocate memory!")

-
-    # Generic hypercall interface
-
-
[docs]    def hypercall(self, rax: int, rbx: int, rcx: int, rdx: int, rdi: int, rsi: int, r8: int = 0, r9: int = 0, r10: int = 0, r11: int = 0, xmm_buffer: int = 0) -> int:
-        return self.helper.hypercall(rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer)

-
-    # Hypervisor-specific hypercall interfaces
-
-
[docs]    def hypercall64_five_args(self, vector: int, arg1: int = 0, arg2: int = 0, arg3: int = 0, arg4: int = 0, arg5: int = 0) -> int:
-        return self.helper.hypercall(0, arg3, arg5, 0, arg4, 0, vector, 0, arg1, arg2)

-
-
[docs]    def hypercall64_memory_based(self, hypervisor_input_value: int, parameters: AnyStr, size: int = 0) -> int:
-        self.cs.mem.write_physical_mem(self.membuf0_pa, len(parameters[:0x1000]), parameters[:0x1000])
-        regs = self.helper.hypercall(hypervisor_input_value & ~0x00010000, self.membuf0_pa, self.membuf1_pa)
-        self.output = self.helper.read_phys_mem(self.membuf1_pa, size) if size > 0 else ''
-        return regs

-
-
[docs]    def hypercall64_fast(self, hypervisor_input_value: int, param0: int = 0, param1: int = 0) -> int:
-        return self.helper.hypercall(hypervisor_input_value | 0x00010000, param0, param1)

-
-
[docs]    def hypercall64_extended_fast(self, hypervisor_input_value: int, parameter_block: bytes) -> int:
-        (param0, param1, xmm_regs) = struct.unpack('<QQ96s', parameter_block)
-        self.cs.mem.write_physical_mem(self.membuf0_pa, 0x60, xmm_regs)
-        return self.helper.hypercall(hypervisor_input_value | 0x00010000, param0, param1, 0, 0, 0, 0, 0, 0, 0, self.membuf0_va)

-
-    #
-    # Dump EPT page tables at specified physical base (EPT pointer)
-    #
-
[docs]    def dump_EPT_page_tables(self, eptp: str, pt_fname: Optional[str] = None) -> None:
-        _orig_logname = logger().LOG_FILE_NAME
-        paging_ept = chipsec.hal.paging.c_extended_page_tables(self.cs)
-        logger().log_hal(f'[vmm] Dumping EPT paging hierarchy at EPTP 0x{eptp:08X}...')
-        if pt_fname is None:
-            pt_fname = (f'ept_{eptp:08X}')
-        logger().set_log_file(pt_fname, False)
-        paging_ept.read_pt_and_show_status(pt_fname, 'EPT', eptp)
-        logger().set_log_file(_orig_logname, False)
-        if paging_ept.failure:
-            logger().log_error('Could not dump EPT page tables')

-
-
-################################################################################
-#
-# VirtIO functions
-#
-################################################################################
-
-VIRTIO_VID: int = 0x1AF4
-VIRTIO_VENDOR_NAME: str = 'Red Hat, Inc.'
-VIRTIO_VENDORS: List[int] = [VIRTIO_VID]
-VIRTIO_DEVICES: Dict[int, str] = {
-    0x1000: 'VirtIO Network',
-    0x1001: 'VirtIO Block',
-    0x1002: 'VirtIO Baloon',
-    0x1003: 'VirtIO Console',
-    0x1004: 'VirtIO SCSI',
-    0x1005: 'VirtIO RNG',
-    0x1009: 'VirtIO filesystem',
-    0x1041: 'VirtIO network (1.0)',
-    0x1042: 'VirtIO block (1.0)',
-    0x1043: 'VirtIO console (1.0)',
-    0x1044: 'VirtIO RNG (1.0)',
-    0x1045: 'VirtIO memory balloon (1.0)',
-    0x1046: 'VirtIO SCSI (1.0)',
-    0x1049: 'VirtIO filesystem (1.0)',
-    0x1050: 'VirtIO GPU (1.0)',
-    0x1052: 'VirtIO input (1.0)',
-    0x1110: 'VirtIO Inter-VM shared memory'
-}
-
-
-
[docs]def get_virtio_devices(devices: List[Tuple[int, int, int, int, int]]) -> List[Tuple[int, int, int, int, int]]:
-    virtio_devices = []
-    for (b, d, f, vid, did) in devices:
-        if vid in VIRTIO_VENDORS:
-            virtio_devices.append((b, d, f, vid, did))
-    return virtio_devices

-
-
-
[docs]class VirtIO_Device:
-
-    def __init__(self, cs, b, d, f):
-        self.cs = cs
-        self.bus = b
-        self.dev = d
-        self.fun = f
-
-
[docs]    def dump_device(self) -> None:
-        logger().log(f"\n[vmm] VirtIO device {self.bus:02X}:{self.dev:02X}.{self.fun:01X}")
-        dev_cfg = self.cs.pci.dump_pci_config(self.bus, self.dev, self.fun)
-        pretty_print_hex_buffer(dev_cfg)
-        bars = self.cs.pci.get_device_bars(self.bus, self.dev, self.fun)
-        for (bar, isMMIO, _, _, _, size) in bars:
-            if isMMIO:
-                self.cs.mmio.dump_MMIO(bar, size)
-            else:
-                self.cs.io.dump_IO(bar, size, 4)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/basehelper.html b/_modules/chipsec/helper/basehelper.html deleted file mode 100644 index e332d8a0..00000000 --- a/_modules/chipsec/helper/basehelper.html +++ /dev/null @@ -1,384 +0,0 @@ - - - - - - - - chipsec.helper.basehelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.basehelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-from abc import ABC, abstractmethod
-from typing import Dict, List, Tuple, Optional, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.library.types import EfiVariableType
-    from ctypes import Array
-
-# Base class for the helpers
-
-
-
[docs]class Helper(ABC):
-    class __metaclass__(type):
-        def __init__(cls, name, bases, attrs):
-            if not hasattr(cls, 'registry'):
-                cls.registry = []
-            else:
-                cls.registry.append((name, cls))
-
-    @abstractmethod
-    def __init__(self):
-        self.driver_loaded = False
-        self.os_system = 'basehelper'
-        self.os_release = '0.0'
-        self.os_version = '0.0'
-        self.os_machine = 'base'
-        self.name = 'Helper'
-        self.driverpath = ''
-
-
[docs]    @abstractmethod
-    def create(self) -> bool:
-        pass

-
-
[docs]    @abstractmethod
-    def start(self) -> bool:
-        pass

-
-
[docs]    @abstractmethod
-    def stop(self) -> bool:
-        pass

-
-
[docs]    @abstractmethod
-    def delete(self) -> bool:
-        pass

-
-
[docs]    def get_info(self) -> Tuple[str, str]:
-        return self.name, self.driverpath

-
-    #################################################################################################
-    # Actual OS helper functionality accessible to HAL components
-
-    #
-    # Read/Write PCI configuration registers via legacy CF8/CFC ports
-    #
-
[docs]    @abstractmethod
-    def read_pci_reg(self, bus: int, device: int, function: int, address: int, size: int) -> int:
-        pass

-
-
[docs]    @abstractmethod
-    def write_pci_reg(self, bus: int, device: int, function: int, address: int, value: int, size: int) -> int:
-        pass

-
-    #
-    # read/write mmio
-    #
-
[docs]    @abstractmethod
-    def read_mmio_reg(self, phys_address: int, size: int) -> int:
-        pass

-
-
[docs]    @abstractmethod
-    def write_mmio_reg(self, phys_address: int, size: int, value: int) -> int:
-        pass

-
-    #
-    # physical_address is 64 bit integer
-    #
-
[docs]    @abstractmethod
-    def read_phys_mem(self, phys_address: int, size: int) -> bytes:
-        pass

-
-
[docs]    @abstractmethod
-    def write_phys_mem(self, phys_address: int, size: int, buffer: bytes) -> int:
-        pass

-
-
[docs]    @abstractmethod
-    def alloc_phys_mem(self, size: int, max_phys_address: int) -> Tuple[int, int]:
-        pass

-
-
[docs]    @abstractmethod
-    def free_phys_mem(self, phys_address: int):
-        pass

-
-
[docs]    @abstractmethod
-    def va2pa(self, virtual_address: int) -> Tuple[int, int]:
-        pass

-
-
[docs]    @abstractmethod
-    def map_io_space(self, phys_address: int, size: int, cache_type: int) -> int:
-        pass

-
-    #
-    # Read/Write I/O port
-    #
-
[docs]    @abstractmethod
-    def read_io_port(self, io_port: int, size: int) -> int:
-        pass

-
-
[docs]    @abstractmethod
-    def write_io_port(self, io_port: int, value: int, size: int) -> int:
-        pass

-
-    #
-    # Read/Write CR registers
-    #
-
[docs]    @abstractmethod
-    def read_cr(self, cpu_thread_id: int, cr_number: int) -> int:
-        pass

-
-
[docs]    @abstractmethod
-    def write_cr(self, cpu_thread_id: int, cr_number: int, value: int) -> int:
-        pass

-
-    #
-    # Read/Write MSR on a specific CPU thread
-    #
-
[docs]    @abstractmethod
-    def read_msr(self, cpu_thread_id: int, msr_addr: int) -> Tuple[int, int]:
-        pass

-
-
[docs]    @abstractmethod
-    def write_msr(self, cpu_thread_id: int, msr_addr: int, eax: int, edx: int) -> int:
-        pass

-
-    #
-    # Load CPU microcode update on a specific CPU thread
-    #
-
[docs]    @abstractmethod
-    def load_ucode_update(self, cpu_thread_id: int, ucode_update_buffer: bytes) -> bool:
-        pass

-
-    #
-    # Read IDTR/GDTR/LDTR on a specific CPU thread
-    #
-
[docs]    @abstractmethod
-    def get_descriptor_table(self, cpu_thread_id: int, desc_table_code: int) -> Optional[Tuple[int, int, int]]:
-        pass

-
-    #
-    # EFI Variable API
-    #
-
[docs]    @abstractmethod
-    def EFI_supported(self) -> bool:
-        pass

-
-
[docs]    @abstractmethod
-    def get_EFI_variable(self, name: str, guid: str) -> Optional[bytes]:
-        pass

-
-
[docs]    @abstractmethod
-    def set_EFI_variable(self, name: str, guid: str, buffer: bytes, buffer_size: Optional[int], attrs: Optional[int]) -> Optional[int]:
-        pass

-
-
[docs]    @abstractmethod
-    def delete_EFI_variable(self, name: str, guid: str) -> Optional[int]:
-        pass

-
-
[docs]    @abstractmethod
-    def list_EFI_variables(self) -> Optional[Dict[str, List['EfiVariableType']]]:
-        pass

-
-    #
-    # ACPI
-    #
-
[docs]    @abstractmethod
-    def get_ACPI_SDT(self) -> Tuple[Optional['Array'], bool]:
-        pass

-
-
[docs]    @abstractmethod
-    def get_ACPI_table(self, table_name: str) -> Optional['Array']:
-        pass

-
-    #
-    # CPUID
-    #
-
[docs]    @abstractmethod
-    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        pass

-
-    #
-    # IOSF Message Bus access
-    #
-
[docs]    @abstractmethod
-    def msgbus_send_read_message(self, mcr: int, mcrx: int) -> Optional[int]:
-        pass

-
-
[docs]    @abstractmethod
-    def msgbus_send_write_message(self, mcr: int, mcrx: int, mdr: int) -> None:
-        pass

-
-
[docs]    @abstractmethod
-    def msgbus_send_message(self, mcr: int, mcrx: int, mdr: Optional[int]) -> Optional[int]:
-        pass

-
-    #
-    # Affinity
-    #
-
[docs]    @abstractmethod
-    def get_affinity(self) -> Optional[int]:
-        pass

-
-
[docs]    @abstractmethod
-    def set_affinity(self, value: int) -> Optional[int]:
-        pass

-
-    #
-    # Logical CPU count
-    #
-
[docs]    @abstractmethod
-    def get_threads_count(self) -> int:
-        pass

-
-    #
-    # Send SW SMI
-    #
-
[docs]    @abstractmethod
-    def send_sw_smi(self, cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) -> Optional[int]:
-        pass

-
-    #
-    # Hypercall
-    #
-
[docs]    @abstractmethod
-    def hypercall(self, rcx: int, rdx: int, r8: int, r9: int, r10: int, r11: int, rax: int, rbx: int, rdi: int, rsi: int, xmm_buffer: int) -> int:
-        pass

-
-    #
-    # Speculation control
-    #
-
[docs]    @abstractmethod
-    def retpoline_enabled(self) -> bool:
-        pass

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/dal/dalhelper.html b/_modules/chipsec/helper/dal/dalhelper.html deleted file mode 100644 index 1b351719..00000000 --- a/_modules/chipsec/helper/dal/dalhelper.html +++ /dev/null @@ -1,539 +0,0 @@ - - - - - - - - chipsec.helper.dal.dalhelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.dal.dalhelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Intel DFx Abstraction Layer (DAL) helper
-
-From the Intel(R) DFx Abstraction Layer Python* Command Line Interface User Guide
-
-"""
-
-import struct
-
-from chipsec.logger import logger
-try:
-    import itpii
-except:
-    pass
-from ctypes import c_char
-from typing import Tuple
-from chipsec.helper.basehelper import Helper
-from chipsec.exceptions import DALHelperError, UnimplementedAPIError
-
-
-
[docs]class DALHelper(Helper):
-    def __init__(self):
-        super(DALHelper, self).__init__()
-        self.base = itpii.baseaccess()
-        self.is_system_halted = True
-        logger().log_debug('[helper] DAL Helper')
-        if not len(self.base.threads):
-            logger().log('[helper] No threads detected!  DAL Helper will fail to load!')
-        elif self.base.threads[self.find_thread()].cv.isrunning:
-            self.is_system_halted = False
-            self.base.halt()
-        self.os_system = '(Via Intel DAL)'
-        self.os_release = '(N/A)'
-        self.os_version = self.dal_version()
-        self.os_machine = self.target_machine()
-        self.name = "DALHelper"
-
-    def __del__(self):
-        if not len(self.base.threads):
-            logger().log('[helper] No threads detected!')
-        elif not self.is_system_halted:
-            logger().log('[helper] Threads are halted')
-        else:
-            self.base.go()
-            logger().log('[helper] Threads are running')
-
-
-###############################################################################################
-# Driver/service management functions
-###############################################################################################
-
-
[docs]    def create(self, start_driver: bool) -> bool:
-        logger().log_debug('[helper] DAL Helper created')
-        return True

-
-
[docs]    def start(self, start_driver: bool, driver_exhists: bool = False) -> bool:
-        self.driver_loaded = True
-        if self.base.threads[self.find_thread()].cv.isrunning:
-            self.base.halt()
-            self.is_system_halted = False
-        logger().log_debug('[helper] DAL Helper started/loaded')
-        return True

-
-
[docs]    def stop(self) -> bool:
-        if not self.is_system_halted:
-            self.base.go()
-        logger().log_debug('[helper] DAL Helper stopped/unloaded')
-        return True

-
-
[docs]    def delete(self) -> bool:
-        logger().log_debug('[helper] DAL Helper deleted')
-        return True

-
-
-###############################################################################################
-# Functions to get information about the remote target
-###############################################################################################
-
-
[docs]    def target_machine(self) -> str:
-        return f'{self.base.devicelist[0].devicetype}-{self.base.devicelist[0].stepping}'

-
-
[docs]    def dal_version(self) -> str:
-        return self.base.cv.version

-
-    # return first enabled thread
-
[docs]    def find_thread(self) -> int:
-        for en_thread in range(len(self.base.threads)):
-            if self.base.threads[en_thread].isenabled:
-                return en_thread
-        logger().log_debug('[WARNING] No enabled threads found.')
-        return 0

-
-###############################################################################################
-# Actual API functions to access HW resources
-###############################################################################################
-
-    #
-    # PCIe configuration access
-    #
-
-
[docs]    def pci_addr(self, bus: int, device: int, function: int, offset: int) -> int:
-        if (bus >= 256) or (device >= 32) or (function >= 8) or (offset >= 256):
-            logger().log_debug('[WARNING] PCI access out of range. Use mmio functions to access PCIEXBAR.')
-        config_addr = self.base.threads[self.find_thread()].dport(0xCF8)
-        config_addr &= 0x7f000003
-        config_addr |= 0x80000000
-        config_addr |= (bus & 0xFF) << 16
-        config_addr |= (device & 0x1F) << 11
-        config_addr |= (function & 0x07) << 8
-        config_addr |= (offset & 0xFF) << 0
-        return config_addr

-
-
[docs]    def read_pci_reg(self, bus: int, device: int, function: int, address: int, size: int) -> int:
-        ie_thread = self.find_thread()
-        self.base.threads[ie_thread].dport(0xCF8, self.pci_addr(bus, device, function, address))
-        value = (self.base.threads[ie_thread].dport(0xCFC) >> ((address % 4) * 8))
-        if 1 == size:
-            value &= 0xFF
-        elif 2 == size:
-            value &= 0xFFFF
-        return value.ToUInt32()

-
-
[docs]    def write_pci_reg(self, bus: int, device: int, function: int, address: int, dword_value: int, size: int) -> int:
-        ie_thread = self.find_thread()
-        self.base.threads[ie_thread].dport(0xCF8, self.pci_addr(bus, device, function, address))
-        old_value = self.base.threads[ie_thread].dport(0xCFC)
-        self.base.threads[ie_thread].dport(0xCFC, dword_value)
-        return old_value

-
-    #
-    # Physical memory access
-    #
-
-
[docs]    def read_phys_mem(self, phys_address: int, length: int, bytewise: bool = False) -> bytes:
-        if bytewise:
-            width = 1
-        else:
-            width = 8
-        out_buf = (c_char * length)()
-        ptr = 0
-        format = {1: 'B', 2: 'H', 4: 'L', 8: 'Q'}
-        while width >= 1:
-            while (length - ptr) >= width:
-                v = self.base.threads[self.find_thread()].mem(itpii.Address((phys_address + ptr), itpii.AddressType.physical), width)
-                struct.pack_into(format[width], out_buf, ptr, v.ToUInt64())
-                ptr += width
-            width = width // 2
-        return b''.join(out_buf)

-
-
[docs]    def write_phys_mem(self, phys_address: int, length: int, buf: bytes, bytewise: bool = False) -> int:
-        if bytewise:
-            width = 1
-        else:
-            width = 8
-        ptr = 0
-        format = {1: 'B', 2: 'H', 4: 'L', 8: 'Q'}
-        while width >= 1:
-            while (length - ptr) >= width:
-                v = struct.unpack_from(format[width], buf, ptr)
-                self.base.threads[self.find_thread()].mem(itpii.Address((phys_address + ptr), itpii.AddressType.physical), width, v[0])
-                ptr += width
-            width = width // 2
-        return 1

-
-
[docs]    def va2pa(self, va):
-        raise UnimplementedAPIError('va2pa')

-
-
[docs]    def alloc_phys_mem(self, length, max_phys_address):
-        raise UnimplementedAPIError('alloc_phys_mem')

-
-
[docs]    def free_phys_mem(self, physical_address):
-        raise UnimplementedAPIError('free_phys_mem')

-
-    #
-    # CPU I/O port access
-    #
-
-
[docs]    def read_io_port(self, io_port: int, size: int) -> int:
-        if size == 1:
-            val = self.base.threads[self.find_thread()].port(io_port)
-        elif size == 2:
-            val = self.base.threads[self.find_thread()].wport(io_port)
-        elif size == 4:
-            val = self.base.threads[self.find_thread()].dport(io_port)
-        else:
-            raise DALHelperError(size, 'is not a valid IO port size.')
-        return val.ToUInt32()

-
-
[docs]    def write_io_port(self, io_port: int, value: int, size: int) -> int:
-        if size == 1:
-            ret = self.base.threads[self.find_thread()].port(io_port, value)
-        elif size == 2:
-            ret = self.base.threads[self.find_thread()].wport(io_port, value)
-        elif size == 4:
-            ret = self.base.threads[self.find_thread()].dport(io_port, value)
-        else:
-            raise DALHelperError(size, 'is not a valid IO port size.')
-        return ret

-
-    #
-    # CPU related API
-    #
-
-
[docs]    def read_msr(self, thread: int, msr_addr: int) -> Tuple[int, int]:
-        if not self.base.threads[thread].isenabled:
-            en_thread = self.find_thread()
-            logger().log_debug(f'[WARNING] Selected thread [{thread:d}] was disabled, using [{en_thread:d}].')
-            thread = en_thread
-        val = self.base.threads[thread].msr(msr_addr)
-        edx = (val.ToUInt64() >> 32)
-        eax = val.ToUInt64() & 0xffffffff
-        return (eax, edx)

-
-
[docs]    def write_msr(self, thread: int, msr_addr: int, eax: int, edx: int) -> int:
-        if not self.base.threads[thread].isenabled:
-            en_thread = self.find_thread()
-            logger().log_debug(f'[WARNING] Selected thread [{thread:d}] was disabled, using [{en_thread:d}].')
-            thread = en_thread
-        val = (edx << 32) | eax
-        self.base.threads[thread].msr(msr_addr, val)
-        return True

-
-
[docs]    def read_cr(self, cpu_thread_id: int, cr_number: int) -> int:
-        if not self.base.threads[cpu_thread_id].isenabled:
-            en_thread = self.find_thread()
-            logger().log_debug(f'[WARNING] Selected thread [{cpu_thread_id:d}] was disabled, using [{en_thread:d}].')
-            cpu_thread_id = en_thread
-        if cr_number == 0:
-            val = self.base.threads[cpu_thread_id].state.regs.cr0.value
-        elif cr_number == 2:
-            val = self.base.threads[cpu_thread_id].state.regs.cr2.value
-        elif cr_number == 3:
-            val = self.base.threads[cpu_thread_id].state.regs.cr3.value
-        elif cr_number == 4:
-            val = self.base.threads[cpu_thread_id].state.regs.cr4.value
-        elif cr_number == 8:
-            val = self.base.threads[cpu_thread_id].state.regs.cr8.value
-        else:
-            logger().log_debug(f'[ERROR] Selected CR{cr_number:d} is not supported.')
-            val = 0
-        return val

-
-
[docs]    def write_cr(self, cpu_thread_id: int, cr_number: int, value: int) -> int:
-        if not self.base.threads[cpu_thread_id].isenabled:
-            en_thread = self.find_thread()
-            logger().log_debug(f'[WARNING] Selected thread [{cpu_thread_id:d}] was disabled, using [{en_thread:d}].')
-            cpu_thread_id = en_thread
-        if cr_number == 0:
-            self.base.threads[cpu_thread_id].state.regs.cr0 = value
-        elif cr_number == 2:
-            self.base.threads[cpu_thread_id].state.regs.cr2 = value
-        elif cr_number == 3:
-            self.base.threads[cpu_thread_id].state.regs.cr3 = value
-        elif cr_number == 4:
-            self.base.threads[cpu_thread_id].state.regs.cr4 = value
-        elif cr_number == 8:
-            self.base.threads[cpu_thread_id].state.regs.cr8 = value
-        else:
-            logger().log_debug(f'[ERROR] Selected CR{cr_number:d} is not supported.')
-            return False
-        return True

-
-
[docs]    def load_ucode_update(self, core_id, ucode_update_buf):
-        raise UnimplementedAPIError('load_ucode_update')

-
-
[docs]    def get_threads_count(self) -> int:
-        no_threads = len(self.base.threads)
-        logger().log_debug(f'[helper] Threads discovered : 0x{no_threads:X} ({no_threads:d})')
-        return no_threads

-
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        ie_thread = self.find_thread()
-        reax = self.base.threads[ie_thread].cpuid_eax(eax, ecx)
-        rebx = self.base.threads[ie_thread].cpuid_ebx(eax, ecx)
-        recx = self.base.threads[ie_thread].cpuid_ecx(eax, ecx)
-        redx = self.base.threads[ie_thread].cpuid_edx(eax, ecx)
-        return (reax, rebx, recx, redx)

-
-
[docs]    def get_descriptor_table(self, cpu_thread_id, desc_table_code):
-        raise UnimplementedAPIError('get_descriptor_table')

-
-
[docs]    def retpoline_enabled(self) -> bool:
-        return False

-
-    #
-    # EFI Variable API
-    #
-
-
[docs]    def EFI_supported(self) -> bool:
-        return False

-
-
[docs]    def delete_EFI_variable(self, name, guid):
-        raise UnimplementedAPIError('delete_EFI_variable')

-
-
[docs]    def list_EFI_variables(self):
-        raise UnimplementedAPIError('list_EFI_variables')

-
-
[docs]    def get_EFI_variable(self, name, guid, attrs):
-        raise UnimplementedAPIError('get_EFI_variable')

-
-
[docs]    def set_EFI_variable(self, name, guid, buffer, buffer_size, attrs):
-        raise UnimplementedAPIError('set_EFI_variable')

-
-    #
-    # Memory-mapped I/O (MMIO) access
-    #
-
-
[docs]    def map_io_space(self, physical_address: int, length: int, cache_type: int) -> int:
-        return physical_address

-
-
[docs]    def read_mmio_reg(self, phys_address: int, size: int) -> int:
-        out_buf = self.read_phys_mem(phys_address, size)
-        if size == 8:
-            value = struct.unpack('=Q', out_buf[:size])[0]
-        elif size == 4:
-            value = struct.unpack('=I', out_buf[:size])[0]
-        elif size == 2:
-            value = struct.unpack('=H', out_buf[:size])[0]
-        elif size == 1:
-            value = struct.unpack('=B', out_buf[:size])[0]
-        else:
-            value = 0
-        return value

-
-
[docs]    def write_mmio_reg(self, phys_address: int, size: int, value: int) -> int:
-        if size == 8:
-            buf = struct.pack('=Q', value)
-        elif size == 4:
-            buf = struct.pack('=I', value & 0xFFFFFFFF)
-        elif size == 2:
-            buf = struct.pack('=H', value & 0xFFFF)
-        elif size == 1:
-            buf = struct.pack('=B', value & 0xFF)
-        else:
-            buf = bytes(1)
-        return self.write_phys_mem(phys_address, size, buf)

-
-    #
-    # Interrupts
-    #
-
[docs]    def send_sw_smi(self, cpu_thread_id, SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi):
-        raise UnimplementedAPIError('send_sw_smi')

-
-
[docs]    def set_affinity(self, value):
-        raise UnimplementedAPIError('set_affinity')

-
-
[docs]    def get_affinity(self):
-        raise UnimplementedAPIError('get_affinity')

-
-    #
-    # ACPI tables access
-    #
-
[docs]    def get_ACPI_SDT(self):
-        raise UnimplementedAPIError('get_ACPI_SDT')

-
-
[docs]    def get_ACPI_table(self, table_name):
-        raise UnimplementedAPIError('get_ACPI_table')

-
-    #
-    # IOSF Message Bus access
-    #
-
[docs]    def msgbus_send_read_message(self, mcr, mcrx):
-        raise UnimplementedAPIError('msgbus_send_read_message')

-
-
[docs]    def msgbus_send_write_message(self, mcr, mcrx, mdr):
-        raise UnimplementedAPIError('msgbus_send_write_message')

-
-
[docs]    def msgbus_send_message(self, mcr, mcrx, mdr):
-        raise UnimplementedAPIError('msgbus_send_message')

-
-    #
-    # File system
-    #
-
[docs]    def get_tool_info(self, tool_type: str) -> Tuple[str, str]:
-        return ('', '')

-
-
-
[docs]    def hypercall(self, rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer):
-        raise UnimplementedAPIError('hypercall')

-
-
-
-
[docs]def get_helper() -> DALHelper:
-    return DALHelper()

-
-
-if __name__ == '__main__':
-    try:
-        print('Not doing anything...')
-
-    except DALHelperError as msg:
-        if logger().DEBUG:
-            logger().log_error(msg)
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/efi/efihelper.html b/_modules/chipsec/helper/efi/efihelper.html deleted file mode 100644 index 3b19aa2a..00000000 --- a/_modules/chipsec/helper/efi/efihelper.html +++ /dev/null @@ -1,511 +0,0 @@ - - - - - - - - chipsec.helper.efi.efihelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.efi.efihelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-# -------------------------------------------------------------------------------
-#
-# CHIPSEC: Platform Hardware Security Assessment Framework
-#
-# -------------------------------------------------------------------------------
-
-"""
-On UEFI use the efi package functions
-"""
-
-import struct
-import sys
-import uuid
-import os
-import edk2   # Python 3.6.8 on UEFI
-
-from typing import Dict, List, Optional, Tuple, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.library.types import EfiVariableType
-from chipsec.logger import logger
-from chipsec.helper.oshelper import get_tools_path
-from chipsec.helper.basehelper import Helper
-from chipsec.exceptions import UnimplementedAPIError
-
-
-_tools = {
-}
-
-
[docs]class EfiHelper(Helper):
-
-    def __init__(self):
-        super(EfiHelper, self).__init__()
-        self.name = "EfiHelper"
-        if sys.platform.startswith('EFI'):
-            self.os_system = sys.platform
-            self.os_release = "0.0"
-            self.os_version = "0.0"
-            self.os_machine = "i386"
-        else:
-            import platform
-            self.os_system = platform.system()
-            self.os_release = platform.release()
-            self.os_version = platform.version()
-            self.os_machine = platform.machine()
-            self.os_uname = platform.uname()
-
-    def __del__(self):
-        try:
-            destroy()
-        except NameError:
-            pass
-
-###############################################################################################
-# Driver/service management functions
-###############################################################################################
-
-
[docs]    def create(self) -> bool:
-        logger().log_debug('[helper] UEFI Helper created')
-        return True

-
-
[docs]    def start(self) -> bool:
-        # The driver is part of the modified version of edk2.
-        # It is always considered as loaded.
-        self.driver_loaded = True
-        logger().log_debug('[helper] UEFI Helper started/loaded')
-        return True

-
-
[docs]    def stop(self) -> bool:
-        logger().log_debug('[helper] UEFI Helper stopped/unloaded')
-        return True

-
-
[docs]    def delete(self) -> bool:
-        logger().log_debug('[helper] UEFI Helper deleted')
-        return True

-
-
-###############################################################################################
-# Actual API functions to access HW resources
-###############################################################################################
-
-    #
-    # Physical memory access
-    #
-
-
[docs]    def split_address(self, pa: int) -> Tuple[int, int]:
-        return (pa & 0xFFFFFFFF, (pa >> 32) & 0xFFFFFFFF)

-
-
[docs]    def read_phys_mem(self, phys_address: int, length: int) -> bytes:
-        pa_lo, pa_hi = self.split_address(phys_address)
-        return edk2.readmem(pa_lo, pa_hi, length)

-
-
[docs]    def write_phys_mem(self, phys_address: int, length: int, buf: bytes) -> int:
-        pa_lo, pa_hi = self.split_address(phys_address)
-        if type(buf) == bytearray:
-            buf = bytes(buf)
-        if 4 == length:
-            dword_value = struct.unpack('I', buf)[0]
-            res = edk2.writemem_dword(pa_lo, pa_hi, dword_value)
-        else:
-            res = edk2.writemem(pa_lo, pa_hi, buf)
-        return res

-
-
[docs]    def alloc_phys_mem(self, length: int, max_pa: int) -> Tuple[int, int]:
-        va = edk2.allocphysmem(length, max_pa)[0]
-        (pa, _) = self.va2pa(va)
-        return (va, pa)

-
-
[docs]    def va2pa(self, va: int) -> Tuple[int, int]:
-        pa = va  # UEFI shell has identity mapping
-        logger().log_debug(f'[helper] VA (0X{va:016X}) -> PA (0X{pa:016X})')
-        return (pa, 0)

-
-
[docs]    def pa2va(self, pa: int) -> int:
-        va = pa  # UEFI Shell has identity mapping
-        logger().log_debug(f'[helper] PA (0X{pa:016X}) -> VA (0X{va:016X})')
-        return va

-
-    #
-    # Memory-mapped I/O (MMIO) access
-    #
-
-
[docs]    def map_io_space(self, physical_address: int, length: int, cache_type: int) -> int:
-        return self.pa2va(physical_address)

-
-
[docs]    def read_mmio_reg(self, phys_address: int, size: int) -> int:
-        phys_address_lo = phys_address & 0xFFFFFFFF
-        phys_address_hi = (phys_address >> 32) & 0xFFFFFFFF
-        out_buf = edk2.readmem(phys_address_lo, phys_address_hi, size)
-        if size == 8:
-            value = struct.unpack('=Q', out_buf[:size])[0]
-        elif size == 4:
-            value = struct.unpack('=I', out_buf[:size])[0]
-        elif size == 2:
-            value = struct.unpack('=H', out_buf[:size])[0]
-        elif size == 1:
-            value = struct.unpack('=B', out_buf[:size])[0]
-        else:
-            value = 0
-        return value

-
-
[docs]    def write_mmio_reg(self, phys_address: int, size: int, value: int) -> int:
-        phys_address_lo = phys_address & 0xFFFFFFFF
-        phys_address_hi = (phys_address >> 32) & 0xFFFFFFFF
-        if size == 4:
-            ret = edk2.writemem_dword(phys_address_lo, phys_address_hi, value)
-        else:
-            buf = struct.pack(size * "B", value)
-            ret = edk2.writemem(phys_address_lo, phys_address_hi, buf)
-        return ret

-
-    #
-    # PCIe configuration access
-    #
-
-
[docs]    def read_pci_reg(self, bus: int, device: int, function: int, address: int, size: int) -> int:
-        if (1 == size):
-            return (edk2.readpci(bus, device, function, address, size) & 0xFF)
-        elif (2 == size):
-            return (edk2.readpci(bus, device, function, address, size) & 0xFFFF)
-        else:
-            return edk2.readpci(bus, device, function, address, size)

-
-
[docs]    def write_pci_reg(self, bus: int, device: int, function: int, address:int, value: int, size: int) -> int:
-        return edk2.writepci(bus, device, function, address, value, size)

-
-    #
-    # CPU I/O port access
-    #
-
-
[docs]    def read_io_port(self, io_port: int, size: int) -> int:
-        if (1 == size):
-            return (edk2.readio(io_port, size) & 0xFF)
-        elif (2 == size):
-            return (edk2.readio(io_port, size) & 0xFFFF)
-        else:
-            return edk2.readio(io_port, size)

-
-
[docs]    def write_io_port(self, io_port: int, value: int, size: int) -> int:
-        return edk2.writeio(io_port, size, value)

-
-    #
-    # SMI events
-    #
-
-
[docs]    def send_sw_smi(self, cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) -> None:
-        return edk2.swsmi(SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi)

-
-    #
-    # CPU related API
-    #
-
-
[docs]    def read_msr(self, cpu_thread_id: int, msr_addr: int) -> Tuple[int, int]:
-        (eax, edx) = edk2.rdmsr(msr_addr)
-        eax = eax % 2**32
-        edx = edx % 2**32
-        return (eax, edx)

-
-
[docs]    def write_msr(self, cpu_thread_id: int, msr_addr: int, eax: int, edx: int) -> int:
-        return edk2.wrmsr(msr_addr, eax, edx)

-
-
[docs]    def read_cr(self, cpu_thread_id: int, cr_number: int) -> int:
-        raise UnimplementedAPIError('read_cr')

-
-
[docs]    def write_cr(self, cpu_thread_id: int, cr_number: int, value: int) -> int:
-        raise UnimplementedAPIError('write_cr')

-
-
[docs]    def load_ucode_update(self, cpu_thread_id: int, ucode_update_buf: int) -> bool:
-        raise UnimplementedAPIError('load_ucode_update')

-
-
[docs]    def get_threads_count(self) -> int:
-        return 1

-
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        (reax, rebx, recx, redx) = edk2.cpuid(eax, ecx)
-        return (reax, rebx, recx, redx)

-
-
[docs]    def get_descriptor_table(self, cpu_thread_id: int, desc_table_code: int)-> None:
-        raise UnimplementedAPIError('get_descriptor_table')

-
-    #
-    # File system
-    #
-
-
[docs]    def get_tool_info(self, tool_type: str) -> Tuple[str, str]:
-        tool_name = _tools[tool_type] if tool_type in _tools else ''
-        tool_path = os.path.join(get_tools_path(), self.os_system.lower())
-        return (tool_name, tool_path)

-
-    #
-    # EFI Variable API
-    #
-
-
[docs]    def EFI_supported(self) -> bool:
-        return True

-
-
[docs]    def get_EFI_variable_full(self, name: str, guidstr: str) -> Tuple[int, Optional[bytes], int]:
-
-        size = 100
-        (Status, Attributes, newdata, DataSize) = edk2.GetVariable(name, guidstr, size)
-
-        if Status == 5:
-            size = DataSize + 1
-            (Status, Attributes, newdata, DataSize) = edk2.GetVariable(name, guidstr, size)
-
-        return (Status, newdata, Attributes)

-
-
[docs]    def get_EFI_variable(self, name: str, guidstr: str) -> Optional[bytes]:
-        (_, data, _) = self.get_EFI_variable_full(name, guidstr)
-        return data

-
-
[docs]    def set_EFI_variable(self, name: str, guidstr: str, buffer: bytes, buffer_size: Optional[int] = None, attrs: Optional[int] = 0x7) -> int:
-
-        if buffer_size is None:
-            buffer_size = len(buffer)
-        if attrs is None:
-            attrs = 0x07
-            if logger().VERBOSE:
-                logger().log_important(f'Setting attributes to: {attrs:04X}')
-        elif isinstance(attrs, bytes):
-            attrs =  struct.unpack("L", attrs)[0]
-
-        (Status, buffer_size, guidstr) = edk2.SetVariable(name, guidstr, int(attrs), buffer, buffer_size)
-
-        return Status

-
-
[docs]    def delete_EFI_variable(self, name: str, guid: str) -> int:
-        return self.set_EFI_variable(name, guid, bytes(4), 0, 0)

-
-
[docs]    def list_EFI_variables(self) -> Optional[Dict[str, List['EfiVariableType']]]:
-
-        off = 0
-        buf = b''
-        hdr = 0
-        attr = 0
-        var_list = list()
-        variables = dict()
-
-        status_dict = {0: "EFI_SUCCESS", 1: "EFI_LOAD_ERROR", 2: "EFI_INVALID_PARAMETER", 3: "EFI_UNSUPPORTED", 4: "EFI_BAD_BUFFER_SIZE", 5: "EFI_BUFFER_TOO_SMALL",
-                       6: "EFI_NOT_READY", 7: "EFI_DEVICE_ERROR", 8: "EFI_WRITE_PROTECTED", 9: "EFI_OUT_OF_RESOURCES", 14: "EFI_NOT_FOUND", 26: "EFI_SECURITY_VIOLATION"}
-
-        namestr = ''
-        size = 200
-        guidstr = str(uuid.uuid4())
-
-        search_complete = False
-        while not search_complete:
-            namestr += '\x00'
-            name = namestr.encode('utf-16-le')
-            guid = uuid.UUID(guidstr).bytes_le
-            (status, namestr, size, guidstr) = edk2.GetNextVariableName(size, name, guid)
-
-            if status == 5:
-                logger().log_debug(f'[helper] EFI Variable name size was too small increasing to {size:d}')
-                (status, namestr, size, guidstr) = edk2.GetNextVariableName(size, name, guid)
-
-            logger().log_debug(f'[helper] Returned {name}. Status is {status_dict[status]}')
-
-            if status:
-                search_complete = True
-            else:
-                if (namestr, guidstr) in var_list:
-                    continue
-                else:
-                    var_list.append((namestr, guidstr))
-
-                logger().log_debug(f"[helper] Found variable '{name}' - [{guidstr}]")
-
-        for (name, guidstr) in var_list:
-            (status, data, attr) = self.get_EFI_variable_full(name, guidstr)
-
-            if status:
-                logger().log_verbose(f'[helper] Error reading variable {name}.  Status = {status:d} - {status_dict[status]}')
-
-            var_data = (off, buf, hdr, data, guidstr, attr)
-
-            if name in variables:
-                logger().log_verbose(f'[helper] Duplicate variable name {name} - {guidstr}')
-                continue
-            else:
-                variables[name] = []
-
-            if data != '' or guidstr != '' or attr != 0:
-                variables[name].append(var_data)
-
-        return variables

-
-    #
-    # ACPI tables access
-    #
-
-
[docs]    def get_ACPI_SDT(self) -> Tuple[None, bool]:
-        raise UnimplementedAPIError('get_ACPI_SDT')

-
-    #
-    # IOSF Message Bus access
-    #
-
-
[docs]    def msgbus_send_read_message(self, mcr: int, mcrx: int) -> None:
-        raise UnimplementedAPIError('msgbus_send_read_message')

-
-
[docs]    def msgbus_send_write_message(self, mcr: int, mcrx: int, mdr: int) -> None:
-        raise UnimplementedAPIError('msgbus_send_write_message')

-
-
[docs]    def msgbus_send_message(self, mcr: int, mcrx: int, mdr: Optional[int] = None) -> None:
-        raise UnimplementedAPIError('msgbus_send_message')

-
-
[docs]    def set_affinity(self, value: int) -> None:
-        raise UnimplementedAPIError('set_affinity')

-
-
[docs]    def free_phys_mem(self, physical_address):
-        raise UnimplementedAPIError('free_phys_mem')

-
-
[docs]    def get_ACPI_table(self, table_name):
-        raise UnimplementedAPIError('get_ACPI_table')

-
-
[docs]    def get_affinity(self):
-        raise UnimplementedAPIError('get_affinity')

-
-
[docs]    def hypercall(self, rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer):
-        raise UnimplementedAPIError('hypercall')

-
-
[docs]    def retpoline_enabled(self) -> bool:
-        return False

-
-
[docs]def get_helper() -> EfiHelper:
-    return EfiHelper()

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/linux/linuxhelper.html b/_modules/chipsec/helper/linux/linuxhelper.html deleted file mode 100644 index beeb0287..00000000 --- a/_modules/chipsec/helper/linux/linuxhelper.html +++ /dev/null @@ -1,785 +0,0 @@ - - - - - - - - chipsec.helper.linux.linuxhelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.linux.linuxhelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Linux helper
-"""
-
-import array
-import ctypes
-import errno
-import fcntl
-import fnmatch
-import mmap
-import os
-import platform
-import resource
-import struct
-import subprocess
-import sys
-from typing import Dict, List, Optional, Tuple, Iterable, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.library.types import EfiVariableType
-from chipsec import defines
-from chipsec.helper.oshelper import get_tools_path
-from chipsec.exceptions import OsHelperError, UnimplementedAPIError
-from chipsec.helper.basehelper import Helper
-from chipsec.logger import logger
-import chipsec.file
-from chipsec.hal.uefi_common import EFI_VARIABLE_NON_VOLATILE, EFI_VARIABLE_BOOTSERVICE_ACCESS, EFI_VARIABLE_RUNTIME_ACCESS
-from chipsec.hal.uefi_common import EFI_VARIABLE_HARDWARE_ERROR_RECORD, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS
-from chipsec.hal.uefi_common import EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_APPEND_WRITE
-
-MSGBUS_MDR_IN_MASK = 0x1
-MSGBUS_MDR_OUT_MASK = 0x2
-
-IOCTL_BASE = 0x0
-IOCTL_RDIO = 0x1
-IOCTL_WRIO = 0x2
-IOCTL_RDPCI = 0x3
-IOCTL_WRPCI = 0x4
-IOCTL_RDMSR = 0x5
-IOCTL_WRMSR = 0x6
-IOCTL_CPUID = 0x7
-IOCTL_GET_CPU_DESCRIPTOR_TABLE = 0x8
-IOCTL_HYPERCALL = 0x9
-IOCTL_SWSMI = 0xA
-IOCTL_LOAD_UCODE_PATCH = 0xB
-IOCTL_ALLOC_PHYSMEM = 0xC
-IOCTL_GET_EFIVAR = 0xD
-IOCTL_SET_EFIVAR = 0xE
-IOCTL_RDCR = 0x10
-IOCTL_WRCR = 0x11
-IOCTL_RDMMIO = 0x12
-IOCTL_WRMMIO = 0x13
-IOCTL_VA2PA = 0x14
-IOCTL_MSGBUS_SEND_MESSAGE = 0x15
-IOCTL_FREE_PHYSMEM = 0x16
-
-_tools = {}
-
-
[docs]class LinuxHelper(Helper):
-
-    DEVICE_NAME = "/dev/chipsec"
-    DEV_MEM = "/dev/mem"
-    DEV_PORT = "/dev/port"
-    MODULE_NAME = "chipsec"
-    SUPPORT_KERNEL26_GET_PAGE_IS_RAM = False
-    SUPPORT_KERNEL26_GET_PHYS_MEM_ACCESS_PROT = False
-    DKMS_DIR = "/var/lib/dkms/"
-
-    def __init__(self):
-        super(LinuxHelper, self).__init__()
-        self.os_system = platform.system()
-        self.os_release = platform.release()
-        self.os_version = platform.version()
-        self.os_machine = platform.machine()
-        self.os_uname = platform.uname()
-        self.name = "LinuxHelper"
-        self.dev_fh = None
-        self.dev_mem = None
-        self.dev_port = None
-        self.dev_msr = None
-
-###############################################################################################
-# Driver/service management functions
-###############################################################################################
-
-
[docs]    def get_dkms_module_location(self) -> str:
-        version = defines.get_version()
-        from os import listdir
-        from os.path import isdir, join
-        p = os.path.join(self.DKMS_DIR, self.MODULE_NAME, version, self.os_release)
-        os_machine_dir_name = [f for f in listdir(p) if isdir(join(p, f))][0]
-        return os.path.join(self.DKMS_DIR, self.MODULE_NAME, version, self.os_release, os_machine_dir_name, "module", "chipsec.ko")

-
-    # This function load CHIPSEC driver
-
-
[docs]    def load_chipsec_module(self):
-        page_is_ram = ""
-        phys_mem_access_prot = ""
-        a1 = ""
-        a2 = ""
-        if self.SUPPORT_KERNEL26_GET_PAGE_IS_RAM:
-            page_is_ram = self.get_page_is_ram()
-            if not page_is_ram:
-                logger().log_debug("Cannot find symbol 'page_is_ram'")
-            else:
-                a1 = f"a1=0x{page_is_ram}"
-        if self.SUPPORT_KERNEL26_GET_PHYS_MEM_ACCESS_PROT:
-            phys_mem_access_prot = self.get_phys_mem_access_prot()
-            if not phys_mem_access_prot:
-                logger().log_debug("Cannot find symbol 'phys_mem_access_prot'")
-            else:
-                a2 = f'a2=0x{phys_mem_access_prot}'
-
-        driver_path = os.path.join(chipsec.file.get_main_dir(), "chipsec", "helper", "linux", "chipsec.ko")
-        if not os.path.exists(driver_path):
-            driver_path += ".xz"
-            if not os.path.exists(driver_path):
-                # check DKMS modules location
-                try:
-                    driver_path = self.get_dkms_module_location()
-                except Exception:
-                    pass
-                if not os.path.exists(driver_path):
-                    driver_path += ".xz"
-                    if not os.path.exists(driver_path):
-                        raise Exception("Cannot find chipsec.ko module")
-        try:
-            subprocess.check_output(["insmod", driver_path, a1, a2])
-        except Exception as err:
-            raise Exception(f'Could not start Linux Helper, are you running as Admin/root?\n\t{err}')
-        uid = gid = 0
-        os.chown(self.DEVICE_NAME, uid, gid)
-        os.chmod(self.DEVICE_NAME, 600)
-        if os.path.exists(self.DEVICE_NAME):
-            logger().log_debug(f'Module {self.DEVICE_NAME} loaded successfully')
-        else:
-            logger().log_error(f'Fail to load module: {driver_path}')
-        self.driverpath = driver_path

-
-
[docs]    def unload_chipsec_module(self) -> None:
-        if self.driver_loaded or os.path.exists(self.DEVICE_NAME):
-            subprocess.call(["rmmod", self.MODULE_NAME])
-            logger().log_debug(f'Module for {self.DEVICE_NAME} unloaded successfully')

-
-
[docs]    def create(self):
-        logger().log_debug("[helper] Linux Helper created")
-        return True

-
-
[docs]    def start(self) -> bool:
-        self.unload_chipsec_module()
-        self.load_chipsec_module()
-        self.init()
-        logger().log_debug("[helper] Linux Helper started/loaded")
-        return True

-
-
[docs]    def stop(self) -> bool:
-        self.close()
-        self.unload_chipsec_module()
-        logger().log_debug("[helper] Linux Helper stopped/unloaded")
-        return True

-
-
[docs]    def delete(self) -> bool:
-        logger().log_debug("[helper] Linux Helper deleted")
-        return True

-
-
[docs]    def init(self) -> None:
-        x64 = True if sys.maxsize > 2**32 else False
-        self._pack = 'Q' if x64 else 'I'
-
-        estr = "Unable to open chipsec device. Did you run as root/sudo and load the driver?\n {}"
-        try:
-            # Do not buffer access to physical memory...
-            self.dev_fh = open(self.DEVICE_NAME, "rb+", buffering=0)
-            self.driver_loaded = True
-        except IOError as e:
-            raise OsHelperError(estr.format(str(e)), e.errno)
-        except BaseException as be:
-            raise OsHelperError(estr.format(str(be)), errno.ENXIO)
-        self._ioctl_base = self.compute_ioctlbase()

-
-
[docs]    def close(self) -> None:
-        if self.dev_fh:
-            self.dev_fh.close()
-        self.dev_fh = None
-        if self.dev_mem:
-            os.close(self.dev_mem)
-        self.dev_mem = None

-
-    # code taken from /include/uapi/asm-generic/ioctl.h
-    # by default itype is 'C' see drivers/linux/include/chipsec.h
-    # currently all chipsec ioctl functions are _IOWR
-    # currently all size are pointer
-
[docs]    def compute_ioctlbase(self, itype: str = 'C') -> int:
-        # define _IOWR(type,nr,size)	 _IOC(_IOC_READ|_IOC_WRITE,(type),(nr),(_IOC_TYPECHECK(size)))
-        # define _IOC(dir,type,nr,size) \
-        #    (((dir)  << _IOC_DIRSHIFT) | \
-        #    ((type) << _IOC_TYPESHIFT) | \
-        #    ((nr)   << _IOC_NRSHIFT) | \
-        #    ((size) << _IOC_SIZESHIFT))
-        # IOC_READ | _IOC_WRITE is 3
-        # default _IOC_DIRSHIFT is 30
-        # default _IOC_TYPESHIFT is 8
-        # nr will be 0
-        # _IOC_SIZESHIFT is 16
-        return (3 << 30) | (ord(itype) << 8) | (struct.calcsize(self._pack) << 16)

-
-
[docs]    def ioctl(self, nr: int, args: Iterable, *mutate_flag: bool) -> bytes:
-        return fcntl.ioctl(self.dev_fh, self._ioctl_base + nr, args)

-
-###############################################################################################
-# Actual API functions to access HW resources
-###############################################################################################
-
-
[docs]    def map_io_space(self, base: int, size: int, cache_type: int) -> None:
-        raise UnimplementedAPIError("map_io_space")

-
-    def __mem_block(self, sz: int, newval: Optional[bytes] = None) -> bytes:
-        if self.dev_fh is not None:
-            if newval is None:
-                return self.dev_fh.read(sz)
-            else:
-                res = self.dev_fh.write(newval)
-                self.dev_fh.flush()
-                return res.to_bytes(2, 'little')
-        return b''
-
-
[docs]    def write_phys_mem(self, phys_address: int, length: int, newval: bytes) -> int:
-        if (newval is None) or (self.dev_fh is None):
-            return 0
-        self.dev_fh.seek(phys_address)
-        res = self.__mem_block(length, newval)
-        return int.from_bytes(res, 'little')

-
-
[docs]    def read_phys_mem(self, phys_address: int, length: int) -> bytes:
-        self.dev_fh.seek(phys_address)
-        return self.__mem_block(length)

-
-
[docs]    def va2pa(self, va: int) -> Tuple[Optional[int], int]:
-        error_code = 0
-
-        in_buf = struct.pack(self._pack, va)
-        try:
-            out_buf = self.ioctl(IOCTL_VA2PA, in_buf)
-            pa = struct.unpack(self._pack, out_buf)[0]
-        except IOError as err:
-            if logger().DEBUG:
-                logger().log_error(f'[helper] Error in va2pa: getting PA for VA 0x{va:016X} failed with IOError: {err.strerror}')
-            return (None, err.errno)
-
-        # Check if PA > max physical address
-        max_pa = self.cpuid(0x80000008, 0x0)[0] & 0xFF
-        if pa > 1 << max_pa:
-            if logger().DEBUG:
-                logger().log_error(f'[helper] Error in va2pa: PA higher that max physical address: VA (0x{va:016X}) -> PA (0x{pa:016X})')
-            error_code = 1
-        return (pa, error_code)

-
-
[docs]    def read_pci_reg(self, bus: int, device: int, function: int, offset: int, size: int = 4) -> int:
-        _PCI_DOM = 0  # Change PCI domain, if there is more than one.
-        d = struct.pack(f'5{self._pack}', ((_PCI_DOM << 16) | bus), ((device << 16) | function), offset, size, 0)
-        try:
-            ret = self.ioctl(IOCTL_RDPCI, d)
-        except IOError:
-            if logger().DEBUG:
-                logger().log_error("IOError\n")
-            return 0
-        x = struct.unpack(f'5{self._pack}', ret)
-        return x[4]

-
-
[docs]    def write_pci_reg(self, bus: int, device: int, function: int, offset: int, value: int, size: int = 4) -> int:
-        _PCI_DOM = 0  # Change PCI domain, if there is more than one.
-        d = struct.pack(f'5{self._pack}', ((_PCI_DOM << 16) | bus), ((device << 16) | function), offset, size, value)
-        try:
-            ret = self.ioctl(IOCTL_WRPCI, d)
-        except IOError:
-            if logger().DEBUG:
-                logger().log_error("IOError\n")
-            return 0
-        x = struct.unpack(f'5{self._pack}', ret)
-        return x[4]

-
-
[docs]    def load_ucode_update(self, cpu_thread_id: int, ucode_update_buf: bytes) -> bool:
-        cpu_ucode_thread_id = ctypes.c_int(cpu_thread_id)
-
-        in_buf = struct.pack('=BH', cpu_thread_id, len(ucode_update_buf)) + ucode_update_buf
-        in_buf_final = array.array("c", in_buf)
-        out_length = 0
-        try:
-            out_buf = self.ioctl(IOCTL_LOAD_UCODE_PATCH, in_buf_final)
-        except IOError:
-            if logger().DEBUG:
-                logger().log_error("IOError IOCTL Load Patch\n")
-            return False
-
-        return True

-
-
[docs]    def read_io_port(self, io_port: int, size: int) -> int:
-        in_buf = struct.pack(f'3{self._pack}', io_port, size, 0)
-        out_buf = self.ioctl(IOCTL_RDIO, in_buf)
-        try:
-            if 1 == size:
-                value = struct.unpack(f'3{self._pack}', out_buf)[2] & 0xff
-            elif 2 == size:
-                value = struct.unpack(f'3{self._pack}', out_buf)[2] & 0xffff
-            else:
-                value = struct.unpack(f'3{self._pack}', out_buf)[2] & 0xffffffff
-        except:
-            if logger().DEBUG:
-                logger().log_error(f"DeviceIoControl did not return value of proper size {size:x} (value = '{out_buf}'): returning 0")
-            value = 0
-
-        return value

-
-
[docs]    def write_io_port(self, io_port: int, value: int, size: int) -> bytes:
-        in_buf = struct.pack(f'3{self._pack}', io_port, size, value)
-        return self.ioctl(IOCTL_WRIO, in_buf)

-
-
[docs]    def read_cr(self, cpu_thread_id: int, cr_number: int) -> int:
-        self.set_affinity(cpu_thread_id)
-        cr = 0
-        in_buf = struct.pack(f'3{self._pack}', cpu_thread_id, cr_number, cr)
-        unbuf = struct.unpack(f'3{self._pack}', self.ioctl(IOCTL_RDCR, in_buf))
-        return (unbuf[2])

-
-
[docs]    def write_cr(self, cpu_thread_id: int, cr_number: int, value: int):
-        self.set_affinity(cpu_thread_id)
-        in_buf = struct.pack(f'3{self._pack}', cpu_thread_id, cr_number, value)
-        self.ioctl(IOCTL_WRCR, in_buf)
-        return

-
-
[docs]    def read_msr(self, thread_id: int, msr_addr: int) -> Tuple[int, int]:
-        self.set_affinity(thread_id)
-        edx = eax = 0
-        in_buf = struct.pack(f'4{self._pack}', thread_id, msr_addr, edx, eax)
-        unbuf = struct.unpack(f'4{self._pack}', self.ioctl(IOCTL_RDMSR, in_buf))
-        return (unbuf[3], unbuf[2])

-
-
[docs]    def write_msr(self, thread_id: int, msr_addr: int, eax: int, edx: int):
-        self.set_affinity(thread_id)
-        in_buf = struct.pack(f'4{self._pack}', thread_id, msr_addr, edx, eax)
-        self.ioctl(IOCTL_WRMSR, in_buf)
-        return

-
-
[docs]    def get_descriptor_table(self, cpu_thread_id: int, desc_table_code: int) -> Tuple[int, int, int]:
-        self.set_affinity(cpu_thread_id)
-        in_buf = struct.pack(f'5{self._pack}', cpu_thread_id, desc_table_code, 0, 0, 0)
-        out_buf = self.ioctl(IOCTL_GET_CPU_DESCRIPTOR_TABLE, in_buf)
-        (limit, base_hi, base_lo, pa_hi, pa_lo) = struct.unpack(f'5{self._pack}', out_buf)
-        pa = (pa_hi << 32) + pa_lo
-        base = (base_hi << 32) + base_lo
-        return (limit, base, pa)

-
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        # add ecx
-        in_buf = struct.pack(f'4{self._pack}', eax, 0, ecx, 0)
-        out_buf = self.ioctl(IOCTL_CPUID, in_buf)
-        return struct.unpack(f'4{self._pack}', out_buf)

-
-
[docs]    def alloc_phys_mem(self, num_bytes: int, max_addr: int):
-        in_buf = struct.pack("2" + self._pack, num_bytes, max_addr)
-        out_buf = self.ioctl(IOCTL_ALLOC_PHYSMEM, in_buf)
-        return struct.unpack(f'2{self._pack}', out_buf)

-
-
[docs]    def free_phys_mem(self, physmem: int):
-        in_buf = struct.pack(f'1{self._pack}', physmem)
-        out_buf = self.ioctl(IOCTL_FREE_PHYSMEM, in_buf)
-        return struct.unpack(f'1{self._pack}', out_buf)[0]

-
-
[docs]    def read_mmio_reg(self, phys_address: int, size: int) -> int:
-        in_buf = struct.pack(f'2{self._pack}', phys_address, size)
-        out_buf = self.ioctl(IOCTL_RDMMIO, in_buf)
-        reg = out_buf[:size]
-        return defines.unpack1(reg, size)

-
-
[docs]    def write_mmio_reg(self, phys_address: int, size: int, value: int):
-        in_buf = struct.pack(f'3{self._pack}', phys_address, size, value)
-        out_buf = self.ioctl(IOCTL_WRMMIO, in_buf)

-
-
[docs]    def get_ACPI_SDT(self):
-        raise UnimplementedAPIError("get_ACPI_SDT")

-
-
[docs]    def get_ACPI_table(self, table_name):
-        raise UnimplementedAPIError("get_ACPI_table")

-
-    #
-    # IOSF Message Bus access
-    #
-
[docs]    def msgbus_send_read_message(self, mcr: int, mcrx: int) -> Optional[int]:
-        return self.msgbus_send_message(mcr, mcrx)

-
-
[docs]    def msgbus_send_write_message(self, mcr: int, mcrx: int, mdr: int) -> None:
-        self.msgbus_send_message(mcr, mcrx, mdr)
-        return None

-
-
[docs]    def msgbus_send_message(self, mcr: int, mcrx: int, mdr: Optional[int] = None) -> int:
-        mdr_out = 0
-        if mdr is None:
-            in_buf = struct.pack(f'5{self._pack}', MSGBUS_MDR_OUT_MASK, mcr, mcrx, 0, mdr_out)
-        else:
-            in_buf = struct.pack(f'5{self._pack}', (MSGBUS_MDR_IN_MASK | MSGBUS_MDR_OUT_MASK), mcr, mcrx, mdr, mdr_out)
-        out_buf = self.ioctl(IOCTL_MSGBUS_SEND_MESSAGE, in_buf)
-        mdr_out = struct.unpack(f'5{self._pack}', out_buf)[4]
-        return mdr_out

-
-    #
-    # Affinity functions
-    #
-
-
[docs]    def get_affinity(self) -> Optional[int]:
-        try:
-            affinity = os.sched_getaffinity(0)
-            return list(affinity)[0]
-        except Exception:
-            return None

-
-
[docs]    def set_affinity(self, thread_id: int) -> Optional[int]:
-        try:
-            os.sched_setaffinity(os.getpid(), {thread_id})
-            return thread_id
-        except Exception:
-            return None

-
-    #########################################################
-    # (U)EFI Variable API
-    #########################################################
-
-
[docs]    def EFI_supported(self) -> bool:
-        return os.path.exists("/sys/firmware/efi/vars/") or os.path.exists("/sys/firmware/efi/efivars/")

-
-
[docs]    def delete_EFI_variable(self, name: str, guid: str) -> int:
-        return self.kern_set_EFI_variable(name, guid, b"")

-
-
[docs]    def list_EFI_variables(self) -> Optional[Dict[str, List['EfiVariableType']]]:
-        return self.kern_list_EFI_variables()

-
-
[docs]    def get_EFI_variable(self, name: str, guid: str, attrs: Optional[int] = None) -> bytes:
-        return self.kern_get_EFI_variable(name, guid)

-
-
[docs]    def set_EFI_variable(self, name: str, guid: str, buffer: bytes, buffer_size: int, attrs: Optional[int] = None) -> int:
-        return self.kern_set_EFI_variable(name, guid, buffer)

-
-    #
-    # Internal (U)EFI Variable API functions via CHIPSEC kernel module
-    #
-
-
[docs]    def kern_get_EFI_variable_full(self, name: str, guid: str) -> 'EfiVariableType':
-        status_dict = {0: "EFI_SUCCESS", 1: "EFI_LOAD_ERROR", 2: "EFI_INVALID_PARAMETER", 3: "EFI_UNSUPPORTED", 4: "EFI_BAD_BUFFER_SIZE", 5: "EFI_BUFFER_TOO_SMALL", 6: "EFI_NOT_READY", 7: "EFI_DEVICE_ERROR", 8: "EFI_WRITE_PROTECTED", 9: "EFI_OUT_OF_RESOURCES", 14: "EFI_NOT_FOUND", 26: "EFI_SECURITY_VIOLATION"}
-        off = 0
-        data = b''
-        attr = 0
-        buf = b''
-        hdr = 0
-        base = 12
-        namelen = len(name)
-        header_size = 52
-        data_size = header_size + namelen
-        guid0 = int(guid[:8], 16)
-        guid1 = int(guid[9:13], 16)
-        guid2 = int(guid[14:18], 16)
-        guid3 = int(guid[19:21], 16)
-        guid4 = int(guid[21:23], 16)
-        guid5 = int(guid[24:26], 16)
-        guid6 = int(guid[26:28], 16)
-        guid7 = int(guid[28:30], 16)
-        guid8 = int(guid[30:32], 16)
-        guid9 = int(guid[32:34], 16)
-        guid10 = int(guid[34:], 16)
-
-        in_buf = struct.pack(f'13I{str(namelen)}s', data_size, guid0, guid1, guid2, guid3, guid4, guid5, guid6, guid7, guid8, guid9, guid10, namelen, name.encode())
-        buffer = array.array("B", in_buf)
-        stat = self.ioctl(IOCTL_GET_EFIVAR, buffer)
-        new_size, status = struct.unpack("2I", buffer[:8])
-
-        if (status == 0x5):
-            data_size = new_size + header_size + namelen  # size sent by driver + size of header (size + guid) + size of name
-            in_buf = struct.pack(f'13I{str(namelen + new_size)}s', data_size, guid0, guid1, guid2, guid3, guid4, guid5, guid6, guid7, guid8, guid9, guid10, namelen, name.encode())
-            buffer = array.array("B", in_buf)
-            try:
-                stat = self.ioctl(IOCTL_GET_EFIVAR, buffer)
-            except IOError:
-                if logger().DEBUG:
-                    logger().log_error("IOError IOCTL GetUEFIvar\n")
-                return (off, buf, hdr, b'', guid, attr)
-            new_size, status = struct.unpack("2I", buffer[:8])
-
-        if (new_size > data_size):
-            if logger().DEBUG:
-                logger().log_error("Incorrect size returned from driver")
-            return (off, buf, hdr, b'', guid, attr)
-
-        if (status > 0):
-            if logger().DEBUG:
-                logger().log_error(f'Reading variable (GET_EFIVAR) did not succeed: {status_dict.get(status, "UNKNOWN")} ({status:d})')
-            data = b''
-            guid = ''
-            attr = 0
-        else:
-            data = buffer[base:base + new_size].tobytes()
-            attr = struct.unpack("I", buffer[8:12])[0]
-        return (off, buf, hdr, data, guid, attr)

-
-
[docs]    def kern_get_EFI_variable(self, name: str, guid: str) -> bytes:
-        (_, _, _, data, guid, _) = self.kern_get_EFI_variable_full(name, guid)
-        return data

-
-
[docs]    def kern_list_EFI_variables(self) -> Optional[Dict[str, List['EfiVariableType']]]:
-        varlist = []
-        off = 0
-        hdr = 0
-        attr = 0
-        try:
-            if os.path.isdir('/sys/firmware/efi/efivars'):
-                varlist = os.listdir('/sys/firmware/efi/efivars')
-            elif os.path.isdir('/sys/firmware/efi/vars'):
-                varlist = os.listdir('/sys/firmware/efi/vars')
-            else:
-                return None
-        except Exception:
-            if logger().DEBUG:
-                logger().log_error('Failed to read /sys/firmware/efi/[vars|efivars]. Folder does not exist')
-            return None
-        variables = dict()
-        for v in varlist:
-            name = v[:-37]
-            guid = v[len(name) + 1:]
-            if name and name is not None:
-                variables[name] = []
-                var = self.kern_get_EFI_variable_full(name, guid)
-                (off, buf, hdr, data, guid, attr) = var
-                variables[name].append(var)
-        return variables

-
-
[docs]    def kern_set_EFI_variable(self, name: str, guid: str, value: bytes, attr: int = 0x7) -> int:
-        status_dict = {
-            0: "EFI_SUCCESS",
-            1: "EFI_LOAD_ERROR",
-            2: "EFI_INVALID_PARAMETER",
-            3: "EFI_UNSUPPORTED",
-            4: "EFI_BAD_BUFFER_SIZE",
-            5: "EFI_BUFFER_TOO_SMALL",
-            6: "EFI_NOT_READY",
-            7: "EFI_DEVICE_ERROR",
-            8: "EFI_WRITE_PROTECTED",
-            9: "EFI_OUT_OF_RESOURCES",
-            14: "EFI_NOT_FOUND",
-            26: "EFI_SECURITY_VIOLATION"
-        }
-
-        header_size = 60  # 4*15
-        namelen = len(name)
-        if value:
-            datalen = len(value)
-        else:
-            datalen = 0
-            value = struct.pack('B', 0x0)
-        data_size = header_size + namelen + datalen
-        guid0 = int(guid[:8], 16)
-        guid1 = int(guid[9:13], 16)
-        guid2 = int(guid[14:18], 16)
-        guid3 = int(guid[19:21], 16)
-        guid4 = int(guid[21:23], 16)
-        guid5 = int(guid[24:26], 16)
-        guid6 = int(guid[26:28], 16)
-        guid7 = int(guid[28:30], 16)
-        guid8 = int(guid[30:32], 16)
-        guid9 = int(guid[32:34], 16)
-        guid10 = int(guid[34:], 16)
-
-        pack_formatting = f'15I{namelen}s{datalen}s'
-        _guid = (guid0, guid1, guid2, guid3, guid4, guid5, guid6, guid7, guid8, guid9, guid10)
-        in_buf = struct.pack(pack_formatting, data_size, *_guid, attr, namelen, datalen, name.encode('utf-8'), value)
-        buffer = array.array("B", in_buf)
-        self.ioctl(IOCTL_SET_EFIVAR, buffer)
-        _, status = struct.unpack("2I", buffer[:8])
-
-        if (status != 0):
-            if logger().DEBUG:
-                logger().log_error(f"Setting EFI (SET_EFIVAR) variable did not succeed: '{status_dict.get(status, 'UNKNOWN')}' ({status:d})")
-        else:
-            os.system('umount /sys/firmware/efi/efivars; mount -t efivarfs efivarfs /sys/firmware/efi/efivars')
-        return status

-
-
-    #
-    # Hypercalls
-    #
-
[docs]    def hypercall(self, rcx: int, rdx: int, r8: int, r9: int, r10: int, r11: int, rax: int, rbx: int, rdi: int, rsi: int, xmm_buffer: int) -> int:
-        in_buf = struct.pack(f'<11{self._pack}', rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer)
-        out_buf = self.ioctl(IOCTL_HYPERCALL, in_buf)
-        return struct.unpack(f'<11{self._pack}', out_buf)[0]

-
-    #
-    # Interrupts
-    #
-
[docs]    def send_sw_smi(self, cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) -> Optional[Tuple[int, int, int, int, int, int, int]]:
-        self.set_affinity(cpu_thread_id)
-        in_buf = struct.pack(f'7{self._pack}', SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi)
-        out_buf = self.ioctl(IOCTL_SWSMI, in_buf)
-        ret = struct.unpack(f'7{self._pack}', out_buf)
-        return ret

-
-    #
-    # File system
-    #
-
[docs]    def get_tool_info(self, tool_type: str) -> Tuple[Optional[str], str]:
-        tool_name = _tools[tool_type] if tool_type in _tools else None
-        tool_path = os.path.join(get_tools_path(), self.os_system.lower())
-        return tool_name, tool_path

-
-
[docs]    def get_page_is_ram(self) -> Optional[bytes]:
-        PROC_KALLSYMS = "/proc/kallsyms"
-        symarr = chipsec.file.read_file(PROC_KALLSYMS).splitlines()
-        for line in symarr:
-            if b"page_is_ram" in line:
-                return line.split(b" ")[0]
-        return None

-
-
[docs]    def get_phys_mem_access_prot(self) -> Optional[bytes]:
-        PROC_KALLSYMS = "/proc/kallsyms"
-        symarr = chipsec.file.read_file(PROC_KALLSYMS).splitlines()
-        for line in symarr:
-            if b"phys_mem_access_prot" in line:
-                return line.split(b" ")[0]
-        return None

-
-    #
-    # Logical CPU count
-    #
-
[docs]    def get_threads_count(self) -> int:
-        import multiprocessing
-        return multiprocessing.cpu_count()

-
-    #
-    # Speculation control
-    #
-
[docs]    def retpoline_enabled(self):
-        raise NotImplementedError("retpoline_enabled")

-
-
-
[docs]def get_helper():
-    return LinuxHelper()

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/linuxnative/cpuid.html b/_modules/chipsec/helper/linuxnative/cpuid.html deleted file mode 100644 index 6a99e3ba..00000000 --- a/_modules/chipsec/helper/linuxnative/cpuid.html +++ /dev/null @@ -1,238 +0,0 @@ - - - - - - - - chipsec.helper.linuxnative.cpuid — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.linuxnative.cpuid

-# -*- coding: utf-8 -*-
-# Copyright (c) 2020 Intel Corporation
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# This file incorporates work covered by the following copyright and
-# permission notice:
-#
-# Copyright (c) 2014 Anders Høst
-# Copyright (c) 2018 Anders Høst
-#
-# Permission is hereby granted, free of charge, to any person obtaining a copy of
-# this software and associated documentation files (the "Software"), to deal in
-# the Software without restriction, including without limitation the rights to
-# use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
-# the Software, and to permit persons to whom the Software is furnished to do so,
-# subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be included in all
-# copies or substantial portions of the Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
-# FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
-# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-
-import mmap
-import platform
-from ctypes import CFUNCTYPE, POINTER, Structure, addressof, c_uint32, c_void_p, sizeof
-from typing import Callable, Generator, Tuple
-
-# Posix x86_64:
-# Three first call registers : RDI, RSI, RDX
-# Volatile registers         : RAX, RCX, RDX, RSI, RDI, R8-11
-
-# cdecl 32 bit:
-# Three first call registers : Stack (%esp)
-# Volatile registers         : EAX, ECX, EDX
-
-_POSIX_64_OPC = bytes((
-    0x53,                    # push   %rbx
-    0x89, 0xf0,              # mov    %esi,%eax
-    0x89, 0xd1,              # mov    %edx,%ecx
-    0x0f, 0xa2,              # cpuid
-    0x89, 0x07,              # mov    %eax,(%rdi)
-    0x89, 0x5f, 0x04,        # mov    %ebx,0x4(%rdi)
-    0x89, 0x4f, 0x08,        # mov    %ecx,0x8(%rdi)
-    0x89, 0x57, 0x0c,        # mov    %edx,0xc(%rdi)
-    0x5b,                    # pop    %rbx
-    0xc3                     # retq
-))
-
-_CDECL_32_OPC = bytes((
-    0x53,                    # push   %ebx
-    0x57,                    # push   %edi
-    0x8b, 0x7c, 0x24, 0x0c,  # mov    0xc(%esp),%edi
-    0x8b, 0x44, 0x24, 0x10,  # mov    0x10(%esp),%eax
-    0x8b, 0x4c, 0x24, 0x14,  # mov    0x14(%esp),%ecx
-    0x0f, 0xa2,              # cpuid
-    0x89, 0x07,              # mov    %eax,(%edi)
-    0x89, 0x5f, 0x04,        # mov    %ebx,0x4(%edi)
-    0x89, 0x4f, 0x08,        # mov    %ecx,0x8(%edi)
-    0x89, 0x57, 0x0c,        # mov    %edx,0xc(%edi)
-    0x5f,                    # pop    %edi
-    0x5b,                    # pop    %ebx
-    0xc3                     # ret
-))
-
-is_64bit = sizeof(c_void_p) == 8
-
-
-
[docs]class CPUID_struct(Structure):
-    _fields_ = [(r, c_uint32) for r in ("eax", "ebx", "ecx", "edx")]

-
-
-
[docs]class CPUID:
-    def __init__(self) -> None:
-        if platform.machine() not in ("AMD64", "x86_64", "x86", "i686"):
-            raise SystemError("Only available for x86")
-
-        code: bytes = _POSIX_64_OPC if is_64bit else _CDECL_32_OPC
-        self.addr = mmap.mmap(-1, mmap.PAGESIZE, flags=mmap.MAP_PRIVATE, prot=mmap.PROT_READ | mmap.PROT_WRITE | mmap.PROT_EXEC)
-        self.addr.write(code)
-
-        func_type = CFUNCTYPE(None, POINTER(CPUID_struct), c_uint32, c_uint32)
-        self.fp = c_void_p.from_buffer(self.addr)
-        self.func_ptr: Callable[[CPUID_struct, int, int], None] = func_type(addressof(self.fp))
-
-    def __call__(self, eax: int, ecx: int = 0) -> Tuple[int, int, int, int]:
-        struct = CPUID_struct()
-        self.func_ptr(struct, eax, ecx)
-        return struct.eax, struct.ebx, struct.ecx, struct.edx
-
-    def __del__(self) -> None:
-        del self.fp
-        self.addr.close()

-
-
-if __name__ == "__main__":
-    def valid_inputs() -> Generator[Tuple[int, Tuple[int, int, int, int]], None, None]:
-        cpuid = CPUID()
-        for eax in (0x0, 0x80000000):
-            highest, _, _, _ = cpuid(eax)
-            while eax <= highest:
-                regs = cpuid(eax)
-                yield (eax, regs)
-                eax += 1
-
-    print(" ".join(x.ljust(8) for x in ("CPUID", "A", "B", "C", "D")).strip())
-    for eax, regs in valid_inputs():
-        print("%08x" % eax, " ".join("%08x" % reg for reg in regs))
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/linuxnative/legacy_pci.html b/_modules/chipsec/helper/linuxnative/legacy_pci.html deleted file mode 100644 index 6ee577b3..00000000 --- a/_modules/chipsec/helper/linuxnative/legacy_pci.html +++ /dev/null @@ -1,237 +0,0 @@ - - - - - - - - chipsec.helper.linuxnative.legacy_pci — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.linuxnative.legacy_pci

-# -*- coding: utf-8 -*-
-# # Copyright (c) 2020 Intel Corporation
-# SPDX-License-Identifier: GPL-2.0-only
-#
-# This file incorporates work covered by the following copyright and
-# permission notice:
-#
-# Copyright (c) 2014 Anders Høst
-# Copyright (c) 2018 Anders Høst
-#
-# Permission is hereby granted, free of charge, to any person obtaining a copy of
-# this software and associated documentation files (the "Software"), to deal in
-# the Software without restriction, including without limitation the rights to
-# use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
-# the Software, and to permit persons to whom the Software is furnished to do so,
-# subject to the following conditions:
-#
-# The above copyright notice and this permission notice shall be included in all
-# copies or substantial portions of the Software.
-#
-# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
-# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
-# FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
-# COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
-# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
-# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
-
-
-import mmap
-from ctypes import CDLL, CFUNCTYPE, addressof, c_uint16, c_uint32, c_void_p, get_errno
-from typing import Callable
-
-from chipsec.exceptions import OsHelperError
-
-IN_PORT = bytes((
-    0x55,                   # push   %rbp
-    0x48, 0x89, 0xe5,       # mov    %rsp,%rbp
-    0x89, 0xf8,             # mov    %edi,%eax
-    0x66, 0x89, 0x45, 0xec,  # mov    %ax,-0x14(%rbp)
-    0x0f, 0xb7, 0x45, 0xec,  # movzwl -0x14(%rbp),%eax
-    0x89, 0xc2,             # mov    %eax,%edx
-    0xed,                   # in     (%dx),%eax
-    0x89, 0x45, 0xfc,       # mov    %eax,-0x4(%rbp)
-    0x8b, 0x45, 0xfc,       # mov    -0x4(%rbp),%eax
-    0x5d,                   # pop    %rbp
-    0xc3,                   # retq
-))
-
-
-OUT_PORT = bytes((
-    0x55,                   # push   %rbp
-    0x48, 0x89, 0xe5,       # mov    %rsp,%rbp
-    0x89, 0x7d, 0xfc,       # mov    %edi,-0x4(%rbp)
-    0x89, 0xf0,             # mov    %esi,%eax
-    0x66, 0x89, 0x45, 0xf8,  # mov    %ax,-0x8(%rbp)
-    0x8b, 0x45, 0xfc,       # mov    -0x4(%rbp),%eax
-    0x0f, 0xb7, 0x55, 0xf8,  # movzwl -0x8(%rbp),%edx
-    0xef,                   # out    %eax,(%dx)
-    0x90,                   # nop
-    0x5d,                   # pop    %rbp
-    0xc3,                   # retq
-))
-
-
-
[docs]class Ports:
-    # Use a unique Ports instance, to avoid allocating memory mappings every time it is used
-    instance = None
-
-    def __init__(self) -> None:
-        clib = CDLL("libc.so.6", use_errno=True)
-        if clib.iopl(3) == -1:
-            raise OsHelperError("Unable to use I/O ports using iopl", get_errno())
-
-        self.inl_addr = mmap.mmap(-1, mmap.PAGESIZE, flags=mmap.MAP_PRIVATE, prot=mmap.PROT_READ | mmap.PROT_WRITE | mmap.PROT_EXEC)
-        self.inl_addr.write(IN_PORT)
-        in_func_type = CFUNCTYPE(c_uint32, c_uint16)
-        in_fp = c_void_p.from_buffer(self.inl_addr)
-        self.inl_ptr: Callable[[int], int] = in_func_type(addressof(in_fp))
-
-        self.outl_addr = mmap.mmap(-1, mmap.PAGESIZE, flags=mmap.MAP_PRIVATE, prot=mmap.PROT_READ | mmap.PROT_WRITE | mmap.PROT_EXEC)
-        self.outl_addr.write(OUT_PORT)
-        out_func_type = CFUNCTYPE(None, c_uint32, c_uint16)
-        out_fp = c_void_p.from_buffer(self.outl_addr)
-        self.outl_ptr: Callable[[int, int], None] = out_func_type(addressof(out_fp))
-
-
[docs]    @classmethod
-    def get_instance(cls) -> "Ports":
-        if cls.instance is None:
-            cls.instance = cls()
-        return cls.instance

-
-
[docs]    def inl(self, port: int) -> int:
-        x = self.inl_ptr(port)
-        return x

-
-
[docs]    def outl(self, value: int, port: int) -> None:
-        self.outl_ptr(value, port)

-
-
-
[docs]class LegacyPci:
-
[docs]    @staticmethod
-    def read_pci_config(bus: int, dev: int, func: int, offset: int) -> int:
-        ports = Ports.get_instance()
-        ports.outl(0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | offset, 0xcf8)
-        v = ports.inl(0xcfc)
-        return v

-
-
[docs]    @staticmethod
-    def write_pci_config(bus: int, dev: int, func: int, offset: int, value: int) -> None:
-        ports = Ports.get_instance()
-        ports.outl(0x80000000 | (bus << 16) | (dev << 11) | (func << 8) | offset, 0xcf8)
-        ports.outl(value, 0xcfc)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/linuxnative/linuxnativehelper.html b/_modules/chipsec/helper/linuxnative/linuxnativehelper.html deleted file mode 100644 index d3cd409a..00000000 --- a/_modules/chipsec/helper/linuxnative/linuxnativehelper.html +++ /dev/null @@ -1,588 +0,0 @@ - - - - - - - - chipsec.helper.linuxnative.linuxnativehelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.linuxnative.linuxnativehelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Native Linux helper
-"""
-
-import mmap
-import os
-import platform
-import resource
-import struct
-import sys
-from typing import Optional, Tuple
-
-from chipsec import defines
-from chipsec.exceptions import OsHelperError
-from chipsec.helper.basehelper import Helper
-from chipsec.helper.linuxnative.cpuid import CPUID
-from chipsec.helper.linuxnative.legacy_pci import LegacyPci
-from chipsec.logger import logger
-
-
-
[docs]class MemoryMapping(mmap.mmap):
-    """Memory mapping based on Python's mmap.
-    This subclass keeps tracks of the start and end of the mapping.
-    """
-
-    def __init__(self, fileno, length, flags, prot, offset):
-        self.start = offset
-        self.end = offset + length
-        super().__init__()

-
-
-
[docs]class LinuxNativeHelper(Helper):
-
-    DEV_MEM = "/dev/mem"
-    DEV_PORT = "/dev/port"
-
-    def __init__(self):
-        super(LinuxNativeHelper, self).__init__()
-        self.os_system = platform.system()
-        self.os_release = platform.release()
-        self.os_version = platform.version()
-        self.os_machine = platform.machine()
-        self.os_uname = platform.uname()
-        self.name = "LinuxNativeHelper"
-        self.dev_fh = None
-        self.dev_mem = None
-        self.dev_port = None
-        self.dev_msr = None
-
-        # A list of all the mappings allocated via map_io_space. When using
-        # read/write MMIO, if the region is already mapped in the process's
-        # memory, simply read/write from there.
-        self.mappings = []
-
-###############################################################################################
-# Driver/service management functions
-###############################################################################################
-
[docs]    def create(self) -> bool:
-        logger().log_debug("[helper] Linux Helper created")
-        return True

-
-
[docs]    def start(self) -> bool:
-        self.init()
-        logger().log_debug("[helper] Linux Helper started/loaded")
-        return True

-
-
[docs]    def stop(self) -> bool:
-        self.close()
-        logger().log_debug("[helper] Linux Helper stopped/unloaded")
-        return True

-
-
[docs]    def delete(self) -> bool:
-        logger().log_debug("[helper] Linux Helper deleted")
-        return True

-
-
[docs]    def init(self):
-        x64 = True if sys.maxsize > 2**32 else False
-        self._pack = 'Q' if x64 else 'I'

-
-
[docs]    def devmem_available(self) -> bool:
-        """Check if /dev/mem is usable.
-           In case the driver is not loaded, we might be able to perform the
-           requested operation via /dev/mem. Returns True if /dev/mem is
-           accessible.
-        """
-        if self.dev_mem:
-            return True
-
-        try:
-            self.dev_mem = os.open(self.DEV_MEM, os.O_RDWR)
-            return True
-        except IOError as err:
-            raise OsHelperError("Unable to open /dev/mem.\n"
-                                "This command requires access to /dev/mem.\n"
-                                "Are you running this command as root?\n"
-                                f"{str(err)}", err.errno)

-
-
[docs]    def devport_available(self) -> bool:
-        """Check if /dev/port is usable.
-           In case the driver is not loaded, we might be able to perform the
-           requested operation via /dev/port. Returns True if /dev/port is
-           accessible.
-        """
-        if self.dev_port:
-            return True
-
-        try:
-            self.dev_port = os.open(self.DEV_PORT, os.O_RDWR)
-            return True
-        except IOError as err:
-            raise OsHelperError("Unable to open /dev/port.\n"
-                                "This command requires access to /dev/port.\n"
-                                "Are you running this command as root?\n"
-                                f"{str(err)}", err.errno)

-
-
[docs]    def devmsr_available(self) -> bool:
-        """Check if /dev/cpu/CPUNUM/msr is usable.
-           In case the driver is not loaded, we might be able to perform the
-           requested operation via /dev/cpu/CPUNUM/msr. This requires loading
-           the (more standard) msr driver. Returns True if /dev/cpu/CPUNUM/msr
-           is accessible.
-        """
-        if self.dev_msr:
-            return True
-
-        try:
-            self.dev_msr = {}
-            if not os.path.exists("/dev/cpu/0/msr"):
-                os.system("modprobe msr")
-            for cpu in os.listdir("/dev/cpu"):
-                logger().log_debug(f"found cpu = {str(cpu)}")
-                if cpu.isdigit():
-                    cpu = int(cpu)
-                    self.dev_msr[cpu] = os.open(f"/dev/cpu/{str(cpu)}/msr", os.O_RDWR)
-                    logger().log_debug(f"Added dev_msr {str(cpu)}")
-            return True
-        except IOError as err:
-            raise OsHelperError("Unable to open /dev/cpu/CPUNUM/msr.\n"
-                                "This command requires access to /dev/cpu/CPUNUM/msr.\n"
-                                "Are you running this command as root?\n"
-                                "Do you have the msr kernel module installed?\n"
-                                f"{str(err)}", err.errno)

-
-
[docs]    def close(self):
-        if self.dev_mem:
-            os.close(self.dev_mem)
-        self.dev_mem = None

-
-###############################################################################################
-# Actual API functions to access HW resources
-###############################################################################################
-
-
[docs]    def read_pci_reg(self, bus: int, device: int, function: int, offset: int, size: int, domain: int = 0) -> int:
-        device_name = f"{domain:04x}:{bus:02x}:{device:02x}.{function}"
-        device_path = f"/sys/bus/pci/devices/{device_name}/config"
-        if not os.path.exists(device_path):
-            if offset < 256:
-                value = LegacyPci.read_pci_config(bus, device, function, offset)
-                if size == 1:
-                    value = value & 0xFF
-                elif size == 2:
-                    value = value & 0xFFFF
-                elif size == 4:
-                    value = value & 0xFFFF_FFFF
-                elif size == 8:
-                    value = value & 0xFFFF_FFFF_FFFF_FFFF
-                return value
-            else:
-                raise ValueError("Offset out of bounds")
-        try:
-            with open(device_path, "rb") as config:
-                config.seek(offset)
-                reg = config.read(size)
-                reg = defines.unpack1(reg, size)
-                return reg
-        except IOError as err:
-            raise OsHelperError(f"Unable to open {device_path}", err.errno)

-
-
[docs]    def write_pci_reg(self, bus: int, device: int, function: int, offset: int, value: int, size: int = 4, domain: int = 0) -> int:
-        device_name = "{domain:04x}:{bus:02x}:{device:02x}.{function}".format(
-                      domain=domain, bus=bus, device=device, function=function)
-        device_path = f"/sys/bus/pci/devices/{device_name}/config"
-        if not os.path.exists(device_path):
-            if offset < 256:
-                LegacyPci.write_pci_config(bus, device, function, offset, value)
-                return -1
-        try:
-            with open(device_path, "wb") as config:
-                config.seek(offset)
-                config.write(defines.pack1(value, size))
-        except IOError as err:
-            raise OsHelperError(f"Unable to open {device_path}", err.errno)
-
-        return 0

-
-    # @TODO fix memory mapping and bar_size
-
[docs]    def read_mmio_reg(self, phys_address: int, size: int) -> int:
-        if self.devmem_available():
-            region = self.memory_mapping(phys_address, size)
-            if not region:
-                self.map_io_space(phys_address, size, 0)
-                region = self.memory_mapping(phys_address, size)
-                if not region:
-                    logger().log_error(f"Unable to map region {phys_address:08x}")
-
-            # Create memoryview into mmap'ed region
-            region_mv = memoryview(region)
-            offset_in_region = phys_address - region.start
-            if size == 1:
-                return region_mv[offset_in_region]
-
-            if offset_in_region % size == 0:
-                # Read aligned value
-                region_casted = region_mv.cast(defines.SIZE2FORMAT[size])
-                return region_casted[offset_in_region // size]
-
-            # Read unaligned value
-            return defines.unpack1(region_mv[offset_in_region:offset_in_region + size], size)
-        return 0

-
-    # @TODO fix memory mapping and bar_size
-
[docs]    def write_mmio_reg(self, phys_address: int, size: int, value: int) -> None:
-        if self.devmem_available():
-            reg = defines.pack1(value, size)
-            region = self.memory_mapping(phys_address, size)
-            if not region:
-                self.map_io_space(phys_address, size, 0)
-                region = self.memory_mapping(phys_address, size)
-                if not region:
-                    logger().log_error(f"Unable to map region {phys_address:08x}")
-
-            # Create memoryview into mmap'ed region
-            region_mv = memoryview(region)
-            offset_in_region = phys_address - region.start
-            if size == 1:
-                region_mv[offset_in_region] = value
-                return
-
-            if offset_in_region % size == 0:
-                # Write aligned value
-                region_casted = region_mv.cast(defines.SIZE2FORMAT[size])
-                region_casted[offset_in_region // size] = value
-                return
-
-            # Write unaligned value
-            region_mv[offset_in_region:offset_in_region + size] = reg

-
-
[docs]    def memory_mapping(self, base: int, size: int) -> Optional[MemoryMapping]:
-        """Returns the mmap region that fully encompasses this area.
-        Returns None if no region matches.
-        """
-        for region in self.mappings:
-            if region.start <= base and region.end >= base + size:
-                return region
-        return None

-
-
[docs]    def map_io_space(self, base: int, size: int, cache_type: int) -> None:
-        """Map to memory a specific region."""
-        if self.devmem_available() and not self.memory_mapping(base, size):
-            logger().log_debug(f"[helper] Mapping 0x{base:x} to memory")
-            length = max(size, resource.getpagesize())
-            page_aligned_base = base - (base % resource.getpagesize())
-            mapping = MemoryMapping(self.dev_mem, length, mmap.MAP_SHARED,
-                                    mmap.PROT_READ | mmap.PROT_WRITE,
-                                    offset=page_aligned_base)
-            self.mappings.append(mapping)

-
-
[docs]    def read_phys_mem(self, phys_address, length: int) -> bytes:
-        if self.devmem_available():
-            os.lseek(self.dev_mem, phys_address, os.SEEK_SET)
-            return os.read(self.dev_mem, length)
-        return b'\x00'

-
-
[docs]    def write_phys_mem(self, phys_address, length: int, newval: bytes) -> int:
-        if newval is None:
-            return None
-        if self.devmem_available():
-            os.lseek(self.dev_mem, phys_address, os.SEEK_SET)
-            written = os.write(self.dev_mem, newval)
-            if written != length:
-                logger().log_debug(f"Cannot write {newval} to memory {phys_address:016X} (wrote {written:d} of {length:d})")
-            return written
-        return -1

-
-
[docs]    def alloc_phys_mem(self, length, max_phys_address):
-        raise NotImplementedError()

-
-
[docs]    def free_phys_mem(self, physical_address):
-        raise NotImplementedError()

-
-
[docs]    def va2pa(self, va):
-        raise NotImplementedError()

-
-
[docs]    def read_io_port(self, io_port: int, size: int) -> int:
-        if self.devport_available():
-            os.lseek(self.dev_port, io_port, os.SEEK_SET)
-
-            value = os.read(self.dev_port, size)
-            if 1 == size:
-                return struct.unpack("B", value)[0]
-            elif 2 == size:
-                return struct.unpack("H", value)[0]
-            elif 4 == size:
-                return struct.unpack("I", value)[0]
-            else:
-                raise ValueError("Invalid size")
-        return -1

-
-
[docs]    def write_io_port(self, io_port: int, value: int, size: int) -> bool:
-        if self.devport_available():
-            os.lseek(self.dev_port, io_port, os.SEEK_SET)
-            if 1 == size:
-                fmt = 'B'
-            elif 2 == size:
-                fmt = 'H'
-            elif 4 == size:
-                fmt = 'I'
-            else:
-                raise ValueError("Invalid size")
-            written = os.write(self.dev_port, struct.pack(fmt, value))
-            if written != size:
-                logger().log_debug(f"Cannot write {value} to port {io_port:x} (wrote {written:d} of {size:d})")
-                return False
-            return True
-        return False

-
-
[docs]    def read_cr(self, cpu_thread_id, cr_number):
-        raise NotImplementedError()

-
-
[docs]    def write_cr(self, cpu_thread_id, cr_number, value):
-        raise NotImplementedError()

-
-
[docs]    def read_msr(self, thread_id: int, msr_addr: int) -> Tuple[int, int]:
-        if self.devmsr_available():
-            os.lseek(self.dev_msr[thread_id], msr_addr, os.SEEK_SET)
-            buf = os.read(self.dev_msr[thread_id], 8)
-            unbuf = struct.unpack("2I", buf)
-            return (unbuf[0], unbuf[1])
-        return (-1, -1)

-
-
[docs]    def write_msr(self, thread_id: int, msr_addr: int, eax: int, edx: int) -> int:
-        if self.devmsr_available():
-            os.lseek(self.dev_msr[thread_id], msr_addr, os.SEEK_SET)
-            buf = struct.pack("2I", eax, edx)
-            written = os.write(self.dev_msr[thread_id], buf)
-            if written != 8:
-                logger().log_debug(f"Cannot write {buf.hex()} to MSR {msr_addr:x}")
-            return written
-        return False

-
-
[docs]    def load_ucode_update(self, cpu_thread_id, ucode_update_buf):
-        raise NotImplementedError()

-
-
[docs]    def get_descriptor_table(self, cpu_thread_id, desc_table_code):
-        raise NotImplementedError()

-
-
[docs]    def EFI_supported(self):
-        raise NotImplementedError()

-
-
[docs]    def get_EFI_variable(self, name, guid):
-        raise NotImplementedError()

-
-
[docs]    def set_EFI_variable(self, name, guid, buffer, buffer_size=None, attrs=None):
-        raise NotImplementedError()

-
-
[docs]    def delete_EFI_variable(self, name, guid):
-        raise NotImplementedError()

-
-
[docs]    def list_EFI_variables(self):
-        raise NotImplementedError()

-
-
[docs]    def get_ACPI_SDT(self):
-        raise NotImplementedError()

-
-
[docs]    def get_ACPI_table(self, table_name):
-        raise NotImplementedError()

-
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        _cpuid = CPUID()
-        return _cpuid(eax, ecx)

-
-
[docs]    def msgbus_send_read_message(self, mcr, mcrx):
-        raise NotImplementedError()

-
-
[docs]    def msgbus_send_write_message(self, mcr, mcrx, mdr):
-        raise NotImplementedError()

-
-
[docs]    def msgbus_send_message(self, mcr, mcrx, mdr):
-        raise NotImplementedError()

-
-    #
-    # Affinity functions
-    #
-
[docs]    def get_affinity(self) -> Optional[int]:
-        try:
-            affinity = os.sched_getaffinity(0)
-            return list(affinity)[0]
-        except Exception:
-            return None

-
-
[docs]    def set_affinity(self, thread_id: int) -> Optional[int]:
-        try:
-            os.sched_setaffinity(os.getpid(), {thread_id})
-            return thread_id
-        except Exception:
-            return None

-
-    #
-    # Logical CPU count
-    #
-
[docs]    def get_threads_count(self) -> int:
-        import multiprocessing
-        return multiprocessing.cpu_count()

-
-    #
-    # Send SW SMI
-    #
-
[docs]    def send_sw_smi(self, cpu_thread_id, SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi):
-        raise NotImplementedError()

-
-    #
-    # Hypercall
-    #
-
[docs]    def hypercall(self, rcx=0, rdx=0, r8=0, r9=0, r10=0, r11=0, rax=0, rbx=0, rdi=0, rsi=0, xmm_buffer=0):
-        raise NotImplementedError()

-
-    #
-    # Speculation control
-    #
-
[docs]    def retpoline_enabled(self):
-        raise NotImplementedError("retpoline_enabled")

-
-
[docs]    def get_bios_version(self) -> str:
-        try:
-            filename = "/sys/class/dmi/id/bios_version"
-            with open(filename, 'r') as outfile:
-                return outfile.read().strip()
-        except FileNotFoundError:
-            return 'Unable to read bios version'

-
-
-
[docs]def get_helper():
-    return LinuxNativeHelper()

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/nonehelper.html b/_modules/chipsec/helper/nonehelper.html deleted file mode 100644 index 4793aac1..00000000 --- a/_modules/chipsec/helper/nonehelper.html +++ /dev/null @@ -1,339 +0,0 @@ - - - - - - - - chipsec.helper.nonehelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.nonehelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-from chipsec.exceptions import UnimplementedAPIError
-from chipsec.helper.basehelper import Helper
-from typing import Dict, List, Tuple, Optional, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.library.types import EfiVariableType
-    from ctypes import Array
-
-# Base class for the helpers
-
-
-
[docs]class NoneHelper(Helper):
-
-    def __init__(self):
-        self.driver_loaded = False
-        self.os_system = 'nonehelper'
-        self.os_release = '0.0'
-        self.os_version = '0.0'
-        self.os_machine = 'base'
-        self.name = 'NoneHelper'
-        self.driverpath = ''
-
-
[docs]    def create(self) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def start(self) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def stop(self) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def delete(self) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def get_info(self) -> Tuple[str, str]:
-        return self.name, self.driverpath

-
-    #################################################################################################
-    # Actual OS helper functionality accessible to HAL components
-
-    #
-    # Read/Write PCI configuration registers via legacy CF8/CFC ports
-    #
-
[docs]    def read_pci_reg(self, bus: int, device: int, function: int, address: int, size: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def write_pci_reg(self, bus: int, device: int, function: int, address: int, value: int, size: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # read/write mmio
-    #
-
[docs]    def read_mmio_reg(self, phys_address: int, size: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def write_mmio_reg(self, phys_address: int, size: int, value: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # physical_address is 64 bit integer
-    #
-
[docs]    def read_phys_mem(self, phys_address: int, length: int) -> bytes:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def write_phys_mem(self, phys_address: int, length: int, buf: bytes) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def alloc_phys_mem(self, length: int, max_phys_address: int) -> Tuple[int, int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def free_phys_mem(self, physical_address: int):
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def va2pa(self, va: int) -> Tuple[int, int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def map_io_space(self, physical_address: int, length: int, cache_type: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Read/Write I/O port
-    #
-
[docs]    def read_io_port(self, io_port: int, size: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def write_io_port(self, io_port: int, value: int, size: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Read/Write CR registers
-    #
-
[docs]    def read_cr(self, cpu_thread_id: int, cr_number: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def write_cr(self, cpu_thread_id: int, cr_number: int, value: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Read/Write MSR on a specific CPU thread
-    #
-
[docs]    def read_msr(self, cpu_thread_id: int, msr_addr: int) -> Tuple[int, int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def write_msr(self, cpu_thread_id: int, msr_addr: int, eax: int, edx: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Load CPU microcode update on a specific CPU thread
-    #
-
[docs]    def load_ucode_update(self, cpu_thread_id: int, ucode_update_buf: bytes) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Read IDTR/GDTR/LDTR on a specific CPU thread
-    #
-
[docs]    def get_descriptor_table(self, cpu_thread_id: int, desc_table_code: int) -> Optional[Tuple[int, int, int]]:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # EFI Variable API
-    #
-
[docs]    def EFI_supported(self) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def get_EFI_variable(self, name: str, guid: str) -> Optional[bytes]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def set_EFI_variable(self, name: str, guid: str, data: bytes, datasize: Optional[int], attrs: Optional[int]) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def delete_EFI_variable(self, name: str, guid: str) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def list_EFI_variables(self) -> Optional[Dict[str, List['EfiVariableType']]]:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # ACPI
-    #
-
[docs]    def get_ACPI_SDT(self) -> Tuple[Optional['Array'], bool]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def get_ACPI_table(self, table_name: str) -> Optional['Array']:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # CPUID
-    #
-
[docs]    def cpuid(self, eax: int, ecx: int) -> Tuple[int, int, int, int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # IOSF Message Bus access
-    #
-
[docs]    def msgbus_send_read_message(self, mcr: int, mcrx: int) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def msgbus_send_write_message(self, mcr: int, mcrx: int, mdr: int) -> None:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def msgbus_send_message(self, mcr: int, mcrx: int, mdr: Optional[int]) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Affinity
-    #
-
[docs]    def get_affinity(self) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-
[docs]    def set_affinity(self, value: int) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Logical CPU count
-    #
-
[docs]    def get_threads_count(self) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Send SW SMI
-    #
-
[docs]    def send_sw_smi(self, cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) -> Optional[int]:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Hypercall
-    #
-
[docs]    def hypercall(self, rcx: int, rdx: int, r8: int, r9: int, r10: int, r11: int, rax: int, rbx: int, rdi: int, rsi: int, xmm_buffer: int) -> int:
-        raise UnimplementedAPIError('NoneHelper')

-
-    #
-    # Speculation control
-    #
-
[docs]    def retpoline_enabled(self) -> bool:
-        raise UnimplementedAPIError('NoneHelper')

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/helper/oshelper.html b/_modules/chipsec/helper/oshelper.html deleted file mode 100644 index fdf643fe..00000000 --- a/_modules/chipsec/helper/oshelper.html +++ /dev/null @@ -1,278 +0,0 @@ - - - - - - - - chipsec.helper.oshelper — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.helper.oshelper

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Abstracts support for various OS/environments, wrapper around platform specific code that invokes kernel driver
-"""
-
-import os
-import errno
-import importlib
-import platform
-import traceback
-import sys
-from ctypes import Array
-from typing import Tuple, List, Dict, Optional, AnyStr, Any, TYPE_CHECKING
-if TYPE_CHECKING:
-    from chipsec.library.types import EfiVariableType
-from chipsec.file import get_main_dir, TOOLS_DIR
-from chipsec.logger import logger
-from chipsec.helper.basehelper import Helper
-from chipsec.helper.nonehelper import NoneHelper
-from chipsec.exceptions import UnimplementedAPIError, OsHelperError
-
-
-
[docs]def get_tools_path() -> str:
-    return os.path.normpath(os.path.join(get_main_dir(), TOOLS_DIR))

-
-
-# OS Helper
-#
-# Abstracts support for various OS/environments, wrapper around platform specific code that invokes kernel driver
-
-
-
[docs]class OsHelper:
-    def __init__(self):
-        self.avail_helpers = {}
-        self.load_helpers()
-        self.filecmds = None
-        self.helper = self.get_default_helper()
-        if (not self.helper):
-            os_system = platform.system()
-            raise OsHelperError("Could not load any helpers for '{}' environment (unsupported environment?)".format(os_system), errno.ENODEV)
-        else:
-            if sys.version[0] == "2":
-                logger().log_warning("*****************************************************************************")
-                logger().log_warning("* !! Python 2 is deprecated and not supported. Please update to Python 3 !! *")
-                logger().log_warning("* !!                           Exiting CHIPSEC                           !! *")
-                logger().log_warning("*****************************************************************************")
-                sys.exit(0)
-            self.os_system = self.helper.os_system
-            self.os_release = self.helper.os_release
-            self.os_version = self.helper.os_version
-            self.os_machine = self.helper.os_machine
-
-
[docs]    def load_helpers(self) -> None:
-        helper_dir = os.path.join(get_main_dir(), "chipsec", "helper")
-        helpers = [os.path.basename(f) for f in os.listdir(helper_dir)
-                    if os.path.isdir(os.path.join(helper_dir, f)) and not os.path.basename(f).startswith("__")]
-
-        for helper in helpers:
-            helper_path = ''
-            try:
-                helper_path = f'chipsec.helper.{helper}.{helper}helper'
-                hlpr = importlib.import_module(helper_path)
-                self.avail_helpers[f'{helper}helper'] = hlpr
-            except ImportError as msg:
-                logger().log_debug(f"Unable to load helper: {helper}")

-
-
[docs]    def get_helper(self, name: str) -> Any:
-        ret = None
-        if name in self.avail_helpers:
-            ret = self.avail_helpers[name].get_helper()
-        return ret

-    
-
[docs]    def get_available_helpers(self) -> List[str]:
-        return sorted(self.avail_helpers.keys())

-
-
[docs]    def get_base_helper(self):
-        return NoneHelper()

-    
-
[docs]    def get_default_helper(self):
-        ret = None
-        if self.is_linux():
-            ret = self.get_helper("linuxhelper")
-        elif self.is_windows():
-            ret = self.get_helper("windowshelper")
-        elif self.is_efi():
-            ret = self.get_helper("efihelper")
-        elif self.is_dal():
-            ret = self.get_helper("dalhelper")
-        if ret is None:
-            ret = self.get_base_helper()
-        return ret

-
- 
-
-
[docs]    def is_dal(self) -> bool:
-        return 'itpii' in sys.modules

-
-
[docs]    def is_efi(self) -> bool:
-        return platform.system().lower().startswith('efi') or platform.system().lower().startswith('uefi')

-
-
[docs]    def is_linux(self) -> bool:
-        return 'linux' == platform.system().lower()

-
-
[docs]    def is_windows(self) -> bool:
-        return 'windows' == platform.system().lower()

-
-
[docs]    def is_win8_or_greater(self) -> bool:
-        win8_or_greater = self.is_windows() and (self.os_release.startswith('8') or ('2008Server' in self.os_release) or ('2012Server' in self.os_release))
-        return win8_or_greater

-
-
[docs]    def is_macos(self) -> bool:
-        return 'darwin' == platform.system().lower()

-    
-
[docs]    def getcwd(self) -> str:
-        return os.getcwd()

-
-
-   
-
-
-_helper = None
-
-
-
[docs]def helper():
-    global _helper
-    if _helper is None:
-        try:
-            _helper = OsHelper()
-        except BaseException as msg:
-            if logger().DEBUG:
-                logger().log_error(str(msg))
-                logger().log_bad(traceback.format_exc())
-            raise
-    return _helper

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/library/architecture.html b/_modules/chipsec/library/architecture.html deleted file mode 100644 index 4cc8b571..00000000 --- a/_modules/chipsec/library/architecture.html +++ /dev/null @@ -1,148 +0,0 @@ - - - - - - - - chipsec.library.architecture — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.library.architecture

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
[docs]class ARCH_VID:
-    INTEL = 0x8086
-    AMD = 0x1022

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/library/bits.html b/_modules/chipsec/library/bits.html deleted file mode 100644 index ada67a43..00000000 --- a/_modules/chipsec/library/bits.html +++ /dev/null @@ -1,241 +0,0 @@ - - - - - - - - chipsec.library.bits — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.library.bits

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-from typing import Optional
-
-BIT0 = 0x0001
-BIT1 = 0x0002
-BIT2 = 0x0004
-BIT3 = 0x0008
-BIT4 = 0x0010
-BIT5 = 0x0020
-BIT6 = 0x0040
-BIT7 = 0x0080
-BIT8 = 0x0100
-BIT9 = 0x0200
-BIT10 = 0x0400
-BIT11 = 0x0800
-BIT12 = 0x1000
-BIT13 = 0x2000
-BIT14 = 0x4000
-BIT15 = 0x8000
-BIT16 = 0x00010000
-BIT17 = 0x00020000
-BIT18 = 0x00040000
-BIT19 = 0x00080000
-BIT20 = 0x00100000
-BIT21 = 0x00200000
-BIT22 = 0x00400000
-BIT23 = 0x00800000
-BIT24 = 0x01000000
-BIT25 = 0x02000000
-BIT26 = 0x04000000
-BIT27 = 0x08000000
-BIT28 = 0x10000000
-BIT29 = 0x20000000
-BIT30 = 0x40000000
-BIT31 = 0x80000000
-BIT32 = 0x100000000
-BIT33 = 0x200000000
-BIT34 = 0x400000000
-BIT35 = 0x800000000
-BIT36 = 0x1000000000
-BIT37 = 0x2000000000
-BIT38 = 0x4000000000
-BIT39 = 0x8000000000
-BIT40 = 0x10000000000
-BIT41 = 0x20000000000
-BIT42 = 0x40000000000
-BIT43 = 0x80000000000
-BIT44 = 0x100000000000
-BIT45 = 0x200000000000
-BIT46 = 0x400000000000
-BIT47 = 0x800000000000
-BIT48 = 0x1000000000000
-BIT49 = 0x2000000000000
-BIT50 = 0x4000000000000
-BIT51 = 0x8000000000000
-BIT52 = 0x10000000000000
-BIT53 = 0x20000000000000
-BIT54 = 0x40000000000000
-BIT55 = 0x80000000000000
-BIT56 = 0x100000000000000
-BIT57 = 0x200000000000000
-BIT58 = 0x400000000000000
-BIT59 = 0x800000000000000
-BIT60 = 0x1000000000000000
-BIT61 = 0x2000000000000000
-BIT62 = 0x4000000000000000
-BIT63 = 0x8000000000000000
-
-
-
[docs]def bit(bit_num: int) -> int:
-    return int(1 << bit_num)

-
-
-
[docs]def is_set(val: int, bit_mask: int) -> bool:
-    return bool(val & bit_mask != 0)

-
-
-
[docs]def scan_single_bit_mask(bit_mask: int) -> Optional[int]:
-    for bit_num in range(0, 7):
-        if bit_mask >> bit_num == 1:
-            return bit_num
-    return None

-
-
-
[docs]def is_all_ones(value: int, size: int, width: int = 8) -> bool:
-    mask = (1 << (size * width)) - 1
-    return (mask == (mask & value))

-
-
-
[docs]def ones_complement(value: int, number_of_bits: int = 64) -> int:
-    return ((1 << number_of_bits) - 1) ^ value

-
-
-
[docs]def get_bits(value: int, start: int, nbits: int) -> int:
-    ret = value >> start
-    ret &= (1 << nbits) - 1
-    return ret

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/library/strings.html b/_modules/chipsec/library/strings.html deleted file mode 100644 index f2b6343a..00000000 --- a/_modules/chipsec/library/strings.html +++ /dev/null @@ -1,174 +0,0 @@ - - - - - - - - chipsec.library.strings — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.library.strings

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-import string
-from time import strftime
-from typing import AnyStr, Iterable
-
-
-
[docs]def get_datetime_str() -> str:
-    return strftime('%a%b%d%y-%H%M%S')

-
-
-
[docs]def bytestostring(mbytes: AnyStr) -> str:
-    if isinstance(mbytes, bytes) or isinstance(mbytes, bytearray):
-        return mbytes.decode("latin_1")
-    else:
-        return mbytes

-
-
-
[docs]def stringtobytes(mstr: AnyStr) -> bytes:
-    if isinstance(mstr, str):
-        return mstr.encode("latin_1")
-    else:
-        return mstr

-
-
-
[docs]def is_printable(seq: AnyStr) -> bool:
-    return set(bytestostring(seq)).issubset(set(string.printable))

-
-
-
[docs]def is_hex(maybe_hex: Iterable) -> bool:
-    return all(char in string.hexdigits for char in maybe_hex)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/library/structs.html b/_modules/chipsec/library/structs.html deleted file mode 100644 index 1c38c39f..00000000 --- a/_modules/chipsec/library/structs.html +++ /dev/null @@ -1,181 +0,0 @@ - - - - - - - - chipsec.library.structs — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.library.structs

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-import struct
-from typing import Dict
-
-
-
[docs]def DB(val: int) -> bytes:
-    return struct.pack('<B', val)

-
-
-
[docs]def DW(val: int) -> bytes:
-    return struct.pack('<H', val)

-
-
-
[docs]def DD(val: int) -> bytes:
-    return struct.pack('<L', val)

-
-
-
[docs]def DQ(val: int) -> bytes:
-    return struct.pack('<Q', val)

-
-
-SIZE2FORMAT: Dict[int, str] = {
-    1: 'B',
-    2: 'H',
-    4: 'I',
-    8: 'Q'
-}
-
-
-
[docs]def pack1(value: int, size: int) -> bytes:
-    """Shortcut to pack a single value into a string based on its size."""
-    return struct.pack(SIZE2FORMAT[size], value)

-
-
-
[docs]def unpack1(string: bytes, size: int) -> int:
-    """Shortcut to unpack a single value from a string based on its size."""
-    return struct.unpack(SIZE2FORMAT[size], string)[0]

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/bios_kbrd_buffer.html b/_modules/chipsec/modules/common/bios_kbrd_buffer.html deleted file mode 100644 index a98e1a24..00000000 --- a/_modules/chipsec/modules/common/bios_kbrd_buffer.html +++ /dev/null @@ -1,226 +0,0 @@ - - - - - - - - chipsec.modules.common.bios_kbrd_buffer — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.bios_kbrd_buffer

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Checks for exposure of pre-boot passwords (BIOS/HDD/pre-bot authentication SW) in the BIOS keyboard buffer.
-
-Reference:
-    - DEFCON 16: `Bypassing Pre-boot Authentication Passwords by Instrumenting the BIOS Keyboard Buffer <https://www.defcon.org/images/defcon-16/dc16-presentations/brossard/defcon-16-brossard-wp.pdf>`_ by Jonathan Brossard
-
-Usage:
-    ``chipsec_main -m common.bios_kbrd_buffer``
-
-Examples:
-    >>> chipsec_main.py -m common.bios_kbrd_buffer
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from chipsec.logger import print_buffer_bytes
-from typing import List
-
-TAGS = [MTAG_BIOS]
-
-COMMON_FILL_PTRN = "".join([f'{(chr(x + 0x1E)):1}' for x in range(32)])
-
-
-
[docs]class bios_kbrd_buffer(BaseModule):
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x5ebf705, 'https://chipsec.github.io/modules/chipsec.modules.common.bios_kbrd_buffer.html')
-
-
[docs]    def is_supported(self) -> bool:
-        return True

-
-
[docs]    def check_BIOS_keyboard_buffer(self) -> int:
-        kbrd_buf_head = self.cs.mem.read_physical_mem_dword(0x41A) & 0x000000FF
-        kbrd_buf_tail = self.cs.mem.read_physical_mem_dword(0x41C) & 0x000000FF
-        self.logger.log(f"[*] Keyboard buffer head pointer = 0x{kbrd_buf_head:X} (at 0x41A), tail pointer = 0x{kbrd_buf_tail:X} (at 0x41C)")
-        bios_kbrd_buf = self.cs.mem.read_physical_mem(0x41E, 32)
-        self.logger.log("[*] Keyboard buffer contents (at 0x41E):")
-        print_buffer_bytes(bios_kbrd_buf)
-        bios_kbrd_buf = bios_kbrd_buf.decode('latin_1')
-
-        has_contents = False
-
-        if COMMON_FILL_PTRN == bios_kbrd_buf:
-            self.logger.log_good("Keyboard buffer is filled with common fill pattern")
-            self.rc_res.setStatusBit(self.rc_res.status.SUCCESS)
-            return self.rc_res.getReturnCode(ModuleResult.PASSED)
-
-        for x in bios_kbrd_buf:
-            if ("\x00" != x) and ("\x20" != x):
-                has_contents = True
-                break
-
-        if (0x1E < kbrd_buf_tail) and (kbrd_buf_tail <= 0x1E + 32):
-            self.logger.log_bad(f"Keyboard buffer tail points inside the buffer (= 0x{kbrd_buf_tail:X})")
-            self.logger.log(f"    It may potentially expose lengths of pre-boot passwords. Was your password {(kbrd_buf_tail + 2 - 0x1E) // 2:d} characters long?")
-
-        self.logger.log("[*] Checking contents of the keyboard buffer..\n")
-
-        if has_contents:
-            self.logger.log_warning("Keyboard buffer is not empty. The test cannot determine conclusively if it contains pre-boot passwords.")
-            self.logger.log("  - The contents might have not been cleared by pre-boot firmware or overwritten with garbage.")
-            self.logger.log("  - Visually inspect the contents of keyboard buffer for pre-boot passwords (BIOS, HDD, full-disk encryption).")
-        else:
-            self.logger.log_passed("Keyboard buffer looks empty. Pre-boot passwords don't seem to be exposed")
-
-        if has_contents:
-            self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-            return self.rc_res.getReturnCode(ModuleResult.WARNING)
-        else:
-            self.rc_res.setStatusBit(self.rc_res.status.SUCCESS)
-            return self.rc_res.getReturnCode(ModuleResult.PASSED)

-
-    # --------------------------------------------------------------------------
-    # run( module_argv )
-    # Required function: run here all tests from this module
-    # --------------------------------------------------------------------------
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("Pre-boot Passwords in the BIOS Keyboard Buffer")
-        self.res = self.check_BIOS_keyboard_buffer()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/bios_smi.html b/_modules/chipsec/modules/common/bios_smi.html deleted file mode 100644 index 7157941d..00000000 --- a/_modules/chipsec/modules/common/bios_smi.html +++ /dev/null @@ -1,270 +0,0 @@ - - - - - - - - chipsec.modules.common.bios_smi — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.bios_smi

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The module checks that SMI events configuration is locked down
-- Global SMI Enable/SMI Lock
-- TCO SMI Enable/TCO Lock
-
-References:
-    - `Setup for Failure: Defeating SecureBoot <http://syscan.org/index.php/download/get/6e597f6067493dd581eed737146f3afb/SyScan2014_CoreyKallenberg_SetupforFailureDefeatingSecureBoot.zip>`_ by Corey Kallenberg, Xeno Kovah, John Butterworth, Sam Cornwell
-    - `Summary of Attacks Against BIOS and Secure Boot <https://www.defcon.org/images/defcon-22/dc-22-presentations/Bulygin-Bazhaniul-Furtak-Loucaides/DEFCON-22-Bulygin-Bazhaniul-Furtak-Loucaides-Summary-of-attacks-against-BIOS-UPDATED.pdf>`_
-
-Usage:
-    ``chipsec_main -m common.bios_smi``
-
-Examples:
-    >>> chipsec_main.py -m common.bios_smi
-
-Registers used:
-    - SmmBiosWriteProtection (Control)
-    - TCOSMILock (Control)
-    - SMILock (Control)
-    - BiosWriteEnable (Control)
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS, MTAG_SMM
-from typing import List
-
-
-TAGS = [MTAG_BIOS, MTAG_SMM]
-
-
-
[docs]class bios_smi(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x744c3dc, 'https://chipsec.github.io/modules/chipsec.modules.common.bios_smi.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if not self.cs.is_control_defined('SmmBiosWriteProtection') or \
-           not self.cs.is_control_defined('TCOSMILock') or \
-           not self.cs.is_control_defined('SMILock') or \
-           not self.cs.is_control_defined('BiosWriteEnable'):
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            self.logger.log_important('Required controls not defined for platform.  Skipping module.')
-            return False
-        return True

-
-
[docs]    def check_SMI_locks(self) -> int:
-
-        #
-        # Checking SMM_BWP first in BIOS control to warn if SMM write-protection of the BIOS is not enabled
-        #
-        smm_bwp = self.cs.get_control('SmmBiosWriteProtection')
-        if 0 == smm_bwp:
-            self.logger.log_bad("SMM BIOS region write protection has not been enabled (SMM_BWP is not used)\n")
-        else:
-            self.logger.log_good("SMM BIOS region write protection is enabled (SMM_BWP is used)\n")
-
-        ok = True
-        warn = False
-
-        #
-        # Checking if global SMI and TCO SMI are enabled (GBL_SMI_EN and TCO_EN bits in SMI_EN register)
-        #
-        if self.cs.is_control_defined('TCOSMIEnable') and self.cs.is_control_defined('GlobalSMIEnable'):
-            self.logger.log("[*] Checking SMI enables..")
-            tco_en = self.cs.get_control('TCOSMIEnable')
-            gbl_smi_en = self.cs.get_control('GlobalSMIEnable')
-            self.logger.log(f"    Global SMI enable: {gbl_smi_en:d}")
-            self.logger.log(f"    TCO SMI enable   : {tco_en:d}")
-
-            if gbl_smi_en != 1:
-                ok = False
-                self.logger.log_bad("Global SMI is not enabled")
-            elif (tco_en != 1) and (smm_bwp != 1):
-                warn = True
-                self.logger.log_warning("TCO SMI is not enabled. BIOS may not be using it")
-            elif (tco_en != 1) and (smm_bwp == 1):
-                ok = False
-                self.logger.log_bad("TCO SMI should be enabled if using SMM BIOS region protection")
-            else:
-                self.logger.log_good("All required SMI events are enabled")
-            self.logger.log('')
-            self.logger.log("[*] Checking SMI configuration locks..")
-
-        #
-        # Checking TCO_LOCK
-        #
-        tco_lock = self.cs.get_control('TCOSMILock')
-        if tco_lock != 1:
-            ok = False
-            self.logger.log_bad("TCO SMI event configuration is not locked. TCO SMI events can be disabled")
-        else:
-            self.logger.log_good("TCO SMI configuration is locked (TCO SMI Lock)")
-
-        #
-        # Checking SMI_LOCK
-        #
-        smi_lock = self.cs.get_control('SMILock')
-        if smi_lock != 1:
-            ok = False
-            self.logger.log_bad("SMI events global configuration is not locked. SMI events can be disabled")
-        else:
-            self.logger.log_good("SMI events global configuration is locked (SMI Lock)")
-        self.logger.log('')
-
-        if ok and not warn:
-            res = ModuleResult.PASSED
-            self.logger.log_passed("All required SMI sources seem to be enabled and locked")
-        elif ok and warn:
-            res = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-            self.logger.log_warning("One or more warnings detected when checking SMI enable state")
-        else:
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            self.logger.log_failed("Not all required SMI sources are enabled and locked")
-        
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SMI Events Configuration")
-        self.res = self.check_SMI_locks()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/bios_ts.html b/_modules/chipsec/modules/common/bios_ts.html deleted file mode 100644 index 06de0e70..00000000 --- a/_modules/chipsec/modules/common/bios_ts.html +++ /dev/null @@ -1,217 +0,0 @@ - - - - - - - - chipsec.modules.common.bios_ts — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.bios_ts

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Checks for BIOS Interface Lock including Top Swap Mode
-
-References:
-    - `BIOS Boot Hijacking and VMware Vulnerabilities Digging <http://powerofcommunity.net/poc2007/sunbing.pdf>`_ by Bing Sun
-
-Usage:
-    ``chipsec_main -m common.bios_ts``
-
-Examples:
-    >>> chipsec_main.py -m common.bios_ts
-
-Registers used:
-    - BiosInterfaceLockDown (control)
-    - TopSwapStatus (control)
-    - TopSwap (control)
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from typing import List
-TAGS = [MTAG_BIOS]
-
-
-
[docs]class bios_ts(BaseModule):
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x98e2db0, 'https://chipsec.github.io/modules/chipsec.modules.common.bios_ts.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_control_defined('BiosInterfaceLockDown'):
-            return True
-        self.logger.log_important('BiosInterfaceLockDown control not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_bios_iface_lock(self) -> int:
-        bild = self.cs.get_control('BiosInterfaceLockDown')
-        self.logger.log(f"[*] BiosInterfaceLockDown (BILD) control = {bild:d}")
-
-        if self.cs.is_control_defined('TopSwapStatus'):
-            if self.cs.is_control_all_ffs('TopSwapStatus'):
-                self.logger.log("[*] BIOS Top Swap mode: can't determine status.")
-                self.logger.log_verbose('TopSwapStatus read returned all 0xFs.')
-            else:
-                tss = self.cs.get_control('TopSwapStatus')
-                self.logger.log(f"[*] BIOS Top Swap mode is {'enabled' if (1 == tss) else 'disabled'} (TSS = {tss:d})")
-
-        if self.cs.is_control_defined('TopSwap'):
-            if self.cs.is_control_all_ffs('TopSwap'):
-                self.logger.log("[*] RTC Top Swap control (TS): can't determine status.")
-                self.logger.log_verbose('TopSwap read returned all 0xFs.')
-            else:
-                ts = self.cs.get_control('TopSwap')
-                self.logger.log(f"[*] RTC TopSwap control (TS) = {ts:x}")
-
-        if bild == 0:
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            self.logger.log_failed("BIOS Interface is not locked (including Top Swap Mode)")
-        else:
-            res = ModuleResult.PASSED
-            self.logger.log_passed("BIOS Interface is locked (including Top Swap Mode)")
-        
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("BIOS Interface Lock (including Top Swap Mode)")
-        self.res = self.check_bios_iface_lock()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/bios_wp.html b/_modules/chipsec/modules/common/bios_wp.html deleted file mode 100644 index 938e68d9..00000000 --- a/_modules/chipsec/modules/common/bios_wp.html +++ /dev/null @@ -1,307 +0,0 @@ - - - - - - - - chipsec.modules.common.bios_wp — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.bios_wp

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The BIOS region in flash can be protected either using SMM-based protection or using configuration in the SPI controller. However, the SPI controller configuration is set once and locked, which would prevent writes later.
-
-This module checks both mechanisms. In order to pass this test using SPI controller configuration, the SPI Protected Range registers (PR0-4) will need to cover the entire BIOS region.
-Often, if this configuration is used at all, it is used only to protect part of the BIOS region (usually the boot block).
-If other important data (eg. NVRAM) is not protected, however, some vulnerabilities may be possible.
-
-`A Tale of One Software Bypass of Windows 8 Secure Boot <http://www.c7zero.info/stuff/Windows8SecureBoot_Bulygin-Furtak-Bazhniuk_BHUSA2013.pdf>`_
-In a system where certain BIOS data was not protected, malware may be able to write to the Platform Key stored on the flash, thereby disabling secure boot.
-
-SMM based write protection is controlled from the BIOS Control Register. When the BIOS Write Protect Disable bit is set (sometimes called BIOSWE or BIOS Write Enable), then writes are allowed. When cleared, it can also be locked with the BIOS Lock Enable (BLE) bit. When locked, attempts to change the WPD bit will result in generation of an SMI. This way, the SMI handler can decide whether to perform the write.
-
-As demonstrated in the `Speed Racer <https://bromiumlabs.files.wordpress.com/2015/01/speed_racer_whitepaper.pdf>`_ issue, a race condition may exist between the outstanding write and processing of the SMI that is generated. For this reason, the EISS bit (sometimes called SMM_BWP or SMM BIOS Write Protection) must be set to ensure that only SMM can write to the SPI flash.
-
-References:
-    - `A Tale of One Software Bypass of Windows 8 Secure Boot <http://www.c7zero.info/stuff/Windows8SecureBoot_Bulygin-Furtak-Bazhniuk_BHUSA2013.pdf>`_
-    - `Speed Racer <https://bromiumlabs.files.wordpress.com/2015/01/speed_racer_whitepaper.pdf>`_
-
-Usage:
-    ``chipsec_main -m common.bios_wp``
-
-Examples:
-    >>> chipsec_main.py -m common.bios_wp
-
-Registers used: (n = 0,1,2,3,4)
-    - BiosLockEnable (Control)
-    - BiosWriteEnable (Control)
-    - SmmBiosWriteProtection (Control)
-    - PRn.PRB
-    - PRn.RPE
-    - PRn.PRL
-    - PRn.WPE
-
-.. note::
-    - Module will fail if SMM-based protection is not correctly configured and SPI protected ranges (PR registers) do not protect the entire BIOS region.
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from chipsec.hal.spi import BIOS, SPI
-from typing import List
-
-
-TAGS = [MTAG_BIOS]
-
-
-
[docs]class bios_wp(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.spi = SPI(self.cs)
-        self.rc_res = ModuleResult(0xd1e21a2, 'https://chipsec.github.io/modules/chipsec.modules.common.bios_wp.html')
-
-
[docs]    def is_supported(self) -> bool:
-        ble_exists = self.cs.is_control_defined('BiosLockEnable')
-        bioswe_exists = self.cs.is_control_defined('BiosWriteEnable')
-        smmbwp_exists = self.cs.is_control_defined('SmmBiosWriteProtection')
-
-        if ble_exists and bioswe_exists and smmbwp_exists:
-            return True
-        self.logger.log_important('Required Controls are not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_BIOS_write_protection(self) -> int:
-        ble = self.cs.get_control('BiosLockEnable', with_print=True)
-        bioswe = self.cs.get_control('BiosWriteEnable')
-        smmbwp = self.cs.get_control('SmmBiosWriteProtection')
-
-        # Is the BIOS flash region write protected?
-        write_protected = 0
-        if (1 == ble) and (0 == bioswe):
-            if 1 == smmbwp:
-                self.logger.log_good("BIOS region write protection is enabled (writes restricted to SMM)")
-                write_protected = 1
-            else:
-                self.logger.log_important("Enhanced SMM BIOS region write protection has not been enabled (SMM_BWP is not used)")
-        else:
-            self.logger.log_bad("BIOS region write protection is disabled!")
-
-        return write_protected == 1

-
-
[docs]    def check_SPI_protected_ranges(self) -> bool:
-        (bios_base, bios_limit, _) = self.spi.get_SPI_region(BIOS)
-        self.logger.log(f"\n[*] BIOS Region: Base = 0x{bios_base:08X}, Limit = 0x{bios_limit:08X}")
-        self.spi.display_SPI_Protected_Ranges()
-
-        pr_cover_bios = False
-        pr_partial_cover_bios = False
-
-        areas_to_protect = [(bios_base, bios_limit)]
-
-        for j in range(5):
-            (base, limit, wpe, _, _, _) = self.spi.get_SPI_Protected_Range(j)
-            if base > limit:
-                continue
-            if wpe == 1:
-                areas = areas_to_protect[:]
-                for area in areas:
-                    (start, end) = area
-                    if (base <= start) and (limit >= start):  # overlap bottom
-                        if limit >= end:
-                            areas_to_protect.remove(area)
-                        else:
-                            areas_to_protect.remove(area)
-                            area = (limit + 1, end)
-                            areas_to_protect.append(area)
-                    elif (base <= end) and (limit >= end):  # overlap top
-                        if base <= start:
-                            areas_to_protect.remove(area)
-                        else:
-                            areas_to_protect.remove(area)
-                            area = (start, base - 1)
-                            areas_to_protect.append(area)
-                    elif (base > start) and (limit < end):  # split
-                        areas_to_protect.remove(area)
-                        areas_to_protect.append((start, base - 1))
-                        areas_to_protect.append((limit + 1, end))
-
-        if len(areas_to_protect) == 0:
-            pr_cover_bios = True
-        else:
-            if (len(areas_to_protect) != 1) or (areas_to_protect[0] != (bios_base, bios_limit)):
-                pr_partial_cover_bios = True
-
-        if pr_partial_cover_bios:
-            self.logger.log('')
-            self.logger.log_important("SPI protected ranges write-protect parts of BIOS region (other parts of BIOS can be modified)")
-        else:
-            if not pr_cover_bios:
-                self.logger.log('')
-                self.logger.log_important("None of the SPI protected ranges write-protect BIOS region")
-
-        return pr_cover_bios

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("BIOS Region Write Protection")
-        wp = self.check_BIOS_write_protection()
-        spr = self.check_SPI_protected_ranges()
-
-        self.logger.log('')
-        if wp:
-            if spr:
-                self.logger.log_passed("BIOS is write protected (by SMM and SPI Protected Ranges)")
-            else:
-                self.logger.log_passed("BIOS is write protected")
-        else:
-            if spr:
-                self.logger.log_passed("SPI Protected Ranges are configured to write protect BIOS")
-            else:
-                self.logger.log_important('BIOS should enable all available SMM based write protection mechanisms.')
-                self.logger.log_important('Or configure SPI protected ranges to protect the entire BIOS region.')
-                self.logger.log_failed("BIOS is NOT protected completely")
-
-        if wp or spr:
-            self.rc_res.setStatusBit(self.rc_res.status.SUCCESS)
-            return self.rc_res.getReturnCode(ModuleResult.PASSED)
-        else:
-            self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-            return self.rc_res.getReturnCode(ModuleResult.FAILED)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/cpu/cpu_info.html b/_modules/chipsec/modules/common/cpu/cpu_info.html deleted file mode 100644 index 92fa25fa..00000000 --- a/_modules/chipsec/modules/common/cpu/cpu_info.html +++ /dev/null @@ -1,233 +0,0 @@ - - - - - - - - chipsec.modules.common.cpu.cpu_info — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.cpu.cpu_info

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018 - 2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Displays CPU information
-
-Reference:
-    - Intel 64 and IA-32 Architectures Software Developer Manual (SDM)
-        - https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html
-
-Usage:
-    ``chipsec_main -m common.cpu.cpu_info``
-
-Examples:
-    >>> chipsec_main.py -m common.cpu.cpu_info
-
-Registers used:
-    - IA32_BIOS_SIGN_ID.Microcode
-
-.. note:
-    No PASS/FAIL returned, INFORMATION only.
-
-"""
-
-import struct
-from chipsec.module_common import BaseModule, ModuleResult
-from chipsec.defines import bytestostring
-from typing import List
-
-
[docs]class cpu_info(BaseModule):
-    def __init__(self):
-        super(cpu_info, self).__init__()
-        self.rc_res = ModuleResult(0x74b9b60, 'https://chipsec.github.io/modules/chipsec.modules.common.cpu.cpu_info.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.register_has_field('IA32_BIOS_SIGN_ID', 'Microcode'):
-            return True
-        self.logger.log_important('IA32_BIOS_SIGN_ID.Microcode not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        # Log the start of the test
-        self.logger.start_test('Current Processor Information:')
-
-        # Determine number of threads to check
-        thread_count = 1
-        if not self.cs.os_helper.is_efi():
-            thread_count = self.cs.msr.get_cpu_thread_count()
-
-        for thread in range(thread_count):
-            # Handle processor binding so we are always checking processor 0
-            # for this example.  No need to do this in UEFI Shell.
-            if not self.cs.os_helper.is_efi():
-                self.cs.helper.set_affinity(thread)
-
-            # Display thread
-            self.logger.log(f'[*] Thread {thread:04d}')
-
-            # Get processor brand string
-            brand = ''
-            for eax_val in [0x80000002, 0x80000003, 0x80000004]:
-                regs = self.cs.cpu.cpuid(eax_val, 0)
-                for i in range(4):
-                    brand += bytestostring(struct.pack('<I', regs[i]))
-            brand = brand.rstrip('\x00')
-            self.logger.log(f'[*] Processor: {brand}')
-
-            # Get processor version information
-            (eax, _, _, _) = self.cs.cpu.cpuid(0x01, 0x00)
-            stepping = eax & 0xF
-            model = (eax >> 4) & 0xF
-            family = (eax >> 8) & 0xF
-            if (family == 0x0F) or (family == 0x06):
-                model = ((eax >> 12) & 0xF0) | model
-            if family == 0x0F:
-                family = ((eax >> 20) & 0xFF) | family
-            self.logger.log(f'[*]            Family: {family:02X} Model: {model:02X} Stepping: {stepping:01X}')
-
-            # Get microcode revision
-            microcode_rev = self.cs.read_register_field('IA32_BIOS_SIGN_ID', 'Microcode', cpu_thread=thread)
-            self.logger.log(f'[*]            Microcode: {microcode_rev:08X}')
-            self.logger.log('[*]')
-
-        self.logger.log_information('Processor information displayed')
-        
-        self.rc_res.setStatusBit(self.rc_res.status.INFORMATION)
-        return self.rc_res.getReturnCode(ModuleResult.INFORMATION)

-
-
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/cpu/ia_untrusted.html b/_modules/chipsec/modules/common/cpu/ia_untrusted.html deleted file mode 100644 index a5b3df49..00000000 --- a/_modules/chipsec/modules/common/cpu/ia_untrusted.html +++ /dev/null @@ -1,215 +0,0 @@ - - - - - - - - chipsec.modules.common.cpu.ia_untrusted — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.cpu.ia_untrusted

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-IA Untrusted checks
-
-Usage:
-    ``chipsec_main -m common.cpu.ia_untrusted``
-
-Examples:
-    >>> chipsec_main.py -m common.cpu.ia_untrusted
-
-Registers used:
-    - MSR_BIOS_DONE.IA_UNTRUSTED
-    - MSR_BIOS_DONE.SoC_BIOS_DONE
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_HWCONFIG
-from typing import List
-
-TAGS = [MTAG_HWCONFIG]
-
-
-
[docs]class ia_untrusted(BaseModule):
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x63d2b37, 'https://chipsec.github.io/modules/chipsec.modules.common.cpu.ia_untrusted.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.register_has_field('MSR_BIOS_DONE', 'IA_UNTRUSTED'):
-            return True
-        self.logger.log_important('MSR_BIOS_DONE.IA_UNTRUSTED is not defined for platform.  Skipping checks.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_untrusted(self) -> int:
-        self.logger.log('[*] Check that untrusted mode has been set.')
-        res = ModuleResult.PASSED
-        if self.cs.register_has_field('MSR_BIOS_DONE', 'SoC_BIOS_DONE'):
-            soc = self.cs.read_register_field('MSR_BIOS_DONE', 'SoC_BIOS_DONE')
-            if soc == 0:
-                res = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-                self.logger.log_bad('SoC_BIOS_DONE not set.')
-            else:
-                self.logger.log_good('SoC_BIOS_DONE set.')
-
-        self.logger.log("")
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            bd = self.cs.read_register('MSR_BIOS_DONE', tid)
-            if self.logger.VERBOSE:
-                self.cs.print_register('MSR_BIOS_DONE', bd)
-            ia_untrusted = self.cs.get_register_field('MSR_BIOS_DONE', bd, "IA_UNTRUSTED")
-            if ia_untrusted == 0:
-                res = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-                self.logger.log_bad(f'IA_UNTRUSTED not set on thread {tid:d}.')
-            else:
-                self.logger.log_good(f'IA_UNTRUSTED set on thread {tid:d}.')
-        return res

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test('IA_UNTRUSTED Check')
-        self.res = self.check_untrusted()
-        self.logger.log("")
-        if self.res == ModuleResult.PASSED:
-            self.logger.log_passed("IA_UNTRUSTED set on all threads")
-        elif self.res == ModuleResult.FAILED:
-            self.logger.log_failed("IA_UNTRUSTED not set on all threads")
-        
-        return self.rc_res.getReturnCode(self.res)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/cpu/spectre_v2.html b/_modules/chipsec/modules/common/cpu/spectre_v2.html deleted file mode 100644 index d8ad7f82..00000000 --- a/_modules/chipsec/modules/common/cpu/spectre_v2.html +++ /dev/null @@ -1,419 +0,0 @@ - - - - - - - - chipsec.modules.common.cpu.spectre_v2 — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.cpu.spectre_v2

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018, Eclypsium, Inc.
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-"""
-The module checks if system includes hardware mitigations for Speculative Execution Side Channel.
-Specifically, it verifies that the system supports CPU mitigations for
-Branch Target Injection vulnerability a.k.a. Spectre Variant 2 (CVE-2017-5715)
-
-The module checks if the following hardware mitigations are supported by the CPU
-and enabled by the OS/software:
-
-1. Indirect Branch Restricted Speculation (IBRS) and Indirect Branch Predictor Barrier (IBPB):
-   CPUID.(EAX=7H,ECX=0):EDX[26] == 1
-
-2. Single Thread Indirect Branch Predictors (STIBP):
-   CPUID.(EAX=7H,ECX=0):EDX[27] == 1
-   IA32_SPEC_CTRL[STIBP] == 1
-
-3. Enhanced IBRS:
-   CPUID.(EAX=7H,ECX=0):EDX[29] == 1
-   IA32_ARCH_CAPABILITIES[IBRS_ALL] == 1
-   IA32_SPEC_CTRL[IBRS] == 1
-
-4. @TODO: Mitigation for Rogue Data Cache Load (RDCL):
-   CPUID.(EAX=7H,ECX=0):EDX[29] == 1
-   IA32_ARCH_CAPABILITIES[RDCL_NO] == 1
-
-In addition to checking if CPU supports and OS enables all mitigations, we need to check
-that relevant MSR bits are set consistently on all logical processors (CPU threads).
-
-
-The module returns the following results:
-
-FAILED:
-    IBRS/IBPB is not supported
-
-WARNING:
-    IBRS/IBPB is supported
-
-    Enhanced IBRS is not supported
-
-WARNING:
-    IBRS/IBPB is supported
-
-    Enhanced IBRS is supported
-
-    Enhanced IBRS is not enabled by the OS
-
-WARNING:
-    IBRS/IBPB is supported
-
-    STIBP is not supported or not enabled by the OS
-
-PASSED:
-    IBRS/IBPB is supported
-
-    Enhanced IBRS is supported
-
-    Enhanced IBRS is enabled by the OS
-
-    STIBP is supported
-
-
-Notes:
-
-- The module returns WARNING when CPU doesn't support enhanced IBRS
-  Even though OS/software may use basic IBRS by setting IA32_SPEC_CTRL[IBRS] when necessary,
-  we have no way to verify this
-
-- The module returns WARNING when CPU supports enhanced IBRS but OS doesn't set IA32_SPEC_CTRL[IBRS]
-  Under enhanced IBRS, OS can set IA32_SPEC_CTRL[IBRS] once to take advantage of IBRS protection
-
-- The module returns WARNING when CPU doesn't support STIBP or OS doesn't enable it
-  Per Speculative Execution Side Channel Mitigations:
-  "enabling IBRS prevents software operating on one logical processor from controlling
-  the predicted targets of indirect branches executed on another logical processor.
-  For that reason, it is not necessary to enable STIBP when IBRS is enabled"
-
-- OS/software may implement "retpoline" mitigation for Spectre variant 2
-  instead of using CPU hardware IBRS/IBPB
-
-@TODO: we should verify CPUID.07H:EDX on all logical CPUs as well
-because it may differ if ucode update wasn't loaded on all CPU cores
-
-
-Hardware registers used:
-
-- CPUID.(EAX=7H,ECX=0):EDX[26]     - enumerates support for IBRS and IBPB
-- CPUID.(EAX=7H,ECX=0):EDX[27]     - enumerates support for STIBP
-- CPUID.(EAX=7H,ECX=0):EDX[29]     - enumerates support for the IA32_ARCH_CAPABILITIES MSR
-- IA32_ARCH_CAPABILITIES[IBRS_ALL] - enumerates support for enhanced IBRS
-- IA32_ARCH_CAPABILITIES[RCDL_NO]  - enumerates support RCDL mitigation
-- IA32_SPEC_CTRL[IBRS]             - enable control for enhanced IBRS by the software/OS
-- IA32_SPEC_CTRL[STIBP]            - enable control for STIBP by the software/OS
-
-
-References:
-
-- Reading privileged memory with a side-channel by Jann Horn, Google Project Zero:
-  https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
-
-- Spectre:
-  https://spectreattack.com/spectre.pdf
-
-- Meltdown:
-  https://meltdownattack.com/meltdown.pdf
-
-- Speculative Execution Side Channel Mitigations:
-  https://software.intel.com/sites/default/files/managed/c5/63/336996-Speculative-Execution-Side-Channel-Mitigations.pdf
-
-- Retpoline: a software construct for preventing branch-target-injection:
-  https://support.google.com/faqs/answer/7625886
-
-"""
-
-from chipsec.module_common import BaseModule, MTAG_CPU, MTAG_HWCONFIG, MTAG_SMM, ModuleResult
-from chipsec.exceptions import HWAccessViolationError, UnimplementedAPIError
-from chipsec.defines import BIT26, BIT27, BIT29
-from typing import List
-
-TAGS = [MTAG_CPU, MTAG_HWCONFIG, MTAG_SMM]
-
-
-
[docs]class spectre_v2(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0xceea2c8, 'https://chipsec.github.io/modules/chipsec.modules.common.cpu.spectre_v2.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_register_defined('IA32_ARCH_CAPABILITIES'):
-            if self.cs.is_register_defined('IA32_SPEC_CTRL'):
-                return True
-            self.logger.log_important('IA32_SPEC_CTRL register not defined for platform.  Skipping module.')
-        else:
-            self.logger.log_important('IA32_ARCH_CAPABILITIES register not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_spectre_mitigations(self) -> int:
-        try:
-            cpu_thread_count = self.cs.msr.get_cpu_thread_count()
-        except:
-            cpu_thread_count = 1
-
-        #
-        # Read CPUID Leaf 07H
-        #
-        (_, _, _, r_edx) = self.cs.cpu.cpuid(0x7, 0x0)
-        ibrs_ibpb_supported = (r_edx & BIT26) > 0
-        stibp_supported = (r_edx & BIT27) > 0
-        arch_cap_supported = (r_edx & BIT29) > 0
-        self.logger.log(f"[*] CPUID.7H:EDX[26] = {ibrs_ibpb_supported:d} Indirect Branch Restricted Speculation (IBRS) & Predictor Barrier (IBPB)")
-        self.logger.log(f"[*] CPUID.7H:EDX[27] = {stibp_supported:d} Single Thread Indirect Branch Predictors (STIBP)")
-        self.logger.log(f"[*] CPUID.7H:EDX[29] = {arch_cap_supported:d} IA32_ARCH_CAPABILITIES")
-
-        if ibrs_ibpb_supported:
-            self.logger.log_good("CPU supports IBRS and IBPB")
-        else:
-            self.logger.log_bad("CPU doesn't support IBRS and IBPB")
-
-        if stibp_supported:
-            self.logger.log_good("CPU supports STIBP")
-        else:
-            self.logger.log_bad("CPU doesn't support STIBP")
-
-        if arch_cap_supported:
-            ibrs_enh_supported = True
-            self.logger.log("[*] Checking enhanced IBRS support in IA32_ARCH_CAPABILITIES...")
-            for tid in range(cpu_thread_count):
-                arch_cap_msr = 0
-                try:
-                    arch_cap_msr = self.cs.read_register('IA32_ARCH_CAPABILITIES', tid)
-                except HWAccessViolationError:
-                    self.logger.log_error("Couldn't read IA32_ARCH_CAPABILITIES")
-                    ibrs_enh_supported = False
-                    break
-
-                ibrs_all = self.cs.get_register_field('IA32_ARCH_CAPABILITIES', arch_cap_msr, 'IBRS_ALL')
-                self.logger.log(f"[*]   cpu{tid:d}: IBRS_ALL = {ibrs_all:x}")
-                if 0 == ibrs_all:
-                    ibrs_enh_supported = False
-                    break
-
-            if ibrs_enh_supported:
-                self.logger.log_good("CPU supports enhanced IBRS (on all logical CPU)")
-            else:
-                self.logger.log_bad("CPU doesn't support enhanced IBRS")
-        else:
-            ibrs_enh_supported = False
-            self.logger.log_bad("CPU doesn't support enhanced IBRS")
-
-        ibrs_enabled = True
-        stibp_enabled_count = 0
-        if ibrs_enh_supported:
-            self.logger.log("[*] Checking if OS is using Enhanced IBRS...")
-            for tid in range(cpu_thread_count):
-                spec_ctrl_msr = 0
-                try:
-                    spec_ctrl_msr = self.cs.read_register('IA32_SPEC_CTRL', tid)
-                except HWAccessViolationError:
-                    self.logger.log_error("Couldn't read IA32_SPEC_CTRL")
-                    ibrs_enabled = False
-                    break
-
-                ibrs = self.cs.get_register_field('IA32_SPEC_CTRL', spec_ctrl_msr, 'IBRS')
-                self.logger.log(f"[*]   cpu{tid:d}: IA32_SPEC_CTRL[IBRS] = {ibrs:x}")
-                if 0 == ibrs:
-                    ibrs_enabled = False
-
-                # ok to access STIBP bit even if STIBP is not supported
-                stibp = self.cs.get_register_field('IA32_SPEC_CTRL', spec_ctrl_msr, 'STIBP')
-                self.logger.log(f"[*]   cpu{tid:d}: IA32_SPEC_CTRL[STIBP] = {stibp:x}")
-                if 1 == stibp:
-                    stibp_enabled_count += 1
-
-            if ibrs_enabled:
-                self.logger.log_good("OS enabled Enhanced IBRS (on all logical processors)")
-            else:
-                self.logger.log_bad("OS doesn't seem to use Enhanced IBRS")
-            if stibp_enabled_count == cpu_thread_count:
-                self.logger.log_good("OS enabled STIBP (on all logical processors)")
-            elif stibp_enabled_count > 0:
-                self.logger.log_good("OS selectively enabling STIBP")
-            else:
-                self.logger.log_information("Unable to determine if the OS uses STIBP")
-
-        #
-        # Combining results of all checks into final decision
-        #
-        # FAILED : IBRS/IBPB is not supported
-        # WARNING: IBRS/IBPB is supported
-        #          enhanced IBRS is not supported
-        # WARNING: IBRS/IBPB is supported
-        #          enhanced IBRS is supported
-        #          enhanced IBRS is not enabled by the OS
-        # WARNING: IBRS/IBPB is supported
-        #          STIBP is not supported
-        # PASSED : IBRS/IBPB is supported
-        #          enhanced IBRS is supported
-        #          enhanced IBRS is enabled by the OS
-        #          STIBP is supported
-        #
-        if not ibrs_ibpb_supported:
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.MITIGATION)
-            self.logger.log_failed("CPU mitigation (IBRS) is missing")
-        elif not ibrs_enh_supported:
-            res = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.PROTECTION)
-            self.logger.log_warning("CPU supports mitigation (IBRS) but doesn't support enhanced IBRS")
-        elif ibrs_enh_supported and (not ibrs_enabled):
-            res = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.MITIGATION)
-            self.logger.log_warning("CPU supports mitigation (enhanced IBRS) but OS is not using it")
-        else:
-            if not stibp_supported:
-                res = ModuleResult.WARNING
-                self.rc_res.setStatusBit(self.rc_res.status.MITIGATION)
-                self.logger.log_warning("CPU supports mitigation (enhanced IBRS) but STIBP is not supported")
-            else:
-                res = ModuleResult.PASSED
-                self.logger.log_passed("CPU and OS support hardware mitigations")
-
-        self.logger.log_important("OS may be using software based mitigation (eg. retpoline)")
-        try:
-            if self.cs.helper.retpoline_enabled():
-                res = ModuleResult.PASSED
-                self.logger.log_passed("Retpoline is enabled by the OS")
-            else:
-                self.logger.log_bad("Retpoline is NOT enabled by the OS")
-        except UnimplementedAPIError as e:
-            self.logger.log_warning(str(e))
-        except NotImplementedError:
-            self.logger.log_warning("Retpoline check not implemented in current environment")
-
-        return res

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("Checks for Branch Target Injection / Spectre v2 (CVE-2017-5715)")
-        self.res = self.check_spectre_mitigations()
-        return self.rc_res.getReturnCode(self.res)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/debugenabled.html b/_modules/chipsec/modules/common/debugenabled.html deleted file mode 100644 index e591b090..00000000 --- a/_modules/chipsec/modules/common/debugenabled.html +++ /dev/null @@ -1,272 +0,0 @@ - - - - - - - - chipsec.modules.common.debugenabled — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.debugenabled

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018, Eclypsium, Inc.
-# Copyright (c) 2018-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-"""
-This module checks if the system has debug features turned on,
-specifically the Direct Connect Interface (DCI).
-
-This module checks the following bits:
-1. HDCIEN bit in the DCI Control Register
-2. Debug enable bit in the IA32_DEBUG_INTERFACE MSR
-3. Debug lock bit in the IA32_DEBUG_INTERFACE MSR
-4. Debug occurred bit in the IA32_DEBUG_INTERFACE MSR
-
-Usage:
-    ``chipsec_main -m common.debugenabled``
-
-Examples:
-    >>> chipsec_main.py -m common.debugenabled
-
-The module returns the following results:
-    - **FAILED** : Any one of the debug features is enabled or unlocked.
-    - **PASSED** : All debug feature are disabled and locked.
-
-Registers used:
-    - IA32_DEBUG_INTERFACE[DEBUGENABLE]
-    - IA32_DEBUG_INTERFACE[DEBUGELOCK]
-    - IA32_DEBUG_INTERFACE[DEBUGEOCCURED]
-    - P2SB_DCI.DCI_CONTROL_REG[HDCIEN]
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult
-from chipsec.defines import BIT11
-from typing import List
-
-_MODULE_NAME = 'debugenabled'
-
-
-
[docs]class debugenabled(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0xe516a56, 'https://chipsec.github.io/modules/chipsec.modules.common.debugenabled.html')
-        self.is_enable_set = False
-        self.is_debug_set = False
-        self.is_lock_set = True
-
-
[docs]    def is_supported(self) -> bool:
-        # Use CPUID Function 1 to determine if the IA32_DEBUG_INTERFACE MSR is supported.
-        # See IA32 SDM CPUID Instruction for details.  (SDBG ECX bit 11)
-        (_, _, ecx, _) = self.cs.cpu.cpuid(1, 0)
-        supported = (ecx & BIT11) != 0
-        if not supported and not self.cs.is_register_defined('ECTRL'):
-            self.logger.log_important('CPU Debug features are not supported on this platform.  Skipping module.')
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return supported

-
-
[docs]    def check_dci(self) -> int:
-        TestFail = ModuleResult.PASSED
-        self.logger.log('')
-        self.logger.log('[*] Checking DCI register status')
-        ectrl = self.cs.read_register('ECTRL')
-        HDCIEN = self.cs.get_register_field('ECTRL', ectrl, 'ENABLE') == 1
-        if self.logger.VERBOSE:
-            self.cs.print_register('ECTRL', ectrl)
-        if HDCIEN:
-            self.logger.log_bad('DCI Debug is enabled')
-            TestFail = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.DEBUG_FEATURE)
-        else:
-            self.logger.log_good('DCI Debug is disabled')
-        return TestFail

-
-
[docs]    def check_cpu_debug_enable(self) -> int:
-        self.logger.log('')
-        self.logger.log('[*] Checking IA32_DEBUG_INTERFACE MSR status')
-        TestFail = ModuleResult.PASSED
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            dbgiface = self.cs.read_register('IA32_DEBUG_INTERFACE', tid)
-            IA32_DEBUG_INTERFACE_DEBUGENABLE = self.cs.get_register_field('IA32_DEBUG_INTERFACE', dbgiface, 'ENABLE') == 1
-            IA32_DEBUG_INTERFACE_DEBUGELOCK = self.cs.get_register_field('IA32_DEBUG_INTERFACE', dbgiface, 'LOCK') == 1
-            IA32_DEBUG_INTERFACE_DEBUGEOCCURED = self.cs.get_register_field('IA32_DEBUG_INTERFACE', dbgiface, 'DEBUG_OCCURRED') == 1
-
-            if self.logger.VERBOSE:
-                self.cs.print_register('IA32_DEBUG_INTERFACE', dbgiface)
-
-            if IA32_DEBUG_INTERFACE_DEBUGENABLE:
-                self.logger.log_bad('CPU debug enable requested by software.')
-                self.is_enable_set = True
-                TestFail = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.DEBUG_FEATURE)
-            if not IA32_DEBUG_INTERFACE_DEBUGELOCK:
-                self.logger.log_bad('CPU debug interface is not locked.')
-                self.is_lock_set = False
-                TestFail = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            if IA32_DEBUG_INTERFACE_DEBUGEOCCURED:
-                self.logger.log_important('Debug Occurred bit set in IA32_DEBUG_INTERFACE MSR')
-                self.is_debug_set = True
-                self.rc_res.setStatusBit(self.rc_res.status.DEBUG_FEATURE)
-                if TestFail == ModuleResult.PASSED:
-                    TestFail = ModuleResult.WARNING
-            if TestFail == ModuleResult.PASSED:
-                self.logger.log_good('CPU debug interface state is correct.')
-        return TestFail

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test('Debug features test')
-
-        cpu_debug_test_fail = self.check_cpu_debug_enable()
-
-        dci_test_fail = ModuleResult.PASSED
-        if self.cs.is_register_defined('ECTRL'):
-            dci_test_fail = self.check_dci()
-
-        self.logger.log('')
-        self.logger.log('[*] Module Results:')
-
-        if self.is_debug_set:
-            self.logger.log_important('IA32_DEBUG_INTERFACE.DEBUG_OCCURRED bit is set.')
-        if self.is_enable_set:
-            self.logger.log_important('IA32_DEBUG_INTERFACE.ENABLE bit is set.')
-        if not self.is_lock_set:
-            self.logger.log_important('IA32_DEBUG_INTERFACE.LOCK bit is NOT set.')
-
-        if (dci_test_fail == ModuleResult.FAILED) or (cpu_debug_test_fail == ModuleResult.FAILED):
-            self.logger.log_failed('One or more of the debug checks have failed and a debug feature is enabled')
-            self.res = self.rc_res.getReturnCode(ModuleResult.FAILED)
-        elif (dci_test_fail == ModuleResult.WARNING) or (cpu_debug_test_fail == ModuleResult.WARNING):
-            self.logger.log_warning('An unexpected debug state was discovered on this platform')
-            self.res = self.rc_res.getReturnCode(ModuleResult.WARNING)
-        else:
-            self.logger.log_passed('All checks have successfully passed')
-
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/ia32cfg.html b/_modules/chipsec/modules/common/ia32cfg.html deleted file mode 100644 index baf9b949..00000000 --- a/_modules/chipsec/modules/common/ia32cfg.html +++ /dev/null @@ -1,214 +0,0 @@ - - - - - - - - chipsec.modules.common.ia32cfg — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.ia32cfg

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2019, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Tests that IA-32/IA-64 architectural features are configured and locked, including IA32 Model Specific Registers (MSRs)
-
-Reference:
-    - Intel 64 and IA-32 Architectures Software Developer Manual (SDM)
-        - https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html
-
-Usage:
-    ``chipsec_main -m common.ia32cfg``
-
-Examples:
-    >>> chipsec_main.py -m common.ia32cfg
-
-Registers used:
-    - IA32_FEATURE_CONTROL
-    - Ia32FeatureControlLock (control)
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_HWCONFIG
-from typing import List
-
-
-TAGS = [MTAG_HWCONFIG]
-
-
-
[docs]class ia32cfg(BaseModule):
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0xcc8cd5d, 'https://chipsec.github.io/modules/chipsec.modules.common.ia32cfg.html')
-        self.res = ModuleResult.PASSED
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_register_defined('IA32_FEATURE_CONTROL'):
-            if self.cs.is_control_defined('Ia32FeatureControlLock'):
-                return True
-            self.logger.log_important('Ia32FeatureControlLock control not defined for platform.  Skipping module.')
-        else:
-            self.logger.log_important('IA32_FEATURE_CONTROL register not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_ia32feature_control(self) -> int:
-        self.logger.log("[*] Verifying IA32_Feature_Control MSR is locked on all logical CPUs..")
-
-        res = ModuleResult.PASSED
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            if self.logger.VERBOSE:
-                feature_cntl = self.cs.read_register('IA32_FEATURE_CONTROL', tid)
-                self.cs.print_register('IA32_FEATURE_CONTROL', feature_cntl)
-            feature_cntl_lock = self.cs.get_control('Ia32FeatureControlLock', tid)
-            self.logger.log(f"[*] cpu{tid:d}: IA32_FEATURE_CONTROL Lock = {feature_cntl_lock:d}")
-            if 0 == feature_cntl_lock:
-                res = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-
-
-        if res == ModuleResult.PASSED:
-            self.logger.log_passed("IA32_FEATURE_CONTROL MSR is locked on all logical CPUs")
-        else:
-            self.logger.log_failed("IA32_FEATURE_CONTROL MSR is not locked on all logical CPUs")
-
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("IA32 Feature Control Lock")
-        self.res = self.check_ia32feature_control()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/me_mfg_mode.html b/_modules/chipsec/modules/common/me_mfg_mode.html deleted file mode 100644 index 86cdb5a1..00000000 --- a/_modules/chipsec/modules/common/me_mfg_mode.html +++ /dev/null @@ -1,257 +0,0 @@ - - - - - - - - chipsec.modules.common.me_mfg_mode — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.me_mfg_mode

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018, Eclypsium, Inc.
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-
-"""
-This module checks that ME Manufacturing mode is not enabled.
-
-References:
-
-https://blog.ptsecurity.com/2018/10/intel-me-manufacturing-mode-macbook.html
-
-`PCI_DEVS.H <https://github.com/coreboot/coreboot/blob/master/src/soc/intel/*/include/soc/pci_devs.h>`_
-
-.. code-block::
-
-    #define PCH_DEV_SLOT_CSE        0x16
-    #define  PCH_DEVFN_CSE          _PCH_DEVFN(CSE, 0)
-    #define  PCH_DEV_CSE            _PCH_DEV(CSE, 0)
-
-https://github.com/coreboot/coreboot/blob/master/src/soc/intel/apollolake/cse.c
-
-.. code-block::
-
-    fwsts1 = dump_status(1, PCI_ME_HFSTS1);
-    # Minimal decoding is done here in order to call out most important
-    # pieces. Manufacturing mode needs to be locked down prior to shipping
-    # the product so it's called out explicitly.
-    printk(BIOS_DEBUG, "ME: Manufacturing Mode      : %s", (fwsts1 & (1 << 0x4)) ? "YES" : "NO");
-
-`PCH.H <https://github.com/coreboot/coreboot/blob/master/src/southbridge/intel/*/pch.h>`_
-
-.. code-block::
-
-    #define PCH_ME_DEV                PCI_DEV(0, 0x16, 0)
-
-`ME.H <https://github.com/coreboot/coreboot/blob/master/src/southbridge/intel/*/me.h>`_
-
-.. code-block::
-
-    struct me_hfs {
-            u32 working_state: 4;
-            u32 mfg_mode: 1;
-            u32 fpt_bad: 1;
-            u32 operation_state: 3;
-            u32 fw_init_complete: 1;
-            u32 ft_bup_ld_flr: 1;
-            u32 update_in_progress: 1;
-            u32 error_code: 4;
-            u32 operation_mode: 4;
-            u32 reserved: 4;
-            u32 boot_options_present: 1;
-            u32 ack_data: 3;
-            u32 bios_msg_ack: 4;
-    } __packed;
-
-`ME_STATUS.C <https://github.com/coreboot/coreboot/blob/master/src/southbridge/intel/*/me_status.c>`_
-
-.. code-block::
-
-     printk(BIOS_DEBUG, "ME: Manufacturing Mode      : %s", hfs->mfg_mode ? "YES" : "NO");
-
-This module checks the following:
-
-    ``HFS.MFG_MODE BDF: 0:22:0 offset 0x40 - Bit [4]``
-
-Usage:
-    ``chipsec_main -m common.me_mfg_mode``
-
-Examples:
-    >>> chipsec_main.py -m common.me_mfg_mode
-
-The module returns the following results:
-
-    FAILED : HFS.MFG_MODE is set
-
-    PASSED : HFS.MFG_MODE is not set.
-
-Hardware registers used:
-    - HFS.MFG_MODE
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult
-from typing import List
-
-
-
[docs]class me_mfg_mode(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x98e5e8c, 'https://chipsec.github.io/modules/chipsec.modules.common.me_mfg_mode.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_device_enabled("MEI1"):
-            return True
-        else:
-            self.logger.log_important('MEI1 not enabled.  Skipping module.')
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False

-
-
[docs]    def check_me_mfg_mode(self) -> int:
-        me_mfg_mode_res = ModuleResult.FAILED
-        me_hfs_reg = self.cs.read_register('HFS')
-        me_mfg_mode = self.cs.get_register_field('HFS', me_hfs_reg, 'MFG_MODE')
-
-        if 0 == me_mfg_mode:
-            me_mfg_mode_res = ModuleResult.PASSED
-            self.logger.log_passed("ME is not in Manufacturing Mode")
-        else:
-            self.logger.log_failed("ME is in Manufacturing Mode")
-            self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-
-        return self.rc_res.getReturnCode(me_mfg_mode_res)

-
-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("ME Manufacturing Mode")
-        self.res = self.check_me_mfg_mode()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/memconfig.html b/_modules/chipsec/modules/common/memconfig.html deleted file mode 100644 index d9831bf0..00000000 --- a/_modules/chipsec/modules/common/memconfig.html +++ /dev/null @@ -1,253 +0,0 @@ - - - - - - - - chipsec.modules.common.memconfig — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.memconfig

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-This module verifies memory map secure configuration,
-that memory map registers are correctly configured and locked down.
-
-Usage:
-  ``chipsec_main -m common.memconfig``
-
-Example:
-    >>> chipsec_main.py -m common.memconfig
-
-.. note::
-    - This module will only run on Core (client) platforms.
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_HWCONFIG
-from typing import List
-
-_MODULE_NAME = 'memconfig'
-
-TAGS = [MTAG_HWCONFIG]
-
-
-
[docs]class memconfig(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x9feb705, 'https://chipsec.github.io/modules/chipsec.modules.common.memconfig.html')
-        self.memmap_registers = {
-            "PCI0.0.0_GGC": 'GGCLOCK',
-            "PCI0.0.0_PAVPC": 'PAVPLCK',
-            "PCI0.0.0_DPR": 'LOCK',
-            "PCI0.0.0_MESEG_MASK": 'MELCK',
-            "PCI0.0.0_REMAPBASE": 'LOCK',
-            "PCI0.0.0_REMAPLIMIT": 'LOCK',
-            "PCI0.0.0_TOM": 'LOCK',
-            "PCI0.0.0_TOUUD": 'LOCK',
-            "PCI0.0.0_BDSM": 'LOCK',
-            "PCI0.0.0_BGSM": 'LOCK',
-            "PCI0.0.0_TSEGMB": 'LOCK',
-            "PCI0.0.0_TOLUD": 'LOCK'
-        }
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_intel():
-            if self.cs.is_core():
-                return True
-            self.logger.log_important("Not a 'Core' (Desktop) platform.  Skipping test.")
-        else:
-            self.logger.log_important("Not an Intel platform.  Skipping test.")
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_memmap_locks(self) -> int:
-
-        # Determine if IA_UNTRUSTED can be used to lock the system.
-        ia_untrusted = None
-        if self.cs.register_has_field('MSR_BIOS_DONE', 'IA_UNTRUSTED'):
-            ia_untrusted = self.cs.read_register_field('MSR_BIOS_DONE', 'IA_UNTRUSTED')
-
-        regs = sorted(self.memmap_registers.keys())
-        all_locked = True
-
-        self.logger.log('[*]')
-        if ia_untrusted is not None:
-            self.logger.log('[*] Checking legacy register lock state:')
-        else:
-            self.logger.log('[*] Checking register lock state:')
-        for reg in regs:
-            reg_field = self.memmap_registers[reg]
-            if not self.cs.register_has_field(reg, reg_field):
-                self.logger.log_important(f'Skipping Validation: Register {reg} or field {reg_field} was not defined for this platform.')
-                continue
-            reg_def = self.cs.get_register_def(reg)
-            reg_value = self.cs.read_register(reg)
-            reg_desc = reg_def['desc']
-            locked = self.cs.get_register_field(reg, reg_value, reg_field)
-            if locked == 1:
-                self.logger.log_good(f"{reg:20} = 0x{reg_value:016X} - LOCKED   - {reg_desc}")
-            else:
-                all_locked = False
-                self.logger.log_bad(f"{reg:20} = 0x{reg_value:016X} - UNLOCKED - {reg_desc}")
-
-        if ia_untrusted is not None:
-            self.logger.log('[*]')
-            self.logger.log('[*] Checking if IA Untrusted mode is used to lock registers')
-            if ia_untrusted == 1:
-                self.logger.log_good('IA Untrusted mode set')
-                all_locked = True
-            else:
-                self.logger.log_bad('IA Untrusted mode not set')
-
-        self.logger.log('[*]')
-        if all_locked:
-            res = ModuleResult.PASSED
-            self.logger.log_passed("All memory map registers seem to be locked down")
-        else:
-            res = ModuleResult.FAILED
-            self.logger.log_failed("Not all memory map registers are locked down")
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-
-        return res

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("Host Bridge Memory Map Locks")
-        self.res = self.check_memmap_locks()
-        return self.rc_res.getReturnCode(self.res)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/memlock.html b/_modules/chipsec/modules/common/memlock.html deleted file mode 100644 index dc074d9a..00000000 --- a/_modules/chipsec/modules/common/memlock.html +++ /dev/null @@ -1,234 +0,0 @@ - - - - - - - - chipsec.modules.common.memlock — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.memlock

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018, Eclypsium, Inc.
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-
-"""
-This module checks if memory configuration is locked to protect SMM
-
-Reference:
-    - https://github.com/coreboot/coreboot/blob/master/src/cpu/intel/model_206ax/finalize.c
-    - https://github.com/coreboot/coreboot/blob/master/src/soc/intel/broadwell/include/soc/msr.h
-
-This module checks the following:
-- MSR_LT_LOCK_MEMORY MSR (0x2E7) - Bit [0]
-
-The module returns the following results:
-    - **FAILED** : MSR_LT_LOCK_MEMORY[0] is not set
-    - **PASSED** : MSR_LT_LOCK_MEMORY[0] is set
-    - **ERROR**  : Problem reading MSR_LT_LOCK_MEMORY values
-
-Usage:
-  ``chipsec_main -m common.memlock``
-
-Example:
-    >>> chipsec_main.py -m common.memlock
-
-Registers used:
-    - MSR_LT_LOCK_MEMORY
-
-.. note::
-    - This module will not run on Atom based platforms.
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult
-from chipsec.exceptions import HWAccessViolationError
-from typing import List
-
-_MODULE_NAME = 'memlock'
-
-
-
[docs]class memlock(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x4e16e90, 'https://chipsec.github.io/modules/chipsec.modules.common.memlock.html')
-        self.is_read_error = False
-
-
[docs]    def is_supported(self) -> bool:
-        # Workaround for Atom based processors.  Accessing this MSR on these systems
-        # causes a GP fault and can't be caught in UEFI Shell.
-        if not self.cs.is_atom():
-            if self.cs.register_has_field('MSR_LT_LOCK_MEMORY', 'LT_LOCK'):
-                return True
-            else:
-                self.logger.log_important("'MSR_LT_LOCK_MEMORY.LT_LOCK' not defined for platform.  Skipping module.")
-        else:
-            self.logger.log_important('Found an Atom based platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_MSR_LT_LOCK_MEMORY(self) -> bool:
-        self.logger.log('[*] Checking MSR_LT_LOCK_MEMORY status')
-        status = False
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            lt_lock_msr = 0
-            try:
-                lt_lock_msr = self.cs.read_register('MSR_LT_LOCK_MEMORY', tid)
-            except HWAccessViolationError:
-                self.logger.log_important('Could not read MSR_LT_LOCK_MEMORY')
-                self.is_read_error = True
-                break
-            if self.logger.VERBOSE:
-                self.cs.print_register('MSR_LT_LOCK_MEMORY', lt_lock_msr)
-            lt_lock = self.cs.get_register_field('MSR_LT_LOCK_MEMORY', lt_lock_msr, 'LT_LOCK')
-            self.logger.log(f"[*]   cpu{tid:d}: MSR_LT_LOCK_MEMORY[LT_LOCK] = {lt_lock:x}")
-            if 0 == lt_lock:
-                status = True
-        return status

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("Check MSR_LT_LOCK_MEMORY")
-        check_MSR_LT_LOCK_MEMORY_test_fail = self.check_MSR_LT_LOCK_MEMORY()
-
-        if self.is_read_error:
-            self.logger.log_error('There was a problem reading MSR_LT_LOCK_MEMORY.')
-            self.logger.log_important('Possible the environment or a platform feature is preventing these reads.')
-            self.res = ModuleResult.ERROR
-            self.rc_res.setStatusBit(self.rc_res.status.ACCESS_RW)
-        elif check_MSR_LT_LOCK_MEMORY_test_fail == True:
-            self.logger.log_failed("MSR_LT_LOCK_MEMORY.LT_LOCK bit is not configured correctly")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-        else:
-            self.logger.log_passed('MSR_LT_LOCK_MEMORY.LT_LOCK bit is set')
-            self.res = ModuleResult.PASSED
-
-        return self.rc_res.getReturnCode(self.res)

-
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/remap.html b/_modules/chipsec/modules/common/remap.html deleted file mode 100644 index 0f8f7584..00000000 --- a/_modules/chipsec/modules/common/remap.html +++ /dev/null @@ -1,335 +0,0 @@ - - - - - - - - chipsec.modules.common.remap — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.remap

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Check Memory Remapping Configuration
-
-Reference:
-    - `Preventing & Detecting Xen Hypervisor Subversions <http://www.invisiblethingslab.com/resources/bh08/part2-full.pdf>`_ by Joanna Rutkowska & Rafal Wojtczuk
-
-Usage:
-  ``chipsec_main -m common.remap``
-
-Example:
-    >>> chipsec_main.py -m common.remap
-
-Registers used:
-    - PCI0.0.0_REMAPBASE
-    - PCI0.0.0_REMAPLIMIT
-    - PCI0.0.0_TOUUD
-    - PCI0.0.0_TOLUD
-    - PCI0.0.0_TSEGMB
-
-.. note::
-    - This module will only run on Core platforms.
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_HWCONFIG, MTAG_SMM
-from chipsec.defines import BIT32, ALIGNED_1MB
-
-_MODULE_NAME = 'remap'
-
-TAGS = [MTAG_SMM, MTAG_HWCONFIG]
-
-
-_REMAP_ADDR_MASK = 0x7FFFF00000
-_TOLUD_MASK = 0xFFFFF000
-
-
-
[docs]class remap(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x43aa254, 'https://chipsec.github.io/modules/chipsec.modules.common.remap.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_core():
-            rbase_exist = self.cs.is_register_defined('PCI0.0.0_REMAPBASE')
-            rlimit_exist = self.cs.is_register_defined('PCI0.0.0_REMAPLIMIT')
-            touud_exist = self.cs.is_register_defined('PCI0.0.0_TOUUD')
-            tolud_exist = self.cs.is_register_defined('PCI0.0.0_TOLUD')
-            tseg_exist = self.cs.is_register_defined('PCI0.0.0_TSEGMB')
-            if rbase_exist and rlimit_exist and touud_exist and tolud_exist and tseg_exist:
-                return True
-            self.logger.log_important('Required register definitions not defined for platform.  Skipping module.')
-        else:
-            self.logger.log_important('Not a Core (client) platform.  Skipping module.')
-
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def is_ibecc_enabled(self) -> bool:
-        if self.cs.is_register_defined('IBECC_ACTIVATE'):
-            edsr = self.cs.read_register_field('IBECC_ACTIVATE', 'IBECC_EN')
-            if edsr == 1:
-                return True
-            else:
-                self.logger.log_verbose('IBECC is not enabled!')
-        else:
-            self.logger.log_verbose('IBECC is not defined!')
-        return False

-
-
[docs]    def check_remap_config(self) -> int:
-        is_warning = False
-
-        remapbase = self.cs.read_register('PCI0.0.0_REMAPBASE')
-        remaplimit = self.cs.read_register('PCI0.0.0_REMAPLIMIT')
-        touud = self.cs.read_register('PCI0.0.0_TOUUD')
-        tolud = self.cs.read_register('PCI0.0.0_TOLUD')
-        tsegmb = self.cs.read_register('PCI0.0.0_TSEGMB')
-        self.logger.log("[*] Registers:")
-        self.logger.log(f"[*]   TOUUD     : 0x{touud:016X}")
-        self.logger.log(f"[*]   REMAPLIMIT: 0x{remaplimit:016X}")
-        self.logger.log(f"[*]   REMAPBASE : 0x{remapbase:016X}")
-        self.logger.log(f"[*]   TOLUD     : 0x{tolud:08X}")
-        self.logger.log(f"[*]   TSEGMB    : 0x{tsegmb:08X}")
-        self.logger.log("")
-
-        ia_untrusted = 0
-        if self.cs.register_has_field('MSR_BIOS_DONE', 'IA_UNTRUSTED'):
-            ia_untrusted = self.cs.read_register_field('MSR_BIOS_DONE', 'IA_UNTRUSTED')
-        remapbase_lock = remapbase & 0x1
-        remaplimit_lock = remaplimit & 0x1
-        touud_lock = touud & 0x1
-        tolud_lock = tolud & 0x1
-        remapbase &= _REMAP_ADDR_MASK
-        remaplimit &= _REMAP_ADDR_MASK
-        touud &= _REMAP_ADDR_MASK
-        tolud &= _TOLUD_MASK
-        tsegmb &= _TOLUD_MASK
-        self.logger.log("[*] Memory Map:")
-        self.logger.log(f"[*]   Top Of Upper Memory: 0x{touud:016X}")
-        self.logger.log(f"[*]   Remap Limit Address: 0x{(remaplimit | 0xFFFFF):016X}")
-        self.logger.log(f"[*]   Remap Base Address : 0x{remapbase:016X}")
-        self.logger.log(f"[*]   4GB                : 0x{BIT32:016X}")
-        self.logger.log(f"[*]   Top Of Low Memory  : 0x{tolud:016X}")
-        self.logger.log(f"[*]   TSEG (SMRAM) Base  : 0x{tsegmb:016X}")
-        self.logger.log('')
-
-        remap_ok = True
-
-        self.logger.log("[*] Checking memory remap configuration..")
-
-        if remapbase == remaplimit:
-            self.logger.log("[!]   Memory Remap status is Unknown")
-            is_warning = True
-        elif remapbase > remaplimit:
-            self.logger.log("[*]   Memory Remap is disabled")
-        else:
-            self.logger.log("[*]   Memory Remap is enabled")
-            remaplimit_addr = (remaplimit | 0xFFFFF)
-            if self.is_ibecc_enabled():
-                ok = (remaplimit_addr > touud) and (remapbase < touud)
-            else:
-                ok = ((remaplimit_addr + 1) == touud)
-            remap_ok = remap_ok and ok
-            if ok:
-                self.logger.log_good("  Remap window configuration is correct: REMAPBASE <= REMAPLIMIT < TOUUD")
-            else:
-                self.logger.log_bad("  Remap window configuration is not correct")
-
-        ok = (0 == tolud & ALIGNED_1MB) and \
-             (0 == touud & ALIGNED_1MB) and \
-             (0 == remapbase & ALIGNED_1MB) and \
-             (0 == remaplimit & ALIGNED_1MB)
-        remap_ok = remap_ok and ok
-        if ok:
-            self.logger.log_good("  All addresses are 1MB aligned")
-        else:
-            self.logger.log_bad("  Not all addresses are 1MB aligned")
-
-        self.logger.log("[*] Checking if memory remap configuration is locked..")
-        ok = (0 != touud_lock) or (0 != ia_untrusted)
-        remap_ok = remap_ok and ok
-        if ok:
-            self.logger.log_good("  TOUUD is locked")
-        else:
-            self.logger.log_bad("  TOUUD is not locked")
-
-        ok = (0 != tolud_lock) or (0 != ia_untrusted)
-        remap_ok = remap_ok and ok
-        if ok:
-            self.logger.log_good("  TOLUD is locked")
-        else:
-            self.logger.log_bad("  TOLUD is not locked")
-
-        ok = ((0 != remapbase_lock) and (0 != remaplimit_lock)) or (0 != ia_untrusted)
-        remap_ok = remap_ok and ok
-        if ok:
-            self.logger.log_good("  REMAPBASE and REMAPLIMIT are locked")
-        else:
-            self.logger.log_bad("  REMAPBASE and REMAPLIMIT are not locked")
-
-        if remap_ok:
-            if is_warning:
-                self.logger.log_warning("Most Memory Remap registers are configured correctly and locked")
-                self.logger.log("[!] Manual verification of REMAP BASE and LIMIT register values may be needed.")
-                res = ModuleResult.WARNING
-                self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-            else:
-                res = ModuleResult.PASSED
-                self.rc_res.setStatusBit(self.rc_res.status.SUCCESS)
-                self.logger.log_passed("Memory Remap is configured correctly and locked")
-        else:
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            self.logger.log_failed("Memory Remap is not properly configured/locked. Remaping attack may be possible")
-
-        return self.rc_res.getReturnCode(res)

-
-
-    # --------------------------------------------------------------------------
-    # run( module_argv )
-    # Required function: run here all tests from this module
-    # --------------------------------------------------------------------------
-
[docs]    def run(self, _) -> int:
-        self.logger.start_test("Memory Remapping Configuration")
-
-        self.res = self.check_remap_config()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/secureboot/variables.html b/_modules/chipsec/modules/common/secureboot/variables.html deleted file mode 100644 index 9b906b5b..00000000 --- a/_modules/chipsec/modules/common/secureboot/variables.html +++ /dev/null @@ -1,329 +0,0 @@ - - - - - - - - chipsec.modules.common.secureboot.variables — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.secureboot.variables

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Verify that all Secure Boot key UEFI variables are authenticated (BS+RT+AT)
-and protected from unauthorized modification.
-
-Reference:
-    - `UEFI 2.4 spec Section 28 <http://uefi.org/>`_
-
-Usage:
-    ``chipsec_main -m common.secureboot.variables [-a modify]``
-    - ``-a`` : modify = will try to write/corrupt the variables
-
-Where:
-    - ``[]``: optional line
-
-Examples:
-    >>> chipsec_main.py -m common.secureboot.variables
-    >>> chipsec_main.py -m common.secureboot.variables -a modify
-
-.. note::
-    - Module is not supported in all environments.
-
-"""
-
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_SECUREBOOT, OPT_MODIFY
-from chipsec.hal.uefi import UEFI, SECURE_BOOT_VARIABLES, IS_VARIABLE_ATTRIBUTE, EFI_VAR_NAME_SecureBoot, SECURE_BOOT_KEY_VARIABLES
-from chipsec.hal.uefi import EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS
-from chipsec.hal.uefi import SECURE_BOOT_OPTIONAL_VARIABLES
-from chipsec.hal.uefi_common import StatusCode
-from typing import AnyStr, List, Optional
-
-# ############################################################
-# SPECIFY PLATFORMS THIS MODULE IS APPLICABLE TO
-# ############################################################
-_MODULE_NAME = 'variables'
-
-
-TAGS = [MTAG_SECUREBOOT]
-
-
-
[docs]class variables(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self._uefi = UEFI(self.cs)
-        self.rc_res = ModuleResult(0x7af0b3e, 'https://chipsec.github.io/modules/chipsec.modules.common.secureboot.variables.html')
-
-
[docs]    def is_supported(self) -> bool:
-        supported = self.cs.helper.EFI_supported()
-        if not supported:
-            self.logger.log_important('OS does not support UEFI Runtime API.  Skipping module.')
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return supported

-
-
[docs]    def can_modify(self, name: str, guid: Optional[AnyStr], data: Optional[bytes]) -> bool:
-        if not guid or not data:
-            self.logger.log(f'    > Missing GUID or Data. Unable to modify variable {guid}:{name} data:{data}')
-            return False
-        else:
-            self.logger.log(f'    > Attempting to modify variable {guid}:{name}')
-
-        baddata = (data[0] ^ 0xFF).to_bytes(1, 'little') + data[1:]
-        status = self._uefi.set_EFI_variable(name, guid, baddata)
-        if StatusCode.EFI_SUCCESS != status:
-            self.logger.log(f'    < Modification of {name} returned error 0x{status:X}')
-        else:
-            self.logger.log(f'    < Modification of {name} returned success')
-
-        self.logger.log(f'    > Checking variable {name} contents after modification..')
-        newdata = self._uefi.get_EFI_variable(name, guid)
-
-        _changed = data != newdata
-        if _changed:
-            self.logger.log_bad(f'EFI variable {name} has been modified. Restoring original contents..')
-            self._uefi.set_EFI_variable(name, guid, data)
-
-            # checking if restored correctly
-            restoreddata = self._uefi.get_EFI_variable(name, guid)
-            if (restoreddata != data):
-                self.logger.log_important(f'Failed to restore contents of variable {name} failed!')
-            else:
-                self.logger.log(f'    Contents of variable {name} have been restored')
-        else:
-            self.logger.log_good(f'Could not modify UEFI variable {guid}:{name}')
-        return _changed

-
-    # check_secureboot_variable_attributes
-    # checks authentication attributes of Secure Boot EFI variables
-
[docs]    def check_secureboot_variable_attributes(self, do_modify: bool) -> int:
-        not_found = 0
-        not_auth = 0
-        not_wp = 0
-        is_secureboot_enabled = False
-
-        sbvars = self._uefi.list_EFI_variables()
-        if sbvars is None:
-            self.logger.log_warning('Could not enumerate UEFI variables.')
-            self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-            return self.rc_res.getReturnCode(ModuleResult.WARNING)
-
-        for name in SECURE_BOOT_VARIABLES:
-
-            if (name in sbvars.keys()) and (sbvars[name] is not None):
-                if len(sbvars[name]) > 1:
-                    self.logger.log_failed(f'There should only be one instance of variable {name}')
-                    self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-                    return self.rc_res.getReturnCode(ModuleResult.FAILED)
-                for (_, _, _, data, guid, attrs) in sbvars[name]:
-                    self.logger.log(f'[*] Checking protections of UEFI variable {guid}:{name}')
-
-                    # check the status of Secure Boot
-                    if EFI_VAR_NAME_SecureBoot == name:
-                        is_secureboot_enabled = (data is not None) and (len(data) == 1) and (ord(data) == 0x1)
-
-                    #
-                    # Verify if the Secure Boot key/database variable is authenticated
-                    #
-                    if name in SECURE_BOOT_KEY_VARIABLES:
-                        if IS_VARIABLE_ATTRIBUTE(attrs, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS):
-                            self.logger.log_good(f'Variable {guid}:{name} is authenticated (AUTHENTICATED_WRITE_ACCESS)')
-                        elif IS_VARIABLE_ATTRIBUTE(attrs, EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS):
-                            self.logger.log_good(f'Variable {guid}:{name} is authenticated (TIME_BASED_AUTHENTICATED_WRITE_ACCESS)')
-                        else:
-                            not_auth += 1
-                            self.logger.log_bad(f'Variable {guid}:{name} is not authenticated')
-
-                    #
-                    # Attempt to modify contents of the variables
-                    #
-                    if do_modify:
-                        if self.can_modify(name, guid, data):
-                            not_wp += 1
-            elif name in SECURE_BOOT_OPTIONAL_VARIABLES:
-                self.logger.log_important(f'Secure Boot variable {name} is not found but is optional')
-                continue
-            else:
-                not_found += 1
-                self.logger.log_important(f'Secure Boot variable {name} is not found')
-                continue
-
-        self.logger.log('')
-        prefix = 'en' if is_secureboot_enabled else 'dis'
-        self.logger.log(f'[*] Secure Boot appears to be {prefix}abled')
-
-        if len(SECURE_BOOT_VARIABLES) == not_found:
-            # None of Secure Boot variables were not found
-            self.logger.log_warning('None of required Secure Boot variables found.')
-            self.logger.log_important('If Secure Boot is enabled, this could be a problem.')
-            self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-            return self.rc_res.getReturnCode(ModuleResult.WARNING)
-        else:
-            # Some Secure Boot variables exist
-            sb_vars_failed = (not_found > 0) or (not_auth > 0) or (not_wp > 0)
-            if sb_vars_failed:
-                if not_found > 0:
-                    self.logger.log_bad('Some required Secure Boot variables are missing')
-                if not_auth > 0:
-                    self.logger.log_bad('Some Secure Boot keying variables are not authenticated')
-                if not_wp > 0:
-                    self.logger.log_bad('Some Secure Boot variables can be modified')
-
-                if is_secureboot_enabled:
-                    self.logger.log_failed('Not all Secure Boot UEFI variables are protected')
-                    self.rc_res.setStatusBit(self.rc_res.status.PROTECTION)
-                    return self.rc_res.getReturnCode(ModuleResult.FAILED)
-                else:
-                    self.logger.log_warning('Not all Secure Boot UEFI variables are protected')
-                    self.rc_res.setStatusBit(self.rc_res.status.FEATURE_DISABLED)
-                    return self.rc_res.getReturnCode(ModuleResult.WARNING)
-
-            else:
-                self.logger.log_passed('All Secure Boot UEFI variables are protected')
-                self.rc_res.setStatusBit(self.rc_res.status.SUCCESS)
-                return self.rc_res.getReturnCode(ModuleResult.PASSED)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test('Attributes of Secure Boot EFI Variables')
-
-        do_modify = (len(module_argv) > 0) and (module_argv[0] == OPT_MODIFY)
-
-        self.res = self.check_secureboot_variable_attributes(do_modify)
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/sgx_check.html b/_modules/chipsec/modules/common/sgx_check.html deleted file mode 100644 index 0e5d61b3..00000000 --- a/_modules/chipsec/modules/common/sgx_check.html +++ /dev/null @@ -1,557 +0,0 @@ - - - - - - - - chipsec.modules.common.sgx_check — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.sgx_check

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2022, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-# Authors:
-#  Sushmith Hiremath, INTEL DCG RED team
-#
-
-"""
-Check SGX related configuration
-
-Reference:
-    - SGX BWG, CDI/IBP#: 565432
-
-Usage:
-    ``chipsec_main -m common.sgx_check``
-
-Examples:
-    >>> chipsec_main.py -m common.sgx_check
-
-Registers used:
-    - IA32_FEATURE_CONTROL.SGX_GLOBAL_EN
-    - IA32_FEATURE_CONTROL.LOCK
-    - IA32_DEBUG_INTERFACE.ENABLE
-    - IA32_DEBUG_INTERFACE.LOCK
-    - MTRRCAP.PRMRR
-    - PRMRR_VALID_CONFIG
-    - PRMRR_PHYBASE.PRMRR_base_address_fields
-    - PRMRR_PHYBASE.PRMRR_MEMTYPE
-    - PRMRR_MASK.PRMRR_mask_bits
-    - PRMRR_MASK.PRMRR_VLD
-    - PRMRR_MASK.PRMRR_LOCK
-    - PRMRR_UNCORE_PHYBASE.PRMRR_base_address_fields
-    - PRMRR_UNCORE_MASK.PRMRR_mask_bits
-    - PRMRR_UNCORE_MASK.PRMRR_VLD
-    - PRMRR_UNCORE_MASK.PRMRR_LOCK
-    - BIOS_SE_SVN.PFAT_SE_SVN
-    - BIOS_SE_SVN.ANC_SE_SVN
-    - BIOS_SE_SVN.SCLEAN_SE_SVN
-    - BIOS_SE_SVN.SINIT_SE_SVN
-    - BIOS_SE_SVN_STATUS.LOCK
-    - SGX_DEBUG_MODE.SGX_DEBUG_MODE_STATUS_BIT
-
-.. note::
-    - Will not run within the EFI Shell
-
-"""
-
-_MODULE_NAME = 'sgx_check'
-from chipsec.exceptions import HWAccessViolationError
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_HWCONFIG
-from chipsec.defines import BIT0, BIT1, BIT2, BIT5, BIT6, BIT7, BIT8
-TAGS = [MTAG_HWCONFIG]
-
-
-
[docs]class sgx_check(BaseModule):
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0xb64a5d0, 'https://chipsec.github.io/modules/chipsec.modules.common.sgx_check.html')
-        self.helper = self.cs.helper
-        self.res = ModuleResult.PASSED
-
-
[docs]    def is_supported(self) -> bool:
-        sgx_cpu_support = False
-        if self.cs.os_helper.is_efi():
-            self.logger.log_important('Currently this module cannot run within the EFI Shell. Exiting.')
-        elif not self.cs.register_has_field('IA32_FEATURE_CONTROL', 'SGX_GLOBAL_EN'):
-            self.logger.log_important('IA32_FEATURE_CONTROL.SGX_GLOBAL_EN not defined for platform.  Skipping module.')
-        else:
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                status = self.helper.set_affinity(tid)
-                if status == -1:
-                    self.logger.log_verbose(f"[*] Failed to set affinity to CPU{tid:d}")
-                (_, r_ebx, _, _) = self.cs.cpu.cpuid(0x07, 0x00)
-                if r_ebx & BIT2:
-                    self.logger.log_verbose(f"[*] CPU{tid:d}: does support SGX")
-                    sgx_cpu_support = True
-                else:
-                    self.logger.log_verbose(f"[*]CPU{tid:d}: does not support SGX")
-                    self.logger.log_important('SGX not supported.  Skipping module.')
-        if not sgx_cpu_support:
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return sgx_cpu_support

-
-
[docs]    def check_sgx_config(self) -> int:
-        self.logger.log("[*] Test if CPU has support for SGX")
-        sgx_ok = False
-
-        self.logger.log("\n[*] SGX BIOS enablement check")
-        self.logger.log("[*] Verifying IA32_FEATURE_CONTROL MSR is configured")
-        bios_feature_control_enable = True
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            if not (self.cs.read_register_field('IA32_FEATURE_CONTROL', 'SGX_GLOBAL_EN', False, tid) == 1):
-                bios_feature_control_enable = False
-        if bios_feature_control_enable:
-            self.logger.log_good("Intel SGX is Enabled in BIOS")
-        else:
-            self.logger.log_important("Intel SGX is not enabled in BIOS")
-            self.res = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.FEATURE_DISABLED)
-
-        self.logger.log("\n[*] Verifying IA32_FEATURE_CONTROL MSR is locked")
-        locked = True
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            feature_cntl_lock = self.cs.get_control('Ia32FeatureControlLock', tid)
-            self.logger.log_verbose(f"[*] cpu{tid:d}: IA32_Feature_Control Lock = {feature_cntl_lock:d}")
-            if 0 == feature_cntl_lock:
-                locked = False
-        if locked:
-            self.logger.log_good("IA32_Feature_Control locked")
-        else:
-            self.logger.log_bad("IA32_Feature_Control is unlocked")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-
-        # Verify that Protected Memory Range (PRM) is supported, MSR IA32_MTRRCAP (FEh) [12]=1
-        # Check on every CPU and make sure that they are all the same values
-        self.logger.log("\n[*] Verifying if Protected Memory Range (PRMRR) is configured")
-        prmrr_enable = False
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            mtrrcap = self.cs.read_register_field('MTRRCAP', 'PRMRR', False, tid)
-            if mtrrcap == 0:
-                self.logger.log_verbose(f"[*] CPU{tid:d} Protected Memory Range configuration is not supported")
-            else:
-                prmrr_enable = True
-                self.logger.log_verbose(f"[*] CPU{tid:d} Protected Memory Range configuration is supported")
-        if prmrr_enable:
-            self.logger.log_good("Protected Memory Range configuration is supported")
-        else:
-            self.logger.log_bad("Protected Memory Range configuration is not supported")
-            self.res - ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.UNSUPPORTED_FEATURE)
-
-        # Check PRMRR configurations on each core.
-        self.logger.log("\n[*] Verifying PRMRR Configuration on each core.")
-        
-        self.prmrr = self.PRMRR(self.logger, self.cs)
-        try:
-            self.prmrr._check_prmrr()
-        except HWAccessViolationError:
-            self.prmrr.reset_variables()
-            self.logger.log_important("Some PRMRR registers could not be read. Following results may not be accurate.")
-            if self.cs.os_helper.is_windows():
-                self.logger.log_important("Please try running in a Linux environment. The results there may be more complete.")
-        else:
-            self.check_prmrr_values()
-        
-        
-
-        if bios_feature_control_enable and locked:
-            sgx1_instr_support = False
-            sgx2_instr_support = False
-            self.logger.log("\n[*] Verifying if SGX instructions are supported")
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                status = self.helper.set_affinity(tid)
-                if status == -1:
-                    self.logger.log_verbose(f"[*] Failed to set affinity to CPU{tid:d}")
-                (r_eax, _, _, _) = self.cs.cpu.cpuid(0x012, 0x00)
-                if r_eax & BIT0:
-                    self.logger.log_verbose(f"[*] CPU{tid:d} SGX-1 instructions are supported")
-                    sgx1_instr_support = True
-                else:
-                    self.logger.log_verbose(f"[*] CPU{tid:d} SGX-1 instructions are not supported")
-                if r_eax & BIT1:
-                    self.logger.log_verbose(f"[*] CPU{tid:d} SGX-2 instructions are supported")
-                    sgx2_instr_support = True
-                else:
-                    self.logger.log_verbose(f"[*] CPU{tid:d} SGX-2 instructions are not supported")
-            if sgx1_instr_support:
-                self.logger.log_good("Intel SGX instructions are supported and available to use")
-                sgx_ok = True
-            else:
-                self.logger.log_bad("Intel SGX instructions are not supported on system")
-                sgx_ok = False
-            if sgx2_instr_support:
-                self.logger.log("[*] SGX-2 instructions are supported")
-            else:
-                self.logger.log("[*] SGX-2 instructions are not supported")
-        else:
-            sgx_ok = False
-
-        self.logger.log("\n[*] Verifying if SGX is available to use")
-        if sgx_ok and prmrr_enable and self.prmrr.uniform:
-            self.logger.log_good("Intel SGX is available to use")
-        elif (not sgx_ok) and (not bios_feature_control_enable) and prmrr_enable and self.prmrr.uniform:
-            self.logger.log_important("Intel SGX instructions disabled by firmware")
-            self.rc_res.setStatusBit(self.rc_res.status.FEATURE_DISABLED)
-            if self.res == ModuleResult.PASSED:
-                self.res = ModuleResult.WARNING
-        else:
-            self.logger.log_bad("Intel SGX is not available to use")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.FEATURE_DISABLED)
-
-        if self.cs.is_register_defined('BIOS_SE_SVN') and self.cs.is_register_defined('BIOS_SE_SVN_STATUS'):
-            self.cs.print_register('BIOS_SE_SVN', self.cs.read_register('BIOS_SE_SVN'))
-            self.cs.print_register('BIOS_SE_SVN_STATUS', self.cs.read_register('BIOS_SE_SVN_STATUS'))
-
-        self.logger.log("\n[*] Check SGX debug feature settings")
-        sgx_debug_status = self.cs.read_register_field('SGX_DEBUG_MODE', 'SGX_DEBUG_MODE_STATUS_BIT')
-        self.logger.log(f"[*] SGX Debug Enable             : {sgx_debug_status:d}")
-        self.logger.log("[*] Check Silicon debug feature settings")
-        debug_interface = self.cs.read_register('IA32_DEBUG_INTERFACE')
-        self.logger.log(f"[*]   IA32_DEBUG_INTERFACE : 0x{debug_interface:08X}")
-        debug_enable = self.cs.get_register_field('IA32_DEBUG_INTERFACE', debug_interface, 'ENABLE')
-        debug_lock = self.cs.get_register_field('IA32_DEBUG_INTERFACE', debug_interface, 'LOCK')
-        self.logger.log(f"[*]     Debug enabled      : {debug_enable:d}")
-        self.logger.log(f"[*]     Lock               : {debug_lock:d}")
-
-        if sgx_debug_status == 1:
-            self.logger.log_bad("SGX debug mode is enabled")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.DEBUG_FEATURE)
-        else:
-            self.logger.log_good("SGX debug mode is disabled")
-        if debug_enable == 0:
-            self.logger.log_good("Silicon debug features are disabled")
-        else:
-            self.logger.log_bad("Silicon debug features are not disabled")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.DEBUG_FEATURE)
-        if (0 == debug_enable) and (1 == sgx_debug_status):
-            self.logger.log_bad("Enabling sgx_debug without enabling debug mode in msr IA32_DEBUG_INTERFACE is not a valid configuration")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-        if debug_lock == 1:
-            self.logger.log_good("Silicon debug Feature Control register is locked")
-        else:
-            self.logger.log_bad("Silicon debug Feature Control register is not locked")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-
-        return self.res

-    
-    
-
[docs]    def check_prmrr_values(self) -> None:
-        if not self.prmrr:
-            return
-        if not self.prmrr.uniform:
-            self.logger.log_bad("PRMRR config is not uniform across all CPUs")
-            self.res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-        else:
-            self.logger.log_good("PRMRR config is uniform across all CPUs")
-            prmrr_configs = []
-            config_support = False
-            if BIT0 & self.prmrr.valid_config:
-                prmrr_configs.append("1M")
-                config_support = True
-            if BIT1 & self.prmrr.valid_config:
-                prmrr_configs.append("2M")
-                config_support = True
-            if BIT5 & self.prmrr.valid_config:
-                prmrr_configs.append("32M")
-                config_support = True
-            if BIT6 & self.prmrr.valid_config:
-                prmrr_configs.append("64M")
-                config_support = True
-            if BIT7 & self.prmrr.valid_config:
-                prmrr_configs.append("128M")
-                config_support = True
-            if BIT8 & self.prmrr.valid_config:
-                prmrr_configs.append("256M")
-                config_support = True
-            if config_support:
-                self.logger.log(f"[*]  PRMRR config supports: {', '.join(prmrr_configs)}")
-            else:
-                self.logger.log("[*] PRMMR config has improper value")
-
-            # In some cases the PRMRR base and mask may be zero
-            if (self.prmrr.base == 0) and (self.prmrr.mask == 0):
-                self.logger.log("[*] PRMRR Base and Mask are set to zero.  PRMRR appears to be disabled.")
-                self.logger.log("[*]   Skipping Base/Mask settings.")
-            else:
-                self.logger.log(f"[*]  PRMRR base address: 0x{self.prmrr.base:012X}")
-                self.logger.log("[*]  Verifying PRMR memory type is valid")
-                self.logger.log(f"[*]  PRMRR memory type : 0x{self.prmrr.base_memtype:X}")
-                if self.prmrr.base_memtype == 0x6:
-                    self.logger.log_good("PRMRR memory type is WB as expected")
-                else:
-                    self.logger.log_bad("Unexpected PRMRR memory type (not WB)")
-                    self.res = ModuleResult.FAILED
-                    self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-                self.logger.log(f"[*]  PRMRR mask address: 0x{self.prmrr.mask:012X}")
-                self.logger.log("[*]  Verifying PRMR address are valid")
-                self.logger.log(f"[*]      PRMRR uncore mask valid: 0x{self.prmrr.uncore_mask_vld:d}")
-                if self.prmrr.mask_vld == 0x1:
-                    self.logger.log_good("Mcheck marked PRMRR address as valid")
-                else:
-                    self.logger.log_bad("Mcheck marked PRMRR address as invalid")
-                    self.res = ModuleResult.FAILED
-                    self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-                self.logger.log("[*]  Verifying if PRMR mask register is locked")
-                self.logger.log(f"[*]      PRMRR mask lock: 0x{self.prmrr.mask_lock:X}")
-                if self.prmrr.locked:
-                    self.logger.log_good("PRMRR MASK register is locked")
-                else:
-                    self.logger.log_bad("PRMRR MASK register is not locked")
-                    self.res = ModuleResult.FAILED
-                    self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-                if self.prmrr.check_uncore_vals:
-                    self.logger.log(f"[*]  PRMRR uncore base address: 0x{self.prmrr.uncore_base:012X}")
-                    self.logger.log(f"[*]  PRMRR uncore mask address: 0x{self.prmrr.uncore_mask:012X}")
-                    self.logger.log("[*]  Verifying PRMR uncore address are valid")
-                    self.logger.log(f"[*]      PRMRR uncore mask valid: 0x{self.prmrr.uncore_mask_vld:X}")
-                    if self.prmrr.uncore_mask_vld == 0x1:
-                        self.logger.log_good("Mcheck marked uncore PRMRR address as valid")
-                    else:
-                        self.logger.log_bad("Mcheck marked uncore PRMRR address as invalid")
-                        self.res = ModuleResult.FAILED
-                        self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-                    self.logger.log("[*]  Verifying if PRMR uncore mask register is locked")
-                    self.logger.log(f"[*]      PRMRR uncore mask lock: 0x{self.prmrr.uncore_mask_lock:X}")
-                    if self.prmrr.uncore_mask_lock == 0x1:
-                        self.logger.log_good("PMRR uncore MASK register is locked")
-                    else:
-                        self.logger.log_bad("PMRR uncore MASK register is not locked")
-                        self.res = ModuleResult.FAILED
-                        self.rc_res.setStatusBit(self.rc_res.status.LOCKS)

-    
-    
-
[docs]    class PRMRR():
-        def __init__(self, logger, cs) -> None:
-            self.logger = logger
-            self.cs = cs
-            self.reset_variables()
-
-
[docs]        def reset_variables(self) -> None:
-            self.valid_config = 0
-            self.base = 0
-            self.base_memtype = 0
-            self.uncore_base = 0
-            self.uncore_base_new = 0
-            self.mask = 0
-            self.uncore_mask = 0
-            self.uncore_mask_new = 0
-            self.mask_vld = 0
-            self.uncore_mask_vld = 0
-            self.uncore_mask_vld_new = 0
-            self.mask_lock = 0
-            self.uncore_mask_lock = 0
-            self.uncore_mask_lock_new = 0
-            self.uniform = False
-            self.locked = False
-            self.check_uncore_vals = False

-        
-        def _check_prmrr(self) -> None:
-            self.reset_variables()
-            first_iter = True
-            self.uniform = True
-            self.locked = True
-            self.check_uncore_vals = self.cs.is_register_defined('PRMRR_UNCORE_PHYBASE') and self.cs.is_register_defined('PRMRR_UNCORE_MASK')
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                self.valid_config_new = self.cs.read_register('PRMRR_VALID_CONFIG', tid)
-                self.base_new = self.cs.read_register_field('PRMRR_PHYBASE', 'PRMRR_base_address_fields', False, tid)
-                self.base_memtype_new = self.cs.read_register_field('PRMRR_PHYBASE', 'PRMRR_MEMTYPE', False, tid)
-                self.mask_new = self.cs.read_register_field('PRMRR_MASK', 'PRMRR_mask_bits', False, tid)
-                self.mask_vld_new = self.cs.read_register_field('PRMRR_MASK', 'PRMRR_VLD', False, tid)
-                self.mask_lock_new = self.cs.read_register_field('PRMRR_MASK', 'PRMRR_LOCK', False, tid)
-                if self.check_uncore_vals:
-                    self.uncore_base_new = self.cs.read_register_field('PRMRR_UNCORE_PHYBASE', 'PRMRR_base_address_fields', False, tid)
-                    self.uncore_mask_new = self.cs.read_register_field('PRMRR_UNCORE_MASK', 'PRMRR_mask_bits', False, tid)
-                    self.uncore_mask_vld_new = self.cs.read_register_field('PRMRR_UNCORE_MASK', 'PRMRR_VLD', False, tid)
-                    self.uncore_mask_lock_new = self.cs.read_register_field('PRMRR_UNCORE_MASK', 'PRMRR_LOCK', False, tid)
-                if self.logger.VERBOSE:
-                    self.logger.log(f"[*]      CPU{tid:d} PRMRR_VALID_CONFIG: 0x{self.valid_config_new:010X}")
-                    self.logger.log(f"[*]      CPU{tid:d} PRMRR base address: 0x{self.base_new:012X}")
-                    self.logger.log(f"[*]      CPU{tid:d} PRMRR memory type: 0x{self.base_memtype_new:d}")
-                    self.logger.log(f"[*]      CPU{tid:d} PRMRR mask address: 0x{self.mask_new:012X}")
-                    self.logger.log(f"[*]      CPU{tid:d} PRMRR mask valid: 0x{self.mask_vld_new:d}")
-                    self.logger.log(f"[*]      CPU{tid:d} PRMRR mask lock: 0x{self.mask_lock_new:d}")
-                    if self.check_uncore_vals:
-                        self.logger.log(f"[*]      CPU{tid:d} PRMRR uncore base address: 0x{self.uncore_base_new:012X}")
-                        self.logger.log(f"[*]      CPU{tid:d} PRMRR uncore mask address: 0x{self.uncore_mask_new:012X}")
-                        self.logger.log(f"[*]      CPU{tid:d} PRMRR uncore mask valid: 0x{self.uncore_mask_vld_new:d}")
-                        self.logger.log(f"[*]      CPU{tid:d} PRMRR uncore mask lock: 0x{self.uncore_mask_lock_new:d}")
-                if first_iter:
-                    self.valid_config = self.valid_config_new
-                    self.base = self.base_new
-                    self.base_memtype = self.base_memtype_new
-                    self.mask = self.mask_new
-                    self.mask_vld = self.mask_vld_new
-                    self.mask_lock = self.mask_lock_new
-                    self.uncore_base = self.uncore_base_new
-                    self.uncore_mask = self.uncore_mask_new
-                    self.uncore_mask_vld = self.uncore_mask_vld_new
-                    self.uncore_mask_lock = self.uncore_mask_lock_new
-                    first_iter = False
-                if self.mask_lock_new == 0:
-                    self.locked = False
-                if ((self.valid_config != self.valid_config_new) or
-                    (self.base != self.base_new) or (self.mask != self.mask_new) or
-                    (self.uncore_base != self.uncore_base_new) or
-                    (self.uncore_mask != self.uncore_mask_new) or
-                    (self.mask_vld != self.mask_vld_new) or
-                    (self.mask_lock != self.mask_lock_new) or
-                    (self.uncore_mask_vld != self.uncore_mask_vld_new) or
-                    (self.uncore_mask_lock != self.uncore_mask_lock_new) or
-                        (self.base_memtype != self.base_memtype_new)):
-                    self.uniform = False

-
-        
-
-
[docs]    def run(self, _) -> int:
-        self.logger.start_test("Check SGX feature support")
-
-        self.res = self.check_sgx_config()
-        if self.res == ModuleResult.PASSED:
-            self.logger.log_passed('All SGX checks passed')
-        elif self.res == ModuleResult.WARNING:
-            self.logger.log_warning('One or more SGX checks detected a warning')
-        else:
-            self.logger.log_failed('One or more SGX checks failed')
-        
-        return self.rc_res.getReturnCode(self.res)

-
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/smm.html b/_modules/chipsec/modules/common/smm.html deleted file mode 100644 index a79ee9b5..00000000 --- a/_modules/chipsec/modules/common/smm.html +++ /dev/null @@ -1,218 +0,0 @@ - - - - - - - - chipsec.modules.common.smm — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.smm

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Compatible SMM memory (SMRAM) Protection check module
-This CHIPSEC module simply reads SMRAMC and checks that D_LCK is set.
-
-Reference:
-In 2006, `Security Issues Related to Pentium System Management Mode <http://www.ssi.gouv.fr/archive/fr/sciences/fichiers/lti/cansecwest2006-duflot.pdf>`_ outlined a configuration issue where compatibility SMRAM was not locked on some platforms. This means that ring 0 software was able to modify System Management Mode (SMM) code and data that should have been protected.
-
-In Compatability SMRAM (CSEG), access to memory is defined by the SMRAMC register. When SMRAMC[D_LCK] is not set by the BIOS, SMRAM can be accessed even when the CPU is not in SMM. Such attacks were also described in `Using CPU SMM to Circumvent OS Security Functions <http://fawlty.cs.usfca.edu/~cruse/cs630f06/duflot.pdf>`_ and `Using SMM for Other Purposes <http://phrack.org/issues/65/7.html>`_.
-
-usage:
-    ``chipsec_main -m common.smm``
-
-Examples:
-    >>> chipsec_main.py -m common.smm
-
-This module will only run on client (core) platforms that have PCI0.0.0_SMRAMC defined.
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS, MTAG_SMM
-from typing import List
-
-TAGS = [MTAG_BIOS, MTAG_SMM]
-
-
-
[docs]class smm(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x3486891, 'https://chipsec.github.io/modules/chipsec.modules.common.smm.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_core() and self.cs.is_register_defined('PCI0.0.0_SMRAMC'):
-            return True
-        self.logger.log("Either not a Core (client) platform or 'PCI0.0.0_SMRAMC' not defined for platform. Skipping module.")
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_SMRAMC(self) -> int:
-
-        regval = self.cs.read_register('PCI0.0.0_SMRAMC')
-        g_smrame = self.cs.get_register_field('PCI0.0.0_SMRAMC', regval, 'G_SMRAME')
-        d_open = self.cs.get_register_field('PCI0.0.0_SMRAMC', regval, 'D_OPEN')
-        d_lock = self.cs.get_register_field('PCI0.0.0_SMRAMC', regval, 'D_LCK')
-
-        self.cs.print_register('PCI0.0.0_SMRAMC', regval)
-
-        if 1 == g_smrame:
-            self.logger.log("[*] Compatible SMRAM is enabled")
-            # When D_LCK is set HW clears D_OPEN so generally no need to check for D_OPEN but doesn't hurt double checking
-            if (1 == d_lock) and (0 == d_open):
-                res = ModuleResult.PASSED
-                self.logger.log_passed("Compatible SMRAM is locked down")
-            else:
-                res = ModuleResult.FAILED
-                self.logger.log_failed("Compatible SMRAM is not properly locked. Expected ( D_LCK = 1, D_OPEN = 0 )")
-                self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-        else:
-            res = ModuleResult.NOTAPPLICABLE
-            self.rc_res.setStatusBit(self.rc_res.status.FEATURE_DISABLED)
-            self.logger.log("[*] Compatible SMRAM is not enabled. Skipping..")
-
-        return self.rc_res.getReturnCode(res)

-
-    # --------------------------------------------------------------------------
-    # run( module_argv )
-    # Required function: run here all tests from this module
-    # --------------------------------------------------------------------------
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("Compatible SMM memory (SMRAM) Protection")
-        self.res = self.check_SMRAMC()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/smm_code_chk.html b/_modules/chipsec/modules/common/smm_code_chk.html deleted file mode 100644 index 4955c0fc..00000000 --- a/_modules/chipsec/modules/common/smm_code_chk.html +++ /dev/null @@ -1,263 +0,0 @@ - - - - - - - - chipsec.modules.common.smm_code_chk — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.smm_code_chk

-# -*- coding: utf-8 -*-
-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2021, SentinelOne
-# Copyright (c) 2021, Intel
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-
-"""
-SMM_Code_Chk_En (SMM Call-Out) Protection check
-
-SMM_Code_Chk_En is a bit found in the MSR_SMM_FEATURE_CONTROL register.
-Once set to '1', any CPU that attempts to execute SMM code not within the ranges defined by the SMRR will assert an unrecoverable MCE.
-As such, enabling and locking this bit is an important step in mitigating SMM call-out vulnerabilities.
-This CHIPSEC module simply reads the register and checks that SMM_Code_Chk_En is set and locked.
-
-Reference:
-    - Intel 64 and IA-32 Architectures Software Developer Manual (SDM)
-        - https://www.intel.com/content/www/us/en/developer/articles/technical/intel-sdm.html
-
-Usage:
-    ``chipsec_main -m common.smm_code_chk``
-
-Examples:
-    >>> chipsec_main.py -m common.smm_code_chk
-
-Registers used:
-    - MSR_SMM_FEATURE_CONTROL.LOCK
-    - MSR_SMM_FEATURE_CONTROL.SMM_Code_Chk_En
-
-.. note::
-    - MSR_SMM_FEATURE_CONTROL may not be defined or readable on all platforms.
-
-"""
-from chipsec.exceptions import HWAccessViolationError
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS, MTAG_SMM
-from typing import List
-
-TAGS = [MTAG_BIOS, MTAG_SMM]
-
-
-
[docs]class smm_code_chk(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x08f743d, 'https://chipsec.github.io/modules/chipsec.modules.common.smm_code_chk.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if not self.cs.is_register_defined('MSR_SMM_FEATURE_CONTROL'):
-            # The MSR_SMM_FEATURE_CONTROL register is available starting from:
-            # * 4th Generation Intel® Core™ Processors (Haswell microarchitecture)
-            # * Atom Processors Based on the Goldmont Microarchitecture
-            self.logger.log_important('Register MSR_SMM_FEATURE_CONTROL not defined for platform.  Skipping module.')
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False
-            
-        # The Intel SDM states that MSR_SMM_FEATURE_CONTROL can only be accessed while the CPU executes in SMM.
-        # However, in reality many users report that there is no problem reading this register from outside of SMM.
-        # Just to be on the safe side of things, we'll verify we can read this register successfully before moving on.
-        try:
-            self.cs.read_register('MSR_SMM_FEATURE_CONTROL')
-        except HWAccessViolationError:
-            self.logger.log_important('MSR_SMM_FEATURE_CONTROL is unreadable.  Skipping module.')
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False
-        else:
-            return True

-
-    def _check_SMM_Code_Chk_En(self, thread_id: int) -> int:
-        regval = self.cs.read_register('MSR_SMM_FEATURE_CONTROL', thread_id)
-        lock = self.cs.get_register_field('MSR_SMM_FEATURE_CONTROL', regval, 'LOCK')
-        code_chk_en = self.cs.get_register_field('MSR_SMM_FEATURE_CONTROL', regval, 'SMM_Code_Chk_En')
-
-        self.cs.print_register('MSR_SMM_FEATURE_CONTROL', regval, cpu_thread=thread_id)
-
-        if 1 == code_chk_en:
-            if 1 == lock:
-                res = ModuleResult.PASSED
-            else:
-                res = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-        else:
-            # MSR_SMM_MCA_CAP (the register that reports enhanced SMM capabilities) can only be read from SMM.
-            # Thus, there is no way to tell whether the the CPU doesn't support SMM_Code_Chk_En in the first place,
-            # or the CPU supports SMM_Code_Chk_En but the BIOS forgot to enable it.
-            #
-            # In either case, there is nothing that prevents SMM code from executing instructions outside the ranges defined by the SMRRs,
-            # so we should at least issue a warning regarding that.
-            res = ModuleResult.WARNING
-
-        return res
-
-
[docs]    def check_SMM_Code_Chk_En(self) -> int:
-
-        results = []
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            results.append(self._check_SMM_Code_Chk_En(tid))
-
-        # Check that all CPUs have the same value of MSR_SMM_FEATURE_CONTROL.
-        if not all(_ == results[0] for _ in results):
-            self.logger.log_failed("MSR_SMM_FEATURE_CONTROL does not have the same value across all CPUs")
-            self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-            return ModuleResult.FAILED
-
-        res = results[0]
-        if res == ModuleResult.FAILED:
-            self.logger.log_failed("SMM_Code_Chk_En is enabled but not locked down")
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-        elif res == ModuleResult.WARNING:
-            self.logger.log_warning("""[*] SMM_Code_Chk_En is not enabled.
-This can happen either because this feature is not supported by the CPU or because the BIOS forgot to enable it.
-Please consult the Intel SDM to determine whether or not your CPU supports SMM_Code_Chk_En.""")
-            self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-        else:
-            self.logger.log_passed("SMM_Code_Chk_En is enabled and locked down")
-
-        return self.rc_res.getReturnCode(res)

-
-    # --------------------------------------------------------------------------
-    # run( module_argv )
-    # Required function: run here all tests from this module
-    # --------------------------------------------------------------------------
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SMM_Code_Chk_En (SMM Call-Out) Protection")
-        self.res = self.check_SMM_Code_Chk_En()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/smm_dma.html b/_modules/chipsec/modules/common/smm_dma.html deleted file mode 100644 index 0299cf8d..00000000 --- a/_modules/chipsec/modules/common/smm_dma.html +++ /dev/null @@ -1,265 +0,0 @@ - - - - - - - - chipsec.modules.common.smm_dma — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.smm_dma

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2022, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-SMM TSEG Range Configuration Checks
-
-This module examines the configuration and locking of SMRAM range configuration protecting from DMA attacks.
-If it fails, then DMA protection may not be securely configured to protect SMRAM.
-
-Just like SMRAM needs to be protected from software executing on the CPU,
-it also needs to be protected from devices that have direct access to DRAM (DMA).
-Protection from DMA is configured through proper programming of SMRAM memory range.
-If BIOS does not correctly configure and lock the configuration,
-then malware could reprogram configuration and open SMRAM area to DMA access,
-allowing manipulation of memory that should have been protected.
-
-References:
-    - `System Management Mode Design and Security Issues <http://www.ssi.gouv.fr/uploads/IMG/pdf/IT_Defense_2010_final.pdf>`_
-    - `Summary of Attack against BIOS and Secure Boot <https://www.defcon.org/images/defcon-22/dc-22-presentations/Bulygin-Bazhaniul-Furtak-Loucaides/DEFCON-22-Bulygin-Bazhaniul-Furtak-Loucaides-Summary-of-attacks-against-BIOS-UPDATED.pdf>`_
-
-Usage:
-    ``chipsec_main -m smm_dma``
-
-Examples:
-    >>> chipsec_main.py -m smm_dma
-
-Registers used:
-    - TSEGBaseLock (control)
-    - TSEGLimitLock (control)
-    - MSR_BIOS_DONE.IA_UNTRUSTED
-    - PCI0.0.0_TSEGMB.TSEGMB
-    - PCI0.0.0_BGSM.BGSM
-    - IA32_SMRR_PHYSBASE.PhysBase
-    - IA32_SMRR_PHYSMASK.PhysMask
-
-Supported Platforms:
-    - Core (client)
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_SMM, MTAG_HWCONFIG
-from typing import List
-
-_MODULE_NAME = 'smm_dma'
-
-TAGS = [MTAG_SMM, MTAG_HWCONFIG]
-
-
-
[docs]class smm_dma(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x72f5ed1, 'https://chipsec.github.io/modules/chipsec.modules.common.smm_dma.html')
-
-
[docs]    def is_supported(self) -> bool:
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        if self.cs.is_atom():
-            self.logger.log_important('Module not supported on Atom platforms.  Skipping module.')
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False
-        elif self.cs.is_server():
-            self.logger.log_important('Xeon (server) platform detected.  Skipping module.')
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False
-        elif not self.cs.is_control_defined('TSEGBaseLock') or not self.cs.is_control_defined('TSEGLimitLock'):
-            self.logger.log_important('TSEGBaseLock and/or TSEGLimitLock control(s) not defined for platform.  Skipping module.')
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False
-        else:
-            return True

-
-
[docs]    def check_tseg_locks(self) -> int:
-        tseg_base_lock = self.cs.get_control('TSEGBaseLock')
-        tseg_limit_lock = self.cs.get_control('TSEGLimitLock')
-        ia_untrusted = 0
-        if self.cs.register_has_field('MSR_BIOS_DONE', 'IA_UNTRUSTED'):
-            ia_untrusted = self.cs.read_register_field('MSR_BIOS_DONE', 'IA_UNTRUSTED')
-
-        if (tseg_base_lock and tseg_limit_lock) or (0 != ia_untrusted):
-            self.logger.log_good("TSEG range is locked")
-            return ModuleResult.PASSED
-        else:
-            self.logger.log_bad("TSEG range is not locked")
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            return ModuleResult.FAILED

-
-
[docs]    def check_tseg_config(self) -> int:
-        res = ModuleResult.FAILED
-        (tseg_base, tseg_limit, tseg_size) = self.cs.cpu.get_TSEG()
-        self.logger.log(f"[*] TSEG      : 0x{tseg_base:016X} - 0x{tseg_limit:016X} (size = 0x{tseg_size:08X})")
-        if self.cs.cpu.check_SMRR_supported():
-            (smram_base, smram_limit, smram_size) = self.cs.cpu.get_SMRR_SMRAM()
-            self.logger.log(f"[*] SMRR range: 0x{smram_base:016X} - 0x{smram_limit:016X} (size = 0x{smram_size:08X})\n")
-        else:
-            smram_base = 0
-            smram_limit = 0
-            self.logger.log("[*] SMRR is not supported\n")
-
-        self.logger.log("[*] Checking TSEG range configuration..")
-        if (0 == smram_base) and (0 == smram_limit):
-            res = ModuleResult.WARNING
-            self.logger.log_warning("TSEG is properly configured but can't determine if it covers entire SMRAM")
-            self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-        else:
-            if (tseg_base <= smram_base) and (smram_limit <= tseg_limit):
-                self.logger.log_good("TSEG range covers entire SMRAM")
-                if self.check_tseg_locks() == ModuleResult.PASSED:
-                    res = ModuleResult.PASSED
-                    self.logger.log_passed("TSEG is properly configured. SMRAM is protected from DMA attacks")
-                else:
-                    self.logger.log_failed("TSEG is properly configured, but the configuration is not locked.")
-                    self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            else:
-                self.logger.log_bad("TSEG range doesn't cover entire SMRAM")
-                self.logger.log_failed("TSEG is not properly configured. Portions of SMRAM may be vulnerable to DMA attacks")
-                self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SMM TSEG Range Configuration Check")
-        self.res = self.check_tseg_config()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/smrr.html b/_modules/chipsec/modules/common/smrr.html deleted file mode 100644 index 0372db28..00000000 --- a/_modules/chipsec/modules/common/smrr.html +++ /dev/null @@ -1,320 +0,0 @@ - - - - - - - - chipsec.modules.common.smrr — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.smrr

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-CPU SMM Cache Poisoning / System Management Range Registers check
-
-This module checks to see that SMRRs are enabled and configured.
-
-Reference:
-    Researchers demonstrated a way to use CPU cache to effectively change values in SMRAM in
-    `Attacking SMM Memory via Intel CPU Cache Poisoning <http://www.invisiblethingslab.com/resources/misc09/smm_cache_fun.pdf>`_
-    and `Getting into the SMRAM: SMM Reloaded <http://cansecwest.com/csw09/csw09-duflot.pdf>`_ .
-    If ring 0 software can make SMRAM cacheable and then populate cache lines at SMBASE with exploit code,
-    then when an SMI is triggered, the CPU could execute the exploit code from cache.
-    System Management Mode Range Registers (SMRRs) force non-cachable behavior and block access to SMRAM when the CPU is not in SMM.
-    These registers need to be enabled/configured by the BIOS.
-
-Usage:
-    ``chipsec_main -m common.smrr [-a modify]``
-
-    - ``-a modify``: Attempt to modify memory at SMRR base
-
-Examples:
-    >>> chipsec_main.py -m common.smrr
-    >>> chipsec_main.py -m common.smrr -a modify
-
-Registers used:
-    - IA32_SMRR_PHYSBASE.PhysBase
-    - IA32_SMRR_PHYSBASE.Type
-    - IA32_SMRR_PHYSMASK.PhysMask
-    - IA32_SMRR_PHYSMASK.Valid
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS, MTAG_SMM, OPT_MODIFY
-from chipsec.hal.msr import MemType
-from typing import List
-
-TAGS = [MTAG_BIOS, MTAG_SMM]
-
-
-
[docs]class smrr(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0xdf11080, 'https://chipsec.github.io/modules/chipsec.modules.common.smrr.html')
-
-
[docs]    def is_supported(self) -> bool:
-        mtrr_exist = self.cs.is_register_defined('MTRRCAP')
-        pbase_exist = self.cs.is_register_defined('IA32_SMRR_PHYSBASE')
-        pmask_exist = self.cs.is_register_defined('IA32_SMRR_PHYSMASK')
-        if mtrr_exist and pbase_exist and pmask_exist:
-            return True
-        self.logger.log_information('Required registers are not defined for this platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-    #
-    # Check that SMRR are supported by CPU in IA32_MTRRCAP_MSR[SMRR]
-    #
-
[docs]    def check_SMRR(self, do_modify: bool) -> int:
-
-        if self.cs.cpu.check_SMRR_supported():
-            self.logger.log_good("OK. SMRR range protection is supported")
-        else:
-            self.logger.log_not_applicable("CPU does not support SMRR range protection of SMRAM")
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        #
-        # SMRR are supported
-        #
-        smrr_ok = True
-
-        #
-        # 2. Check SMRR_BASE is programmed correctly (on CPU0)
-        #
-        self.logger.log('')
-        self.logger.log("[*] Checking SMRR range base programming..")
-        msr_smrrbase = self.cs.read_register('IA32_SMRR_PHYSBASE')
-        self.cs.print_register('IA32_SMRR_PHYSBASE', msr_smrrbase)
-        smrrbase = self.cs.get_register_field('IA32_SMRR_PHYSBASE', msr_smrrbase, 'PhysBase', True)
-        smrrtype = self.cs.get_register_field('IA32_SMRR_PHYSBASE', msr_smrrbase, 'Type')
-        self.logger.log(f"[*] SMRR range base: 0x{smrrbase:016X}")
-
-        if smrrtype in MemType:
-            self.logger.log(f"[*] SMRR range memory type is {MemType[smrrtype]}")
-        else:
-            smrr_ok = False
-            self.logger.log_bad(f"SMRR range memory type 0x{smrrtype:X} is invalid")
-
-        if 0 == smrrbase:
-            smrr_ok = False
-            self.logger.log_bad("SMRR range base is not programmed")
-
-        if smrr_ok:
-            self.logger.log_good("OK so far. SMRR range base is programmed")
-
-        #
-        # 3. Check SMRR_MASK is programmed and SMRR are enabled (on CPU0)
-        #
-        self.logger.log('')
-        self.logger.log("[*] Checking SMRR range mask programming..")
-        msr_smrrmask = self.cs.read_register('IA32_SMRR_PHYSMASK')
-        self.cs.print_register('IA32_SMRR_PHYSMASK', msr_smrrmask)
-        smrrmask = self.cs.get_register_field('IA32_SMRR_PHYSMASK', msr_smrrmask, 'PhysMask', True)
-        smrrvalid = self.cs.get_register_field('IA32_SMRR_PHYSMASK', msr_smrrmask, 'Valid')
-        self.logger.log(f"[*] SMRR range mask: 0x{smrrmask:016X}")
-
-        if not (smrrvalid and (0 != smrrmask)):
-            smrr_ok = False
-            self.logger.log_bad("SMRR range is not enabled")
-
-        if smrr_ok:
-            self.logger.log_good("OK so far. SMRR range is enabled")
-
-        #
-        # 4. Verify that SMRR_BASE/MASK MSRs have the same values on all logical CPUs
-        #
-        self.logger.log('')
-        self.logger.log("[*] Verifying that SMRR range base & mask are the same on all logical CPUs..")
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            msr_base = self.cs.read_register('IA32_SMRR_PHYSBASE', tid)
-            msr_mask = self.cs.read_register('IA32_SMRR_PHYSMASK', tid)
-            self.logger.log(f"[CPU{tid:d}] SMRR_PHYSBASE = {msr_base:016X}, SMRR_PHYSMASK = {msr_mask:016X}")
-            if (msr_base != msr_smrrbase) or (msr_mask != msr_smrrmask):
-                smrr_ok = False
-                self.logger.log_bad("SMRR range base/mask do not match on all logical CPUs")
-                break
-
-        if smrr_ok:
-            self.logger.log_good("OK so far. SMRR range base/mask match on all logical CPUs")
-
-        #
-        # 5. Reading from & writing to SMRR_BASE physical address
-        # writes should be dropped, reads should return all F's
-        #
-
-        self.logger.log(f"[*] Trying to read memory at SMRR base 0x{smrrbase:08X}..")
-
-        ok = 0xFFFFFFFF == self.cs.mem.read_physical_mem_dword(smrrbase)
-        smrr_ok = smrr_ok and ok
-        if ok:
-            self.logger.log_passed("SMRR reads are blocked in non-SMM mode")  # return all F's
-        else:
-            self.logger.log_failed("SMRR reads are not blocked in non-SMM mode")  # all F's are not returned
-
-        if (do_modify):
-            self.logger.log(f"[*] Trying to modify memory at SMRR base 0x{smrrbase:08X}..")
-            self.cs.mem.write_physical_mem_dword(smrrbase, 0x90909090)
-            ok = 0x90909090 != self.cs.mem.read_physical_mem_dword(smrrbase)
-            smrr_ok = smrr_ok and ok
-            if ok:
-                self.logger.log_good("SMRR writes are blocked in non-SMM mode")
-            else:
-                self.logger.log_bad("SMRR writes are not blocked in non-SMM mode")
-
-        self.logger.log('')
-        if not smrr_ok:
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-            self.logger.log_failed("SMRR protection against cache attack is not configured properly")
-        else:
-            res = ModuleResult.PASSED
-            self.logger.log_passed("SMRR protection against cache attack is properly configured")
-
-        return self.rc_res.getReturnCode(res)

-
-    # --------------------------------------------------------------------------
-    # run( module_argv )
-    # Required function: run here all tests from this module
-    # --------------------------------------------------------------------------
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("CPU SMM Cache Poisoning / System Management Range Registers")
-        do_modify = (len(module_argv) > 0) and (module_argv[0] == OPT_MODIFY)
-        self.res = self.check_SMRR(do_modify)
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/spd_wd.html b/_modules/chipsec/modules/common/spd_wd.html deleted file mode 100644 index cdec996f..00000000 --- a/_modules/chipsec/modules/common/spd_wd.html +++ /dev/null @@ -1,236 +0,0 @@ - - - - - - - - chipsec.modules.common.spd_wd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.spd_wd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2019, Eclypsium, Inc.
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-
-"""
-This module checks that SPD Write Disable bit in SMBus controller has been set
-
-References:
-    Intel 8 Series/C220 Series Chipset Family Platform Controller Hub datasheet
-    Intel 300 Series Chipset Families Platform Controller Hub datasheet
-
-This module checks the following:
-
-    SMBUS_HCFG.SPD_WD
-
-The module returns the following results:
-
-    PASSED : SMBUS_HCFG.SPD_WD is set
-
-    FAILED : SMBUS_HCFG.SPD_WD is not set and SPDs were detected
-
-    INFORMATION: SMBUS_HCFG.SPD_WD is not set, but no SPDs were detected
-
-Hardware registers used:
-
-    SMBUS_HCFG
-
-Usage:
-    ``chipsec_main -m common.spd_wd``
-
-Examples:
-    >>> chipsec_main.py -m common.spd_wd
-
-.. NOTE::
-    This module will only run if:
-        - SMBUS device is enabled
-        - SMBUS_HCFG.SPD_WD is defined for the platform
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult
-from chipsec.hal.smbus import SMBus
-from chipsec.hal.spd import SPD
-from typing import List
-
-
-
[docs]class spd_wd(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x122cf72, 'https://chipsec.github.io/modules/chipsec.modules.common.spd_wd.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_device_enabled('SMBUS'):
-            if self.cs.register_has_field('SMBUS_HCFG', 'SPD_WD'):
-                return True
-            else:
-                self.logger.log_important('SMBUS_HCFG.SPD_WD is not defined for this platform.  Skipping module.')
-        else:
-            self.logger.log_important('SMBUS device appears disabled.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-
[docs]    def check_spd_wd(self) -> int:
-        try:
-            _smbus = SMBus(self.cs)
-            _spd = SPD(_smbus)
-        except BaseException as msg:
-            self.logger.log_error(msg)
-            self.rc_res.setStatusBit(self.rc_res.status.INFORMATION)
-            self.res = self.rc_res.getReturnCode(ModuleResult.ERROR)
-            return self.res
-
-        spd_wd_reg = self.cs.read_register('SMBUS_HCFG')
-        spd_wd = self.cs.get_register_field('SMBUS_HCFG', spd_wd_reg, 'SPD_WD')
-
-        self.cs.print_register('SMBUS_HCFG', spd_wd_reg)
-
-        if 1 == spd_wd:
-            self.logger.log_passed("SPD Write Disable is set")
-            self.res = ModuleResult.PASSED
-        else:
-            if _spd.detect():
-                self.logger.log_failed("SPD Write Disable is not set and SPDs were detected")
-                self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-                self.res = ModuleResult.FAILED
-            else:
-                self.logger.log_information("SPD Write Disable is not set, but no SPDs detected")
-                self.rc_res.setStatusBit(self.rc_res.status.INFORMATION)
-                self.res = ModuleResult.INFORMATION
-
-        return self.rc_res.getReturnCode(self.res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SPD Write Disable")
-        self.logger.log('')
-
-        return self.check_spd_wd()

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/spi_access.html b/_modules/chipsec/modules/common/spi_access.html deleted file mode 100644 index b714ea85..00000000 --- a/_modules/chipsec/modules/common/spi_access.html +++ /dev/null @@ -1,253 +0,0 @@ - - - - - - - - chipsec.modules.common.spi_access — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.spi_access

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-#
-# Authors:
-#  Yuriy Bulygin
-#  Erik Bjorge
-#
-
-
-"""
-SPI Flash Region Access Control
-
-Checks SPI Flash Region Access Permissions programmed in the Flash Descriptor
-
-Usage:
-    ``chipsec_main -m common.spi_access``
-
-Examples:
-    >>> chipsec_main.py -m common.spi_access
-
-Registers used:
-    - HSFS.FDV
-    - FRAP.BRWA
-
-.. important::
-    - Some platforms may use alternate means of protecting these regions.
-      Consider this when assessing results.
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from chipsec.hal.spi import SPI, GBE, PLATFORM_DATA, ME, FLASH_DESCRIPTOR
-from typing import List
-
-TAGS = [MTAG_BIOS]
-
-
-
[docs]class spi_access(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.spi = SPI(self.cs)
-        self.rc_res = ModuleResult(0x23bb5d0, 'https://chipsec.github.io/modules/chipsec.modules.common.spi_access.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.register_has_field('HSFS', 'FDV') and self.cs.register_has_field('FRAP', 'BRWA'):
-            return True
-        self.logger.log_important('HSFS.FDV or FRAP.BRWA registers not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-    ##
-    # Displays the SPI Regions Access Permissions
-
[docs]    def check_flash_access_permissions(self) -> int:
-
-        res = ModuleResult.PASSED
-        fdv = self.cs.read_register_field('HSFS', 'FDV') == 1
-        frap = self.cs.read_register('FRAP')
-        brwa = self.cs.get_register_field('FRAP', frap, 'BRWA')
-
-        # Informational
-        # State of Flash Descriptor Valid bit
-        if not fdv:
-            self.logger.log("[*] Flash Descriptor Valid bit is not set")
-
-        # CPU/Software access to Platform Data region (platform specific)
-        if brwa & (1 << PLATFORM_DATA):
-            self.logger.log("[*] Software has write access to Platform Data region in SPI flash (it's platform specific)")
-
-        # Warnings
-        # CPU/Software access to GBe region
-        if brwa & (1 << GBE):
-            res = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.ACCESS_RW)
-            self.logger.log_warning("Software has write access to GBe region in SPI flash")
-
-        # Failures
-        # CPU/Software access to Flash Descriptor region (Read Only)
-        if brwa & (1 << FLASH_DESCRIPTOR):
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.ACCESS_RW)
-            self.logger.log_bad("Software has write access to SPI flash descriptor")
-
-        # CPU/Software access to Intel ME region (Read Only)
-        if brwa & (1 << ME):
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.ACCESS_RW)
-            self.logger.log_bad("Software has write access to Management Engine (ME) region in SPI flash")
-
-        if fdv:
-            if ModuleResult.PASSED == res:
-                self.logger.log_passed("SPI Flash Region Access Permissions in flash descriptor look ok")
-            elif ModuleResult.FAILED == res:
-                self.logger.log_failed("SPI Flash Region Access Permissions are not programmed securely in flash descriptor")
-                self.logger.log_important('System may be using alternative protection by including descriptor region in SPI Protected Range Registers')
-                self.logger.log_important('If using alternative protections, this can be considered a WARNING')
-            elif ModuleResult.WARNING == res:
-                self.logger.log_warning("Certain SPI flash regions are writeable by software")
-        else:
-            res = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.UNSUPPORTED_FEATURE)
-            self.logger.log_warning("Either flash descriptor is not valid or not present on this system")
-
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SPI Flash Region Access Control")
-        self.spi.display_SPI_Ranges_Access_Permissions()
-        self.res = self.check_flash_access_permissions()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/spi_desc.html b/_modules/chipsec/modules/common/spi_desc.html deleted file mode 100644 index 6d1d4236..00000000 --- a/_modules/chipsec/modules/common/spi_desc.html +++ /dev/null @@ -1,216 +0,0 @@ - - - - - - - - chipsec.modules.common.spi_desc — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.spi_desc

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The SPI Flash Descriptor indicates read/write permissions for devices to access regions of the flash memory. 
-This module simply reads the Flash Descriptor and checks that software cannot modify the Flash Descriptor itself. 
-If software can write to the Flash Descriptor, then software could bypass any protection defined by it. 
-While often used for debugging, this should not be the case on production systems.
-
-This module checks that software cannot write to the flash descriptor.
-
-Usage:
-    ``chipsec_main -m common.spi_desc``
-
-Examples:
-    >>> chipsec_main.py -m common.spi_desc
-
-Registers used:
-    - FRAP.BRRA
-    - FRAP.BRWA
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from chipsec.hal.spi import FLASH_DESCRIPTOR
-from typing import List
-
-TAGS = [MTAG_BIOS]
-
-
-
[docs]class spi_desc(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x63fa19c, 'https://chipsec.github.io/modules/chipsec.modules.common.spi_desc.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.register_has_all_fields('FRAP', ['BRRA', 'BRWA']):
-            return True
-        self.logger.log_important('FRAP.BRWA or FRAP.BRRA registers not defined for platform.  Skipping module.')
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return False

-
-    ##
-    # Displays the SPI Regions Access Permissions
-
[docs]    def check_flash_access_permissions(self) -> int:
-
-        res = ModuleResult.PASSED
-        frap = self.cs.read_register('FRAP')
-        self.cs.print_register('FRAP', frap)
-        brra = self.cs.get_register_field('FRAP', frap, 'BRRA')
-        brwa = self.cs.get_register_field('FRAP', frap, 'BRWA')
-
-        self.logger.log(f"[*] Software access to SPI flash regions: read = 0x{brra:02X}, write = 0x{brwa:02X}")
-        if brwa & (1 << FLASH_DESCRIPTOR):
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.ACCESS_RW)
-            self.logger.log_bad("Software has write access to SPI flash descriptor")
-
-        self.logger.log('')
-        if ModuleResult.PASSED == res:
-            self.logger.log_passed("SPI flash permissions prevent SW from writing to flash descriptor")
-        elif ModuleResult.FAILED == res:
-            self.logger.log_failed("SPI flash permissions allow SW to write flash descriptor")
-            self.logger.log_important('System may be using alternative protection by including descriptor region in SPI Protected Range Registers')
-        
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SPI Flash Region Access Control")
-        self.res = self.check_flash_access_permissions()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/spi_fdopss.html b/_modules/chipsec/modules/common/spi_fdopss.html deleted file mode 100644 index 10942e29..00000000 --- a/_modules/chipsec/modules/common/spi_fdopss.html +++ /dev/null @@ -1,201 +0,0 @@ - - - - - - - - chipsec.modules.common.spi_fdopss — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.spi_fdopss

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Checks for SPI Controller Flash Descriptor Security Override Pin Strap (FDOPSS). 
-On some systems, this may be routed to a jumper on the motherboard. 
-
-Usage:
-    ``chipsec_main -m common.spi_fdopss``
-
-Examples:
-    >>> chipsec_main.py -m common.spi_fdopss
-
-Registers used:
-    - HSFS.FDOPSS
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from typing import List
-
-TAGS = [MTAG_BIOS]
-
-
-
[docs]class spi_fdopss(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self.rc_res = ModuleResult(0x9b73a54, 'https://chipsec.github.io/modules/chipsec.modules.common.spi_fdopss.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if not self.cs.register_has_field('HSFS', 'FDOPSS'):
-            self.logger.log_important('HSFS.FDOPSS field not defined for platform.  Skipping module.')
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-            return False
-        return True

-
-
[docs]    def check_fd_security_override_strap(self) -> int:
-        hsfs_reg = self.cs.read_register('HSFS')
-        self.cs.print_register('HSFS', hsfs_reg)
-        fdopss = self.cs.get_register_field('HSFS', hsfs_reg, 'FDOPSS')
-
-        if (fdopss != 0):
-            self.logger.log_passed("SPI Flash Descriptor Security Override is disabled")
-            return self.rc_res.getReturnCode(ModuleResult.PASSED)
-        else:
-            self.logger.log_failed("SPI Flash Descriptor Security Override is enabled")
-            self.rc_res.setStatusBit(self.rc_res.status.CONFIGURATION)
-            return self.rc_res.getReturnCode(ModuleResult.FAILED)

-
-    # --------------------------------------------------------------------------
-    # run( module_argv )
-    # Required function: run here all tests from this module
-    # --------------------------------------------------------------------------
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SPI Flash Descriptor Security Override Pin-Strap")
-        self.res = self.check_fd_security_override_strap()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/spi_lock.html b/_modules/chipsec/modules/common/spi_lock.html deleted file mode 100644 index 7074db74..00000000 --- a/_modules/chipsec/modules/common/spi_lock.html +++ /dev/null @@ -1,225 +0,0 @@ - - - - - - - - chipsec.modules.common.spi_lock — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.spi_lock

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2020, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-The configuration of the SPI controller, including protected ranges (PR0-PR4), is locked by HSFS[FLOCKDN] until reset.
-If not locked, the controller configuration may be bypassed by reprogramming these registers.
-
-This vulnerability (not setting FLOCKDN) is also checked by other tools, including  `flashrom <http://www.flashrom.org/>`_
-and Copernicus by MITRE.
-
-This module checks that the SPI Flash Controller configuration is locked.
-
-Reference:
-    - `flashrom <http://www.flashrom.org/>`_
-    - `Copernicus: Question Your Assumptions about BIOS Security <http://www.mitre.org/capabilities/cybersecurity/overview/cybersecurity-blog/copernicus-question-your-assumptions-about>`_
-
-Usage:
-    ``chipsec_main -m common.spi_lock``
-
-Examples:
-    >>> chipsec_main.py -m common.spi_lock
-
-Registers used:
-    - FlashLockDown (control)
-    - SpiWriteStatusDis (control)
-
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS
-from typing import List
-
-TAGS = [MTAG_BIOS]
-
-
-
[docs]class spi_lock(BaseModule):
-
-    def __init__(self):
-        super(spi_lock, self).__init__()
-        self.rc_res = ModuleResult(0xf73c7bd, 'https://chipsec.github.io/modules/chipsec.modules.common.spi_lock.html')
-
-
[docs]    def is_supported(self) -> bool:
-        if self.cs.is_control_defined('FlashLockDown'):
-            return True
-        self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-        self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        self.logger.log_important('FlashLockDown control not define for platform.  Skipping module.')
-        return False

-
-
[docs]    def check_spi_lock(self) -> int:
-        res = ModuleResult.PASSED
-        reg_print = True
-        if self.cs.is_control_defined('SpiWriteStatusDis'):
-            wrsdis = self.cs.get_control('SpiWriteStatusDis', with_print=reg_print)
-            if 1 == wrsdis:
-                self.logger.log_good('SPI write status disable set.')
-            else:
-                res = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.ACCESS_RW)
-                self.logger.log_bad('SPI write status disable not set.')
-            reg_print = False
-
-        flockdn = self.cs.get_control('FlashLockDown', with_print=reg_print)
-        if 1 == flockdn:
-            self.logger.log_good("SPI Flash Controller configuration is locked")
-        else:
-            res = ModuleResult.FAILED
-            self.rc_res.setStatusBit(self.rc_res.status.LOCKS)
-            self.logger.log_bad("SPI Flash Controller configuration is not locked")
-        reg_print = False
-
-        if res == ModuleResult.FAILED:
-            self.logger.log_failed("SPI Flash Controller not locked correctly.")
-        elif res == ModuleResult.PASSED:
-            self.logger.log_passed("SPI Flash Controller locked correctly.")
-        else:
-            self.logger.log_warning("Unable to determine if SPI Flash Controller is locked correctly.")
-
-        return self.rc_res.getReturnCode(res)

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("SPI Flash Controller Configuration Locks")
-        self.res = self.check_spi_lock()
-        return self.res

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/uefi/access_uefispec.html b/_modules/chipsec/modules/common/uefi/access_uefispec.html deleted file mode 100644 index 787ab9f8..00000000 --- a/_modules/chipsec/modules/common/uefi/access_uefispec.html +++ /dev/null @@ -1,374 +0,0 @@ - - - - - - - - chipsec.modules.common.uefi.access_uefispec — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.uefi.access_uefispec

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Checks protection of UEFI variables defined in the UEFI spec to have certain permissions.
-
-Returns failure if variable attributes are not as defined in `table 11 "Global Variables" <http://uefi.org/>`_ of the UEFI spec.
-
-usage:
-    ``chipsec_main -m common.uefi.access_uefispec [-a modify]``
-
-    - ``-a modify``: Attempt to modify each variable in addition to checking attributes
-
-Where:
-    - ``[]``: optional line
-
-Examples:
-    >>> chipsec_main.py -m common.uefi.access_uefispec
-    >>> chipsec_main.py -m common.uefi.access_uefispec -a modify
-
-NOTE:
-Requires an OS with UEFI Runtime API support.
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_SECUREBOOT, MTAG_BIOS, OPT_MODIFY
-from chipsec.hal.uefi import UEFI, EFI_VARIABLE_NON_VOLATILE, EFI_VARIABLE_BOOTSERVICE_ACCESS, EFI_VARIABLE_RUNTIME_ACCESS, get_attr_string
-from chipsec.hal.uefi import EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS, EFI_VARIABLE_APPEND_WRITE
-from chipsec.hal.uefi_common import StatusCode
-from typing import List
-
-
-TAGS = [MTAG_BIOS, MTAG_SECUREBOOT]
-
-
-
[docs]class access_uefispec(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self._uefi = UEFI(self.cs)
-        self.rc_res = ModuleResult(0xadd835b, 'https://chipsec.github.io/modules/chipsec.modules.common.uefi.access_uefispec.html')
-
-        nv = EFI_VARIABLE_NON_VOLATILE
-        bs = EFI_VARIABLE_BOOTSERVICE_ACCESS
-        rt = EFI_VARIABLE_RUNTIME_ACCESS
-        ta = EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS
-
-        self.uefispec_vars = {
-            # From UEFI Spec Table 11 "Global Variables"
-            # Updated to version 2.10 Section 3.3 "Globally Defined Variables"
-            # https://uefi.org/sites/default/files/resources/UEFI_Spec_2_10_Aug29.pdf
-            # https://uefi.org/specs/UEFI/2.10/03_Boot_Manager.html#globally-defined-variables
-            "LangCodes": bs | rt,
-            "Lang": nv | bs | rt,
-            "Timeout": nv | bs | rt,
-            "PlatformLangCodes": bs | rt,
-            "PlatformLang": nv | bs | rt,
-            "ConIn": nv | bs | rt,
-            "ConOut": nv | bs | rt,
-            "ErrOut": nv | bs | rt,
-            "ConInDev": bs | rt,
-            "ConOutDev": bs | rt,
-            "ErrOutDev": bs | rt,
-            "Boot0001": nv | bs | rt,
-            "Boot0002": nv | bs | rt,
-            "BootOrder": nv | bs | rt,
-
-            "AuditMode": bs | rt,
-            "BootNext": nv | bs | rt,
-            "BootCurrent": bs | rt,
-            "BootOptionSupport": bs | rt,
-            "CryptoIndications": nv | bs | rt,
-            "CryptoIndicationsSupport": bs | rt,
-            "CrytopIndicationsActive": bs | rt,
-            "DeployedMode": bs | rt,
-            "devAuthBoot": bs | rt,
-            "devdbDefault": bs | rt,
-            "Driver0001": nv | bs | rt,
-            "DriverOrder": nv | bs | rt,
-            "Key0001": nv | bs | rt,
-            "HwErrRecSupport": nv | bs | rt,  # HwErrRecSupport should be RO
-            "SetupMode": bs | rt,  # SetupMode should be RO
-            "KEK": nv | bs | rt | ta,
-            "OsRecoveryOrder": nv | bs | rt | ta,
-            "PK": nv | bs | rt | ta,
-            "SignatureSupport": bs | rt,  # RO
-            "SecureBoot": bs | rt,  # RO
-            "KEKDefault": bs | rt,  # RO
-            "PKDefault": bs | rt,  # RO
-            "dbDefault": bs | rt,  # RO
-            "dbxDefault": bs | rt,  # RO
-            "dbtDefault": bs | rt,  # RO
-            "OsIndicationsSupported": bs | rt,  # RO
-            "OsIndications": nv | bs | rt,
-            "SysPrep0001": nv | bs | rt,
-            "SysPrep0002": nv | bs | rt,
-            "SysPrepOrder": nv | bs | rt,
-            "VendorKeys": bs | rt  # RO
-        }
-
-        self.uefispec_ro_vars = ("HwErrRecSupport", "SetupMode", "SignatureSupport", "SecureBoot", "KEKDefault", "PKDefault", "dbDefault", "dbxDefault", "dbtDefault", "OsIndicationsSupported", "VendorKeys")
-
-
[docs]    def is_supported(self) -> bool:
-        supported = self.cs.helper.EFI_supported()
-        if not supported:
-            self.logger.log("OS does not support UEFI Runtime API")
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return supported

-
-
[docs]    def diff_var(self, data1: int, data2: int) -> bool:
-        if data1 is None or data2 is None:
-            return data1 != data2
-
-        oldstr = ":".join(f"{c:02x}" for c in data1)
-        newstr = ":".join(f"{c:02x}" for c in data2)
-
-        if oldstr != newstr:
-            print(oldstr)
-            print(newstr)
-            return True
-        else:
-            return False

-
-
[docs]    def can_modify(self, name: str, guid: str, data: bytes) -> bool:
-        ret = False
-
-        #origdata = _uefi.get_EFI_variable(name, guid)
-        origdata = data
-        datalen = len(bytearray(data))
-        baddata = 'Z' * datalen  # 0x5A is ASCII 'Z'
-        if baddata == origdata:
-            baddata = 'A' * datalen  # in case we failed to restore previously
-        status = self._uefi.set_EFI_variable(name, guid, baddata)
-        if status != StatusCode.EFI_SUCCESS:
-            self.logger.log_good(f'Writing EFI variable {name} did not succeed.')
-        newdata = self._uefi.get_EFI_variable(name, guid)
-        if self.diff_var(newdata, origdata):
-            self.logger.log_bad(f'Corruption of EFI variable of concern {name}. Trying to recover.')
-            ret = True
-            self._uefi.set_EFI_variable(name, guid, origdata)
-            if self.diff_var(self._uefi.get_EFI_variable(name, guid), origdata):
-                nameguid = name + ' (' + guid + ')'
-                self.logger.log_bad(f'RECOVERY FAILED. Variable {nameguid} remains corrupted. Original data value: {origdata}')
-        return ret

-
-
[docs]    def check_vars(self, do_modify: bool) -> int:
-        res = ModuleResult.PASSED
-        vars = self._uefi.list_EFI_variables()
-        if vars is None:
-            self.logger.log_warning('Could not enumerate UEFI Variables from runtime.')
-            self.logger.log_important("Note that UEFI variables may still exist, OS just did not expose runtime UEFI Variable API to read them.\nYou can extract variables directly from ROM file via 'chipsec_util.py uefi nvram bios.bin' command and verify their attributes manually.")
-            self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-            return self.rc_res.getReturnCode(ModuleResult.WARNING)
-
-        uefispec_concern = []
-        ro_concern = []
-        rw_variables = []
-
-        self.logger.log('[*] Testing UEFI variables ..')
-        for name in vars.keys():
-            if name is None:
-                pass
-            if vars[name] is None:
-                pass
-
-            if len(vars[name]) > 1:
-                self.logger.log_important(f'Found two instances of the variable {name}.')
-            for (off, buf, hdr, data, guid, attrs) in vars[name]:
-                self.logger.log(f'[*] Variable {name} ({get_attr_string(attrs)}) Guid {guid} Size {hex(len(data))} ')
-                perms = self.uefispec_vars.get(name)
-                if perms is not None:
-                    if perms != attrs:
-                        attr_diffs = (perms ^ attrs)
-                        extra_attr = attr_diffs & attrs
-                        missing_attr = attr_diffs & ~extra_attr
-                        uefispec_concern.append(name)
-                        if extra_attr != 0:
-                            self.logger.log_important('  Extra attributes:' + get_attr_string(extra_attr))
-                            if (extra_attr & ~(EFI_VARIABLE_AUTHENTICATED_WRITE_ACCESS | EFI_VARIABLE_TIME_BASED_AUTHENTICATED_WRITE_ACCESS | EFI_VARIABLE_APPEND_WRITE) != 0):
-                                res = ModuleResult.FAILED
-                        if missing_attr != 0:
-                            self.logger.log_important('  Missing attributes:' + get_attr_string(missing_attr))
-                        if res != ModuleResult.FAILED:
-                            res = ModuleResult.WARNING
-                        self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-
-                if do_modify:
-                    self.logger.log(f"[*] Testing modification of {name} ..")
-                    if name in self.uefispec_ro_vars:
-                        if self.can_modify(name, guid, data):
-                            ro_concern.append(name)
-                            self.logger.log_bad(f"Variable {name} should be read only.")
-                            self.rc_res.setStatusBit(self.rc_res.status.POTENTIALLY_VULNERABLE)
-                            res = ModuleResult.FAILED
-                    else:
-                        if self.can_modify(name, guid, data):
-                            rw_variables.append(name)
-
-        if uefispec_concern:
-            self.logger.log('')
-            self.logger.log_bad('Variables with attributes that differ from UEFI spec:')
-            for name in uefispec_concern:
-                self.logger.log(f'    {name}')
-
-        if do_modify:
-            if ro_concern:
-                self.logger.log('')
-                self.logger.log_bad('Variables that should have been read-only and were not:')
-                for name in ro_concern:
-                    self.logger.log(f'    {name}')
-
-            if rw_variables:
-                self.logger.log('')
-                self.logger.log_unknown('Variables that are read-write (manual investigation is required):')
-                for name in rw_variables:
-                    self.logger.log(f'    {name}')
-
-        self.logger.log('')
-
-        if ModuleResult.PASSED == res:
-            self.logger.log_passed('All checked EFI variables are protected according to spec.')
-        elif ModuleResult.FAILED == res:
-            self.logger.log_failed('Some EFI variables were not protected according to spec.')
-        return res

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("Access Control of EFI Variables")
-
-        do_modify = (len(module_argv) > 0 and module_argv[0] == OPT_MODIFY)
-        self.res = self.check_vars(do_modify)
-        return self.rc_res.getReturnCode(self.res)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/modules/common/uefi/s3bootscript.html b/_modules/chipsec/modules/common/uefi/s3bootscript.html deleted file mode 100644 index 95366b19..00000000 --- a/_modules/chipsec/modules/common/uefi/s3bootscript.html +++ /dev/null @@ -1,339 +0,0 @@ - - - - - - - - chipsec.modules.common.uefi.s3bootscript — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.modules.common.uefi.s3bootscript

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Checks protections of the S3 resume boot-script implemented by the UEFI based firmware
-
-References:
-
-`VU#976132 UEFI implementations do not properly secure the EFI S3 Resume Boot Path boot script <https://www.kb.cert.org/vuls/id/976132>`_
-
-`Technical Details of the S3 Resume Boot Script Vulnerability <http://www.intelsecurity.com/advanced-threat-research/content/WP_Intel_ATR_S3_ResBS_Vuln.pdf>`_ by Intel Security's Advanced Threat Research team.
-
-`Attacks on UEFI Security <https://events.ccc.de/congress/2014/Fahrplan/system/attachments/2557/original/AttacksOnUEFI_Slides.pdf>`_ by Rafal Wojtczuk and Corey Kallenberg.
-
-`Attacking UEFI Boot Script <https://bromiumlabs.files.wordpress.com/2015/01/venamis_whitepaper.pdf>`_ by Rafal Wojtczuk and Corey Kallenberg.
-
-`Exploiting UEFI boot script table vulnerability <http://blog.cr4.sh/2015/02/exploiting-uefi-boot-script-table.html>`_ by Dmytro Oleksiuk.
-
-Usage:
-    ``chipsec_main.py -m common.uefi.s3bootscript [-a <script_address>]``
-
-    - ``-a <script_address>``: Specify the bootscript address
-
-Where:
-    - ``[]``: optional line
-
-Examples:
-    >>> chipsec_main.py -m common.uefi.s3bootscript
-    >>> chipsec_main.py -m common.uefi.s3bootscript -a 0x00000000BDE10000
-
-.. NOTE::
-    Requires an OS with UEFI Runtime API support.
-"""
-
-from chipsec.module_common import BaseModule, ModuleResult, MTAG_BIOS, MTAG_SMM, MTAG_SECUREBOOT
-from chipsec.defines import BOUNDARY_1MB, BOUNDARY_4GB
-from chipsec.hal.uefi import UEFI, parse_script
-from chipsec.hal.uefi_common import S3BootScriptOpcode, S3BOOTSCRIPT_ENTRY
-from typing import List
-
-TAGS = [MTAG_BIOS, MTAG_SMM, MTAG_SECUREBOOT]
-
-########################################################################################################
-#
-# Main module functionality
-#
-########################################################################################################
-BOOTSCRIPT_OK = 0x0
-BOOTSCRIPT_INSIDE_SMRAM = 0x1
-BOOTSCRIPT_OUTSIDE_SMRAM = 0x2
-DISPATCH_OPCODES_UNPROTECTED = 0x4
-DISPATCH_OPCODES_PROTECTED = 0x8
-
-HIGH_BIOS_RANGE_SIZE = 2 * BOUNDARY_1MB
-
-
-
[docs]class s3bootscript(BaseModule):
-
-    def __init__(self):
-        BaseModule.__init__(self)
-        self._uefi = UEFI(self.cs)
-        self.rc_res = ModuleResult(0x9e3cf54, 'https://chipsec.github.io/modules/chipsec.modules.common.uefi.s3bootscript.html')
-
-
[docs]    def is_supported(self) -> bool:
-        supported = self.cs.helper.EFI_supported()
-        if not supported:
-            self.logger.log("OS does not support UEFI Runtime API")
-            self.rc_res.setStatusBit(self.rc_res.status.NOT_APPLICABLE)
-            self.res = self.rc_res.getReturnCode(ModuleResult.NOTAPPLICABLE)
-        return supported

-
-
[docs]    def is_inside_SMRAM(self, pa: int) -> bool:
-        return (pa >= self.smrambase and pa < self.smramlimit)

-
-
[docs]    def is_inside_SPI(self, pa: int) -> bool:
-        return (pa >= (BOUNDARY_4GB - HIGH_BIOS_RANGE_SIZE) and pa < BOUNDARY_4GB)

-
-
[docs]    def check_dispatch_opcodes(self, bootscript_entries: List[S3BOOTSCRIPT_ENTRY]) -> bool:
-        self.logger.log('[*] Checking entry-points of Dispatch opcodes..')
-        dispatch_ep_ok = True
-        n_dispatch = 0
-        for e in bootscript_entries:
-            if e.decoded_opcode is None:
-                continue
-            if S3BootScriptOpcode.EFI_BOOT_SCRIPT_DISPATCH_OPCODE == e.decoded_opcode.opcode:
-                n_dispatch += 1
-                dispatchstr = f"Dispatch opcode (off 0x{e.offset_in_script:04X}) with entry-point 0x{e.decoded_opcode.entrypoint:016X}"
-                if not self.is_inside_SMRAM(e.decoded_opcode.entrypoint) and not self.is_inside_SPI(e.decoded_opcode.entrypoint):
-                    dispatch_ep_ok = False
-                    self.logger.log_bad(dispatchstr + " > UNPROTECTED")
-                else:
-                    self.logger.log_good(dispatchstr + " > PROTECTED")
-        self.logger.log(f"[*] Found {n_dispatch:d} Dispatch opcodes")
-        return dispatch_ep_ok

-
-
[docs]    def check_s3_bootscript(self, bootscript_pa: int) -> int:
-        res = BOOTSCRIPT_OK
-        self.logger.log(f"[*] Checking S3 boot-script at 0x{bootscript_pa:016X}")
-
-        # Checking if it's in SMRAM
-        scriptInsideSMRAM = self.is_inside_SMRAM(bootscript_pa)
-        if scriptInsideSMRAM:
-            res |= BOOTSCRIPT_INSIDE_SMRAM
-            self.logger.log_good('S3 boot-script is in SMRAM')
-            self.logger.log_important("Note: the test could not verify Dispatch opcodes because the script is in SMRAM. Entry-points of Dispatch opcodes also need to be protected.")
-        else:
-            res |= BOOTSCRIPT_OUTSIDE_SMRAM
-            self.logger.log_bad('S3 boot-script is not in SMRAM')
-            self.logger.log('[*] Reading S3 boot-script from memory..')
-            script_all = self.cs.mem.read_physical_mem(bootscript_pa, 0x100000)
-            self.logger.log('[*] Decoding S3 boot-script opcodes..')
-            script_entries = parse_script(script_all, False)
-            dispatch_opcodes_ok = self.check_dispatch_opcodes(script_entries)
-            if dispatch_opcodes_ok:
-                res |= DISPATCH_OPCODES_PROTECTED
-                self.logger.log_important("S3 boot-script is not in protected memory but didn't find unprotected Dispatch entry-points")
-            else:
-                res |= DISPATCH_OPCODES_UNPROTECTED
-                self.logger.log_bad('Entry-points of Dispatch opcodes in S3 boot-script are not in protected memory')
-        return res

-
-
[docs]    def check_s3_bootscripts(self, bsaddress=None) -> int:
-        res = 0
-        scriptInsideSMRAM = False
-
-        if bsaddress:
-            bootscript_PAs = [bsaddress]
-        else:
-            found, bootscript_PAs = self._uefi.find_s3_bootscript()
-            if not found:
-                self.logger.log_good("Didn't find any S3 boot-scripts in EFI variables")
-                self.logger.log_warning("S3 Boot-Script was not found. Firmware may be using other ways to store/locate it, or OS might be blocking access.")
-                self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-                return self.rc_res.getReturnCode(ModuleResult.WARNING)
-
-
-            self.logger.log_important(f'Found {len(bootscript_PAs):d} S3 boot-script(s) in EFI variables')
-
-        for bootscript_pa in bootscript_PAs:
-            if 0 == bootscript_pa:
-                continue
-            res |= self.check_s3_bootscript(bootscript_pa)
-
-        self.logger.log('')
-
-        if (res & BOOTSCRIPT_OUTSIDE_SMRAM) != 0:
-            # BOOTSCRIPT_OUTSIDE_SMRAM
-            if (res & DISPATCH_OPCODES_UNPROTECTED) != 0:
-                # DISPATCH_OPCODES_UNPROTECTED
-                status = ModuleResult.FAILED
-                self.rc_res.setStatusBit(self.rc_res.status.PROTECTION)
-                self.logger.log_failed('S3 Boot-Script and Dispatch entry-points do not appear to be protected')
-            else:
-                # DISPATCH_OPCODES_PROTECTED
-                status = ModuleResult.WARNING
-                self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-                self.logger.log_warning('S3 Boot-Script is not in SMRAM but Dispatch entry-points appear to be protected. Recommend further testing')
-        else:
-            # BOOTSCRIPT_INSIDE_SMRAM
-            status = ModuleResult.WARNING
-            self.rc_res.setStatusBit(self.rc_res.status.VERIFY)
-            self.logger.log_warning("S3 Boot-Script is inside SMRAM. The script is protected but Dispatch opcodes cannot be inspected")
-
-        self.logger.log_important("Additional testing of the S3 boot-script can be done using tools.uefi.s3script_modify")
-
-        return status

-
-
[docs]    def run(self, module_argv: List[str]) -> int:
-        self.logger.start_test("S3 Resume Boot-Script Protections")
-
-        if len(module_argv) > 2:
-            self.logger.log_error('Expected module options: -a <bootscript_address>')
-            self.rc_res.setStatusBit(self.rc_res.status.UNSUPPORTED_OPTION)
-            return self.rc_res.getReturnCode(ModuleResult.ERROR)
-
-        script_pa = None
-
-        if len(module_argv) > 0:
-            script_pa = int(module_argv[0], 16)
-            self.logger.log(f'[*] Using manually assigned S3 Boot-Script table base: 0x{script_pa:016X}')
-        (self.smrambase, self.smramlimit, self.smramsize) = self.cs.cpu.get_SMRAM()
-        if (self.smrambase is not None) and (self.smramlimit is not None):
-            self.logger.log(f'[*] SMRAM: Base = 0x{self.smrambase:016X}, Limit = 0x{self.smramlimit:016X}, Size = 0x{self.smramsize:08X}')
-
-        try:
-            if script_pa is not None:
-                self.res = self.check_s3_bootscripts(script_pa)
-            else:
-                self.res = self.check_s3_bootscripts()
-        except:
-            self.logger.log_error("The module was not able to recognize the S3 resume boot script on this platform.")
-            if self.logger.VERBOSE:
-                raise
-            self.res = ModuleResult.ERROR
-
-        return self.rc_res.getReturnCode(self.res)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/options.html b/_modules/chipsec/options.html deleted file mode 100644 index 50c931bf..00000000 --- a/_modules/chipsec/options.html +++ /dev/null @@ -1,164 +0,0 @@ - - - - - - - - chipsec.options — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.options

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-import os
-import configparser
-from chipsec.file import get_main_dir
-from chipsec.exceptions import CSConfigError
-
-
-
[docs]class Options(object):
-    def __init__(self):
-        options_path = os.path.join(get_main_dir(), 'chipsec', 'options')
-        if not os.path.isdir(options_path):
-            raise CSConfigError(f'Unable to locate configuration options: {options_path}')
-        options_name = os.path.join(options_path, 'cmd_options.ini')
-        self.config = configparser.ConfigParser()
-        with open(options_name) as options_file:
-            self.config.read_file(options_file)
-
-
-
[docs]    def get_section_data(self, section, key):
-        return self.config.get(section, key)

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/parsers.html b/_modules/chipsec/parsers.html deleted file mode 100644 index f22b512f..00000000 --- a/_modules/chipsec/parsers.html +++ /dev/null @@ -1,213 +0,0 @@ - - - - - - - - chipsec.parsers — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.parsers

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2023, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-
-from collections import namedtuple
-from enum import Enum
-from chipsec.logger import logger
-
-
-
[docs]class Stage(Enum):
-    NONE = 0
-    GET_INFO = 10
-    DEVICE_CFG = 20
-    CORE_SUPPORT = 30
-    CUST_SUPPORT = 40
-    EXTRA = 50

-
-
-# Stage - None
-# - Never runs
-# - stage_data - None
-# - Returns None
-
-# Stage.GET_INFO
-# - Gathers platform information including values used in platform detection
-# - stage_data - stage_info named tuple
-# - Returns - info_data named tuple
-stage_info = namedtuple('StageInfo', ['vid_str', 'configuration'])
-info_data = namedtuple('InfoData', ['family', 'proc_code', 'pch_code', 'detect_vals', 'req_pch', 'vid_str', 'sku_list'])
-
-# Stage.DEVICE_CFG
-# - Determine device configuration files
-# - stage_data - stage_dev named tuple for file being processed
-# - Returns - A list of config_data named tuples
-stage_dev = namedtuple('StageCore', ['vid_str', 'xml_file'])
-config_data = namedtuple('DevData', ['vid_str', 'dev_name', 'xml_file'])
-
-# Stage.CORE_SUPPORT
-# - Parse all core XML tags and update configuration data directly in object
-# - stage_data - config_data named tuple for the file being processed
-# - Returns - None
-
-# Stage.CUST_SUPPORT
-# - Parse any custom XML tags and update configuration data directly in object
-# - stage_data - config_data named tuple for the file being processed
-# - Returns - None
-
-
-
[docs]class BaseConfigParser:
-    def __init__(self, cfg_obj):
-        self.logger = logger()
-        self.cfg = cfg_obj
-
-
[docs]    def startup(self):
-        return None

-
-
[docs]    def get_metadata(self):
-        return {'template': self.def_handler}

-
-
[docs]    def get_stage(self):
-        return Stage.NONE

-
-
[docs]    def def_handler(self, et_node, stage_data=None):
-        return None

-
-
-parsers = [BaseConfigParser]
-
-
-
[docs]class BaseConfigHelper:
-    def __init__(self, cfg_obj):
-        self.logger = logger()
-        self.cfg = cfg_obj

-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/acpi_cmd.html b/_modules/chipsec/utilcmd/acpi_cmd.html deleted file mode 100644 index dfe42ea8..00000000 --- a/_modules/chipsec/utilcmd/acpi_cmd.html +++ /dev/null @@ -1,211 +0,0 @@ - - - - - - - - chipsec.utilcmd.acpi_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.acpi_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Command-line utility providing access to ACPI tables
-
->>> chipsec_util acpi list
->>> chipsec_util acpi table <name>|<file_path>
-
-Examples:
-
->>> chipsec_util acpi list
->>> chipsec_util acpi table XSDT
->>> chipsec_util acpi table acpi_table.bin
-"""
-
-from os.path import exists as path_exists
-from argparse import ArgumentParser
-
-from chipsec.hal.acpi import ACPI
-from chipsec.command import BaseCommand, toLoad
-
-# ###################################################################
-#
-# Advanced Configuration and Power Interface (ACPI)
-#
-# ###################################################################
-
-
-
[docs]class ACPICommand(BaseCommand):
-
[docs]    def requirements(self) -> toLoad:
-        if self.func == self.acpi_table and self._file:
-            return toLoad.Nil # TODO: Fix this case. Need to update ACPI HAL to not try to auto-populate tables.
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_list = subparsers.add_parser('list')
-        parser_list.set_defaults(func=self.acpi_list)
-
-        parser_table = subparsers.add_parser('table')
-        parser_table.add_argument('-f', '--file', dest='_file', help='Read from file', action='store_true')
-        parser_table.add_argument('_name', metavar='table|filename', nargs=1, help="table to list")
-        parser_table.set_defaults(func=self.acpi_table)
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._acpi = ACPI(self.cs)

-
-
[docs]    def acpi_list(self) -> None:
-        self.logger.log('[CHIPSEC] Enumerating ACPI tables..')
-        self._acpi.print_ACPI_table_list()

-
-
[docs]    def acpi_table(self) -> None:
-        name = self._name[0]
-        if not self._file and not self._acpi.is_ACPI_table_present(name):
-            self.logger.log_error(f'Please specify table name from {self._acpi.tableList.keys()}')
-            return
-        elif self._file and not path_exists(name):
-            self.logger.log_error(f"[CHIPSEC] Unable to find file '{name}'")
-            return
-        self.logger.log(f"[CHIPSEC] reading ACPI table {'from file' if self._file else ''} '{name}'")
-        self._acpi.dump_ACPI_table(name, self._file)
-        return

-
-
-commands = {'acpi': ACPICommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/chipset_cmd.html b/_modules/chipsec/utilcmd/chipset_cmd.html deleted file mode 100644 index b053299f..00000000 --- a/_modules/chipsec/utilcmd/chipset_cmd.html +++ /dev/null @@ -1,183 +0,0 @@ - - - - - - - - chipsec.utilcmd.chipset_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.chipset_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-usage as a standalone utility:
-    >>> chipsec_util platform
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.exceptions import UnknownChipsetError
-
-# ###################################################################
-#
-# Chipset/CPU Detection
-#
-# ###################################################################
-
-
-
[docs]class PlatformCommand(BaseCommand):
-    """
-    chipsec_util platform
-    """
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-    
-
[docs]    def parse_arguments(self) -> None:
-        pass

-
-
[docs]    def run(self):
-        try:
-            self.cs.Cfg.print_supported_chipsets()
-            self.logger.log("")
-            self.cs.Cfg.print_platform_info()
-            self.cs.Cfg.print_pch_info()
-        except UnknownChipsetError as msg:
-            self.logger.log_error(msg)

-
-
-commands = {'platform': PlatformCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/cmos_cmd.html b/_modules/chipsec/utilcmd/cmos_cmd.html deleted file mode 100644 index 0d403fcb..00000000 --- a/_modules/chipsec/utilcmd/cmos_cmd.html +++ /dev/null @@ -1,222 +0,0 @@ - - - - - - - - chipsec.utilcmd.cmos_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.cmos_cmd

-# !/usr/bin/python
-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-
-# Contact information:
-# chipsec@intel.com
-
-"""
->>> chipsec_util cmos dump
->>> chipsec_util cmos readl|writel|readh|writeh <byte_offset> [byte_val]
-
-Examples:
-
->>> chipsec_util cmos dump
->>> chipsec_util cmos readl 0x0
->>> chipsec_util cmos writeh 0x0 0xCC
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.cmos import CMOS
-from chipsec.exceptions import CmosRuntimeError
-
-
-
[docs]class CMOSCommand(BaseCommand):
-
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-    
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-
-        parser_offset = ArgumentParser(add_help=False)
-        parser_offset.add_argument('offset', type=lambda x: int(x, 0), help="offsets read")
-
-        parser_val = ArgumentParser(add_help=False)
-        parser_val.add_argument('value', type=lambda x: int(x, 0), help="value written")
-
-        subparsers = parser.add_subparsers()
-
-        # dump
-        parser_dump = subparsers.add_parser('dump')
-        parser_dump.set_defaults(func=self.cmos_dump)
-        # readl
-        parser_readl = subparsers.add_parser('readl', parents=[parser_offset])
-        parser_readl.set_defaults(func=self.cmos_readl)
-        # writel
-        parser_writel = subparsers.add_parser('writel', parents=[parser_offset, parser_val])
-        parser_writel.set_defaults(func=self.cmos_writel)
-        # readh
-        parser_readh = subparsers.add_parser('readh', parents=[parser_offset])
-        parser_readh.set_defaults(func=self.cmos_readh)
-        # writeh
-        parser_writeh = subparsers.add_parser('writeh', parents=[parser_offset, parser_val])
-        parser_writeh.set_defaults(func=self.cmos_writeh)
-
-        parser.parse_args(self.argv, namespace=CMOSCommand)

-
-
[docs]    def set_up(self) -> None:
-        self._cmos = CMOS(self.cs)

-    
-
[docs]    def cmos_dump(self) -> None:
-        self.logger.log("[CHIPSEC] Dumping CMOS memory..")
-        self._cmos.dump()

-
-
[docs]    def cmos_readl(self) -> None:
-        val = self._cmos.read_cmos_low(self.offset)
-        self.logger.log(f'[CHIPSEC] CMOS low byte 0x{self.offset:X} = 0x{val:X}')

-
-
[docs]    def cmos_writel(self) -> None:
-        val = self._cmos.write_cmos_low(self.offset, self.value)
-        self.logger.log(f'[CHIPSEC] CMOS low byte 0x{self.offset:X} = 0x{self.value:X}')

-
-
[docs]    def cmos_readh(self) -> None:
-        val = self._cmos.read_cmos_high(self.offset)
-        self.logger.log(f'[CHIPSEC] CMOS high byte 0x{self.offset:X} = 0x{val:X}')

-
-
[docs]    def cmos_writeh(self) -> None:
-        self.logger.log(f'[CHIPSEC] Writing CMOS high byte 0x{self.offset:X} <- 0x{self.value:X}')
-        self._cmos.write_cmos_high(self.offset, self.value)

-
-commands = {'cmos': CMOSCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/config_cmd.html b/_modules/chipsec/utilcmd/config_cmd.html deleted file mode 100644 index 7caf81f8..00000000 --- a/_modules/chipsec/utilcmd/config_cmd.html +++ /dev/null @@ -1,275 +0,0 @@ - - - - - - - - chipsec.utilcmd.config_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.config_cmd

-# !/usr/bin/python
-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-
-# Contact information:
-# chipsec@intel.com
-
-"""
->>> chipsec_util config show [config] <name>
-
-Examples:
-
->>> chipsec_util config show ALL
->>> chipsec_util config show MMIO_BARS
->>> chipsec_util config show REGISTERS BC
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-from typing import Any, Dict
-
-
-
[docs]class CONFIGCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Config

-    
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-
-        subparsers = parser.add_subparsers()
-
-        # show
-        parser_show = subparsers.add_parser('show')
-        parser_show.add_argument('config', choices=['CONFIG_PCI', 'REGISTERS', 'MMIO_BARS', 'IO_BARS', 'MEMORY_RANGES', 'CONTROLS', 'BUS', 'LOCKS', 'ALL'])
-        parser_show.add_argument('name', type=str, nargs='*', help="Specific Name", default=[])
-        parser_show.set_defaults(func=self.show, config="ALL")
-
-        parser.parse_args(self.argv, namespace=self)

-
-
-
[docs]    def show(self) -> None:
-        if self.config == "ALL":
-            config = ['CONFIG_PCI', 'REGISTERS', 'MMIO_BARS', 'IO_BARS', 'MEMORY_RANGES', 'CONTROLS', 'BUS', 'LOCKS']
-        else:
-            config = [self.config]
-        for mconfig in config:
-            cfg = getattr(self.cs.Cfg, mconfig)
-            if not self.name or len(config) > 1:
-                self.name = sorted(cfg.keys())
-            self.logger.log(mconfig)
-            for name in self.name:
-                if mconfig == "REGISTERS":
-                    self.logger.log(f'\t{name} - {self.register_details(cfg[name])}')
-                elif mconfig == "CONFIG_PCI":
-                    self.logger.log(f'\t{name} - {self.pci_details(cfg[name])}')
-                elif mconfig == "MMIO_BARS":
-                    self.logger.log(f'\t{name} - {self.mmio_details(cfg[name])}')
-                elif mconfig == "IO_BARS":
-                    self.logger.log(f'\t{name} - {self.io_details(cfg[name])}')
-                elif mconfig == "MEMORY_RANGES":
-                    self.logger.log(f'\t{name} - {self.mem_details(cfg[name])}')
-                elif mconfig == "CONTROLS":
-                    self.logger.log(f'\t{name} - {self.control_details(cfg[name])}')
-                elif mconfig == "LOCKS":
-                    self.logger.log(f'\t{name} - {self.lock_details(cfg[name])}')
-                elif mconfig == "BUS":
-                    self.logger.log(f'\t{name} - {self.bus_details(cfg[name])}')

-
-
[docs]    def register_details(self, regi: Dict[str, Any]) -> str:
-        ret = ''
-        if regi['type'] == 'pcicfg' or regi['type'] == 'mmcfg':
-            if 'device' in regi.keys():
-                ret = f'device: {regi["device"]}, offset: {regi["offset"]}, size: {regi["size"]}'
-            else:
-                ret = f'bus: {regi["bus"]}, dev: {regi["dev"]}, func: {regi["fun"]}, offset: {regi["offset"]}, size: {regi["size"]}'
-        elif regi['type'] == 'mmio':
-            ret = f'bar: {regi["bar"]}, offset: {regi["offset"]}, size: {regi["size"]}'
-        elif regi['type'] == 'mm_msgbus':
-            ret = f'port: {regi["port"]}, offset: {regi["offset"]}, size: {regi["size"]}'
-        elif regi['type'] == 'io':
-            ret = f'port: {regi["port"]}, size: {regi["size"]}'
-        elif regi['type'] == 'iobar':
-            ret = f'bar: {regi["bar"]}, offset: {regi["offset"]}, size: {regi["size"]}'
-        elif regi['type'] == 'msr':
-            ret = f'msr: {regi["msr"]}, size: {regi["size"]}'
-        elif regi['type'] == 'R Byte':
-            ret = f'offset: {regi["offset"]}, size: {regi["size"]}'
-        elif regi['type'] == 'memory':
-            ret = f'access: {regi["access"]}, address: {regi["address"]}, offset: {regi["offset"]}, size: {regi["size"]}'
-        if 'FIELDS' in regi.keys():
-            for key in regi['FIELDS'].keys():
-                extension = (f'\n\t\t{key} - bit {regi["FIELDS"][key]["bit"]}:{int(regi["FIELDS"][key]["size"]) + int(regi["FIELDS"][key]["bit"]) - 1}')
-                ret += extension
-        return ret

-
-
[docs]    def pci_details(self, regi: Dict[str, Any]) -> str:
-        ret = f'bus: {regi["bus"]}, dev: {regi["dev"]}, func: {regi["fun"]}, vid: {regi["vid"]}, did: {regi["did"] if "did" in regi.keys() else None}'
-        return ret

-
-
[docs]    def mmio_details(self, regi: Dict[str, Any]) -> str:
-        regi_size = regi['size'] if 'size' in regi.keys() else None
-        fixed_addr = regi['fixed_address'] if 'fixed_address' in regi.keys() else None
-        if 'register' in regi.keys():
-            ret = f'register: {regi["register"]}, base_field: {regi["base_field"]}, size: {regi_size}, fixed_address: {fixed_addr}'
-        else:
-            ret = f'bus: {regi["bus"]}, dev: {regi["dev"]}, func: {regi["fun"]}, mask: {regi["mask"]}, width: {regi["width"]}, size: {regi_size}, fixed_address: {fixed_addr}'
-        return ret

-
-
[docs]    def io_details(self, regi: Dict[str, Any]) -> str:
-        regi_size = regi['size'] if 'size' in regi.keys() else None
-        fixed_addr = regi['fixed_address'] if 'fixed_address' in regi.keys() else None
-        if 'register' in regi.keys():
-            ret = f'register: {regi["register"]}, base_field: {regi["base_field"]}, size: {regi_size}, fixed_address: {fixed_addr}'
-        else:
-            ret = f'bus: {regi["bus"]}, dev: {regi["dev"]}, func: {regi["fun"]}, reg: {regi["reg"]}, mask: {regi["mask"]}, size: {regi_size}, fixed_address: {fixed_addr}'
-        return ret

-
-
[docs]    def mem_details(self, regi: Dict[str, Any]) -> str:
-        ret = f'access: {regi["access"]}, address: {regi["address"]}, size: {regi["size"]}'
-        return ret

-
-
[docs]    def control_details(self, regi: Dict[str, Any]) -> str:
-        ret = f'register: {regi["register"]}, field: {regi["field"]}'
-        return ret

-
-
[docs]    def lock_details(self, regi: Dict[str, Any]) -> str:
-        ret = f'register: {regi["register"]}, field: {regi["field"]}, value: {regi["value"]}'
-        return ret

-
-
[docs]    def bus_details(self, regi: str) -> str:
-        ret = f'bus: {regi}'
-        return ret

-
-
-commands = {'config': CONFIGCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/cpu_cmd.html b/_modules/chipsec/utilcmd/cpu_cmd.html deleted file mode 100644 index 26a7ebde..00000000 --- a/_modules/chipsec/utilcmd/cpu_cmd.html +++ /dev/null @@ -1,291 +0,0 @@ - - - - - - - - chipsec.utilcmd.cpu_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.cpu_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util cpu info
->>> chipsec_util cpu cr <thread> <cr_number> [value]
->>> chipsec_util cpu cpuid <eax> [ecx]
->>> chipsec_util cpu pt [paging_base_cr3]
->>> chipsec_util cpu topology
-
-Examples:
-
->>> chipsec_util cpu info
->>> chipsec_util cpu cr 0 0
->>> chipsec_util cpu cr 0 4 0x0
->>> chipsec_util cpu cpuid 0x40000000
->>> chipsec_util cpu pt
->>> chipsec_util cpu topology
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-from typing import Dict, List, Optional, Union
-
-# ###################################################################
-#
-# CPU utility
-#
-# ###################################################################
-
-
-
[docs]class CPUCommand(BaseCommand):
-    
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_info = subparsers.add_parser('info')
-        parser_cr = subparsers.add_parser('cr')
-        parser_cpuid = subparsers.add_parser('cpuid')
-        parser_pt = subparsers.add_parser('pt')
-        parser_topology = subparsers.add_parser('topology')
-        parser_info.set_defaults(func=self.cpu_info)
-        parser_cr.set_defaults(func=self.cpu_cr)
-        parser_cpuid.set_defaults(func=self.cpu_cpuid)
-        parser_pt.set_defaults(func=self.cpu_pt)
-        parser_topology.set_defaults(func=self.cpu_topology)
-        parser_cr.add_argument('thread', type=int, nargs='?', default=None)
-        parser_cr.add_argument('cr_number', type=int, nargs='?', default=None)
-        parser_cr.add_argument('value', type=lambda x: int(x, 0), nargs='?', default=None)
-        parser_cpuid.add_argument('eax', type=lambda x: int(x, 0))
-        parser_cpuid.add_argument('ecx', type=lambda x: int(x, 0), nargs='?', default=0)
-        parser_pt.add_argument('cr3', type=lambda x: int(x, 0), nargs='?', default=None)
-
-        parser.parse_args(self.argv, namespace=CPUCommand)

-
-
[docs]    def cpu_info(self) -> None:
-        self.logger.log("[CHIPSEC] CPU information:")
-        ht = self.cs.cpu.is_HT_active()
-        threads_per_core = self.cs.cpu.get_number_logical_processor_per_core()
-        threads_per_pkg = self.cs.cpu.get_number_logical_processor_per_package()
-        cores_per_pkg = self.cs.cpu.get_number_physical_processor_per_package()
-        self.logger.log(f'          Hyper-Threading         : {"Enabled" if ht else "Disabled"}')
-        self.logger.log(f'          CPU cores per package   : {cores_per_pkg:d}')
-        self.logger.log(f'          CPU threads per core    : {threads_per_core:d}')
-        self.logger.log(f'          CPU threads per package : {threads_per_pkg:d}')
-        try:
-            threads_count = self.cs.cpu.get_number_threads_from_APIC_table()
-            sockets_count = self.cs.cpu.get_number_sockets_from_APIC_table()
-            self.logger.log(f'          Number of sockets       : {sockets_count:d}')
-            self.logger.log(f'          Number of CPU threads   : {threads_count:d}')
-        except Exception:
-            pass

-
-
[docs]    def cpu_topology(self) -> Dict[str, Dict[int, List[int]]]:
-        self.logger.log("[CHIPSEC] CPU information:")
-        ht = self.cs.cpu.is_HT_active()
-        threads_per_core = self.cs.cpu.get_number_logical_processor_per_core()
-        threads_per_pkg = self.cs.cpu.get_number_logical_processor_per_package()
-        cores_per_pkg = self.cs.cpu.get_number_physical_processor_per_package()
-        num_threads = self.cs.helper.get_threads_count()
-        self.logger.log(f'          Hyper-Threading         : {"Enabled" if ht else "Disabled"}')
-        self.logger.log(f'          CPU cores per package   : {cores_per_pkg:d}')
-        self.logger.log(f'          CPU threads per core    : {threads_per_core:d}')
-        self.logger.log(f'          CPU threads per package : {threads_per_pkg:d}')
-        self.logger.log(f'          Total threads           : {num_threads:d}')
-        topology = self.cs.cpu.get_cpu_topology()
-        self.logger.log("          Packages:")
-        for p in topology['packages']:
-            self.logger.log(f'              {p:d}: {topology["packages"][p]}')
-        self.logger.log("          Cores:")
-        for c in topology['cores']:
-            self.logger.log(f'              {c:d}: {topology["cores"][c]}')
-
-        return topology

-
-
[docs]    def cpu_cr(self) -> Optional[Union[bool, int]]:
-        if self.value is not None:
-            self.logger.log(f'[CHIPSEC] CPU{self.thread:d}: write CR{self.cr_number:d} <- 0x{self.value:08X}')
-            self.cs.cpu.write_cr(self.thread, self.cr_number, self.value)
-            return True
-        elif self.cr_number is not None:
-            value = self.cs.cpu.read_cr(self.thread, self.cr_number)
-            self.logger.log(f'[CHIPSEC] CPU{self.thread:d}: read CR{self.cr_number:d} -> 0x{value:08X}')
-            return value
-        else:
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                cr0 = self.cs.cpu.read_cr(tid, 0)
-                cr2 = self.cs.cpu.read_cr(tid, 2)
-                cr3 = self.cs.cpu.read_cr(tid, 3)
-                cr4 = self.cs.cpu.read_cr(tid, 4)
-                cr8 = self.cs.cpu.read_cr(tid, 8)
-                self.logger.log(f'[CHIPSEC][cpu{tid:d}] x86 Control Registers:')
-                self.logger.log(f'  CR0: 0x{cr0:016X}')
-                self.logger.log(f'  CR2: 0x{cr2:016X}')
-                self.logger.log(f'  CR3: 0x{cr3:016X}')
-                self.logger.log(f'  CR4: 0x{cr4:016X}')
-                self.logger.log(f'  CR8: 0x{cr8:016X}')

-
-
[docs]    def cpu_cpuid(self) -> None:
-        self.logger.log(f'[CHIPSEC] CPUID < EAX: 0x{self.eax:08X}')
-        self.logger.log(f'[CHIPSEC]         ECX: 0x{self.ecx:08X}')
-
-        (_eax, _ebx, _ecx, _edx) = self.cs.cpu.cpuid(self.eax, self.ecx)
-
-        self.logger.log("[CHIPSEC] CPUID > EAX: 0x%08X" % _eax)
-        self.logger.log("[CHIPSEC]         EBX: 0x%08X" % _ebx)
-        self.logger.log("[CHIPSEC]         ECX: 0x%08X" % _ecx)
-        self.logger.log("[CHIPSEC]         EDX: 0x%08X" % _edx)

-
-
[docs]    def cpu_pt(self) -> None:
-        if self.cr3 is not None:
-            pt_fname = f'pt_{self.cr3:08X}'
-            self.logger.log(f'[CHIPSEC] paging physical base (CR3): 0x{self.cr3:016X}')
-            self.logger.log(f'[CHIPSEC] dumping paging hierarchy to \'{pt_fname}\'...')
-            self.cs.cpu.dump_page_tables(self.cr3, pt_fname)
-        else:
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                cr3 = self.cs.cpu.read_cr(tid, 3)
-                pt_fname = f'cpu{tid:d}_pt_{cr3:08X}'
-                self.logger.log(f'[CHIPSEC][cpu{tid:d}] paging physical base (CR3): 0x{cr3:016X}')
-                self.logger.log(f'[CHIPSEC][cpu{tid:d}] dumping paging hierarchy to \'{pt_fname}\'...')
-                self.cs.cpu.dump_page_tables(cr3, pt_fname)

-
-
-commands = {'cpu': CPUCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/decode_cmd.html b/_modules/chipsec/utilcmd/decode_cmd.html deleted file mode 100644 index e516012f..00000000 --- a/_modules/chipsec/utilcmd/decode_cmd.html +++ /dev/null @@ -1,253 +0,0 @@ - - - - - - - - chipsec.utilcmd.decode_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.decode_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-CHIPSEC can parse an image file containing data from the SPI flash (such as the result of chipsec_util spi dump). This can be critical in forensic analysis.
-
-This will create multiple log files, binaries, and directories that correspond to the sections, firmware volumes, files, variables, etc. stored in the SPI flash.
-
-Usage:
-
-    >>> chipsec_util decode <rom> [fw_type]
-
-For a list of fw types run:
-
-    >>> chipsec_util decode types
-
-Examples:
-
-    >>> chipsec_util decode spi.bin vss
-
-.. note::
-    - It may be necessary to try various options for fw_type in order to correctly parse NVRAM variables.
-      Currently, CHIPSEC does not autodetect the correct format.
-      If the nvram directory does not appear and the list of nvram variables is empty, try again with another type.
-
-"""
-
-import os
-from argparse import ArgumentParser
-
-from chipsec.file import read_file, write_file
-from chipsec.command import BaseCommand, toLoad
-
-from chipsec.hal.spi import FLASH_DESCRIPTOR, BIOS
-from chipsec.hal.spi_descriptor import get_spi_flash_descriptor, get_spi_regions, parse_spi_flash_descriptor
-from chipsec.hal.spi_uefi import decode_uefi_region
-from chipsec.hal.uefi import uefi_platform
-
-
-
[docs]class DecodeCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Nil

-    
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        parser.add_argument('_rom', metavar='<rom>', help='file to decode')
-        parser.add_argument('_fwtype', metavar='fw_type', nargs='?', help='firmware type', default=None)
-        parser.parse_args(self.argv, namespace=self)
-        
-        if self._rom.lower() == 'types':
-            self.func = self.decode_types
-        else:
-            self.func = self.decode_rom

-
-
-
[docs]    def decode_types(self) -> None:
-        self.logger.log(f'\n<fw_type> should be in [ {" | ".join([f"{t}" for t in uefi_platform.fw_types])} ]\n')

-
-
[docs]    def decode_rom(self) -> bool:
-        self.logger.log(f'[CHIPSEC] Decoding SPI ROM image from a file \'{self._rom}\'')
-        f = read_file(self._rom)
-        if not f:
-            return False
-        (fd_off, fd) = get_spi_flash_descriptor(f)
-        if (-1 == fd_off) or (fd is None):
-            self.logger.log_error(f'Could not find SPI Flash descriptor in the binary \'{self._rom}\'')
-            self.logger.log_information("To decode an image without a flash decriptor try chipsec_util uefi decode")
-            return False
-
-        self.logger.log(f'[CHIPSEC] Found SPI Flash descriptor at offset 0x{fd_off:X} in the binary \'{self._rom}\'')
-        rom = f[fd_off:]
-
-        # Decoding SPI Flash Regions
-        flregs = get_spi_regions(fd)
-        if flregs is None:
-            self.logger.log_error("SPI Flash descriptor region is not valid")
-            self.logger.log_information("To decode an image with an invalid flash decriptor try chipsec_util uefi decode")
-            return False
-
-        _orig_logname = self.logger.LOG_FILE_NAME
-
-        pth = os.path.join(self.cs.os_helper.getcwd(), self._rom + ".dir")
-        if not os.path.exists(pth):
-            os.makedirs(pth)
-
-        for r in flregs:
-            idx = r[0]
-            name = r[1]
-            base = r[3]
-            limit = r[4]
-            notused = r[5]
-            if not notused:
-                region_data = rom[base:limit + 1]
-                fname = os.path.join(pth, f'{idx:d}_{base:04X}-{limit:04X}_{name}.bin')
-                write_file(fname, region_data)
-                if FLASH_DESCRIPTOR == idx:
-                    # Decoding Flash Descriptor
-                    self.logger.set_log_file(os.path.join(pth, fname + '.log'), False)
-                    parse_spi_flash_descriptor(self.cs, region_data)
-                elif BIOS == idx:
-                    # Decoding EFI Firmware Volumes
-                    self.logger.set_log_file(os.path.join(pth, fname + '.log'), False)
-                    decode_uefi_region(pth, fname, self._fwtype)
-
-        self.logger.set_log_file(_orig_logname)
-        return True

-
-
-commands = {"decode": DecodeCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/deltas_cmd.html b/_modules/chipsec/utilcmd/deltas_cmd.html deleted file mode 100644 index f61fa4b3..00000000 --- a/_modules/chipsec/utilcmd/deltas_cmd.html +++ /dev/null @@ -1,210 +0,0 @@ - - - - - - - - chipsec.utilcmd.deltas_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.deltas_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2018-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util deltas <previous> <current> [out-format] [out-name]
-
-out-format - JSON | XML
-out-name - Output file name
-
-Example:
->>> chipsec_util deltas run1.json run2.json
-
-"""
-
-from time import time
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-import chipsec.result_deltas
-from chipsec.options import Options
-
-
[docs]class DeltasCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Nil

-
-
[docs]    def parse_arguments(self) -> None:
-        options = Options()
-        try:
-            default_format = options.get_section_data('Util_Config','log_output_deltas_format')
-            default_out_file =  options.get_section_data('Util_Config','deltas_output_file')
-        except Exception:
-            default_format = 'JSON'
-            default_out_file = 'log_output_deltas.json'
-        parser = ArgumentParser(usage=__doc__)
-        parser.add_argument('_prev_log', metavar='<previous>', help='previous log file')
-        parser.add_argument('_cur_log', metavar='<current>', help='current log file')
-        parser.add_argument('_out_format', nargs='?', choices=['JSON', 'XML'], default=default_format, help='output format')
-        parser.add_argument('_out_name', nargs='?', default=default_out_file, help='output filename')
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def run(self) -> None:
-        start_time = time()
-
-        # Read files and determine deltas
-        previous = chipsec.result_deltas.get_json_results(self._prev_log)
-        current = chipsec.result_deltas.get_json_results(self._cur_log)
-        if previous is None or current is None:
-            self.logger.log_error('Unable to process JSON log files.')
-            return
-        deltas = chipsec.result_deltas.compute_result_deltas(previous, current)
-
-        # Generate output file here...
-        if self._out_name:
-            if self._out_format == 'JSON':
-                chipsec.result_deltas.log_deltas_json(deltas, self._out_name)
-            elif self._out_format.upper() == 'XML':
-                chipsec.result_deltas.log_deltas_xml(deltas, self._out_name)
-            else:
-                self.logger.log_error(f'Output log format not supported: {self._out_format}')
-
-        # Display the results
-        chipsec.result_deltas.display_deltas(deltas, True, start_time)
-
-        return

-
-
-commands = {'deltas': DeltasCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/desc_cmd.html b/_modules/chipsec/utilcmd/desc_cmd.html deleted file mode 100644 index 8a56b9a6..00000000 --- a/_modules/chipsec/utilcmd/desc_cmd.html +++ /dev/null @@ -1,260 +0,0 @@ - - - - - - - - chipsec.utilcmd.desc_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.desc_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-The idt, gdt and ldt commands print the IDT, GDT and LDT, respectively.
-
-IDT command:
-
->>> chipsec_util idt [cpu_id]
-
-Examples:
-
->>> chipsec_util idt 0
->>> chipsec_util idt
-
-GDT command:
-
->>> chipsec_util gdt [cpu_id]
-
-Examples:
-
->>> chipsec_util gdt 0
->>> chipsec_util gdt
-
-LDT command:
-
->>> chipsec_util ldt [cpu_id]
-
-Examples:
-
->>> chipsec_util ldt 0
->>> chipsec_util ldt
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-
-# CPU descriptor tables
-
-
-
[docs]class IDTCommand(BaseCommand):
-    """
-    >>> chipsec_util idt [cpu_id]
-
-    Examples:
-
-    >>> chipsec_util idt 0
-    >>> chipsec_util idt
-    """
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-    
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=IDTCommand.__doc__)
-        parser.add_argument('_thread', metavar='thread', type=lambda x: int(x, 0), nargs='?', default=None, help="thread")
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def run(self) -> None:
-        num_threads = self.cs.msr.get_cpu_thread_count()
-        if self._thread and self._thread < num_threads:
-            self.logger.log(f'[CHIPSEC] Dumping IDT of CPU thread {self._thread:d}')
-            self.cs.msr.IDT(self._thread, 4)
-        else:
-            self.logger.log(f'[CHIPSEC] Dumping IDT of {num_threads:d} CPU threads')
-            self.cs.msr.IDT_all(4)

-
-
-
[docs]class GDTCommand(BaseCommand):
-    """
-    >>> chipsec_util gdt [cpu_id]
-
-    Examples:
-
-    >>> chipsec_util gdt 0
-    >>> chipsec_util gdt
-    """
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-    
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=GDTCommand.__doc__)
-        parser.add_argument('_thread', metavar='thread', type=lambda x: int(x, 0), nargs='?', default=None, help="thread")
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def run(self) -> None:
-        num_threads = self.cs.msr.get_cpu_thread_count()
-        if self._thread and self._thread < num_threads:
-            self.logger.log(f'[CHIPSEC] Dumping IDT of CPU thread {self._thread:d}')
-            self.cs.msr.GDT(self._thread, 4)
-        else:
-            self.logger.log(f'[CHIPSEC] Dumping IDT of {num_threads:d} CPU threads')
-            self.cs.msr.GDT_all(4)

-
-
-
[docs]class LDTCommand(BaseCommand):
-    """
-    >>> chipsec_util ldt [cpu_id]
-
-    Examples:
-
-    >>> chipsec_util ldt 0
-    >>> chipsec_util ldt
-    """
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Nil

-    
-
[docs]    def parse_arguments(self) -> None:
-        return

-
-
[docs]    def run(self) -> None:
-        self.logger.log_error("[CHIPSEC] ldt not implemented")

-
-
-commands = {'idt': IDTCommand, 'gdt': GDTCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/ec_cmd.html b/_modules/chipsec/utilcmd/ec_cmd.html deleted file mode 100644 index 4ddcd77a..00000000 --- a/_modules/chipsec/utilcmd/ec_cmd.html +++ /dev/null @@ -1,253 +0,0 @@ - - - - - - - - chipsec.utilcmd.ec_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.ec_cmd

-# !/usr/bin/python
-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util ec dump    [<size>]
->>> chipsec_util ec command <command>
->>> chipsec_util ec read    <offset> [<size>]
->>> chipsec_util ec write   <offset> <byte_val>
->>> chipsec_util ec index   [<offset>]
-
-Examples:
-
->>> chipsec_util ec dump
->>> chipsec_util ec command 0x001
->>> chipsec_util ec read    0x2F
->>> chipsec_util ec write   0x2F 0x00
->>> chipsec_util ec index
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-
-from chipsec.logger import print_buffer_bytes
-from chipsec.hal.ec import EC
-
-
-# Embedded Controller
-
[docs]class ECCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        if hasattr(self, 'func'):
-            return toLoad.Driver
-        return toLoad.Nil

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-
-        parser_offset = ArgumentParser(add_help=False)
-        parser_offset.add_argument('offset', type=lambda x: int(x, 0), nargs='?', default=0, help="offset")
-
-        parser_sz = ArgumentParser(add_help=False)
-        parser_sz.add_argument("size", type=lambda sz: int(sz, 0), nargs='?', help="size")
-
-        subparsers = parser.add_subparsers()
-
-        parser_command = subparsers.add_parser('command')
-        parser_command.add_argument("cmd", type=lambda sz: int(sz, 0), help="EC command to issue")
-        parser_command.set_defaults(func=self.command)
-
-        parser_dump = subparsers.add_parser('dump', parents=[parser_sz])
-        parser_dump.set_defaults(func=self.dump, size=0x160)
-
-        parser_read = subparsers.add_parser('read', parents=[parser_offset])
-        parser_read.set_defaults(func=self.read, size=None)
-
-        parser_write = subparsers.add_parser('write', parents=[parser_offset])
-        parser_write.add_argument("wval", type=lambda sz: int(sz, 0), help="byte value to write into EC memory")
-        parser_write.set_defaults(func=self.write)
-
-        parser_index = subparsers.add_parser('index', parents=[parser_offset])
-        parser_index.set_defaults(func=self.index)
-
-        parser.parse_args(self.argv, namespace=self)

-        
-
[docs]    def set_up(self) -> None:
-        self._ec = EC(self.cs)

-
-
[docs]    def dump(self) -> None:
-        self.logger.log("[CHIPSEC] EC dump")
-
-        buf = self._ec.read_range(0, self.size)
-        print_buffer_bytes(buf)

-
-
[docs]    def command(self) -> None:
-        self.logger.log(f'[CHIPSEC] Sending EC command 0x{self.cmd:X}')
-
-        self._ec.write_command(self.cmd)

-
-
[docs]    def read(self) -> None:
-        if self.size:
-            buf = self._ec.read_range(self.offset, self.size)
-            self.logger.log(f'[CHIPSEC] EC memory read: offset 0x{self.offset:X} size 0x{self.size:X}')
-            print_buffer_bytes(buf)
-        else:
-            val = self._ec.read_memory(
-                self.offset) if self.offset < 0x100 else self._ec.read_memory_extended(self.offset)
-            self.logger.log(f'[CHIPSEC] EC memory read: offset 0x{self.start_offset:X} = 0x{val:X}')

-
-
[docs]    def write(self) -> None:
-        self.logger.log(f'[CHIPSEC] EC memory write: offset 0x{self.offset:X} = 0x{self.wval:X}')
-
-        if self.offset < 0x100:
-            self._ec.write_memory(self.offset, self.wval)
-        else:
-            self._ec.write_memory_extended(self.offset, self.wval)

-
-
[docs]    def index(self) -> None:
-
-        if self.offset:
-            val = self._ec.read_idx(self.offset)
-            self.logger.log(f'[CHIPSEC] EC index I/O: reading memory offset 0x{self.offset:X}: 0x{val:X}')
-        else:
-            self.logger.log("[CHIPSEC] EC index I/O: dumping memory...")
-            mem = [self._ec.read_idx(off) for off in range(0x10000)]
-            print_buffer_bytes(mem)

-
-
-
-commands = {'ec': ECCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/igd_cmd.html b/_modules/chipsec/utilcmd/igd_cmd.html deleted file mode 100644 index 8327681e..00000000 --- a/_modules/chipsec/utilcmd/igd_cmd.html +++ /dev/null @@ -1,232 +0,0 @@ - - - - - - - - chipsec.utilcmd.igd_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.igd_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The igd command allows memory read/write operations using igd dma.
-
->>> chipsec_util igd
->>> chipsec_util igd dmaread <address> [width] [file_name]
->>> chipsec_util igd dmawrite <address> <width> <value|file_name>
-
-Examples:
-
->>> chipsec_util igd dmaread 0x20000000 4
->>> chipsec_util igd dmawrite 0x2217F1000 0x4 deadbeef
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.logger import print_buffer_bytes
-from argparse import ArgumentParser
-from chipsec.file import read_file, write_file
-from chipsec.hal import igd
-import os
-
-
-# Port I/O
-
[docs]class IgdCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util igd', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_read = subparsers.add_parser('dmaread')
-        parser_read.add_argument('address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_read.add_argument('width', type=lambda x: int(x, 16), nargs='?', default=0x100, help='Width of read (hex)')
-        parser_read.add_argument('file_name', type=str, nargs='?', default='', help='File name to save data')
-        parser_read.set_defaults(func=self.read_dma)
-
-        parser_write = subparsers.add_parser('dmawrite')
-        parser_write.add_argument('address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_write.add_argument('size', type=lambda x: int(x, 16), help='Size of data to write (hex)')
-        parser_write.add_argument('file_value', type=str, help='Data to write [Value|<file_name>]')
-        parser_write.set_defaults(func=self.write_dma)
-
-        parser.parse_args(self.argv, namespace=self)

-        
-
-
[docs]    def read_dma(self) -> None:
-        self.logger.log(f'[CHIPSEC] Reading buffer from memory: PA = 0x{self.address:016X}, len = 0x{self.width:X}..')
-        buffer = self.cs.igd.gfx_aperture_dma_read_write(self.address, self.width)
-        if self.file_name:
-            write_file(self.file_name, buffer)
-            self.logger.log(f'[CHIPSEC] Written 0x{len(buffer):X} bytes to \'{self.file_name}\'')
-        else:
-            print_buffer_bytes(buffer)

-
-
[docs]    def write_dma(self) -> None:
-        if not os.path.exists(self.file_value):
-            buffer_value = self.file_value.lower().strip('0x')
-            try:
-                buffer = bytearray.fromhex(buffer_value)
-            except ValueError as e:
-                self.logger.log_error(f'Incorrect <value> specified: \'{self.file_value}\'')
-                self.logger.log_error(str(e))
-                return
-            self.logger.log(f'[CHIPSEC] Read 0x{len(buffer):X} hex bytes from command-line: \'{buffer_value}\'')
-        else:
-            buffer = read_file(self.file_value)
-            self.logger.log(f'[CHIPSEC] Read 0x{len(buffer):X} bytes from file \'{self.file_value}\'')
-
-        if len(buffer) < self.size:
-            self.logger.log_error(f'Number of bytes read (0x{len(buffer):X}) is less than the specified <length> (0x{self.size:X})')
-            return
-
-        self.logger.log(f'[CHIPSEC] Writing buffer to memory: PA = 0x{self.address:016X}, len = 0x{self.size:X}..')
-        self.cs.igd.gfx_aperture_dma_read_write(self.address, self.size, buffer)

-
-
[docs]    def run(self) -> None:
-
-        if not self.cs.igd.is_device_enabled():
-            self.logger.log('[CHIPSEC] Looks like internal graphics device is not enabled')
-            return
-
-        self.func()

-
-
-commands = {'igd': IgdCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/interrupts_cmd.html b/_modules/chipsec/utilcmd/interrupts_cmd.html deleted file mode 100644 index a4da125d..00000000 --- a/_modules/chipsec/utilcmd/interrupts_cmd.html +++ /dev/null @@ -1,311 +0,0 @@ - - - - - - - - chipsec.utilcmd.interrupts_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.interrupts_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-SMI command:
-
->>> chipsec_util smi count
->>> chipsec_util smi send <thread_id> <SMI_code> <SMI_data> [RAX] [RBX] [RCX] [RDX] [RSI] [RDI]
->>> chipsec_util smi smmc <RT_code_start> <RT_code_end> <GUID> <payload_loc> <payload_file|payload_string> [port]
-
-Examples:
-
->>> chipsec_util smi count
->>> chipsec_util smi send 0x0 0xDE 0x0
->>> chipsec_util smi send 0x0 0xDE 0x0 0xAAAAAAAAAAAAAAAA ..
->>> chipsec_util smi smmc 0x79dfe000 0x79efdfff ed32d533-99e6-4209-9cc02d72cdd998a7 0x79dfaaaa payload.bin
-
-NMI command:
-
->>> chipsec_util nmi
-
-Examples:
-
->>> chipsec_util nmi
-"""
-
-import os
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.interrupts import Interrupts
-from chipsec.hal.uefi_common import EFI_ERROR_STR
-from argparse import ArgumentParser
-
-
-# ###################################################################
-#
-# CPU Interrupts
-#
-# ###################################################################
-
-
-
[docs]class SMICommand(BaseCommand):
-    """
-    >>> chipsec_util smi count
-    >>> chipsec_util smi send <thread_id> <SMI_code> <SMI_data> [RAX] [RBX] [RCX] [RDX] [RSI] [RDI]
-    >>> chipsec_util smi smmc <RT_code_start> <RT_code_end> <GUID> <payload_loc> <payload_file|payload_string> [port]
-
-    Examples:
-
-    >>> chipsec_util smi count
-    >>> chipsec_util smi send 0x0 0xDE 0x0
-    >>> chipsec_util smi send 0x0 0xDE 0x0 0xAAAAAAAAAAAAAAAA ..
-    >>> chipsec_util smi smmc 0x79dfe000 0x79efdfff ed32d533-99e6-4209-9cc02d72cdd998a7 0x79dfaaaa payload.bin
-    """
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util smi', usage=SMICommand.__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_count = subparsers.add_parser('count')
-        parser_count.set_defaults(func=self.smi_count)
-
-        parser_send = subparsers.add_parser('send')
-        parser_send.add_argument('thread_id', type=lambda x: int(x, 16), help='Thread ID (hex)')
-        parser_send.add_argument('SMI_code_port_value', type=lambda x: int(x, 16), help='SMI Code (hex)')
-        parser_send.add_argument('SMI_data_port_value', type=lambda x: int(x, 16), help='SMI Data (hex)')
-        parser_send.add_argument('_rax', type=lambda x: int(x, 16), nargs='?', default=None, help='RAX (hex)')
-        parser_send.add_argument('_rbx', type=lambda x: int(x, 16), nargs='?', default=0, help='RBX (hex) [default=0]')
-        parser_send.add_argument('_rcx', type=lambda x: int(x, 16), nargs='?', default=0, help='RCX (hex) [default=0]')
-        parser_send.add_argument('_rdx', type=lambda x: int(x, 16), nargs='?', default=0, help='RDX (hex) [default=0]')
-        parser_send.add_argument('_rsi', type=lambda x: int(x, 16), nargs='?', default=0, help='RSI (hex) [default=0]')
-        parser_send.add_argument('_rdi', type=lambda x: int(x, 16), nargs='?', default=0, help='RDI (hex) [default=0]')
-        parser_send.set_defaults(func=self.smi_send)
-
-        parser_smmc = subparsers.add_parser('smmc')
-        parser_smmc.add_argument('RTC_start', type=lambda x: int(x, 16), help='RTC Code Start (hex)')
-        parser_smmc.add_argument('RTC_end', type=lambda x: int(x, 16), help='RT Code End (hex)')
-        parser_smmc.add_argument('guid', type=str, help='GUID')
-        parser_smmc.add_argument('payload_loc', type=lambda x: int(x, 16), help='Payload Location (hex)')
-        parser_smmc.add_argument('payload', type=str, help='Payload')
-        parser_smmc.add_argument('port', type=lambda x: int(x, 16), nargs='?', default=0x0, help='Port (hex) [default=0]')
-        parser_smmc.set_defaults(func=self.smi_smmc)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def smi_count(self) -> None:
-        self.logger.log("[CHIPSEC] SMI count:")
-        for tid in range(self.cs.msr.get_cpu_thread_count()):
-            smi_cnt = self.cs.read_register_field('MSR_SMI_COUNT', 'Count', cpu_thread=tid)
-            self.logger.log(f'  CPU{tid:d}: {smi_cnt:d}')

-
-
[docs]    def smi_smmc(self) -> None:
-        if os.path.isfile(self.payload):
-            with open(self.payload, 'rb') as f:
-                self.payload = f.read()
-
-        self.logger.log(f'Searching for \'smmc\' in range 0x{self.RTC_start:x}-0x{self.RTC_end:x}')
-        # scan for SMM_CORE_PRIVATE_DATA smmc signature
-        smmc_loc = self.interrupts.find_smmc(self.RTC_start, self.RTC_end)
-        if (smmc_loc == 0):
-            self.logger.log(" Couldn't find smmc signature")
-            return
-        self.logger.log(f'Found \'smmc\' structure at 0x{smmc_loc:x}')
-
-        ReturnStatus = self.interrupts.send_smmc_SMI(smmc_loc, self.guid, self.payload, self.payload_loc, CommandPort=self.port)
-        # TODO Translate ReturnStatus to EFI_STATUS enum
-        self.logger.log(f'ReturnStatus: 0x{ReturnStatus:x} ({EFI_ERROR_STR(ReturnStatus)})')

-
-
[docs]    def smi_send(self) -> None:
-        self.logger.log(f'[CHIPSEC] Sending SW SMI (code: 0x{self.SMI_code_port_value:02X}, data: 0x{self.SMI_data_port_value:02X})..')
-        if self._rax is None:
-            self.interrupts.send_SMI_APMC(self.SMI_code_port_value, self.SMI_data_port_value)
-        else:
-            self.logger.log(f'          RAX: 0x{self._rax:016X} (AX will be overridden with values of SW SMI ports B2/B3)')
-            self.logger.log(f'          RBX: 0x{self._rbx:016X}')
-            self.logger.log(f'          RCX: 0x{self._rcx:016X}')
-            self.logger.log(f'          RDX: 0x{self._rdx:016X} (DX will be overridden with 0x00B2)')
-            self.logger.log(f'          RSI: 0x{self._rsi:016X}')
-            self.logger.log(f'          RDI: 0x{self._rdi:016X}')
-            ret = self.interrupts.send_SW_SMI(self.thread_id, self.SMI_code_port_value, self.SMI_data_port_value, self._rax, self._rbx, self._rcx, self._rdx, self._rsi, self._rdi)
-            if not ret is None:
-                self.logger.log("Return values")
-                self.logger.log(f'          RAX: {ret[1]:16X}')
-                self.logger.log(f'          RBX: {ret[2]:16X}')
-                self.logger.log(f'          RCX: {ret[3]:16X}')
-                self.logger.log(f'          RDX: {ret[4]:16X}')
-                self.logger.log(f'          RSI: {ret[5]:16X}')
-                self.logger.log(f'          RDI: {ret[6]:16X}')

-
-
[docs]    def run(self) -> None:
-        try:
-            self.interrupts = Interrupts(self.cs)
-        except RuntimeError as msg:
-            self.logger.log(msg)
-            return
-
-        self.func()

-
-
-
[docs]class NMICommand(BaseCommand):
-    """
-    >>> chipsec_util nmi
-
-    Examples:
-
-    >>> chipsec_util nmi
-    """
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        return

-
-
[docs]    def run(self) -> None:
-        try:
-            interrupts = Interrupts(self.cs)
-        except RuntimeError as msg:
-            self.logger.log(msg)
-            return
-
-        self.logger.log("[CHIPSEC] Sending NMI#...")
-        interrupts.send_NMI()

-
-
-commands = {'smi': SMICommand, 'nmi': NMICommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/io_cmd.html b/_modules/chipsec/utilcmd/io_cmd.html deleted file mode 100644 index 8d42a982..00000000 --- a/_modules/chipsec/utilcmd/io_cmd.html +++ /dev/null @@ -1,230 +0,0 @@ - - - - - - - - chipsec.utilcmd.io_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.io_cmd

-# !/usr/bin/python
-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The io command allows direct access to read and write I/O port space.
-
->>> chipsec_util io list
->>> chipsec_util io read  <io_port> <width>
->>> chipsec_util io write <io_port> <width> <value>
-
-Examples:
-
->>> chipsec_util io list
->>> chipsec_util io read 0x61 1
->>> chipsec_util io write 0x430 1 0x0
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.hal import iobar
-from chipsec.command import BaseCommand, toLoad
-from chipsec.exceptions import IOBARRuntimeError
-
-
-
[docs]class PortIOCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util io', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        # list
-        parser_dump = subparsers.add_parser('list')
-        parser_dump.set_defaults(func=self.io_list)
-
-        # read
-        parser_r = subparsers.add_parser('read')
-        parser_r.add_argument('_port', metavar='port', type=lambda x: int(x, 0), help="io port")
-        parser_r.add_argument('_width', metavar='width', type=int, choices=[0x1, 0x2, 0x4], help="width")
-        parser_r.set_defaults(func=self.io_read)
-
-        # write
-        parser_w = subparsers.add_parser('write')
-        parser_w.add_argument('_port', metavar='port', type=lambda x: int(x, 0), help="io port")
-        parser_w.add_argument('_width', metavar='width', type=int, choices=[0x1, 0x2, 0x4], help="width")
-        parser_w.add_argument('_value', metavar='value', type=lambda x: int(x, 0), help="value")
-        parser_w.set_defaults(func=self.io_write)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._iobar = iobar.IOBAR(self.cs)

-
-
[docs]    def io_list(self) -> None:
-        self._iobar.list_IO_BARs()

-
-
[docs]    def io_read(self) -> None:
-        if 0x1 == self._width:
-            value = self.cs.io.read_port_byte(self._port)
-        elif 0x2 == self._width:
-            value = self.cs.io.read_port_word(self._port)
-        elif 0x4 == self._width:
-            value = self.cs.io.read_port_dword(self._port)
-        else:
-            self.logger.log("Invalid read size requested. 1,2,4 supported")
-            return
-        self.logger.log(f'[CHIPSEC] IN 0x{self._port:04X} -> 0x{value:08X} (size = 0x{self._width:02X})')
-        return

-
-
[docs]    def io_write(self) -> None:
-        if 0x1 == self._width:
-            self.cs.io.write_port_byte(self._port, self._value)
-        elif 0x2 == self._width:
-            self.cs.io.write_port_word(self._port, self._value)
-        elif 0x4 == self._width:
-            self.cs.io.write_port_dword(self._port, self._value)
-        else:
-            self.logger.log("Invalid write size requested. 1,2,4 supported")
-            return
-        self.logger.log(
-            f'[CHIPSEC] OUT 0x{self._port:04X} <- 0x{self._value:08X} (size = 0x{self._width:02X})')
-        return

-
-commands = {'io': PortIOCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/iommu_cmd.html b/_modules/chipsec/utilcmd/iommu_cmd.html deleted file mode 100644 index c283dcde..00000000 --- a/_modules/chipsec/utilcmd/iommu_cmd.html +++ /dev/null @@ -1,272 +0,0 @@ - - - - - - - - chipsec.utilcmd.iommu_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.iommu_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-Command-line utility providing access to IOMMU engines
-
->>> chipsec_util iommu list
->>> chipsec_util iommu config [iommu_engine]
->>> chipsec_util iommu status [iommu_engine]
->>> chipsec_util iommu enable|disable <iommu_engine>
->>> chipsec_util iommu pt
-
-Examples:
-
->>> chipsec_util iommu list
->>> chipsec_util iommu config VTD
->>> chipsec_util iommu status GFXVTD
->>> chipsec_util iommu enable VTD
->>> chipsec_util iommu pt
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal import acpi, iommu
-from argparse import ArgumentParser
-from chipsec.exceptions import IOMMUError, AcpiRuntimeError
-
-
-# I/O Memory Management Unit (IOMMU), e.g. Intel VT-d
-
[docs]class IOMMUCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util iommu', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_list = subparsers.add_parser('list')
-        parser_list.set_defaults(func=self.iommu_list)
-
-        parser_config = subparsers.add_parser('config')
-        parser_config.add_argument('engine', type=str, default='', nargs='?', help='IOMMU Engine')
-        parser_config.set_defaults(func=self.iommu_config)
-
-        parser_status = subparsers.add_parser('status')
-        parser_status.add_argument('engine', type=str, default='', nargs='?', help='IOMMU Engine')
-        parser_status.set_defaults(func=self.iommu_status)
-
-        parser_enable = subparsers.add_parser('enable')
-        parser_enable.add_argument('engine', type=str, help='IOMMU Engine')
-        parser_enable.set_defaults(func=self.iommu_enable)
-
-        parser_disable = subparsers.add_parser('disable')
-        parser_disable.add_argument('engine', type=str, help='IOMMU Engine')
-        parser_disable.set_defaults(func=self.iommu_disable)
-
-        parser_pt = subparsers.add_parser('pt')
-        parser_pt.add_argument('engine', type=str, default='', nargs='?', help='IOMMU Engine')
-        parser_pt.set_defaults(func=self.iommu_pt)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def iommu_list(self) -> None:
-        self.logger.log("[CHIPSEC] Enumerating supported IOMMU engine names:")
-        self.logger.log(f'{list(iommu.IOMMU_ENGINES.keys())}')
-        self.logger.log_important('\nNote: These are the IOMMU engine names supported by iommu_cmd.')
-        self.logger.log_important('It does not mean they are supported/enabled in the current platform.')

-
-
[docs]    def iommu_engine(self, cmd) -> None:
-        try:
-            _iommu = iommu.IOMMU(self.cs)
-        except IOMMUError as msg:
-            print(msg)
-            return
-
-        if self.engine:
-            if self.engine in iommu.IOMMU_ENGINES.keys():
-                _iommu_engines = [self.engine]
-            else:
-                self.logger.log_error(f'IOMMU name \'{self.engine}\' not recognized. Run \'iommu list\' command for supported IOMMU names')
-                return
-        else:
-            _iommu_engines = iommu.IOMMU_ENGINES.keys()
-
-        if 'config' == cmd:
-            try:
-                _acpi = acpi.ACPI(self.cs)
-            except AcpiRuntimeError as msg:
-                print(msg)
-                return
-
-            if _acpi.is_ACPI_table_present(acpi.ACPI_TABLE_SIG_DMAR):
-                self.logger.log("[CHIPSEC] Dumping contents of DMAR ACPI table..\n")
-                _acpi.dump_ACPI_table(acpi.ACPI_TABLE_SIG_DMAR)
-            else:
-                self.logger.log("[CHIPSEC] Couldn't find DMAR ACPI table\n")
-
-        for e in _iommu_engines:
-            if (cmd == 'config'):
-                _iommu.dump_IOMMU_configuration(e)
-            elif (cmd == 'pt'):
-                _iommu.dump_IOMMU_page_tables(e)
-            elif (cmd == 'status'):
-                _iommu.dump_IOMMU_status(e)
-            elif (cmd == 'enable'):
-                _iommu.set_IOMMU_Translation(e, 1)
-            elif (cmd == 'disable'):
-                _iommu.set_IOMMU_Translation(e, 0)

-
-
[docs]    def iommu_config(self) -> None:
-        self.iommu_engine('config')

-
-
[docs]    def iommu_status(self) -> None:
-        self.iommu_engine('status')

-
-
[docs]    def iommu_enable(self) -> None:
-        self.iommu_engine('enable')

-
-
[docs]    def iommu_disable(self) -> None:
-        self.iommu_engine('disable')

-
-
[docs]    def iommu_pt(self) -> None:
-        self.iommu_engine('pt')

-
-
[docs]    def run(self) -> None:
-        self.func()

-
-
-commands = {'iommu': IOMMUCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/lock_check_cmd.html b/_modules/chipsec/utilcmd/lock_check_cmd.html deleted file mode 100644 index 1238b2dc..00000000 --- a/_modules/chipsec/utilcmd/lock_check_cmd.html +++ /dev/null @@ -1,299 +0,0 @@ - - - - - - - - chipsec.utilcmd.lock_check_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.lock_check_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util check list
->>> chipsec_util check lock <lockname>
->>> chipsec_util check lock <lockname1, lockname2, ...>
->>> chipsec_util check all
-
-Examples:
-
->>> chipsec_util check list
->>> chipsec_util check lock DebugLock
->>> chipsec_util check all
-
-KEY:
-    Lock Name - Name of Lock within configuration file
-    State     - Lock Configuration
-    
-        Undefined - Lock is not defined within configuration
-        Undoc     - Lock is missing configuration information
-        Hidden    - Lock is in a disabled or hidden state (unable to read the lock)
-        Unlocked  - Lock does not match value within configuration
-        Locked    - Lock matches value within configuration
-        RW/O      - Lock is identified as register is RW/O
-
-"""
-
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.locks import locks, LockResult
-from chipsec.defines import is_set
-
-
-
[docs]class LOCKCHECKCommand(BaseCommand):
-
-    version = "0.5"
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util check', usage=LOCKCHECKCommand.__doc__)
-
-        parser_lockname = ArgumentParser(add_help=False)
-        parser_lockname.add_argument('lockname', type=str, nargs='+', help="locknames")
-
-        subparsers = parser.add_subparsers()
-
-        # list
-        parser_list = subparsers.add_parser('list')
-        parser_list.set_defaults(func=self.list_locks)
-
-        # checkall
-        parser_checkall = subparsers.add_parser('all')
-        parser_checkall.set_defaults(func=self.checkall_locks)
-
-        # check
-        parser_check = subparsers.add_parser('lock', parents=[parser_lockname])
-        parser_check.set_defaults(func=self.check_lock)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self.flip_consistency_checking = False
-        if not self.cs.consistency_checking:
-            self.flip_consistency_checking = True
-            self.cs.consistency_checking = True
-        self.logger.set_always_flush(True)
-        self._locks = locks(self.cs)

-    
-
[docs]    def tear_down(self) -> None:
-        self.logger.set_always_flush(False)
-        if self.flip_consistency_checking:
-            self.cs.consistency_checking = False

-
-
[docs]    def log_key(self) -> None:
-        self.logger.log("""
-KEY:
-\tLock Name - Name of Lock within configuration file
-\tState - Lock Configuration
-\t\tUndefined - Lock is not defined within configuration
-\t\tUndoc - Lock is missing configuration information
-\t\tHidden - Lock is in a disabled or hidden state (unable to read the lock)
-\t\tUnlocked - Lock does not match value within configuration
-\t\tLocked - Lock matches value within configuration
-\t\tRW/O - Lock is identified as register is RW/O\n\n""")

-
-
[docs]    def log_header(self) -> str:
-        ret = f'{"Lock Name":^27}|{"State":^16}|{"Consistent":^16}\n{"-" * 58}'
-        if not self.logger.HAL:
-            self.logger.log(ret)
-        return f"\n\n{ret}"

-
-
[docs]    def list_locks(self) -> None:
-        self.logger.log('Locks identified within the configuration:')
-        for lock in self._locks.get_locks():
-            self.logger.log(lock)
-        self.logger.log('')
-        return

-
-
[docs]    def checkall_locks(self) -> None:
-        locks = self._locks.get_locks()
-        if not locks:
-            self.logger.log('Did not find any locks')
-            return
-        if self.logger.VERBOSE:
-            self.log_key()
-        res = self.log_header()
-        for lock in locks:
-            is_locked = self._locks.is_locked(lock)
-            is_locked_str = self.check_log(lock, is_locked)
-            res = f"{res}\n{is_locked_str}"
-        if self.logger.HAL:
-            self.logger.log(res)
-        return

-
-
[docs]    def check_lock(self) -> None:
-        if self.logger.VERBOSE:
-            self.log_key()
-        res = self.log_header()
-        for lock in self.lockname:
-            is_locked = self._locks.is_locked(lock)
-            is_locked_str = self.check_log(lock, is_locked)
-            res = f"{res}\n{is_locked_str}"
-        if self.logger.HAL:
-            self.logger.log(res)
-        return

-
-
[docs]    def check_log(self, lock: str, is_locked: int) -> str:
-        consistent = "N/A"
-        if not is_set(is_locked, LockResult.DEFINED):
-            res_str = 'Undefined'
-        elif not is_set(is_locked, LockResult.HAS_CONFIG):
-            res_str = 'Undoc'
-        elif not is_set(is_locked, LockResult.CAN_READ):
-            res_str = 'Hidden'
-        elif self.cs.get_lock_type(lock) == "RW/O":
-            res_str = 'RW/O'
-        elif is_set(is_locked, LockResult.LOCKED):
-            res_str = 'Locked'
-        elif not is_set(is_locked, LockResult.LOCKED):
-            res_str = 'UnLocked'
-        else:
-            res_str = 'Unknown'
-        if res_str in ["RW/O", "Locked", "UnLocked"] and is_set(is_locked, LockResult.INCONSISTENT):
-            consistent = "No"
-        elif res_str in ["RW/O", "Locked", "UnLocked"] and not is_set(is_locked, LockResult.INCONSISTENT):
-            consistent = "Yes"
-        res = f'{lock[:26]:27}|  {res_str:14}|{consistent:^16}'
-        if not self.logger.HAL:
-            self.logger.log(res)
-        return res

-
-
-commands = {'check': LOCKCHECKCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/mem_cmd.html b/_modules/chipsec/utilcmd/mem_cmd.html deleted file mode 100644 index 1fe70d43..00000000 --- a/_modules/chipsec/utilcmd/mem_cmd.html +++ /dev/null @@ -1,337 +0,0 @@ - - - - - - - - chipsec.utilcmd.mem_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.mem_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The mem command provides direct access to read and write physical memory.
-
->>> chipsec_util mem <op> <physical_address> <length> [value|buffer_file]
->>> <physical_address> : 64-bit physical address
->>> <op>               : read|readval|write|writeval|allocate|pagedump|search
->>> <length>           : byte|word|dword or length of the buffer from <buffer_file>
->>> <value>            : byte, word or dword value to be written to memory at <physical_address>
->>> <buffer_file>      : file with the contents to be written to memory at <physical_address>
-
-Examples:
-
->>> chipsec_util mem <op>     <physical_address> <length> [value|file]
->>> chipsec_util mem readval  0xFED40000         dword
->>> chipsec_util mem read     0x41E              0x20     buffer.bin
->>> chipsec_util mem writeval 0xA0000            dword    0x9090CCCC
->>> chipsec_util mem write    0x100000000        0x1000   buffer.bin
->>> chipsec_util mem write    0x100000000        0x10     000102030405060708090A0B0C0D0E0F
->>> chipsec_util mem allocate                    0x1000
->>> chipsec_util mem pagedump 0xFED00000         0x100000
->>> chipsec_util mem search   0xF0000            0x10000  _SM_
-"""
-
-import os
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.defines import ALIGNED_4KB, BOUNDARY_4KB, bytestostring
-from chipsec_util import get_option_width, is_option_valid_width, CMD_OPTS_WIDTH
-from chipsec.file import read_file, write_file, get_main_dir
-from chipsec.logger import print_buffer_bytes
-from argparse import ArgumentParser
-
-# Physical Memory
-
-
-
[docs]class MemCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util mem', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('phys_address', type=lambda x: int(x, 16), help='64-bit physical address (hex)')
-        parser_read.add_argument('buffer_length', type=lambda x: int(x, 16), default=0x100, nargs='?', help='Length of buffer (hex)')
-        parser_read.add_argument('file_name', type=str, default='', nargs='?', help='Buffer file name')
-        parser_read.set_defaults(func=self.mem_read)
-
-        parser_readval = subparsers.add_parser('readval')
-        parser_readval.add_argument('phys_address', type=lambda x: int(x, 16), help='64-bit physical address (hex)')
-        parser_readval.add_argument('length', type=str, nargs='?', default='', help='Length to read (byte|word|dword)')
-        parser_readval.set_defaults(func=self.mem_readval)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('phys_address', type=lambda x: int(x, 16), help='64-bit physical address (hex)')
-        parser_write.add_argument('buffer_length', type=lambda x: int(x, 16), help='Length of buffer (hex)')
-        parser_write.add_argument('buffer_data', type=str, help='Buffer data or file name')
-        parser_write.set_defaults(func=self.mem_write)
-
-        parser_writeval = subparsers.add_parser('writeval')
-        parser_writeval.add_argument('phys_address', type=lambda x: int(x, 16), help='64-bit physical address (hex)')
-        parser_writeval.add_argument('length', type=str, help='Length to write (byte|word|dword)')
-        parser_writeval.add_argument('write_data', type=lambda x: int(x, 16), help='Data to write')
-        parser_writeval.set_defaults(func=self.mem_writeval)
-
-        parser_allocate = subparsers.add_parser('allocate')
-        parser_allocate.add_argument('allocate_length', type=lambda x: int(x, 16), help='Length to allocate (hex)')
-        parser_allocate.set_defaults(func=self.mem_allocate)
-
-        parser_pagedump = subparsers.add_parser('pagedump')
-        parser_pagedump.add_argument('start_address', type=lambda x: int(x, 16), help='64-bit physical address (hex)')
-        parser_pagedump.add_argument('length', type=lambda x: int(x, 16), nargs='?', default=BOUNDARY_4KB, help='Length to allocate (hex)')
-        parser_pagedump.set_defaults(func=self.mem_pagedump)
-
-        parser_search = subparsers.add_parser('search')
-        parser_search.add_argument('phys_address', type=lambda x: int(x, 16), help='64-bit physical address (hex)')
-        parser_search.add_argument('length', type=lambda x: int(x, 16), help='Length to search (hex)')
-        parser_search.add_argument('value', type=str, help='Value to search for')
-        parser_search.set_defaults(func=self.mem_search)
-        parser.parse_args(self.argv, namespace=self)

-
-
-
[docs]    def dump_region_to_path(self, path: str, pa_start: int, pa_end: int) -> None:
-        if pa_start >= pa_end:
-            return
-        head_len = pa_start & ALIGNED_4KB
-        tail_len = pa_end & ALIGNED_4KB
-        pa = pa_start - head_len + ALIGNED_4KB + 1
-        fname = os.path.join(path, f'm{pa_start:016X}.bin')
-        end = pa_end - tail_len
-        with open(fname, 'wb') as f:
-            # read leading bytes to the next boundary
-            if (head_len > 0):
-                f.write(self.cs.mem.read_physical_mem(pa_start, ALIGNED_4KB + 1 - head_len))
-
-            for addr in range(pa, end, ALIGNED_4KB + 1):
-                f.write(self.cs.mem.read_physical_mem(addr, ALIGNED_4KB + 1))
-
-            # read trailing bytes
-            if (tail_len > 0):
-                f.write(self.cs.mem.read_physical_mem(end, tail_len))

-
-
[docs]    def mem_allocate(self) -> None:
-        (va, pa) = self.cs.mem.alloc_physical_mem(self.allocate_length)
-        self.logger.log(f'[CHIPSEC] Allocated {self.allocate_length:X} bytes of physical memory: VA = 0x{va:016X}, PA = 0x{pa:016X}')

-
-
-
-
[docs]    def mem_pagedump(self) -> None:
-        end = self.start_address + self.length
-        self.dump_region_to_path(get_main_dir(), self.start_address, end)

-
-
[docs]    def mem_read(self) -> None:
-        self.logger.log(f'[CHIPSEC] Reading buffer from memory: PA = 0x{self.phys_address:016X}, len = 0x{self.buffer_length:X}..')
-        buffer = self.cs.mem.read_physical_mem(self.phys_address, self.buffer_length)
-        if self.file_name:
-            write_file(self.file_name, buffer)
-            self.logger.log(f'[CHIPSEC] Written 0x{len(buffer):X} bytes to \'{self.file_name}\'')
-        else:
-            print_buffer_bytes(buffer)

-
-
[docs]    def mem_readval(self) -> None:
-        width = 0x4
-        value = 0x0
-        if self.length:
-            try:
-                width = get_option_width(self.length) if is_option_valid_width(self.length) else int(self.length, 16)
-            except ValueError:
-                self.logger.log_error(f'[CHIPSEC] Bad length given \'{self.length}\'')
-                return
-
-        if width not in (0x1, 0x2, 0x4):
-            self.logger.log_error(f'Must specify <length> argument in \'mem readval\' as one of {CMD_OPTS_WIDTH}')
-            return
-        self.logger.log(f'[CHIPSEC] Reading {width:X}-byte value from PA 0x{self.phys_address:016X}..')
-        if 0x1 == width:
-            value = self.cs.mem.read_physical_mem_byte(self.phys_address)
-        elif 0x2 == width:
-            value = self.cs.mem.read_physical_mem_word(self.phys_address)
-        elif 0x4 == width:
-            value = self.cs.mem.read_physical_mem_dword(self.phys_address)
-        self.logger.log(f'[CHIPSEC] Value = 0x{value:X}')

-
-
[docs]    def mem_write(self) -> None:
-        if not os.path.exists(self.buffer_data):
-            try:
-                buffer = bytearray.fromhex(self.buffer_data)
-            except ValueError:
-                self.logger.log_error(f'Incorrect <value> specified: \'{self.buffer_data}\'')
-                return
-            self.logger.log(f'[CHIPSEC] Read 0x{len(buffer):X} hex bytes from command-line: \'{self.buffer_data}\'')
-        else:
-            buffer = read_file(self.buffer_data)
-            self.logger.log(f'[CHIPSEC] Read 0x{len(buffer):X} bytes from file \'{self.buffer_data}\'')
-
-        if len(buffer) < self.buffer_length:
-            self.logger.log_error(f'Number of bytes read (0x{len(buffer):X}) is less than the specified <length> (0x{self.buffer_length:X})')
-            return
-
-        self.logger.log(f'[CHIPSEC] writing buffer to memory: PA = 0x{self.phys_address:016X}, len = 0x{self.buffer_length:X}..')
-        self.cs.mem.write_physical_mem(self.phys_address, self.buffer_length, buffer)

-
-
[docs]    def mem_writeval(self) -> None:
-        try:
-            width = get_option_width(self.length) if is_option_valid_width(self.length) else int(self.length, 16)
-        except ValueError:
-            self.logger.log_error(f'Must specify <length> argument in \'mem writeval\' as one of {CMD_OPTS_WIDTH}')
-            return
-
-        if width not in (0x1, 0x2, 0x4):
-            self.logger.log_error(f'Must specify <length> argument in \'mem writeval\' as one of {CMD_OPTS_WIDTH}')
-            return
-        self.logger.log(f'[CHIPSEC] Writing {width:X}-byte value 0x{self.write_data:X} to PA 0x{self.phys_address:016X}..')
-        if 0x1 == width:
-            self.cs.mem.write_physical_mem_byte(self.phys_address, self.write_data)
-        elif 0x2 == width:
-            self.cs.mem.write_physical_mem_word(self.phys_address, self.write_data)
-        elif 0x4 == width:
-            self.cs.mem.write_physical_mem_dword(self.phys_address, self.write_data)

-
-commands = {'mem': MemCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/mmcfg_base_cmd.html b/_modules/chipsec/utilcmd/mmcfg_base_cmd.html deleted file mode 100644 index c36bcaf1..00000000 --- a/_modules/chipsec/utilcmd/mmcfg_base_cmd.html +++ /dev/null @@ -1,180 +0,0 @@ - - - - - - - - chipsec.utilcmd.mmcfg_base_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.mmcfg_base_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The mmcfg_base command displays PCIe MMCFG Base/Size.
-
-Usage:
-
->>> chipsec_util mmcfg_base
-
-Examples:
-
->>> chipsec_util mmcfg_base
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal import mmio
-
-
-# Access to Memory Mapped PCIe Configuration Space (MMCFG)
-
[docs]class MMCfgBaseCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        return

-
-
[docs]    def run(self) -> None:
-        _mmio = mmio.MMIO(self.cs)
-        pciexbar, pciexbar_sz = _mmio.get_MMCFG_base_address()
-        self.logger.log(f'[CHIPSEC] Memory Mapped Config Base: 0x{pciexbar:016X}')
-        self.logger.log(f'[CHIPSEC] Memory Mapped Config Size: 0x{pciexbar_sz:016X}')
-        self.logger.log('')

-
-
-commands = {'mmcfg_base': MMCfgBaseCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/mmcfg_cmd.html b/_modules/chipsec/utilcmd/mmcfg_cmd.html deleted file mode 100644 index 0523f76b..00000000 --- a/_modules/chipsec/utilcmd/mmcfg_cmd.html +++ /dev/null @@ -1,230 +0,0 @@ - - - - - - - - chipsec.utilcmd.mmcfg_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.mmcfg_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The mmcfg command allows direct access to memory mapped config space.
-
->>> chipsec_util mmcfg base
->>> chipsec_util mmcfg read <bus> <device> <function> <offset> <width>
->>> chipsec_util mmcfg write <bus> <device> <function> <offset> <width> <value>
->>> chipsec_util mmcfg ec
-
-
-Examples:
-
->>> chipsec_util mmcfg base
->>> chipsec_util mmcfg read 0 0 0 0x200 4
->>> chipsec_util mmcfg write 0 0 0 0x200 1 0x1A
->>> chipsec_util mmcfg ec
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from argparse import ArgumentParser
-
-
-# Access to Memory Mapped PCIe Configuration Space (MMCFG)
-
[docs]class MMCfgCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util mmcfg', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_base = subparsers.add_parser('base')
-        parser_base.set_defaults(func=self.base)
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.set_defaults(func=self.read)
-        parser_read.add_argument('bus', type=lambda x: int(x, 16), help='Bus (hex)')
-        parser_read.add_argument('device', type=lambda x: int(x, 16), help='Device (hex)')
-        parser_read.add_argument('function', type=lambda x: int(x, 16), help='Function (hex)')
-        parser_read.add_argument('offset', type=lambda x: int(x, 16), help='Offset (hex)')
-        parser_read.add_argument('width', type=int, choices=[1, 2, 4], help='Width')
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.set_defaults(func=self.write)
-        parser_write.add_argument('bus', type=lambda x: int(x, 16), help='Bus (hex)')
-        parser_write.add_argument('device', type=lambda x: int(x, 16), help='Device (hex)')
-        parser_write.add_argument('function', type=lambda x: int(x, 16), help='Function (hex)')
-        parser_write.add_argument('offset', type=lambda x: int(x, 16), help='Offset (hex)')
-        parser_write.add_argument('width', type=int, choices=[1, 2, 4], help='Width')
-        parser_write.add_argument('value', type=lambda x: int(x, 16), help='Value to write (hex)')
-
-        # Print the pcie extended capabilities
-        parser_ec = subparsers.add_parser('ec')
-        parser_ec.set_defaults(func=self.ec)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def base(self):
-        pciexbar, pciexbar_sz = self.cs.mmio.get_MMCFG_base_address()
-        self.logger.log(f'[CHIPSEC] Memory Mapped Config Base: 0x{pciexbar:016X}')
-        self.logger.log(f'[CHIPSEC] Memory Mapped Config Size: 0x{pciexbar_sz:016X}')

-
-
[docs]    def read(self):
-        data = self.cs.mmio.read_mmcfg_reg(self.bus, self.device, self.function, self.offset, self.width)
-        self.logger.log(f'[CHIPSEC] Reading MMCFG register ({self.bus:02d}:{self.device:02d}.{self.function:d} + 0x{self.offset:02X}): 0x{data:X}')

-
-
[docs]    def write(self):
-        self.cs.mmio.write_mmcfg_reg(self.bus, self.device, self.function, self.offset, self.width, self.value)
-        self.logger.log(f'[CHIPSEC] Writing MMCFG register ({self.bus:02d}:{self.device:02d}.{self.function:d} + 0x{self.offset:02X}): 0x{self.value:X}')

-
-
[docs]    def ec(self):
-        devs = self.cs.pci.enumerate_devices()
-        for (b, d, f, _, _, _) in devs:
-            capabilities = self.cs.mmio.get_extended_capabilities(b, d, f)
-            if capabilities:
-                self.logger.log(f'Extended Capabilities for {b:02X}:{d:02X}.{f:X}:')
-                for cap in capabilities:
-                    self.logger.log(f'{cap}')
-                    if cap.id == 0xB:
-                        vsec = self.cs.mmio.get_vsec(b, d, f, cap.off)
-                        self.logger.log(f'\t{vsec}')

-
-
-commands = {'mmcfg': MMCfgCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/mmio_cmd.html b/_modules/chipsec/utilcmd/mmio_cmd.html deleted file mode 100644 index fbf34013..00000000 --- a/_modules/chipsec/utilcmd/mmio_cmd.html +++ /dev/null @@ -1,299 +0,0 @@ - - - - - - - - chipsec.utilcmd.mmio_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.mmio_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util mmio list
->>> chipsec_util mmio dump <MMIO_BAR_name> [offset] [length]
->>> chipsec_util mmio dump-abs <MMIO_base_address> [offset] [length]
->>> chipsec_util mmio read <MMIO_BAR_name> <offset> <width>
->>> chipsec_util mmio read-abs <MMIO_base_address> <offset> <width>
->>> chipsec_util mmio write <MMIO_BAR_name> <offset> <width> <value>
->>> chipsec_util mmio write-abs <MMIO_base_address> <offset> <width> <value>
-
-Examples:
-
->>> chipsec_util mmio list
->>> chipsec_util mmio dump MCHBAR
->>> chipsec_util mmio dump-abs 0xFE010000 0x70 0x10
->>> chipsec_util mmio read SPIBAR 0x74 0x4
->>> chipsec_util mmio read-abs 0xFE010000 0x74 0x04
->>> chipsec_util mmio write SPIBAR 0x74 0x4 0xFFFF0000
->>> chipsec_util mmio write-abs 0xFE010000 0x74 0x04 0xFFFF0000
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal import mmio
-from argparse import ArgumentParser
-
-
-# ###################################################################
-#
-# Access to Memory Mapped PCIe Configuration Space (MMCFG)
-#
-# ###################################################################
-
[docs]class MMIOCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util mmio', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_list = subparsers.add_parser('list')
-        parser_list.set_defaults(func=self.list_bars)
-
-        parser_dump = subparsers.add_parser('dump')
-        parser_dump.add_argument('bar_name', type=str, help='MMIO BAR to dump')
-        parser_dump.add_argument('offset', type=lambda x: int(x, 16), nargs='?', default=0,
-                                 help='Offset in BAR to start dump')
-        parser_dump.add_argument('length', type=lambda x: int(x, 16), nargs='?', default=None,
-                                 help='Length of the region to dump')
-        parser_dump.set_defaults(func=self.dump_bar)
-
-        parser_dump_abs = subparsers.add_parser('dump-abs')
-        parser_dump_abs.add_argument('base', type=lambda x: int(x, 16), help='MMIO region base address')
-        parser_dump_abs.add_argument('offset', type=lambda x: int(x, 16), nargs='?', default=0,
-                                     help='Offset in BAR to start dump')
-        parser_dump_abs.add_argument('length', type=lambda x: int(x, 16), nargs='?', default=None,
-                                     help='Length of the region to dump')
-        parser_dump_abs.set_defaults(func=self.dump_bar_abs)
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('bar_name', type=str, help='MMIO BAR to read')
-        parser_read.add_argument('offset', type=lambda x: int(x, 16), help='Offset value (hex)')
-        parser_read.add_argument('width', type=lambda x: int(x, 16), choices=[1, 2, 4, 8],
-                                 help='Width value [1, 2, 4, 8] (hex)')
-        parser_read.add_argument('bus', type=lambda x: int(x, 16), nargs='?', default=None, help='bus value')
-        parser_read.set_defaults(func=self.read_bar)
-
-        parser_read_abs = subparsers.add_parser('read-abs')
-        parser_read_abs.add_argument('base', type=lambda x: int(x, 16), help='MMIO region base address')
-        parser_read_abs.add_argument('offset', type=lambda x: int(x, 16), help='MMIO register offset')
-        parser_read_abs.add_argument('width', type=lambda x: int(x, 16), choices=[1, 2, 4, 8],
-                                     help='Data width to read')
-        parser_read_abs.set_defaults(func=self.read_abs)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('bar_name', type=str, help='MMIO BAR to write')
-        parser_write.add_argument('offset', type=lambda x: int(x, 16), help='Offset value (hex)')
-        parser_write.add_argument('width', type=lambda x: int(x, 16), choices=[1, 2, 4, 8],
-                                  help='Width value [1, 2, 4, 8] (hex)')
-        parser_write.add_argument('value', type=lambda x: int(x, 16), help='Value to write (hex)')
-        parser_write.add_argument('bus', type=lambda x: int(x, 16), nargs='?', default=None, help='bus value')
-        parser_write.set_defaults(func=self.write_bar)
-
-        parser_write_abs = subparsers.add_parser('write-abs')
-        parser_write_abs.add_argument('base', type=lambda x: int(x, 16), help='MMIO region base address')
-        parser_write_abs.add_argument('offset', type=lambda x: int(x, 16), help='MMIO register offset')
-        parser_write_abs.add_argument('width', type=lambda x: int(x, 16), choices=[1, 2, 4, 8],
-                                      help='Data width to read')
-        parser_write_abs.add_argument('value', type=lambda x: int(x, 16), help='Value to write (hex)')
-        parser_write_abs.set_defaults(func=self.write_abs)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._mmio = mmio.MMIO(self.cs)

-
-
[docs]    def list_bars(self):
-        self._mmio.list_MMIO_BARs()

-
-
[docs]    def dump_bar(self):
-        self.logger.log("[CHIPSEC] Dumping {} MMIO space..".format(self.bar_name.upper()))
-        (bar_base, bar_size) = self._mmio.get_MMIO_BAR_base_address(self.bar_name.upper())
-        if self.length is not None:
-            bar_size = self.length
-        else:
-            bar_size -= self.offset
-        bar_base += self.offset
-        self._mmio.dump_MMIO(bar_base, bar_size)

-
-
[docs]    def dump_bar_abs(self):
-        tmp_base = self.base + self.offset
-        if self.length is None:
-            tmp_length = 0x1000
-        else:
-            tmp_length = self.length
-        self.logger.log("[CHIPSEC] Dumping MMIO space 0x{:08X} to 0x{:08X}".format(tmp_base, tmp_base + tmp_length))
-        self._mmio.dump_MMIO(tmp_base, tmp_length)

-
-
[docs]    def read_bar(self):
-        bar = self.bar_name.upper()
-        reg = self._mmio.read_MMIO_BAR_reg(bar, self.offset, self.width, self.bus)
-        self.logger.log("[CHIPSEC] Read {} + 0x{:X}: 0x{:08X}".format(bar, self.offset, reg))

-
-
[docs]    def read_abs(self):
-        if self.width == 1:
-            reg = self._mmio.read_MMIO_reg_byte(self.base, self.offset)
-        elif self.width == 2:
-            reg = self._mmio.read_MMIO_reg_word(self.base, self.offset)
-        elif self.width == 4:
-            reg = self._mmio.read_MMIO_reg_dword(self.base, self.offset)
-        elif self.width == 8:
-            reg = self._mmio.read_MMIO_reg_dword(self.base, self.offset)
-            reg |= self._mmio.read_MMIO_reg_dword(self.base, self.offset + 4) << 32
-        self.logger.log("[CHIPSEC] Read 0x{:X} + 0x{:X}: 0x{:08X}".format(self.base, self.offset, reg))

-
-
[docs]    def write_bar(self):
-        bar = self.bar_name.upper()
-        self.logger.log("[CHIPSEC] Write {} + 0x{:X}: 0x{:08X}".format(bar, self.offset, self.value))
-        self._mmio.write_MMIO_BAR_reg(bar, self.offset, self.value, self.width, self.bus)

-
-
[docs]    def write_abs(self):
-        self.logger.log("[CHIPSEC] Write 0x{:X} + 0x{:X}: 0x{:08X}".format(self.base, self.offset, self.value))
-        if self.width == 1:
-            self._mmio.write_MMIO_reg_byte(self.base, self.offset, self.value & 0xFF)
-        elif self.width == 2:
-            self._mmio.write_MMIO_reg_word(self.base, self.offset, self.value & 0xFFFF)
-        elif self.width == 4:
-            self._mmio.write_MMIO_reg_dword(self.base, self.offset, self.value & 0xFFFFFFFF)
-        elif self.width == 8:
-            self._mmio.write_MMIO_reg_dword(self.base, self.offset, self.value & 0xFFFFFFFF)
-            self._mmio.write_MMIO_reg_dword(self.base, self.offset + 4, (self.value >> 32) & 0xFFFFFFFF)

-
-
-
-commands = {'mmio': MMIOCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/msgbus_cmd.html b/_modules/chipsec/utilcmd/msgbus_cmd.html deleted file mode 100644 index 372e43e5..00000000 --- a/_modules/chipsec/utilcmd/msgbus_cmd.html +++ /dev/null @@ -1,242 +0,0 @@ - - - - - - - - chipsec.utilcmd.msgbus_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.msgbus_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util msgbus read     <port> <register>
->>> chipsec_util msgbus write    <port> <register> <value>
->>> chipsec_util msgbus mm_read  <port> <register>
->>> chipsec_util msgbus mm_write <port> <register> <value>
->>> chipsec_util msgbus message  <port> <register> <opcode> [value]
->>>
->>> <port>    : message bus port of the target unit
->>> <register>: message bus register/offset in the target unit port
->>> <value>   : value to be written to the message bus register/offset
->>> <opcode>  : opcode of the message on the message bus
-
-Examples:
-
->>> chipsec_util msgbus read     0x3 0x2E
->>> chipsec_util msgbus mm_write 0x3 0x27 0xE0000001
->>> chipsec_util msgbus message  0x3 0x2E 0x10
->>> chipsec_util msgbus message  0x3 0x2E 0x11 0x0
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from argparse import ArgumentParser
-
-
-# Message Bus
-
[docs]class MsgBusCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util msgbus', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('port', type=lambda x: int(x, 16), help='Port (hex)')
-        parser_read.add_argument('reg', type=lambda x: int(x, 16), help='Register (hex)')
-        parser_read.set_defaults(func=self.msgbus_read)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('port', type=lambda x: int(x, 16), help='Port (hex)')
-        parser_write.add_argument('reg', type=lambda x: int(x, 16), help='Register (hex)')
-        parser_write.add_argument('val', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_write.set_defaults(func=self.msgbus_write)
-
-        parser_mmread = subparsers.add_parser('mm_read')
-        parser_mmread.add_argument('port', type=lambda x: int(x, 16), help='Port (hex)')
-        parser_mmread.add_argument('reg', type=lambda x: int(x, 16), help='Register (hex)')
-        parser_mmread.set_defaults(func=self.msgbus_mm_read)
-
-        parser_mmwrite = subparsers.add_parser('mm_write')
-        parser_mmwrite.add_argument('port', type=lambda x: int(x, 16), help='Port (hex)')
-        parser_mmwrite.add_argument('reg', type=lambda x: int(x, 16), help='Register (hex)')
-        parser_mmwrite.add_argument('val', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_mmwrite.set_defaults(func=self.msgbus_mm_write)
-
-        parser_message = subparsers.add_parser('message')
-        parser_message.add_argument('port', type=lambda x: int(x, 16), help='Port (hex)')
-        parser_message.add_argument('reg', type=lambda x: int(x, 16), help='Register (hex)')
-        parser_message.add_argument('opcode', type=lambda x: int(x, 16), help='OPCODE (hex)')
-        parser_message.add_argument('val', type=lambda x: int(x, 16), nargs='?', default=None, help='Value (hex)')
-        parser_message.set_defaults(func=self.msgbus_message)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def msgbus_read(self):
-        self.logger.log("[CHIPSEC] msgbus read: port 0x{:02X} + 0x{:08X}".format(self.port, self.reg))
-        return self._msgbus.msgbus_reg_read(self.port, self.reg)

-
-
[docs]    def msgbus_write(self):
-        self.logger.log("[CHIPSEC] msgbus write: port 0x{:02X} + 0x{:08X} < 0x{:08X}".format(self.port, self.reg, self.val))
-        return self._msgbus.msgbus_reg_write(self.port, self.reg, self.val)

-
-
[docs]    def msgbus_mm_read(self):
-        self.logger.log("[CHIPSEC] MMIO msgbus read: port 0x{:02X} + 0x{:08X}".format(self.port, self.reg))
-        return self._msgbus.mm_msgbus_reg_read(self.port, self.reg)

-
-
[docs]    def msgbus_mm_write(self):
-        self.logger.log("[CHIPSEC] MMIO msgbus write: port 0x{:02X} + 0x{:08X} < 0x{:08X}".format(self.port, self.reg, self.val))
-        return self._msgbus.mm_msgbus_reg_write(self.port, self.reg, self.val)

-
-
[docs]    def msgbus_message(self):
-        self.logger.log("[CHIPSEC] msgbus message: port 0x{:02X} + 0x{:08X}, opcode: 0x{:02X}".format(self.port, self.reg, self.opcode))
-        if self.val is not None:
-            self.logger.log("[CHIPSEC]                 Data: 0x{:08X}".format(self.val))
-        return self._msgbus.msgbus_send_message(self.port, self.reg, self.opcode, self.val)

-
-
[docs]    def run(self):
-        self._msgbus = self.cs.msgbus
-
-        res = self.func()
-
-        if res is not None:
-            self.logger.log("[CHIPSEC] Result: 0x{:08X}".format(res))

-
-
-commands = {'msgbus': MsgBusCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/msr_cmd.html b/_modules/chipsec/utilcmd/msr_cmd.html deleted file mode 100644 index 227268dc..00000000 --- a/_modules/chipsec/utilcmd/msr_cmd.html +++ /dev/null @@ -1,202 +0,0 @@ - - - - - - - - chipsec.utilcmd.msr_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.msr_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The msr command allows direct access to read and write MSRs.
-
->>> chipsec_util msr <msr> [eax] [edx] [thread_id]
-
-Examples:
-
->>> chipsec_util msr 0x3A
->>> chipsec_util msr 0x3A 0x0
->>> chipsec_util msr 0x8B 0x0 0x0 0x0
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from argparse import ArgumentParser
-
-
-# CPU Model Specific Registers
-
[docs]class MSRCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util msr', usage=__doc__)
-        parser.add_argument('msr_addr', type=lambda x: int(x, 0), metavar='<msr>', help='MSR address')
-        parser.add_argument('msr_input1', type=lambda x: int(x, 0), metavar='MSR Value', nargs='?', default=None, help='EAX (Low)')
-        parser.add_argument('msr_input2', type=lambda x: int(x, 0), metavar='MSR Value', nargs='?', default=None, help='EDX (High)')
-        parser.add_argument('thread_id', type=lambda x: int(x, 0), metavar='Thread ID', nargs='?', default=None, help='Thread ID')
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def run(self):
-        if self.msr_input1 is None:
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                (eax, edx) = self.cs.msr.read_msr(tid, self.msr_addr)
-                val64 = ((edx << 32) | eax)
-                self.logger.log("[CHIPSEC] CPU{:d}: RDMSR( 0x{:x} ) = {:016X} (EAX={:08X}, EDX={:08X})".format(tid, self.msr_addr, val64, eax, edx))
-        elif self.msr_input2 is None:
-            cpu_thread_id = self.msr_input1
-            (eax, edx) = self.cs.msr.read_msr(cpu_thread_id, self.msr_addr)
-            val64 = ((edx << 32) | eax)
-            self.logger.log("[CHIPSEC] CPU{:d}: RDMSR( 0x{:x} ) = {:016X} (EAX={:08X}, EDX={:08X})".format(cpu_thread_id, self.msr_addr, val64, eax, edx))
-        else:
-            eax = self.msr_input1
-            edx = self.msr_input2
-            val64 = ((edx << 32) | eax)
-            if self.thread_id is None:
-                self.logger.log("[CHIPSEC] All CPUs: WRMSR( 0x{:x} ) = {:016X}".format(self.msr_addr, val64))
-                for tid in range(self.cs.msr.get_cpu_thread_count()):
-                    self.cs.msr.write_msr(tid, self.msr_addr, eax, edx)
-            else:
-                cpu_thread_id = self.thread_id
-                self.logger.log("[CHIPSEC] CPU{:d}: WRMSR( 0x{:x} ) = {:016X}".format(cpu_thread_id, self.msr_addr, val64))
-                self.cs.msr.write_msr(cpu_thread_id, self.msr_addr, eax, edx)

-
-
-commands = {'msr': MSRCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/pci_cmd.html b/_modules/chipsec/utilcmd/pci_cmd.html deleted file mode 100644 index bc7c5358..00000000 --- a/_modules/chipsec/utilcmd/pci_cmd.html +++ /dev/null @@ -1,321 +0,0 @@ - - - - - - - - chipsec.utilcmd.pci_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.pci_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The pci command can enumerate PCI/PCIe devices, enumerate expansion ROMs and allow direct access to PCI configuration registers via bus/device/function.
-
->>> chipsec_util pci enumerate
->>> chipsec_util pci read <bus> <device> <function> <offset> [width]
->>> chipsec_util pci write <bus> <device> <function> <offset> <width> <value>
->>> chipsec_util pci dump [<bus>] [<device>] [<function>]
->>> chipsec_util pci xrom [<bus>] [<device>] [<function>] [xrom_address]
->>> chipsec_util pci cmd [mask] [class] [subclass]
-
-Examples:
-
->>> chipsec_util pci enumerate
->>> chipsec_util pci read 0 0 0 0x00
->>> chipsec_util pci read 0 0 0 0x88 byte
->>> chipsec_util pci write 0 0x1F 0 0xDC 1 0x1
->>> chipsec_util pci write 0 0 0 0x98 dword 0x004E0040
->>> chipsec_util pci dump
->>> chipsec_util pci dump 0 0 0
->>> chipsec_util pci xrom
->>> chipsec_util pci xrom 3 0 0 0xFEDF0000
->>> chipsec_util pci cmd
->>> chipsec_util pci cmd 1
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.logger import pretty_print_hex_buffer
-from argparse import ArgumentParser
-from chipsec_util import get_option_width, is_option_valid_width, CMD_OPTS_WIDTH
-from chipsec.hal.pci import print_pci_devices, print_pci_XROMs
-from chipsec.hal.pci import PCI_HDR_CLS_OFF, PCI_HDR_SUB_CLS_OFF, PCI_HDR_CMD_OFF
-
-# PCIe Devices and Configuration Registers
-
-
-
[docs]class PCICommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util pci', usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_enumerate = subparsers.add_parser('enumerate')
-        parser_enumerate.set_defaults(func=self.pci_enumerate)
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('bus', type=lambda x: int(x, 16), help='Bus (hex)')
-        parser_read.add_argument('device', type=lambda x: int(x, 16), help='Device (hex)')
-        parser_read.add_argument('function', type=lambda x: int(x, 16), help='Function (hex)')
-        parser_read.add_argument('offset', type=lambda x: int(x, 16), help='Offset (hex)')
-        parser_read.add_argument('size', type=str, default=None, nargs='?', help='Width')
-        parser_read.set_defaults(func=self.pci_read)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('bus', type=lambda x: int(x, 16), help='Bus (hex)')
-        parser_write.add_argument('device', type=lambda x: int(x, 16), help='Device (hex)')
-        parser_write.add_argument('function', type=lambda x: int(x, 16), help='Function (hex)')
-        parser_write.add_argument('offset', type=lambda x: int(x, 16), help='Offset (hex)')
-        parser_write.add_argument('size', type=str, help='Width')
-        parser_write.add_argument('value', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_write.set_defaults(func=self.pci_write)
-
-        parser_dump = subparsers.add_parser('dump')
-        parser_dump.add_argument('bus', type=lambda x: int(x, 16), nargs='?', default=None, help='Bus (hex)')
-        parser_dump.add_argument('device', type=lambda x: int(x, 16), nargs='?', default=None, help='Device (hex)')
-        parser_dump.add_argument('function', type=lambda x: int(x, 16), nargs='?', default=None, help='Function (hex)')
-        parser_dump.set_defaults(func=self.pci_dump)
-
-        parser_xrom = subparsers.add_parser('xrom')
-        parser_xrom.add_argument('bus', type=lambda x: int(x, 16), nargs='?', default=None, help='Bus (hex)')
-        parser_xrom.add_argument('device', type=lambda x: int(x, 16), nargs='?', default=None, help='Device (hex)')
-        parser_xrom.add_argument('function', type=lambda x: int(x, 16), nargs='?', default=None, help='Function (hex)')
-        parser_xrom.add_argument('xrom_addr', type=lambda x: int(x, 16), nargs='?', default=None, help='XROM Address (hex)')
-        parser_xrom.set_defaults(func=self.pci_xrom)
-
-        parser_cmd = subparsers.add_parser('cmd')
-        parser_cmd.add_argument('cmd_mask', type=lambda x: int(x, 16), default=0xFFFF, nargs='?', help='Mask (hex)')
-        parser_cmd.add_argument('pci_class', type=lambda x: int(x, 16), default=None, nargs='?', help='Class (hex)')
-        parser_cmd.add_argument('pci_sub_class', type=lambda x: int(x, 16), default=None, nargs='?', help='Subclass (hex)')
-        parser_cmd.set_defaults(func=self.pci_cmd)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def pci_enumerate(self):
-        self.logger.log("[CHIPSEC] Enumerating available PCIe devices...")
-        print_pci_devices(self.cs.pci.enumerate_devices())

-
-
[docs]    def pci_dump(self):
-        if self.bus is not None:
-            if self.device is not None and self.function is not None:
-                devices = [(self.bus, self.device, self.function, 0x0000, 0x0000, 0x0000)]
-            else:
-                devices = self.cs.pci.enumerate_devices(self.bus, self.device, self.function)
-
-            for (_bus, _device, _function, _vid, _did, _rid) in devices:
-                self.logger.log("[CHIPSEC] PCI device {:02X}:{:02X}.{:02X} configuration:".format(_bus, _device, _function))
-                cfg_buf = self.cs.pci.dump_pci_config(_bus, _device, _function)
-                pretty_print_hex_buffer(cfg_buf)
-        else:
-            self.logger.log("[CHIPSEC] Dumping configuration of available PCI devices...")
-            self.cs.pci.print_pci_config_all()

-
-
[docs]    def pci_xrom(self):
-        if self.bus is not None:
-            if self.device is not None and self.function is not None:
-                devices = [(self.bus, self.device, self.function, 0x0000, 0x0000, 0x000)]
-            else:
-                devices = self.cs.pci.enumerate_devices(self.bus, self.device, self.function)
-
-            for (_bus, _device, _function, _vid, _did, _rid) in devices:
-                self.logger.log("[CHIPSEC] Locating PCI expansion ROM (XROM) of {:02X}:{:02X}.{:02X}...".format(_bus, _device, _function))
-                exists, xrom = self.cs.pci.find_XROM(_bus, _device, _function, True, True, self.xrom_addr)
-                if exists:
-                    self.logger.log("[CHIPSEC] Found XROM of {:02X}:{:02X}.{:02X}".format(_bus, _device, _function))
-                    if xrom is not None:
-                        self.logger.log("[CHIPSEC] XROM enabled = {:d}, base = 0x{:08X}, size = 0x{:08X}".format(xrom.en, xrom.base, xrom.size))
-                        if xrom.header is not None:
-                            self.logger.log("[CHIPSEC] XROM header: {}".format(xrom.header))
-                else:
-                    self.logger.log("[CHIPSEC] Couldn't find XROM of {:02X}:{:02X}.{:02X}".format(_bus, _device, _function))
-        else:
-            self.logger.log("[CHIPSEC] Enumerating PCI expansion ROMs...")
-            _xroms = self.cs.pci.enumerate_xroms(True, True, self.xrom_addr)
-            self.logger.log("[CHIPSEC] found {:d} PCI expansion ROMs".format(len(_xroms)))
-            if len(_xroms) > 0:
-                print_pci_XROMs(_xroms)

-
-
[docs]    def pci_read(self):
-        width = 4
-        if self.size is not None:
-            width = get_option_width(self.size) if is_option_valid_width(self.size) else int(self.size, 16)
-
-        if 1 == width:
-            pci_value = self.cs.pci.read_byte(self.bus, self.device, self.function, self.offset)
-        elif 2 == width:
-            pci_value = self.cs.pci.read_word(self.bus, self.device, self.function, self.offset)
-        elif 4 == width:
-            pci_value = self.cs.pci.read_dword(self.bus, self.device, self.function, self.offset)
-        else:
-            self.logger.log_error("Width should be one of {}".format(CMD_OPTS_WIDTH))
-            return
-        self.logger.log("[CHIPSEC] PCI {:02X}:{:02X}.{:02X} + 0x{:02X}: 0x{:X}".format(self.bus, self.device, self.function, self.offset, pci_value))

-
-
[docs]    def pci_write(self):
-        width = get_option_width(self.size) if is_option_valid_width(self.size) else int(self.size, 16)
-
-        if 1 == width:
-            self.cs.pci.write_byte(self.bus, self.device, self.function, self.offset, self.value)
-        elif 2 == width:
-            self.cs.pci.write_word(self.bus, self.device, self.function, self.offset, self.value)
-        elif 4 == width:
-            self.cs.pci.write_dword(self.bus, self.device, self.function, self.offset, self.value)
-        else:
-            self.logger.log_error("Width should be one of {}".format(CMD_OPTS_WIDTH))
-            return
-        self.logger.log("[CHIPSEC] Write 0x{:X} to PCI {:02X}:{:02X}.{:02X} + 0x{:02X}".format(self.value, self.bus, self.device, self.function, self.offset))

-
-
[docs]    def pci_cmd(self):
-        self.logger.log('BDF     | VID:DID   | CMD  | CLS | Sub CLS')
-        self.logger.log('------------------------------------------')
-        for (b, d, f, vid, did, rid) in self.cs.pci.enumerate_devices():
-            dev_cls = self.cs.pci.read_byte(b, d, f, PCI_HDR_CLS_OFF)
-            if self.pci_class is not None and (dev_cls != self.pci_class):
-                continue
-            dev_sub_cls = self.cs.pci.read_byte(b, d, f, PCI_HDR_SUB_CLS_OFF)
-            if self.pci_sub_class is not None and (dev_sub_cls != self.pci_sub_class):
-                continue
-            cmd_reg = self.cs.pci.read_word(b, d, f, PCI_HDR_CMD_OFF)
-            if (cmd_reg & self.cmd_mask) == 0:
-                continue
-            self.logger.log('{:02X}:{:02X}.{:X} | {:04X}:{:04X} | {:04X} | {:02X}  | {:02X}'.format(b, d, f, vid, did, cmd_reg, dev_cls, dev_sub_cls))

-
-
-commands = {'pci': PCICommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/reg_cmd.html b/_modules/chipsec/utilcmd/reg_cmd.html deleted file mode 100644 index efc250f2..00000000 --- a/_modules/chipsec/utilcmd/reg_cmd.html +++ /dev/null @@ -1,249 +0,0 @@ - - - - - - - - chipsec.utilcmd.reg_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.reg_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2017, Google
-# Copyright (c) 2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-
-"""
->>> chipsec_util reg read <reg_name> [<field_name>]
->>> chipsec_util reg read_field <reg_name> <field_name>
->>> chipsec_util reg write <reg_name> <value>
->>> chipsec_util reg write_field <reg_name> <field_name> <value>
->>> chipsec_util reg get_control <control_name>
->>> chipsec_util reg set_control <control_name> <value>
-
-Examples:
-
->>> chipsec_util reg read SMBUS_VID
->>> chipsec_util reg read HSFC FGO
->>> chipsec_util reg read_field HSFC FGO
->>> chipsec_util reg write SMBUS_VID 0x8088
->>> chipsec_util reg write_field BC BLE 0x1
->>> chipsec_util reg get_control BiosWriteEnable
->>> chipsec_util reg set_control BiosLockEnable 0x1
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from argparse import ArgumentParser
-
-
-
[docs]class RegisterCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util reg', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('reg_name', type=str, help='Register name')
-        parser_read.add_argument('field_name', type=str, nargs='?', default=None, help='Field name')
-        parser_read.set_defaults(func=self.reg_read)
-
-        parser_readfield = subparsers.add_parser('read_field')
-        parser_readfield.add_argument('reg_name', type=str, help='Register name')
-        parser_readfield.add_argument('field_name', type=str, help='Field name')
-        parser_readfield.set_defaults(func=self.reg_read_field)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('reg_name', type=str, help='Register name')
-        parser_write.add_argument('value', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_write.set_defaults(func=self.reg_write)
-
-        parser_writefield = subparsers.add_parser('write_field')
-        parser_writefield.add_argument('reg_name', type=str, help='Register name')
-        parser_writefield.add_argument('field_name', type=str, help='Field name')
-        parser_writefield.add_argument('value', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_writefield.set_defaults(func=self.reg_write_field)
-
-        parser_getcontrol = subparsers.add_parser('get_control')
-        parser_getcontrol.add_argument('control_name', type=str, help='Control name')
-        parser_getcontrol.set_defaults(func=self.reg_get_control)
-
-        parser_setcontrol = subparsers.add_parser('set_control')
-        parser_setcontrol.add_argument('control_name', type=str, help='Control name')
-        parser_setcontrol.add_argument('value', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_setcontrol.set_defaults(func=self.reg_set_control)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def reg_read(self):
-        if self.field_name is not None:
-            value = self.cs.read_register_field(self.reg_name, self.field_name)
-            self.logger.log("[CHIPSEC] {}.{}=0x{:X}".format(self.reg_name, self.field_name, value))
-        else:
-            value = self.cs.read_register(self.reg_name)
-            self.logger.log("[CHIPSEC] {}=0x{:X}".format(self.reg_name, value))
-            self.cs.print_register(self.reg_name, value)

-
-
[docs]    def reg_read_field(self):
-        if self.cs.register_has_field(self.reg_name, self.field_name):
-            value = self.cs.read_register_field(self.reg_name, self.field_name)
-            self.logger.log("[CHIPSEC] {}.{}=0x{:X}".format(self.reg_name, self.field_name, value))
-        else:
-            self.logger.log_error("[CHIPSEC] Register '{}' doesn't have field '{}' defined".format(self.reg_name, self.field_name))

-
-
[docs]    def reg_write(self):
-        self.logger.log("[CHIPSEC] Writing {} < 0x{:X}".format(self.reg_name, self.value))
-        self.cs.write_register(self.reg_name, self.value)

-
-
[docs]    def reg_write_field(self):
-        if self.cs.register_has_field(self.reg_name, self.field_name):
-            self.logger.log("[CHIPSEC] Writing {}.{} < 0x{:X}".format(self.reg_name, self.field_name, self.value))
-            self.cs.write_register_field(self.reg_name, self.field_name, self.value)
-        else:
-            self.logger.log_error("[CHIPSEC] Register '{}' doesn't have field '{}' defined".format(self.reg_name, self.field_name))

-
-
[docs]    def reg_get_control(self):
-        if self.cs.is_control_defined(self.control_name):
-            value = self.cs.get_control(self.control_name)
-            self.logger.log("[CHIPSEC] {} = 0x{:X}".format(self.control_name, value))
-        else:
-            self.logger.log_error("[CHIPSEC] Control '{}' isn't defined".format(self.control_name))

-
-
[docs]    def reg_set_control(self):
-        if self.cs.is_control_defined(self.control_name):
-            self.cs.set_control(self.control_name, self.value)
-            self.logger.log("[CHIPSEC] Setting control {} < 0x{:X}".format(self.control_name, self.value))
-        else:
-            self.logger.log_error("[CHIPSEC] Control '{}' isn't defined".format(self.control_name))

-
-commands = {'reg': RegisterCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/smbios_cmd.html b/_modules/chipsec/utilcmd/smbios_cmd.html deleted file mode 100644 index bb73a86d..00000000 --- a/_modules/chipsec/utilcmd/smbios_cmd.html +++ /dev/null @@ -1,236 +0,0 @@ - - - - - - - - chipsec.utilcmd.smbios_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.smbios_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2019-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util smbios entrypoint
->>> chipsec_util smbios get [raw|decoded] [type]
-
-Examples:
-
->>> chipsec_util smbios entrypoint
->>> chipsec_util smbios get raw
-"""
-
-from argparse import ArgumentParser
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.smbios import SMBIOS
-from chipsec.logger import print_buffer_bytes
-from chipsec.options import Options
-
-
[docs]class smbios_cmd(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        options = Options()
-        try:
-            default_type = options.get_section_data('Util_Config', 'smbios_get_type')
-        except Exception:
-            default_type = 'raw'
-
-        parser = ArgumentParser(prog='chipsec_util smbios', usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_entrypoint = subparsers.add_parser('entrypoint')
-        parser_entrypoint.set_defaults(func=self.smbios_ep)
-        parser_get = subparsers.add_parser('get')
-        parser_get.add_argument('method', choices=['raw', 'decoded'], default=default_type, nargs='?',
-                                help='Get raw data or decoded data.  Decoded data may not exist for all structures')
-        parser_get.add_argument('type', type=int, default=None, nargs='?',
-                                help='SMBIOS type to search for')
-        parser_get.add_argument('-f', '--force', action='store_true', dest='_force_32',
-                                help='Force reading from 32bit structures')
-        parser_get.set_defaults(func=self.smbios_get)
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def smbios_ep(self):
-        self.logger.log('[CHIPSEC] SMBIOS Entry Point Structures')
-        if self.smbios.smbios_2_pa is not None:
-            self.logger.log(self.smbios.smbios_2_ep)
-        if self.smbios.smbios_3_pa is not None:
-            self.logger.log(self.smbios.smbios_3_ep)

-
-
[docs]    def smbios_get(self):
-        if self.method == 'raw':
-            self.logger.log('[CHIPSEC] Dumping all requested structures in raw format')
-            structs = self.smbios.get_raw_structs(self.type, self._force_32)
-        elif self.method == 'decoded':
-            self.logger.log('[CHIPSEC] Dumping all requested structures in decoded format')
-            structs = self.smbios.get_decoded_structs(self.type, self._force_32)
-        if structs is None:
-            self.logger.log('[CHIPSEC] Error getting data')
-            return
-        if len(structs) == 0:
-            self.logger.log('[CHIPSEC] Structures not found')
-            return
-
-        for data in structs:
-            if self.method == 'raw':
-                header = self.smbios.get_header(data)
-                if header is not None:
-                    self.logger.log(header)
-                self.logger.log('[CHIPSEC] Raw Data')
-                print_buffer_bytes(data)
-            elif self.method == 'decoded':
-                self.logger.log(data)
-            self.logger.log('==================================================================')

-
-
[docs]    def run(self):
-        # Create and initialize SMBIOS object for commands to use
-        try:
-            self.logger.log('[CHIPSEC] Attempting to detect SMBIOS structures')
-            self.smbios = SMBIOS(self.cs)
-            found = self.smbios.find_smbios_table()
-            if not found:
-                self.logger.log('[CHIPSEC] Unable to detect SMBIOS structure(s)')
-                return
-        except Exception as e:
-            self.logger.log(e)
-            return
-
-        self.func()

-
-
-commands = {'smbios': smbios_cmd}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/smbus_cmd.html b/_modules/chipsec/utilcmd/smbus_cmd.html deleted file mode 100644 index 2012435c..00000000 --- a/_modules/chipsec/utilcmd/smbus_cmd.html +++ /dev/null @@ -1,207 +0,0 @@ - - - - - - - - chipsec.utilcmd.smbus_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.smbus_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util smbus read <device_addr> <start_offset> [size]
->>> chipsec_util smbus write <device_addr> <offset> <byte_val>
-
-Examples:
-
->>> chipsec_util smbus read 0xA0 0x0 0x100
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.logger import print_buffer_bytes
-from chipsec.hal.smbus import SMBus
-from argparse import ArgumentParser
-
-
-
[docs]class SMBusCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util smbus', usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('dev_addr', type=lambda x: int(x, 16), help='Start Address (hex)')
-        parser_read.add_argument('start_off', type=lambda x: int(x, 16), help='Start Offset (hex)')
-        parser_read.add_argument('size', type=lambda x: int(x, 16), default=None, nargs='?', help='Size [Default=Byte] (hex)')
-        parser_read.set_defaults(func=self.smbus_read)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('dev_addr', type=lambda x: int(x, 16), help='Start Address (hex)')
-        parser_write.add_argument('off', type=lambda x: int(x, 16), help='Start Offset (hex)')
-        parser_write.add_argument('val', type=lambda x: int(x, 16), help='Byte Value (hex)')
-        parser_write.set_defaults(func=self.smbus_write)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._smbus = SMBus(self.cs)

-
-
[docs]    def smbus_read(self):
-        if self.size is not None:
-            buf = self._smbus.read_range(self.dev_addr, self.start_off, self.size)
-            self.logger.log("[CHIPSEC] SMBus read: device 0x{:X} offset 0x{:X} size 0x{:X}".format(self.dev_addr, self.start_off, self.size))
-            print_buffer_bytes(buf)
-        else:
-            val = self._smbus.read_byte(self.dev_addr, self.start_off)
-            self.logger.log("[CHIPSEC] SMBus read: device 0x{:X} offset 0x{:X} = 0x{:X}".format(self.dev_addr, self.start_off, val))

-
-
[docs]    def smbus_write(self):
-        self.logger.log("[CHIPSEC] SMBus write: device 0x{:X} offset 0x{:X} = 0x{:X}".format(self.dev_addr, self.off, self.val))
-        self._smbus.write_byte(self.dev_addr, self.off, self.val)

-
-
[docs]    def run(self):
-        if not self._smbus.is_SMBus_supported():
-            self.logger.log("[CHIPSEC] SMBus controller is not supported")
-            return
-        self._smbus.display_SMBus_info()
-        self.func()

-
-
-commands = {'smbus': SMBusCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/spd_cmd.html b/_modules/chipsec/utilcmd/spd_cmd.html deleted file mode 100644 index f91dcadb..00000000 --- a/_modules/chipsec/utilcmd/spd_cmd.html +++ /dev/null @@ -1,253 +0,0 @@ - - - - - - - - chipsec.utilcmd.spd_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.spd_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util spd detect
->>> chipsec_util spd dump [device_addr]
->>> chipsec_util spd read <device_addr> <offset>
->>> chipsec_util spd write <device_addr> <offset> <byte_val>
-
-Examples:
-
->>> chipsec_util spd detect
->>> chipsec_util spd dump DIMM0
->>> chipsec_util spd dump 0xA0
->>> chipsec_util spd read DIMM2 0x0
->>> chipsec_util spd read 0xA0 0x0
->>> chipsec_util spd write 0xA0 0x0 0xAA
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal import smbus, spd
-from argparse import ArgumentParser
-
-
-
[docs]class SPDCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_detect = subparsers.add_parser('detect')
-        parser_detect.set_defaults(func=self.spd_detect)
-
-        parser_dump = subparsers.add_parser('dump')
-        parser_dump.add_argument('dev', type=str, nargs='?', default=None, help="Device")
-        parser_dump.set_defaults(func=self.spd_dump)
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('dev', type=str, help="Device Address")
-        parser_read.add_argument('off', type=lambda x: int(x, 16), nargs='?', default=None, help="Offset (hex)")
-        parser_read.set_defaults(func=self.spd_read)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('dev', type=str, help="Device Address")
-        parser_write.add_argument('off', type=lambda x: int(x, 16), help="Offset (hex)")
-        parser_write.add_argument('val', type=lambda x: int(x, 16), help="Byte Value (hex)")
-        parser_write.set_defaults(func=self.spd_write)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def spd_detect(self):
-        self.logger.log("[CHIPSEC] Searching for DIMMs with SPD...")
-        _dimms = self._spd.detect()
-        if _dimms is not None:
-            self.logger.log("Detected the following SPD devices:")
-            for _dimm in _dimms:
-                self.logger.log("{}: 0x{:02X}".format(spd.SPD_DIMMS[_dimm], _dimm))
-        else:
-            self.logger.log("Unable to detect SPD devices.")

-
-
[docs]    def spd_dump(self):
-        if self.dev is not None:
-            _dev = self.dev.upper()
-            self.dev_addr = spd.SPD_DIMM_ADDRESSES[_dev] if _dev in spd.SPD_DIMM_ADDRESSES else int(self.dev, 16)
-            if not self._spd.isSPDPresent(self.dev_addr):
-                self.logger.log("[CHIPSEC] SPD for DIMM 0x{:X} is not found".format(self.dev_addr))
-                return
-            self._spd.decode(self.dev_addr)
-        else:
-            _dimms = self._spd.detect()
-            for _dimm in _dimms:
-                self._spd.decode(_dimm)

-
-
[docs]    def spd_read(self):
-        _dev = self.dev.upper()
-        self.dev_addr = spd.SPD_DIMM_ADDRESSES[_dev] if _dev in spd.SPD_DIMM_ADDRESSES else int(self.dev, 16)
-        if not self._spd.isSPDPresent(self.dev_addr):
-            self.logger.log("[CHIPSEC] SPD for DIMM 0x{:X} is not found".format(self.dev_addr))
-            return
-
-        val = self._spd.read_byte(self.off, self.dev_addr)
-        self.logger.log("[CHIPSEC] SPD read: offset 0x{:X} = 0x{:X}".format(self.off, val))

-
-
[docs]    def spd_write(self):
-        _dev = self.dev.upper()
-        self.dev_addr = spd.SPD_DIMM_ADDRESSES[_dev] if _dev in spd.SPD_DIMM_ADDRESSES else int(self.dev, 16)
-        if not self._spd.isSPDPresent(self.dev_addr):
-            self.logger.log("[CHIPSEC] SPD for DIMM 0x{:X} is not found".format(self.dev_addr))
-            return
-
-        self.logger.log("[CHIPSEC] SPD write: offset 0x{:X} = 0x{:X}".format(self.off, self.val))
-        self._spd.write_byte(self.off, self.val, self.dev_addr)

-
-
[docs]    def run(self):
-        try:
-            _smbus = smbus.SMBus(self.cs)
-            self._spd = spd.SPD(_smbus)
-        except BaseException as msg:
-            self.logger.log_error(msg)
-            return
-        if not _smbus.is_SMBus_supported():
-            self.logger.log("[CHIPSEC] SMBus controller is not supported")
-            return
-        self.dev_addr = spd.SPD_SMBUS_ADDRESS
-        self.func()

-
-
-commands = {'spd': SPDCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/spi_cmd.html b/_modules/chipsec/utilcmd/spi_cmd.html deleted file mode 100644 index 24285132..00000000 --- a/_modules/chipsec/utilcmd/spi_cmd.html +++ /dev/null @@ -1,303 +0,0 @@ - - - - - - - - chipsec.utilcmd.spi_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.spi_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-CHIPSEC includes functionality for reading and writing the SPI flash. When an image file is created from reading the SPI flash, this image can be parsed to reveal sections, files, variables, etc.
-
-.. warning:: Particular care must be taken when using the SPI write and SPI erase functions. These could make your system unbootable.
-
-A basic forensic operation might be to dump the entire SPI flash to a file. This is accomplished as follows:
-
-``# python chipsec_util.py spi dump rom.bin``
-
-The file rom.bin will contain the full binary of the SPI flash. It can then be parsed using the decode util command.
-
->>> chipsec_util spi info|dump|read|write|erase|disable-wp [flash_address] [length] [file]
-
-Examples:
-
->>> chipsec_util spi info
->>> chipsec_util spi dump rom.bin
->>> chipsec_util spi read 0x700000 0x100000 bios.bin
->>> chipsec_util spi write 0x0 flash_descriptor.bin
->>> chipsec_util spi disable-wp
->>> chipsec_util spi sfdp
->>> chipsec_util spi jedec
->>> chipsec_util spi jedec decode
-"""
-
-import os
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.spi import SPI, BIOS
-from chipsec.exceptions import SpiRuntimeError
-from argparse import ArgumentParser
-
-
-# SPI Flash Controller
-
[docs]class SPICommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util spi', usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_info = subparsers.add_parser('info')
-        parser_info.set_defaults(func=self.spi_info)
-
-        parser_dump = subparsers.add_parser('dump')
-        parser_dump.add_argument('out_file', type=str, nargs='?', default='rom.bin', help='Output file name [default=rom.bin]')
-        parser_dump.set_defaults(func=self.spi_dump)
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('spi_fla', type=lambda x: int(x, 16), help='Start Address (hex)')
-        parser_read.add_argument('length', type=lambda x: int(x, 16), nargs='?', default=0x4, help='Length [default=0x4] (hex)')
-        parser_read.add_argument('out_file', type=str, nargs='?', default='read.bin', help='Output file [default=read.bin')
-        parser_read.set_defaults(func=self.spi_read)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('spi_fla', type=lambda x: int(x, 16), help='Start Address (hex)')
-        parser_write.add_argument('filename', type=str, help='File name (hex)')
-        parser_write.set_defaults(func=self.spi_write)
-
-        parser_erase = subparsers.add_parser('erase')
-        parser_erase.add_argument('spi_fla', type=lambda x: int(x, 16), help='Start Address (hex)')
-        parser_erase.set_defaults(func=self.spi_erase)
-
-        parser_disable_wp = subparsers.add_parser('disable-wp')
-        parser_disable_wp.set_defaults(func=self.spi_disable_wp)
-
-        parser_sfdp = subparsers.add_parser('sfdp')
-        parser_sfdp.set_defaults(func=self.spi_sfdp)
-
-        parser_jedec = subparsers.add_parser('jedec')
-        parser_jedec.add_argument('option', type=str, nargs='?', default='', help='Optional decode')
-        parser_jedec.set_defaults(func=self.spi_jedec)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._spi = SPI(self.cs)
-        self._msg = "it may take a few minutes (use DEBUG or VERBOSE logger options to see progress)"

-
-
[docs]    def spi_info(self):
-        self.logger.log("[CHIPSEC] SPI flash memory information\n")
-        self._spi.display_SPI_map()

-
-
[docs]    def spi_dump(self):
-        self.logger.log("[CHIPSEC] Dumping entire SPI flash memory to '{}'".format(self.out_file))
-        self.logger.log("[CHIPSEC] {}".format(self._msg))
-        # @TODO: don't assume SPI Flash always ends with BIOS region
-        (base, limit, _) = self._spi.get_SPI_region(BIOS)
-        spi_size = limit + 1
-        self.logger.log("[CHIPSEC] BIOS region: base = 0x{:08X}, limit = 0x{:08X}".format(base, limit))
-        self.logger.log("[CHIPSEC] Dumping 0x{:08X} bytes (to the end of BIOS region)".format(spi_size))
-        buf = self._spi.read_spi_to_file(0, spi_size, self.out_file)
-        if buf is None:
-            self.logger.log_error("Dumping SPI Flash didn't return any data (turn on VERBOSE)")
-        else:
-            self.logger.log("[CHIPSEC] Completed SPI flash dump to '{}'".format(self.out_file))

-
-
[docs]    def spi_read(self):
-        self.logger.log("[CHIPSEC] Reading 0x{:x} bytes from SPI Flash starting at FLA = 0x{:X}".format(self.length, self.spi_fla))
-        self.logger.log("[CHIPSEC] {}".format(self._msg))
-        buf = self._spi.read_spi_to_file(self.spi_fla, self.length, self.out_file)
-        if buf is None:
-            self.logger.log_error("SPI flash read didn't return any data (turn on VERBOSE)")
-        else:
-            self.logger.log("[CHIPSEC] Completed SPI flash memory read")

-
-
[docs]    def spi_write(self):
-        if not os.path.exists(self.filename):
-            self.logger.log_error("File '{}' doesn't exist".format(self.filename))
-            return
-        self.logger.log("[CHIPSEC] Writing to SPI flash memory at FLA = 0x{:X} from '{:64s}'".format(self.spi_fla, self.filename))
-
-        if self._spi.write_spi_from_file(self.spi_fla, self.filename):
-            self.logger.log("[CHIPSEC] Completed SPI flash memory write")
-        else:
-            self.logger.log_warning("SPI flash write returned error (turn on VERBOSE)")

-
-
[docs]    def spi_erase(self):
-        self.logger.log("[CHIPSEC] Erasing SPI flash memory block at FLA = 0x{:X}".format(self.spi_fla))
-
-        if self._spi.erase_spi_block(self.spi_fla):
-            self.logger.log_good("Completed SPI flash memory erase")
-        else:
-            self.logger.log_warning("SPI flash erase returned error (turn on VERBOSE)")

-
-
[docs]    def spi_disable_wp(self):
-        self.logger.log("[CHIPSEC] Trying to disable BIOS write protection..")
-        #
-        # This write protection only matters for BIOS range in SPI flash memory
-        #
-        if self._spi.disable_BIOS_write_protection():
-            self.logger.log_good("BIOS region write protection is disabled in SPI flash")
-        else:
-            self.logger.log_bad("Couldn't disable BIOS region write protection in SPI flash")

-
-
[docs]    def spi_sfdp(self):
-        self._spi.get_SPI_SFDP()

-
-
[docs]    def spi_jedec(self):
-        if self.option.lower() == 'decode':
-            (jedec, man, part) = self._spi.get_SPI_JEDEC_ID_decoded()
-            if jedec is not False:
-                self.logger.log('    JEDEC ID     : 0x{:06X}'.format(jedec))
-                self.logger.log('    Manufacturer : 0x{:02X}     - {}'.format((jedec >> 16) & 0xFF, man))
-                self.logger.log('    Device       : 0x{:04X}   - {}'.format(jedec & 0xFFFF, part))
-                self.logger.log('')
-            else:
-                self.logger.log(' JEDEC ID command is not supported')
-        else:
-            jedec_id = self._spi.get_SPI_JEDEC_ID()
-            if jedec_id is not False:
-                self.logger.log('    JEDEC ID: 0x{:06X}'.format(jedec_id))
-                self.logger.log('')
-            else:
-                self.logger.log(' JEDEC ID command is not supported')

-
-commands = {'spi': SPICommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/spidesc_cmd.html b/_modules/chipsec/utilcmd/spidesc_cmd.html deleted file mode 100644 index 7b057d77..00000000 --- a/_modules/chipsec/utilcmd/spidesc_cmd.html +++ /dev/null @@ -1,179 +0,0 @@ - - - - - - - - chipsec.utilcmd.spidesc_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.spidesc_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util spidesc <rom>
-
-Examples:
-
->>> chipsec_util spidesc spi.bin
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.file import read_file
-from chipsec.hal.spi_descriptor import parse_spi_flash_descriptor
-from argparse import ArgumentParser
-
-
-
[docs]class SPIDescCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Config

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util spidesc', usage=__doc__)
-        parser.add_argument('fd_file', type=str, help='File name')
-        parser.set_defaults()
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def run(self):
-
-        self.logger.log("[CHIPSEC] Parsing SPI Flash Descriptor from file '{}'\n".format(self.fd_file))
-        fd = read_file(self.fd_file)
-        if fd:
-            parse_spi_flash_descriptor(self.cs, fd)

-
-
-commands = {'spidesc': SPIDescCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/tpm_cmd.html b/_modules/chipsec/utilcmd/tpm_cmd.html deleted file mode 100644 index 2a7e3f33..00000000 --- a/_modules/chipsec/utilcmd/tpm_cmd.html +++ /dev/null @@ -1,231 +0,0 @@ - - - - - - - - chipsec.utilcmd.tpm_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.tpm_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2017, Google Inc
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util tpm parse_log <file>
->>> chipsec_util tpm state <locality>
->>> chipsec_util tpm command <commandName> <locality> <command_parameters>
-
-locality: 0 | 1 | 2 | 3 | 4
-commands - parameters:
-pccrread - pcr number ( 0 - 23 )
-nvread - Index, Offset, Size
-startup - startup type ( 1 - 3 )
-continueselftest
-getcap - Capabilities Area, Size of Sub-capabilities, Sub-capabilities
-forceclear
-
-Examples:
-
->>> chipsec_util tpm parse_log binary_bios_measurements
->>> chipsec_util tpm state 0
->>> chipsec_util tpm command pcrread 0 17
->>> chipsec_util tpm command continueselftest 0
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal import tpm_eventlog
-from chipsec.hal import tpm
-from chipsec.exceptions import TpmRuntimeError
-from chipsec.testcase import ExitCode
-from argparse import ArgumentParser
-
-
-
[docs]class TPMCommand(BaseCommand):
-
-    no_driver_cmd = ['parse_log']
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_parse = subparsers.add_parser('parse_log')
-        parser_parse.add_argument('file', type=str, help='File name')
-        parser_parse.set_defaults(func=self.tpm_parse)
-
-        parser_command = subparsers.add_parser('command')
-        parser_command.add_argument('command_name', type=str, help='Command')
-        parser_command.add_argument('locality', type=str, choices=['0', '1', '2', '3', '4'], help='Locality')
-        parser_command.add_argument('command_parameters', nargs='*', type=int, help='Command Parameters')
-        parser_command.set_defaults(func=self.tpm_command)
-
-        parser_state = subparsers.add_parser('state')
-        parser_state.add_argument('locality', type=str, choices=['0', '1', '2', '3', '4'], help='Locality')
-        parser_state.set_defaults(func=self.tpm_state)
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def tpm_parse(self):
-        with open(self.file, 'rb') as log:
-            tpm_eventlog.parse(log)

-
-
[docs]    def tpm_command(self):
-        self._tpm.command(self.command_name, self.locality, self.command_parameters)

-
-
[docs]    def tpm_state(self):
-        self._tpm.dump_access(self.locality)
-        self._tpm.dump_status(self.locality)
-        self._tpm.dump_didvid(self.locality)
-        self._tpm.dump_rid(self.locality)
-        self._tpm.dump_intcap(self.locality)
-        self._tpm.dump_intenable(self.locality)

-
-
[docs]    def set_up(self):
-        if self.func != self.tpm_parse:
-            try:
-                self._tpm = tpm.TPM(self.cs)
-            except TpmRuntimeError as msg:
-                self.logger.log(msg)
-                return

-
-
[docs]    def run(self):
-        try:
-            self.func()
-        except Exception:
-            self.ExitCode = ExitCode.ERROR

-
-commands = {'tpm': TPMCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/txt_cmd.html b/_modules/chipsec/utilcmd/txt_cmd.html deleted file mode 100644 index 58ec3fe1..00000000 --- a/_modules/chipsec/utilcmd/txt_cmd.html +++ /dev/null @@ -1,297 +0,0 @@ - - - - - - - - chipsec.utilcmd.txt_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.txt_cmd

-# CHIPSEC: Platform Security Assessment Framework
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
-Command-line utility providing access to Intel TXT (Trusted Execution Technology) registers
-
-Usage:
-    >>> chipsec_util txt dump
-    >>> chipsec_util txt state
-"""
-
-from argparse import ArgumentParser
-from chipsec.command import BaseCommand, toLoad
-from chipsec.exceptions import HWAccessViolationError
-from chipsec.testcase import ExitCode
-import struct
-
-
-
[docs]class TXTCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.All

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_state = subparsers.add_parser('dump')
-        parser_state.set_defaults(func=self.txt_dump)
-        parser_state = subparsers.add_parser('state')
-        parser_state.set_defaults(func=self.txt_state)
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def txt_dump(self):
-        # Read TXT Public area as hexdump, with absolute address and skipping zeros
-        txt_public = self.cs.mem.read_physical_mem(0xfed30000, 0x1000)
-        has_skipped_line = False
-        for offset in range(0, len(txt_public), 16):
-            line_bytes = txt_public[offset:offset + 16]
-            if all(b == 0 for b in line_bytes):
-                has_skipped_line = True
-                continue
-            if has_skipped_line:
-                self.logger.log("[CHIPSEC] *")
-                has_skipped_line = False
-            line_hex = " ".join("{:02X}".format(b) for b in line_bytes)
-            self.logger.log("[CHIPSEC] {:08X}: {}".format(0xfed30000 + offset, line_hex))

-
-    def _log_register(self, reg_name):
-        """Log the content of a register with lines starting with [CHIPSEC]"""
-        reg_def = self.cs.get_register_def(reg_name)
-        value = self.cs.read_register(reg_name)
-        desc = reg_def["desc"]
-        if reg_def["type"] == "memory":
-            addr = reg_def["address"] + reg_def["offset"]
-            desc += ", at {:08X}".format(addr)
-        self.logger.log("[CHIPSEC] {} = 0x{:0{width}X} ({})".format(
-            reg_name, value, desc, width=reg_def['size'] * 2))
-
-        if 'FIELDS' in reg_def:
-            sorted_fields = sorted(reg_def['FIELDS'].items(), key=lambda field: int(field[1]['bit']))
-            for field_name, field_attrs in sorted_fields:
-                field_bit = int(field_attrs['bit'])
-                field_size = int(field_attrs['size'])
-                field_mask = (1 << field_size) - 1
-                field_value = (value >> field_bit) & field_mask
-                self.logger.log("[CHIPSEC]     [{:02d}] {:23} = {:X} << {}".format(
-                    field_bit, field_name, field_value, field_attrs['desc']))
-
-
[docs]    def txt_state(self):
-        """Dump Intel TXT state
-
-        This is similar to command "txt-stat" from Trusted Boot project
-        https://sourceforge.net/p/tboot/code/ci/v2.0.0/tree/utils/txt-stat.c
-        which was documented on
-        https://www.intel.com/content/dam/www/public/us/en/documents/guides/dell-one-stop-txt-activation-guide.pdf
-        and it is also similar to command "sl-stat" from TrenchBoot project
-        https://github.com/TrenchBoot/sltools/blob/842cfd041b7454727b363b72b6d4dcca9c00daca/sl-stat/sl-stat.c
-        """
-        # Read bits in CPUID
-        (eax, ebx, ecx, edx) = self.cs.cpu.cpuid(0x01, 0x00)
-        self.logger.log("[CHIPSEC] CPUID.01H.ECX[Bit 6] = {} << Safer Mode Extensions (SMX)".format((ecx >> 6) & 1))
-        self.logger.log("[CHIPSEC] CPUID.01H.ECX[Bit 5] = {} << Virtual Machine Extensions (VMX)".format((ecx >> 5) & 1))
-
-        # Read bits in CR4
-        cr4 = self.cs.cpu.read_cr(0, 4)
-        self.logger.log("[CHIPSEC] CR4.SMXE[Bit 14] = {} << Safer Mode Extensions Enable".format((cr4 >> 14) & 1))
-        self.logger.log("[CHIPSEC] CR4.VMXE[Bit 13] = {} << Virtual Machine Extensions Enable".format((cr4 >> 13) & 1))
-
-        # Read bits in MSR IA32_FEATURE_CONTROL
-        self._log_register("IA32_FEATURE_CONTROL")
-        self.logger.log("[CHIPSEC]")
-
-        # Read TXT Device ID
-        self._log_register("TXT_DIDVID")
-        self.logger.log("[CHIPSEC]")
-
-        # Read hashes of public keys
-        txt_pubkey = struct.pack("<QQQQ",
-                                 self.cs.read_register("TXT_PUBLIC_KEY_0"),
-                                 self.cs.read_register("TXT_PUBLIC_KEY_1"),
-                                 self.cs.read_register("TXT_PUBLIC_KEY_2"),
-                                 self.cs.read_register("TXT_PUBLIC_KEY_3"),
-                                 )
-        self.logger.log("[CHIPSEC] TXT Public Key Hash: {}".format(txt_pubkey.hex()))
-
-        try:
-            eax, edx = self.cs.msr.read_msr(0, 0x20)
-            pubkey_in_msr = struct.pack("<II", eax, edx)
-            eax, edx = self.cs.msr.read_msr(0, 0x21)
-            pubkey_in_msr += struct.pack("<II", eax, edx)
-            eax, edx = self.cs.msr.read_msr(0, 0x22)
-            pubkey_in_msr += struct.pack("<II", eax, edx)
-            eax, edx = self.cs.msr.read_msr(0, 0x23)
-            pubkey_in_msr += struct.pack("<II", eax, edx)
-            self.logger.log("[CHIPSEC] Public Key Hash in MSR[0x20...0x23]: {}".format(pubkey_in_msr.hex()))
-        except HWAccessViolationError as exc:
-            # Report the exception and continue
-            self.logger.log("[CHIPSEC] Unable to read Public Key Hash in MSR[0x20...0x23]: {}".format(exc))
-        self.logger.log("[CHIPSEC]")
-
-        # Read TXT status
-        self._log_register("TXT_STS")
-        self._log_register("TXT_ESTS")
-        self._log_register("TXT_E2STS")
-        self._log_register("TXT_ERRORCODE")
-        self.logger.log("[CHIPSEC]")
-        self._log_register("TXT_SPAD")
-        self._log_register("TXT_ACM_STATUS")
-        self._log_register("TXT_FIT")
-        self._log_register("TXT_SCRATCHPAD")
-        self.logger.log("[CHIPSEC]")
-
-        # Read memory area for TXT components
-        self._log_register("TXT_SINIT_BASE")
-        self._log_register("TXT_SINIT_SIZE")
-        self._log_register("TXT_MLE_JOIN")
-        self._log_register("TXT_HEAP_BASE")
-        self._log_register("TXT_HEAP_SIZE")
-        self._log_register("TXT_MSEG_BASE")
-        self._log_register("TXT_MSEG_SIZE")
-        self.logger.log("[CHIPSEC]")
-
-        # Read other registers in the TXT memory area
-        self._log_register("TXT_DPR")
-        self._log_register("TXT_VER_FSBIF")
-        self._log_register("TXT_VER_QPIIF")
-        self._log_register("TXT_PCH_DIDVID")
-        self._log_register("INSMM")

-
-
[docs]    def run(self):
-        try:
-            self.func()
-        except Exception:
-            self.ExitCode = ExitCode.ERROR

-
-commands = {'txt': TXTCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/ucode_cmd.html b/_modules/chipsec/utilcmd/ucode_cmd.html deleted file mode 100644 index fdc27abf..00000000 --- a/_modules/chipsec/utilcmd/ucode_cmd.html +++ /dev/null @@ -1,215 +0,0 @@ - - - - - - - - chipsec.utilcmd.ucode_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.ucode_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util ucode id|load|decode [ucode_update_file (in .PDB or .BIN format)] [cpu_id]
-
-Examples:
-
->>> chipsec_util ucode id
->>> chipsec_util ucode load ucode.bin 0
->>> chipsec_util ucode decode ucode.pdb
-"""
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.file import read_file
-from chipsec.hal.ucode import dump_ucode_update_header
-from argparse import ArgumentParser
-
-# ###################################################################
-#
-# Microcode patches
-#
-# ###################################################################
-
-
-
[docs]class UCodeCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-        parser_id = subparsers.add_parser('id')
-        parser_id.add_argument('cpu_thread_id', nargs='?', type=lambda x: int(x, 16), default=None, help='CPU ID (hex)')
-        parser_id.set_defaults(func=self.ucode_id)
-
-        parser_load = subparsers.add_parser('load')
-        parser_load.add_argument('ucode_filename', type=str, help='ucode file name (.PDB or .BIN format)')
-        parser_load.add_argument('cpu_thread_id', nargs='?', type=lambda x: int(x, 16), default=None, help='CPU ID (hex)')
-        parser_load.set_defaults(func=self.ucode_load)
-
-        parser_decode = subparsers.add_parser('decode')
-        parser_decode.add_argument('ucode_filename', type=str, help='ucode file name (.PDB format)')
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def ucode_id(self):
-        if self.cpu_thread_id is None:
-            for tid in range(self.cs.msr.get_cpu_thread_count()):
-                ucode_update_id = self.cs.ucode.ucode_update_id(tid)
-                self.logger.log("[CHIPSEC] CPU{:d}: Microcode update ID = 0x{:08X}".format(tid, ucode_update_id))
-        else:
-            ucode_update_id = self.cs.ucode.ucode_update_id(self.cpu_thread_id)
-            self.logger.log("[CHIPSEC] CPU{:d}: Microcode update ID = 0x{:08X}".format(self.cpu_thread_id, ucode_update_id))

-
-
[docs]    def ucode_load(self):
-        if self.cpu_thread_id is None:
-            self.logger.log("[CHIPSEC] Loading Microcode update on all cores from '{}'".format(self.ucode_filename))
-            self.cs.ucode.update_ucode_all_cpus(self.ucode_filename)
-        else:
-            self.logger.log("[CHIPSEC] Loading Microcode update on CPU{:d} from '{}'".format(self.cpu_thread_id, self.ucode_filename))
-            self.cs.ucode.update_ucode(self.cpu_thread_id, self.ucode_filename)

-
-
[docs]    def ucode_decode(self):
-        if (not self.ucode_filename.endswith('.pdb')):
-            self.logger.log("[CHIPSEC] Ucode update file is not PDB file: '{}'".format(self.ucode_filename))
-            return
-        pdb_ucode_buffer = read_file(self.ucode_filename)
-        self.logger.log("[CHIPSEC] Decoding Microcode Update header of PDB file: '{}'".format(self.ucode_filename))
-        dump_ucode_update_header(pdb_ucode_buffer)

-
-
-commands = {'ucode': UCodeCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/uefi_cmd.html b/_modules/chipsec/utilcmd/uefi_cmd.html deleted file mode 100644 index c5b3ac0e..00000000 --- a/_modules/chipsec/utilcmd/uefi_cmd.html +++ /dev/null @@ -1,561 +0,0 @@ - - - - - - - - chipsec.utilcmd.uefi_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.uefi_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The uefi command provides access to UEFI variables, both on the live system and in a SPI flash image file.
-
->>> chipsec_util uefi types
->>> chipsec_util uefi var-list
->>> chipsec_util uefi var-find <name>|<GUID>
->>> chipsec_util uefi var-read|var-write|var-delete <name> <GUID> <efi_variable_file>
->>> chipsec_util uefi decode <rom_file> [filetypes]
->>> chipsec_util uefi nvram[-auth] <rom_file> [fwtype]
->>> chipsec_util uefi keys <keyvar_file>
->>> chipsec_util uefi tables
->>> chipsec_util uefi s3bootscript [script_address]
->>> chipsec_util uefi assemble <GUID> freeform none|lzma|tiano <raw_file> <uefi_file>
->>> chipsec_util uefi insert_before|insert_after|replace|remove <GUID> <rom> <new_rom> <uefi_file>
-
-Examples:
-
->>> chipsec_util uefi types
->>> chipsec_util uefi var-list
->>> chipsec_util uefi var-find PK
->>> chipsec_util uefi var-read db D719B2CB-3D3A-4596-A3BC-DAD00E67656F db.bin
->>> chipsec_util uefi var-write db D719B2CB-3D3A-4596-A3BC-DAD00E67656F db.bin
->>> chipsec_util uefi var-delete db D719B2CB-3D3A-4596-A3BC-DAD00E67656F
->>> chipsec_util uefi decode uefi.rom
->>> chipsec_util uefi decode uefi.rom FV_MM
->>> chipsec_util uefi nvram uefi.rom vss_auth
->>> chipsec_util uefi keys db.bin
->>> chipsec_util uefi tables
->>> chipsec_util uefi s3bootscript
->>> chipsec_util uefi assemble AAAAAAAA-BBBB-CCCC-DDDD-EEEEEEEEEEEE freeform lzma uefi.raw mydriver.efi
->>> chipsec_util uefi replace  AAAAAAAA-BBBB-CCCC-DDDD-EEEEEEEEEEEE bios.bin new_bios.bin mydriver.efi
-"""
-
-import os
-import uuid
-from argparse import ArgumentParser
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.uefi_common import EFI_STATUS_DICT, parse_efivar_file
-from chipsec.file import write_file, read_file
-from chipsec.hal.spi_uefi import decode_uefi_region, modify_uefi_region, compress_image, CMD_UEFI_FILE_REPLACE
-from chipsec.hal.spi_uefi import CMD_UEFI_FILE_INSERT_AFTER, CMD_UEFI_FILE_INSERT_BEFORE, CMD_UEFI_FILE_REMOVE
-from chipsec.hal.uefi import UEFI, decode_EFI_variables, get_attr_string, identify_EFI_NVRAM
-from chipsec.hal.uefi import SECURE_BOOT_KEY_VARIABLES, parse_script, parse_EFI_variables
-from chipsec.hal.uefi_fv import get_guid_bin, assemble_uefi_file, assemble_uefi_section, assemble_uefi_raw
-from chipsec.hal.uefi_fv import FILE_TYPE_NAMES
-from chipsec.hal.uefi_platform import fw_types
-
-
-# Unified Extensible Firmware Interface (UEFI)
-
[docs]class UEFICommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        if 'decode' in self.argv:
-            return toLoad.Nil
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util uefi', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        # var-read command args
-        parser_var_read = subparsers.add_parser('var-read')
-        parser_var_read.add_argument('name', type=str, help='name of variable to read')
-        parser_var_read.add_argument('guid', type=str, help='guid of variable to read')
-        parser_var_read.add_argument('filename', type=str, nargs='?', default=None, help='output file to store read variable contents to')
-        parser_var_read.set_defaults(func=self.var_read)
-
-        # var-write command args
-        parser_var_write = subparsers.add_parser('var-write')
-        parser_var_write.add_argument('name', type=str, help='name of variable to write')
-        parser_var_write.add_argument('guid', type=str, help='guid of variable to write')
-        parser_var_write.add_argument('filename', type=str, help='input file containing data to write to variable')
-        parser_var_write.set_defaults(func=self.var_write)
-
-        # var-delete command args
-        parser_var_delete = subparsers.add_parser('var-delete')
-        parser_var_delete.add_argument('name', type=str, help='name of variable to delete')
-        parser_var_delete.add_argument('guid', type=str, help='guid of variable to delete')
-        parser_var_delete.set_defaults(func=self.var_delete)
-
-        # var-list command args
-        parser_var_list = subparsers.add_parser('var-list')
-        parser_var_list.set_defaults(func=self.var_list)
-
-        # var-find command args
-        parser_var_find = subparsers.add_parser('var-find')
-        parser_var_find.add_argument('name_guid', type=str, help='name or guid of variable to find')
-        parser_var_find.set_defaults(func=self.var_find)
-
-        # nvram command args
-        parser_nvram = subparsers.add_parser('nvram')
-        parser_nvram.add_argument('romfilename', type=str, help='nvram image')
-        parser_nvram.add_argument('fwtype', type=str, nargs='?', default=None)
-        parser_nvram.set_defaults(func=self.nvram)
-
-        # nvram-auth command args
-        parser_nvram_auth = subparsers.add_parser('nvram-auth')
-        parser_nvram_auth.add_argument('romfilename', type=str, help='nvram image')
-        parser_nvram_auth.add_argument('fwtype', type=str, nargs='?', default=None)
-        parser_nvram_auth.set_defaults(func=self.nvram_auth)
-
-        # decode command args
-        parser_decode = subparsers.add_parser('decode')
-        parser_decode.add_argument('filename', type=str, help='bios image to decompress')
-        parser_decode.add_argument('--fwtype', dest='fwtype', type=str, nargs='?', default=None)
-        parser_decode.add_argument('filetypes', type=str, nargs='*', default=[], help=FILE_TYPE_NAMES.values())
-        parser_decode.set_defaults(func=self.decode)
-
-        # keys command args
-        parser_keys = subparsers.add_parser('keys')
-        parser_keys.add_argument('filename', type=str, help='name of file containing variables')
-        parser_keys.set_defaults(func=self.keys)
-
-        # tables command args
-        parser_tables = subparsers.add_parser('tables')
-        parser_tables.set_defaults(func=self.tables)
-
-        # s3bootscript command args
-        parser_bootscript = subparsers.add_parser('s3bootscript')
-        parser_bootscript.set_defaults(func=self.s3bootscript)
-        parser_bootscript.add_argument('bootscript_pa', type=lambda x: int(x, 0), nargs='?', help='')
-
-        # insert-before command args
-        parser_insert_before = subparsers.add_parser('insert-before')
-        parser_insert_before.add_argument('guid', type=str, help='guid')
-        parser_insert_before.add_argument('filename', type=str, help='')
-        parser_insert_before.add_argument('new_file', type=str, help='')
-        parser_insert_before.add_argument('efi_file', type=str, help='')
-        parser_insert_before.set_defaults(func=self.insert_before)
-
-        # insert-after command args
-        parser_insert_after = subparsers.add_parser('insert-after')
-        parser_insert_after.add_argument('guid', type=str, help='guid')
-        parser_insert_after.add_argument('filename', type=str, help='')
-        parser_insert_after.add_argument('new_file', type=str, help='')
-        parser_insert_after.add_argument('efi_file', type=str, help='')
-        parser_insert_after.set_defaults(func=self.insert_after)
-
-        # replace command args
-        parser_replace = subparsers.add_parser('replace')
-        parser_replace.add_argument('guid', type=str, help='guid')
-        parser_replace.add_argument('filename', type=str, help='')
-        parser_replace.add_argument('new_file', type=str, help='')
-        parser_replace.add_argument('efi_file', type=str, help='')
-        parser_replace.set_defaults(func=self.replace)
-
-        # remove command args
-        parser_remove = subparsers.add_parser('remove')
-        parser_remove.add_argument('guid', type=str, help='guid')
-        parser_remove.add_argument('filename', type=str, help='')
-        parser_remove.add_argument('new_file', type=str, help='')
-        parser_remove.set_defaults(func=self.remove)
-
-        # assemble command args
-        parser_assemble = subparsers.add_parser('assemble')
-        parser_assemble.add_argument('guid', type=str, help='guid')
-        parser_assemble.add_argument('file_type', type=str, help='')
-        parser_assemble.add_argument('comp', type=str, help='')
-        parser_assemble.add_argument('raw_file', type=str, help='')
-        parser_assemble.add_argument('efi_file', type=str, help='')
-        parser_assemble.set_defaults(func=self.assemble)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._uefi = UEFI(self.cs)

-
-
[docs]    def var_read(self):
-        self.logger.log("[CHIPSEC] Reading EFI variable Name='{}' GUID={{{}}} to '{}' via Variable API..".format(self.name, self.guid, self.filename))
-        var = self._uefi.get_EFI_variable(self.name, self.guid, self.filename)

-
-
[docs]    def var_write(self):
-        self.logger.log("[CHIPSEC] writing EFI variable Name='{}' GUID={{{}}} from '{}' via Variable API..".format(self.name, self.guid, self.filename))
-        status = self._uefi.set_EFI_variable_from_file(self.name, self.guid, self.filename)
-        self.logger.log("[CHIPSEC] status: {}".format(EFI_STATUS_DICT[status]))
-        if status == 0:
-            self.logger.log("[CHIPSEC] writing EFI variable was successful")
-        else:
-            self.logger.log_error("writing EFI variable failed")

-
-
[docs]    def var_delete(self):
-        self.logger.log("[CHIPSEC] Deleting EFI variable Name='{}' GUID={{{}}} via Variable API..".format(self.name, self.guid))
-        status = self._uefi.delete_EFI_variable(self.name, self.guid)
-        self.logger.log("Returned {}".format(EFI_STATUS_DICT[status]))
-        if status == 0:
-            self.logger.log("[CHIPSEC] deleting EFI variable was successful")
-        else:
-            self.logger.log_error("deleting EFI variable failed")

-
-
[docs]    def var_list(self):
-        self.logger.log("[CHIPSEC] Enumerating all EFI variables via OS specific EFI Variable API..")
-        efi_vars = self._uefi.list_EFI_variables()
-        if efi_vars is None:
-            self.logger.log("[CHIPSEC] Could not enumerate EFI Variables (Legacy OS?). Exit..")
-            return
-        self.logger.log("[CHIPSEC] Decoding EFI Variables..")
-        _orig_logname = self.logger.LOG_FILE_NAME
-        self.logger.set_log_file('efi_variables.lst', False)
-        nvram_pth = 'efi_variables.dir'
-        if not os.path.exists(nvram_pth):
-            os.makedirs(nvram_pth)
-        decode_EFI_variables(efi_vars, nvram_pth)
-        self.logger.set_log_file(_orig_logname)
-        self.logger.log("[CHIPSEC] Variables are in efi_variables.lst log and efi_variables.dir directory")

-
-
[docs]    def var_find(self):
-        _vars = self._uefi.list_EFI_variables()
-        if _vars is None:
-            self.logger.log_warning('Could not enumerate UEFI variables (non-UEFI OS?)')
-            return
-        is_guid = 0
-        try:
-            _input_var = str(uuid.UUID(self.name_guid))
-            is_guid = 1
-        except ValueError:
-            _input_var = self.name_guid
-
-        if is_guid:
-            self.logger.log("[*] Searching for UEFI variable with GUID {{{}}}..".format(_input_var))
-            for name in _vars:
-                n = 0
-                for (off, buf, hdr, data, guid, attrs) in _vars[name]:
-                    if _input_var == guid:
-                        var_fname = '{}_{}_{}_{:d}.bin'.format(name, guid, get_attr_string(attrs).strip(), n)
-                        self.logger.log_good("Found UEFI variable {}:{}. Dumped to '{}'".format(guid, name, var_fname))
-                        write_file(var_fname, data)
-                    n += 1
-        else:
-            self.logger.log("[*] Searching for UEFI variable with name {}..".format(_input_var))
-            name = _input_var
-            if name in list(_vars.keys()):
-                n = 0
-                for (off, buf, hdr, data, guid, attrs) in _vars[name]:
-                    var_fname = '{}_{}_{}_{:d}.bin'.format(name, guid, get_attr_string(attrs).strip(), n)
-                    self.logger.log_good("Found UEFI variable {}:{}. Dumped to '{}'".format(guid, name, var_fname))
-                    write_file(var_fname, data)
-                    n += 1

-
-
[docs]    def nvram(self):
-        authvars = 0
-        rom = read_file(self.romfilename)
-        if self.fwtype is None:
-            self.fwtype = identify_EFI_NVRAM(rom)
-            if self.fwtype is None:
-                self.logger.log_error("Could not automatically identify EFI NVRAM type")
-                return
-        elif self.fwtype not in fw_types:
-            self.logger.log_error("Unrecognized EFI NVRAM type '{}'".format(self.fwtype))
-            return
-
-        _orig_logname = self.logger.LOG_FILE_NAME
-        self.logger.set_log_file( (self.romfilename + '.nv.lst'), False)
-        parse_EFI_variables( self.romfilename, rom, authvars, self.fwtype )
-        self.logger.set_log_file( _orig_logname )

-
-
[docs]    def nvram_auth(self):
-        authvars = 1
-        rom = read_file(self.romfilename)
-        if self.fwtype is None:
-            self.fwtype = identify_EFI_NVRAM(rom)
-            if self.fwtype is None:
-                self.logger.log_error("Could not automatically identify EFI NVRAM type")
-                return
-        elif self.fwtype not in fw_types:
-            self.logger.log_error("Unrecognized EFI NVRAM type '{}'".format(self.fwtype))
-            return
-
-        _orig_logname = self.logger.LOG_FILE_NAME
-        self.logger.set_log_file( (self.romfilename + '.nv.lst'), False)
-        parse_EFI_variables( self.romfilename, rom, authvars, self.fwtype )
-        self.logger.set_log_file( _orig_logname )

-
-
[docs]    def decode(self):
-        if not os.path.exists(self.filename):
-            self.logger.log_error("Could not find file '{}'".format(self.filename))
-            return
-
-        self.logger.log("[CHIPSEC] Parsing EFI volumes from '{}'..".format(self.filename))
-        _orig_logname = self.logger.LOG_FILE_NAME
-        self.logger.set_log_file(self.filename + '.UEFI.lst', False)
-        cur_dir = self.cs.os_helper.getcwd()
-        ftypes = []
-        inv_filetypes = {v: k for k, v in FILE_TYPE_NAMES.items()}
-        if self.filetypes:
-            for mtype in self.filetypes:
-                if mtype in inv_filetypes.keys():
-                    if inv_filetypes[mtype] not in ftypes:
-                        ftypes.append(inv_filetypes[mtype])
-                    break
-        decode_uefi_region(cur_dir, self.filename, self.fwtype, ftypes)
-        self.logger.set_log_file( _orig_logname )

-
-
[docs]    def keys(self):
-        if not os.path.exists(self.filename):
-            self.logger.log_error("Could not find file '{}'".format(self.filename))
-            return
-        self.logger.log("<keyvar_file> should contain one of the following EFI variables\n[ %s ]" % (" | ".join(["%s" % var for var in SECURE_BOOT_KEY_VARIABLES])))
-        self.logger.log("[CHIPSEC] Parsing EFI variable from '{}'..".format(self.filename))
-        parse_efivar_file(self.filename)

-
-
[docs]    def tables(self):
-        self.logger.log("[CHIPSEC] Searching memory for and dumping EFI tables (this may take a minute)..\n")
-        self._uefi.dump_EFI_tables()

-
-
[docs]    def s3bootscript(self):
-        self.logger.log("[CHIPSEC] Searching for and parsing S3 resume bootscripts..")
-        if self.bootscript_pa is not None:
-            self.logger.log('[*] Reading S3 boot-script from memory at 0x{:016X}..'.format(self.bootscript_pa))
-            script_all = self.cs.mem.read_physical_mem(self.bootscript_pa, 0x100000)
-            self.logger.log('[*] Decoding S3 boot-script opcodes..')
-            script_entries = parse_script(script_all, True)
-        else:
-            (bootscript_PAs, parsed_scripts) = self._uefi.get_s3_bootscript(True)

-
-
[docs]    def insert_before(self):
-        if get_guid_bin(self.guid) == '':
-            print('*** Error *** Invalid GUID: {}'.format(self.guid))
-            return
-
-        if not os.path.isfile(self.rom_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.rom_file))
-            return
-
-        if not os.path.isfile(self.efi_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.efi_file))
-            return
-
-        rom_image = read_file(self.rom_file)
-        efi_image = read_file(self.efi_file)
-        new_image = modify_uefi_region(rom_image, CMD_UEFI_FILE_INSERT_BEFORE, self.guid, efi_image)
-        write_file(self.new_file, new_image)

-
-
[docs]    def insert_after(self):
-        if get_guid_bin(self.guid) == '':
-            print('*** Error *** Invalid GUID: {}'.format(self.guid))
-            return
-
-        if not os.path.isfile(self.rom_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.rom_file))
-            return
-
-        if not os.path.isfile(self.efi_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.efi_file))
-            return
-
-        rom_image = read_file(self.rom_file)
-        efi_image = read_file(self.efi_file)
-        new_image = modify_uefi_region(rom_image, CMD_UEFI_FILE_INSERT_AFTER, self.guid, efi_image)
-        write_file(self.new_file, new_image)

-
-
[docs]    def replace(self):
-        if get_guid_bin(self.guid) == '':
-            print('*** Error *** Invalid GUID: {}'.format(self.guid))
-            return
-
-        if not os.path.isfile(self.rom_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.rom_file))
-            return
-
-        if not os.path.isfile(self.efi_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.efi_file))
-            return
-
-        rom_image = read_file(self.rom_file)
-        efi_image = read_file(self.efi_file)
-        new_image = modify_uefi_region(rom_image, CMD_UEFI_FILE_REPLACE, self.guid, efi_image)
-        write_file(self.new_file, new_image)

-
-
[docs]    def remove(self):
-        if get_guid_bin(self.guid) == '':
-            print('*** Error *** Invalid GUID: {}'.format(self.guid))
-            return
-
-        if not os.path.isfile(self.rom_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.rom_file))
-            return
-
-        rom_image = read_file(self.rom_file)
-        new_image = modify_uefi_region(rom_image, CMD_UEFI_FILE_REMOVE, self.guid)
-        write_file(self.new_file, new_image)

-
-
[docs]    def assemble(self):
-        compression = {'none': 0, 'tiano': 1, 'lzma': 2}
-
-        if get_guid_bin(self.guid) == '':
-            print('*** Error *** Invalid GUID: {}'.format(self.guid))
-            return
-
-        if not os.path.isfile(self.raw_file):
-            print('*** Error *** File doesn\'t exist: {}'.format(self.raw_file))
-            return
-
-        if self.comp not in compression:
-            print('*** Error *** Unknown compression: {}'.format(self.comp))
-            return
-
-        compression_type = compression[self.comp]
-
-        if self.file_type == 'freeform':
-            raw_image = read_file(self.raw_file)
-            wrap_image = assemble_uefi_raw(raw_image)
-            if compression_type > 0:
-                comp_image = compress_image(wrap_image, compression_type)
-                wrap_image = assemble_uefi_section(comp_image, len(wrap_image), compression_type)
-            uefi_image = assemble_uefi_file(self.guid, wrap_image)
-            write_file(self.efi_file, uefi_image)
-        else:
-            print('*** Error *** Unknow file type: {}'.format(self.file_type))
-            return
-
-        self.logger.log("[CHIPSEC]  UEFI file was successfully assembled! Binary file size: {:d}, compressed UEFI file size: {:d}".format(len(raw_image), len(uefi_image)))

-
-
-commands = {'uefi': UEFICommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/vmem_cmd.html b/_modules/chipsec/utilcmd/vmem_cmd.html deleted file mode 100644 index 0f7fb785..00000000 --- a/_modules/chipsec/utilcmd/vmem_cmd.html +++ /dev/null @@ -1,356 +0,0 @@ - - - - - - - - chipsec.utilcmd.vmem_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.vmem_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-
-"""
-The vmem command provides direct access to read and write virtual memory.
-
->>> chipsec_util vmem <op> <physical_address> <length> [value|buffer_file]
->>>
->>> <physical_address> : 64-bit physical address
->>> <op>               : read|readval|write|writeval|allocate|pagedump|search|getphys
->>> <length>           : byte|word|dword or length of the buffer from <buffer_file>
->>> <value>            : byte, word or dword value to be written to memory at <physical_address>
->>> <buffer_file>      : file with the contents to be written to memory at <physical_address>
-
-Examples:
-
->>> chipsec_util vmem <op>     <virtual_address>  <length> [value|file]
->>> chipsec_util vmem readval  0xFED40000         dword
->>> chipsec_util vmem read     0x41E              0x20     buffer.bin
->>> chipsec_util vmem writeval 0xA0000            dword    0x9090CCCC
->>> chipsec_util vmem write    0x100000000        0x1000   buffer.bin
->>> chipsec_util vmem write    0x100000000        0x10     000102030405060708090A0B0C0D0E0F
->>> chipsec_util vmem allocate                    0x1000
->>> chipsec_util vmem search   0xF0000            0x10000  _SM_
->>> chipsec_util vmem getphys  0xFED00000
-"""
-
-import os
-import chipsec_util
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal import virtmem
-from chipsec.defines import bytestostring
-from chipsec.logger import print_buffer_bytes
-from chipsec.file import write_file, read_file
-from argparse import ArgumentParser
-
-
-# Virtual Memory
-
[docs]class VMemCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_read = subparsers.add_parser('read')
-        parser_read.add_argument('virt_address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_read.add_argument('size', type=lambda x: int(x, 16), nargs='?', default=0x100, help='Length (hex)')
-        parser_read.add_argument('buf_file', type=str, nargs='?', default='', help='Buffer file name')
-        parser_read.set_defaults(func=self.vmem_read)
-
-        parser_readval = subparsers.add_parser('readval')
-        parser_readval.add_argument('virt_address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_readval.add_argument('length', type=str, nargs='?', default=None, help='Length [byte, word, dword] or (hex)')
-        parser_readval.set_defaults(func=self.vmem_readval)
-
-        parser_write = subparsers.add_parser('write')
-        parser_write.add_argument('virt_address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_write.add_argument('size', type=lambda x: int(x, 16), default=0x100, help='Length (hex)')
-        parser_write.add_argument('buf_file', type=str, help='Buffer file name')
-        parser_write.set_defaults(func=self.vmem_write)
-
-        parser_writeval = subparsers.add_parser('writeval')
-        parser_writeval.add_argument('virt_address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_writeval.add_argument('length', type=str, help='Length [byte, word, dword] or (hex)')
-        parser_writeval.add_argument('value', type=lambda x: int(x, 16), help='Value (hex)')
-        parser_writeval.set_defaults(func=self.vmem_writeval)
-
-        parser_search = subparsers.add_parser('search')
-        parser_search.add_argument('virt_address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_search.add_argument('size', type=lambda x: int(x, 16), help='Size of memory to search (hex)')
-        parser_search.add_argument('value', type=str, help='Value (string)')
-        parser_search.set_defaults(func=self.vmem_search)
-
-        parser_allocate = subparsers.add_parser('allocate')
-        parser_allocate.add_argument('size', type=lambda x: int(x, 16), help='Size of memory to allocate (hex)')
-        parser_allocate.set_defaults(func=self.vmem_allocate)
-
-        parser_getphys = subparsers.add_parser('getphys')
-        parser_getphys.add_argument('virt_address', type=lambda x: int(x, 16), help='Address (hex)')
-        parser_getphys.set_defaults(func=self.vmem_getphys)
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def set_up(self) -> None:
-        self._vmem = virtmem.VirtMemory(self.cs)

-
-
[docs]    def vmem_read(self):
-        self.logger.log('[CHIPSEC] Reading buffer from memory: VA = 0x{:016X}, len = 0x{:X}.'.format(self.virt_address, self.size))
-        try:
-            buffer = self._vmem.read_virtual_mem(self.virt_address, self.size)
-        except (TypeError, OSError):
-            self.logger.log_error('Error mapping VA to PA.')
-            return
-
-        if self.buf_file:
-            write_file(self.buf_file, buffer)
-            self.logger.log("[CHIPSEC] Written 0x{:X} bytes to '{}'".format(len(buffer), self.buf_file))
-        else:
-            print_buffer_bytes(buffer)

-
-
[docs]    def vmem_readval(self):
-        width = 0x4
-        value = 0x0
-        if self.length is not None:
-            if chipsec_util.is_option_valid_width(self.length):
-                width = chipsec_util.get_option_width(self.length)
-            else:
-                try:
-                    width = int(self.length, 16)
-                except:
-                    width = 0
-
-        self.logger.log('[CHIPSEC] Reading {:X}-byte value from VA 0x{:016X}.'.format(width, self.virt_address))
-        try:
-            if 0x1 == width:
-                value = self._vmem.read_virtual_mem_byte(self.virt_address)
-            elif 0x2 == width:
-                value = self._vmem.read_virtual_mem_word(self.virt_address)
-            elif 0x4 == width:
-                value = self._vmem.read_virtual_mem_dword(self.virt_address)
-            else:
-                self.logger.log_error("Must specify <length> argument in 'mem readval' as one of {}".format(chipsec_util.CMD_OPTS_WIDTH))
-                return
-        except (TypeError, OSError):
-            self.logger.log_error('Error mapping VA to PA.')
-            return
-        self.logger.log('[CHIPSEC] value = 0x{:X}'.format(value))

-
-
[docs]    def vmem_write(self):
-        if not os.path.exists(self.buf_file):
-            try:
-                buffer = bytearray.fromhex(self.buf_file)
-            except ValueError as e:
-                self.logger.log_error("Incorrect <value> specified: '{}'".format(self.buf_file))
-                self.logger.log_error(str(e))
-                return
-            self.logger.log("[CHIPSEC] Read 0x{:X} hex bytes from command-line: {}'".format(len(buffer), self.buf_file))
-        else:
-            buffer = read_file(self.buf_file)
-            self.logger.log("[CHIPSEC] Read 0x{:X} bytes from file '{}'".format(len(buffer), self.buf_file))
-
-        if len(buffer) < self.size:
-            self.logger.log_error("Number of bytes read (0x{:X}) is less than the specified <length> (0x{:X})".format(len(buffer), self.size))
-            return
-
-        self.logger.log('[CHIPSEC] Writing buffer to memory: VA = 0x{:016X}, len = 0x{:X}.'.format(self.virt_address, self.size))
-        self._vmem.write_virtual_mem(self.virt_address, self.size, buffer)

-
-
[docs]    def vmem_writeval(self):
-        if chipsec_util.is_option_valid_width(self.length):
-            width = chipsec_util.get_option_width(self.length)
-        else:
-            try:
-                width = int(self.length, 16)
-            except ValueError:
-                width = 0
-
-        self.logger.log('[CHIPSEC] Writing {:X}-byte value 0x{:X} to VA 0x{:016X}..'.format(width, self.value, self.virt_address))
-        try:
-            if 0x1 == width:
-                self._vmem.write_virtual_mem_byte(self.virt_address, self.value)
-            elif 0x2 == width:
-                self._vmem.write_virtual_mem_word(self.virt_address, self.value)
-            elif 0x4 == width:
-                self._vmem.write_virtual_mem_dword(self.virt_address, self.value)
-            else:
-                self.logger.log_error("Must specify <length> argument in 'mem writeval' as one of {}".format(chipsec_util.CMD_OPTS_WIDTH))
-        except (TypeError, OSError):
-            self.logger.log_error('Error mapping VA to PA.')

-
-
-
-
[docs]    def vmem_allocate(self):
-        try:
-            (va, pa) = self._vmem.alloc_virtual_mem(self.size)
-        except (TypeError, OSError):
-            self.logger.log_error('Error mapping VA to PA.')
-            return
-        self.logger.log('[CHIPSEC] Allocated {:X} bytes of virtual memory:'.format(self.size))
-        self.logger.log('          VA = 0x{:016X}'.format(va))
-        self.logger.log('          PA = 0x{:016X}'.format(pa))

-
-
[docs]    def vmem_getphys(self):
-        try:
-            pa = self._vmem.va2pa(self.virt_address)
-        except (TypeError, OSError):
-            self.logger.log_error('Error mapping VA to PA.')
-            return
-        if pa is not None:
-            self.logger.log('[CHIPSEC] Virtual memory:')
-            self.logger.log('          VA = 0x{:016X}'.format(self.virt_address))
-            self.logger.log('          PA = 0x{:016X}'.format(pa))

-
-
-commands = {'vmem': VMemCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/chipsec/utilcmd/vmm_cmd.html b/_modules/chipsec/utilcmd/vmm_cmd.html deleted file mode 100644 index a0bca983..00000000 --- a/_modules/chipsec/utilcmd/vmm_cmd.html +++ /dev/null @@ -1,273 +0,0 @@ - - - - - - - - chipsec.utilcmd.vmm_cmd — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

Source code for chipsec.utilcmd.vmm_cmd

-# CHIPSEC: Platform Security Assessment Framework
-# Copyright (c) 2010-2021, Intel Corporation
-#
-# This program is free software; you can redistribute it and/or
-# modify it under the terms of the GNU General Public License
-# as published by the Free Software Foundation; Version 2.
-#
-# This program is distributed in the hope that it will be useful,
-# but WITHOUT ANY WARRANTY; without even the implied warranty of
-# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-# GNU General Public License for more details.
-#
-# You should have received a copy of the GNU General Public License
-# along with this program; if not, write to the Free Software
-# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
-#
-# Contact information:
-# chipsec@intel.com
-#
-
-"""
->>> chipsec_util vmm hypercall <rax> <rbx> <rcx> <rdx> <rdi> <rsi> [r8] [r9] [r10] [r11]
->>> chipsec_util vmm hypercall <eax> <ebx> <ecx> <edx> <edi> <esi>
->>> chipsec_util vmm pt|ept <ept_pointer>
->>> chipsec_util vmm virtio [<bus>:<device>.<function>]
-
-Examples:
-
->>> chipsec_util vmm hypercall 32 0 0 0 0 0
->>> chipsec_util vmm pt 0x524B01E
->>> chipsec_util vmm virtio
->>> chipsec_util vmm virtio 0:6.0
-"""
-
-import re
-
-from chipsec.command import BaseCommand, toLoad
-from chipsec.hal.vmm import VMM, get_virtio_devices, VirtIO_Device
-from chipsec.hal.pci import print_pci_devices
-from chipsec.exceptions import VMMRuntimeError
-from argparse import ArgumentParser
-
-
-
[docs]class VMMCommand(BaseCommand):
-
-
[docs]    def requirements(self) -> toLoad:
-        return toLoad.Driver

-
-
[docs]    def parse_arguments(self) -> None:
-        parser = ArgumentParser(prog='chipsec_util vmm', usage=__doc__)
-        subparsers = parser.add_subparsers()
-
-        parser_hypercall = subparsers.add_parser('hypercall')
-        parser_hypercall.add_argument('ax', type=lambda x: int(x, 16), help='rax/eax value (hex)')
-        parser_hypercall.add_argument('bx', type=lambda x: int(x, 16), help='rbx/ebx value (hex)')
-        parser_hypercall.add_argument('cx', type=lambda x: int(x, 16), help='rcx/ecx value (hex)')
-        parser_hypercall.add_argument('dx', type=lambda x: int(x, 16), help='rdx/edx value (hex)')
-        parser_hypercall.add_argument('di', type=lambda x: int(x, 16), help='rdi/edi value (hex)')
-        parser_hypercall.add_argument('si', type=lambda x: int(x, 16), help='rsi/esi value (hex)')
-        parser_hypercall.add_argument('r8', type=lambda x: int(x, 16), nargs='?', default=0, help='r8 value (hex)')
-        parser_hypercall.add_argument('r9', type=lambda x: int(x, 16), nargs='?', default=0, help='r9 value (hex)')
-        parser_hypercall.add_argument('r10', type=lambda x: int(x, 16), nargs='?', default=0, help='r10 value (hex)')
-        parser_hypercall.add_argument('r11', type=lambda x: int(x, 16), nargs='?', default=0, help='r11 value (hex)')
-        parser_hypercall.set_defaults(func=self.vmm_hypercall)
-
-        parser_pt = subparsers.add_parser('pt')
-        parser_pt.add_argument('eptp', type=lambda x: int(x, 16), help='Pointer (hex)')
-        parser_pt.set_defaults(func=self.vmm_pt)
-
-        parser_ept = subparsers.add_parser('ept')
-        parser_ept.add_argument('eptp', type=lambda x: int(x, 16), help='Pointer (hex)')
-        parser_ept.set_defaults(func=self.vmm_pt)
-
-        parser_virtio = subparsers.add_parser('virtio')
-        parser_virtio.add_argument('bdf', type=str, nargs='?', default=None, help='<bus>:<device>.<function>')
-        parser_virtio.set_defaults(func=self.vmm_virtio)
-
-        parser.parse_args(self.argv, namespace=self)

-
-
[docs]    def vmm_virtio(self):
-        if self.bdf is not None:
-            match = re.search(r"^([0-9a-f]{1,2}):([0-1]?[0-9a-f]{1})\.([0-7]{1})$", self.bdf)
-            if match:
-                _bus = int(match.group(1), 16) & 0xFF
-                _dev = int(match.group(2), 16) & 0x1F
-                _fun = int(match.group(3), 16) & 0x07
-                vid = self.cs.pci.read_word(_bus, _dev, _fun, 0)
-                did = self.cs.pci.read_word(_bus, _dev, _fun, 2)
-                dev = (_bus, _dev, _fun, vid, did)
-                virt_dev = [dev]
-            else:
-                self.logger.log_error("Invalid B:D.F ({})".format(self.bdf))
-                self.logger.log(VMMCommand.__doc__)
-                return
-        else:
-            self.logger.log("[CHIPSEC] Enumerating VirtIO devices...")
-            virt_dev = get_virtio_devices(self.cs.pci.enumerate_devices())
-
-        if len(virt_dev) > 0:
-            self.logger.log("[CHIPSEC] Available VirtIO devices:")
-            print_pci_devices(virt_dev)
-            for (b, d, f, vid, did, rid) in virt_dev:
-                VirtIO_Device(self.cs, b, d, f).dump_device()
-        else:
-            self.logger.log("[CHIPSEC] No VirtIO devices found")

-
-
[docs]    def vmm_hypercall(self):
-        self.logger.log('')
-        self.logger.log("[CHIPSEC] > hypercall")
-        self.logger.log("[CHIPSEC]   RAX: 0x{:016X}".format(self.ax))
-        self.logger.log("[CHIPSEC]   RBX: 0x{:016X}".format(self.bx))
-        self.logger.log("[CHIPSEC]   RCX: 0x{:016X}".format(self.cx))
-        self.logger.log("[CHIPSEC]   RDX: 0x{:016X}".format(self.dx))
-        self.logger.log("[CHIPSEC]   RSI: 0x{:016X}".format(self.si))
-        self.logger.log("[CHIPSEC]   RDI: 0x{:016X}".format(self.di))
-        self.logger.log("[CHIPSEC]   R8 : 0x{:016X}".format(self.r8))
-        self.logger.log("[CHIPSEC]   R9 : 0x{:016X}".format(self.r9))
-        self.logger.log("[CHIPSEC]   R10: 0x{:016X}".format(self.r10))
-        self.logger.log("[CHIPSEC]   R11: 0x{:016X}".format(self.r11))
-
-        rax = self.vmm.hypercall(self.ax, self.bx, self.cx, self.dx, self.si, self.di, self.r8, self.r9, self.r10, self.r11)
-
-        self.logger.log("[CHIPSEC] < RAX: 0x{:016X}".format(rax))

-
-
[docs]    def vmm_pt(self):
-        if self.eptp is not None:
-            pt_fname = 'ept_{:08X}'.format(self.eptp)
-            self.logger.log("[CHIPSEC] EPT physical base: 0x{:016X}".format(self.eptp))
-            self.logger.log("[CHIPSEC] Dumping EPT to '{}'...".format(pt_fname))
-            self.vmm.dump_EPT_page_tables(self.eptp, pt_fname)
-        else:
-            self.logger.log("[CHIPSEC] Finding EPT hierarchy in memory is not implemented yet")
-            self.logger.log_error(VMMCommand.__doc__)
-            return

-
-
[docs]    def run(self):
-        try:
-            self.vmm = VMM(self.cs)
-        except VMMRuntimeError as msg:
-            self.logger.log_error(msg)
-            return
-
-        self.vmm.init()
-
-        self.func()

-
-
-commands = {'vmm': VMMCommand}
-
- -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_modules/index.html b/_modules/index.html deleted file mode 100644 index 37de0ef1..00000000 --- a/_modules/index.html +++ /dev/null @@ -1,240 +0,0 @@ - - - - - - - - Overview: module code — CHIPSEC documentation - - - - - - - - - - - - - - -
-
-
-
- -

All modules for which code is available

- - -
-
-
-
- -
-
- - - - \ No newline at end of file diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt index 61d721be..0a002284 100644 --- a/_sources/index.rst.txt +++ b/_sources/index.rst.txt @@ -1,9 +1,9 @@ -.. CHIPSEC 1.13.3 documentation file, created by +.. CHIPSEC 1.13.4 documentation file, created by sphinx-quickstart on Wed Mar 25 13:24:44 2015. You can adapt this file completely to your liking, but it should at least contain the root `toctree` directive. -CHIPSEC 1.13.3 +CHIPSEC 1.13.4 ============== CHIPSEC is a framework for analyzing platform level security of diff --git a/_sources/modules/chipsec.options.rst.txt b/_sources/modules/chipsec.options.rst.txt deleted file mode 100644 index 1a164f74..00000000 --- a/_sources/modules/chipsec.options.rst.txt +++ /dev/null @@ -1,7 +0,0 @@ -chipsec.options module -====================== - -.. automodule:: chipsec.options - :members: - :undoc-members: - :show-inheritance: diff --git a/contribution/code-style-python.html b/contribution/code-style-python.html index 901a689e..85fdf0bc 100644 --- a/contribution/code-style-python.html +++ b/contribution/code-style-python.html @@ -620,7 +620,7 @@

Navigation

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    chipsec.options module¶

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    Bases: object

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173, 174, 201, 233, 264], "delta": [2, 234, 264], "run": [2, 4, 7, 8, 9, 10, 13, 68, 154, 162, 163, 164, 168, 169, 173, 186, 191, 192, 201, 202, 210, 211, 212, 213, 214, 215, 218, 222, 223, 233, 262, 263], "testcas": 2, "xml": [2, 3, 4, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 140, 234, 264], "output": [2, 13, 201, 234, 264], "helper": [2, 10, 13, 264], "registri": 2, "o": [2, 9, 10, 13, 33, 37, 42, 62, 85, 86, 93, 128, 158, 169, 179, 180, 186, 195, 212, 214, 215, 217, 224, 239, 241, 263, 264], "oshelp": [2, 5, 115], "wrapper": [2, 128], "platform": [2, 3, 4, 10, 13, 16, 18, 19, 20, 21, 22, 25, 29, 30, 34, 35, 36, 37, 38, 39, 40, 50, 51, 52, 53, 55, 56, 58, 59, 60, 62, 64, 65, 66, 67, 69, 103, 105, 107, 111, 128, 153, 162, 163, 164, 169, 170, 171, 173, 174, 195, 196, 197, 198, 229, 263, 264], "code": [2, 4, 10, 11, 13, 128, 169, 170, 172, 191, 192, 222, 223, 261, 264], "invok": [2, 128], "kernel": [2, 10, 11, 128, 196, 197, 261, 264], "driver": [2, 10, 11, 128, 194, 196, 197, 206, 207, 208, 210, 262, 264], "implement": [2, 4, 9, 57, 105, 158, 180, 189, 224], "capabl": [2, 255], "manual": [2, 9, 13, 156, 160, 170, 198, 263, 264], "direct": [2, 10, 33, 159, 171, 215, 239, 242, 244, 247, 248, 259], "BY": 2, "THESE": 2, "your": [2, 10, 14, 177, 189, 253, 263, 264], "system": [2, 3, 5, 10, 12, 13, 61, 153, 158, 159, 169, 171, 172, 175, 176, 186, 191, 192, 195, 198, 201, 210, 211, 212, 213, 214, 215, 218, 222, 223, 224, 253, 258, 263], "unboot": [2, 198, 253], "know": [2, 4, 196], "what": [2, 196], "numer": [2, 10, 264], "instruct": [2, 195], "hex": [2, 191, 192, 202, 214, 264], "acpi_cmd": [2, 227], "chipset_cmd": [2, 227], "cmos_cmd": [2, 227], "config_cmd": [2, 227], "cpu_cmd": [2, 227], "decode_cmd": [2, 227], "deltas_cmd": [2, 227], "desc_cmd": [2, 227], "ec_cmd": [2, 227], "igd_cmd": [2, 227], "interrupts_cmd": [2, 227], "io_cmd": [2, 227], "iommu_cmd": [2, 227], "lock_check_cmd": [2, 227], "mem_cmd": [2, 227], "mmcfg_base_cmd": [2, 227], "mmcfg_cmd": [2, 227], "mmio_cmd": [2, 227], "msgbus_cmd": [2, 227], "msr_cmd": [2, 227], "pci_cmd": [2, 227], "reg_cmd": [2, 227], "smbios_cmd": [2, 227], "smbus_cmd": [2, 227], "spd_cmd": [2, 227], "spi_cmd": [2, 227], "spidesc_cmd": [2, 227], "tpm_cmd": [2, 227], "txt_cmd": [2, 227], "ucode_cmd": [2, 227], "uefi_cmd": [2, 227], "vmem_cmd": [2, 227], "vmm_cmd": [2, 227], "task": 2, "spi": [2, 3, 9, 75, 100, 153, 174, 175, 176, 177, 198, 233, 253, 254, 258, 263, 264], "acpi": [2, 9, 13, 75, 77, 224, 228], "acpi_t": [2, 75, 228], "cmo": [2, 9, 75, 230], "cpu": [2, 6, 9, 14, 75, 84, 91, 99, 106, 146, 149, 163, 169, 170, 171, 172, 184, 213, 232, 263, 264], "cpuid": [2, 6, 75, 115, 123, 154, 158, 201, 232], "ec": [2, 75, 236, 244], "hal_bas": [2, 75], "igd": [2, 75, 237], "interrupt": [2, 9, 75], "io": [2, 33, 75, 89, 191, 214, 239], "iobar": [2, 75], "iommu": [2, 3, 9, 15, 75, 240], "lock": [2, 3, 4, 9, 75, 131, 151, 152, 153, 159, 160, 161, 162, 163, 168, 169, 170, 171, 177, 241, 263], "mmio": [2, 3, 75, 93, 191, 195, 214, 215, 245], "msgbu": [2, 75, 246], "msr": [2, 5, 75, 158, 159, 160, 163, 213, 217, 247, 263], "page": [2, 75, 202], "pci": [2, 5, 9, 57, 75, 89, 94, 195, 248], "pcidb": [2, 75], "physmem": [2, 75], "smbio": [2, 75, 250], "smbu": [2, 75, 173, 251], "spd": [2, 75, 173, 252], "spi_descriptor": [2, 75], "spi_jedec_id": [2, 75], "spi_uefi": [2, 75], "tpm": [2, 75, 104, 105, 255], "tpm12_command": [2, 75], "tpm_eventlog": [2, 75], "ucod": [2, 75, 158, 257], "uefi": [2, 5, 9, 10, 11, 13, 75, 102, 108, 110, 111, 112, 120, 146, 149, 167, 184, 191, 192, 224, 258, 263], "uefi_common": [2, 75], "uefi_compress": [2, 75], "uefi_fv": [2, 75], "uefi_platform": [2, 75], "uefi_search": [2, 75], "virtmem": [2, 75], "vmm": [2, 9, 75, 146, 184, 260], "primit": [2, 73], "select": [2, 6, 13], "option": [2, 9, 10, 13, 93, 131, 167, 179, 180, 192, 195, 198, 201, 202, 211, 212, 213, 214, 215, 218, 233], "report": [2, 154, 261], "cleanup": 2, "setup": [2, 9, 11, 13, 14, 151, 264], "instal": [2, 9, 262, 264], "packag": [2, 5, 9, 11, 13, 43, 69, 120], "chipsec_root": 2, "build_exe_": 2, "window": [2, 5, 10, 115, 153, 186, 224], "human": 3, "regist": [3, 4, 6, 68, 90, 91, 93, 131, 151, 152, 153, 156, 157, 158, 159, 160, 161, 162, 163, 164, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 186, 195, 211, 213, 217, 231, 241, 246, 248, 256, 263], "8086": [3, 4, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69], "broken": 3, "control": [3, 4, 9, 12, 13, 20, 30, 39, 40, 55, 56, 57, 62, 81, 97, 131, 151, 152, 153, 158, 159, 160, 171, 173, 174, 176, 177, 263], "bit": [3, 10, 131, 153, 154, 158, 159, 161, 163, 170, 173, 187, 214, 242, 259], "field": [3, 4], "alwai": 3, "first": [3, 4, 215], "correct": [3, 10, 233], "off": [3, 10], "bar": [3, 86, 89, 93, 191, 214, 215], "spibar": [3, 245], "bu": [3, 13, 90, 191, 214, 244, 246, 248, 260], "dev": [3, 11, 214, 261], "0x1f": [3, 248], "fun": [3, 214], "reg": [3, 192, 249], "0x10": [3, 89, 242, 245, 246, 259], "width": [3, 195, 237, 239, 244, 245, 248, 264], "mask": [3, 248, 264], "0xfffff000": 3, "size": [3, 81, 86, 99, 192, 198, 210, 214, 236, 243, 251, 255, 263], "0x1000": [3, 89, 242, 259], "desc": [3, 4, 192], "rang": [3, 9, 68, 93, 153, 170, 171, 172, 177, 191, 192, 201, 206, 211, 214, 215, 263], "offset": [3, 78, 81, 86, 161, 192, 236, 244, 245, 246, 248, 251, 252, 255], "0x0": [3, 89, 192, 202, 230, 232, 238, 239, 246, 247, 251, 252, 253], "bc": [3, 4, 231, 249], "type": [3, 5, 10, 13, 131, 172, 233, 250, 255, 258, 264], "pcicfg": 3, "0xdc": [3, 248], "bio": [3, 4, 9, 13, 14, 105, 150, 151, 152, 153, 169, 171, 172, 177, 192, 253, 258, 263], "biosw": [3, 153], "bild": 3, "interfac": [3, 5, 10, 13, 90, 114, 118, 152, 159, 198, 263], "down": [3, 151, 161, 162, 263], "biosinterfacelockdown": [3, 152], "skx": [3, 15], "txt": [3, 11, 13, 14, 15, 192, 201, 206, 207, 208, 210, 214, 215, 222, 256], "kbl": [3, 15], "ehl": [3, 15], "sfdp": [3, 15, 253], "glk": [3, 15], "pch_4xxh": [3, 15], "mtl": [3, 15], "bdw": [3, 9, 15, 146], "pch_4xx": [3, 15], "pch_c60x": [3, 15], "qrk": [3, 15], "pch_5xxh": [3, 15], "pch_495": [3, 15], "bdx": [3, 15], "icx": [3, 15], "rkl": [3, 15], "apl": [3, 15], "snb": [3, 9, 15, 146], "pch_8x": [3, 15], "pch_6xx": [3, 15], "pch_1xx": [3, 15], "ivt": [3, 15], "pch_6xxp": [3, 15], "adl": [3, 15], "cht": [3, 15], "pch_2xx": [3, 15], "avn": [3, 15], "ivb": [3, 9, 15, 146], "cml": [3, 15], "rpl": [3, 15], "pch_4xxlp": [3, 15], "byt": [3, 9, 15, 146], "tpm12": [3, 15], "pch_7x": [3, 15], "pmc_i440fx": [3, 15], "whl": [3, 15], "hsx": [3, 15], "pch_c61x": [3, 15], "cfl": [3, 15], "pch_5xxlp": [3, 15], "pch_3xxop": [3, 15], "dnv": [3, 15], "jkt": [3, 15], "tglu": [3, 15], "tglh": [3, 15], "pch_3xx": [3, 15], "icl": [3, 15], "skl": [3, 15], "pch_c620": [3, 15], "hsw": [3, 4, 9, 15, 146], "pch_3xxlp": [3, 15], "subclass": [4, 248], "is_support": [4, 7, 9], "chipsec_main": [4, 14, 150, 151, 152, 153, 154, 156, 157, 159, 160, 161, 162, 163, 164, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 179, 180, 186, 187, 189, 191, 192, 194, 195, 196, 197, 198, 201, 202, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, 218, 222, 223, 224], "As": [4, 68, 153, 170], "version": [4, 10, 11, 12, 13, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 105, 189], "2": [4, 10, 13, 16, 20, 23, 30, 38, 39, 41, 42, 43, 50, 51, 52, 53, 59, 60, 63, 65, 66, 67, 90, 93, 99, 104, 105, 114, 153, 158, 159, 167, 212, 215, 255, 264], "author": 4, "creat": [4, 9, 10, 13, 14, 197, 233, 253, 264], "get_control": [4, 249], "set_control": [4, 249], "especi": 4, "reus": 4, "across": 4, "pass": [4, 7, 153, 154, 158, 159, 161, 163, 173, 192, 198, 263], "fail": [4, 153, 154, 158, 159, 161, 163, 171, 173, 194, 198, 263, 264], "cfg": [4, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 189], "bioslocken": [4, 153, 249], "ble": [4, 153, 249], "statu": [4, 206, 240], "c": [4, 14, 16, 20, 30, 38, 39, 50, 51, 52, 53, 54, 55, 57, 59, 60, 63, 65, 66, 67, 93, 161, 163], "react": [4, 263], "log_pass": [4, 7], "log_fail": 4, "re": [4, 7, 9], "api": [4, 12, 13, 179, 180, 194], "see": [4, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 172, 224], "next": [4, 14], "detail": [4, 13, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 68, 180, 224], "copi": [4, 13, 14, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67], "directori": [4, 9, 13, 14, 196, 233], "locat": [4, 13, 195, 196, 263], "platform_cod": 4, "found": [4, 9, 170, 191, 262], "review": [4, 198, 263], "datasheet": [4, 18, 20, 21, 23, 30, 41, 42, 43, 54, 55, 56, 57, 62, 63, 69, 90, 173], "appropri": [4, 10, 14], "place": [4, 264], "correctli": [4, 9, 153, 162, 171, 233, 263], "4th": 4, "intel": [4, 6, 12, 16, 18, 20, 21, 22, 23, 26, 30, 33, 37, 38, 39, 40, 41, 42, 43, 50, 51, 52, 53, 54, 55, 56, 57, 59, 60, 62, 63, 65, 66, 67, 68, 69, 83, 90, 99, 118, 156, 158, 160, 161, 163, 170, 172, 173, 180, 191, 256, 261], "core": [4, 22, 37, 39, 40, 42, 62, 69, 99, 158, 162, 164, 169, 171], "haswel": [4, 29, 30, 99], "interact": 5, "directli": [5, 194, 196, 197], "etc": [5, 9, 108, 111, 191, 233, 253], "like": [5, 9, 14, 171, 186, 261], "newhelp": 5, "def": [5, 7, 8], "__init__": [5, 7], "super": 5, "dal": [5, 10, 115], "linux": [5, 10, 115, 126, 186, 261], "linuxn": [5, 115], "nonehelp": [5, 115], "scan": [6, 192], "enumer": [6, 13, 93, 158, 248], "devic": [6, 9, 10, 13, 83, 93, 94, 101, 114, 131, 171, 173, 175, 191, 196, 207, 208, 214, 215, 224, 244, 248, 260], "correspond": [6, 215, 233], "per": [6, 99, 158, 194], "0x8086": 6, "0x1022": 6, "amd": [6, 261], "lookup": 6, "fall": 6, "back": 6, "p": [6, 13, 264], "flag": 6, "ignor": [6, 263], "depric": 6, "moduleclass": 7, "align": 7, "prerequisit": 7, "some_module_requir": 7, "notapplic": 7, "action": [7, 8], "wa": [7, 94, 153, 169, 263], "success": [7, 206], "module_argv": 7, "primari": [7, 224], "execut": [7, 9, 10, 68, 158, 170, 171, 172, 189, 194, 195, 196, 197, 256, 263], "handl": [7, 9, 186, 198], "start_test": 7, "chipsec_util": [8, 9, 13, 14, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260], "live": [8, 258], "command_display_nam": 8, "_cmd": 8, "argpars": 8, "argumentpars": 8, "basecommand": 8, "toload": 8, "commandclass": 8, "parse_argu": 8, "parser": 8, "prog": 8, "usag": [8, 9, 14, 78, 80, 81, 83, 84, 85, 86, 89, 90, 91, 93, 95, 99, 100, 102, 106, 112, 113, 150, 151, 152, 153, 154, 156, 157, 159, 160, 161, 162, 163, 164, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 179, 180, 186, 187, 189, 191, 192, 194, 195, 196, 197, 198, 201, 202, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, 218, 222, 223, 224, 229, 233, 243, 256, 264], "__doc__": 8, "subpars": 8, "add_subpars": 8, "parser_entrypoint": 8, "add_pars": 8, "set_default": 8, "func": 8, "parse_arg": 8, "argv": 8, "just": [9, 171, 263], "python": [9, 10, 11, 12, 13, 118, 253], "store": [9, 153, 233], "under": [9, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 158], "subdirectori": [9, 14], "There": [9, 10], "appli": 9, "everi": 9, "where": [9, 68, 153, 167, 169, 179, 180, 192, 201, 202, 211, 212, 213, 214], "framework": [9, 10, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67], "fuzzer": [9, 201, 206, 207, 208, 210, 211, 212, 213, 214, 215, 222, 263], "intern": 9, "concept": [9, 223], "string": [9, 10, 131], "form": 9, "bios_wp": [9, 146, 149, 263, 264], "mean": [9, 169, 174], "root_dir": 9, "map": [9, 13, 68, 89, 162, 214, 215, 244, 263], "vulner": [9, 10, 152, 153, 158, 170, 177, 180, 186, 189, 191, 192, 194, 195, 196, 218, 223, 263], "being": 9, "known": [9, 206, 263], "event": [9, 105, 151, 223], "bios_smi": [9, 146, 149, 263], "flash": [9, 11, 61, 99, 100, 153, 174, 175, 176, 177, 196, 197, 198, 233, 253, 258, 263], "descriptor": [9, 100, 174, 175, 176, 263], "spi_desc": [9, 146, 149, 263], "spi_fdopss": [9, 146, 149, 263], "spi_lock": [9, 146, 149, 263, 264], "analysi": [9, 224, 233, 263], "smm": [9, 146, 149, 153, 163, 170, 171, 172, 184, 186, 224, 263], "region": [9, 68, 153, 174, 175, 263], "bios_t": [9, 146, 149, 187, 263], "compat": [9, 13, 169, 263], "cach": [9, 158, 172, 263], "smrr": [9, 146, 149, 170, 263, 264], "memori": [9, 10, 13, 57, 68, 78, 89, 95, 98, 113, 131, 158, 162, 163, 164, 169, 171, 172, 175, 186, 192, 195, 196, 198, 214, 215, 237, 242, 244, 259, 263], "remap": [9, 146, 149, 187, 263], "dma": [9, 171, 237, 263], "smm_dma": [9, 146, 149, 263], "graphic": [9, 83], "apertur": 9, "redirect": 9, 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170, 194, 196, 198, 202, 242, 259, 263], "delet": [9, 13, 198, 258], "less": 9, "overflow": 9, "critic": [9, 10, 233], "rtclock": [9, 146, 149, 263], "block": [9, 153, 172, 196], "top": [9, 152, 263], "swap": [9, 152, 263], "mode": [9, 10, 13, 152, 161, 169, 171, 172, 189, 192, 206, 211, 212, 215, 222, 224, 263, 264], "architectur": [9, 13, 131, 156, 160, 170], "ia32cfg": [9, 146, 149, 263], "valid": [9, 11, 172, 192, 206], "smm_ptr": [9, 146, 184, 190], "legaci": [9, 13], "outsid": 9, "int15": 9, "servic": [9, 10, 13, 264], "malici": [9, 13, 194], "commbuff": 9, "race": [9, 153], "dure": 9, "authent": [9, 150, 167], "smmruntim": 9, "scan_block": [9, 146, 184, 193], "softwar": [9, 12, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 68, 153, 156, 158, 160, 169, 170, 171, 172, 175, 224, 263], "pars": [9, 13, 100, 102, 110, 111, 233, 253], "decompress": 9, "digit": 9, "unsign": 9, "xrom": [9, 248], "due": [9, 10, 13], "assert": [9, 170], "insuffici": 9, "s3": [9, 108, 180, 195, 263], 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"4_01_02_12r23a": 98, "simmtest": 98, "publicationarticl": 98, "184": 98, "153": 98, "101": 98, "wikipedia": 98, "serial_presence_detect": 98, "part": [99, 153], "read_spi": 99, "spi_fla": 99, "write_spi": 99, "buf": 99, "erase_spi_block": 99, "get_spi_jedec_id": 99, "get_spi_jedec_id_decod": 99, "chunk": 99, "cycl": 99, "byte": [99, 210, 212, 242, 248, 259, 264], "remaind": 99, "want": 99, "spi_read_write_max_dbc": 99, "tbd": 99, "optim": 99, "yet": 99, "approxim": 99, "smt": 99, "i5": 99, "4300u": 99, "9ghz": 99, "sec": 99, "1mb": 99, "dbc": 99, "fd": [100, 218], "read_fil": 100, "fd_file": 100, "parse_spi_flash_descriptor": 100, "jede": 101, "manufactur": [101, 161], "parse_uefi_region_from_fil": 102, "_uefi": 102, "filenam": [102, 264], "fwtype": [102, 258], "outpath": 102, "trustedcomputinggroup": 103, "definit": 104, "tpmv1": 104, "tcg": [104, 105], "v1": 104, "21": 105, "profil": 105, "microcod": [106, 156], "ucode_update_id": 106, "load_ucode_upd": 106, "ucode_buf": 106, "update_ucode_all_cpu": 106, "pdb": [106, 257], "dump_ucode_update_head": 106, "search": [112, 242, 259], "auxillari": 112, "check_match_criteria": 112, "efi_modul": 112, "match_criteria": 112, "read_virtual_mem": 113, "write_virtual_mem": 113, "write_virtual_mem_dowrd": 113, "read_virtual_mem_dowrd": 113, "second": [114, 214], "translat": 114, "slat": 114, "virtio": [114, 260], "dalhelp": [115, 117], "efihelp": [115, 119], "linuxhelp": [115, 121], "legacy_pci": [115, 123], "linuxnativehelp": [115, 123], "windowshelp": [115, 129], "basehelp": 115, "dfx": 118, "layer": 118, "nativ": [126, 206, 207, 208, 210], "module_help": 131, "struct": [131, 161], "url": 131, "exposur": 150, "pre": [150, 263], "hdd": [150, 263], "bot": 150, "sw": [150, 263], "defcon": 150, "16": 150, "bypass": [150, 153, 175, 177], "instrument": 150, "jonathan": 150, "brossard": 150, "m": [150, 151, 152, 153, 154, 156, 157, 159, 160, 161, 162, 163, 164, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 179, 180, 186, 187, 189, 191, 192, 194, 195, 196, 197, 198, 201, 202, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, 218, 222, 223, 224, 264], "global": [151, 179], "tco": 151, "failur": [151, 179, 191, 217, 263], "defeat": 151, "corei": [151, 180], "kallenberg": [151, 180], "xeno": 151, "kovah": 151, "john": 151, "butterworth": 151, "sam": 151, "cornwel": 151, "attack": [151, 169, 171, 172, 180, 263], "against": [151, 171, 197, 263], "smmbioswriteprotect": [151, 153], "tcosmilock": 151, "smilock": 151, "bioswriteen": [151, 153, 249], "hijack": [152, 191], "vmware": 152, "dig": 152, "bing": 152, "sun": 152, "topswapstatu": 152, "topswap": 152, "howev": 153, "would": 153, "both": [153, 258], "pr0": [153, 177], "entir": [153, 253, 263], "often": [153, 175], "tale": 153, "One": 153, "abl": [153, 169], "therebi": 153, "sometim": 153, "wpd": 153, "handler": [153, 192, 212], "decid": 153, "whether": 153, "demonstr": [153, 172], "speed": 153, "racer": 153, "outstand": 153, "eiss": 153, "smm_bwp": 153, "ensur": 153, "prn": 153, "prb": 153, "rpe": 153, "prl": 153, "wpe": 153, "pr": 153, "ia32_u_cet": 154, "ia32_s_cet": 154, "doe": [154, 171, 196, 233, 241, 263], "NOT": [154, 263, 264], "displai": [156, 211, 243, 264], "32": [156, 160, 170, 260], "sdm": [156, 160, 170], "articl": [156, 160, 170], "ia32_bios_sign_id": 156, "untrust": 157, "msr_bios_don": [157, 171], "soc_bios_don": 157, "specul": 158, "side": 158, "channel": [158, 207, 223], "branch": 158, "inject": 158, "k": [158, 264], "variant": 158, "cve": [158, 217, 218, 223], "2017": [158, 191], "5715": 158, "indirect": 158, "ibr": [158, 263], "predictor": 158, "barrier": 158, "ibpb": 158, "eax": [158, 201, 232, 247, 260], "7h": 158, "ecx": [158, 201, 232, 260], "edx": [158, 247, 260], "26": 158, "stibp": [158, 263], "27": 158, "ia32_spec_ctrl": 158, "enhanc": [158, 263], "29": 158, "ia32_arch_cap": 158, "ibrs_al": 158, "todo": 158, "rogu": 158, "rdcl": 158, "rdcl_no": 158, "we": [158, 186, 261, 263], "relev": 158, "warn": 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191], "master": [161, 163], "src": [161, 163], "apollolak": 161, "fwsts1": 161, "dump_statu": 161, "pci_me_hfsts1": 161, "out": [161, 170, 234], "piec": 161, "prior": 161, "ship": 161, "printk": 161, "bios_debug": 161, "0x4": [161, 237, 245], "NO": 161, "pch_me_dev": 161, "me_hf": 161, "u32": 161, "working_st": 161, "mfg_mode": 161, "fpt_bad": 161, "operation_st": 161, "fw_init_complet": 161, "ft_bup_ld_flr": 161, "update_in_progress": 161, "error_cod": 161, "operation_mod": 161, "reserv": 161, "boot_options_pres": 161, "ack_data": 161, "bios_msg_ack": 161, "__pack": 161, "me_statu": 161, "hf": 161, "bdf": 161, "22": [161, 211], "0x40": 161, "model_206ax": 163, "final": 163, "msr_lt_lock_memori": 163, "0x2e7": 163, "problem": 163, "subvers": 164, "joanna": 164, "rutkowska": 164, "rafal": [164, 180], "wojtczuk": [164, 180], "pci0": [164, 169, 171], "0_remapbas": 164, "0_remaplimit": 164, "0_touud": 164, "0_tolud": 164, "0_tsegmb": [164, 171], "rt": 167, "AT": 167, "unauthor": 167, "28": [167, 187], "corrupt": 167, "sgx": 168, "bwg": 168, "cdi": 168, "ibp": 168, "565432": 168, "sgx_global_en": 168, "mtrrcap": 168, "prmrr": 168, "prmrr_valid_config": 168, "prmrr_phybas": 168, "prmrr_base_address_field": 168, "prmrr_memtyp": 168, "prmrr_mask": 168, "prmrr_mask_bit": 168, "prmrr_vld": 168, "prmrr_lock": 168, "prmrr_uncore_phybas": 168, "prmrr_uncore_mask": 168, "bios_se_svn": 168, "pfat_se_svn": 168, "anc_se_svn": 168, "sclean_se_svn": 168, "sinit_se_svn": 168, "bios_se_svn_statu": 168, "sgx_debug_mod": 168, "sgx_debug_mode_status_bit": 168, "Will": 168, "smram": [169, 171, 172, 192, 263], "simpli": [169, 170, 175], "smramc": 169, "d_lck": [169, 263], "2006": 169, "outlin": 169, "ring": [169, 172, 208], "cseg": 169, "Such": 169, "circumv": 169, "0_smramc": 169, "smm_code_chk_en": 170, "msr_smm_feature_control": 170, "unrecover": 170, "mce": 170, "tseg": [171, 263], "examin": [171, 263], "through": 171, "proper": 171, "reprogram": [171, 177], "area": [171, 255], "tsegbaselock": 171, "tseglimitlock": 171, "tsegmb": 171, "0_bgsm": 171, "bgsm": 171, "ia32_smrr_physbas": [171, 172, 186], "physbas": [171, 172, 186], "ia32_smrr_physmask": [171, 172, 186], "physmask": [171, 172], "poison": 172, "research": [172, 180, 191], "effect": 172, "via": [172, 248], "reload": 172, "cacheabl": 172, "popul": 172, "smbase": 172, "exploit": [172, 180], "forc": 172, "cachabl": 172, "c220": 173, "smbus_hcfg": 173, "hsf": [174, 176, 177], "fdv": 174, "frap": [174, 175], "brwa": [174, 175], "altern": 174, "cannot": [175, 263], "itself": 175, "brra": 175, "pin": 176, "strap": 176, "fdopss": 176, "rout": 176, "jumper": 176, "motherboard": 176, "pr4": 177, "flockdn": 177, "flashrom": 177, "copernicu": 177, "mitr": 177, "question": [177, 261], "assumpt": 177, "flashlockdown": 177, "spiwritestatusdi": 177, "attribut": [179, 198, 263], "resum": [180, 195], "vu": 180, "976132": 180, "threat": [180, 191], "team": [180, 191], "dmytro": 180, "oleksiuk": 180, "script_address": [180, 258], "bootscript": 180, "0x00000000bde10000": 180, "affect": 186, "christoph": 186, "doma": 186, "whitepap": 186, "ia32_apic_bas": [186, 217], "apicbas": 186, "hashlib": 187, "extens": 187, "truncat": 187, "belong": 189, "cfg_file": 189, "efi_fil": 189, "generate_t": 189, "convert": 189, "pe": 189, "replace_bootload": 189, "bootload": 189, "esp": 189, "restore_bootload": 189, "bak": 189, "coff": 189, "experiment": 191, "bare": 191, "recon": 191, "brussel": 191, "smi_start": 191, "smi_end": 191, "written": [191, 213, 242, 246, 259], "0xb2": 191, "0x00": [191, 236, 248], "0x80": 191, "0xff": [191, 192], "1c": 191, "investig": 191, "freez": 191, "unexpect": 191, "cansecwest": 192, "2015": [192, 217, 218], "c7zero": 192, "l": [192, 201, 206, 207, 208, 210, 214, 215, 222, 264], "config_fil": 192, "smic_start": 192, "smic_end": 192, "fuzzmor": 192, "2nd": 192, "gp": 192, "smi_cod": [192, 238], "smi_data": [192, 238], "rax": [192, 238, 260], "ptr": 192, "val": 192, "rbx": [192, 238, 260], "rcx": [192, 238, 260], "rdx": [192, 238, 260], "rsi": [192, 238, 260], "rdi": [192, 238, 260], "ptr_offset": 192, "sig": 192, "sig_offset": 192, "don": [192, 263, 264], "care": [192, 195, 253], "argument": [192, 194, 196, 197, 198, 211, 264], "hardcod": 192, "_fill_value_xx": 192, "destruct": 192, "virustot": 194, "pei": [194, 196], "dxe": [194, 196], "ui": [194, 196], "md5": [194, 196], "sha": [194, 196], "256": [194, 196], "regular": [194, 196], "vt_api_kei": 194, "vt_threshold": 194, "fw_imag": [194, 196, 197], "obtain": 194, "vist": 194, "gui": 194, "join": 194, "av": 194, "claim": 194, "full": [194, 196, 197, 253, 263], "caus": [195, 217], "malfunct": 195, "replace_op": 195, "reg_opcod": 195, "pci_wr": 195, "mmio_wr": 195, "io_wr": 195, "pci_rw": 195, "mmio_rw": 195, "io_rw": 195, "mem": [195, 242], "dispatch_ep": 195, "add_op": 195, "entrypoint": [195, 250], "given": 195, "By": 195, "alloc": [195, 242, 259], "0xb007b007": 195, "entri": [195, 263], "hlt": 195, "newli": 195, "blockedlist": 196, "same": 196, "no_driv": [196, 264], "efilist": 197, "setvari": 198, "random": [198, 201, 211, 212, 213, 215, 222], "iter": [198, 201, 206, 211, 212, 213, 218, 222], "seed": 198, "test_cas": 198, "attrib": 198, "1000": [198, 211, 212], "rng": 198, "combin": 198, "100000": 198, "123456789": 198, "94": 198, "reject": 198, "volatil": 198, "render": 198, "determin": [198, 263], "stabil": 198, "retain": 198, "emul": [201, 212, 213, 214, 215], "sequenti": [201, 213], "_no_eax_to_fuzz": 201, "_eax_fuzz_step": 201, "_no_iterations_to_fuzz": [201, 213], "chosen": [201, 212], "_fuzz_ecx_random": 201, "_max_ecx": 201, "max": 201, "_exclude_cpuid": 201, "exclud": [201, 212, 213, 214, 215], "_flush_log_each_it": [201, 211, 212], "flush": [201, 211, 212, 213], "_log_out_result": 201, "unknown": [201, 210, 211, 212, 213, 214, 215, 218, 222, 223], "state": [201, 210, 211, 212, 213, 214, 215, 218, 222, 223, 241, 255, 256], "vm": [201, 202, 210, 211, 212, 213, 214, 215, 218, 222, 223], "undefin": [201, 202, 210, 211, 212, 213, 214, 215, 218, 222, 223, 241], "finder": 202, "file_nam": [202, 237], "revision_id": 202, "my_fil": 202, "bin": [202, 228, 233, 238, 242, 253, 254, 257, 258, 259], "hyper": [204, 205, 206, 207, 208, 209, 210], "vector": [206, 211, 222], "param": 206, "show": [206, 231, 264], "input": 206, "custom": 206, "synthet": [207, 208], "print": [207, 222, 235, 263], "offer": 207, "relid": 207, "inbound": 208, "hyperv": 210, "bodi": 210, "po": 210, "posit": 210, "pretti": 211, "vector_reg": 211, "maxval": 211, "exhaust": [211, 212], "send": [211, 238, 261], "0xffff": 211, "default_vector_maxv": 211, "default_maxval_exhaust": 211, "default_maxval_random": 211, "default_random_iter": [211, 212], "_log_all_gpr": 211, "count": [212, 218, 238], "randomli": [212, 213, 222], "1000000": 212, "9000": 212, "4000000": 212, "max_port": 212, "max_port_valu": 212, "default_port_write_count": 212, "switch": 212, "_fuzz_special_valu": 212, "_exclude_port": 212, "_read_msr": 213, "_flush_log_each_msr": 213, "_fuzz_value_0_all1": 213, "_fuzz_value_5a": 213, "0x5a": 213, "_fuzz_value_rnd": 213, "_exclude_msr": 213, "1f": 214, "io_fuzz": 214, "calc_bar_s": 214, "calcul": 214, "timeout": 214, "active_rang": 214, "activ": 214, "bit_flip": 214, "flip": 214, "_exclude_bar": 214, "overlap": 215, "garbag": [215, 263], "overlap_mod": 215, "fuzz_overlap": 215, "fuzz_random": 215, "_exclude_mmio_bar1": 215, "_exclude_mmio_bar2": 215, "oracl": 217, "virtualbox": 217, "0377": 217, "poc": [217, 218, 264], "crash": [217, 223], "technetwork": 217, "topic": 217, "cpujan2015": 217, "1972971": 217, "marcu": 218, "meissner": 218, "3456": 218, "iter_count": 218, "fdc_port_data_fifo": 218, "fdc": 218, "fifo": [218, 223], "fdc_cmd_wrval": 218, "fd_cmd": 218, "50": 222, "0x10000000": 222, "proof": 223, "xsa": 223, "188": 223, "7154": 223, "discov": 223, "mikhail": 223, "gorobet": 223, "confirm": [224, 263], "practic": 224, "experi": 224, "oem": 224, "file_path": 228, "xsdt": 228, "standalon": 229, "readl": 230, "writel": 230, "readh": 230, "writeh": 230, "byte_offset": 230, "byte_v": [230, 236, 251, 252], "0xcc": 230, "mmio_bar": 231, "cr": 232, "cr_number": 232, "pt": [232, 240, 260], "paging_base_cr3": 232, "topologi": 232, "0x40000000": 232, "forens": [233, 253], "fw_type": 233, "fw": 233, "vss": 233, "autodetect": 233, "appear": [233, 263], "empti": [233, 263], "again": 233, "previou": 234, "run1": 234, "run2": 234, "ldt": 235, "respect": 235, "cpu_id": [235, 257], "index": [236, 255], "0x001": 236, "0x2f": 236, "dmaread": 237, "dmawrit": 237, "0x20000000": 237, "0x2217f1000": 237, "deadbeef": 237, "thread_id": [238, 247], "smmc": 238, "rt_code_start": 238, "rt_code_end": 238, "payload_loc": 238, "payload_fil": 238, "payload_str": 238, "0xaaaaaaaaaaaaaaaa": 238, "0x79dfe000": 238, "0x79efdfff": 238, "ed32d533": 238, "99e6": 238, "4209": 238, "9cc02d72cdd998a7": 238, "0x79dfaaaa": 238, "payload": 238, "io_port": 239, "0x430": 239, "iommu_engin": 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[219, 220, 221, 222, 223], "xsa188": 223, "wsmt": 224, "testcas": 226, "utilcmd": [227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260], "acpi_cmd": 228, "chipset_cmd": 229, "cmos_cmd": 230, "config_cmd": 231, "cpu_cmd": 232, "decode_cmd": 233, "deltas_cmd": 234, "desc_cmd": 235, "ec_cmd": 236, "igd_cmd": 237, "interrupts_cmd": 238, "io_cmd": 239, "iommu_cmd": 240, "lock_check_cmd": 241, "mem_cmd": 242, "mmcfg_base_cmd": 243, "mmcfg_cmd": 244, "mmio_cmd": 245, "msgbus_cmd": 246, "msr_cmd": 247, "pci_cmd": 248, "reg_cmd": 249, "smbios_cmd": 250, "smbus_cmd": 251, "spd_cmd": 252, "spi_cmd": 253, "spidesc_cmd": 254, "tpm_cmd": 255, "txt_cmd": 256, "ucode_cmd": 257, "uefi_cmd": 258, "vmem_cmd": 259, "vmm_cmd": 260, "contact": 261, "download": 262, "github": 262, "repositori": 262, "releas": 262, "interpret": 263, "result": 263, "mean": 263, "autom": 263}, "envversion": {"sphinx.domains.c": 3, "sphinx.domains.changeset": 1, "sphinx.domains.citation": 1, "sphinx.domains.cpp": 9, "sphinx.domains.index": 1, "sphinx.domains.javascript": 3, "sphinx.domains.math": 2, "sphinx.domains.python": 4, "sphinx.domains.rst": 2, "sphinx.domains.std": 2, "sphinx.ext.todo": 2, "sphinx.ext.viewcode": 1, "sphinx": 58}, "alltitles": {"Python Version": [[0, "python-version"]], "Python Coding Style Guide": [[0, "python-coding-style-guide"]], "f-Strings": [[0, "f-strings"]], "PEP versions supported by CHIPSEC": [[0, "id2"], [0, "id3"], [0, "id4"], [0, "id5"], [0, "id6"]], "Type Hints": [[0, "type-hints"]], "Underscores in Numeric Literals": [[0, "underscores-in-numeric-literals"]], "Walrus Operator (:=)": [[0, "walrus-operator"]], "Deprecate distutils module support": [[0, "deprecate-distutils-module-support"]], "Sphinx Version": [[1, "sphinx-version"]], "Generating Documentation": [[1, "generating-documentation"]], "References": [[1, "references"]], "Architecture Overview": [[2, "architecture-overview"]], "Core components": [[2, "core-components"]], "Commands": [[2, "commands"]], "HAL (Hardware Abstraction Layer)": [[2, "hal-hardware-abstraction-layer"]], "Fuzzing": [[2, "fuzzing"]], "CHIPSEC_MAIN Program Flow": [[2, "chipsec-main-program-flow"]], "CHIPSEC_UTIL Program Flow": [[2, "chipsec-util-program-flow"]], "Auxiliary components": [[2, "auxiliary-components"]], "Executable build scripts": [[2, "executable-build-scripts"]], "Configuration Files": [[3, "configuration-files"]], "Configuration File Example": [[3, "configuration-file-example"]], "List of Cfg components": [[3, "list-of-cfg-components"]], "Writing Your Own Modules": [[4, "writing-your-own-modules"]], "OS Helpers and Drivers": [[5, "os-helpers-and-drivers"]], "Mostly invoked by HAL modules": [[5, "mostly-invoked-by-hal-modules"]], "Helpers import from BaseHelper": [[5, "helpers-import-from-basehelper"]], "Create a New Helper": [[5, "create-a-new-helper"]], "Example": [[5, "example"]], "Helper components": [[5, "helper-components"]], "Methods for Platform Detection": [[6, "methods-for-platform-detection"]], "Uses PCI VID and DID to detect processor and PCH": [[6, "uses-pci-vid-and-did-to-detect-processor-and-pch"]], "Chip information located in chipsec/chipset.py.": [[6, "chip-information-located-in-chipsec-chipset-py"]], "Platform Configuration Options": [[6, "platform-configuration-options"]], "Sample module code template": [[7, "sample-module-code-template"]], "CHIPSEC Modules": [[9, "chipsec-modules"]], "Attack Surface/Vector: Firmware protections in ROM": [[9, "id1"]], "Attack Surface/Vector: Runtime protection of SMRAM": [[9, "id2"]], "Attack Surface/Vector: Secure boot - Incorrect protection of secure boot configuration": [[9, "id3"]], "Attack Surface/Vector: Persistent firmware configuration": [[9, "id4"]], "Attack Surface/Vector: Platform hardware configuration": [[9, "id5"]], "Attack Surface/Vector: Runtime firmware (eg. SMI handlers)": [[9, "id6"]], "Attack Surface/Vector: Boot time firmware": [[9, "id7"]], "Attack Surface/Vector: Power state transitions (eg. resume from sleep)": [[9, "id8"]], "Attack Surface/Vector: Firmware update": [[9, "id9"]], "Attack Surface/Vector: Network interfaces": [[9, "id10"]], "Attack Surface/Vector: Misc": [[9, "id11"]], "Modules": [[9, "modules"]], "CHIPSEC 1.13.3": [[10, "chipsec-1-13-3"]], "Start here": [[10, null]], "Installation": [[10, "installation"], [10, null]], "Using CHIPSEC": [[10, "using-chipsec"], [10, null]], "Module & Command Development": [[10, "module-command-development"]], "Architecture and Modules": [[10, null]], "Contribution and Style Guides": [[10, "contribution-and-style-guides"]], "Contribution Guide": [[10, null]], "Linux Installation": [[11, "linux-installation"]], "Creating a Live Linux image": [[11, "creating-a-live-linux-image"]], "Installing Kali Linux": [[11, "installing-kali-linux"]], "Prerequisites": [[11, "prerequisites"], [12, "prerequisites"]], "Installing CHIPSEC": [[11, "installing-chipsec"], [14, "installing-chipsec"]], "Building CHIPSEC": [[11, "building-chipsec"]], "Run CHIPSEC": [[11, "run-chipsec"]], "DAL Windows Installation": [[12, "dal-windows-installation"]], "Building": [[12, "building"], [13, "building"]], "Windows Installation": [[13, "windows-installation"]], "Install CHIPSEC Dependencies": [[13, "install-chipsec-dependencies"]], "Turn off kernel driver signature checks": [[13, "turn-off-kernel-driver-signature-checks"]], "Alternate Build Methods": [[13, "alternate-build-methods"]], "Windows PCI Filter Driver": [[13, "windows-pci-filter-driver"]], "Install PCI Filter Driver": [[13, "install-pci-filter-driver"]], "Filter Driver Access PCI Config Space Test": [[13, "filter-driver-access-pci-config-space-test"]], "Building a Bootable USB drive with UEFI Shell (x64)": [[14, "building-a-bootable-usb-drive-with-uefi-shell-x64"]], "Run CHIPSEC in UEFI Shell": [[14, "run-chipsec-in-uefi-shell"]], "Building UEFI Python 3.6.8 (optional)": [[14, "building-uefi-python-3-6-8-optional"]], "adl": [[16, "adl"]], "apl": [[17, "apl"]], "avn": [[18, "avn"]], "bdw": [[19, "bdw"]], "bdx": [[20, "bdx"]], "byt": [[21, "byt"]], "cfl": [[22, "cfl"]], "cht": [[23, "cht"]], "cml": [[24, "cml"]], "common": [[25, "common"]], "dnv": [[26, "dnv"]], "ehl": [[27, "ehl"]], "glk": [[28, "glk"]], "hsw": [[29, "hsw"]], "hsx": [[30, "hsx"]], "icl": [[31, "icl"]], "icx": [[32, "icx"]], "iommu": [[33, "iommu"]], "ivb": [[34, "ivb"]], "ivt": [[35, "ivt"]], "jkt": [[36, "jkt"]], "kbl": [[37, "kbl"]], "mtl": [[38, "mtl"]], "pch_1xx": [[39, "pch-1xx"]], "pch_2xx": [[40, "pch-2xx"]], "pch_3xx": [[41, "pch-3xx"]], "pch_3xxlp": [[42, "pch-3xxlp"]], "pch_3xxop": [[43, "pch-3xxop"]], "pch_495": [[44, "pch-495"]], "pch_4xx": [[45, "pch-4xx"]], "pch_4xxh": [[46, "pch-4xxh"]], "pch_4xxlp": [[47, "pch-4xxlp"]], "pch_5xxh": [[48, "pch-5xxh"]], "pch_5xxlp": [[49, "pch-5xxlp"]], "pch_6xxP": [[50, "pch-6xxp"]], "pch_6xxS": [[51, "pch-6xxs"]], "pch_7x": [[52, "pch-7x"]], "pch_8x": [[53, "pch-8x"]], "pch_c60x": [[54, "pch-c60x"]], "pch_c61x": [[55, "pch-c61x"]], "pch_c620": [[56, "pch-c620"]], "pmc_i440fx": [[57, "pmc-i440fx"]], "qrk": [[58, "qrk"]], "rkl": [[59, "rkl"]], "rpl": [[60, "rpl"]], "sfdp": [[61, "sfdp"]], "skl": [[62, "skl"]], "skx": [[63, "skx"]], "snb": [[64, "snb"]], "tglh": [[65, "tglh"]], "tglu": [[66, "tglu"]], "tpm12": [[67, "tpm12"]], "txt": [[68, "txt"]], "whl": [[69, "whl"]], "chipsec.cfg.parsers package": [[70, "chipsec-cfg-parsers-package"]], "chipsec.cfg.parsers.core_parsers module": [[71, "module-chipsec.cfg.parsers.core_parsers"]], "chipsec.config module": [[72, "module-chipsec.config"]], "chipsec.fuzzing package": [[73, "chipsec-fuzzing-package"]], "chipsec.fuzzing.primitives module": [[74, "module-chipsec.fuzzing.primitives"]], "chipsec.hal package": [[75, "chipsec-hal-package"]], "chipsec.hal.acpi module": [[76, "module-chipsec.hal.acpi"]], "chipsec.hal.acpi_tables module": [[77, "module-chipsec.hal.acpi_tables"]], "chipsec.hal.cmos module": [[78, "module-chipsec.hal.cmos"]], "chipsec.hal.cpu module": [[79, "module-chipsec.hal.cpu"]], "chipsec.hal.cpuid module": [[80, "module-chipsec.hal.cpuid"]], "chipsec.hal.ec module": [[81, "module-chipsec.hal.ec"]], "chipsec.hal.hal_base module": [[82, "module-chipsec.hal.hal_base"]], "chipsec.hal.igd module": [[83, "module-chipsec.hal.igd"]], "chipsec.hal.interrupts module": [[84, "module-chipsec.hal.interrupts"]], "chipsec.hal.io module": [[85, "module-chipsec.hal.io"]], "chipsec.hal.iobar module": [[86, "module-chipsec.hal.iobar"]], "chipsec.hal.iommu module": [[87, "module-chipsec.hal.iommu"]], "chipsec.hal.locks module": [[88, "module-chipsec.hal.locks"]], "chipsec.hal.mmio module": [[89, "module-chipsec.hal.mmio"]], "chipsec.hal.msgbus module": [[90, "module-chipsec.hal.msgbus"]], "chipsec.hal.msr module": [[91, "module-chipsec.hal.msr"]], "chipsec.hal.paging module": [[92, "module-chipsec.hal.paging"]], "chipsec.hal.pci module": [[93, "module-chipsec.hal.pci"]], "chipsec.hal.pcidb module": [[94, "module-chipsec.hal.pcidb"]], "chipsec.hal.physmem module": [[95, "module-chipsec.hal.physmem"]], "chipsec.hal.smbios module": [[96, "module-chipsec.hal.smbios"]], "chipsec.hal.smbus module": [[97, "module-chipsec.hal.smbus"]], "chipsec.hal.spd module": [[98, "module-chipsec.hal.spd"]], "chipsec.hal.spi module": [[99, "module-chipsec.hal.spi"]], "chipsec.hal.spi_descriptor module": [[100, "module-chipsec.hal.spi_descriptor"]], "chipsec.hal.spi_jedec_ids module": [[101, "module-chipsec.hal.spi_jedec_ids"]], "chipsec.hal.spi_uefi module": [[102, "module-chipsec.hal.spi_uefi"]], "chipsec.hal.tpm module": [[103, "module-chipsec.hal.tpm"]], "chipsec.hal.tpm12_commands module": [[104, "module-chipsec.hal.tpm12_commands"]], "chipsec.hal.tpm_eventlog module": [[105, "module-chipsec.hal.tpm_eventlog"]], "chipsec.hal.ucode module": [[106, "module-chipsec.hal.ucode"]], "chipsec.hal.uefi module": [[107, "module-chipsec.hal.uefi"]], "chipsec.hal.uefi_common module": [[108, "module-chipsec.hal.uefi_common"]], "chipsec.hal.uefi_compression module": [[109, "module-chipsec.hal.uefi_compression"]], "chipsec.hal.uefi_fv module": [[110, "module-chipsec.hal.uefi_fv"]], "chipsec.hal.uefi_platform module": [[111, "module-chipsec.hal.uefi_platform"]], "chipsec.hal.uefi_search module": [[112, "module-chipsec.hal.uefi_search"]], "chipsec.hal.virtmem module": [[113, "module-chipsec.hal.virtmem"]], "chipsec.hal.vmm module": [[114, "module-chipsec.hal.vmm"]], "chipsec.helper package": [[115, "chipsec-helper-package"]], "chipsec.helper.basehelper module": [[116, "module-chipsec.helper.basehelper"]], "chipsec.helper.dal package": [[117, "chipsec-helper-dal-package"]], "chipsec.helper.dal.dalhelper module": [[118, "module-chipsec.helper.dal.dalhelper"]], "chipsec.helper.efi package": [[119, "chipsec-helper-efi-package"]], "chipsec.helper.efi.efihelper module": [[120, "module-chipsec.helper.efi.efihelper"]], "chipsec.helper.linux package": [[121, "chipsec-helper-linux-package"]], "chipsec.helper.linux.linuxhelper module": [[122, "module-chipsec.helper.linux.linuxhelper"]], "chipsec.helper.linuxnative package": [[123, "chipsec-helper-linuxnative-package"]], "chipsec.helper.linuxnative.cpuid module": [[124, "module-chipsec.helper.linuxnative.cpuid"]], "chipsec.helper.linuxnative.legacy_pci module": [[125, "module-chipsec.helper.linuxnative.legacy_pci"]], "chipsec.helper.linuxnative.linuxnativehelper module": [[126, "module-chipsec.helper.linuxnative.linuxnativehelper"]], "chipsec.helper.nonehelper module": [[127, "module-chipsec.helper.nonehelper"]], "chipsec.helper.oshelper module": [[128, "module-chipsec.helper.oshelper"]], "chipsec.helper.windows package": [[129, "chipsec-helper-windows-package"]], "chipsec.helper.windows.windowshelper module": [[130, "chipsec-helper-windows-windowshelper-module"]], "chipsec.library package": [[131, "chipsec-library-package"]], "chipsec.library.architecture module": [[132, "module-chipsec.library.architecture"]], "chipsec.library.bits module": [[133, "module-chipsec.library.bits"]], "chipsec.library.control module": [[134, "module-chipsec.library.control"]], "chipsec.library.device module": [[135, "module-chipsec.library.device"]], "chipsec.library.lock module": [[136, "module-chipsec.library.lock"]], "chipsec.library.memory module": [[137, "module-chipsec.library.memory"]], "chipsec.library.module_helper module": [[138, "module-chipsec.library.module_helper"]], "chipsec.library.options module": [[139, "module-chipsec.library.options"]], "chipsec.library.register module": [[140, "module-chipsec.library.register"]], "chipsec.library.returncode module": [[141, "module-chipsec.library.returncode"]], "chipsec.library.strings module": [[142, "module-chipsec.library.strings"]], "chipsec.library.structs module": [[143, "module-chipsec.library.structs"]], "chipsec.library.types module": [[144, "module-chipsec.library.types"]], "chipsec.library.url module": [[145, "module-chipsec.library.url"]], "chipsec.modules package": [[146, "chipsec-modules-package"]], "chipsec.modules.bdw package": [[147, "module-chipsec.modules.bdw"]], "chipsec.modules.byt package": [[148, "module-chipsec.modules.byt"]], "chipsec.modules.common package": [[149, "chipsec-modules-common-package"]], "chipsec.modules.common.bios_kbrd_buffer module": [[150, "module-chipsec.modules.common.bios_kbrd_buffer"]], "chipsec.modules.common.bios_smi module": [[151, "module-chipsec.modules.common.bios_smi"]], "chipsec.modules.common.bios_ts module": [[152, "module-chipsec.modules.common.bios_ts"]], "chipsec.modules.common.bios_wp module": [[153, "module-chipsec.modules.common.bios_wp"]], "chipsec.modules.common.cet module": [[154, "module-chipsec.modules.common.cet"]], "chipsec.modules.common.cpu package": [[155, "chipsec-modules-common-cpu-package"]], "chipsec.modules.common.cpu.cpu_info module": [[156, "module-chipsec.modules.common.cpu.cpu_info"]], "chipsec.modules.common.cpu.ia_untrusted module": [[157, "module-chipsec.modules.common.cpu.ia_untrusted"]], "chipsec.modules.common.cpu.spectre_v2 module": [[158, "module-chipsec.modules.common.cpu.spectre_v2"]], "chipsec.modules.common.debugenabled module": [[159, "module-chipsec.modules.common.debugenabled"]], "chipsec.modules.common.ia32cfg module": [[160, "module-chipsec.modules.common.ia32cfg"]], "chipsec.modules.common.me_mfg_mode module": [[161, "module-chipsec.modules.common.me_mfg_mode"]], "chipsec.modules.common.memconfig module": [[162, "module-chipsec.modules.common.memconfig"]], "chipsec.modules.common.memlock module": [[163, "module-chipsec.modules.common.memlock"]], "chipsec.modules.common.remap module": [[164, "module-chipsec.modules.common.remap"]], "chipsec.modules.common.rtclock module": [[165, "chipsec-modules-common-rtclock-module"]], "chipsec.modules.common.secureboot package": [[166, "chipsec-modules-common-secureboot-package"]], "chipsec.modules.common.secureboot.variables module": [[167, "module-chipsec.modules.common.secureboot.variables"]], "chipsec.modules.common.sgx_check module": [[168, "module-chipsec.modules.common.sgx_check"]], "chipsec.modules.common.smm module": [[169, "module-chipsec.modules.common.smm"]], "chipsec.modules.common.smm_code_chk module": [[170, "module-chipsec.modules.common.smm_code_chk"]], "chipsec.modules.common.smm_dma module": [[171, "module-chipsec.modules.common.smm_dma"]], "chipsec.modules.common.smrr module": [[172, "module-chipsec.modules.common.smrr"]], "chipsec.modules.common.spd_wd module": [[173, "module-chipsec.modules.common.spd_wd"]], "chipsec.modules.common.spi_access module": [[174, "module-chipsec.modules.common.spi_access"]], "chipsec.modules.common.spi_desc module": [[175, "module-chipsec.modules.common.spi_desc"]], "chipsec.modules.common.spi_fdopss module": [[176, "module-chipsec.modules.common.spi_fdopss"]], "chipsec.modules.common.spi_lock module": [[177, "module-chipsec.modules.common.spi_lock"]], "chipsec.modules.common.uefi package": [[178, "chipsec-modules-common-uefi-package"]], "chipsec.modules.common.uefi.access_uefispec module": [[179, "module-chipsec.modules.common.uefi.access_uefispec"]], "chipsec.modules.common.uefi.s3bootscript module": [[180, "module-chipsec.modules.common.uefi.s3bootscript"]], "chipsec.modules.hsw package": [[181, "module-chipsec.modules.hsw"]], "chipsec.modules.ivb package": [[182, "module-chipsec.modules.ivb"]], "chipsec.modules.snb package": [[183, "module-chipsec.modules.snb"]], "chipsec.modules.tools package": [[184, "chipsec-modules-tools-package"]], "chipsec.modules.tools.cpu package": [[185, "chipsec-modules-tools-cpu-package"]], "chipsec.modules.tools.cpu.sinkhole module": [[186, "module-chipsec.modules.tools.cpu.sinkhole"]], "chipsec.modules.tools.generate_test_id module": [[187, "module-chipsec.modules.tools.generate_test_id"]], "chipsec.modules.tools.secureboot package": [[188, "chipsec-modules-tools-secureboot-package"]], "chipsec.modules.tools.secureboot.te module": [[189, "module-chipsec.modules.tools.secureboot.te"]], "chipsec.modules.tools.smm package": [[190, "chipsec-modules-tools-smm-package"]], "chipsec.modules.tools.smm.rogue_mmio_bar module": [[191, "module-chipsec.modules.tools.smm.rogue_mmio_bar"]], "chipsec.modules.tools.smm.smm_ptr module": [[192, "module-chipsec.modules.tools.smm.smm_ptr"]], "chipsec.modules.tools.uefi package": [[193, "chipsec-modules-tools-uefi-package"]], "chipsec.modules.tools.uefi.reputation module": [[194, "module-chipsec.modules.tools.uefi.reputation"]], "chipsec.modules.tools.uefi.s3script_modify module": [[195, "module-chipsec.modules.tools.uefi.s3script_modify"]], "chipsec.modules.tools.uefi.scan_blocked module": [[196, "module-chipsec.modules.tools.uefi.scan_blocked"]], "chipsec.modules.tools.uefi.scan_image module": [[197, "module-chipsec.modules.tools.uefi.scan_image"]], "chipsec.modules.tools.uefi.uefivar_fuzz module": [[198, "module-chipsec.modules.tools.uefi.uefivar_fuzz"]], "chipsec.modules.tools.vmm package": [[199, "chipsec-modules-tools-vmm-package"]], "chipsec.modules.tools.vmm.common module": [[200, "module-chipsec.modules.tools.vmm.common"]], "chipsec.modules.tools.vmm.cpuid_fuzz module": [[201, "module-chipsec.modules.tools.vmm.cpuid_fuzz"]], "chipsec.modules.tools.vmm.ept_finder module": [[202, "module-chipsec.modules.tools.vmm.ept_finder"]], "chipsec.modules.tools.vmm.hv package": [[203, "chipsec-modules-tools-vmm-hv-package"]], "chipsec.modules.tools.vmm.hv.define module": [[204, "module-chipsec.modules.tools.vmm.hv.define"]], "chipsec.modules.tools.vmm.hv.hypercall module": [[205, "module-chipsec.modules.tools.vmm.hv.hypercall"]], "chipsec.modules.tools.vmm.hv.hypercallfuzz module": [[206, "module-chipsec.modules.tools.vmm.hv.hypercallfuzz"]], "chipsec.modules.tools.vmm.hv.synth_dev module": [[207, "module-chipsec.modules.tools.vmm.hv.synth_dev"]], "chipsec.modules.tools.vmm.hv.synth_kbd module": [[208, "module-chipsec.modules.tools.vmm.hv.synth_kbd"]], "chipsec.modules.tools.vmm.hv.vmbus module": [[209, "module-chipsec.modules.tools.vmm.hv.vmbus"]], "chipsec.modules.tools.vmm.hv.vmbusfuzz module": [[210, "module-chipsec.modules.tools.vmm.hv.vmbusfuzz"]], "chipsec.modules.tools.vmm.hypercallfuzz module": [[211, "module-chipsec.modules.tools.vmm.hypercallfuzz"]], "chipsec.modules.tools.vmm.iofuzz module": [[212, "module-chipsec.modules.tools.vmm.iofuzz"]], "chipsec.modules.tools.vmm.msr_fuzz module": [[213, "module-chipsec.modules.tools.vmm.msr_fuzz"]], "chipsec.modules.tools.vmm.pcie_fuzz module": [[214, "module-chipsec.modules.tools.vmm.pcie_fuzz"]], "chipsec.modules.tools.vmm.pcie_overlap_fuzz module": [[215, "module-chipsec.modules.tools.vmm.pcie_overlap_fuzz"]], "chipsec.modules.tools.vmm.vbox package": [[216, "chipsec-modules-tools-vmm-vbox-package"]], "chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase module": [[217, "module-chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase"]], "chipsec.modules.tools.vmm.venom module": [[218, "module-chipsec.modules.tools.vmm.venom"]], "chipsec.modules.tools.vmm.xen package": [[219, "chipsec-modules-tools-vmm-xen-package"]], "chipsec.modules.tools.vmm.xen.define module": [[220, "module-chipsec.modules.tools.vmm.xen.define"]], "chipsec.modules.tools.vmm.xen.hypercall module": [[221, "module-chipsec.modules.tools.vmm.xen.hypercall"]], "chipsec.modules.tools.vmm.xen.hypercallfuzz module": [[222, "module-chipsec.modules.tools.vmm.xen.hypercallfuzz"]], "chipsec.modules.tools.vmm.xen.xsa188 module": [[223, "module-chipsec.modules.tools.vmm.xen.xsa188"]], "chipsec.modules.tools.wsmt module": [[224, "module-chipsec.modules.tools.wsmt"]], "chipsec.parsers module": [[225, "module-chipsec.parsers"]], "chipsec.testcase module": [[226, "module-chipsec.testcase"]], "chipsec.utilcmd package": [[227, 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"chipsec.utilcmd.iommu_cmd module": [[240, "module-chipsec.utilcmd.iommu_cmd"]], "chipsec.utilcmd.lock_check_cmd module": [[241, "module-chipsec.utilcmd.lock_check_cmd"]], "chipsec.utilcmd.mem_cmd module": [[242, "module-chipsec.utilcmd.mem_cmd"]], "chipsec.utilcmd.mmcfg_base_cmd module": [[243, "module-chipsec.utilcmd.mmcfg_base_cmd"]], "chipsec.utilcmd.mmcfg_cmd module": [[244, "module-chipsec.utilcmd.mmcfg_cmd"]], "chipsec.utilcmd.mmio_cmd module": [[245, "module-chipsec.utilcmd.mmio_cmd"]], "chipsec.utilcmd.msgbus_cmd module": [[246, "module-chipsec.utilcmd.msgbus_cmd"]], "chipsec.utilcmd.msr_cmd module": [[247, "module-chipsec.utilcmd.msr_cmd"]], "chipsec.utilcmd.pci_cmd module": [[248, "module-chipsec.utilcmd.pci_cmd"]], "chipsec.utilcmd.reg_cmd module": [[249, "module-chipsec.utilcmd.reg_cmd"]], "chipsec.utilcmd.smbios_cmd module": [[250, "module-chipsec.utilcmd.smbios_cmd"]], "chipsec.utilcmd.smbus_cmd module": [[251, "module-chipsec.utilcmd.smbus_cmd"]], "chipsec.utilcmd.spd_cmd module": [[252, "module-chipsec.utilcmd.spd_cmd"]], "chipsec.utilcmd.spi_cmd module": [[253, "module-chipsec.utilcmd.spi_cmd"]], "chipsec.utilcmd.spidesc_cmd module": [[254, "module-chipsec.utilcmd.spidesc_cmd"]], "chipsec.utilcmd.tpm_cmd module": [[255, "module-chipsec.utilcmd.tpm_cmd"]], "chipsec.utilcmd.txt_cmd module": [[256, "module-chipsec.utilcmd.txt_cmd"]], "chipsec.utilcmd.ucode_cmd module": [[257, "module-chipsec.utilcmd.ucode_cmd"]], "chipsec.utilcmd.uefi_cmd module": [[258, "module-chipsec.utilcmd.uefi_cmd"]], "chipsec.utilcmd.vmem_cmd module": [[259, "module-chipsec.utilcmd.vmem_cmd"]], "chipsec.utilcmd.vmm_cmd module": [[260, "module-chipsec.utilcmd.vmm_cmd"]], "Contact": [[261, "contact"]], "Download CHIPSEC": [[262, "download-chipsec"]], "GitHub repository": [[262, "github-repository"]], "Releases": [[262, "releases"]], "Python": [[262, "python"]], "Interpreting results": [[263, "interpreting-results"]], "Results": [[263, "results"]], "Generic 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"module-chipsec.utilcmd.vmem_cmd"], [260, "module-chipsec.utilcmd.vmm_cmd"]], "chipsec.cfg.parsers.core_parsers": [[71, "module-chipsec.cfg.parsers.core_parsers"]], "chipsec.config": [[72, "module-chipsec.config"]], "chipsec.fuzzing": [[73, "module-chipsec.fuzzing"]], "chipsec.fuzzing.primitives": [[74, "module-chipsec.fuzzing.primitives"]], "chipsec.hal": [[75, "module-chipsec.hal"]], "chipsec.hal.acpi": [[76, "module-chipsec.hal.acpi"]], "chipsec.hal.acpi_tables": [[77, "module-chipsec.hal.acpi_tables"]], "chipsec.hal.cmos": [[78, "module-chipsec.hal.cmos"]], "chipsec.hal.cpu": [[79, "module-chipsec.hal.cpu"]], "chipsec.hal.cpuid": [[80, "module-chipsec.hal.cpuid"]], "chipsec.hal.ec": [[81, "module-chipsec.hal.ec"]], "chipsec.hal.hal_base": [[82, "module-chipsec.hal.hal_base"]], "chipsec.hal.igd": [[83, "module-chipsec.hal.igd"]], "chipsec.hal.interrupts": [[84, "module-chipsec.hal.interrupts"]], "chipsec.hal.io": [[85, "module-chipsec.hal.io"]], "chipsec.hal.iobar": [[86, "module-chipsec.hal.iobar"]], "chipsec.hal.iommu": [[87, "module-chipsec.hal.iommu"]], "chipsec.hal.locks": [[88, "module-chipsec.hal.locks"]], "chipsec.hal.mmio": [[89, "module-chipsec.hal.mmio"]], "chipsec.hal.msgbus": [[90, "module-chipsec.hal.msgbus"]], "chipsec.hal.msr": [[91, "module-chipsec.hal.msr"]], "chipsec.hal.paging": [[92, "module-chipsec.hal.paging"]], "chipsec.hal.pci": [[93, "module-chipsec.hal.pci"]], "chipsec.hal.pcidb": [[94, "module-chipsec.hal.pcidb"]], "chipsec.hal.physmem": [[95, "module-chipsec.hal.physmem"]], "chipsec.hal.smbios": [[96, "module-chipsec.hal.smbios"]], "chipsec.hal.smbus": [[97, "module-chipsec.hal.smbus"]], "chipsec.hal.spd": [[98, "module-chipsec.hal.spd"]], "chipsec.hal.spi": [[99, "module-chipsec.hal.spi"]], "chipsec.hal.spi_descriptor": [[100, "module-chipsec.hal.spi_descriptor"]], "chipsec.hal.spi_jedec_ids": [[101, "module-chipsec.hal.spi_jedec_ids"]], "chipsec.hal.spi_uefi": [[102, "module-chipsec.hal.spi_uefi"]], "chipsec.hal.tpm": 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"module-chipsec.helper.dal.dalhelper"]], "chipsec.helper.efi": [[119, "module-chipsec.helper.efi"]], "chipsec.helper.efi.efihelper": [[120, "module-chipsec.helper.efi.efihelper"]], "chipsec.helper.linux": [[121, "module-chipsec.helper.linux"]], "chipsec.helper.linux.linuxhelper": [[122, "module-chipsec.helper.linux.linuxhelper"]], "chipsec.helper.linuxnative": [[123, "module-chipsec.helper.linuxnative"]], "chipsec.helper.linuxnative.cpuid": [[124, "module-chipsec.helper.linuxnative.cpuid"]], "chipsec.helper.linuxnative.legacy_pci": [[125, "module-chipsec.helper.linuxnative.legacy_pci"]], "chipsec.helper.linuxnative.linuxnativehelper": [[126, "module-chipsec.helper.linuxnative.linuxnativehelper"]], "chipsec.helper.nonehelper": [[127, "module-chipsec.helper.nonehelper"]], "chipsec.helper.oshelper": [[128, "module-chipsec.helper.oshelper"]], "chipsec.helper.windows": [[129, "module-chipsec.helper.windows"]], "chipsec.library": [[131, "module-chipsec.library"]], "chipsec.library.architecture": [[132, "module-chipsec.library.architecture"]], "chipsec.library.bits": [[133, "module-chipsec.library.bits"]], "chipsec.library.control": [[134, "module-chipsec.library.control"]], "chipsec.library.device": [[135, "module-chipsec.library.device"]], "chipsec.library.lock": [[136, "module-chipsec.library.lock"]], "chipsec.library.memory": [[137, "module-chipsec.library.memory"]], "chipsec.library.module_helper": [[138, "module-chipsec.library.module_helper"]], "chipsec.library.options": [[139, "module-chipsec.library.options"]], "chipsec.library.register": [[140, "module-chipsec.library.register"]], "chipsec.library.returncode": [[141, "module-chipsec.library.returncode"]], "chipsec.library.strings": [[142, "module-chipsec.library.strings"]], "chipsec.library.structs": [[143, "module-chipsec.library.structs"]], "chipsec.library.types": [[144, "module-chipsec.library.types"]], "chipsec.library.url": [[145, "module-chipsec.library.url"]], "chipsec.modules": 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"module-chipsec.utilcmd.smbus_cmd"]], "chipsec.utilcmd.spd_cmd": [[252, "module-chipsec.utilcmd.spd_cmd"]], "chipsec.utilcmd.spi_cmd": [[253, "module-chipsec.utilcmd.spi_cmd"]], "chipsec.utilcmd.spidesc_cmd": [[254, "module-chipsec.utilcmd.spidesc_cmd"]], "chipsec.utilcmd.tpm_cmd": [[255, "module-chipsec.utilcmd.tpm_cmd"]], "chipsec.utilcmd.txt_cmd": [[256, "module-chipsec.utilcmd.txt_cmd"]], "chipsec.utilcmd.ucode_cmd": [[257, "module-chipsec.utilcmd.ucode_cmd"]], "chipsec.utilcmd.uefi_cmd": [[258, "module-chipsec.utilcmd.uefi_cmd"]], "chipsec.utilcmd.vmem_cmd": [[259, "module-chipsec.utilcmd.vmem_cmd"]], "chipsec.utilcmd.vmm_cmd": [[260, "module-chipsec.utilcmd.vmm_cmd"]]}}) \ No newline at end of file +Search.setIndex({"docnames": ["contribution/code-style-python", "contribution/sphinx", "development/Architecture-Overview", "development/Configuration-Files", "development/Developing", "development/OS-Helpers-and-Drivers", "development/Platform-Detection", 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177, 186, 195, 211, 213, 217, 231, 241, 246, 248, 256, 263], "8086": [3, 4, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69], "broken": 3, "control": [3, 4, 9, 12, 13, 20, 30, 39, 40, 55, 56, 57, 62, 81, 97, 131, 151, 152, 153, 158, 159, 160, 171, 173, 174, 176, 177, 263], "bit": [3, 10, 131, 153, 154, 158, 159, 161, 163, 170, 173, 187, 214, 242, 259], "field": [3, 4], "alwai": 3, "first": [3, 4, 215], "correct": [3, 10, 233], "off": [3, 10], "bar": [3, 86, 89, 93, 191, 214, 215], "spibar": [3, 245], "bu": [3, 13, 90, 191, 214, 244, 246, 248, 260], "dev": [3, 11, 214, 261], "0x1f": [3, 248], "fun": [3, 214], "reg": [3, 192, 249], "0x10": [3, 89, 242, 245, 246, 259], "width": [3, 195, 237, 239, 244, 245, 248, 264], "mask": [3, 248, 264], "0xfffff000": 3, "size": [3, 81, 86, 99, 192, 198, 210, 214, 236, 243, 251, 255, 263], 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217, 218, 222, 223, 224], "As": [4, 68, 153, 170], "version": [4, 10, 11, 12, 13, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 105, 189], "2": [4, 10, 13, 16, 20, 23, 30, 38, 39, 41, 42, 43, 50, 51, 52, 53, 59, 60, 63, 65, 66, 67, 90, 93, 99, 104, 105, 114, 153, 158, 159, 167, 212, 215, 255, 264], "author": 4, "creat": [4, 9, 10, 13, 14, 197, 233, 253, 264], "get_control": [4, 249], "set_control": [4, 249], "especi": 4, "reus": 4, "across": 4, "pass": [4, 7, 153, 154, 158, 159, 161, 163, 173, 192, 198, 263], "fail": [4, 153, 154, 158, 159, 161, 163, 171, 173, 194, 198, 263, 264], "cfg": [4, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 189], "bioslocken": [4, 153, 249], "ble": [4, 153, 249], "statu": [4, 206, 240], "c": [4, 14, 16, 20, 30, 38, 39, 50, 51, 52, 53, 54, 55, 57, 59, 60, 63, 65, 66, 67, 93, 161, 163], "react": [4, 263], "log_pass": [4, 7], "log_fail": 4, "re": [4, 7, 9], "api": [4, 12, 13, 179, 180, 194], "see": [4, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 172, 224], "next": [4, 14], "detail": [4, 13, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 68, 180, 224], "copi": [4, 13, 14, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67], "directori": [4, 9, 13, 14, 196, 233], "locat": [4, 13, 195, 196, 263], "platform_cod": 4, "found": [4, 9, 170, 191, 262], "review": [4, 198, 263], "datasheet": [4, 18, 20, 21, 23, 30, 41, 42, 43, 54, 55, 56, 57, 62, 63, 69, 90, 173], "appropri": [4, 10, 14], "place": [4, 264], "correctli": [4, 9, 153, 162, 171, 233, 263], "4th": 4, "intel": [4, 6, 12, 16, 18, 20, 21, 22, 23, 26, 30, 33, 37, 38, 39, 40, 41, 42, 43, 50, 51, 52, 53, 54, 55, 56, 57, 59, 60, 62, 63, 65, 66, 67, 68, 69, 83, 90, 99, 118, 156, 158, 160, 161, 163, 170, 172, 173, 180, 191, 256, 261], "core": [4, 22, 37, 39, 40, 42, 62, 69, 99, 158, 162, 164, 169, 171], "haswel": [4, 29, 30, 99], "interact": 5, "directli": [5, 194, 196, 197], "etc": [5, 9, 108, 111, 191, 233, 253], "like": [5, 9, 14, 171, 186, 261], "newhelp": 5, "def": [5, 7, 8], "__init__": [5, 7], "super": 5, "dal": [5, 10, 115], "linux": [5, 10, 115, 126, 186, 261], "linuxn": [5, 115], "nonehelp": [5, 115], "scan": [6, 192], "enumer": [6, 13, 93, 158, 248], "devic": [6, 9, 10, 13, 83, 93, 94, 101, 114, 131, 171, 173, 175, 191, 196, 207, 208, 214, 215, 224, 244, 248, 260], "correspond": [6, 215, 233], "per": [6, 99, 158, 194], "0x8086": 6, "0x1022": 6, "amd": [6, 261], "lookup": 6, "fall": 6, "back": 6, "p": [6, 13, 264], "flag": 6, "ignor": [6, 263], "depric": 6, "moduleclass": 7, "align": 7, "prerequisit": 7, "some_module_requir": 7, "notapplic": 7, "action": [7, 8], "wa": [7, 94, 153, 169, 263], "success": [7, 206], "module_argv": 7, "primari": [7, 224], "execut": [7, 9, 10, 68, 158, 170, 171, 172, 189, 194, 195, 196, 197, 256, 263], "handl": [7, 9, 186, 198], "start_test": 7, "chipsec_util": [8, 9, 13, 14, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260], "live": [8, 258], "command_display_nam": 8, "_cmd": 8, "argpars": 8, "argumentpars": 8, "basecommand": 8, "toload": 8, "commandclass": 8, "parse_argu": 8, "parser": 8, "prog": 8, "usag": [8, 9, 14, 78, 80, 81, 83, 84, 85, 86, 89, 90, 91, 93, 95, 99, 100, 102, 106, 112, 113, 150, 151, 152, 153, 154, 156, 157, 159, 160, 161, 162, 163, 164, 167, 168, 169, 170, 171, 172, 173, 174, 175, 176, 177, 179, 180, 186, 187, 189, 191, 192, 194, 195, 196, 197, 198, 201, 202, 206, 207, 208, 210, 211, 212, 213, 214, 215, 217, 218, 222, 223, 224, 229, 233, 243, 256, 264], "__doc__": 8, "subpars": 8, "add_subpars": 8, "parser_entrypoint": 8, "add_pars": 8, "set_default": 8, "func": 8, "parse_arg": 8, "argv": 8, "just": [9, 171, 263], "python": [9, 10, 11, 12, 13, 118, 253], "store": [9, 153, 233], "under": [9, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67, 158], "subdirectori": [9, 14], "There": [9, 10], "appli": 9, "everi": 9, "where": [9, 68, 153, 167, 169, 179, 180, 192, 201, 202, 211, 212, 213, 214], "framework": [9, 10, 16, 38, 39, 50, 51, 52, 53, 59, 60, 65, 66, 67], "fuzzer": [9, 201, 206, 207, 208, 210, 211, 212, 213, 214, 215, 222, 263], "intern": 9, "concept": [9, 223], "string": [9, 10, 131], "form": 9, "bios_wp": [9, 146, 149, 263, 264], "mean": [9, 169, 174], "root_dir": 9, "map": [9, 13, 68, 89, 162, 214, 215, 244, 263], "vulner": [9, 10, 152, 153, 158, 170, 177, 180, 186, 189, 191, 192, 194, 195, 196, 218, 223, 263], "being": 9, "known": [9, 206, 263], "event": [9, 105, 151, 223], "bios_smi": [9, 146, 149, 263], "flash": [9, 11, 61, 99, 100, 153, 174, 175, 176, 177, 196, 197, 198, 233, 253, 258, 263], "descriptor": [9, 100, 174, 175, 176, 263], "spi_desc": [9, 146, 149, 263], "spi_fdopss": [9, 146, 149, 263], "spi_lock": [9, 146, 149, 263, 264], "analysi": [9, 224, 233, 263], "smm": [9, 146, 149, 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"bioswriteen": [151, 153, 249], "hijack": [152, 191], "vmware": 152, "dig": 152, "bing": 152, "sun": 152, "topswapstatu": 152, "topswap": 152, "howev": 153, "would": 153, "both": [153, 258], "pr0": [153, 177], "entir": [153, 253, 263], "often": [153, 175], "tale": 153, "One": 153, "abl": [153, 169], "therebi": 153, "sometim": 153, "wpd": 153, "handler": [153, 192, 212], "decid": 153, "whether": 153, "demonstr": [153, 172], "speed": 153, "racer": 153, "outstand": 153, "eiss": 153, "smm_bwp": 153, "ensur": 153, "prn": 153, "prb": 153, "rpe": 153, "prl": 153, "wpe": 153, "pr": 153, "ia32_u_cet": 154, "ia32_s_cet": 154, "doe": [154, 171, 196, 233, 241, 263], "NOT": [154, 263, 264], "displai": [156, 211, 243, 264], "32": [156, 160, 170, 260], "sdm": [156, 160, 170], "articl": [156, 160, 170], "ia32_bios_sign_id": 156, "untrust": 157, "msr_bios_don": [157, 171], "soc_bios_don": 157, "specul": 158, "side": 158, "channel": [158, 207, 223], "branch": 158, "inject": 158, "k": [158, 264], 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"sinkhol": 186, "generate_test_id": 187, "te": 189, "rogue_mmio_bar": 191, "smm_ptr": 192, "reput": 194, "s3script_modifi": 195, "scan_block": 196, "scan_imag": 197, "uefivar_fuzz": 198, "cpuid_fuzz": 201, "ept_find": 202, "hv": [203, 204, 205, 206, 207, 208, 209, 210], "defin": [204, 220], "hypercal": [205, 221], "hypercallfuzz": [206, 211, 222], "synth_dev": 207, "synth_kbd": 208, "vmbu": 209, "vmbusfuzz": 210, "iofuzz": 212, "msr_fuzz": 213, "pcie_fuzz": 214, "pcie_overlap_fuzz": 215, "vbox": [216, 217], "vbox_crash_apicbas": 217, "venom": 218, "xen": [219, 220, 221, 222, 223], "xsa188": 223, "wsmt": 224, "testcas": 226, "utilcmd": [227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 258, 259, 260], "acpi_cmd": 228, "chipset_cmd": 229, "cmos_cmd": 230, "config_cmd": 231, "cpu_cmd": 232, "decode_cmd": 233, "deltas_cmd": 234, "desc_cmd": 235, "ec_cmd": 236, "igd_cmd": 237, "interrupts_cmd": 238, "io_cmd": 239, "iommu_cmd": 240, "lock_check_cmd": 241, "mem_cmd": 242, "mmcfg_base_cmd": 243, "mmcfg_cmd": 244, "mmio_cmd": 245, "msgbus_cmd": 246, "msr_cmd": 247, "pci_cmd": 248, "reg_cmd": 249, "smbios_cmd": 250, "smbus_cmd": 251, "spd_cmd": 252, "spi_cmd": 253, "spidesc_cmd": 254, "tpm_cmd": 255, "txt_cmd": 256, "ucode_cmd": 257, "uefi_cmd": 258, "vmem_cmd": 259, "vmm_cmd": 260, "contact": 261, "download": 262, "github": 262, "repositori": 262, "releas": 262, "interpret": 263, "result": 263, "mean": 263, "autom": 263}, "envversion": {"sphinx.domains.c": 3, "sphinx.domains.changeset": 1, "sphinx.domains.citation": 1, "sphinx.domains.cpp": 9, "sphinx.domains.index": 1, "sphinx.domains.javascript": 3, "sphinx.domains.math": 2, "sphinx.domains.python": 4, "sphinx.domains.rst": 2, "sphinx.domains.std": 2, "sphinx.ext.todo": 2, "sphinx.ext.viewcode": 1, "sphinx": 58}, "alltitles": {"Python Version": [[0, "python-version"]], "Python Coding Style Guide": [[0, "python-coding-style-guide"]], "f-Strings": [[0, "f-strings"]], "PEP versions supported by CHIPSEC": [[0, "id2"], [0, "id3"], [0, "id4"], [0, "id5"], [0, "id6"]], "Type Hints": [[0, "type-hints"]], "Underscores in Numeric Literals": [[0, "underscores-in-numeric-literals"]], "Walrus Operator (:=)": [[0, "walrus-operator"]], "Deprecate distutils module support": [[0, "deprecate-distutils-module-support"]], "Sphinx Version": [[1, "sphinx-version"]], "Generating Documentation": [[1, "generating-documentation"]], "References": [[1, "references"]], "Architecture Overview": [[2, "architecture-overview"]], "Core components": [[2, "core-components"]], "Commands": [[2, "commands"]], "HAL (Hardware Abstraction Layer)": [[2, "hal-hardware-abstraction-layer"]], "Fuzzing": [[2, "fuzzing"]], "CHIPSEC_MAIN Program Flow": [[2, "chipsec-main-program-flow"]], "CHIPSEC_UTIL Program Flow": [[2, "chipsec-util-program-flow"]], "Auxiliary components": [[2, "auxiliary-components"]], "Executable build scripts": [[2, "executable-build-scripts"]], "Configuration Files": [[3, "configuration-files"]], "Configuration File Example": [[3, "configuration-file-example"]], "List of Cfg components": [[3, "list-of-cfg-components"]], "Writing Your Own Modules": [[4, "writing-your-own-modules"]], "OS Helpers and Drivers": [[5, "os-helpers-and-drivers"]], "Mostly invoked by HAL modules": [[5, "mostly-invoked-by-hal-modules"]], "Helpers import from BaseHelper": [[5, "helpers-import-from-basehelper"]], "Create a New Helper": [[5, "create-a-new-helper"]], "Example": [[5, "example"]], "Helper components": [[5, "helper-components"]], "Methods for Platform Detection": [[6, "methods-for-platform-detection"]], "Uses PCI VID and DID to detect processor and PCH": [[6, "uses-pci-vid-and-did-to-detect-processor-and-pch"]], "Chip information located in chipsec/chipset.py.": [[6, "chip-information-located-in-chipsec-chipset-py"]], "Platform Configuration Options": [[6, "platform-configuration-options"]], "Sample module code template": [[7, "sample-module-code-template"]], "CHIPSEC Modules": [[9, "chipsec-modules"]], "Attack Surface/Vector: Firmware protections in ROM": [[9, "id1"]], "Attack Surface/Vector: Runtime protection of SMRAM": [[9, "id2"]], "Attack Surface/Vector: Secure boot - Incorrect protection of secure boot configuration": [[9, "id3"]], "Attack Surface/Vector: Persistent firmware configuration": [[9, "id4"]], "Attack Surface/Vector: Platform hardware configuration": [[9, "id5"]], "Attack Surface/Vector: Runtime firmware (eg. SMI handlers)": [[9, "id6"]], "Attack Surface/Vector: Boot time firmware": [[9, "id7"]], "Attack Surface/Vector: Power state transitions (eg. resume from sleep)": [[9, "id8"]], "Attack Surface/Vector: Firmware update": [[9, "id9"]], "Attack Surface/Vector: Network interfaces": [[9, "id10"]], "Attack Surface/Vector: Misc": [[9, "id11"]], "Modules": [[9, "modules"]], "CHIPSEC 1.13.4": [[10, "chipsec-1-13-4"]], "Start here": [[10, null]], "Installation": [[10, "installation"], [10, null]], "Using CHIPSEC": [[10, "using-chipsec"], [10, null]], "Module & Command Development": [[10, "module-command-development"]], "Architecture and Modules": [[10, null]], "Contribution and Style Guides": [[10, "contribution-and-style-guides"]], "Contribution Guide": [[10, null]], "Linux Installation": [[11, "linux-installation"]], "Creating a Live Linux image": [[11, "creating-a-live-linux-image"]], "Installing Kali Linux": [[11, "installing-kali-linux"]], "Prerequisites": [[11, "prerequisites"], [12, "prerequisites"]], "Installing CHIPSEC": [[11, "installing-chipsec"], [14, "installing-chipsec"]], "Building CHIPSEC": [[11, "building-chipsec"]], "Run CHIPSEC": [[11, "run-chipsec"]], "DAL Windows Installation": [[12, "dal-windows-installation"]], "Building": [[12, "building"], [13, "building"]], "Windows Installation": [[13, "windows-installation"]], "Install CHIPSEC Dependencies": [[13, "install-chipsec-dependencies"]], "Turn off kernel driver signature checks": [[13, "turn-off-kernel-driver-signature-checks"]], "Alternate Build Methods": [[13, "alternate-build-methods"]], "Windows PCI Filter Driver": [[13, "windows-pci-filter-driver"]], "Install PCI Filter Driver": [[13, "install-pci-filter-driver"]], "Filter Driver Access PCI Config Space Test": [[13, "filter-driver-access-pci-config-space-test"]], "Building a Bootable USB drive with UEFI Shell (x64)": [[14, "building-a-bootable-usb-drive-with-uefi-shell-x64"]], "Run CHIPSEC in UEFI Shell": [[14, "run-chipsec-in-uefi-shell"]], "Building UEFI Python 3.6.8 (optional)": [[14, "building-uefi-python-3-6-8-optional"]], "adl": [[16, "adl"]], "apl": [[17, "apl"]], "avn": [[18, "avn"]], "bdw": [[19, "bdw"]], "bdx": [[20, "bdx"]], "byt": [[21, "byt"]], "cfl": [[22, "cfl"]], "cht": [[23, "cht"]], "cml": [[24, "cml"]], "common": [[25, "common"]], "dnv": [[26, "dnv"]], "ehl": [[27, "ehl"]], "glk": [[28, "glk"]], "hsw": [[29, "hsw"]], "hsx": [[30, "hsx"]], "icl": [[31, "icl"]], "icx": [[32, "icx"]], "iommu": [[33, "iommu"]], "ivb": [[34, "ivb"]], "ivt": [[35, "ivt"]], "jkt": [[36, "jkt"]], "kbl": [[37, "kbl"]], "mtl": [[38, "mtl"]], "pch_1xx": [[39, "pch-1xx"]], "pch_2xx": [[40, "pch-2xx"]], "pch_3xx": [[41, "pch-3xx"]], "pch_3xxlp": [[42, "pch-3xxlp"]], "pch_3xxop": [[43, "pch-3xxop"]], "pch_495": [[44, "pch-495"]], "pch_4xx": [[45, "pch-4xx"]], "pch_4xxh": [[46, "pch-4xxh"]], "pch_4xxlp": [[47, "pch-4xxlp"]], "pch_5xxh": [[48, "pch-5xxh"]], "pch_5xxlp": [[49, "pch-5xxlp"]], "pch_6xxP": [[50, "pch-6xxp"]], "pch_6xxS": [[51, "pch-6xxs"]], "pch_7x": [[52, "pch-7x"]], "pch_8x": [[53, "pch-8x"]], "pch_c60x": [[54, "pch-c60x"]], "pch_c61x": [[55, "pch-c61x"]], "pch_c620": [[56, "pch-c620"]], "pmc_i440fx": [[57, "pmc-i440fx"]], "qrk": [[58, "qrk"]], "rkl": [[59, "rkl"]], "rpl": [[60, "rpl"]], "sfdp": [[61, "sfdp"]], "skl": [[62, "skl"]], "skx": [[63, "skx"]], "snb": [[64, "snb"]], "tglh": [[65, "tglh"]], "tglu": [[66, "tglu"]], "tpm12": [[67, "tpm12"]], "txt": [[68, "txt"]], "whl": [[69, "whl"]], "chipsec.cfg.parsers package": [[70, "chipsec-cfg-parsers-package"]], "chipsec.cfg.parsers.core_parsers module": [[71, "module-chipsec.cfg.parsers.core_parsers"]], "chipsec.config module": [[72, "module-chipsec.config"]], "chipsec.fuzzing package": [[73, "chipsec-fuzzing-package"]], "chipsec.fuzzing.primitives module": [[74, "module-chipsec.fuzzing.primitives"]], "chipsec.hal package": [[75, "chipsec-hal-package"]], "chipsec.hal.acpi module": [[76, "module-chipsec.hal.acpi"]], "chipsec.hal.acpi_tables module": [[77, "module-chipsec.hal.acpi_tables"]], "chipsec.hal.cmos module": [[78, "module-chipsec.hal.cmos"]], "chipsec.hal.cpu module": [[79, "module-chipsec.hal.cpu"]], "chipsec.hal.cpuid module": [[80, "module-chipsec.hal.cpuid"]], "chipsec.hal.ec module": [[81, "module-chipsec.hal.ec"]], "chipsec.hal.hal_base module": [[82, "module-chipsec.hal.hal_base"]], "chipsec.hal.igd module": [[83, "module-chipsec.hal.igd"]], "chipsec.hal.interrupts module": [[84, "module-chipsec.hal.interrupts"]], "chipsec.hal.io module": [[85, "module-chipsec.hal.io"]], "chipsec.hal.iobar module": [[86, "module-chipsec.hal.iobar"]], "chipsec.hal.iommu module": [[87, "module-chipsec.hal.iommu"]], "chipsec.hal.locks module": [[88, "module-chipsec.hal.locks"]], "chipsec.hal.mmio module": [[89, "module-chipsec.hal.mmio"]], "chipsec.hal.msgbus module": [[90, "module-chipsec.hal.msgbus"]], "chipsec.hal.msr module": [[91, "module-chipsec.hal.msr"]], "chipsec.hal.paging module": [[92, "module-chipsec.hal.paging"]], "chipsec.hal.pci module": [[93, "module-chipsec.hal.pci"]], "chipsec.hal.pcidb module": [[94, "module-chipsec.hal.pcidb"]], "chipsec.hal.physmem module": [[95, "module-chipsec.hal.physmem"]], "chipsec.hal.smbios module": [[96, "module-chipsec.hal.smbios"]], "chipsec.hal.smbus module": [[97, "module-chipsec.hal.smbus"]], "chipsec.hal.spd module": [[98, "module-chipsec.hal.spd"]], "chipsec.hal.spi module": [[99, "module-chipsec.hal.spi"]], "chipsec.hal.spi_descriptor module": [[100, "module-chipsec.hal.spi_descriptor"]], "chipsec.hal.spi_jedec_ids module": [[101, "module-chipsec.hal.spi_jedec_ids"]], "chipsec.hal.spi_uefi module": [[102, "module-chipsec.hal.spi_uefi"]], "chipsec.hal.tpm module": [[103, "module-chipsec.hal.tpm"]], "chipsec.hal.tpm12_commands module": [[104, "module-chipsec.hal.tpm12_commands"]], "chipsec.hal.tpm_eventlog module": [[105, "module-chipsec.hal.tpm_eventlog"]], "chipsec.hal.ucode module": [[106, "module-chipsec.hal.ucode"]], "chipsec.hal.uefi module": [[107, "module-chipsec.hal.uefi"]], "chipsec.hal.uefi_common module": [[108, "module-chipsec.hal.uefi_common"]], "chipsec.hal.uefi_compression module": [[109, "module-chipsec.hal.uefi_compression"]], "chipsec.hal.uefi_fv module": [[110, "module-chipsec.hal.uefi_fv"]], "chipsec.hal.uefi_platform module": [[111, "module-chipsec.hal.uefi_platform"]], "chipsec.hal.uefi_search module": [[112, "module-chipsec.hal.uefi_search"]], "chipsec.hal.virtmem module": [[113, "module-chipsec.hal.virtmem"]], "chipsec.hal.vmm module": [[114, "module-chipsec.hal.vmm"]], "chipsec.helper package": [[115, "chipsec-helper-package"]], "chipsec.helper.basehelper module": [[116, "module-chipsec.helper.basehelper"]], "chipsec.helper.dal package": [[117, "chipsec-helper-dal-package"]], "chipsec.helper.dal.dalhelper module": [[118, "module-chipsec.helper.dal.dalhelper"]], "chipsec.helper.efi package": [[119, "chipsec-helper-efi-package"]], "chipsec.helper.efi.efihelper module": [[120, "module-chipsec.helper.efi.efihelper"]], "chipsec.helper.linux package": [[121, "chipsec-helper-linux-package"]], "chipsec.helper.linux.linuxhelper module": [[122, "module-chipsec.helper.linux.linuxhelper"]], "chipsec.helper.linuxnative package": [[123, "chipsec-helper-linuxnative-package"]], "chipsec.helper.linuxnative.cpuid module": [[124, "module-chipsec.helper.linuxnative.cpuid"]], "chipsec.helper.linuxnative.legacy_pci module": [[125, "module-chipsec.helper.linuxnative.legacy_pci"]], "chipsec.helper.linuxnative.linuxnativehelper module": [[126, "module-chipsec.helper.linuxnative.linuxnativehelper"]], "chipsec.helper.nonehelper module": [[127, "module-chipsec.helper.nonehelper"]], "chipsec.helper.oshelper module": [[128, "module-chipsec.helper.oshelper"]], "chipsec.helper.windows package": [[129, "chipsec-helper-windows-package"]], "chipsec.helper.windows.windowshelper module": [[130, "chipsec-helper-windows-windowshelper-module"]], "chipsec.library package": [[131, "chipsec-library-package"]], "chipsec.library.architecture module": [[132, "module-chipsec.library.architecture"]], "chipsec.library.bits module": [[133, "module-chipsec.library.bits"]], "chipsec.library.control module": [[134, "module-chipsec.library.control"]], "chipsec.library.device module": [[135, "module-chipsec.library.device"]], "chipsec.library.lock module": [[136, "module-chipsec.library.lock"]], "chipsec.library.memory module": [[137, "module-chipsec.library.memory"]], "chipsec.library.module_helper module": [[138, "module-chipsec.library.module_helper"]], "chipsec.library.options module": [[139, "module-chipsec.library.options"]], "chipsec.library.register module": [[140, "module-chipsec.library.register"]], "chipsec.library.returncode module": [[141, "module-chipsec.library.returncode"]], "chipsec.library.strings module": [[142, "module-chipsec.library.strings"]], "chipsec.library.structs module": [[143, "module-chipsec.library.structs"]], "chipsec.library.types module": [[144, "module-chipsec.library.types"]], "chipsec.library.url module": [[145, "module-chipsec.library.url"]], "chipsec.modules package": [[146, "chipsec-modules-package"]], "chipsec.modules.bdw package": [[147, "module-chipsec.modules.bdw"]], "chipsec.modules.byt package": [[148, "module-chipsec.modules.byt"]], "chipsec.modules.common package": [[149, "chipsec-modules-common-package"]], "chipsec.modules.common.bios_kbrd_buffer module": [[150, "module-chipsec.modules.common.bios_kbrd_buffer"]], "chipsec.modules.common.bios_smi module": [[151, "module-chipsec.modules.common.bios_smi"]], "chipsec.modules.common.bios_ts module": [[152, "module-chipsec.modules.common.bios_ts"]], "chipsec.modules.common.bios_wp module": [[153, "module-chipsec.modules.common.bios_wp"]], "chipsec.modules.common.cet module": [[154, "module-chipsec.modules.common.cet"]], "chipsec.modules.common.cpu package": [[155, "chipsec-modules-common-cpu-package"]], "chipsec.modules.common.cpu.cpu_info module": [[156, "module-chipsec.modules.common.cpu.cpu_info"]], "chipsec.modules.common.cpu.ia_untrusted module": [[157, "module-chipsec.modules.common.cpu.ia_untrusted"]], "chipsec.modules.common.cpu.spectre_v2 module": [[158, "module-chipsec.modules.common.cpu.spectre_v2"]], "chipsec.modules.common.debugenabled module": [[159, "module-chipsec.modules.common.debugenabled"]], "chipsec.modules.common.ia32cfg module": [[160, "module-chipsec.modules.common.ia32cfg"]], "chipsec.modules.common.me_mfg_mode module": [[161, "module-chipsec.modules.common.me_mfg_mode"]], "chipsec.modules.common.memconfig module": [[162, "module-chipsec.modules.common.memconfig"]], "chipsec.modules.common.memlock module": [[163, "module-chipsec.modules.common.memlock"]], "chipsec.modules.common.remap module": [[164, "module-chipsec.modules.common.remap"]], "chipsec.modules.common.rtclock module": [[165, "chipsec-modules-common-rtclock-module"]], "chipsec.modules.common.secureboot package": [[166, "chipsec-modules-common-secureboot-package"]], "chipsec.modules.common.secureboot.variables module": [[167, "module-chipsec.modules.common.secureboot.variables"]], "chipsec.modules.common.sgx_check module": [[168, "module-chipsec.modules.common.sgx_check"]], "chipsec.modules.common.smm module": [[169, "module-chipsec.modules.common.smm"]], "chipsec.modules.common.smm_code_chk module": [[170, "module-chipsec.modules.common.smm_code_chk"]], "chipsec.modules.common.smm_dma module": [[171, "module-chipsec.modules.common.smm_dma"]], "chipsec.modules.common.smrr module": [[172, "module-chipsec.modules.common.smrr"]], "chipsec.modules.common.spd_wd module": [[173, "module-chipsec.modules.common.spd_wd"]], "chipsec.modules.common.spi_access module": [[174, "module-chipsec.modules.common.spi_access"]], "chipsec.modules.common.spi_desc module": [[175, "module-chipsec.modules.common.spi_desc"]], "chipsec.modules.common.spi_fdopss module": [[176, "module-chipsec.modules.common.spi_fdopss"]], "chipsec.modules.common.spi_lock module": [[177, "module-chipsec.modules.common.spi_lock"]], "chipsec.modules.common.uefi package": [[178, "chipsec-modules-common-uefi-package"]], "chipsec.modules.common.uefi.access_uefispec module": [[179, "module-chipsec.modules.common.uefi.access_uefispec"]], "chipsec.modules.common.uefi.s3bootscript module": [[180, "module-chipsec.modules.common.uefi.s3bootscript"]], "chipsec.modules.hsw package": [[181, "module-chipsec.modules.hsw"]], "chipsec.modules.ivb package": [[182, "module-chipsec.modules.ivb"]], "chipsec.modules.snb package": [[183, "module-chipsec.modules.snb"]], "chipsec.modules.tools package": [[184, "chipsec-modules-tools-package"]], "chipsec.modules.tools.cpu package": [[185, "chipsec-modules-tools-cpu-package"]], "chipsec.modules.tools.cpu.sinkhole module": [[186, "module-chipsec.modules.tools.cpu.sinkhole"]], "chipsec.modules.tools.generate_test_id module": [[187, "module-chipsec.modules.tools.generate_test_id"]], "chipsec.modules.tools.secureboot package": [[188, "chipsec-modules-tools-secureboot-package"]], "chipsec.modules.tools.secureboot.te module": [[189, "module-chipsec.modules.tools.secureboot.te"]], "chipsec.modules.tools.smm package": [[190, "chipsec-modules-tools-smm-package"]], "chipsec.modules.tools.smm.rogue_mmio_bar module": [[191, "module-chipsec.modules.tools.smm.rogue_mmio_bar"]], "chipsec.modules.tools.smm.smm_ptr module": [[192, "module-chipsec.modules.tools.smm.smm_ptr"]], "chipsec.modules.tools.uefi package": [[193, "chipsec-modules-tools-uefi-package"]], "chipsec.modules.tools.uefi.reputation module": [[194, "module-chipsec.modules.tools.uefi.reputation"]], "chipsec.modules.tools.uefi.s3script_modify module": [[195, "module-chipsec.modules.tools.uefi.s3script_modify"]], "chipsec.modules.tools.uefi.scan_blocked module": [[196, "module-chipsec.modules.tools.uefi.scan_blocked"]], "chipsec.modules.tools.uefi.scan_image module": [[197, "module-chipsec.modules.tools.uefi.scan_image"]], "chipsec.modules.tools.uefi.uefivar_fuzz module": [[198, "module-chipsec.modules.tools.uefi.uefivar_fuzz"]], "chipsec.modules.tools.vmm package": [[199, "chipsec-modules-tools-vmm-package"]], "chipsec.modules.tools.vmm.common module": [[200, "module-chipsec.modules.tools.vmm.common"]], "chipsec.modules.tools.vmm.cpuid_fuzz module": [[201, "module-chipsec.modules.tools.vmm.cpuid_fuzz"]], "chipsec.modules.tools.vmm.ept_finder module": [[202, "module-chipsec.modules.tools.vmm.ept_finder"]], "chipsec.modules.tools.vmm.hv package": [[203, "chipsec-modules-tools-vmm-hv-package"]], "chipsec.modules.tools.vmm.hv.define module": [[204, "module-chipsec.modules.tools.vmm.hv.define"]], "chipsec.modules.tools.vmm.hv.hypercall module": [[205, "module-chipsec.modules.tools.vmm.hv.hypercall"]], "chipsec.modules.tools.vmm.hv.hypercallfuzz module": [[206, "module-chipsec.modules.tools.vmm.hv.hypercallfuzz"]], "chipsec.modules.tools.vmm.hv.synth_dev module": [[207, "module-chipsec.modules.tools.vmm.hv.synth_dev"]], "chipsec.modules.tools.vmm.hv.synth_kbd module": [[208, "module-chipsec.modules.tools.vmm.hv.synth_kbd"]], "chipsec.modules.tools.vmm.hv.vmbus module": [[209, "module-chipsec.modules.tools.vmm.hv.vmbus"]], "chipsec.modules.tools.vmm.hv.vmbusfuzz module": [[210, "module-chipsec.modules.tools.vmm.hv.vmbusfuzz"]], "chipsec.modules.tools.vmm.hypercallfuzz module": [[211, "module-chipsec.modules.tools.vmm.hypercallfuzz"]], "chipsec.modules.tools.vmm.iofuzz module": [[212, "module-chipsec.modules.tools.vmm.iofuzz"]], "chipsec.modules.tools.vmm.msr_fuzz module": [[213, "module-chipsec.modules.tools.vmm.msr_fuzz"]], "chipsec.modules.tools.vmm.pcie_fuzz module": [[214, "module-chipsec.modules.tools.vmm.pcie_fuzz"]], "chipsec.modules.tools.vmm.pcie_overlap_fuzz module": [[215, "module-chipsec.modules.tools.vmm.pcie_overlap_fuzz"]], "chipsec.modules.tools.vmm.vbox package": [[216, "chipsec-modules-tools-vmm-vbox-package"]], "chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase module": [[217, "module-chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase"]], "chipsec.modules.tools.vmm.venom module": [[218, "module-chipsec.modules.tools.vmm.venom"]], "chipsec.modules.tools.vmm.xen package": [[219, "chipsec-modules-tools-vmm-xen-package"]], "chipsec.modules.tools.vmm.xen.define module": [[220, "module-chipsec.modules.tools.vmm.xen.define"]], "chipsec.modules.tools.vmm.xen.hypercall module": [[221, "module-chipsec.modules.tools.vmm.xen.hypercall"]], "chipsec.modules.tools.vmm.xen.hypercallfuzz module": [[222, "module-chipsec.modules.tools.vmm.xen.hypercallfuzz"]], "chipsec.modules.tools.vmm.xen.xsa188 module": [[223, "module-chipsec.modules.tools.vmm.xen.xsa188"]], "chipsec.modules.tools.wsmt module": [[224, "module-chipsec.modules.tools.wsmt"]], "chipsec.parsers module": [[225, "module-chipsec.parsers"]], "chipsec.testcase module": [[226, "module-chipsec.testcase"]], "chipsec.utilcmd package": [[227, "chipsec-utilcmd-package"]], "chipsec.utilcmd.acpi_cmd module": [[228, "module-chipsec.utilcmd.acpi_cmd"]], "chipsec.utilcmd.chipset_cmd module": [[229, "module-chipsec.utilcmd.chipset_cmd"]], "chipsec.utilcmd.cmos_cmd module": [[230, "module-chipsec.utilcmd.cmos_cmd"]], "chipsec.utilcmd.config_cmd module": [[231, "module-chipsec.utilcmd.config_cmd"]], "chipsec.utilcmd.cpu_cmd module": [[232, "module-chipsec.utilcmd.cpu_cmd"]], "chipsec.utilcmd.decode_cmd module": [[233, "module-chipsec.utilcmd.decode_cmd"]], "chipsec.utilcmd.deltas_cmd module": [[234, "module-chipsec.utilcmd.deltas_cmd"]], "chipsec.utilcmd.desc_cmd module": [[235, "module-chipsec.utilcmd.desc_cmd"]], "chipsec.utilcmd.ec_cmd module": [[236, "module-chipsec.utilcmd.ec_cmd"]], "chipsec.utilcmd.igd_cmd module": [[237, "module-chipsec.utilcmd.igd_cmd"]], "chipsec.utilcmd.interrupts_cmd module": [[238, "module-chipsec.utilcmd.interrupts_cmd"]], "chipsec.utilcmd.io_cmd module": [[239, "module-chipsec.utilcmd.io_cmd"]], "chipsec.utilcmd.iommu_cmd module": [[240, "module-chipsec.utilcmd.iommu_cmd"]], "chipsec.utilcmd.lock_check_cmd module": [[241, "module-chipsec.utilcmd.lock_check_cmd"]], "chipsec.utilcmd.mem_cmd module": [[242, "module-chipsec.utilcmd.mem_cmd"]], "chipsec.utilcmd.mmcfg_base_cmd module": [[243, "module-chipsec.utilcmd.mmcfg_base_cmd"]], "chipsec.utilcmd.mmcfg_cmd module": [[244, "module-chipsec.utilcmd.mmcfg_cmd"]], "chipsec.utilcmd.mmio_cmd module": [[245, "module-chipsec.utilcmd.mmio_cmd"]], "chipsec.utilcmd.msgbus_cmd module": [[246, "module-chipsec.utilcmd.msgbus_cmd"]], "chipsec.utilcmd.msr_cmd module": [[247, "module-chipsec.utilcmd.msr_cmd"]], "chipsec.utilcmd.pci_cmd module": [[248, "module-chipsec.utilcmd.pci_cmd"]], "chipsec.utilcmd.reg_cmd module": [[249, "module-chipsec.utilcmd.reg_cmd"]], "chipsec.utilcmd.smbios_cmd module": [[250, "module-chipsec.utilcmd.smbios_cmd"]], "chipsec.utilcmd.smbus_cmd module": [[251, "module-chipsec.utilcmd.smbus_cmd"]], "chipsec.utilcmd.spd_cmd module": [[252, "module-chipsec.utilcmd.spd_cmd"]], "chipsec.utilcmd.spi_cmd module": [[253, "module-chipsec.utilcmd.spi_cmd"]], "chipsec.utilcmd.spidesc_cmd module": [[254, "module-chipsec.utilcmd.spidesc_cmd"]], "chipsec.utilcmd.tpm_cmd module": [[255, "module-chipsec.utilcmd.tpm_cmd"]], "chipsec.utilcmd.txt_cmd module": [[256, "module-chipsec.utilcmd.txt_cmd"]], "chipsec.utilcmd.ucode_cmd module": [[257, "module-chipsec.utilcmd.ucode_cmd"]], "chipsec.utilcmd.uefi_cmd module": [[258, "module-chipsec.utilcmd.uefi_cmd"]], "chipsec.utilcmd.vmem_cmd module": [[259, "module-chipsec.utilcmd.vmem_cmd"]], "chipsec.utilcmd.vmm_cmd module": [[260, "module-chipsec.utilcmd.vmm_cmd"]], "Contact": [[261, "contact"]], "Download CHIPSEC": [[262, "download-chipsec"]], "GitHub repository": [[262, "github-repository"]], "Releases": [[262, "releases"]], "Python": [[262, "python"]], "Interpreting results": [[263, "interpreting-results"]], "Results": [[263, "results"]], "Generic results meanings": [[263, "id2"]], "Automated Tests": [[263, "automated-tests"]], "Modules results meanings": [[263, "id3"]], "Tools": [[263, "tools"]], "Running CHIPSEC": [[264, "running-chipsec"]], "Running in Shell": [[264, "running-in-shell"]], "Using as a Python Package": [[264, "using-as-a-python-package"]], "chipsec_main options": [[264, "chipsec-main-options"]], "chipsec_util options": [[264, "chipsec-util-options"]]}, "indexentries": {"chipsec.cfg.parsers": [[70, "module-chipsec.cfg.parsers"]], "module": [[70, "module-chipsec.cfg.parsers"], [71, "module-chipsec.cfg.parsers.core_parsers"], [72, "module-chipsec.config"], [73, "module-chipsec.fuzzing"], [74, "module-chipsec.fuzzing.primitives"], [75, "module-chipsec.hal"], [76, "module-chipsec.hal.acpi"], [77, "module-chipsec.hal.acpi_tables"], [78, "module-chipsec.hal.cmos"], [79, "module-chipsec.hal.cpu"], [80, "module-chipsec.hal.cpuid"], [81, "module-chipsec.hal.ec"], [82, "module-chipsec.hal.hal_base"], [83, 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"module-chipsec.utilcmd.ec_cmd"], [237, "module-chipsec.utilcmd.igd_cmd"], [238, "module-chipsec.utilcmd.interrupts_cmd"], [239, "module-chipsec.utilcmd.io_cmd"], [240, "module-chipsec.utilcmd.iommu_cmd"], [241, "module-chipsec.utilcmd.lock_check_cmd"], [242, "module-chipsec.utilcmd.mem_cmd"], [243, "module-chipsec.utilcmd.mmcfg_base_cmd"], [244, "module-chipsec.utilcmd.mmcfg_cmd"], [245, "module-chipsec.utilcmd.mmio_cmd"], [246, "module-chipsec.utilcmd.msgbus_cmd"], [247, "module-chipsec.utilcmd.msr_cmd"], [248, "module-chipsec.utilcmd.pci_cmd"], [249, "module-chipsec.utilcmd.reg_cmd"], [250, "module-chipsec.utilcmd.smbios_cmd"], [251, "module-chipsec.utilcmd.smbus_cmd"], [252, "module-chipsec.utilcmd.spd_cmd"], [253, "module-chipsec.utilcmd.spi_cmd"], [254, "module-chipsec.utilcmd.spidesc_cmd"], [255, "module-chipsec.utilcmd.tpm_cmd"], [256, "module-chipsec.utilcmd.txt_cmd"], [257, "module-chipsec.utilcmd.ucode_cmd"], [258, "module-chipsec.utilcmd.uefi_cmd"], [259, "module-chipsec.utilcmd.vmem_cmd"], [260, "module-chipsec.utilcmd.vmm_cmd"]], "chipsec.cfg.parsers.core_parsers": [[71, "module-chipsec.cfg.parsers.core_parsers"]], "chipsec.config": [[72, "module-chipsec.config"]], "chipsec.fuzzing": [[73, "module-chipsec.fuzzing"]], "chipsec.fuzzing.primitives": [[74, "module-chipsec.fuzzing.primitives"]], "chipsec.hal": [[75, "module-chipsec.hal"]], "chipsec.hal.acpi": [[76, "module-chipsec.hal.acpi"]], "chipsec.hal.acpi_tables": [[77, "module-chipsec.hal.acpi_tables"]], "chipsec.hal.cmos": [[78, "module-chipsec.hal.cmos"]], "chipsec.hal.cpu": [[79, "module-chipsec.hal.cpu"]], "chipsec.hal.cpuid": [[80, "module-chipsec.hal.cpuid"]], "chipsec.hal.ec": [[81, "module-chipsec.hal.ec"]], "chipsec.hal.hal_base": [[82, "module-chipsec.hal.hal_base"]], "chipsec.hal.igd": [[83, "module-chipsec.hal.igd"]], "chipsec.hal.interrupts": [[84, "module-chipsec.hal.interrupts"]], "chipsec.hal.io": [[85, "module-chipsec.hal.io"]], "chipsec.hal.iobar": [[86, "module-chipsec.hal.iobar"]], "chipsec.hal.iommu": [[87, "module-chipsec.hal.iommu"]], "chipsec.hal.locks": [[88, "module-chipsec.hal.locks"]], "chipsec.hal.mmio": [[89, "module-chipsec.hal.mmio"]], "chipsec.hal.msgbus": [[90, "module-chipsec.hal.msgbus"]], "chipsec.hal.msr": [[91, "module-chipsec.hal.msr"]], "chipsec.hal.paging": [[92, "module-chipsec.hal.paging"]], "chipsec.hal.pci": [[93, "module-chipsec.hal.pci"]], "chipsec.hal.pcidb": [[94, "module-chipsec.hal.pcidb"]], "chipsec.hal.physmem": [[95, "module-chipsec.hal.physmem"]], "chipsec.hal.smbios": [[96, "module-chipsec.hal.smbios"]], "chipsec.hal.smbus": [[97, "module-chipsec.hal.smbus"]], "chipsec.hal.spd": [[98, "module-chipsec.hal.spd"]], "chipsec.hal.spi": [[99, "module-chipsec.hal.spi"]], "chipsec.hal.spi_descriptor": [[100, "module-chipsec.hal.spi_descriptor"]], "chipsec.hal.spi_jedec_ids": [[101, "module-chipsec.hal.spi_jedec_ids"]], "chipsec.hal.spi_uefi": [[102, "module-chipsec.hal.spi_uefi"]], "chipsec.hal.tpm": [[103, "module-chipsec.hal.tpm"]], "chipsec.hal.tpm12_commands": [[104, "module-chipsec.hal.tpm12_commands"]], "chipsec.hal.tpm_eventlog": [[105, "module-chipsec.hal.tpm_eventlog"]], "chipsec.hal.ucode": [[106, "module-chipsec.hal.ucode"]], "chipsec.hal.uefi": [[107, "module-chipsec.hal.uefi"]], "chipsec.hal.uefi_common": [[108, "module-chipsec.hal.uefi_common"]], "chipsec.hal.uefi_compression": [[109, "module-chipsec.hal.uefi_compression"]], "chipsec.hal.uefi_fv": [[110, "module-chipsec.hal.uefi_fv"]], "chipsec.hal.uefi_platform": [[111, "module-chipsec.hal.uefi_platform"]], "chipsec.hal.uefi_search": [[112, "module-chipsec.hal.uefi_search"]], "chipsec.hal.virtmem": [[113, "module-chipsec.hal.virtmem"]], "chipsec.hal.vmm": [[114, "module-chipsec.hal.vmm"]], "chipsec.helper": [[115, "module-chipsec.helper"]], "chipsec.helper.basehelper": [[116, "module-chipsec.helper.basehelper"]], "chipsec.helper.dal": [[117, "module-chipsec.helper.dal"]], "chipsec.helper.dal.dalhelper": [[118, "module-chipsec.helper.dal.dalhelper"]], "chipsec.helper.efi": [[119, "module-chipsec.helper.efi"]], "chipsec.helper.efi.efihelper": [[120, "module-chipsec.helper.efi.efihelper"]], "chipsec.helper.linux": [[121, "module-chipsec.helper.linux"]], "chipsec.helper.linux.linuxhelper": [[122, "module-chipsec.helper.linux.linuxhelper"]], "chipsec.helper.linuxnative": [[123, "module-chipsec.helper.linuxnative"]], "chipsec.helper.linuxnative.cpuid": [[124, "module-chipsec.helper.linuxnative.cpuid"]], "chipsec.helper.linuxnative.legacy_pci": [[125, "module-chipsec.helper.linuxnative.legacy_pci"]], "chipsec.helper.linuxnative.linuxnativehelper": [[126, "module-chipsec.helper.linuxnative.linuxnativehelper"]], "chipsec.helper.nonehelper": [[127, "module-chipsec.helper.nonehelper"]], "chipsec.helper.oshelper": [[128, "module-chipsec.helper.oshelper"]], "chipsec.helper.windows": [[129, "module-chipsec.helper.windows"]], "chipsec.library": [[131, "module-chipsec.library"]], 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a/usage/Interpreting-Results.html +++ b/usage/Interpreting-Results.html @@ -331,7 +331,7 @@

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    diff --git a/usage/Running-Chipsec.html b/usage/Running-Chipsec.html index 96fdaa90..cf061750 100644 --- a/usage/Running-Chipsec.html +++ b/usage/Running-Chipsec.html @@ -252,7 +252,7 @@

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