From dc3b8b50e2a2748fbdb8c34181c8cd57d56153f7 Mon Sep 17 00:00:00 2001 From: ChipSec Date: Thu, 28 Mar 2024 13:56:55 -0700 Subject: [PATCH] Update to release/1.13.0 Signed-off-by: ChipSec --- .../contribution/code-style-python.rst.txt | 3 +- _sources/development/Developing.rst.txt | 2 +- .../development/Sample-Module-Code.rst.txt | 3 +- _sources/index.rst.txt | 6 +- .../modules/chipsec.cfg.8086.adl.xml.rst.txt | 25 + .../modules/chipsec.cfg.8086.apl.xml.rst.txt | 9 + .../modules/chipsec.cfg.8086.avn.xml.rst.txt | 11 + .../modules/chipsec.cfg.8086.bdw.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.bdx.xml.rst.txt | 13 + .../modules/chipsec.cfg.8086.byt.xml.rst.txt | 11 + .../modules/chipsec.cfg.8086.cfl.xml.rst.txt | 11 + .../modules/chipsec.cfg.8086.cht.xml.rst.txt | 14 + .../modules/chipsec.cfg.8086.cml.xml.rst.txt | 6 + .../chipsec.cfg.8086.common.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.dnv.xml.rst.txt | 12 + .../modules/chipsec.cfg.8086.ehl.xml.rst.txt | 9 + .../modules/chipsec.cfg.8086.glk.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.hsw.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.hsx.xml.rst.txt | 13 + .../modules/chipsec.cfg.8086.icl.xml.rst.txt | 6 + .../modules/chipsec.cfg.8086.icx.xml.rst.txt | 8 + .../chipsec.cfg.8086.iommu.xml.rst.txt | 11 + .../modules/chipsec.cfg.8086.ivb.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.ivt.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.jkt.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.kbl.xml.rst.txt | 14 + .../chipsec.cfg.8086.pch_1xx.xml.rst.txt | 30 + .../chipsec.cfg.8086.pch_2xx.xml.rst.txt | 11 + .../chipsec.cfg.8086.pch_3xx.xml.rst.txt | 10 + .../chipsec.cfg.8086.pch_3xxlp.xml.rst.txt | 10 + .../chipsec.cfg.8086.pch_3xxop.xml.rst.txt | 10 + .../chipsec.cfg.8086.pch_495.xml.rst.txt | 8 + .../chipsec.cfg.8086.pch_4xx.xml.rst.txt | 8 + .../chipsec.cfg.8086.pch_4xxh.xml.rst.txt | 8 + .../chipsec.cfg.8086.pch_4xxlp.xml.rst.txt | 8 + .../chipsec.cfg.8086.pch_5xxh.xml.rst.txt | 8 + .../chipsec.cfg.8086.pch_5xxlp.xml.rst.txt | 8 + .../chipsec.cfg.8086.pch_6xxP.xml.rst.txt | 25 + .../chipsec.cfg.8086.pch_6xxS.xml.rst.txt | 25 + .../chipsec.cfg.8086.pch_7x.xml.rst.txt | 25 + .../chipsec.cfg.8086.pch_8x.xml.rst.txt | 25 + .../chipsec.cfg.8086.pch_c60x.xml.rst.txt | 11 + .../chipsec.cfg.8086.pch_c61x.xml.rst.txt | 10 + .../chipsec.cfg.8086.pch_c620.xml.rst.txt | 11 + .../chipsec.cfg.8086.pmc_i440fx.xml.rst.txt | 12 + .../modules/chipsec.cfg.8086.qrk.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.rkl.xml.rst.txt | 25 + .../modules/chipsec.cfg.8086.rpl.xml.rst.txt | 25 + _sources/modules/chipsec.cfg.8086.rst.txt | 55 + .../modules/chipsec.cfg.8086.sfdp.xml.rst.txt | 9 + .../modules/chipsec.cfg.8086.skl.xml.rst.txt | 20 + .../modules/chipsec.cfg.8086.skx.xml.rst.txt | 9 + .../modules/chipsec.cfg.8086.snb.xml.rst.txt | 8 + .../modules/chipsec.cfg.8086.tglh.xml.rst.txt | 25 + .../modules/chipsec.cfg.8086.tglu.xml.rst.txt | 25 + .../chipsec.cfg.8086.tpm12.xml.rst.txt | 25 + .../modules/chipsec.cfg.8086.txt.xml.rst.txt | 26 + .../modules/chipsec.cfg.8086.whl.xml.rst.txt | 12 + .../chipsec.cfg.parsers.core_parsers.rst.txt | 8 +- _sources/modules/chipsec.cfg.parsers.rst.txt | 14 +- _sources/modules/chipsec.config.rst.txt | 8 +- .../chipsec.fuzzing.primitives.rst.txt | 8 +- _sources/modules/chipsec.fuzzing.rst.txt | 14 +- _sources/modules/chipsec.hal.acpi.rst.txt | 8 +- .../modules/chipsec.hal.acpi_tables.rst.txt | 8 +- _sources/modules/chipsec.hal.cmos.rst.txt | 8 +- _sources/modules/chipsec.hal.cpu.rst.txt | 8 +- _sources/modules/chipsec.hal.cpuid.rst.txt | 8 +- _sources/modules/chipsec.hal.ec.rst.txt | 8 +- _sources/modules/chipsec.hal.hal_base.rst.txt | 8 +- _sources/modules/chipsec.hal.igd.rst.txt | 8 +- .../modules/chipsec.hal.interrupts.rst.txt | 8 +- _sources/modules/chipsec.hal.io.rst.txt | 8 +- _sources/modules/chipsec.hal.iobar.rst.txt | 8 +- _sources/modules/chipsec.hal.iommu.rst.txt | 8 +- _sources/modules/chipsec.hal.locks.rst.txt | 8 +- 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modules/chipsec.modules.tools.vmm.xen.hypercall.html create mode 100644 modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.html create mode 100644 modules/chipsec.modules.tools.vmm.xen.xsa188.html create mode 100644 modules/chipsec.modules.tools.wsmt.html create mode 100644 modules/chipsec.testcase.html diff --git a/_sources/contribution/code-style-python.rst.txt b/_sources/contribution/code-style-python.rst.txt index 8c438348..cb5b830f 100644 --- a/_sources/contribution/code-style-python.rst.txt +++ b/_sources/contribution/code-style-python.rst.txt @@ -77,7 +77,8 @@ If in doubt, follow the existing code style and formatting. # Good import sys - from chipsec.module_common import BaseModule, ModuleResult + from chipsec.module_common import BaseModule +from chipsec.library.returncode import ModuleResult # Bad - using '*' and importing sys after local imports import * diff --git a/_sources/development/Developing.rst.txt b/_sources/development/Developing.rst.txt index 4b5fec11..9711d4dd 100644 --- a/_sources/development/Developing.rst.txt +++ b/_sources/development/Developing.rst.txt @@ -17,7 +17,7 @@ Most modules read some platform configuration and then pass or fail based on the .. code-block:: python - ble = self.cs.get_control('BiosLockEnable') + ble = self.cs.control.get('BiosLockEnable') 3. React based on the status of the control: diff --git a/_sources/development/Sample-Module-Code.rst.txt b/_sources/development/Sample-Module-Code.rst.txt index 6e2739dc..7c919fb2 100644 --- a/_sources/development/Sample-Module-Code.rst.txt +++ b/_sources/development/Sample-Module-Code.rst.txt @@ -3,7 +3,8 @@ Sample module code template .. code-block:: python - from chipsec.module_common import BaseModule, ModuleResult + from chipsec.module_common import BaseModule + from chipsec.library.returncode import ModuleResult class ModuleClass(BaseModule): """Class name aligns with file name, eg ModuleClass.py""" diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt index f2d15ba0..e7158613 100644 --- a/_sources/index.rst.txt +++ b/_sources/index.rst.txt @@ -1,10 +1,10 @@ -.. CHIPSEC documentation file, created by +.. CHIPSEC 1.13.0 documentation file, created by sphinx-quickstart on Wed Mar 25 13:24:44 2015. You can adapt this file completely to your liking, but it should at least contain the root `toctree` directive. -CHIPSEC -======= +CHIPSEC 1.13.0 +============== CHIPSEC is a framework for analyzing platform level security of hardware, devices, system firmware, low-level protection mechanisms, and diff --git a/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt new file mode 100644 index 00000000..68f4ddf6 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.adl.xml.rst.txt @@ -0,0 +1,25 @@ +adl +======= + +Path: chipsec\\cfg\\8086\\adl.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021-2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt new file mode 100644 index 00000000..02dd8d2e --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.apl.xml.rst.txt @@ -0,0 +1,9 @@ +apl +======= + +Path: chipsec\\cfg\\8086\\apl.xml + + +XML configuration for Apollo Lake based SoCs +document id 334818/334819 + diff --git a/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt new file mode 100644 index 00000000..77a37b9b --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.avn.xml.rst.txt @@ -0,0 +1,11 @@ +avn +======= + +Path: chipsec\\cfg\\8086\\avn.xml + + +XML configuration for Avoton based platforms + +* Intel(R) Atom(TM) Processor C2000 Product Family for Microserver, September 2014 + http://www.intel.com/content/www/us/en/processors/atom/atom-c2000-microserver-datasheet.html + diff --git a/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt new file mode 100644 index 00000000..de53c4d4 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.bdw.xml.rst.txt @@ -0,0 +1,8 @@ +bdw +======= + +Path: chipsec\\cfg\\8086\\bdw.xml + + +XML configuration for Broadwell based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt new file mode 100644 index 00000000..90402f95 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.bdx.xml.rst.txt @@ -0,0 +1,13 @@ +bdx +======= + +Path: chipsec\\cfg\\8086\\bdx.xml + + +XML configuration file for Broadwell Server based platforms +Intel (c) Xeon Processor E5 v4 Product Family datasheet Vol. 2 +Intel (c) Xeon Processor E7 v4 Product Family datasheet Vol. 2 +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update +Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet + diff --git a/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt new file mode 100644 index 00000000..e57d29ec --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.byt.xml.rst.txt @@ -0,0 +1,11 @@ +byt +======= + +Path: chipsec\\cfg\\8086\\byt.xml + + +XML configuration for Bay Trail based platforms + +* Intel(R) Atom(TM) Processor E3800 Product Family Datasheet, May 2016, Revision 4.0 + http://www.intel.com/content/www/us/en/embedded/products/bay-trail/atom-e3800-family-datasheet.html + diff --git a/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt new file mode 100644 index 00000000..29d7e9d5 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.cfl.xml.rst.txt @@ -0,0 +1,11 @@ +cfl +======= + +Path: chipsec\\cfg\\8086\\cfl.xml + + +XML configuration file for Coffee Lake + +* 8th Generation Intel(R) Processor Family for S-Processor Platforms + https://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + diff --git a/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt new file mode 100644 index 00000000..06aa9ebe --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.cht.xml.rst.txt @@ -0,0 +1,14 @@ +cht +======= + +Path: chipsec\\cfg\\8086\\cht.xml + + +XML configuration for Cherry Trail and Braswell SoCs + +* Intel(R) Atom(TM) Processor Z8000 series datasheet + http://www.intel.com/content/www/us/en/processors/atom/atom-z8000-datasheet-vol-2.html + +* N-series Intel(R) Pentium(R) and Celeron(R) Processors Datasheet + http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/pentium-celeron-n-series-datasheet-vol-2.pdf + diff --git a/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt new file mode 100644 index 00000000..3d8b8be3 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.cml.xml.rst.txt @@ -0,0 +1,6 @@ +cml +======= + +Path: chipsec\\cfg\\8086\\cml.xml + + XML configuration file for Comet Lake diff --git a/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt new file mode 100644 index 00000000..4ab92728 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.common.xml.rst.txt @@ -0,0 +1,8 @@ +common +========== + +Path: chipsec\\cfg\\8086\\common.xml + + +Common (default) XML platform configuration file + diff --git a/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt new file mode 100644 index 00000000..11d38718 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.dnv.xml.rst.txt @@ -0,0 +1,12 @@ +dnv +======= + +Path: chipsec\\cfg\\8086\\dnv.xml + + +XML configuration file for Denverton + +* Intel Atom(R) Processor C3000 Product Family + https://www.intel.com/content/www/us/en/processors/atom/atom-technical-resources.html + 337018-002 + diff --git a/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt new file mode 100644 index 00000000..e587fe41 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.ehl.xml.rst.txt @@ -0,0 +1,9 @@ +ehl +======= + +Path: chipsec\\cfg\\8086\\ehl.xml + + +XML configuration file for Elkhart Lake +Document ID: 635255, 636112, 636722, 636723 + diff --git a/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt new file mode 100644 index 00000000..04772a7d --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.glk.xml.rst.txt @@ -0,0 +1,8 @@ +glk +======= + +Path: chipsec\\cfg\\8086\\glk.xml + + XML configuration for GLK + Document ID: 336561-001 + diff --git a/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt new file mode 100644 index 00000000..5a9a80db --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.hsw.xml.rst.txt @@ -0,0 +1,8 @@ +hsw +======= + +Path: chipsec\\cfg\\8086\\hsw.xml + + +XML configuration file for Haswell based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt new file mode 100644 index 00000000..0632542a --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.hsx.xml.rst.txt @@ -0,0 +1,13 @@ +hsx +======= + +Path: chipsec\\cfg\\8086\\hsx.xml + + +XML configuration file for Haswell Server based platforms +Intel (c) Xeon Processor E5-1600/2400/2600/4600 v3 Product Family datasheet Vol. 2 +Intel (c) Xeon Processor E7-8800/4800 v3 Product Family datasheet Vol. 2 +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update +Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet + diff --git a/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt new file mode 100644 index 00000000..2657dfc3 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.icl.xml.rst.txt @@ -0,0 +1,6 @@ +icl +======= + +Path: chipsec\\cfg\\8086\\icl.xml + + XML configuration file for Ice Lake diff --git a/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt new file mode 100644 index 00000000..90040c2d --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.icx.xml.rst.txt @@ -0,0 +1,8 @@ +icx +======= + +Path: chipsec\\cfg\\8086\\icx.xml + + +XML configuration file for Icelake/Lewisburg Server + diff --git a/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt new file mode 100644 index 00000000..5fbbe833 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.iommu.xml.rst.txt @@ -0,0 +1,11 @@ +iommu +========= + +Path: chipsec\\cfg\\8086\\iommu.xml + + +XML configuration file for Intel Virtualization Technology for Directed I/O (VT-d) + +* Section 10 of Intel Virtualization Technology for Directed I/O + http://www.intel.com/content/dam/www/public/us/en/documents/product-specifications/vt-directed-io-spec.pdf + diff --git a/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt new file mode 100644 index 00000000..2ec89186 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.ivb.xml.rst.txt @@ -0,0 +1,8 @@ +ivb +======= + +Path: chipsec\\cfg\\8086\\ivb.xml + + +XML configuration for IvyBridge based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt new file mode 100644 index 00000000..fdf4a476 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.ivt.xml.rst.txt @@ -0,0 +1,8 @@ +ivt +======= + +Path: chipsec\\cfg\\8086\\ivt.xml + + +XML configuration file for Ivytown (Ivy Bridge-E) based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt new file mode 100644 index 00000000..397fe376 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.jkt.xml.rst.txt @@ -0,0 +1,8 @@ +jkt +======= + +Path: chipsec\\cfg\\8086\\jkt.xml + + +XML configuration file for Jaketown (Sandy Bridge-E) based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt new file mode 100644 index 00000000..f6ae0a06 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.kbl.xml.rst.txt @@ -0,0 +1,14 @@ +kbl +======= + +Path: chipsec\\cfg\\8086\\kbl.xml + + +XML configuration file for Kaby Lake based platforms + +http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + +* 7th Generation Intel(R) Processor Families for U/Y-Platforms + +* 7th Generation Intel(R) Processor Families I/O for U/Y-Platforms + diff --git a/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt new file mode 100644 index 00000000..37ad1f95 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_1xx.xml.rst.txt @@ -0,0 +1,30 @@ +pch_1xx +=========== + +Path: chipsec\\cfg\\8086\\pch_1xx.xml + + +XML configuration file for 100 series PCH based platforms + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2020-2021, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + +* Intel(R) 100 Series Chipset Family Platform Controller Hub (PCH) + http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + diff --git a/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt new file mode 100644 index 00000000..9469fdb6 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_2xx.xml.rst.txt @@ -0,0 +1,11 @@ +pch_2xx +=========== + +Path: chipsec\\cfg\\8086\\pch_2xx.xml + + +XML configuration file for 200 series PCH based platforms + +* Intel(R) 200 Series Chipset Family Platform Controller Hub (PCH) + http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt new file mode 100644 index 00000000..2f580567 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_3xx.xml.rst.txt @@ -0,0 +1,10 @@ +pch_3xx +=========== + +Path: chipsec\\cfg\\8086\\pch_3xx.xml + + +XML configuration file for the 300 series PCH +https://www.intel.com/content/www/us/en/products/docs/chipsets/300-series-chipset-pch-datasheet-vol-2.html +337348-001 + diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt new file mode 100644 index 00000000..2f5b216f --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_3xxlp.xml.rst.txt @@ -0,0 +1,10 @@ +pch_3xxlp +============= + +Path: chipsec\\cfg\\8086\\pch_3xxlp.xml + + +XML configuration file for the 300 series LP (U/Y) PCH +https://www.intel.com/content/www/us/en/products/docs/processors/core/7th-and-8th-gen-core-family-mobile-u-y-processor-lines-i-o-datasheet-vol-2.html +334659-005 + diff --git a/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt new file mode 100644 index 00000000..b19f0764 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_3xxop.xml.rst.txt @@ -0,0 +1,10 @@ +pch_3xxop +============= + +Path: chipsec\\cfg\\8086\\pch_3xxop.xml + + +XML configuration file for the 300 series On Package PCH +https://www.intel.com/content/www/us/en/products/docs/chipsets/300-series-chipset-on-package-pch-datasheet-vol-2.html +337868-002 + diff --git a/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt new file mode 100644 index 00000000..dcab2e63 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_495.xml.rst.txt @@ -0,0 +1,8 @@ +pch_495 +=========== + +Path: chipsec\\cfg\\8086\\pch_495.xml + + +XML configuration file for the 495 series PCH + diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt new file mode 100644 index 00000000..caf0f7e9 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_4xx.xml.rst.txt @@ -0,0 +1,8 @@ +pch_4xx +=========== + +Path: chipsec\\cfg\\8086\\pch_4xx.xml + + + XML configuration file for 4XX pch + diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt new file mode 100644 index 00000000..4f543111 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_4xxh.xml.rst.txt @@ -0,0 +1,8 @@ +pch_4xxh +============ + +Path: chipsec\\cfg\\8086\\pch_4xxh.xml + + + XML configuration file 4xxH PCH 620855 + diff --git a/_sources/modules/chipsec.cfg.8086.pch_4xxlp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_4xxlp.xml.rst.txt new file mode 100644 index 00000000..a1a6f9cb --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_4xxlp.xml.rst.txt @@ -0,0 +1,8 @@ +pch_4xxlp +============= + +Path: chipsec\\cfg\\8086\\pch_4xxlp.xml + + + XML configuration file for the 400 series LP (U/H) PCH + diff --git a/_sources/modules/chipsec.cfg.8086.pch_5xxh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_5xxh.xml.rst.txt new file mode 100644 index 00000000..717ddc4b --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_5xxh.xml.rst.txt @@ -0,0 +1,8 @@ +pch_5xxh +============ + +Path: chipsec\\cfg\\8086\\pch_5xxh.xml + + +XML configuration file for 5XXH series pch + diff --git a/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt new file mode 100644 index 00000000..c85234dc --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_5xxlp.xml.rst.txt @@ -0,0 +1,8 @@ +pch_5xxlp +============= + +Path: chipsec\\cfg\\8086\\pch_5xxlp.xml + + +XML configuration file for 5XXLP series pch + diff --git a/_sources/modules/chipsec.cfg.8086.pch_6xxP.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_6xxP.xml.rst.txt new file mode 100644 index 00000000..c7f32e95 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_6xxP.xml.rst.txt @@ -0,0 +1,25 @@ +pch_6xxP +============ + +Path: chipsec\\cfg\\8086\\pch_6xxP.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021-2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.pch_6xxS.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_6xxS.xml.rst.txt new file mode 100644 index 00000000..7f1ed154 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_6xxS.xml.rst.txt @@ -0,0 +1,25 @@ +pch_6xxS +============ + +Path: chipsec\\cfg\\8086\\pch_6xxS.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021-2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.pch_7x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_7x.xml.rst.txt new file mode 100644 index 00000000..232268a6 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_7x.xml.rst.txt @@ -0,0 +1,25 @@ +pch_7x +========== + +Path: chipsec\\cfg\\8086\\pch_7x.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.pch_8x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_8x.xml.rst.txt new file mode 100644 index 00000000..5bf3f24b --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_8x.xml.rst.txt @@ -0,0 +1,25 @@ +pch_8x +========== + +Path: chipsec\\cfg\\8086\\pch_8x.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.pch_c60x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_c60x.xml.rst.txt new file mode 100644 index 00000000..bd73b9d3 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_c60x.xml.rst.txt @@ -0,0 +1,11 @@ +pch_c60x +============ + +Path: chipsec\\cfg\\8086\\pch_c60x.xml + + +XML configuration file for C600 series PCH + Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet + Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update + https://ark.intel.com/products/series/98463/Intel-C600-Series-Chipsets + diff --git a/_sources/modules/chipsec.cfg.8086.pch_c61x.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_c61x.xml.rst.txt new file mode 100644 index 00000000..3345f3b2 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_c61x.xml.rst.txt @@ -0,0 +1,10 @@ +pch_c61x +============ + +Path: chipsec\\cfg\\8086\\pch_c61x.xml + + +XML configuration file for C610 series PCH + Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet + https://ark.intel.com/products/series/98915/Intel-C610-Series-Chipsets + diff --git a/_sources/modules/chipsec.cfg.8086.pch_c620.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pch_c620.xml.rst.txt new file mode 100644 index 00000000..8d192626 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pch_c620.xml.rst.txt @@ -0,0 +1,11 @@ +pch_c620 +============ + +Path: chipsec\\cfg\\8086\\pch_c620.xml + + +XML configuration file for + +* Intel(R) C620 Series Chipset Family Platform Controller Hub + https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/c620-series-chipset-datasheet.pdf + diff --git a/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt new file mode 100644 index 00000000..bcab2341 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.pmc_i440fx.xml.rst.txt @@ -0,0 +1,12 @@ +pmc_i440fx +============== + +Path: chipsec\\cfg\\8086\\pmc_i440fx.xml + + +XML configuration file for Intel 440FX PCI and Memory Controller (PMC). +It is used by QEMU "pc" machine, implemented in +https://github.com/qemu/qemu/blob/v7.0.0/hw/pci-host/i440fx.c + +A datasheet is available on https://wiki.qemu.org/File:29054901.pdf + diff --git a/_sources/modules/chipsec.cfg.8086.qrk.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.qrk.xml.rst.txt new file mode 100644 index 00000000..db249f29 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.qrk.xml.rst.txt @@ -0,0 +1,8 @@ +qrk +======= + +Path: chipsec\\cfg\\8086\\qrk.xml + + +XML configuration for Quark based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.rkl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.rkl.xml.rst.txt new file mode 100644 index 00000000..07cb507f --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.rkl.xml.rst.txt @@ -0,0 +1,25 @@ +rkl +======= + +Path: chipsec\\cfg\\8086\\rkl.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.rpl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.rpl.xml.rst.txt new file mode 100644 index 00000000..740602f6 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.rpl.xml.rst.txt @@ -0,0 +1,25 @@ +rpl +======= + +Path: chipsec\\cfg\\8086\\rpl.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.rst.txt b/_sources/modules/chipsec.cfg.8086.rst.txt new file mode 100644 index 00000000..e9315a88 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.rst.txt @@ -0,0 +1,55 @@ +.. toctree:: + + chipsec.cfg.8086.ehl.xml.rst + chipsec.cfg.8086.pch_8x.xml.rst + chipsec.cfg.8086.hsw.xml.rst + chipsec.cfg.8086.sfdp.xml.rst + chipsec.cfg.8086.pmc_i440fx.xml.rst + chipsec.cfg.8086.pch_4xxlp.xml.rst + chipsec.cfg.8086.glk.xml.rst + chipsec.cfg.8086.icx.xml.rst + chipsec.cfg.8086.ivt.xml.rst + chipsec.cfg.8086.pch_2xx.xml.rst + chipsec.cfg.8086.cht.xml.rst + chipsec.cfg.8086.skx.xml.rst + chipsec.cfg.8086.pch_5xxh.xml.rst + chipsec.cfg.8086.jkt.xml.rst + chipsec.cfg.8086.pch_7x.xml.rst + chipsec.cfg.8086.tpm12.xml.rst + chipsec.cfg.8086.apl.xml.rst + chipsec.cfg.8086.pch_495.xml.rst + chipsec.cfg.8086.snb.xml.rst + chipsec.cfg.8086.pch_3xx.xml.rst + chipsec.cfg.8086.pch_3xxop.xml.rst + chipsec.cfg.8086.pch_5xxlp.xml.rst + chipsec.cfg.8086.bdx.xml.rst + chipsec.cfg.8086.cml.xml.rst + chipsec.cfg.8086.pch_6xxS.xml.rst + chipsec.cfg.8086.skl.xml.rst + chipsec.cfg.8086.tglu.xml.rst + chipsec.cfg.8086.hsx.xml.rst + chipsec.cfg.8086.rpl.xml.rst + chipsec.cfg.8086.qrk.xml.rst + chipsec.cfg.8086.pch_4xx.xml.rst + chipsec.cfg.8086.common.xml.rst + chipsec.cfg.8086.txt.xml.rst + chipsec.cfg.8086.rkl.xml.rst + chipsec.cfg.8086.pch_3xxlp.xml.rst + chipsec.cfg.8086.whl.xml.rst + chipsec.cfg.8086.bdw.xml.rst + chipsec.cfg.8086.byt.xml.rst + chipsec.cfg.8086.avn.xml.rst + chipsec.cfg.8086.pch_c620.xml.rst + chipsec.cfg.8086.dnv.xml.rst + chipsec.cfg.8086.icl.xml.rst + chipsec.cfg.8086.tglh.xml.rst + chipsec.cfg.8086.pch_6xxP.xml.rst + chipsec.cfg.8086.pch_c60x.xml.rst + chipsec.cfg.8086.kbl.xml.rst + chipsec.cfg.8086.iommu.xml.rst + chipsec.cfg.8086.ivb.xml.rst + chipsec.cfg.8086.pch_c61x.xml.rst + chipsec.cfg.8086.pch_1xx.xml.rst + chipsec.cfg.8086.cfl.xml.rst + chipsec.cfg.8086.pch_4xxh.xml.rst + chipsec.cfg.8086.adl.xml.rst diff --git a/_sources/modules/chipsec.cfg.8086.sfdp.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.sfdp.xml.rst.txt new file mode 100644 index 00000000..428e5b54 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.sfdp.xml.rst.txt @@ -0,0 +1,9 @@ +sfdp +======== + +Path: chipsec\\cfg\\8086\\sfdp.xml + + +XML configuration for Serial Flash Discoverable Parameter feature +document: https://www.jedec.org/system/files/docs/JESD216D-01.pdf + diff --git a/_sources/modules/chipsec.cfg.8086.skl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.skl.xml.rst.txt new file mode 100644 index 00000000..0d0a3cbb --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.skl.xml.rst.txt @@ -0,0 +1,20 @@ +skl +======= + +Path: chipsec\\cfg\\8086\\skl.xml + + +XML configuration file for Skylake based platforms + +http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + +* 6th Generation Intel(R) Processor Datasheet for U/Y-Platforms + +* 6th Generation Intel(R) Processor I/O Datasheet for U/Y-Platforms + +* 6th Generation Intel(R) Processor Datasheet for S-Platforms + +* 6th Generation Intel(R) Processor Datasheet for H-Platforms + +* Intel(R) 100 Series Chipset Family Platform Controller Hub (PCH) + diff --git a/_sources/modules/chipsec.cfg.8086.skx.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.skx.xml.rst.txt new file mode 100644 index 00000000..f01831ca --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.skx.xml.rst.txt @@ -0,0 +1,9 @@ +skx +======= + +Path: chipsec\\cfg\\8086\\skx.xml + + +XML configuration file for Skylake/Purely Server +Intel (c) Xeon Processor Scalable Family datasheet Vol. 2 + diff --git a/_sources/modules/chipsec.cfg.8086.snb.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.snb.xml.rst.txt new file mode 100644 index 00000000..6a9f3120 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.snb.xml.rst.txt @@ -0,0 +1,8 @@ +snb +======= + +Path: chipsec\\cfg\\8086\\snb.xml + + +XML configuration for Sandy Bridge based platforms + diff --git a/_sources/modules/chipsec.cfg.8086.tglh.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.tglh.xml.rst.txt new file mode 100644 index 00000000..2cdd18e9 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.tglh.xml.rst.txt @@ -0,0 +1,25 @@ +tglh +======== + +Path: chipsec\\cfg\\8086\\tglh.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.tglu.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.tglu.xml.rst.txt new file mode 100644 index 00000000..83d33a7c --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.tglu.xml.rst.txt @@ -0,0 +1,25 @@ +tglu +======== + +Path: chipsec\\cfg\\8086\\tglu.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.tpm12.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.tpm12.xml.rst.txt new file mode 100644 index 00000000..75bf04dd --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.tpm12.xml.rst.txt @@ -0,0 +1,25 @@ +tpm12 +========= + +Path: chipsec\\cfg\\8086\\tpm12.xml + + +CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021, Intel Corporation + +This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2. + +This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details. + +You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA. + +Contact information: +chipsec@intel.com + diff --git a/_sources/modules/chipsec.cfg.8086.txt.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.txt.xml.rst.txt new file mode 100644 index 00000000..2534899f --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.txt.xml.rst.txt @@ -0,0 +1,26 @@ +txt +======= + +Path: chipsec\\cfg\\8086\\txt.xml + + +Configuration of Intel TXT register, following the guide: + + Intel® Trusted Execution Technology: Software Development Guide + Measured Launched Environment Developer's Guide + August 2016 + Revision 013 + +from https://web.archive.org/web/20170506220426/https://www.intel.com/content/www/us/en/software-developers/intel-txt-software-development-guide.html +(and https://usermanual.wiki/Document/inteltxtsoftwaredevelopmentguide.1721028921 ) + +Appendix B.1. (Intel® TXT Configuration Registers) details: + + These registers are mapped into two regions of memory, representing the public and private configuration spaces. + [...] + The private space registers are mapped to the address range starting at FED20000H. + The public space registers are mapped to the address range starting at FED30000H. + +As chipsec usually runs in environments where the private space is not available, +only the public space registers were described here. + diff --git a/_sources/modules/chipsec.cfg.8086.whl.xml.rst.txt b/_sources/modules/chipsec.cfg.8086.whl.xml.rst.txt new file mode 100644 index 00000000..64dba853 --- /dev/null +++ b/_sources/modules/chipsec.cfg.8086.whl.xml.rst.txt @@ -0,0 +1,12 @@ +whl +======= + +Path: chipsec\\cfg\\8086\\whl.xml + + +XML configuration file for Whiskey Lake + +8th Generation Intel(R) Processor Family for U-Processor Platforms: + - https://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html + - https://www.intel.com/content/dam/www/public/us/en/documents/technical-specifications/300-series-chipset-on-package-pch-datasheet-vol-1.pdf + diff --git a/_sources/modules/chipsec.cfg.parsers.core_parsers.rst.txt b/_sources/modules/chipsec.cfg.parsers.core_parsers.rst.txt index c5d6b7e2..cfcd3abe 100644 --- a/_sources/modules/chipsec.cfg.parsers.core_parsers.rst.txt +++ b/_sources/modules/chipsec.cfg.parsers.core_parsers.rst.txt @@ -1,7 +1,7 @@ -chipsec.cfg.parsers.core\_parsers module +core\_parsers module ======================================== .. automodule:: chipsec.cfg.parsers.core_parsers - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.cfg.parsers.rst.txt b/_sources/modules/chipsec.cfg.parsers.rst.txt index b09339c2..46910f3c 100644 --- a/_sources/modules/chipsec.cfg.parsers.rst.txt +++ b/_sources/modules/chipsec.cfg.parsers.rst.txt @@ -1,18 +1,12 @@ -chipsec.cfg.parsers package +parsers package =========================== -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.cfg.parsers.core_parsers -Module contents ---------------- - .. automodule:: chipsec.cfg.parsers - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.config.rst.txt b/_sources/modules/chipsec.config.rst.txt index 7e2863da..2af789a1 100644 --- a/_sources/modules/chipsec.config.rst.txt +++ b/_sources/modules/chipsec.config.rst.txt @@ -1,7 +1,7 @@ -chipsec.config module +config module ===================== .. automodule:: chipsec.config - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.fuzzing.primitives.rst.txt b/_sources/modules/chipsec.fuzzing.primitives.rst.txt index cdfa29ec..45d46b6f 100644 --- a/_sources/modules/chipsec.fuzzing.primitives.rst.txt +++ b/_sources/modules/chipsec.fuzzing.primitives.rst.txt @@ -1,7 +1,7 @@ -chipsec.fuzzing.primitives module +primitives module ================================= .. automodule:: chipsec.fuzzing.primitives - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.fuzzing.rst.txt b/_sources/modules/chipsec.fuzzing.rst.txt index 8cfd8f0a..cd9c9592 100644 --- a/_sources/modules/chipsec.fuzzing.rst.txt +++ b/_sources/modules/chipsec.fuzzing.rst.txt @@ -1,18 +1,12 @@ -chipsec.fuzzing package +fuzzing package ======================= -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.fuzzing.primitives -Module contents ---------------- - .. automodule:: chipsec.fuzzing - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.acpi.rst.txt b/_sources/modules/chipsec.hal.acpi.rst.txt index 6093fc46..f2d8f636 100644 --- a/_sources/modules/chipsec.hal.acpi.rst.txt +++ b/_sources/modules/chipsec.hal.acpi.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.acpi module +acpi module ======================= .. automodule:: chipsec.hal.acpi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.acpi_tables.rst.txt b/_sources/modules/chipsec.hal.acpi_tables.rst.txt index db8b017c..2f1995d8 100644 --- a/_sources/modules/chipsec.hal.acpi_tables.rst.txt +++ b/_sources/modules/chipsec.hal.acpi_tables.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.acpi\_tables module +acpi\_tables module =============================== .. automodule:: chipsec.hal.acpi_tables - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.cmos.rst.txt b/_sources/modules/chipsec.hal.cmos.rst.txt index 1e36dba3..866c4155 100644 --- a/_sources/modules/chipsec.hal.cmos.rst.txt +++ b/_sources/modules/chipsec.hal.cmos.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.cmos module +cmos module ======================= .. automodule:: chipsec.hal.cmos - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.cpu.rst.txt b/_sources/modules/chipsec.hal.cpu.rst.txt index f2d82fd9..3c94f306 100644 --- a/_sources/modules/chipsec.hal.cpu.rst.txt +++ b/_sources/modules/chipsec.hal.cpu.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.cpu module +cpu module ====================== .. automodule:: chipsec.hal.cpu - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.cpuid.rst.txt b/_sources/modules/chipsec.hal.cpuid.rst.txt index afbc056b..10f2eaec 100644 --- a/_sources/modules/chipsec.hal.cpuid.rst.txt +++ b/_sources/modules/chipsec.hal.cpuid.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.cpuid module +cpuid module ======================== .. automodule:: chipsec.hal.cpuid - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.ec.rst.txt b/_sources/modules/chipsec.hal.ec.rst.txt index a8f9ddc4..1c5628c2 100644 --- a/_sources/modules/chipsec.hal.ec.rst.txt +++ b/_sources/modules/chipsec.hal.ec.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.ec module +ec module ===================== .. automodule:: chipsec.hal.ec - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.hal_base.rst.txt b/_sources/modules/chipsec.hal.hal_base.rst.txt index 2a18a026..657c2356 100644 --- a/_sources/modules/chipsec.hal.hal_base.rst.txt +++ b/_sources/modules/chipsec.hal.hal_base.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.hal\_base module +hal\_base module ============================ .. automodule:: chipsec.hal.hal_base - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.igd.rst.txt b/_sources/modules/chipsec.hal.igd.rst.txt index 897a947a..5be424ee 100644 --- a/_sources/modules/chipsec.hal.igd.rst.txt +++ b/_sources/modules/chipsec.hal.igd.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.igd module +igd module ====================== .. automodule:: chipsec.hal.igd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.interrupts.rst.txt b/_sources/modules/chipsec.hal.interrupts.rst.txt index 348b5aa1..7b9e84ac 100644 --- a/_sources/modules/chipsec.hal.interrupts.rst.txt +++ b/_sources/modules/chipsec.hal.interrupts.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.interrupts module +interrupts module ============================= .. automodule:: chipsec.hal.interrupts - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.io.rst.txt b/_sources/modules/chipsec.hal.io.rst.txt index 0fb3cf14..d5fceaf4 100644 --- a/_sources/modules/chipsec.hal.io.rst.txt +++ b/_sources/modules/chipsec.hal.io.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.io module +io module ===================== .. automodule:: chipsec.hal.io - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.iobar.rst.txt b/_sources/modules/chipsec.hal.iobar.rst.txt index dc69ad7d..33dbf501 100644 --- a/_sources/modules/chipsec.hal.iobar.rst.txt +++ b/_sources/modules/chipsec.hal.iobar.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.iobar module +iobar module ======================== .. automodule:: chipsec.hal.iobar - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.iommu.rst.txt b/_sources/modules/chipsec.hal.iommu.rst.txt index 2942cb4f..e1a6827f 100644 --- a/_sources/modules/chipsec.hal.iommu.rst.txt +++ b/_sources/modules/chipsec.hal.iommu.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.iommu module +iommu module ======================== .. automodule:: chipsec.hal.iommu - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.locks.rst.txt b/_sources/modules/chipsec.hal.locks.rst.txt index fdaebd10..cccb2802 100644 --- a/_sources/modules/chipsec.hal.locks.rst.txt +++ b/_sources/modules/chipsec.hal.locks.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.locks module +locks module ======================== .. automodule:: chipsec.hal.locks - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.mmio.rst.txt b/_sources/modules/chipsec.hal.mmio.rst.txt index fe6753cd..05fde1cd 100644 --- a/_sources/modules/chipsec.hal.mmio.rst.txt +++ b/_sources/modules/chipsec.hal.mmio.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.mmio module +mmio module ======================= .. automodule:: chipsec.hal.mmio - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.msgbus.rst.txt b/_sources/modules/chipsec.hal.msgbus.rst.txt index 2cff6ddd..e6f89fd5 100644 --- a/_sources/modules/chipsec.hal.msgbus.rst.txt +++ b/_sources/modules/chipsec.hal.msgbus.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.msgbus module +msgbus module ========================= .. automodule:: chipsec.hal.msgbus - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.msr.rst.txt b/_sources/modules/chipsec.hal.msr.rst.txt index 50520ddf..2384e43a 100644 --- a/_sources/modules/chipsec.hal.msr.rst.txt +++ b/_sources/modules/chipsec.hal.msr.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.msr module +msr module ====================== .. automodule:: chipsec.hal.msr - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.paging.rst.txt b/_sources/modules/chipsec.hal.paging.rst.txt index 21601750..30ae1273 100644 --- a/_sources/modules/chipsec.hal.paging.rst.txt +++ b/_sources/modules/chipsec.hal.paging.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.paging module +paging module ========================= .. automodule:: chipsec.hal.paging - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.pci.rst.txt b/_sources/modules/chipsec.hal.pci.rst.txt index f78f5bea..77970812 100644 --- a/_sources/modules/chipsec.hal.pci.rst.txt +++ b/_sources/modules/chipsec.hal.pci.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.pci module +pci module ====================== .. automodule:: chipsec.hal.pci - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.pcidb.rst.txt b/_sources/modules/chipsec.hal.pcidb.rst.txt index 8e89a874..2bc3023a 100644 --- a/_sources/modules/chipsec.hal.pcidb.rst.txt +++ b/_sources/modules/chipsec.hal.pcidb.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.pcidb module +pcidb module ======================== .. automodule:: chipsec.hal.pcidb - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.physmem.rst.txt b/_sources/modules/chipsec.hal.physmem.rst.txt index f03f9904..ee4fc97e 100644 --- a/_sources/modules/chipsec.hal.physmem.rst.txt +++ b/_sources/modules/chipsec.hal.physmem.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.physmem module +physmem module ========================== .. automodule:: chipsec.hal.physmem - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.rst.txt b/_sources/modules/chipsec.hal.rst.txt index 585c0a9f..ccee8194 100644 --- a/_sources/modules/chipsec.hal.rst.txt +++ b/_sources/modules/chipsec.hal.rst.txt @@ -1,9 +1,6 @@ -chipsec.hal package +hal package =================== -Submodules ----------- - .. toctree:: :maxdepth: 10 @@ -47,10 +44,7 @@ Submodules chipsec.hal.virtmem chipsec.hal.vmm -Module contents ---------------- - .. automodule:: chipsec.hal - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.smbios.rst.txt b/_sources/modules/chipsec.hal.smbios.rst.txt index 484ffd69..e810c4df 100644 --- a/_sources/modules/chipsec.hal.smbios.rst.txt +++ b/_sources/modules/chipsec.hal.smbios.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.smbios module +smbios module ========================= .. automodule:: chipsec.hal.smbios - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.smbus.rst.txt b/_sources/modules/chipsec.hal.smbus.rst.txt index ce7218b8..23c98cba 100644 --- a/_sources/modules/chipsec.hal.smbus.rst.txt +++ b/_sources/modules/chipsec.hal.smbus.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.smbus module +smbus module ======================== .. automodule:: chipsec.hal.smbus - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.spd.rst.txt b/_sources/modules/chipsec.hal.spd.rst.txt index 923426f7..30dbc912 100644 --- a/_sources/modules/chipsec.hal.spd.rst.txt +++ b/_sources/modules/chipsec.hal.spd.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.spd module +spd module ====================== .. automodule:: chipsec.hal.spd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.spi.rst.txt b/_sources/modules/chipsec.hal.spi.rst.txt index 4dec6282..2d741712 100644 --- a/_sources/modules/chipsec.hal.spi.rst.txt +++ b/_sources/modules/chipsec.hal.spi.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.spi module +spi module ====================== .. automodule:: chipsec.hal.spi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.spi_descriptor.rst.txt b/_sources/modules/chipsec.hal.spi_descriptor.rst.txt index d11106d4..cd93cca8 100644 --- a/_sources/modules/chipsec.hal.spi_descriptor.rst.txt +++ b/_sources/modules/chipsec.hal.spi_descriptor.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.spi\_descriptor module +spi\_descriptor module ================================== .. automodule:: chipsec.hal.spi_descriptor - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt b/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt index 9069e7ba..c1d475c9 100644 --- a/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt +++ b/_sources/modules/chipsec.hal.spi_jedec_ids.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.spi\_jedec\_ids module +spi\_jedec\_ids module ================================== .. automodule:: chipsec.hal.spi_jedec_ids - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.spi_uefi.rst.txt b/_sources/modules/chipsec.hal.spi_uefi.rst.txt index bc19f58b..8af4d1e4 100644 --- a/_sources/modules/chipsec.hal.spi_uefi.rst.txt +++ b/_sources/modules/chipsec.hal.spi_uefi.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.spi\_uefi module +spi\_uefi module ============================ .. automodule:: chipsec.hal.spi_uefi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.tpm.rst.txt b/_sources/modules/chipsec.hal.tpm.rst.txt index dbd24355..2ca5f5b5 100644 --- a/_sources/modules/chipsec.hal.tpm.rst.txt +++ b/_sources/modules/chipsec.hal.tpm.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.tpm module +tpm module ====================== .. automodule:: chipsec.hal.tpm - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.tpm12_commands.rst.txt b/_sources/modules/chipsec.hal.tpm12_commands.rst.txt index 3d5694c6..1c6bca4c 100644 --- a/_sources/modules/chipsec.hal.tpm12_commands.rst.txt +++ b/_sources/modules/chipsec.hal.tpm12_commands.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.tpm12\_commands module +tpm12\_commands module ================================== .. automodule:: chipsec.hal.tpm12_commands - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt b/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt index 8e74c944..aa291760 100644 --- a/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt +++ b/_sources/modules/chipsec.hal.tpm_eventlog.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.tpm\_eventlog module +tpm\_eventlog module ================================ .. automodule:: chipsec.hal.tpm_eventlog - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.ucode.rst.txt b/_sources/modules/chipsec.hal.ucode.rst.txt index f4cf60f4..51a80e7b 100644 --- a/_sources/modules/chipsec.hal.ucode.rst.txt +++ b/_sources/modules/chipsec.hal.ucode.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.ucode module +ucode module ======================== .. automodule:: chipsec.hal.ucode - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.uefi.rst.txt b/_sources/modules/chipsec.hal.uefi.rst.txt index e40371ee..4a79fe0e 100644 --- a/_sources/modules/chipsec.hal.uefi.rst.txt +++ b/_sources/modules/chipsec.hal.uefi.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.uefi module +uefi module ======================= .. automodule:: chipsec.hal.uefi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.uefi_common.rst.txt b/_sources/modules/chipsec.hal.uefi_common.rst.txt index 7a13eb24..a1b5b579 100644 --- a/_sources/modules/chipsec.hal.uefi_common.rst.txt +++ b/_sources/modules/chipsec.hal.uefi_common.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.uefi\_common module +uefi\_common module =============================== .. automodule:: chipsec.hal.uefi_common - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.uefi_compression.rst.txt b/_sources/modules/chipsec.hal.uefi_compression.rst.txt index 5376831e..469c67bd 100644 --- a/_sources/modules/chipsec.hal.uefi_compression.rst.txt +++ b/_sources/modules/chipsec.hal.uefi_compression.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.uefi\_compression module +uefi\_compression module ==================================== .. automodule:: chipsec.hal.uefi_compression - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.uefi_fv.rst.txt b/_sources/modules/chipsec.hal.uefi_fv.rst.txt index 59b884d3..e4d72d7b 100644 --- a/_sources/modules/chipsec.hal.uefi_fv.rst.txt +++ b/_sources/modules/chipsec.hal.uefi_fv.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.uefi\_fv module +uefi\_fv module =========================== .. automodule:: chipsec.hal.uefi_fv - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.uefi_platform.rst.txt b/_sources/modules/chipsec.hal.uefi_platform.rst.txt index 79b5c0ec..c68e8063 100644 --- a/_sources/modules/chipsec.hal.uefi_platform.rst.txt +++ b/_sources/modules/chipsec.hal.uefi_platform.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.uefi\_platform module +uefi\_platform module ================================= .. automodule:: chipsec.hal.uefi_platform - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.uefi_search.rst.txt b/_sources/modules/chipsec.hal.uefi_search.rst.txt index 5c2768ac..9344f15f 100644 --- a/_sources/modules/chipsec.hal.uefi_search.rst.txt +++ b/_sources/modules/chipsec.hal.uefi_search.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.uefi\_search module +uefi\_search module =============================== .. automodule:: chipsec.hal.uefi_search - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.virtmem.rst.txt b/_sources/modules/chipsec.hal.virtmem.rst.txt index cd517e52..6d2203f7 100644 --- a/_sources/modules/chipsec.hal.virtmem.rst.txt +++ b/_sources/modules/chipsec.hal.virtmem.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.virtmem module +virtmem module ========================== .. automodule:: chipsec.hal.virtmem - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.hal.vmm.rst.txt b/_sources/modules/chipsec.hal.vmm.rst.txt index 0ed2825f..399d06dd 100644 --- a/_sources/modules/chipsec.hal.vmm.rst.txt +++ b/_sources/modules/chipsec.hal.vmm.rst.txt @@ -1,7 +1,7 @@ -chipsec.hal.vmm module +vmm module ====================== .. automodule:: chipsec.hal.vmm - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.basehelper.rst.txt b/_sources/modules/chipsec.helper.basehelper.rst.txt index d2a73fa4..f466ba9b 100644 --- a/_sources/modules/chipsec.helper.basehelper.rst.txt +++ b/_sources/modules/chipsec.helper.basehelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.basehelper module +basehelper module ================================ .. automodule:: chipsec.helper.basehelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.dal.dalhelper.rst.txt b/_sources/modules/chipsec.helper.dal.dalhelper.rst.txt index 5614f1f1..6fffb10a 100644 --- a/_sources/modules/chipsec.helper.dal.dalhelper.rst.txt +++ b/_sources/modules/chipsec.helper.dal.dalhelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.dal.dalhelper module +dalhelper module =================================== .. automodule:: chipsec.helper.dal.dalhelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.dal.rst.txt b/_sources/modules/chipsec.helper.dal.rst.txt index 4bbaa5f6..00d2ac49 100644 --- a/_sources/modules/chipsec.helper.dal.rst.txt +++ b/_sources/modules/chipsec.helper.dal.rst.txt @@ -1,18 +1,12 @@ -chipsec.helper.dal package +dal package ========================== -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.helper.dal.dalhelper -Module contents ---------------- - .. automodule:: chipsec.helper.dal - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.efi.efihelper.rst.txt b/_sources/modules/chipsec.helper.efi.efihelper.rst.txt index 5e9ee6dc..48428a9f 100644 --- a/_sources/modules/chipsec.helper.efi.efihelper.rst.txt +++ b/_sources/modules/chipsec.helper.efi.efihelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.efi.efihelper module +efihelper module =================================== .. automodule:: chipsec.helper.efi.efihelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.efi.rst.txt b/_sources/modules/chipsec.helper.efi.rst.txt index 7bd2114f..80ba3717 100644 --- a/_sources/modules/chipsec.helper.efi.rst.txt +++ b/_sources/modules/chipsec.helper.efi.rst.txt @@ -1,18 +1,12 @@ -chipsec.helper.efi package +efi package ========================== -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.helper.efi.efihelper -Module contents ---------------- - .. automodule:: chipsec.helper.efi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.linux.linuxhelper.rst.txt b/_sources/modules/chipsec.helper.linux.linuxhelper.rst.txt index a91d7f17..b2c045b4 100644 --- a/_sources/modules/chipsec.helper.linux.linuxhelper.rst.txt +++ b/_sources/modules/chipsec.helper.linux.linuxhelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.linux.linuxhelper module +linuxhelper module ======================================= .. automodule:: chipsec.helper.linux.linuxhelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.linux.rst.txt b/_sources/modules/chipsec.helper.linux.rst.txt index f2d37f8c..947c537f 100644 --- a/_sources/modules/chipsec.helper.linux.rst.txt +++ b/_sources/modules/chipsec.helper.linux.rst.txt @@ -1,18 +1,12 @@ -chipsec.helper.linux package +linux package ============================ -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.helper.linux.linuxhelper -Module contents ---------------- - .. automodule:: chipsec.helper.linux - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.linuxnative.cpuid.rst.txt b/_sources/modules/chipsec.helper.linuxnative.cpuid.rst.txt index 27fc912e..9d0f6ddd 100644 --- a/_sources/modules/chipsec.helper.linuxnative.cpuid.rst.txt +++ b/_sources/modules/chipsec.helper.linuxnative.cpuid.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.linuxnative.cpuid module +cpuid module ======================================= .. automodule:: chipsec.helper.linuxnative.cpuid - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.linuxnative.legacy_pci.rst.txt b/_sources/modules/chipsec.helper.linuxnative.legacy_pci.rst.txt index c3808c03..84e49a01 100644 --- a/_sources/modules/chipsec.helper.linuxnative.legacy_pci.rst.txt +++ b/_sources/modules/chipsec.helper.linuxnative.legacy_pci.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.linuxnative.legacy\_pci module +legacy\_pci module ============================================= .. automodule:: chipsec.helper.linuxnative.legacy_pci - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.linuxnative.linuxnativehelper.rst.txt b/_sources/modules/chipsec.helper.linuxnative.linuxnativehelper.rst.txt index f9d39e6a..1a668dc6 100644 --- a/_sources/modules/chipsec.helper.linuxnative.linuxnativehelper.rst.txt +++ b/_sources/modules/chipsec.helper.linuxnative.linuxnativehelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.linuxnative.linuxnativehelper module +linuxnativehelper module =================================================== .. automodule:: chipsec.helper.linuxnative.linuxnativehelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.linuxnative.rst.txt b/_sources/modules/chipsec.helper.linuxnative.rst.txt index f36813e6..463e5e4f 100644 --- a/_sources/modules/chipsec.helper.linuxnative.rst.txt +++ b/_sources/modules/chipsec.helper.linuxnative.rst.txt @@ -1,9 +1,6 @@ -chipsec.helper.linuxnative package +linuxnative package ================================== -Submodules ----------- - .. toctree:: :maxdepth: 10 @@ -11,10 +8,7 @@ Submodules chipsec.helper.linuxnative.legacy_pci chipsec.helper.linuxnative.linuxnativehelper -Module contents ---------------- - .. automodule:: chipsec.helper.linuxnative - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.nonehelper.rst.txt b/_sources/modules/chipsec.helper.nonehelper.rst.txt index 312ec31f..9e60f46d 100644 --- a/_sources/modules/chipsec.helper.nonehelper.rst.txt +++ b/_sources/modules/chipsec.helper.nonehelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.nonehelper module +nonehelper module ================================ .. automodule:: chipsec.helper.nonehelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.oshelper.rst.txt b/_sources/modules/chipsec.helper.oshelper.rst.txt index 28978eb3..e09dda81 100644 --- a/_sources/modules/chipsec.helper.oshelper.rst.txt +++ b/_sources/modules/chipsec.helper.oshelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.oshelper module +oshelper module ============================== .. automodule:: chipsec.helper.oshelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.rst.txt b/_sources/modules/chipsec.helper.rst.txt index 39b5f301..22336f1f 100644 --- a/_sources/modules/chipsec.helper.rst.txt +++ b/_sources/modules/chipsec.helper.rst.txt @@ -1,9 +1,6 @@ -chipsec.helper package +helper package ====================== -Subpackages ------------ - .. toctree:: :maxdepth: 10 @@ -13,9 +10,6 @@ Subpackages chipsec.helper.linuxnative chipsec.helper.windows -Submodules ----------- - .. toctree:: :maxdepth: 10 @@ -23,10 +17,7 @@ Submodules chipsec.helper.nonehelper chipsec.helper.oshelper -Module contents ---------------- - .. automodule:: chipsec.helper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.windows.rst.txt b/_sources/modules/chipsec.helper.windows.rst.txt index 4850248d..edc252ab 100644 --- a/_sources/modules/chipsec.helper.windows.rst.txt +++ b/_sources/modules/chipsec.helper.windows.rst.txt @@ -1,18 +1,12 @@ -chipsec.helper.windows package +windows package ============================== -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.helper.windows.windowshelper -Module contents ---------------- - .. automodule:: chipsec.helper.windows - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.helper.windows.windowshelper.rst.txt b/_sources/modules/chipsec.helper.windows.windowshelper.rst.txt index 00a6cef1..55f8dc37 100644 --- a/_sources/modules/chipsec.helper.windows.windowshelper.rst.txt +++ b/_sources/modules/chipsec.helper.windows.windowshelper.rst.txt @@ -1,7 +1,7 @@ -chipsec.helper.windows.windowshelper module +windowshelper module =========================================== .. automodule:: chipsec.helper.windows.windowshelper - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.architecture.rst.txt b/_sources/modules/chipsec.library.architecture.rst.txt index 1dd753fe..291e8b9c 100644 --- a/_sources/modules/chipsec.library.architecture.rst.txt +++ b/_sources/modules/chipsec.library.architecture.rst.txt @@ -1,7 +1,7 @@ -chipsec.library.architecture module +architecture module =================================== .. automodule:: chipsec.library.architecture - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.bits.rst.txt b/_sources/modules/chipsec.library.bits.rst.txt index 7eca8e04..b4bf12bb 100644 --- a/_sources/modules/chipsec.library.bits.rst.txt +++ b/_sources/modules/chipsec.library.bits.rst.txt @@ -1,7 +1,7 @@ -chipsec.library.bits module +bits module =========================== .. automodule:: chipsec.library.bits - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.control.rst.txt b/_sources/modules/chipsec.library.control.rst.txt new file mode 100644 index 00000000..ef41344e --- /dev/null +++ b/_sources/modules/chipsec.library.control.rst.txt @@ -0,0 +1,7 @@ +control module +============================== + +.. automodule:: chipsec.library.control + + + diff --git a/_sources/modules/chipsec.library.device.rst.txt b/_sources/modules/chipsec.library.device.rst.txt new file mode 100644 index 00000000..a4cbf8e4 --- /dev/null +++ b/_sources/modules/chipsec.library.device.rst.txt @@ -0,0 +1,7 @@ +device module +============================= + +.. automodule:: chipsec.library.device + + + diff --git a/_sources/modules/chipsec.library.lock.rst.txt b/_sources/modules/chipsec.library.lock.rst.txt new file mode 100644 index 00000000..1df8b9d0 --- /dev/null +++ b/_sources/modules/chipsec.library.lock.rst.txt @@ -0,0 +1,7 @@ +lock module +=========================== + +.. automodule:: chipsec.library.lock + + + diff --git a/_sources/modules/chipsec.library.memory.rst.txt b/_sources/modules/chipsec.library.memory.rst.txt index 1d888656..903bb829 100644 --- a/_sources/modules/chipsec.library.memory.rst.txt +++ b/_sources/modules/chipsec.library.memory.rst.txt @@ -1,7 +1,7 @@ -chipsec.library.memory module +memory module ============================= .. automodule:: chipsec.library.memory - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.module_helper.rst.txt b/_sources/modules/chipsec.library.module_helper.rst.txt new file mode 100644 index 00000000..c4c1d9c3 --- /dev/null +++ b/_sources/modules/chipsec.library.module_helper.rst.txt @@ -0,0 +1,7 @@ +module\_helper module +===================================== + +.. automodule:: chipsec.library.module_helper + + + diff --git a/_sources/modules/chipsec.library.options.rst.txt b/_sources/modules/chipsec.library.options.rst.txt new file mode 100644 index 00000000..1b00a55b --- /dev/null +++ b/_sources/modules/chipsec.library.options.rst.txt @@ -0,0 +1,7 @@ +options module +============================== + +.. automodule:: chipsec.library.options + + + diff --git a/_sources/modules/chipsec.library.register.rst.txt b/_sources/modules/chipsec.library.register.rst.txt new file mode 100644 index 00000000..cd83a957 --- /dev/null +++ b/_sources/modules/chipsec.library.register.rst.txt @@ -0,0 +1,7 @@ +register module +=============================== + +.. automodule:: chipsec.library.register + + + diff --git a/_sources/modules/chipsec.library.returncode.rst.txt b/_sources/modules/chipsec.library.returncode.rst.txt new file mode 100644 index 00000000..36a48732 --- /dev/null +++ b/_sources/modules/chipsec.library.returncode.rst.txt @@ -0,0 +1,7 @@ +returncode module +================================= + +.. automodule:: chipsec.library.returncode + + + diff --git a/_sources/modules/chipsec.library.rst.txt b/_sources/modules/chipsec.library.rst.txt index 44b29181..f9fff06b 100644 --- a/_sources/modules/chipsec.library.rst.txt +++ b/_sources/modules/chipsec.library.rst.txt @@ -1,23 +1,29 @@ -chipsec.library package +library package ======================= -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.library.architecture + chipsec.library.banner chipsec.library.bits + chipsec.library.control + chipsec.library.defines + chipsec.library.device + chipsec.library.file + chipsec.library.lock + chipsec.library.logger chipsec.library.memory + chipsec.library.module_helper + chipsec.library.options + chipsec.library.register + chipsec.library.result_deltas + chipsec.library.returncode chipsec.library.strings chipsec.library.structs chipsec.library.types -Module contents ---------------- - .. automodule:: chipsec.library - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.strings.rst.txt b/_sources/modules/chipsec.library.strings.rst.txt index c3d7965e..6f7783f9 100644 --- a/_sources/modules/chipsec.library.strings.rst.txt +++ b/_sources/modules/chipsec.library.strings.rst.txt @@ -1,7 +1,7 @@ -chipsec.library.strings module +strings module ============================== .. automodule:: chipsec.library.strings - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.structs.rst.txt b/_sources/modules/chipsec.library.structs.rst.txt index 126f439b..033528f7 100644 --- a/_sources/modules/chipsec.library.structs.rst.txt +++ b/_sources/modules/chipsec.library.structs.rst.txt @@ -1,7 +1,7 @@ -chipsec.library.structs module +structs module ============================== .. automodule:: chipsec.library.structs - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.library.types.rst.txt b/_sources/modules/chipsec.library.types.rst.txt index 817c15ce..33f1d1fd 100644 --- a/_sources/modules/chipsec.library.types.rst.txt +++ b/_sources/modules/chipsec.library.types.rst.txt @@ -1,7 +1,7 @@ -chipsec.library.types module +types module ============================ .. automodule:: chipsec.library.types - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.bdw.rst.txt b/_sources/modules/chipsec.modules.bdw.rst.txt index f8d7a0d7..2c56f591 100644 --- a/_sources/modules/chipsec.modules.bdw.rst.txt +++ b/_sources/modules/chipsec.modules.bdw.rst.txt @@ -1,10 +1,7 @@ -chipsec.modules.bdw package +bdw package =========================== -Module contents ---------------- - .. automodule:: chipsec.modules.bdw - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.byt.rst.txt b/_sources/modules/chipsec.modules.byt.rst.txt index 9b6c965f..cb737571 100644 --- a/_sources/modules/chipsec.modules.byt.rst.txt +++ b/_sources/modules/chipsec.modules.byt.rst.txt @@ -1,10 +1,7 @@ -chipsec.modules.byt package +byt package =========================== -Module contents ---------------- - .. automodule:: chipsec.modules.byt - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.bios_kbrd_buffer.rst.txt b/_sources/modules/chipsec.modules.common.bios_kbrd_buffer.rst.txt index 218cd57a..964c12b5 100644 --- a/_sources/modules/chipsec.modules.common.bios_kbrd_buffer.rst.txt +++ b/_sources/modules/chipsec.modules.common.bios_kbrd_buffer.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.bios\_kbrd\_buffer module +bios\_kbrd\_buffer module ================================================ .. automodule:: chipsec.modules.common.bios_kbrd_buffer - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.bios_smi.rst.txt b/_sources/modules/chipsec.modules.common.bios_smi.rst.txt index cf2d7ba3..2b50e670 100644 --- a/_sources/modules/chipsec.modules.common.bios_smi.rst.txt +++ b/_sources/modules/chipsec.modules.common.bios_smi.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.bios\_smi module +bios\_smi module ======================================= .. automodule:: chipsec.modules.common.bios_smi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.bios_ts.rst.txt b/_sources/modules/chipsec.modules.common.bios_ts.rst.txt index 7fc9e0b8..d8077fb1 100644 --- a/_sources/modules/chipsec.modules.common.bios_ts.rst.txt +++ b/_sources/modules/chipsec.modules.common.bios_ts.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.bios\_ts module +bios\_ts module ====================================== .. automodule:: chipsec.modules.common.bios_ts - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.bios_wp.rst.txt b/_sources/modules/chipsec.modules.common.bios_wp.rst.txt index 5b724cad..41966eea 100644 --- a/_sources/modules/chipsec.modules.common.bios_wp.rst.txt +++ b/_sources/modules/chipsec.modules.common.bios_wp.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.bios\_wp module +bios\_wp module ====================================== .. automodule:: chipsec.modules.common.bios_wp - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.cet.rst.txt b/_sources/modules/chipsec.modules.common.cet.rst.txt index ab4c3ebe..6c686aba 100644 --- a/_sources/modules/chipsec.modules.common.cet.rst.txt +++ b/_sources/modules/chipsec.modules.common.cet.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.cet module +cet module ================================= .. automodule:: chipsec.modules.common.cet - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.cpu.cpu_info.rst.txt b/_sources/modules/chipsec.modules.common.cpu.cpu_info.rst.txt index 16a7606a..39d62a44 100644 --- a/_sources/modules/chipsec.modules.common.cpu.cpu_info.rst.txt +++ b/_sources/modules/chipsec.modules.common.cpu.cpu_info.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.cpu.cpu\_info module +cpu\_info module =========================================== .. automodule:: chipsec.modules.common.cpu.cpu_info - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.cpu.ia_untrusted.rst.txt b/_sources/modules/chipsec.modules.common.cpu.ia_untrusted.rst.txt index 3b3c51c3..fbb8d1b4 100644 --- a/_sources/modules/chipsec.modules.common.cpu.ia_untrusted.rst.txt +++ b/_sources/modules/chipsec.modules.common.cpu.ia_untrusted.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.cpu.ia\_untrusted module +ia\_untrusted module =============================================== .. automodule:: chipsec.modules.common.cpu.ia_untrusted - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.cpu.rst.txt b/_sources/modules/chipsec.modules.common.cpu.rst.txt index 07b01d20..28712bd8 100644 --- a/_sources/modules/chipsec.modules.common.cpu.rst.txt +++ b/_sources/modules/chipsec.modules.common.cpu.rst.txt @@ -1,9 +1,6 @@ -chipsec.modules.common.cpu package +cpu package ================================== -Submodules ----------- - .. toctree:: :maxdepth: 10 @@ -11,10 +8,7 @@ Submodules chipsec.modules.common.cpu.ia_untrusted chipsec.modules.common.cpu.spectre_v2 -Module contents ---------------- - .. automodule:: chipsec.modules.common.cpu - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.cpu.spectre_v2.rst.txt b/_sources/modules/chipsec.modules.common.cpu.spectre_v2.rst.txt index 0d7c6f2a..9f740390 100644 --- a/_sources/modules/chipsec.modules.common.cpu.spectre_v2.rst.txt +++ b/_sources/modules/chipsec.modules.common.cpu.spectre_v2.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.cpu.spectre\_v2 module +spectre\_v2 module ============================================= .. automodule:: chipsec.modules.common.cpu.spectre_v2 - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.debugenabled.rst.txt b/_sources/modules/chipsec.modules.common.debugenabled.rst.txt index 5c4ef45f..a5a15500 100644 --- a/_sources/modules/chipsec.modules.common.debugenabled.rst.txt +++ b/_sources/modules/chipsec.modules.common.debugenabled.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.debugenabled module +debugenabled module ========================================== .. automodule:: chipsec.modules.common.debugenabled - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.ia32cfg.rst.txt b/_sources/modules/chipsec.modules.common.ia32cfg.rst.txt index fe541477..6580abbc 100644 --- a/_sources/modules/chipsec.modules.common.ia32cfg.rst.txt +++ b/_sources/modules/chipsec.modules.common.ia32cfg.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.ia32cfg module +ia32cfg module ===================================== .. automodule:: chipsec.modules.common.ia32cfg - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.me_mfg_mode.rst.txt b/_sources/modules/chipsec.modules.common.me_mfg_mode.rst.txt index c44fb0f8..c642e591 100644 --- a/_sources/modules/chipsec.modules.common.me_mfg_mode.rst.txt +++ b/_sources/modules/chipsec.modules.common.me_mfg_mode.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.me\_mfg\_mode module +me\_mfg\_mode module =========================================== .. automodule:: chipsec.modules.common.me_mfg_mode - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.memconfig.rst.txt b/_sources/modules/chipsec.modules.common.memconfig.rst.txt index a2308279..19f61cf7 100644 --- a/_sources/modules/chipsec.modules.common.memconfig.rst.txt +++ b/_sources/modules/chipsec.modules.common.memconfig.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.memconfig module +memconfig module ======================================= .. automodule:: chipsec.modules.common.memconfig - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.memlock.rst.txt b/_sources/modules/chipsec.modules.common.memlock.rst.txt index 410d8d71..ae8d68b5 100644 --- a/_sources/modules/chipsec.modules.common.memlock.rst.txt +++ b/_sources/modules/chipsec.modules.common.memlock.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.memlock module +memlock module ===================================== .. automodule:: chipsec.modules.common.memlock - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.remap.rst.txt b/_sources/modules/chipsec.modules.common.remap.rst.txt index 34bd0f69..7af23ea3 100644 --- a/_sources/modules/chipsec.modules.common.remap.rst.txt +++ b/_sources/modules/chipsec.modules.common.remap.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.remap module +remap module =================================== .. automodule:: chipsec.modules.common.remap - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.rst.txt b/_sources/modules/chipsec.modules.common.rst.txt index 8c9283fc..c4a6b160 100644 --- a/_sources/modules/chipsec.modules.common.rst.txt +++ b/_sources/modules/chipsec.modules.common.rst.txt @@ -1,9 +1,6 @@ -chipsec.modules.common package +common package ============================== -Subpackages ------------ - .. toctree:: :maxdepth: 10 @@ -11,9 +8,6 @@ Subpackages chipsec.modules.common.secureboot chipsec.modules.common.uefi -Submodules ----------- - .. toctree:: :maxdepth: 10 @@ -40,10 +34,7 @@ Submodules chipsec.modules.common.spi_fdopss chipsec.modules.common.spi_lock -Module contents ---------------- - .. automodule:: chipsec.modules.common - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.rtclock.rst.txt b/_sources/modules/chipsec.modules.common.rtclock.rst.txt index 29f35d0e..afd19782 100644 --- a/_sources/modules/chipsec.modules.common.rtclock.rst.txt +++ b/_sources/modules/chipsec.modules.common.rtclock.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.rtclock module +rtclock module ===================================== .. automodule:: chipsec.modules.common.rtclock - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.secureboot.rst.txt b/_sources/modules/chipsec.modules.common.secureboot.rst.txt index 797ca7d6..4cfce71a 100644 --- a/_sources/modules/chipsec.modules.common.secureboot.rst.txt +++ b/_sources/modules/chipsec.modules.common.secureboot.rst.txt @@ -1,18 +1,12 @@ -chipsec.modules.common.secureboot package +secureboot package ========================================= -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.modules.common.secureboot.variables -Module contents ---------------- - .. automodule:: chipsec.modules.common.secureboot - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.secureboot.variables.rst.txt b/_sources/modules/chipsec.modules.common.secureboot.variables.rst.txt index 834e1b51..c31b0f7d 100644 --- a/_sources/modules/chipsec.modules.common.secureboot.variables.rst.txt +++ b/_sources/modules/chipsec.modules.common.secureboot.variables.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.secureboot.variables module +variables module ================================================== .. automodule:: chipsec.modules.common.secureboot.variables - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.sgx_check.rst.txt b/_sources/modules/chipsec.modules.common.sgx_check.rst.txt index 5f0bcd6b..7185c42b 100644 --- a/_sources/modules/chipsec.modules.common.sgx_check.rst.txt +++ b/_sources/modules/chipsec.modules.common.sgx_check.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.sgx\_check module +sgx\_check module ======================================== .. automodule:: chipsec.modules.common.sgx_check - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.smm.rst.txt b/_sources/modules/chipsec.modules.common.smm.rst.txt index 05e9ed0f..e57c3179 100644 --- a/_sources/modules/chipsec.modules.common.smm.rst.txt +++ b/_sources/modules/chipsec.modules.common.smm.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.smm module +smm module ================================= .. automodule:: chipsec.modules.common.smm - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.smm_code_chk.rst.txt b/_sources/modules/chipsec.modules.common.smm_code_chk.rst.txt index 980966ac..8ce4b7cf 100644 --- a/_sources/modules/chipsec.modules.common.smm_code_chk.rst.txt +++ b/_sources/modules/chipsec.modules.common.smm_code_chk.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.smm\_code\_chk module +smm\_code\_chk module ============================================ .. automodule:: chipsec.modules.common.smm_code_chk - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.smm_dma.rst.txt b/_sources/modules/chipsec.modules.common.smm_dma.rst.txt index 1292aed4..dae256fc 100644 --- a/_sources/modules/chipsec.modules.common.smm_dma.rst.txt +++ b/_sources/modules/chipsec.modules.common.smm_dma.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.smm\_dma module +smm\_dma module ====================================== .. automodule:: chipsec.modules.common.smm_dma - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.smrr.rst.txt b/_sources/modules/chipsec.modules.common.smrr.rst.txt index 57d0150d..716bb5ff 100644 --- a/_sources/modules/chipsec.modules.common.smrr.rst.txt +++ b/_sources/modules/chipsec.modules.common.smrr.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.smrr module +smrr module ================================== .. automodule:: chipsec.modules.common.smrr - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.spd_wd.rst.txt b/_sources/modules/chipsec.modules.common.spd_wd.rst.txt index ab7103f5..6dcaa3e4 100644 --- a/_sources/modules/chipsec.modules.common.spd_wd.rst.txt +++ b/_sources/modules/chipsec.modules.common.spd_wd.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.spd\_wd module +spd\_wd module ===================================== .. automodule:: chipsec.modules.common.spd_wd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.spi_access.rst.txt b/_sources/modules/chipsec.modules.common.spi_access.rst.txt index a17e686b..ee67f04f 100644 --- a/_sources/modules/chipsec.modules.common.spi_access.rst.txt +++ b/_sources/modules/chipsec.modules.common.spi_access.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.spi\_access module +spi\_access module ========================================= .. automodule:: chipsec.modules.common.spi_access - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.spi_desc.rst.txt b/_sources/modules/chipsec.modules.common.spi_desc.rst.txt index 9fab3430..8488f237 100644 --- a/_sources/modules/chipsec.modules.common.spi_desc.rst.txt +++ b/_sources/modules/chipsec.modules.common.spi_desc.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.spi\_desc module +spi\_desc module ======================================= .. automodule:: chipsec.modules.common.spi_desc - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.spi_fdopss.rst.txt b/_sources/modules/chipsec.modules.common.spi_fdopss.rst.txt index 765a7430..5dcd1ead 100644 --- a/_sources/modules/chipsec.modules.common.spi_fdopss.rst.txt +++ b/_sources/modules/chipsec.modules.common.spi_fdopss.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.spi\_fdopss module +spi\_fdopss module ========================================= .. automodule:: chipsec.modules.common.spi_fdopss - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.spi_lock.rst.txt b/_sources/modules/chipsec.modules.common.spi_lock.rst.txt index 9d0f1ba8..c3509154 100644 --- a/_sources/modules/chipsec.modules.common.spi_lock.rst.txt +++ b/_sources/modules/chipsec.modules.common.spi_lock.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.spi\_lock module +spi\_lock module ======================================= .. automodule:: chipsec.modules.common.spi_lock - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.uefi.access_uefispec.rst.txt b/_sources/modules/chipsec.modules.common.uefi.access_uefispec.rst.txt index 277e0dcc..b6803eaa 100644 --- a/_sources/modules/chipsec.modules.common.uefi.access_uefispec.rst.txt +++ b/_sources/modules/chipsec.modules.common.uefi.access_uefispec.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.uefi.access\_uefispec module +access\_uefispec module =================================================== .. automodule:: chipsec.modules.common.uefi.access_uefispec - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.uefi.rst.txt b/_sources/modules/chipsec.modules.common.uefi.rst.txt index 8ba126b2..a50f9864 100644 --- a/_sources/modules/chipsec.modules.common.uefi.rst.txt +++ b/_sources/modules/chipsec.modules.common.uefi.rst.txt @@ -1,19 +1,13 @@ -chipsec.modules.common.uefi package +uefi package =================================== -Submodules ----------- - .. toctree:: :maxdepth: 10 chipsec.modules.common.uefi.access_uefispec chipsec.modules.common.uefi.s3bootscript -Module contents ---------------- - .. automodule:: chipsec.modules.common.uefi - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.common.uefi.s3bootscript.rst.txt b/_sources/modules/chipsec.modules.common.uefi.s3bootscript.rst.txt index fe361a8a..af4654d5 100644 --- a/_sources/modules/chipsec.modules.common.uefi.s3bootscript.rst.txt +++ b/_sources/modules/chipsec.modules.common.uefi.s3bootscript.rst.txt @@ -1,7 +1,7 @@ -chipsec.modules.common.uefi.s3bootscript module +s3bootscript module =============================================== .. automodule:: chipsec.modules.common.uefi.s3bootscript - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.hsw.rst.txt b/_sources/modules/chipsec.modules.hsw.rst.txt index 58be5a95..784d416e 100644 --- a/_sources/modules/chipsec.modules.hsw.rst.txt +++ b/_sources/modules/chipsec.modules.hsw.rst.txt @@ -1,10 +1,7 @@ -chipsec.modules.hsw package +hsw package =========================== -Module contents ---------------- - .. automodule:: chipsec.modules.hsw - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.ivb.rst.txt b/_sources/modules/chipsec.modules.ivb.rst.txt index 241535ea..eeb2222b 100644 --- a/_sources/modules/chipsec.modules.ivb.rst.txt +++ b/_sources/modules/chipsec.modules.ivb.rst.txt @@ -1,10 +1,7 @@ -chipsec.modules.ivb package +ivb package =========================== -Module contents ---------------- - .. automodule:: chipsec.modules.ivb - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.rst.txt b/_sources/modules/chipsec.modules.rst.txt index f4450f65..78e665c8 100644 --- a/_sources/modules/chipsec.modules.rst.txt +++ b/_sources/modules/chipsec.modules.rst.txt @@ -1,9 +1,6 @@ -chipsec.modules package +modules package ======================= -Subpackages ------------ - .. toctree:: :maxdepth: 10 @@ -13,11 +10,9 @@ Subpackages chipsec.modules.hsw chipsec.modules.ivb chipsec.modules.snb - -Module contents ---------------- + chipsec.modules.tools .. automodule:: chipsec.modules - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.snb.rst.txt b/_sources/modules/chipsec.modules.snb.rst.txt index 98fd46c4..a77a62ba 100644 --- a/_sources/modules/chipsec.modules.snb.rst.txt +++ b/_sources/modules/chipsec.modules.snb.rst.txt @@ -1,10 +1,7 @@ -chipsec.modules.snb package +snb package =========================== -Module contents ---------------- - .. automodule:: chipsec.modules.snb - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.modules.tools.cpu.rst.txt b/_sources/modules/chipsec.modules.tools.cpu.rst.txt new file mode 100644 index 00000000..7e9cad38 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.cpu.rst.txt @@ -0,0 +1,12 @@ +cpu package +================================= + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.cpu.sinkhole + +.. automodule:: chipsec.modules.tools.cpu + + + diff --git a/_sources/modules/chipsec.modules.tools.cpu.sinkhole.rst.txt b/_sources/modules/chipsec.modules.tools.cpu.sinkhole.rst.txt new file mode 100644 index 00000000..3151b3ae --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.cpu.sinkhole.rst.txt @@ -0,0 +1,7 @@ +sinkhole module +========================================= + +.. automodule:: chipsec.modules.tools.cpu.sinkhole + + + diff --git a/_sources/modules/chipsec.modules.tools.generate_test_id.rst.txt b/_sources/modules/chipsec.modules.tools.generate_test_id.rst.txt new file mode 100644 index 00000000..a0075269 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.generate_test_id.rst.txt @@ -0,0 +1,7 @@ +generate\_test\_id module +=============================================== + +.. automodule:: chipsec.modules.tools.generate_test_id + + + diff --git a/_sources/modules/chipsec.modules.tools.rst.txt b/_sources/modules/chipsec.modules.tools.rst.txt new file mode 100644 index 00000000..c2b3554b --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.rst.txt @@ -0,0 +1,22 @@ +tools package +============================= + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.cpu + chipsec.modules.tools.secureboot + chipsec.modules.tools.smm + chipsec.modules.tools.uefi + chipsec.modules.tools.vmm + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.generate_test_id + chipsec.modules.tools.wsmt + +.. automodule:: chipsec.modules.tools + + + diff --git a/_sources/modules/chipsec.modules.tools.secureboot.rst.txt b/_sources/modules/chipsec.modules.tools.secureboot.rst.txt new file mode 100644 index 00000000..d78abb91 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.secureboot.rst.txt @@ -0,0 +1,12 @@ +secureboot package +======================================== + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.secureboot.te + +.. automodule:: chipsec.modules.tools.secureboot + + + diff --git a/_sources/modules/chipsec.modules.tools.secureboot.te.rst.txt b/_sources/modules/chipsec.modules.tools.secureboot.te.rst.txt new file mode 100644 index 00000000..ad748a50 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.secureboot.te.rst.txt @@ -0,0 +1,7 @@ +te module +========================================== + +.. automodule:: chipsec.modules.tools.secureboot.te + + + diff --git a/_sources/modules/chipsec.modules.tools.smm.rogue_mmio_bar.rst.txt b/_sources/modules/chipsec.modules.tools.smm.rogue_mmio_bar.rst.txt new file mode 100644 index 00000000..7f39c8af --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.smm.rogue_mmio_bar.rst.txt @@ -0,0 +1,7 @@ +rogue\_mmio\_bar module +================================================= + +.. automodule:: chipsec.modules.tools.smm.rogue_mmio_bar + + + diff --git a/_sources/modules/chipsec.modules.tools.smm.rst.txt b/_sources/modules/chipsec.modules.tools.smm.rst.txt new file mode 100644 index 00000000..26e15165 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.smm.rst.txt @@ -0,0 +1,13 @@ +smm package +================================= + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.smm.rogue_mmio_bar + chipsec.modules.tools.smm.smm_ptr + +.. automodule:: chipsec.modules.tools.smm + + + diff --git a/_sources/modules/chipsec.modules.tools.smm.smm_ptr.rst.txt b/_sources/modules/chipsec.modules.tools.smm.smm_ptr.rst.txt new file mode 100644 index 00000000..2d47bb0d --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.smm.smm_ptr.rst.txt @@ -0,0 +1,7 @@ +smm\_ptr module +========================================= + +.. automodule:: chipsec.modules.tools.smm.smm_ptr + + + diff --git a/_sources/modules/chipsec.modules.tools.uefi.reputation.rst.txt b/_sources/modules/chipsec.modules.tools.uefi.reputation.rst.txt new file mode 100644 index 00000000..74316fd3 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.uefi.reputation.rst.txt @@ -0,0 +1,7 @@ +reputation module +============================================ + +.. automodule:: chipsec.modules.tools.uefi.reputation + + + diff --git a/_sources/modules/chipsec.modules.tools.uefi.rst.txt b/_sources/modules/chipsec.modules.tools.uefi.rst.txt new file mode 100644 index 00000000..a69f49de --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.uefi.rst.txt @@ -0,0 +1,16 @@ +uefi package +================================== + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.uefi.reputation + chipsec.modules.tools.uefi.s3script_modify + chipsec.modules.tools.uefi.scan_blocked + chipsec.modules.tools.uefi.scan_image + chipsec.modules.tools.uefi.uefivar_fuzz + +.. automodule:: chipsec.modules.tools.uefi + + + diff --git a/_sources/modules/chipsec.modules.tools.uefi.s3script_modify.rst.txt b/_sources/modules/chipsec.modules.tools.uefi.s3script_modify.rst.txt new file mode 100644 index 00000000..0e34307f --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.uefi.s3script_modify.rst.txt @@ -0,0 +1,7 @@ +s3script\_modify module +================================================== + +.. automodule:: chipsec.modules.tools.uefi.s3script_modify + + + diff --git a/_sources/modules/chipsec.modules.tools.uefi.scan_blocked.rst.txt b/_sources/modules/chipsec.modules.tools.uefi.scan_blocked.rst.txt new file mode 100644 index 00000000..9599eb23 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.uefi.scan_blocked.rst.txt @@ -0,0 +1,7 @@ +scan\_blocked module +=============================================== + +.. automodule:: chipsec.modules.tools.uefi.scan_blocked + + + diff --git a/_sources/modules/chipsec.modules.tools.uefi.scan_image.rst.txt b/_sources/modules/chipsec.modules.tools.uefi.scan_image.rst.txt new file mode 100644 index 00000000..a07e8ea9 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.uefi.scan_image.rst.txt @@ -0,0 +1,7 @@ +scan\_image module +============================================= + +.. automodule:: chipsec.modules.tools.uefi.scan_image + + + diff --git a/_sources/modules/chipsec.modules.tools.uefi.uefivar_fuzz.rst.txt b/_sources/modules/chipsec.modules.tools.uefi.uefivar_fuzz.rst.txt new file mode 100644 index 00000000..a549b8ac --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.uefi.uefivar_fuzz.rst.txt @@ -0,0 +1,7 @@ +uefivar\_fuzz module +=============================================== + +.. automodule:: chipsec.modules.tools.uefi.uefivar_fuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.common.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.common.rst.txt new file mode 100644 index 00000000..0714e3eb --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.common.rst.txt @@ -0,0 +1,7 @@ +common module +======================================= + +.. automodule:: chipsec.modules.tools.vmm.common + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.cpuid_fuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.cpuid_fuzz.rst.txt new file mode 100644 index 00000000..66ef3da2 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.cpuid_fuzz.rst.txt @@ -0,0 +1,7 @@ +cpuid\_fuzz module +============================================ + +.. automodule:: chipsec.modules.tools.vmm.cpuid_fuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.ept_finder.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.ept_finder.rst.txt new file mode 100644 index 00000000..1dddec68 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.ept_finder.rst.txt @@ -0,0 +1,7 @@ +ept\_finder module +============================================ + +.. automodule:: chipsec.modules.tools.vmm.ept_finder + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.define.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.define.rst.txt new file mode 100644 index 00000000..c98deca9 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.define.rst.txt @@ -0,0 +1,7 @@ +define module +========================================== + +.. automodule:: chipsec.modules.tools.vmm.hv.define + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.hypercall.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.hypercall.rst.txt new file mode 100644 index 00000000..4404652f --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.hypercall.rst.txt @@ -0,0 +1,7 @@ +hypercall module +============================================= + +.. automodule:: chipsec.modules.tools.vmm.hv.hypercall + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.rst.txt new file mode 100644 index 00000000..97906981 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.rst.txt @@ -0,0 +1,7 @@ +hypercallfuzz module +================================================= + +.. automodule:: chipsec.modules.tools.vmm.hv.hypercallfuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.rst.txt new file mode 100644 index 00000000..64b72282 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.rst.txt @@ -0,0 +1,18 @@ +hv package +==================================== + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.vmm.hv.define + chipsec.modules.tools.vmm.hv.hypercall + chipsec.modules.tools.vmm.hv.hypercallfuzz + chipsec.modules.tools.vmm.hv.synth_dev + chipsec.modules.tools.vmm.hv.synth_kbd + chipsec.modules.tools.vmm.hv.vmbus + chipsec.modules.tools.vmm.hv.vmbusfuzz + +.. automodule:: chipsec.modules.tools.vmm.hv + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.synth_dev.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.synth_dev.rst.txt new file mode 100644 index 00000000..7ed76cb3 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.synth_dev.rst.txt @@ -0,0 +1,7 @@ +synth\_dev module +============================================== + +.. automodule:: chipsec.modules.tools.vmm.hv.synth_dev + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.synth_kbd.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.synth_kbd.rst.txt new file mode 100644 index 00000000..607af6ef --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.synth_kbd.rst.txt @@ -0,0 +1,7 @@ +synth\_kbd module +============================================== + +.. automodule:: chipsec.modules.tools.vmm.hv.synth_kbd + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.vmbus.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.vmbus.rst.txt new file mode 100644 index 00000000..715f1716 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.vmbus.rst.txt @@ -0,0 +1,7 @@ +vmbus module +========================================= + +.. automodule:: chipsec.modules.tools.vmm.hv.vmbus + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.rst.txt new file mode 100644 index 00000000..b9a8f079 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.rst.txt @@ -0,0 +1,7 @@ +vmbusfuzz module +============================================= + +.. automodule:: chipsec.modules.tools.vmm.hv.vmbusfuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.hypercallfuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.hypercallfuzz.rst.txt new file mode 100644 index 00000000..9b09c5d7 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.hypercallfuzz.rst.txt @@ -0,0 +1,7 @@ +hypercallfuzz module +============================================== + +.. automodule:: chipsec.modules.tools.vmm.hypercallfuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.iofuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.iofuzz.rst.txt new file mode 100644 index 00000000..6920c065 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.iofuzz.rst.txt @@ -0,0 +1,7 @@ +iofuzz module +======================================= + +.. automodule:: chipsec.modules.tools.vmm.iofuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.msr_fuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.msr_fuzz.rst.txt new file mode 100644 index 00000000..1b86eb13 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.msr_fuzz.rst.txt @@ -0,0 +1,7 @@ +msr\_fuzz module +========================================== + +.. automodule:: chipsec.modules.tools.vmm.msr_fuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.pcie_fuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.pcie_fuzz.rst.txt new file mode 100644 index 00000000..59a704d7 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.pcie_fuzz.rst.txt @@ -0,0 +1,7 @@ +pcie\_fuzz module +=========================================== + +.. automodule:: chipsec.modules.tools.vmm.pcie_fuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.rst.txt new file mode 100644 index 00000000..caa2ec17 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.rst.txt @@ -0,0 +1,7 @@ +pcie\_overlap\_fuzz module +==================================================== + +.. automodule:: chipsec.modules.tools.vmm.pcie_overlap_fuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.rst.txt new file mode 100644 index 00000000..31323992 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.rst.txt @@ -0,0 +1,27 @@ +vmm package +================================= + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.vmm.hv + chipsec.modules.tools.vmm.vbox + chipsec.modules.tools.vmm.xen + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.vmm.common + chipsec.modules.tools.vmm.cpuid_fuzz + chipsec.modules.tools.vmm.ept_finder + chipsec.modules.tools.vmm.hypercallfuzz + chipsec.modules.tools.vmm.iofuzz + chipsec.modules.tools.vmm.msr_fuzz + chipsec.modules.tools.vmm.pcie_fuzz + chipsec.modules.tools.vmm.pcie_overlap_fuzz + chipsec.modules.tools.vmm.venom + +.. automodule:: chipsec.modules.tools.vmm + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.vbox.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.vbox.rst.txt new file mode 100644 index 00000000..74d3c1e7 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.vbox.rst.txt @@ -0,0 +1,12 @@ +vbox package +====================================== + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase + +.. automodule:: chipsec.modules.tools.vmm.vbox + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.rst.txt new file mode 100644 index 00000000..cb1ef9de --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.rst.txt @@ -0,0 +1,7 @@ +vbox\_crash\_apicbase module +=========================================================== + +.. automodule:: chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.venom.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.venom.rst.txt new file mode 100644 index 00000000..a63f38ba --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.venom.rst.txt @@ -0,0 +1,7 @@ +venom module +====================================== + +.. automodule:: chipsec.modules.tools.vmm.venom + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.xen.define.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.xen.define.rst.txt new file mode 100644 index 00000000..dfaf5009 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.xen.define.rst.txt @@ -0,0 +1,7 @@ +define module +=========================================== + +.. automodule:: chipsec.modules.tools.vmm.xen.define + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.xen.hypercall.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.xen.hypercall.rst.txt new file mode 100644 index 00000000..0e49c598 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.xen.hypercall.rst.txt @@ -0,0 +1,7 @@ +hypercall module +============================================== + +.. automodule:: chipsec.modules.tools.vmm.xen.hypercall + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.rst.txt new file mode 100644 index 00000000..897d4ad9 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.rst.txt @@ -0,0 +1,7 @@ +hypercallfuzz module +================================================== + +.. automodule:: chipsec.modules.tools.vmm.xen.hypercallfuzz + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.xen.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.xen.rst.txt new file mode 100644 index 00000000..c31f9f54 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.xen.rst.txt @@ -0,0 +1,15 @@ +xen package +===================================== + +.. toctree:: + :maxdepth: 10 + + chipsec.modules.tools.vmm.xen.define + chipsec.modules.tools.vmm.xen.hypercall + chipsec.modules.tools.vmm.xen.hypercallfuzz + chipsec.modules.tools.vmm.xen.xsa188 + +.. automodule:: chipsec.modules.tools.vmm.xen + + + diff --git a/_sources/modules/chipsec.modules.tools.vmm.xen.xsa188.rst.txt b/_sources/modules/chipsec.modules.tools.vmm.xen.xsa188.rst.txt new file mode 100644 index 00000000..b1c566d4 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.vmm.xen.xsa188.rst.txt @@ -0,0 +1,7 @@ +xsa188 module +=========================================== + +.. automodule:: chipsec.modules.tools.vmm.xen.xsa188 + + + diff --git a/_sources/modules/chipsec.modules.tools.wsmt.rst.txt b/_sources/modules/chipsec.modules.tools.wsmt.rst.txt new file mode 100644 index 00000000..186371e9 --- /dev/null +++ b/_sources/modules/chipsec.modules.tools.wsmt.rst.txt @@ -0,0 +1,7 @@ +wsmt module +================================= + +.. automodule:: chipsec.modules.tools.wsmt + + + diff --git a/_sources/modules/chipsec.parsers.rst.txt b/_sources/modules/chipsec.parsers.rst.txt index b9dc5701..93bac8a6 100644 --- a/_sources/modules/chipsec.parsers.rst.txt +++ b/_sources/modules/chipsec.parsers.rst.txt @@ -1,7 +1,7 @@ -chipsec.parsers module +parsers module ====================== .. automodule:: chipsec.parsers - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.testcase.rst.txt b/_sources/modules/chipsec.testcase.rst.txt new file mode 100644 index 00000000..65f06f1f --- /dev/null +++ b/_sources/modules/chipsec.testcase.rst.txt @@ -0,0 +1,7 @@ +testcase module +======================= + +.. automodule:: chipsec.testcase + + + diff --git a/_sources/modules/chipsec.utilcmd.acpi_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.acpi_cmd.rst.txt index 3dc831e5..66ca8221 100644 --- a/_sources/modules/chipsec.utilcmd.acpi_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.acpi_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.acpi\_cmd module +acpi\_cmd module ================================ .. automodule:: chipsec.utilcmd.acpi_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.chipset_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.chipset_cmd.rst.txt index b12fc8d0..57bdba39 100644 --- a/_sources/modules/chipsec.utilcmd.chipset_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.chipset_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.chipset\_cmd module +chipset\_cmd module =================================== .. automodule:: chipsec.utilcmd.chipset_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.cmos_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.cmos_cmd.rst.txt index 291a71de..b8b1b07b 100644 --- a/_sources/modules/chipsec.utilcmd.cmos_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.cmos_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.cmos\_cmd module +cmos\_cmd module ================================ .. automodule:: chipsec.utilcmd.cmos_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.config_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.config_cmd.rst.txt index b87d4340..bc539557 100644 --- a/_sources/modules/chipsec.utilcmd.config_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.config_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.config\_cmd module +config\_cmd module ================================== .. automodule:: chipsec.utilcmd.config_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.cpu_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.cpu_cmd.rst.txt index 63b0e38b..b4875bd8 100644 --- a/_sources/modules/chipsec.utilcmd.cpu_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.cpu_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.cpu\_cmd module +cpu\_cmd module =============================== .. automodule:: chipsec.utilcmd.cpu_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.decode_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.decode_cmd.rst.txt index 2ac30dc1..2cc6073c 100644 --- a/_sources/modules/chipsec.utilcmd.decode_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.decode_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.decode\_cmd module +decode\_cmd module ================================== .. automodule:: chipsec.utilcmd.decode_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.deltas_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.deltas_cmd.rst.txt index 81a5a6c0..76eefdc7 100644 --- a/_sources/modules/chipsec.utilcmd.deltas_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.deltas_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.deltas\_cmd module +deltas\_cmd module ================================== .. automodule:: chipsec.utilcmd.deltas_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.desc_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.desc_cmd.rst.txt index 59464c82..cd80d02e 100644 --- a/_sources/modules/chipsec.utilcmd.desc_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.desc_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.desc\_cmd module +desc\_cmd module ================================ .. automodule:: chipsec.utilcmd.desc_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.ec_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.ec_cmd.rst.txt index 791f6192..64740239 100644 --- a/_sources/modules/chipsec.utilcmd.ec_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.ec_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.ec\_cmd module +ec\_cmd module ============================== .. automodule:: chipsec.utilcmd.ec_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.igd_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.igd_cmd.rst.txt index 93dac76c..3dc5b57c 100644 --- a/_sources/modules/chipsec.utilcmd.igd_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.igd_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.igd\_cmd module +igd\_cmd module =============================== .. automodule:: chipsec.utilcmd.igd_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.interrupts_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.interrupts_cmd.rst.txt index 257c6c52..bdd8d6c1 100644 --- a/_sources/modules/chipsec.utilcmd.interrupts_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.interrupts_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.interrupts\_cmd module +interrupts\_cmd module ====================================== .. automodule:: chipsec.utilcmd.interrupts_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.io_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.io_cmd.rst.txt index a6ce0ca0..12168def 100644 --- a/_sources/modules/chipsec.utilcmd.io_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.io_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.io\_cmd module +io\_cmd module ============================== .. automodule:: chipsec.utilcmd.io_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.iommu_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.iommu_cmd.rst.txt index 3e9853b9..dd777577 100644 --- a/_sources/modules/chipsec.utilcmd.iommu_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.iommu_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.iommu\_cmd module +iommu\_cmd module ================================= .. automodule:: chipsec.utilcmd.iommu_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.lock_check_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.lock_check_cmd.rst.txt index 3570375c..f63d9c2a 100644 --- a/_sources/modules/chipsec.utilcmd.lock_check_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.lock_check_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.lock\_check\_cmd module +lock\_check\_cmd module ======================================= .. automodule:: chipsec.utilcmd.lock_check_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.mem_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.mem_cmd.rst.txt index e39fbe61..5ba4dbc7 100644 --- a/_sources/modules/chipsec.utilcmd.mem_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.mem_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.mem\_cmd module +mem\_cmd module =============================== .. automodule:: chipsec.utilcmd.mem_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.mmcfg_base_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.mmcfg_base_cmd.rst.txt index dbae082c..1ecfa25d 100644 --- a/_sources/modules/chipsec.utilcmd.mmcfg_base_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.mmcfg_base_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.mmcfg\_base\_cmd module +mmcfg\_base\_cmd module ======================================= .. automodule:: chipsec.utilcmd.mmcfg_base_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.mmcfg_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.mmcfg_cmd.rst.txt index 42d9b5e3..3f370f50 100644 --- a/_sources/modules/chipsec.utilcmd.mmcfg_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.mmcfg_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.mmcfg\_cmd module +mmcfg\_cmd module ================================= .. automodule:: chipsec.utilcmd.mmcfg_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.mmio_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.mmio_cmd.rst.txt index 792b5045..e13b2fb2 100644 --- a/_sources/modules/chipsec.utilcmd.mmio_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.mmio_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.mmio\_cmd module +mmio\_cmd module ================================ .. automodule:: chipsec.utilcmd.mmio_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.msgbus_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.msgbus_cmd.rst.txt index 927bfa1c..80a6f269 100644 --- a/_sources/modules/chipsec.utilcmd.msgbus_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.msgbus_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.msgbus\_cmd module +msgbus\_cmd module ================================== .. automodule:: chipsec.utilcmd.msgbus_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.msr_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.msr_cmd.rst.txt index 0f09d538..98418b16 100644 --- a/_sources/modules/chipsec.utilcmd.msr_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.msr_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.msr\_cmd module +msr\_cmd module =============================== .. automodule:: chipsec.utilcmd.msr_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.pci_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.pci_cmd.rst.txt index 8af0ba3d..1854d5f5 100644 --- a/_sources/modules/chipsec.utilcmd.pci_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.pci_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.pci\_cmd module +pci\_cmd module =============================== .. automodule:: chipsec.utilcmd.pci_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.reg_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.reg_cmd.rst.txt index 0f5e2d18..9e197b2e 100644 --- a/_sources/modules/chipsec.utilcmd.reg_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.reg_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.reg\_cmd module +reg\_cmd module =============================== .. automodule:: chipsec.utilcmd.reg_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.rst.txt b/_sources/modules/chipsec.utilcmd.rst.txt index 4cfa1f5a..7bac02d7 100644 --- a/_sources/modules/chipsec.utilcmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.rst.txt @@ -1,9 +1,6 @@ -chipsec.utilcmd package +utilcmd package ======================= -Submodules ----------- - .. toctree:: :maxdepth: 10 @@ -41,10 +38,7 @@ Submodules chipsec.utilcmd.vmem_cmd chipsec.utilcmd.vmm_cmd -Module contents ---------------- - .. automodule:: chipsec.utilcmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.smbios_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.smbios_cmd.rst.txt index 419d17b3..e42b3010 100644 --- a/_sources/modules/chipsec.utilcmd.smbios_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.smbios_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.smbios\_cmd module +smbios\_cmd module ================================== .. automodule:: chipsec.utilcmd.smbios_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.smbus_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.smbus_cmd.rst.txt index 0503328e..caa6e292 100644 --- a/_sources/modules/chipsec.utilcmd.smbus_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.smbus_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.smbus\_cmd module +smbus\_cmd module ================================= .. automodule:: chipsec.utilcmd.smbus_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.spd_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.spd_cmd.rst.txt index d67279c3..af7c172f 100644 --- a/_sources/modules/chipsec.utilcmd.spd_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.spd_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.spd\_cmd module +spd\_cmd module =============================== .. automodule:: chipsec.utilcmd.spd_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.spi_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.spi_cmd.rst.txt index 643127b6..3b334a01 100644 --- a/_sources/modules/chipsec.utilcmd.spi_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.spi_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.spi\_cmd module +spi\_cmd module =============================== .. automodule:: chipsec.utilcmd.spi_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.spidesc_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.spidesc_cmd.rst.txt index fffcdaec..5d28630f 100644 --- a/_sources/modules/chipsec.utilcmd.spidesc_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.spidesc_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.spidesc\_cmd module +spidesc\_cmd module =================================== .. automodule:: chipsec.utilcmd.spidesc_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.tpm_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.tpm_cmd.rst.txt index 3f18dde4..be8280cb 100644 --- a/_sources/modules/chipsec.utilcmd.tpm_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.tpm_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.tpm\_cmd module +tpm\_cmd module =============================== .. automodule:: chipsec.utilcmd.tpm_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.txt_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.txt_cmd.rst.txt index a08ae21f..4ef7d276 100644 --- a/_sources/modules/chipsec.utilcmd.txt_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.txt_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.txt\_cmd module +txt\_cmd module =============================== .. automodule:: chipsec.utilcmd.txt_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.ucode_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.ucode_cmd.rst.txt index 5cb5e85e..94a08c56 100644 --- a/_sources/modules/chipsec.utilcmd.ucode_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.ucode_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.ucode\_cmd module +ucode\_cmd module ================================= .. automodule:: chipsec.utilcmd.ucode_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.uefi_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.uefi_cmd.rst.txt index aa55cb6a..b67b6e69 100644 --- a/_sources/modules/chipsec.utilcmd.uefi_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.uefi_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.uefi\_cmd module +uefi\_cmd module ================================ .. automodule:: chipsec.utilcmd.uefi_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.vmem_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.vmem_cmd.rst.txt index 0cd80130..ddf19cdb 100644 --- a/_sources/modules/chipsec.utilcmd.vmem_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.vmem_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.vmem\_cmd module +vmem\_cmd module ================================ .. automodule:: chipsec.utilcmd.vmem_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_sources/modules/chipsec.utilcmd.vmm_cmd.rst.txt b/_sources/modules/chipsec.utilcmd.vmm_cmd.rst.txt index 6e14360f..4512196e 100644 --- a/_sources/modules/chipsec.utilcmd.vmm_cmd.rst.txt +++ b/_sources/modules/chipsec.utilcmd.vmm_cmd.rst.txt @@ -1,7 +1,7 @@ -chipsec.utilcmd.vmm\_cmd module +vmm\_cmd module =============================== .. automodule:: chipsec.utilcmd.vmm_cmd - :members: - :undoc-members: - :show-inheritance: + + + diff --git a/_static/basic.css b/_static/basic.css index d3a260c0..11dc1139 100644 --- a/_static/basic.css +++ b/_static/basic.css @@ -4,7 +4,7 @@ * * Sphinx stylesheet -- basic theme. * - * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ @@ -237,14 +237,8 @@ a.headerlink { visibility: hidden; } -a.brackets:before, -span.brackets > a:before{ - content: "["; -} - -a.brackets:after, -span.brackets > a:after { - content: "]"; +a:visited { + color: #551A8B; } h1:hover > a.headerlink, @@ -335,12 +329,16 @@ p.sidebar-title { font-weight: bold; } +nav.contents, +aside.topic, div.admonition, div.topic, blockquote { clear: left; } /* -- topics ---------------------------------------------------------------- */ +nav.contents, +aside.topic, div.topic { border: 1px solid #ccc; padding: 7px; @@ -379,6 +377,8 @@ div.body p.centered { div.sidebar > :last-child, aside.sidebar > :last-child, +nav.contents > :last-child, +aside.topic > :last-child, div.topic > :last-child, div.admonition > :last-child { margin-bottom: 0; @@ -386,6 +386,8 @@ div.admonition > :last-child { div.sidebar::after, aside.sidebar::after, +nav.contents::after, +aside.topic::after, div.topic::after, div.admonition::after, blockquote::after { @@ -428,10 +430,6 @@ table.docutils td, table.docutils th { border-bottom: 1px solid #aaa; } -table.footnote td, table.footnote th { - border: 0 !important; -} - th { text-align: left; padding-right: 5px; @@ -615,19 +613,26 @@ ul.simple p { margin-bottom: 0; } -dl.footnote > dt, -dl.citation > dt { +aside.footnote > span, +div.citation > span { float: left; - margin-right: 0.5em; } - -dl.footnote > dd, -dl.citation > dd { +aside.footnote > span:last-of-type, +div.citation > span:last-of-type { + padding-right: 0.5em; +} +aside.footnote > p { + margin-left: 2em; +} +div.citation > p { + margin-left: 4em; +} +aside.footnote > p:last-of-type, +div.citation > p:last-of-type { margin-bottom: 0em; } - -dl.footnote > dd:after, -dl.citation > dd:after { +aside.footnote > p:last-of-type:after, +div.citation > p:last-of-type:after { content: ""; clear: both; } @@ -644,10 +649,6 @@ dl.field-list > dt { padding-right: 5px; } -dl.field-list > dt:after { - content: ":"; -} - dl.field-list > dd { padding-left: 0.5em; margin-top: 0em; @@ -673,6 +674,16 @@ dd { margin-left: 30px; } +.sig dd { + margin-top: 0px; + margin-bottom: 0px; +} + +.sig dl { + margin-top: 0px; + margin-bottom: 0px; +} + dl > dd:last-child, dl > dd:last-child > :last-child { margin-bottom: 0; @@ -741,6 +752,14 @@ abbr, acronym { cursor: help; } +.translated { + background-color: rgba(207, 255, 207, 0.2) +} + +.untranslated { + background-color: rgba(255, 207, 207, 0.2) +} + /* -- code displays --------------------------------------------------------- */ pre { diff --git a/_static/classic.css b/_static/classic.css index bef7a2a2..fe226db0 100644 --- a/_static/classic.css +++ b/_static/classic.css @@ -4,7 +4,7 @@ * * Sphinx stylesheet -- classic theme. * - * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ @@ -28,6 +28,7 @@ body { } div.document { + display: flex; background-color: #41728A; } @@ -205,6 +206,8 @@ div.seealso { border: 1px solid #ff6; } +nav.contents, +aside.topic, div.topic { background-color: #eee; } diff --git a/_static/doctools.js b/_static/doctools.js index e509e483..d06a71d7 100644 --- a/_static/doctools.js +++ b/_static/doctools.js @@ -2,325 +2,155 @@ * doctools.js * ~~~~~~~~~~~ * - * Sphinx JavaScript utilities for all documentation. + * Base JavaScript utilities for all Sphinx HTML documentation. * - * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ - -/** - * select a different prefix for underscore - */ -$u = _.noConflict(); - -/** - * make the code below compatible with browsers without - * an installed firebug like debugger -if (!window.console || !console.firebug) { - var names = ["log", "debug", "info", "warn", "error", "assert", "dir", - "dirxml", "group", "groupEnd", "time", "timeEnd", "count", "trace", - "profile", "profileEnd"]; - window.console = {}; - for (var i = 0; i < names.length; ++i) - window.console[names[i]] = function() {}; -} - */ - -/** - * small helper function to urldecode strings - * - * See https://developer.mozilla.org/en-US/docs/Web/JavaScript/Reference/Global_Objects/decodeURIComponent#Decoding_query_parameters_from_a_URL - */ -jQuery.urldecode = function(x) { - if (!x) { - return x - } - return decodeURIComponent(x.replace(/\+/g, ' ')); -}; - -/** - * small helper function to urlencode strings - */ -jQuery.urlencode = encodeURIComponent; - -/** - * This function returns the parsed url parameters of the - * current request. Multiple values per key are supported, - * it will always return arrays of strings for the value parts. - */ -jQuery.getQueryParameters = function(s) { - if (typeof s === 'undefined') - s = document.location.search; - var parts = s.substr(s.indexOf('?') + 1).split('&'); - var result = {}; - for (var i = 0; i < parts.length; i++) { - var tmp = parts[i].split('=', 2); - var key = jQuery.urldecode(tmp[0]); - var value = jQuery.urldecode(tmp[1]); - if (key in result) - result[key].push(value); - else - result[key] = [value]; +"use strict"; + +const BLACKLISTED_KEY_CONTROL_ELEMENTS = new Set([ + "TEXTAREA", + "INPUT", + "SELECT", + "BUTTON", +]); + +const _ready = (callback) => { + if (document.readyState !== "loading") { + callback(); + } else { + document.addEventListener("DOMContentLoaded", callback); } - return result; }; -/** - * highlight a given string on a jquery object by wrapping it in - * span elements with the given class name. - */ -jQuery.fn.highlightText = function(text, className) { - function highlight(node, addItems) { - if (node.nodeType === 3) { - var val = node.nodeValue; - var pos = val.toLowerCase().indexOf(text); - if (pos >= 0 && - !jQuery(node.parentNode).hasClass(className) && - !jQuery(node.parentNode).hasClass("nohighlight")) { - var span; - var isInSVG = jQuery(node).closest("body, svg, foreignObject").is("svg"); - if (isInSVG) { - span = document.createElementNS("http://www.w3.org/2000/svg", "tspan"); - } else { - span = document.createElement("span"); - span.className = className; - } - span.appendChild(document.createTextNode(val.substr(pos, text.length))); - node.parentNode.insertBefore(span, node.parentNode.insertBefore( - document.createTextNode(val.substr(pos + text.length)), - node.nextSibling)); - node.nodeValue = val.substr(0, pos); - if (isInSVG) { - var rect = document.createElementNS("http://www.w3.org/2000/svg", "rect"); - var bbox = node.parentElement.getBBox(); - rect.x.baseVal.value = bbox.x; - rect.y.baseVal.value = bbox.y; - rect.width.baseVal.value = bbox.width; - rect.height.baseVal.value = bbox.height; - rect.setAttribute('class', className); - addItems.push({ - "parent": node.parentNode, - "target": rect}); - } - } - } - else if (!jQuery(node).is("button, select, textarea")) { - jQuery.each(node.childNodes, function() { - highlight(this, addItems); - }); - } - } - var addItems = []; - var result = this.each(function() { - highlight(this, addItems); - }); - for (var i = 0; i < addItems.length; ++i) { - jQuery(addItems[i].parent).before(addItems[i].target); - } - return result; -}; - -/* - * backward compatibility for jQuery.browser - * This will be supported until firefox bug is fixed. - */ -if (!jQuery.browser) { - jQuery.uaMatch = function(ua) { - ua = ua.toLowerCase(); - - var match = /(chrome)[ \/]([\w.]+)/.exec(ua) || - /(webkit)[ \/]([\w.]+)/.exec(ua) || - /(opera)(?:.*version|)[ \/]([\w.]+)/.exec(ua) || - /(msie) ([\w.]+)/.exec(ua) || - ua.indexOf("compatible") < 0 && /(mozilla)(?:.*? rv:([\w.]+)|)/.exec(ua) || - []; - - return { - browser: match[ 1 ] || "", - version: match[ 2 ] || "0" - }; - }; - jQuery.browser = {}; - jQuery.browser[jQuery.uaMatch(navigator.userAgent).browser] = true; -} - /** * Small JavaScript module for the documentation. */ -var Documentation = { - - init : function() { - this.fixFirefoxAnchorBug(); - this.highlightSearchWords(); - this.initIndexTable(); - if (DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) { - this.initOnKeyListeners(); - } +const Documentation = { + init: () => { + Documentation.initDomainIndexTable(); + Documentation.initOnKeyListeners(); }, /** * i18n support */ - TRANSLATIONS : {}, - PLURAL_EXPR : function(n) { return n === 1 ? 0 : 1; }, - LOCALE : 'unknown', + TRANSLATIONS: {}, + PLURAL_EXPR: (n) => (n === 1 ? 0 : 1), + LOCALE: "unknown", // gettext and ngettext don't access this so that the functions // can safely bound to a different name (_ = Documentation.gettext) - gettext : function(string) { - var translated = Documentation.TRANSLATIONS[string]; - if (typeof translated === 'undefined') - return string; - return (typeof translated === 'string') ? translated : translated[0]; + gettext: (string) => { + const translated = Documentation.TRANSLATIONS[string]; + switch (typeof translated) { + case "undefined": + return string; // no translation + case "string": + return translated; // translation exists + default: + return translated[0]; // (singular, plural) translation tuple exists + } }, - ngettext : function(singular, plural, n) { - var translated = Documentation.TRANSLATIONS[singular]; - if (typeof translated === 'undefined') - return (n == 1) ? singular : plural; - return translated[Documentation.PLURALEXPR(n)]; + ngettext: (singular, plural, n) => { + const translated = Documentation.TRANSLATIONS[singular]; + if (typeof translated !== "undefined") + return translated[Documentation.PLURAL_EXPR(n)]; + return n === 1 ? singular : plural; }, - addTranslations : function(catalog) { - for (var key in catalog.messages) - this.TRANSLATIONS[key] = catalog.messages[key]; - this.PLURAL_EXPR = new Function('n', 'return +(' + catalog.plural_expr + ')'); - this.LOCALE = catalog.locale; + addTranslations: (catalog) => { + Object.assign(Documentation.TRANSLATIONS, catalog.messages); + Documentation.PLURAL_EXPR = new Function( + "n", + `return (${catalog.plural_expr})` + ); + Documentation.LOCALE = catalog.locale; }, /** - * add context elements like header anchor links + * helper function to focus on search bar */ - addContextElements : function() { - $('div[id] > :header:first').each(function() { - $('\u00B6'). - attr('href', '#' + this.id). - attr('title', _('Permalink to this headline')). - appendTo(this); - }); - $('dt[id]').each(function() { - $('\u00B6'). - attr('href', '#' + this.id). - attr('title', _('Permalink to this definition')). - appendTo(this); - }); + focusSearchBar: () => { + document.querySelectorAll("input[name=q]")[0]?.focus(); }, /** - * workaround a firefox stupidity - * see: https://bugzilla.mozilla.org/show_bug.cgi?id=645075 + * Initialise the domain index toggle buttons */ - fixFirefoxAnchorBug : function() { - if (document.location.hash && $.browser.mozilla) - window.setTimeout(function() { - document.location.href += ''; - }, 10); - }, - - /** - * highlight the search words provided in the url in the text - */ - highlightSearchWords : function() { - var params = $.getQueryParameters(); - var terms = (params.highlight) ? params.highlight[0].split(/\s+/) : []; - if (terms.length) { - var body = $('div.body'); - if (!body.length) { - body = $('body'); + initDomainIndexTable: () => { + const toggler = (el) => { + const idNumber = el.id.substr(7); + const toggledRows = document.querySelectorAll(`tr.cg-${idNumber}`); + if (el.src.substr(-9) === "minus.png") { + el.src = `${el.src.substr(0, el.src.length - 9)}plus.png`; + toggledRows.forEach((el) => (el.style.display = "none")); + } else { + el.src = `${el.src.substr(0, el.src.length - 8)}minus.png`; + toggledRows.forEach((el) => (el.style.display = "")); } - window.setTimeout(function() { - $.each(terms, function() { - body.highlightText(this.toLowerCase(), 'highlighted'); - }); - }, 10); - $('

' + _('Hide Search Matches') + '

') - .appendTo($('#searchbox')); - } - }, - - /** - * init the domain index toggle buttons - */ - initIndexTable : function() { - var togglers = $('img.toggler').click(function() { - var src = $(this).attr('src'); - var idnum = $(this).attr('id').substr(7); - $('tr.cg-' + idnum).toggle(); - if (src.substr(-9) === 'minus.png') - $(this).attr('src', src.substr(0, src.length-9) + 'plus.png'); - else - $(this).attr('src', src.substr(0, src.length-8) + 'minus.png'); - }).css('display', ''); - if (DOCUMENTATION_OPTIONS.COLLAPSE_INDEX) { - togglers.click(); - } - }, + }; - /** - * helper function to hide the search marks again - */ - hideSearchWords : function() { - $('#searchbox .highlight-link').fadeOut(300); - $('span.highlighted').removeClass('highlighted'); - var url = new URL(window.location); - url.searchParams.delete('highlight'); - window.history.replaceState({}, '', url); + const togglerElements = document.querySelectorAll("img.toggler"); + togglerElements.forEach((el) => + el.addEventListener("click", (event) => toggler(event.currentTarget)) + ); + togglerElements.forEach((el) => (el.style.display = "")); + if (DOCUMENTATION_OPTIONS.COLLAPSE_INDEX) togglerElements.forEach(toggler); }, - /** - * make the url absolute - */ - makeURL : function(relativeURL) { - return DOCUMENTATION_OPTIONS.URL_ROOT + '/' + relativeURL; - }, - - /** - * get the current relative url - */ - getCurrentURL : function() { - var path = document.location.pathname; - var parts = path.split(/\//); - $.each(DOCUMENTATION_OPTIONS.URL_ROOT.split(/\//), function() { - if (this === '..') - parts.pop(); - }); - var url = parts.join('/'); - return path.substring(url.lastIndexOf('/') + 1, path.length - 1); - }, - - initOnKeyListeners: function() { - $(document).keydown(function(event) { - var activeElementType = document.activeElement.tagName; - // don't navigate when in search box, textarea, dropdown or button - if (activeElementType !== 'TEXTAREA' && activeElementType !== 'INPUT' && activeElementType !== 'SELECT' - && activeElementType !== 'BUTTON' && !event.altKey && !event.ctrlKey && !event.metaKey - && !event.shiftKey) { - switch (event.keyCode) { - case 37: // left - var prevHref = $('link[rel="prev"]').prop('href'); - if (prevHref) { - window.location.href = prevHref; - return false; + initOnKeyListeners: () => { + // only install a listener if it is really needed + if ( + !DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS && + !DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS + ) + return; + + document.addEventListener("keydown", (event) => { + // bail for input elements + if (BLACKLISTED_KEY_CONTROL_ELEMENTS.has(document.activeElement.tagName)) return; + // bail with special keys + if (event.altKey || event.ctrlKey || event.metaKey) return; + + if (!event.shiftKey) { + switch (event.key) { + case "ArrowLeft": + if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) break; + + const prevLink = document.querySelector('link[rel="prev"]'); + if (prevLink && prevLink.href) { + window.location.href = prevLink.href; + event.preventDefault(); } break; - case 39: // right - var nextHref = $('link[rel="next"]').prop('href'); - if (nextHref) { - window.location.href = nextHref; - return false; + case "ArrowRight": + if (!DOCUMENTATION_OPTIONS.NAVIGATION_WITH_KEYS) break; + + const nextLink = document.querySelector('link[rel="next"]'); + if (nextLink && nextLink.href) { + window.location.href = nextLink.href; + event.preventDefault(); } break; } } + + // some keyboard layouts may need Shift to get / + switch (event.key) { + case "/": + if (!DOCUMENTATION_OPTIONS.ENABLE_SEARCH_SHORTCUTS) break; + Documentation.focusSearchBar(); + event.preventDefault(); + } }); - } + }, }; // quick alias for translations -_ = Documentation.gettext; +const _ = Documentation.gettext; -$(document).ready(function() { - Documentation.init(); -}); +_ready(Documentation.init); diff --git a/_static/documentation_options.js b/_static/documentation_options.js index 2fa8c97f..7e4c114f 100644 --- a/_static/documentation_options.js +++ b/_static/documentation_options.js @@ -1,12 +1,13 @@ -var DOCUMENTATION_OPTIONS = { - URL_ROOT: document.getElementById("documentation_options").getAttribute('data-url_root'), +const DOCUMENTATION_OPTIONS = { VERSION: '', - LANGUAGE: 'None', + LANGUAGE: 'en', COLLAPSE_INDEX: false, BUILDER: 'html', FILE_SUFFIX: '.html', LINK_SUFFIX: '.html', HAS_SOURCE: true, SOURCELINK_SUFFIX: '.txt', - NAVIGATION_WITH_KEYS: false + NAVIGATION_WITH_KEYS: false, + SHOW_SEARCH_SUMMARY: true, + ENABLE_SEARCH_SHORTCUTS: true, }; \ No newline at end of file diff --git a/_static/language_data.js b/_static/language_data.js index ebe2f03b..250f5665 100644 --- a/_static/language_data.js +++ b/_static/language_data.js @@ -5,12 +5,12 @@ * This script contains the language-specific data used by searchtools.js, * namely the list of stopwords, stemmer, scorer and splitter. * - * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ -var stopwords = ["a","and","are","as","at","be","but","by","for","if","in","into","is","it","near","no","not","of","on","or","such","that","the","their","then","there","these","they","this","to","was","will","with"]; +var stopwords = ["a", "and", "are", "as", "at", "be", "but", "by", "for", "if", "in", "into", "is", "it", "near", "no", "not", "of", "on", "or", "such", "that", "the", "their", "then", "there", "these", "they", "this", "to", "was", "will", "with"]; /* Non-minified version is copied as a separate JS file, is available */ @@ -197,101 +197,3 @@ var Stemmer = function() { } } - - - -var splitChars = (function() { - var result = {}; - var singles = [96, 180, 187, 191, 215, 247, 749, 885, 903, 907, 909, 930, 1014, 1648, - 1748, 1809, 2416, 2473, 2481, 2526, 2601, 2609, 2612, 2615, 2653, 2702, - 2706, 2729, 2737, 2740, 2857, 2865, 2868, 2910, 2928, 2948, 2961, 2971, - 2973, 3085, 3089, 3113, 3124, 3213, 3217, 3241, 3252, 3295, 3341, 3345, - 3369, 3506, 3516, 3633, 3715, 3721, 3736, 3744, 3748, 3750, 3756, 3761, - 3781, 3912, 4239, 4347, 4681, 4695, 4697, 4745, 4785, 4799, 4801, 4823, - 4881, 5760, 5901, 5997, 6313, 7405, 8024, 8026, 8028, 8030, 8117, 8125, - 8133, 8181, 8468, 8485, 8487, 8489, 8494, 8527, 11311, 11359, 11687, 11695, - 11703, 11711, 11719, 11727, 11735, 12448, 12539, 43010, 43014, 43019, 43587, - 43696, 43713, 64286, 64297, 64311, 64317, 64319, 64322, 64325, 65141]; - var i, j, start, end; - for (i = 0; i < singles.length; i++) { - result[singles[i]] = true; - } - var ranges = [[0, 47], [58, 64], [91, 94], [123, 169], [171, 177], [182, 184], [706, 709], - [722, 735], [741, 747], [751, 879], [888, 889], [894, 901], [1154, 1161], - [1318, 1328], [1367, 1368], [1370, 1376], [1416, 1487], [1515, 1519], [1523, 1568], - [1611, 1631], [1642, 1645], [1750, 1764], [1767, 1773], [1789, 1790], [1792, 1807], - [1840, 1868], [1958, 1968], [1970, 1983], [2027, 2035], [2038, 2041], [2043, 2047], - [2070, 2073], [2075, 2083], [2085, 2087], [2089, 2307], [2362, 2364], [2366, 2383], - [2385, 2391], [2402, 2405], [2419, 2424], [2432, 2436], [2445, 2446], [2449, 2450], - [2483, 2485], [2490, 2492], [2494, 2509], [2511, 2523], [2530, 2533], [2546, 2547], - [2554, 2564], [2571, 2574], [2577, 2578], [2618, 2648], [2655, 2661], [2672, 2673], - [2677, 2692], [2746, 2748], [2750, 2767], [2769, 2783], [2786, 2789], [2800, 2820], - [2829, 2830], [2833, 2834], [2874, 2876], [2878, 2907], [2914, 2917], [2930, 2946], - [2955, 2957], [2966, 2968], [2976, 2978], [2981, 2983], [2987, 2989], [3002, 3023], - [3025, 3045], [3059, 3076], [3130, 3132], [3134, 3159], [3162, 3167], [3170, 3173], - [3184, 3191], [3199, 3204], [3258, 3260], [3262, 3293], [3298, 3301], [3312, 3332], - [3386, 3388], [3390, 3423], [3426, 3429], [3446, 3449], [3456, 3460], [3479, 3481], - [3518, 3519], [3527, 3584], [3636, 3647], [3655, 3663], [3674, 3712], [3717, 3718], - [3723, 3724], [3726, 3731], [3752, 3753], [3764, 3772], [3774, 3775], [3783, 3791], - [3802, 3803], [3806, 3839], [3841, 3871], [3892, 3903], [3949, 3975], [3980, 4095], - [4139, 4158], [4170, 4175], [4182, 4185], [4190, 4192], [4194, 4196], [4199, 4205], - [4209, 4212], [4226, 4237], [4250, 4255], [4294, 4303], [4349, 4351], [4686, 4687], - [4702, 4703], [4750, 4751], [4790, 4791], [4806, 4807], [4886, 4887], [4955, 4968], - [4989, 4991], [5008, 5023], [5109, 5120], [5741, 5742], [5787, 5791], [5867, 5869], - [5873, 5887], [5906, 5919], [5938, 5951], [5970, 5983], [6001, 6015], [6068, 6102], - [6104, 6107], [6109, 6111], [6122, 6127], [6138, 6159], [6170, 6175], [6264, 6271], - [6315, 6319], [6390, 6399], [6429, 6469], [6510, 6511], [6517, 6527], [6572, 6592], - [6600, 6607], [6619, 6655], [6679, 6687], [6741, 6783], [6794, 6799], [6810, 6822], - [6824, 6916], [6964, 6980], [6988, 6991], [7002, 7042], [7073, 7085], [7098, 7167], - [7204, 7231], [7242, 7244], [7294, 7400], [7410, 7423], [7616, 7679], [7958, 7959], - [7966, 7967], [8006, 8007], [8014, 8015], [8062, 8063], [8127, 8129], [8141, 8143], - [8148, 8149], [8156, 8159], [8173, 8177], [8189, 8303], [8306, 8307], [8314, 8318], - [8330, 8335], [8341, 8449], [8451, 8454], [8456, 8457], [8470, 8472], [8478, 8483], - [8506, 8507], [8512, 8516], [8522, 8525], [8586, 9311], [9372, 9449], [9472, 10101], - [10132, 11263], [11493, 11498], [11503, 11516], [11518, 11519], [11558, 11567], - [11622, 11630], [11632, 11647], [11671, 11679], [11743, 11822], [11824, 12292], - [12296, 12320], [12330, 12336], [12342, 12343], [12349, 12352], [12439, 12444], - [12544, 12548], [12590, 12592], [12687, 12689], [12694, 12703], [12728, 12783], - [12800, 12831], [12842, 12880], [12896, 12927], [12938, 12976], [12992, 13311], - [19894, 19967], [40908, 40959], [42125, 42191], [42238, 42239], [42509, 42511], - [42540, 42559], [42592, 42593], [42607, 42622], [42648, 42655], [42736, 42774], - [42784, 42785], [42889, 42890], [42893, 43002], [43043, 43055], [43062, 43071], - [43124, 43137], [43188, 43215], [43226, 43249], [43256, 43258], [43260, 43263], - [43302, 43311], [43335, 43359], [43389, 43395], [43443, 43470], [43482, 43519], - [43561, 43583], [43596, 43599], [43610, 43615], [43639, 43641], [43643, 43647], - [43698, 43700], [43703, 43704], [43710, 43711], [43715, 43738], [43742, 43967], - [44003, 44015], [44026, 44031], [55204, 55215], [55239, 55242], [55292, 55295], - [57344, 63743], [64046, 64047], [64110, 64111], [64218, 64255], [64263, 64274], - [64280, 64284], [64434, 64466], [64830, 64847], [64912, 64913], [64968, 65007], - [65020, 65135], [65277, 65295], [65306, 65312], [65339, 65344], [65371, 65381], - [65471, 65473], [65480, 65481], [65488, 65489], [65496, 65497]]; - for (i = 0; i < ranges.length; i++) { - start = ranges[i][0]; - end = ranges[i][1]; - for (j = start; j <= end; j++) { - result[j] = true; - } - } - return result; -})(); - -function splitQuery(query) { - var result = []; - var start = -1; - for (var i = 0; i < query.length; i++) { - if (splitChars[query.charCodeAt(i)]) { - if (start !== -1) { - result.push(query.slice(start, i)); - start = -1; - } - } else if (start === -1) { - start = i; - } - } - if (start !== -1) { - result.push(query.slice(start)); - } - return result; -} - - diff --git a/_static/pygments.css b/_static/pygments.css index de7af262..0d49244e 100644 --- a/_static/pygments.css +++ b/_static/pygments.css @@ -1,7 +1,7 @@ pre { line-height: 125%; } -td.linenos pre { color: #000000; background-color: #f0f0f0; padding-left: 5px; padding-right: 5px; } -span.linenos { color: #000000; background-color: #f0f0f0; padding-left: 5px; padding-right: 5px; } -td.linenos pre.special { color: #000000; background-color: #ffffc0; padding-left: 5px; padding-right: 5px; } +td.linenos .normal { color: inherit; background-color: transparent; padding-left: 5px; padding-right: 5px; } +span.linenos { color: inherit; background-color: transparent; padding-left: 5px; padding-right: 5px; } +td.linenos .special { color: #000000; background-color: #ffffc0; padding-left: 5px; padding-right: 5px; } span.linenos.special { color: #000000; background-color: #ffffc0; padding-left: 5px; padding-right: 5px; } .highlight .hll { background-color: #ffffcc } .highlight { background: #eeffcc; } @@ -17,6 +17,7 @@ span.linenos.special { color: #000000; background-color: #ffffc0; padding-left: .highlight .cs { color: #408090; background-color: #fff0f0 } /* Comment.Special */ .highlight .gd { color: #A00000 } /* Generic.Deleted */ .highlight .ge { font-style: italic } /* Generic.Emph */ +.highlight .ges { font-weight: bold; font-style: italic } /* Generic.EmphStrong */ .highlight .gr { color: #FF0000 } /* Generic.Error */ .highlight .gh { color: #000080; font-weight: bold } /* Generic.Heading */ .highlight .gi { color: #00A000 } /* Generic.Inserted */ diff --git a/_static/searchtools.js b/_static/searchtools.js index 2d778593..7918c3fa 100644 --- a/_static/searchtools.js +++ b/_static/searchtools.js @@ -4,22 +4,24 @@ * * Sphinx JavaScript utilities for the full-text search. * - * :copyright: Copyright 2007-2022 by the Sphinx team, see AUTHORS. + * :copyright: Copyright 2007-2023 by the Sphinx team, see AUTHORS. * :license: BSD, see LICENSE for details. * */ +"use strict"; -if (!Scorer) { - /** - * Simple result scoring code. - */ +/** + * Simple result scoring code. + */ +if (typeof Scorer === "undefined") { var Scorer = { // Implement the following function to further tweak the score for each result - // The function takes a result array [filename, title, anchor, descr, score] + // The function takes a result array [docname, title, anchor, descr, score, filename] // and returns the new score. /* - score: function(result) { - return result[4]; + score: result => { + const [docname, title, anchor, descr, score, filename] = result + return score }, */ @@ -28,9 +30,11 @@ if (!Scorer) { // or matches in the last dotted part of the object name objPartialMatch: 6, // Additive scores depending on the priority of the object - objPrio: {0: 15, // used to be importantResults - 1: 5, // used to be objectResults - 2: -5}, // used to be unimportantResults + objPrio: { + 0: 15, // used to be importantResults + 1: 5, // used to be objectResults + 2: -5, // used to be unimportantResults + }, // Used when the priority is not in the mapping. objPrioDefault: 0, @@ -39,456 +43,503 @@ if (!Scorer) { partialTitle: 7, // query found in terms term: 5, - partialTerm: 2 + partialTerm: 2, }; } -if (!splitQuery) { - function splitQuery(query) { - return query.split(/\s+/); +const _removeChildren = (element) => { + while (element && element.lastChild) element.removeChild(element.lastChild); +}; + +/** + * See https://developer.mozilla.org/en-US/docs/Web/JavaScript/Guide/Regular_Expressions#escaping + */ +const _escapeRegExp = (string) => + string.replace(/[.*+\-?^${}()|[\]\\]/g, "\\$&"); // $& means the whole matched string + +const _displayItem = (item, searchTerms, highlightTerms) => { + const docBuilder = DOCUMENTATION_OPTIONS.BUILDER; + const docFileSuffix = DOCUMENTATION_OPTIONS.FILE_SUFFIX; + const docLinkSuffix = DOCUMENTATION_OPTIONS.LINK_SUFFIX; + const showSearchSummary = DOCUMENTATION_OPTIONS.SHOW_SEARCH_SUMMARY; + const contentRoot = document.documentElement.dataset.content_root; + + const [docName, title, anchor, descr, score, _filename] = item; + + let listItem = document.createElement("li"); + let requestUrl; + let linkUrl; + if (docBuilder === "dirhtml") { + // dirhtml builder + let dirname = docName + "/"; + if (dirname.match(/\/index\/$/)) + dirname = dirname.substring(0, dirname.length - 6); + else if (dirname === "index/") dirname = ""; + requestUrl = contentRoot + dirname; + linkUrl = requestUrl; + } else { + // normal html builders + requestUrl = contentRoot + docName + docFileSuffix; + linkUrl = docName + docLinkSuffix; } + let linkEl = listItem.appendChild(document.createElement("a")); + linkEl.href = linkUrl + anchor; + linkEl.dataset.score = score; + linkEl.innerHTML = title; + if (descr) { + listItem.appendChild(document.createElement("span")).innerHTML = + " (" + descr + ")"; + // highlight search terms in the description + if (SPHINX_HIGHLIGHT_ENABLED) // set in sphinx_highlight.js + highlightTerms.forEach((term) => _highlightText(listItem, term, "highlighted")); + } + else if (showSearchSummary) + fetch(requestUrl) + .then((responseData) => responseData.text()) + .then((data) => { + if (data) + listItem.appendChild( + Search.makeSearchSummary(data, searchTerms) + ); + // highlight search terms in the summary + if (SPHINX_HIGHLIGHT_ENABLED) // set in sphinx_highlight.js + highlightTerms.forEach((term) => _highlightText(listItem, term, "highlighted")); + }); + Search.output.appendChild(listItem); +}; +const _finishSearch = (resultCount) => { + Search.stopPulse(); + Search.title.innerText = _("Search Results"); + if (!resultCount) + Search.status.innerText = Documentation.gettext( + "Your search did not match any documents. Please make sure that all words are spelled correctly and that you've selected enough categories." + ); + else + Search.status.innerText = _( + `Search finished, found ${resultCount} page(s) matching the search query.` + ); +}; +const _displayNextItem = ( + results, + resultCount, + searchTerms, + highlightTerms, +) => { + // results left, load the summary and display it + // this is intended to be dynamic (don't sub resultsCount) + if (results.length) { + _displayItem(results.pop(), searchTerms, highlightTerms); + setTimeout( + () => _displayNextItem(results, resultCount, searchTerms, highlightTerms), + 5 + ); + } + // search finished, update title and status message + else _finishSearch(resultCount); +}; + +/** + * Default splitQuery function. Can be overridden in ``sphinx.search`` with a + * custom function per language. + * + * The regular expression works by splitting the string on consecutive characters + * that are not Unicode letters, numbers, underscores, or emoji characters. + * This is the same as ``\W+`` in Python, preserving the surrogate pair area. + */ +if (typeof splitQuery === "undefined") { + var splitQuery = (query) => query + .split(/[^\p{Letter}\p{Number}_\p{Emoji_Presentation}]+/gu) + .filter(term => term) // remove remaining empty strings } /** * Search Module */ -var Search = { - - _index : null, - _queued_query : null, - _pulse_status : -1, - - htmlToText : function(htmlString) { - var virtualDocument = document.implementation.createHTMLDocument('virtual'); - var htmlElement = $(htmlString, virtualDocument); - htmlElement.find('.headerlink').remove(); - docContent = htmlElement.find('[role=main]')[0]; - if(docContent === undefined) { - console.warn("Content block not found. Sphinx search tries to obtain it " + - "via '[role=main]'. Could you check your theme or template."); - return ""; - } - return docContent.textContent || docContent.innerText; +const Search = { + _index: null, + _queued_query: null, + _pulse_status: -1, + + htmlToText: (htmlString) => { + const htmlElement = new DOMParser().parseFromString(htmlString, 'text/html'); + htmlElement.querySelectorAll(".headerlink").forEach((el) => { el.remove() }); + const docContent = htmlElement.querySelector('[role="main"]'); + if (docContent !== undefined) return docContent.textContent; + console.warn( + "Content block not found. Sphinx search tries to obtain it via '[role=main]'. Could you check your theme or template." + ); + return ""; }, - init : function() { - var params = $.getQueryParameters(); - if (params.q) { - var query = params.q[0]; - $('input[name="q"]')[0].value = query; - this.performSearch(query); - } + init: () => { + const query = new URLSearchParams(window.location.search).get("q"); + document + .querySelectorAll('input[name="q"]') + .forEach((el) => (el.value = query)); + if (query) Search.performSearch(query); }, - loadIndex : function(url) { - $.ajax({type: "GET", url: url, data: null, - dataType: "script", cache: true, - complete: function(jqxhr, textstatus) { - if (textstatus != "success") { - document.getElementById("searchindexloader").src = url; - } - }}); - }, + loadIndex: (url) => + (document.body.appendChild(document.createElement("script")).src = url), - setIndex : function(index) { - var q; - this._index = index; - if ((q = this._queued_query) !== null) { - this._queued_query = null; - Search.query(q); + setIndex: (index) => { + Search._index = index; + if (Search._queued_query !== null) { + const query = Search._queued_query; + Search._queued_query = null; + Search.query(query); } }, - hasIndex : function() { - return this._index !== null; - }, + hasIndex: () => Search._index !== null, - deferQuery : function(query) { - this._queued_query = query; - }, + deferQuery: (query) => (Search._queued_query = query), - stopPulse : function() { - this._pulse_status = 0; - }, + stopPulse: () => (Search._pulse_status = -1), - startPulse : function() { - if (this._pulse_status >= 0) - return; - function pulse() { - var i; + startPulse: () => { + if (Search._pulse_status >= 0) return; + + const pulse = () => { Search._pulse_status = (Search._pulse_status + 1) % 4; - var dotString = ''; - for (i = 0; i < Search._pulse_status; i++) - dotString += '.'; - Search.dots.text(dotString); - if (Search._pulse_status > -1) - window.setTimeout(pulse, 500); - } + Search.dots.innerText = ".".repeat(Search._pulse_status); + if (Search._pulse_status >= 0) window.setTimeout(pulse, 500); + }; pulse(); }, /** * perform a search for something (or wait until index is loaded) */ - performSearch : function(query) { + performSearch: (query) => { // create the required interface elements - this.out = $('#search-results'); - this.title = $('

' + _('Searching') + '

').appendTo(this.out); - this.dots = $('').appendTo(this.title); - this.status = $('

 

').appendTo(this.out); - this.output = $(' \ No newline at end of file diff --git a/index.html b/index.html index 106188e2..df39f7e5 100644 --- a/index.html +++ b/index.html @@ -1,20 +1,19 @@ - - + - - CHIPSEC — CHIPSEC documentation - - + + + CHIPSEC 1.13.0 — CHIPSEC documentation + + - - - - + + + - + @@ -32,7 +31,7 @@

Navigation

next |
  • CHIPSEC documentation »
    • -
  • CHIPSEC
    • +
  • CHIPSEC 1.13.0
    • @@ -41,8 +40,8 @@

    Navigation

    -
    -

    CHIPSEC

    +
    +

    CHIPSEC 1.13.0

    CHIPSEC is a framework for analyzing platform level security of hardware, devices, system firmware, low-level protection mechanisms, and the configuration of various platform components.

    @@ -77,8 +76,8 @@

    CHIPSECDownload CHIPSEC

    -
    -

    Installation

    +
    +

    Installation

    CHIPSEC supports Windows, Linux, Mac OS X, DAL and UEFI shell. Circumstances surrounding the target platform may change which of these environments is most appropriate.

    @@ -91,9 +90,9 @@

    CHIPSECBuilding a Bootable USB drive with UEFI Shell (x64)

    -
    -
    -

    Using CHIPSEC

    + +
    +

    Using CHIPSEC

    CHIPSEC should be launched as Administrator/root

    CHIPSEC will automatically attempt to create and start its service, including load its kernel-mode driver. If CHIPSEC service is already @@ -107,9 +106,9 @@

    Using CHIPSECRunning CHIPSEC

    -
    -
    -

    Module & Command Development

    + +
    +

    Module & Command Development

    Architecture and Modules

    -
    -
    -

    Contribution and Style Guides

    + +
    +

    Contribution and Style Guides

    Contribution Guide

    -
    - + +
    @@ -203,7 +202,7 @@

    Quick search

    - +
    @@ -221,12 +220,12 @@

    Navigation

    next |
  • CHIPSEC documentation »
    • -
  • CHIPSEC
    • +
  • CHIPSEC 1.13.0
    • \ No newline at end of file diff --git a/installation/InstallLinux.html b/installation/InstallLinux.html index a570b421..03c183a5 100644 --- a/installation/InstallLinux.html +++ b/installation/InstallLinux.html @@ -1,20 +1,19 @@ - - + - + + Linux Installation — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,8 +44,8 @@

    Navigation

    -
    -

    Linux Installation

    +
    +

    Linux Installation

    Tested on:
    -
    -

    Prerequisites

    + +
    +

    Prerequisites

    Python 3.7 or higher (https://www.python.org/downloads/)

    Note

    @@ -94,9 +93,9 @@

    Prerequisitespip install -r linux_requirements.txt

    -
    -
    -

    Installing CHIPSEC

    + +
    +

    Installing CHIPSEC

    Get latest CHIPSEC release from PyPI repository

    pip install chipsec

    @@ -115,19 +114,19 @@

    Installing CHIPSECgit clone https://github.com/chipsec/chipsec.git

    -
    -
    -

    Building CHIPSEC

    + +
    +

    Building CHIPSEC

    Build the Driver and Compression Tools

    python setup.py build_ext -i

    -
    -
    -

    Run CHIPSEC

    + +
    +

    Run CHIPSEC

    Follow steps in section “Using as a Python package” of Running CHIPSEC

    -
    -
    + +
    @@ -197,7 +196,7 @@

    Quick search

    - +
    @@ -222,8 +221,8 @@

    Navigation

    \ No newline at end of file diff --git a/installation/InstallWinDAL.html b/installation/InstallWinDAL.html index 6246f69d..48ca6191 100644 --- a/installation/InstallWinDAL.html +++ b/installation/InstallWinDAL.html @@ -1,20 +1,19 @@ - - + - + + DAL Windows Installation — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,10 +44,10 @@

    Navigation

    -
    -

    DAL Windows Installation

    -
    -

    Prerequisites

    +
    +

    DAL Windows Installation

    +
    +

    Prerequisites

    Python 3.7 or higher (https://www.python.org/downloads/)

    Note

    @@ -57,15 +56,15 @@

    Prerequisiteshttps://pypi.org/project/pywin32/#files)

    Intel System Studio: (https://software.intel.com/en-us/system-studio)

    git: open source distributed version control system (https://git-scm.com/)

    -

    -
    -

    Building

    +
    +
    +

    Building

    Clone CHIPSEC source

    git clone https://github.com/chipsec/chipsec.git

    -
    -
    + +
    @@ -135,7 +134,7 @@

    Quick search

    - +
    @@ -160,8 +159,8 @@

    Navigation

    \ No newline at end of file diff --git a/installation/InstallWindows.html b/installation/InstallWindows.html index fe031ee3..aa820325 100644 --- a/installation/InstallWindows.html +++ b/installation/InstallWindows.html @@ -1,20 +1,19 @@ - - + - + + Windows Installation — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,8 +44,8 @@

    Navigation

    -
    -

    Windows Installation

    +
    +

    Windows Installation

    CHIPSEC supports the following versions:
    Windows 8, 8.1, 10, 11 - x86 and AMD64
    @@ -56,8 +55,8 @@

    Windows InstallationNote

    CHIPSEC has removed support for the RWEverything (https://rweverything.com/) driver due to PCI configuration space access issues.

    -
    -

    Install CHIPSEC Dependencies

    +
    +

    Install CHIPSEC Dependencies

    Python 3.7 or higher (https://www.python.org/downloads/)

    Note

    @@ -88,9 +87,9 @@

    Install CHIPSEC Dependenciesgit: open source distributed version control system

    -
    -
    -

    Building

    +
    +
    +

    Building

    Clone CHIPSEC source

    git clone https://github.com/chipsec/chipsec.git

    @@ -104,9 +103,9 @@

    Building -

    Turn off kernel driver signature checks

    +

    +
    +

    Turn off kernel driver signature checks

    Enable boot menu

    In CMD shell:

    @@ -155,9 +154,9 @@

    Turn off kernel driver signature checks -

    Alternate Build Methods

    +

    +
    +

    Alternate Build Methods

    Build CHIPSEC kernel driver with Visual Studio

    Method 1:

    @@ -209,9 +208,9 @@

    Alternate Build Methods

    sc stop chipsec sc delete chipsec

    -
    -
    -

    Windows PCI Filter Driver

    + +
    +

    Windows PCI Filter Driver

    Filter driver background

    Since July 31, 2020 Microsoft has released Windows 2020-KB4568831 (OS Build 19041.423) Preview. Microsoft recommends to not access the PCI configuration space using the legacy API, as it might result in the Windows BSOD (Blue Screen of Death). The BSOD trigger condition is “Windows version >= (OS Build 19041.423) && Secure Devices (SDEV) ACPI table && VBS enabled”. Therefore, CHIPSEC now includes a PCI filter driver which supplements the original CHIPSEC Windows Driver to access the PCI configuration space. A system requires the PCI Filter Driver if the conditions above are met.

    Windows devices that receive the 2020-KB4568831 (OS Build 19041.423) Preview or later updates restrict how processes @@ -225,88 +224,94 @@

    Windows PCI Filter Driverhttps://learn.microsoft.com/en-us/troubleshoot/windows-client/performance/stop-error-lenovo-thinkpad-kb4568831-uefi

    Filter Driver and Main Helper Driver Architecture

    -
    +
    CHIPSEC Main & Filter Drvier Architecture -

    CHIPSEC Main & Filter Drvier Architecture

    -
    -

    -
    -

    Install PCI Filter Driver

    +
    +

    CHIPSEC Main & Filter Drvier Architecture

    +
    + + +
    +

    Install PCI Filter Driver

    Locate the Filter Driver Files: chipsec/helper/windows/windows_amd64/

    -
    +
    Check The Filter Drvier Files -
    +

    Update The PCI Device Driver From Device Manager

    -
    +
    Update The PCI Device Driver -
    +

    Browse The PCI Filter Driver

    -
    +
    Browse The PCI Filter Driver -
    +

    Manually Select The PCI Bus Filter Driver

    -
    +
    Pickup The PCI Filter Driver -
    +

    Install The Filter Driver From Disk

    -
    +
    Install The Filter Driver From Disk -
    +

    Installing The Filter Driver

    -
    +
    Installing The Filter Driver -
    +

    Finish The Filter Driver Installing

    -
    +
    Finish The Filter Driver Installing -
    +

    Restart Computer

    -
    +
    Restart Computer -
    +

    Check The Installed Device Driver From Device Manager

    -
    +
    Check The Installed Device Driver -
    +

    Check The Driver Device Info

    -
    +
    Check The Driver Device Info -
    +
    -
    -
    -

    Filter Driver Access PCI Config Space Test

    + +
    +

    Filter Driver Access PCI Config Space Test

    Dump PCI Config Test

    -
    +
    Dump PCI Config -

    py chipsec_util.py pci dump 0 0 0

    -
    +
    +

    py chipsec_util.py pci dump 0 0 0

    +
    +
    -
    PCI Enumeration Test
    +
    PCI Enumeration Test
    PCI Enumeration Test -

    py chipsec_util.py pci enumerate

    -
    +
    +

    py chipsec_util.py pci enumerate

    +
    + -
    - + +
    @@ -376,7 +381,7 @@

    Quick search

    - +
    @@ -401,8 +406,8 @@

    Navigation

    \ No newline at end of file diff --git a/installation/USBwithUEFIShell.html b/installation/USBwithUEFIShell.html index dc52b4c2..18a3cdbb 100644 --- a/installation/USBwithUEFIShell.html +++ b/installation/USBwithUEFIShell.html @@ -1,20 +1,19 @@ - - + - + + Building a Bootable USB drive with UEFI Shell (x64) — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,8 +44,8 @@

    Navigation

    -
    -

    Building a Bootable USB drive with UEFI Shell (x64)

    +
    +

    Building a Bootable USB drive with UEFI Shell (x64)

    1. Format your media as FAT32

    2. Create the following directory structure in the root of the new media

      @@ -62,8 +61,8 @@

      Building a Bootable USB drive with UEFI Shell (x64)

      Rename the UEFI shell file to Bootx64.efi

    3. Copy the UEFI shell (now Bootx64.efi) to the /efi/boot directory

    -
    -

    Installing CHIPSEC

    +
    +

    Installing CHIPSEC

    1. Extract the contents of __install__/UEFI/chipsec_py368_uefi_x64.zip to the USB drive, as appropriate.

    +
    +

    Run CHIPSEC in UEFI Shell

    fs0:

    cd chipsec

    python.efi chipsec_main.py or python.efi chipsec_util.py

    Next follow steps in section “Basic Usage” of Running CHIPSEC

    -
    -
    -

    Building UEFI Python 3.6.8 (optional)

    +
    +
    +

    Building UEFI Python 3.6.8 (optional)

    1. Start with Py368Readme.txt

      @@ -152,8 +151,8 @@

      Building UEFI Python 3.6.8 (optional)

    @@ -223,7 +222,7 @@

    Quick search

    - +
    @@ -248,8 +247,8 @@

    Navigation

     \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.adl.xml.html b/modules/chipsec.cfg.8086.adl.xml.html new file mode 100644 index 00000000..a2e34bf2 --- /dev/null +++ b/modules/chipsec.cfg.8086.adl.xml.html @@ -0,0 +1,167 @@ + + + + + + + + adl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    adl

    +

    Path: chipsec\cfg\8086\adl.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021-2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.apl.xml.html b/modules/chipsec.cfg.8086.apl.xml.html new file mode 100644 index 00000000..7dc4706d --- /dev/null +++ b/modules/chipsec.cfg.8086.apl.xml.html @@ -0,0 +1,155 @@ + + + + + + + + apl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    apl

    +

    Path: chipsec\cfg\8086\apl.xml

    +

    XML configuration for Apollo Lake based SoCs +document id 334818/334819

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.avn.xml.html b/modules/chipsec.cfg.8086.avn.xml.html new file mode 100644 index 00000000..46e0249b --- /dev/null +++ b/modules/chipsec.cfg.8086.avn.xml.html @@ -0,0 +1,158 @@ + + + + + + + + avn — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    avn

    +

    Path: chipsec\cfg\8086\avn.xml

    +

    XML configuration for Avoton based platforms

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.bdw.xml.html b/modules/chipsec.cfg.8086.bdw.xml.html new file mode 100644 index 00000000..83f1ef4c --- /dev/null +++ b/modules/chipsec.cfg.8086.bdw.xml.html @@ -0,0 +1,154 @@ + + + + + + + + bdw — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    bdw

    +

    Path: chipsec\cfg\8086\bdw.xml

    +

    XML configuration for Broadwell based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.bdx.xml.html b/modules/chipsec.cfg.8086.bdx.xml.html new file mode 100644 index 00000000..cefae36e --- /dev/null +++ b/modules/chipsec.cfg.8086.bdx.xml.html @@ -0,0 +1,159 @@ + + + + + + + + bdx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    bdx

    +

    Path: chipsec\cfg\8086\bdx.xml

    +

    XML configuration file for Broadwell Server based platforms +Intel (c) Xeon Processor E5 v4 Product Family datasheet Vol. 2 +Intel (c) Xeon Processor E7 v4 Product Family datasheet Vol. 2 +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update +Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.byt.xml.html b/modules/chipsec.cfg.8086.byt.xml.html new file mode 100644 index 00000000..336a933f --- /dev/null +++ b/modules/chipsec.cfg.8086.byt.xml.html @@ -0,0 +1,158 @@ + + + + + + + + byt — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    byt

    +

    Path: chipsec\cfg\8086\byt.xml

    +

    XML configuration for Bay Trail based platforms

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.cfl.xml.html b/modules/chipsec.cfg.8086.cfl.xml.html new file mode 100644 index 00000000..56927037 --- /dev/null +++ b/modules/chipsec.cfg.8086.cfl.xml.html @@ -0,0 +1,158 @@ + + + + + + + + cfl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    cfl

    +

    Path: chipsec\cfg\8086\cfl.xml

    +

    XML configuration file for Coffee Lake

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.cht.xml.html b/modules/chipsec.cfg.8086.cht.xml.html new file mode 100644 index 00000000..7a67dfba --- /dev/null +++ b/modules/chipsec.cfg.8086.cht.xml.html @@ -0,0 +1,160 @@ + + + + + + + + cht — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    cht

    +

    Path: chipsec\cfg\8086\cht.xml

    +

    XML configuration for Cherry Trail and Braswell SoCs

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.cml.xml.html b/modules/chipsec.cfg.8086.cml.xml.html new file mode 100644 index 00000000..b05f82a2 --- /dev/null +++ b/modules/chipsec.cfg.8086.cml.xml.html @@ -0,0 +1,156 @@ + + + + + + + + cml — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    cml

    +

    Path: chipsec\cfg\8086\cml.xml

    +
    +

    XML configuration file for Comet Lake

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.common.xml.html b/modules/chipsec.cfg.8086.common.xml.html new file mode 100644 index 00000000..f2d6d13f --- /dev/null +++ b/modules/chipsec.cfg.8086.common.xml.html @@ -0,0 +1,154 @@ + + + + + + + + common — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    common

    +

    Path: chipsec\cfg\8086\common.xml

    +

    Common (default) XML platform configuration file

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.dnv.xml.html b/modules/chipsec.cfg.8086.dnv.xml.html new file mode 100644 index 00000000..8764c9c6 --- /dev/null +++ b/modules/chipsec.cfg.8086.dnv.xml.html @@ -0,0 +1,159 @@ + + + + + + + + dnv — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    dnv

    +

    Path: chipsec\cfg\8086\dnv.xml

    +

    XML configuration file for Denverton

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.ehl.xml.html b/modules/chipsec.cfg.8086.ehl.xml.html new file mode 100644 index 00000000..0f1ea743 --- /dev/null +++ b/modules/chipsec.cfg.8086.ehl.xml.html @@ -0,0 +1,155 @@ + + + + + + + + ehl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    ehl

    +

    Path: chipsec\cfg\8086\ehl.xml

    +

    XML configuration file for Elkhart Lake +Document ID: 635255, 636112, 636722, 636723

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.glk.xml.html b/modules/chipsec.cfg.8086.glk.xml.html new file mode 100644 index 00000000..efee0938 --- /dev/null +++ b/modules/chipsec.cfg.8086.glk.xml.html @@ -0,0 +1,159 @@ + + + + + + + + glk — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    glk

    +

    Path: chipsec\cfg\8086\glk.xml

    +
    +
    +
    XML configuration for GLK

    Document ID: 336561-001

    +
    +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.hsw.xml.html b/modules/chipsec.cfg.8086.hsw.xml.html new file mode 100644 index 00000000..c13f4870 --- /dev/null +++ b/modules/chipsec.cfg.8086.hsw.xml.html @@ -0,0 +1,154 @@ + + + + + + + + hsw — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hsw

    +

    Path: chipsec\cfg\8086\hsw.xml

    +

    XML configuration file for Haswell based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.hsx.xml.html b/modules/chipsec.cfg.8086.hsx.xml.html new file mode 100644 index 00000000..00f8431c --- /dev/null +++ b/modules/chipsec.cfg.8086.hsx.xml.html @@ -0,0 +1,159 @@ + + + + + + + + hsx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hsx

    +

    Path: chipsec\cfg\8086\hsx.xml

    +

    XML configuration file for Haswell Server based platforms +Intel (c) Xeon Processor E5-1600/2400/2600/4600 v3 Product Family datasheet Vol. 2 +Intel (c) Xeon Processor E7-8800/4800 v3 Product Family datasheet Vol. 2 +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update +Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.html b/modules/chipsec.cfg.8086.html new file mode 100644 index 00000000..d6c6bce8 --- /dev/null +++ b/modules/chipsec.cfg.8086.html @@ -0,0 +1,204 @@ + + + + + + + + <no title> — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.icl.xml.html b/modules/chipsec.cfg.8086.icl.xml.html new file mode 100644 index 00000000..008e80c2 --- /dev/null +++ b/modules/chipsec.cfg.8086.icl.xml.html @@ -0,0 +1,156 @@ + + + + + + + + icl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    icl

    +

    Path: chipsec\cfg\8086\icl.xml

    +
    +

    XML configuration file for Ice Lake

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.icx.xml.html b/modules/chipsec.cfg.8086.icx.xml.html new file mode 100644 index 00000000..20c06f20 --- /dev/null +++ b/modules/chipsec.cfg.8086.icx.xml.html @@ -0,0 +1,154 @@ + + + + + + + + icx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    icx

    +

    Path: chipsec\cfg\8086\icx.xml

    +

    XML configuration file for Icelake/Lewisburg Server

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.iommu.xml.html b/modules/chipsec.cfg.8086.iommu.xml.html new file mode 100644 index 00000000..e387aa2d --- /dev/null +++ b/modules/chipsec.cfg.8086.iommu.xml.html @@ -0,0 +1,158 @@ + + + + + + + + iommu — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    iommu

    +

    Path: chipsec\cfg\8086\iommu.xml

    +

    XML configuration file for Intel Virtualization Technology for Directed I/O (VT-d)

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.ivb.xml.html b/modules/chipsec.cfg.8086.ivb.xml.html new file mode 100644 index 00000000..2f9d147f --- /dev/null +++ b/modules/chipsec.cfg.8086.ivb.xml.html @@ -0,0 +1,154 @@ + + + + + + + + ivb — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    ivb

    +

    Path: chipsec\cfg\8086\ivb.xml

    +

    XML configuration for IvyBridge based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.ivt.xml.html b/modules/chipsec.cfg.8086.ivt.xml.html new file mode 100644 index 00000000..f6b3dd9b --- /dev/null +++ b/modules/chipsec.cfg.8086.ivt.xml.html @@ -0,0 +1,154 @@ + + + + + + + + ivt — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    ivt

    +

    Path: chipsec\cfg\8086\ivt.xml

    +

    XML configuration file for Ivytown (Ivy Bridge-E) based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.jkt.xml.html b/modules/chipsec.cfg.8086.jkt.xml.html new file mode 100644 index 00000000..64512c78 --- /dev/null +++ b/modules/chipsec.cfg.8086.jkt.xml.html @@ -0,0 +1,154 @@ + + + + + + + + jkt — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    jkt

    +

    Path: chipsec\cfg\8086\jkt.xml

    +

    XML configuration file for Jaketown (Sandy Bridge-E) based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.kbl.xml.html b/modules/chipsec.cfg.8086.kbl.xml.html new file mode 100644 index 00000000..a172c8cd --- /dev/null +++ b/modules/chipsec.cfg.8086.kbl.xml.html @@ -0,0 +1,159 @@ + + + + + + + + kbl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    kbl

    +

    Path: chipsec\cfg\8086\kbl.xml

    +

    XML configuration file for Kaby Lake based platforms

    +

    http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html

    +
      +

    • 7th Generation Intel(R) Processor Families for U/Y-Platforms

      • +

    • 7th Generation Intel(R) Processor Families I/O for U/Y-Platforms

      • +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_1xx.xml.html b/modules/chipsec.cfg.8086.pch_1xx.xml.html new file mode 100644 index 00000000..7264520d --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_1xx.xml.html @@ -0,0 +1,172 @@ + + + + + + + + pch_1xx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_1xx

    +

    Path: chipsec\cfg\8086\pch_1xx.xml

    +

    XML configuration file for 100 series PCH based platforms

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2020-2021, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_2xx.xml.html b/modules/chipsec.cfg.8086.pch_2xx.xml.html new file mode 100644 index 00000000..b97d5ec7 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_2xx.xml.html @@ -0,0 +1,158 @@ + + + + + + + + pch_2xx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_2xx

    +

    Path: chipsec\cfg\8086\pch_2xx.xml

    +

    XML configuration file for 200 series PCH based platforms

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_3xx.xml.html b/modules/chipsec.cfg.8086.pch_3xx.xml.html new file mode 100644 index 00000000..b8a361a9 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_3xx.xml.html @@ -0,0 +1,156 @@ + + + + + + + + pch_3xx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_3xx

    +

    Path: chipsec\cfg\8086\pch_3xx.xml

    +

    XML configuration file for the 300 series PCH +https://www.intel.com/content/www/us/en/products/docs/chipsets/300-series-chipset-pch-datasheet-vol-2.html +337348-001

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_3xxlp.xml.html b/modules/chipsec.cfg.8086.pch_3xxlp.xml.html new file mode 100644 index 00000000..caf6fd59 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_3xxlp.xml.html @@ -0,0 +1,156 @@ + + + + + + + + pch_3xxlp — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_3xxlp

    +

    Path: chipsec\cfg\8086\pch_3xxlp.xml

    +

    XML configuration file for the 300 series LP (U/Y) PCH +https://www.intel.com/content/www/us/en/products/docs/processors/core/7th-and-8th-gen-core-family-mobile-u-y-processor-lines-i-o-datasheet-vol-2.html +334659-005

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_3xxop.xml.html b/modules/chipsec.cfg.8086.pch_3xxop.xml.html new file mode 100644 index 00000000..cfba82fe --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_3xxop.xml.html @@ -0,0 +1,156 @@ + + + + + + + + pch_3xxop — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_3xxop

    +

    Path: chipsec\cfg\8086\pch_3xxop.xml

    +

    XML configuration file for the 300 series On Package PCH +https://www.intel.com/content/www/us/en/products/docs/chipsets/300-series-chipset-on-package-pch-datasheet-vol-2.html +337868-002

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_495.xml.html b/modules/chipsec.cfg.8086.pch_495.xml.html new file mode 100644 index 00000000..f8b52863 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_495.xml.html @@ -0,0 +1,154 @@ + + + + + + + + pch_495 — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_495

    +

    Path: chipsec\cfg\8086\pch_495.xml

    +

    XML configuration file for the 495 series PCH

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_4xx.xml.html b/modules/chipsec.cfg.8086.pch_4xx.xml.html new file mode 100644 index 00000000..873b3b7f --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_4xx.xml.html @@ -0,0 +1,156 @@ + + + + + + + + pch_4xx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_4xx

    +

    Path: chipsec\cfg\8086\pch_4xx.xml

    +
    +

    XML configuration file for 4XX pch

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_4xxh.xml.html b/modules/chipsec.cfg.8086.pch_4xxh.xml.html new file mode 100644 index 00000000..0a05ec28 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_4xxh.xml.html @@ -0,0 +1,156 @@ + + + + + + + + pch_4xxh — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_4xxh

    +

    Path: chipsec\cfg\8086\pch_4xxh.xml

    +
    +

    XML configuration file 4xxH PCH 620855

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_4xxlp.xml.html b/modules/chipsec.cfg.8086.pch_4xxlp.xml.html new file mode 100644 index 00000000..17c9b2d1 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_4xxlp.xml.html @@ -0,0 +1,156 @@ + + + + + + + + pch_4xxlp — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_4xxlp

    +

    Path: chipsec\cfg\8086\pch_4xxlp.xml

    +
    +

    XML configuration file for the 400 series LP (U/H) PCH

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_5xxh.xml.html b/modules/chipsec.cfg.8086.pch_5xxh.xml.html new file mode 100644 index 00000000..381e890b --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_5xxh.xml.html @@ -0,0 +1,154 @@ + + + + + + + + pch_5xxh — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_5xxh

    +

    Path: chipsec\cfg\8086\pch_5xxh.xml

    +

    XML configuration file for 5XXH series pch

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_5xxlp.xml.html b/modules/chipsec.cfg.8086.pch_5xxlp.xml.html new file mode 100644 index 00000000..e29e15c9 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_5xxlp.xml.html @@ -0,0 +1,154 @@ + + + + + + + + pch_5xxlp — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_5xxlp

    +

    Path: chipsec\cfg\8086\pch_5xxlp.xml

    +

    XML configuration file for 5XXLP series pch

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_6xxP.xml.html b/modules/chipsec.cfg.8086.pch_6xxP.xml.html new file mode 100644 index 00000000..518a4617 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_6xxP.xml.html @@ -0,0 +1,167 @@ + + + + + + + + pch_6xxP — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_6xxP

    +

    Path: chipsec\cfg\8086\pch_6xxP.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021-2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_6xxS.xml.html b/modules/chipsec.cfg.8086.pch_6xxS.xml.html new file mode 100644 index 00000000..1f4222e1 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_6xxS.xml.html @@ -0,0 +1,167 @@ + + + + + + + + pch_6xxS — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_6xxS

    +

    Path: chipsec\cfg\8086\pch_6xxS.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021-2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_7x.xml.html b/modules/chipsec.cfg.8086.pch_7x.xml.html new file mode 100644 index 00000000..65294bce --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_7x.xml.html @@ -0,0 +1,167 @@ + + + + + + + + pch_7x — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_7x

    +

    Path: chipsec\cfg\8086\pch_7x.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_8x.xml.html b/modules/chipsec.cfg.8086.pch_8x.xml.html new file mode 100644 index 00000000..800c01a6 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_8x.xml.html @@ -0,0 +1,167 @@ + + + + + + + + pch_8x — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_8x

    +

    Path: chipsec\cfg\8086\pch_8x.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_c60x.xml.html b/modules/chipsec.cfg.8086.pch_c60x.xml.html new file mode 100644 index 00000000..954e77e2 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_c60x.xml.html @@ -0,0 +1,159 @@ + + + + + + + + pch_c60x — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_c60x

    +

    Path: chipsec\cfg\8086\pch_c60x.xml

    +
    +
    XML configuration file for C600 series PCH

    Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset datasheet +Intel (c) C600 Series Chipset and Intel (c) X79 Express Chipset Specification Update +https://ark.intel.com/products/series/98463/Intel-C600-Series-Chipsets

    +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_c61x.xml.html b/modules/chipsec.cfg.8086.pch_c61x.xml.html new file mode 100644 index 00000000..988d7570 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_c61x.xml.html @@ -0,0 +1,158 @@ + + + + + + + + pch_c61x — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_c61x

    +

    Path: chipsec\cfg\8086\pch_c61x.xml

    +
    +
    XML configuration file for C610 series PCH

    Intel (c) C610 Series Chipset and Intel (c) X99 Chipset Platform Controller Hub (PCH) datasheet +https://ark.intel.com/products/series/98915/Intel-C610-Series-Chipsets

    +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pch_c620.xml.html b/modules/chipsec.cfg.8086.pch_c620.xml.html new file mode 100644 index 00000000..92c5aaf5 --- /dev/null +++ b/modules/chipsec.cfg.8086.pch_c620.xml.html @@ -0,0 +1,158 @@ + + + + + + + + pch_c620 — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pch_c620

    +

    Path: chipsec\cfg\8086\pch_c620.xml

    +

    XML configuration file for

    + +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.pmc_i440fx.xml.html b/modules/chipsec.cfg.8086.pmc_i440fx.xml.html new file mode 100644 index 00000000..be683b86 --- /dev/null +++ b/modules/chipsec.cfg.8086.pmc_i440fx.xml.html @@ -0,0 +1,157 @@ + + + + + + + + pmc_i440fx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pmc_i440fx

    +

    Path: chipsec\cfg\8086\pmc_i440fx.xml

    +

    XML configuration file for Intel 440FX PCI and Memory Controller (PMC). +It is used by QEMU “pc” machine, implemented in +https://github.com/qemu/qemu/blob/v7.0.0/hw/pci-host/i440fx.c

    +

    A datasheet is available on https://wiki.qemu.org/File:29054901.pdf

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.qrk.xml.html b/modules/chipsec.cfg.8086.qrk.xml.html new file mode 100644 index 00000000..584e8b7e --- /dev/null +++ b/modules/chipsec.cfg.8086.qrk.xml.html @@ -0,0 +1,154 @@ + + + + + + + + qrk — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    qrk

    +

    Path: chipsec\cfg\8086\qrk.xml

    +

    XML configuration for Quark based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.rkl.xml.html b/modules/chipsec.cfg.8086.rkl.xml.html new file mode 100644 index 00000000..bd7c29c7 --- /dev/null +++ b/modules/chipsec.cfg.8086.rkl.xml.html @@ -0,0 +1,167 @@ + + + + + + + + rkl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    rkl

    +

    Path: chipsec\cfg\8086\rkl.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.rpl.xml.html b/modules/chipsec.cfg.8086.rpl.xml.html new file mode 100644 index 00000000..b8007dd8 --- /dev/null +++ b/modules/chipsec.cfg.8086.rpl.xml.html @@ -0,0 +1,167 @@ + + + + + + + + rpl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    rpl

    +

    Path: chipsec\cfg\8086\rpl.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.sfdp.xml.html b/modules/chipsec.cfg.8086.sfdp.xml.html new file mode 100644 index 00000000..e475ee55 --- /dev/null +++ b/modules/chipsec.cfg.8086.sfdp.xml.html @@ -0,0 +1,155 @@ + + + + + + + + sfdp — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    sfdp

    +

    Path: chipsec\cfg\8086\sfdp.xml

    +

    XML configuration for Serial Flash Discoverable Parameter feature +document: https://www.jedec.org/system/files/docs/JESD216D-01.pdf

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.skl.xml.html b/modules/chipsec.cfg.8086.skl.xml.html new file mode 100644 index 00000000..127171d5 --- /dev/null +++ b/modules/chipsec.cfg.8086.skl.xml.html @@ -0,0 +1,162 @@ + + + + + + + + skl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    skl

    +

    Path: chipsec\cfg\8086\skl.xml

    +

    XML configuration file for Skylake based platforms

    +

    http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.html

    +
      +

    • 6th Generation Intel(R) Processor Datasheet for U/Y-Platforms

      • +

    • 6th Generation Intel(R) Processor I/O Datasheet for U/Y-Platforms

      • +

    • 6th Generation Intel(R) Processor Datasheet for S-Platforms

      • +

    • 6th Generation Intel(R) Processor Datasheet for H-Platforms

      • +

    • Intel(R) 100 Series Chipset Family Platform Controller Hub (PCH)

      • +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.skx.xml.html b/modules/chipsec.cfg.8086.skx.xml.html new file mode 100644 index 00000000..d1f88adc --- /dev/null +++ b/modules/chipsec.cfg.8086.skx.xml.html @@ -0,0 +1,155 @@ + + + + + + + + skx — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    skx

    +

    Path: chipsec\cfg\8086\skx.xml

    +

    XML configuration file for Skylake/Purely Server +Intel (c) Xeon Processor Scalable Family datasheet Vol. 2

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.snb.xml.html b/modules/chipsec.cfg.8086.snb.xml.html new file mode 100644 index 00000000..7c1e6a19 --- /dev/null +++ b/modules/chipsec.cfg.8086.snb.xml.html @@ -0,0 +1,154 @@ + + + + + + + + snb — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    snb

    +

    Path: chipsec\cfg\8086\snb.xml

    +

    XML configuration for Sandy Bridge based platforms

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.tglh.xml.html b/modules/chipsec.cfg.8086.tglh.xml.html new file mode 100644 index 00000000..5643dc0b --- /dev/null +++ b/modules/chipsec.cfg.8086.tglh.xml.html @@ -0,0 +1,167 @@ + + + + + + + + tglh — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    tglh

    +

    Path: chipsec\cfg\8086\tglh.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2022, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.tglu.xml.html b/modules/chipsec.cfg.8086.tglu.xml.html new file mode 100644 index 00000000..89def8f5 --- /dev/null +++ b/modules/chipsec.cfg.8086.tglu.xml.html @@ -0,0 +1,167 @@ + + + + + + + + tglu — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    tglu

    +

    Path: chipsec\cfg\8086\tglu.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.tpm12.xml.html b/modules/chipsec.cfg.8086.tpm12.xml.html new file mode 100644 index 00000000..7d4b04fd --- /dev/null +++ b/modules/chipsec.cfg.8086.tpm12.xml.html @@ -0,0 +1,167 @@ + + + + + + + + tpm12 — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    tpm12

    +

    Path: chipsec\cfg\8086\tpm12.xml

    +

    CHIPSEC: Platform Security Assessment Framework +Copyright (c) 2021, Intel Corporation

    +

    This program is free software; you can redistribute it and/or +modify it under the terms of the GNU General Public License +as published by the Free Software Foundation; Version 2.

    +

    This program is distributed in the hope that it will be useful, +but WITHOUT ANY WARRANTY; without even the implied warranty of +MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +GNU General Public License for more details.

    +

    You should have received a copy of the GNU General Public License +along with this program; if not, write to the Free Software +Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.

    +

    Contact information: +chipsec@intel.com

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.txt.xml.html b/modules/chipsec.cfg.8086.txt.xml.html new file mode 100644 index 00000000..6c08711e --- /dev/null +++ b/modules/chipsec.cfg.8086.txt.xml.html @@ -0,0 +1,171 @@ + + + + + + + + txt — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    txt

    +

    Path: chipsec\cfg\8086\txt.xml

    +

    Configuration of Intel TXT register, following the guide:

    +
    +

    Intel® Trusted Execution Technology: Software Development Guide +Measured Launched Environment Developer’s Guide +August 2016 +Revision 013

    +
    +

    from https://web.archive.org/web/20170506220426/https://www.intel.com/content/www/us/en/software-developers/intel-txt-software-development-guide.html +(and https://usermanual.wiki/Document/inteltxtsoftwaredevelopmentguide.1721028921 )

    +

    Appendix B.1. (Intel® TXT Configuration Registers) details:

    +
    +

    These registers are mapped into two regions of memory, representing the public and private configuration spaces. +[…] +The private space registers are mapped to the address range starting at FED20000H. +The public space registers are mapped to the address range starting at FED30000H.

    +
    +

    As chipsec usually runs in environments where the private space is not available, +only the public space registers were described here.

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.8086.whl.xml.html b/modules/chipsec.cfg.8086.whl.xml.html new file mode 100644 index 00000000..4c21712f --- /dev/null +++ b/modules/chipsec.cfg.8086.whl.xml.html @@ -0,0 +1,161 @@ + + + + + + + + whl — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    whl

    +

    Path: chipsec\cfg\8086\whl.xml

    +

    XML configuration file for Whiskey Lake

    +
    +
    8th Generation Intel(R) Processor Family for U-Processor Platforms:
    +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.cfg.parsers.core_parsers.html b/modules/chipsec.cfg.parsers.core_parsers.html index b7210484..dc8849c4 100644 --- a/modules/chipsec.cfg.parsers.core_parsers.html +++ b/modules/chipsec.cfg.parsers.core_parsers.html @@ -1,20 +1,19 @@ - - + - - chipsec.cfg.parsers.core_parsers module — CHIPSEC documentation - - + + + core_parsers module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.cfg.parsers.core_parsers module
    • +
  • core_parsers module
    • @@ -37,86 +36,9 @@

    Navigation

    -
    -

    chipsec.cfg.parsers.core_parsers module

    -
    -
    -class CoreConfig(cfg_obj)[source]
    -

    Bases: chipsec.parsers.BaseConfigParser

    -
    -
    -get_metadata()[source]
    -
    - -
    -
    -get_stage()[source]
    -
    - -
    -
    -handle_controls(et_node, stage_data)[source]
    -
    - -
    -
    -handle_ima(et_node, stage_data)[source]
    -
    - -
    -
    -handle_io(et_node, stage_data)[source]
    -
    - -
    -
    -handle_locks(et_node, stage_data)[source]
    -
    - -
    -
    -handle_memory(et_node, stage_data)[source]
    -
    - -
    -
    -handle_mmio(et_node, stage_data)[source]
    -
    - -
    -
    -handle_pci(et_node, stage_data)[source]
    -
    - -
    -
    -handle_registers(et_node, stage_data)[source]
    -
    - -
    - -
    -
    -class PlatformInfo(cfg_obj)[source]
    -

    Bases: chipsec.parsers.BaseConfigParser

    -
    -
    -get_metadata()[source]
    -
    - -
    -
    -get_stage()[source]
    -
    - -
    -
    -handle_info(et_node, stage_data)[source]
    -
    - -
    - -
    +
    +

    core_parsers module

    +
    @@ -176,7 +98,7 @@

    Quick search

    - +
    @@ -191,12 +113,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.cfg.parsers.core_parsers module
    • +
  • core_parsers module
    • \ No newline at end of file diff --git a/modules/chipsec.cfg.parsers.html b/modules/chipsec.cfg.parsers.html index 6edcb687..3adef520 100644 --- a/modules/chipsec.cfg.parsers.html +++ b/modules/chipsec.cfg.parsers.html @@ -1,20 +1,19 @@ - - + - - chipsec.cfg.parsers package — CHIPSEC documentation - - + + + parsers package — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.cfg.parsers package
    • +
  • parsers package
    • @@ -37,20 +36,14 @@

    Navigation

    -
    -

    chipsec.cfg.parsers package

    - -
    -

    Module contents

    -
    -
    +
    @@ -110,7 +103,7 @@

    Quick search

    - +
    @@ -125,12 +118,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.cfg.parsers package
    • +
  • parsers package
    • \ No newline at end of file diff --git a/modules/chipsec.config.html b/modules/chipsec.config.html index 0069653b..fce72b1d 100644 --- a/modules/chipsec.config.html +++ b/modules/chipsec.config.html @@ -1,20 +1,19 @@ - - + - - chipsec.config module — CHIPSEC documentation - - + + + config module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.config module
    • +
  • config module
    • @@ -37,80 +36,9 @@

    Navigation

    -
    -

    chipsec.config module

    -
    -
    -class Cfg[source]
    -

    Bases: object

    -
    -
    -add_extra_configs(path, filename=None, loadnow=False)[source]
    -
    - -
    -
    -get_chipset_code()[source]
    -
    - -
    -
    -get_common_xml()[source]
    -
    - -
    -
    -get_pch_code()[source]
    -
    - -
    -
    -is_pch_req()[source]
    -
    - -
    -
    -load_parsers()[source]
    -
    - -
    -
    -load_platform_config()[source]
    -
    - -
    -
    -load_platform_info()[source]
    -
    - -
    -
    -platform_detection(proc_code, pch_code, cpuid)[source]
    -
    - -
    -
    -print_pch_info()[source]
    -
    - -
    -
    -print_platform_info()[source]
    -
    - -
    -
    -print_supported_chipsets()[source]
    -
    - -
    -
    -set_pci_data(enum_devices)[source]
    -
    - -
    - -
    +
    +

    config module

    +
    @@ -170,7 +98,7 @@

    Quick search

    - +
    @@ -185,12 +113,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.config module
    • +
  • config module
    • \ No newline at end of file diff --git a/modules/chipsec.fuzzing.html b/modules/chipsec.fuzzing.html index e688c0f9..c5046755 100644 --- a/modules/chipsec.fuzzing.html +++ b/modules/chipsec.fuzzing.html @@ -1,24 +1,23 @@ - - + - - chipsec.fuzzing package — CHIPSEC documentation - - + + + fuzzing package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -46,20 +45,14 @@

    Navigation

    -
    -

    chipsec.fuzzing package

    -
    -

    Submodules

    +
    +

    fuzzing package

    -
    -
    -

    Module contents

    -
    -
    +
    @@ -113,12 +106,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.vmm module

    + title="previous chapter">vmm module

    Next topic

    chipsec.fuzzing.primitives module

    + title="next chapter">primitives module

    - +
    @@ -144,19 +137,19 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.fuzzing package
    • +
  • fuzzing package
    • \ No newline at end of file diff --git a/modules/chipsec.fuzzing.primitives.html b/modules/chipsec.fuzzing.primitives.html index 7e3da520..9268fc22 100644 --- a/modules/chipsec.fuzzing.primitives.html +++ b/modules/chipsec.fuzzing.primitives.html @@ -1,24 +1,23 @@ - - + - - chipsec.fuzzing.primitives module — CHIPSEC documentation - - + + + primitives module — CHIPSEC documentation + + - - - - + + + - + - + @@ -47,233 +46,9 @@

    Navigation

    -
    -

    chipsec.fuzzing.primitives module

    -
    -
    -class base_primitive[source]
    -

    Bases: object

    -

    The primitive base class implements common functionality shared across most primitives.

    -
    -
    -exhaust()[source]
    -

    Exhaust the possible mutations for this primitive.

    -

    @rtype: Integer -@return: The number of mutations to reach exhaustion

    -
    - -
    -
    -mutate()[source]
    -

    Mutate the primitive by stepping through the fuzz library, return False on completion.

    -

    @rtype: Boolean -@return: True on success, False otherwise.

    -
    - -
    -
    -num_mutations()[source]
    -

    Calculate and return the total number of mutations for this individual primitive.

    -

    @rtype: Integer -@return: Number of mutated forms this primitive can take

    -
    - -
    -
    -render()[source]
    -

    Nothing fancy on render, simply return the value.

    -
    - -
    -
    -reset()[source]
    -

    Reset this primitive to the starting mutation state.

    -
    - -
    - -
    -
    -class bit_field(value, width, max_num=None, endian='<', format='binary', signed=False, full_range=False, fuzzable=True, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.base_primitive

    -
    -
    -add_integer_boundaries(integer)[source]
    -

    Add the supplied integer and border cases to the integer fuzz heuristics library.

    -

    @type integer: Int -@param integer: Integer to append to fuzz heuristics

    -
    - -
    -
    -render()[source]
    -

    Render the primitive.

    -
    - -
    -
    -to_binary(number=None, bit_count=None)[source]
    -

    Convert a number to a binary string.

    -

    @type number: Integer -@param number: (Optional, def=self.value) Number to convert -@type bit_count: Integer -@param bit_count: (Optional, def=self.width) Width of bit string

    -

    @rtype: String -@return: Bit string

    -
    - -
    -
    -to_decimal(binary)[source]
    -

    Convert a binary string to a decimal number.

    -

    @type binary: String -@param binary: Binary string

    -

    @rtype: Integer -@return: Converted bit string

    -
    - -
    - -
    -
    -class byte(value, endian='<', format='binary', signed=False, full_range=False, fuzzable=True, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.bit_field

    -
    - -
    -
    -class delim(value, fuzzable=True, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.base_primitive

    -
    - -
    -
    -class dword(value, endian='<', format='binary', signed=False, full_range=False, fuzzable=True, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.bit_field

    -
    - -
    -
    -class group(name, values)[source]
    -

    Bases: chipsec.fuzzing.primitives.base_primitive

    -
    -
    -mutate()[source]
    -

    Move to the next item in the values list.

    -

    @rtype: False -@return: False

    -
    - -
    -
    -num_mutations()[source]
    -

    Number of values in this primitive.

    -

    @rtype: Integer -@return: Number of values in this primitive.

    -
    - -
    - -
    -
    -class qword(value, endian='<', format='binary', signed=False, full_range=False, fuzzable=True, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.bit_field

    -
    - -
    -
    -class random_data(value, min_length, max_length, max_mutations=25, fuzzable=True, step=None, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.base_primitive

    -
    -
    -mutate()[source]
    -

    Mutate the primitive value returning False on completion.

    -

    @rtype: Boolean -@return: True on success, False otherwise.

    -
    - -
    -
    -num_mutations()[source]
    -

    Calculate and return the total number of mutations for this individual primitive.

    -

    @rtype: Integer -@return: Number of mutated forms this primitive can take

    -
    - -
    - -
    -
    -class static(value, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.base_primitive

    -
    -
    -mutate()[source]
    -

    Do nothing.

    -

    @rtype: False -@return: False

    -
    - -
    -
    -num_mutations()[source]
    -

    Return 0.

    -

    @rtype: 0 -@return: 0

    -
    - -
    - -
    -
    -class string(value, size=- 1, padding='\x00', encoding='ascii', fuzzable=True, max_len=0, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.base_primitive

    -
    -
    -add_long_strings(sequence)[source]
    -

    Given a sequence, generate a number of selectively chosen strings lengths of the given sequence and add to the -string heuristic library.

    -

    @type sequence: String -@param sequence: Sequence to repeat for creation of fuzz strings.

    -
    - -
    -
    -fuzz_library = []
    -
    - -
    -
    -mutate()[source]
    -

    Mutate the primitive by stepping through the fuzz library extended with the “this” library, return False on -completion.

    -

    @rtype: Boolean -@return: True on success, False otherwise.

    -
    - -
    -
    -num_mutations()[source]
    -

    Calculate and return the total number of mutations for this individual primitive.

    -

    @rtype: Integer -@return: Number of mutated forms this primitive can take

    -
    - -
    -
    -render()[source]
    -

    Render the primitive, encode the string according to the specified encoding.

    -
    - -
    - -
    -
    -class word(value, endian='<', format='binary', signed=False, full_range=False, fuzzable=True, name=None)[source]
    -

    Bases: chipsec.fuzzing.primitives.bit_field

    -
    - -
    +
    +

    primitives module

    +
    @@ -327,7 +102,7 @@

    Table of Contents

    Previous topic

    chipsec.fuzzing package

    + title="previous chapter">fuzzing package

    Next topic

    @@ -343,7 +118,7 @@

    Quick search

    - +
    @@ -361,17 +136,17 @@

    Navigation

    next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.fuzzing package »
    • -
  • chipsec.fuzzing.primitives module
    • +
  • fuzzing package »
    • +
  • primitives module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.acpi.html b/modules/chipsec.hal.acpi.html index 06f78afa..a84b6d1e 100644 --- a/modules/chipsec.hal.acpi.html +++ b/modules/chipsec.hal.acpi.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.acpi module — CHIPSEC documentation - - + + + acpi module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,89 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.acpi module

    +
    +

    acpi module

    HAL component providing access to and decoding of ACPI tables

    -
    -
    -class ACPI(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -ParseTable
    -

    alias of Tuple[chipsec.hal.acpi.ACPI_TABLE_HEADER, Optional[chipsec.hal.acpi_tables.ACPI_TABLE], bytes, bytes]

    -
    - -
    -
    -RsdtXsdt
    -

    alias of Union[chipsec.hal.acpi_tables.RSDT, chipsec.hal.acpi_tables.XSDT]

    -
    - -
    -
    -dump_ACPI_table(name: str, isfile: bool = False) → None[source]
    -
    - -
    -
    -find_RSDP() → Tuple[Optional[int], Optional[chipsec.hal.acpi_tables.RSDP]][source]
    -
    - -
    -
    -get_ACPI_table(name: str, isfile: bool = False) → List[Tuple[bytes, bytes]][source]
    -
    - -
    -
    -get_ACPI_table_list() → Dict[str, List[int]][source]
    -
    - -
    -
    -get_DSDT_from_FADT() → None[source]
    -
    - -
    -
    -get_SDT(search_rsdp: bool = True) → Tuple[bool, Optional[int], Optional[Union[chipsec.hal.acpi_tables.RSDT, chipsec.hal.acpi_tables.XSDT]], Optional[chipsec.hal.acpi.ACPI_TABLE_HEADER]][source]
    -
    - -
    -
    -get_parse_ACPI_table(name: str, isfile: bool = False) → List[ParseTable][source]
    -
    - -
    -
    -get_table_list_from_SDT(sdt: Union[chipsec.hal.acpi_tables.RSDT, chipsec.hal.acpi_tables.XSDT], is_xsdt: bool) → None[source]
    -
    - -
    -
    -is_ACPI_table_present(name: str) → bool[source]
    -
    - -
    -
    -print_ACPI_table_list() → None[source]
    -
    - -
    -
    -read_RSDP(rsdp_pa: int) → chipsec.hal.acpi_tables.RSDP[source]
    -
    - -
    - -
    -
    -class ACPI_TABLE_HEADER(Signature, Length, Revision, Checksum, OEMID, OEMTableID, OEMRevision, CreatorID, CreatorRevision)[source]
    -

    Bases: chipsec.hal.acpi.ACPI_TABLE_HEADER

    -
    - -
    +
    @@ -183,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal package

    + title="previous chapter">hal package

    Next topic

    chipsec.hal.acpi_tables module

    + title="next chapter">acpi_tables module

    - +
    @@ -214,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.acpi module
    • +
  • hal package »
    • +
  • acpi module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.acpi_tables.html b/modules/chipsec.hal.acpi_tables.html index beb25700..43f2a0ae 100644 --- a/modules/chipsec.hal.acpi_tables.html +++ b/modules/chipsec.hal.acpi_tables.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.acpi_tables module — CHIPSEC documentation - - + + + acpi_tables module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,563 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.acpi_tables module

    +
    +

    acpi_tables module

    HAL component decoding various ACPI tables

    -
    -
    -class ACPI_TABLE[source]
    -

    Bases: object

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class ACPI_TABLE_APIC_GICC_CPU(Type, Length, Reserved, CPUIntNumber, ACPIProcUID, Flags, ParkingProtocolVersion, PerformanceInterruptGSIV, ParkedAddress, PhysicalAddress, GICV, GICH, VGICMaintenanceINterrupt, GICRBaseAddress, MPIDR)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_GICC_CPU

    -
    - -
    -
    -class ACPI_TABLE_APIC_GIC_DISTRIBUTOR(Type, Length, Reserved, GICID, PhysicalBaseAddress, SystemVectorBase, Reserved2)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_GIC_DISTRIBUTOR

    -
    - -
    -
    -class ACPI_TABLE_APIC_GIC_MSI(Type, Length, Reserved, GICMSIFrameID, PhysicalBaseAddress, Flags, SPICount, SPIBase)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_GIC_MSI

    -
    - -
    -
    -class ACPI_TABLE_APIC_GIC_REDISTRIBUTOR(Type, Length, Reserved, DiscoverRangeBaseAdd, DiscoverRangeLength)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_GIC_REDISTRIBUTOR

    -
    - -
    -
    -class ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE(Type, Length, Bus, Source, GlobalSysIntBase, Flags)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE

    -
    - -
    -
    -class ACPI_TABLE_APIC_IOAPIC(Type, Length, IOAPICID, Reserved, IOAPICAddr, GlobalSysIntBase)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_IOAPIC

    -
    - -
    -
    -class ACPI_TABLE_APIC_IOSAPIC(Type, Length, IOAPICID, Reserved, GlobalSysIntBase, IOSAPICAddress)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_IOSAPIC

    -
    - -
    -
    -class ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE(Type, Length, Reserved, LocalAPICAddress)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE

    -
    - -
    -
    -class ACPI_TABLE_APIC_LAPIC_NMI(Type, Length, ACPIProcessorID, Flags, LocalAPICLINT)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_LAPIC_NMI

    -
    - -
    -
    -class ACPI_TABLE_APIC_Lx2APIC_NMI(Type, Length, Flags, ACPIProcUID, Localx2APICLINT, Reserved)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_Lx2APIC_NMI

    -
    - -
    -
    -class ACPI_TABLE_APIC_NMI_SOURCE(Type, Length, Flags, GlobalSysIntBase)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_NMI_SOURCE

    -
    - -
    -
    -class ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES(Type, Length, Flags, InterruptType, ProcID, ProcEID, IOSAPICVector, GlobalSystemInterrupt, PlatIntSourceFlags)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES

    -
    - -
    -
    -class ACPI_TABLE_APIC_PROCESSOR_LAPIC(Type, Length, ACPIProcID, APICID, Flags)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_PROCESSOR_LAPIC

    -
    - -
    -
    -class ACPI_TABLE_APIC_PROCESSOR_LSAPIC(Type, Length, ACPIProcID, LocalSAPICID, LocalSAPICEID, Reserved, Flags, ACPIProcUIDValue, ACPIProcUIDString)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_PROCESSOR_LSAPIC

    -
    - -
    -
    -class ACPI_TABLE_APIC_PROCESSOR_Lx2APIC(Type, Length, Reserved, x2APICID, Flags, ACPIProcUID)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_APIC_PROCESSOR_Lx2APIC

    -
    - -
    -
    -class ACPI_TABLE_DMAR_ANDD(Type, Length, Reserved, ACPIDevNum, ACPIObjectName)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_ANDD

    -
    - -
    -
    -class ACPI_TABLE_DMAR_ATSR(Type, Length, Flags, Reserved, SegmentNumber, DeviceScope)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_ATSR

    -
    - -
    -
    -class ACPI_TABLE_DMAR_DRHD(Type, Length, Flags, Reserved, SegmentNumber, RegisterBaseAddr, DeviceScope)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_DRHD

    -
    - -
    -
    -class ACPI_TABLE_DMAR_DeviceScope(Type, Length, Flags, Reserved, EnumerationID, StartBusNum, Path)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_DeviceScope

    -
    - -
    -
    -class ACPI_TABLE_DMAR_RHSA(Type, Length, Reserved, RegisterBaseAddr, ProximityDomain)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_RHSA

    -
    - -
    -
    -class ACPI_TABLE_DMAR_RMRR(Type, Length, Reserved, SegmentNumber, RMRBaseAddr, RMRLimitAddr, DeviceScope)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_RMRR

    -
    - -
    -
    -class ACPI_TABLE_DMAR_SATC(Type, Length, Flags, Reserved, SegmentNumber, DeviceScope)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_SATC

    -
    - -
    -
    -class ACPI_TABLE_DMAR_SIDP(Type, Length, Reserved, SegmentNumber, DeviceScope)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE_DMAR_SIDP

    -
    - -
    -
    -class APIC[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -get_structure_APIC(value: int, DataStructure: bytes) → str[source]
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class BERT(bootRegion: bytes)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseErrorBlock(table_content: bytes) → None[source]
    -
    - -
    -
    -parseGenErrorEntries(table_content: bytes) → str[source]
    -
    - -
    -
    -parseSectionType(table_content: bytes) → str[source]
    -
    - -
    -
    -parseTime(table_content: bytes) → str[source]
    -
    - -
    - -
    -
    -class BGRT[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class DMAR[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class EINJ[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseAddress(table_content: bytes) → str[source]
    -
    - -
    -
    -parseInjection(table_content: bytes) → None[source]
    -
    - -
    -
    -parseInjectionActionTable(table_contents: bytes, numInjections: int) → None[source]
    -
    - -
    - -
    -
    -class ERST[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseActionTable(table_content: bytes, instrCountEntry: int) → None[source]
    -
    - -
    -
    -parseAddress(table_content: bytes) → str[source]
    -
    - -
    -
    -parseInstructionEntry(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class FADT[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -get_DSDT_address_to_use() → Optional[int][source]
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class GAS(table_content: bytes)[source]
    -

    Bases: object

    -
    -
    -get_info() → Tuple[int, int, int, int, int][source]
    -
    - -
    - -
    -
    -class HEST[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -machineBankParser(table_content: bytes) → None[source]
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseAMCES(table_content: bytes) → int[source]
    -
    - -
    -
    -parseAMCS(table_content: bytes, _type: int) → int[source]
    -
    - -
    -
    -parseAddress(table_content: bytes) → str[source]
    -
    - -
    -
    -parseErrEntry(table_content: bytes) → Optional[int][source]
    -
    - -
    -
    -parseGHESS(table_content: bytes, _type: int) → int[source]
    -
    - -
    -
    -parseNMIStructure(table_content: bytes) → int[source]
    -
    - -
    -
    -parseNotify(table_content: bytes) → str[source]
    -
    - -
    -
    -parsePCIe(table_content: bytes, _type: int) → int[source]
    -
    - -
    - -
    -
    -class MSCT[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseProx(table_content: bytes, val: int) → str[source]
    -
    - -
    -
    -parseProxDomInfoStruct(table_contents: bytes, num: int) → str[source]
    -
    - -
    - -
    -
    -class NFIT(header)[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -flushHintAddrStruct(tableLen: int, table_content: bytes) → Tuple[int, str][source]
    -
    - -
    -
    -interleave(tableLen: int, table_content: bytes) → Tuple[int, str][source]
    -
    - -
    -
    -nvdimmBlockDataWindowsRegionStruct(tableLen: int, table_content: bytes) → str[source]
    -
    - -
    -
    -nvdimmControlRegionStructMark(tableLen: int, table_content: bytes) → str[source]
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseMAP(tableLen: int, table_content: bytes) → str[source]
    -
    - -
    -
    -parseSPA(tableLen: int, table_content: bytes) → str[source]
    -
    - -
    -
    -parseStructures(table_content: bytes) → str[source]
    -
    - -
    -
    -platCapStruct(tableLen: int, table_content: bytes) → str[source]
    -
    - -
    -
    -smbiosManagementInfo(tableLen: int, table_content: bytes) → str[source]
    -
    - -
    - -
    -
    -class RASF[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class RSDP[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -is_RSDP_valid() → bool[source]
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class RSDT[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class SPMI[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    -
    -parseAddress(table_content: bytes) → str[source]
    -
    - -
    -
    -parseNonUID(table_content: bytes) → str[source]
    -
    - -
    -
    -parseUID(table_content: bytes) → str[source]
    -
    - -
    - -
    -
    -class UEFI_TABLE[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -CommBuffInfo
    -

    alias of Tuple[int, int, Optional[GAS]]

    -
    - -
    -
    -get_commbuf_info() → Tuple[int, int, Optional[chipsec.hal.acpi_tables.GAS]][source]
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class WSMT[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -COMM_BUFFER_NESTED_PTR_PROTECTION = 2
    -
    - -
    -
    -FIXED_COMM_BUFFERS = 1
    -
    - -
    -
    -SYSTEM_RESOURCE_PROTECTION = 4
    -
    - -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    -
    -class XSDT[source]
    -

    Bases: chipsec.hal.acpi_tables.ACPI_TABLE

    -
    -
    -parse(table_content: bytes) → None[source]
    -
    - -
    - -
    +
    @@ -657,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.acpi module

    + title="previous chapter">acpi module

    Next topic

    chipsec.hal.cmos module

    + title="next chapter">cmos module

    - +
    @@ -688,20 +134,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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    • +
  • hal package »
    • +
  • acpi_tables module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.cmos.html b/modules/chipsec.hal.cmos.html index 83db0408..44493b7d 100644 --- a/modules/chipsec.hal.cmos.html +++ b/modules/chipsec.hal.cmos.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.cmos module — CHIPSEC documentation - - + + + cmos module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.cmos module

    +
    +

    cmos module

    CMOS memory specific functions (dump, read/write)

    usage:
    >>> cmos.dump_low()
@@ -62,48 +61,7 @@ 
    Navigation
    -
    -
    -class CMOS(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -dump() → None[source]
    -
    - -
    -
    -dump_high() → List[int][source]
    -
    - -
    -
    -dump_low() → List[int][source]
    -
    - -
    -
    -read_cmos_high(offset: int) → int[source]
    -
    - -
    -
    -read_cmos_low(offset: int) → int[source]
    -
    - -
    -
    -write_cmos_high(offset: int, value: int) → None[source]
    -
    - -
    -
    -write_cmos_low(offset: int, value: int) → None[source]
    -
    - -
    - -
    +
    @@ -157,12 +115,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.acpi_tables module

    + title="previous chapter">acpi_tables module

    Next topic

    chipsec.hal.cpu module

    + title="next chapter">cpu module

    - +
    @@ -188,20 +146,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
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    • +
  • hal package »
    • +
  • cmos module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.cpu.html b/modules/chipsec.hal.cpu.html index 228005e5..d005ae11 100644 --- a/modules/chipsec.hal.cpu.html +++ b/modules/chipsec.hal.cpu.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.cpu module — CHIPSEC documentation - - + + + cpu module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,106 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.cpu module

    +
    +

    cpu module

    CPU related functionality

    -
    -
    -class CPU(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -check_SMRR_supported() → bool[source]
    -
    - -
    -
    -check_vmm() → int[source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -dump_page_tables(cr3: int, pt_fname: Optional[str] = None) → None[source]
    -
    - -
    -
    -dump_page_tables_all() → None[source]
    -
    - -
    -
    -get_SMRAM() → Tuple[int, int, int][source]
    -
    - -
    -
    -get_SMRR() → Tuple[int, int][source]
    -
    - -
    -
    -get_SMRR_SMRAM() → Tuple[int, int, int][source]
    -
    - -
    -
    -get_TSEG() → Tuple[int, int, int][source]
    -
    - -
    -
    -get_cpu_topology() → Dict[str, Dict[int, List[int]]][source]
    -
    - -
    -
    -get_number_logical_processor_per_core() → int[source]
    -
    - -
    -
    -get_number_logical_processor_per_package() → int[source]
    -
    - -
    -
    -get_number_physical_processor_per_package() → int[source]
    -
    - -
    -
    -get_number_sockets_from_APIC_table() → int[source]
    -
    - -
    -
    -get_number_threads_from_APIC_table() → int[source]
    -
    - -
    -
    -is_HT_active() → bool[source]
    -
    - -
    -
    -read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -write_cr(cpu_thread_id: int, cr_number: int, value: int) → int[source]
    -
    - -
    - -
    +
    @@ -200,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.cmos module

    + title="previous chapter">cmos module

    Next topic

    chipsec.hal.cpuid module

    + title="next chapter">cpuid module

    - +
    @@ -231,20 +134,20 @@

    Navigation

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  • Architecture Overview »
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  • chipsec.hal package »
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    • +
  • hal package »
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  • cpu module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.cpuid.html b/modules/chipsec.hal.cpuid.html index 42452c5a..260f2a7d 100644 --- a/modules/chipsec.hal.cpuid.html +++ b/modules/chipsec.hal.cpuid.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.cpuid module — CHIPSEC documentation - - + + + cpuid module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.cpuid module

    +
    +

    cpuid module

    CPUID information

    usage:
    >>> cpuid(0)
@@ -56,23 +55,7 @@ 
    Navigation
    -
    -
    -class CpuID(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -get_proc_info()[source]
    -
    - -
    - -
    +
    @@ -126,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.cpu module

    + title="previous chapter">cpu module

    Next topic

    chipsec.hal.ec module

    + title="next chapter">ec module

    - +
    @@ -157,20 +140,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
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    • +
  • hal package »
    • +
  • cpuid module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.ec.html b/modules/chipsec.hal.ec.html index 614c0af5..7245d384 100644 --- a/modules/chipsec.hal.ec.html +++ b/modules/chipsec.hal.ec.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.ec module — CHIPSEC documentation - - + + + ec module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.ec module

    +
    +

    ec module

    Access to Embedded Controller (EC)

    Usage:

    >>> write_command( command )
@@ -62,68 +61,7 @@ 
    Navigation
    
 >>> write_range( start_offset, buffer )
    -
    -
    -class EC(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -read_data() → Optional[int][source]
    -
    - -
    -
    -read_idx(offset: int) → int[source]
    -
    - -
    -
    -read_memory(offset: int) → Optional[int][source]
    -
    - -
    -
    -read_memory_extended(word_offset: int) → Optional[int][source]
    -
    - -
    -
    -read_range(start_offset: int, size: int) → bytes[source]
    -
    - -
    -
    -write_command(command: int) → None[source]
    -
    - -
    -
    -write_data(data: int) → None[source]
    -
    - -
    -
    -write_idx(offset: int, value: int) → bool[source]
    -
    - -
    -
    -write_memory(offset: int, data: int) → None[source]
    -
    - -
    -
    -write_memory_extended(word_offset: int, data: int) → None[source]
    -
    - -
    -
    -write_range(start_offset: int, buffer: bytes) → bool[source]
    -
    - -
    - -
    +
    @@ -177,12 +115,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.cpuid module

    + title="previous chapter">cpuid module

    Next topic

    chipsec.hal.hal_base module

    + title="next chapter">hal_base module

    - +
    @@ -208,20 +146,20 @@

    Navigation

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  • ec module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.hal_base.html b/modules/chipsec.hal.hal_base.html index b5d1df56..a46c2447 100644 --- a/modules/chipsec.hal.hal_base.html +++ b/modules/chipsec.hal.hal_base.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.hal_base module — CHIPSEC documentation - - + + + hal_base module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,16 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.hal_base module

    +
    +

    hal_base module

    Base for HAL Components

    -
    -
    -class HALBase(cs)[source]
    -

    Bases: object

    -
    - -
    +
    @@ -110,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.ec module

    + title="previous chapter">ec module

    Next topic

    chipsec.hal.igd module

    + title="next chapter">igd module

    - +
    @@ -141,20 +134,20 @@

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  • hal package »
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  • hal_base module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.html b/modules/chipsec.hal.html index ae3caec7..bbe1cd2b 100644 --- a/modules/chipsec.hal.html +++ b/modules/chipsec.hal.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal package — CHIPSEC documentation - - + + + hal package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -46,58 +45,52 @@

    Navigation

    -
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    chipsec.hal package

    -
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    Submodules

    +
    +

    hal package

    -
    -
    -

    Module contents

    -
    -
    +
    @@ -151,12 +144,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.vmm_cmd module

    + title="previous chapter">vmm_cmd module

    Next topic

    chipsec.hal.acpi module

    + title="next chapter">acpi module

    - +
    @@ -182,19 +175,19 @@

    Navigation

    modules |
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    • \ No newline at end of file diff --git a/modules/chipsec.hal.igd.html b/modules/chipsec.hal.igd.html index fe1ac906..1bc678e5 100644 --- a/modules/chipsec.hal.igd.html +++ b/modules/chipsec.hal.igd.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.igd module — CHIPSEC documentation - - + + + igd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.igd module

    +
    +

    igd module

    Working with Intel processor Integrated Graphics Device (IGD)

    usage:
    >>> gfx_aperture_dma_read(0x80000000, 0x100)
@@ -56,103 +55,7 @@ 
    Navigation
    -
    -
    -class IGD(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -dump_GGTT_PTEs(num: int) → None[source]
    -
    - -
    -
    -get_GGTT_PTE_from_PA(pa: int) → int[source]
    -
    - -
    -
    -get_GGTT_PTE_from_PA_gen8(pa: int) → int[source]
    -
    - -
    -
    -get_GGTT_PTE_from_PA_legacy(pa: int) → int[source]
    -
    - -
    -
    -get_GGTT_base() → int[source]
    -
    - -
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    -get_GMADR() → int[source]
    -
    - -
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    -get_GTTMMADR() → int[source]
    -
    - -
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    -get_PA_from_PTE(pte: int) → int[source]
    -
    - -
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    -get_PA_from_PTE_gen8(pte: int) → int[source]
    -
    - -
    -
    -get_PA_from_PTE_legacy(pte: int) → int[source]
    -
    - -
    -
    -get_PTE_size() → int[source]
    -
    - -
    -
    -gfx_aperture_dma_read_write(address: int, size: int = 4, value: Optional[bytes] = None, pte_num: int = 0) → bytes[source]
    -
    - -
    -
    -is_device_enabled() → bool[source]
    -
    - -
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    -is_enabled() → bool[source]
    -
    - -
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    -is_legacy_gen() → bool[source]
    -
    - -
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    -read_GGTT_PTE(pte_num: int) → int[source]
    -
    - -
    -
    -write_GGTT_PTE(pte_num: int, pte: int) → int[source]
    -
    - -
    -
    -write_GGTT_PTE_from_PA(pte_num: int, pa: int) → int[source]
    -
    - -
    - -
    +
    @@ -206,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.hal_base module

    + title="previous chapter">hal_base module

    Next topic

    chipsec.hal.interrupts module

    + title="next chapter">interrupts module

    - +
    @@ -237,20 +140,20 @@

    Navigation

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  • hal package »
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  • igd module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.interrupts.html b/modules/chipsec.hal.interrupts.html index cbf23183..892202a2 100644 --- a/modules/chipsec.hal.interrupts.html +++ b/modules/chipsec.hal.interrupts.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.interrupts module — CHIPSEC documentation - - + + + interrupts module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.interrupts module

    +
    +

    interrupts module

    Functionality encapsulating interrupt generation CPU Interrupts specific functions (SMI, NMI)

    @@ -58,48 +57,7 @@

    Navigation

    -
    -
    -class Interrupts(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -find_ACPI_SMI_Buffer() → Optional[Tuple[int, int, Optional[chipsec.hal.acpi_tables.GAS]]][source]
    -
    - -
    -
    -find_smmc(start: int, end: int) → int[source]
    -
    - -
    -
    -send_ACPI_SMI(thread_id: int, smi_num: int, buf_addr: int, invoc_reg: chipsec.hal.acpi_tables.GAS, guid: str, data: bytes) → Optional[int][source]
    -
    - -
    -
    -send_NMI() → None[source]
    -
    - -
    -
    -send_SMI_APMC(SMI_code_port_value: int, SMI_data_port_value: int) → None[source]
    -
    - -
    -
    -send_SW_SMI(thread_id: int, SMI_code_port_value: int, SMI_data_port_value: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) → Optional[Tuple[int, int, int, int, int, int, int]][source]
    -
    - -
    -
    -send_smmc_SMI(smmc: int, guid: str, payload: bytes, payload_loc: int, CommandPort: int = 0, DataPort: int = 0) → int[source]
    -
    - -
    - -
    +
    @@ -153,12 +111,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.igd module

    + title="previous chapter">igd module

    Next topic

    chipsec.hal.io module

    + title="next chapter">io module

    - +
    @@ -184,20 +142,20 @@

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  • interrupts module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.io.html b/modules/chipsec.hal.io.html index baf9699e..c949055d 100644 --- a/modules/chipsec.hal.io.html +++ b/modules/chipsec.hal.io.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.io module — CHIPSEC documentation - - + + + io module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.io module

    +
    +

    io module

    Access to Port I/O

    usage:
    >>> read_port_byte( 0x61 )
@@ -61,53 +60,7 @@ 
    Navigation
    -
    -
    -class PortIO(cs)[source]
    -

    Bases: object

    -
    -
    -dump_IO(range_base: int, range_size: int, size: int = 1) → None[source]
    -
    - -
    -
    -read_IO(range_base: int, range_size: int, size: int = 1) → List[int][source]
    -
    - -
    -
    -read_port_byte(io_port: int) → int[source]
    -
    - -
    -
    -read_port_dword(io_port: int) → int[source]
    -
    - -
    -
    -read_port_word(io_port: int) → int[source]
    -
    - -
    -
    -write_port_byte(io_port: int, value: int) → None[source]
    -
    - -
    -
    -write_port_dword(io_port: int, value: int) → None[source]
    -
    - -
    -
    -write_port_word(io_port: int, value: int) → None[source]
    -
    - -
    - -
    +
    @@ -161,12 +114,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.interrupts module

    + title="previous chapter">interrupts module

    Next topic

    chipsec.hal.iobar module

    + title="next chapter">iobar module

    - +
    @@ -192,20 +145,20 @@

    Navigation

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    • \ No newline at end of file diff --git a/modules/chipsec.hal.iobar.html b/modules/chipsec.hal.iobar.html index 3162e933..5b29ce5a 100644 --- a/modules/chipsec.hal.iobar.html +++ b/modules/chipsec.hal.iobar.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.iobar module — CHIPSEC documentation - - + + + iobar module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.iobar module

    +
    +

    iobar module

    I/O BAR access (dump, read/write)

    usage:
    >>> get_IO_BAR_base_address( bar_name )
@@ -59,53 +58,7 @@ 
    Navigation
    -
    -
    -class IOBAR(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -dump_IO_BAR(bar_name: str, size: int = 1) → None[source]
    -
    - -
    -
    -get_IO_BAR_base_address(bar_name: str) → Tuple[int, int][source]
    -
    - -
    -
    -is_IO_BAR_defined(bar_name: str) → bool[source]
    -
    - -
    -
    -is_IO_BAR_enabled(bar_name: str) → bool[source]
    -
    - -
    -
    -list_IO_BARs() → None[source]
    -
    - -
    -
    -read_IO_BAR(bar_name: str, size: int = 1) → List[int][source]
    -
    - -
    -
    -read_IO_BAR_reg(bar_name: str, offset: int, size: int) → int[source]
    -
    - -
    -
    -write_IO_BAR_reg(bar_name: str, offset: int, size: int, value: int) → int[source]
    -
    - -
    - -
    +
    @@ -159,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.io module

    + title="previous chapter">io module

    Next topic

    chipsec.hal.iommu module

    + title="next chapter">iommu module

    - +
    @@ -190,20 +143,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.iobar module
    • +
  • hal package »
    • +
  • iobar module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.iommu.html b/modules/chipsec.hal.iommu.html index ee8a6290..4a47a9a5 100644 --- a/modules/chipsec.hal.iommu.html +++ b/modules/chipsec.hal.iommu.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.iommu module — CHIPSEC documentation - - + + + iommu module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,51 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.iommu module

    +
    +

    iommu module

    Access to IOMMU engines

    -
    -
    -class IOMMU(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -dump_IOMMU_configuration(iommu_engine: str) → None[source]
    -
    - -
    -
    -dump_IOMMU_page_tables(iommu_engine: str) → None[source]
    -
    - -
    -
    -dump_IOMMU_status(iommu_engine: str) → None[source]
    -
    - -
    -
    -get_IOMMU_Base_Address(iommu_engine: str) → int[source]
    -
    - -
    -
    -is_IOMMU_Engine_Enabled(iommu_engine: str) → bool[source]
    -
    - -
    -
    -is_IOMMU_Translation_Enabled(iommu_engine: str) → bool[source]
    -
    - -
    -
    -set_IOMMU_Translation(iommu_engine: str, te: int) → bool[source]
    -
    - -
    - -
    +
    @@ -145,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.iobar module

    + title="previous chapter">iobar module

    Next topic

    chipsec.hal.locks module

    + title="next chapter">locks module

    - +
    @@ -176,20 +134,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.iommu module
    • +
  • hal package »
    • +
  • iommu module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.locks.html b/modules/chipsec.hal.locks.html index 6d6549b8..2085e19f 100644 --- a/modules/chipsec.hal.locks.html +++ b/modules/chipsec.hal.locks.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.locks module — CHIPSEC documentation - - + + + locks module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,63 +46,9 @@

    Navigation

    -
    -

    chipsec.hal.locks module

    -
    -
    -class LockResult[source]
    -

    Bases: object

    -
    -
    -CAN_READ = 8
    -
    - -
    -
    -DEFINED = 1
    -
    - -
    -
    -HAS_CONFIG = 2
    -
    - -
    -
    -INCONSISTENT = 16
    -
    - -
    -
    -LOCKED = 4
    -
    - -
    - -
    -
    -class locks(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -get_locks() → List[str][source]
    -

    Return a list of locks defined within the configuration file

    -
    - -
    -
    -is_locked(lock_name: str, bus: Optional[int] = None) → int[source]
    -

    Return whether the lock has the value setting

    -
    - -
    -
    -lock_valid(lock_name: str, bus: Optional[int] = None) → int[source]
    -
    - -
    - -
    +
    +

    locks module

    +
    @@ -157,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.iommu module

    + title="previous chapter">iommu module

    Next topic

    chipsec.hal.mmio module

    + title="next chapter">mmio module

    - +
    @@ -188,20 +133,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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    • +
  • hal package »
    • +
  • locks module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.mmio.html b/modules/chipsec.hal.mmio.html index 02a7a98b..5fca1227 100644 --- a/modules/chipsec.hal.mmio.html +++ b/modules/chipsec.hal.mmio.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.mmio module — CHIPSEC documentation - - + + + mmio module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.mmio module

    +
    +

    mmio module

    Access to MMIO (Memory Mapped IO) BARs and Memory-Mapped PCI Configuration Space (MMCFG)

    usage:
    >>> read_MMIO_reg(cs, bar_base, 0x0, 4)
@@ -75,160 +74,7 @@ 
    Navigation
    -
    -
    -class ECEntry(bus: int, dev: int, fun: int, off: int, value: int)[source]
    -

    Bases: object

    -
    - -
    -
    -class MMIO(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -dump_MMIO(bar_base: int, size: int) → None[source]
    -
    - -
    -
    -dump_MMIO_BAR(bar_name: str) → None[source]
    -
    - -
    -
    -enable_cache_address_resolution(enable: bool) → None[source]
    -
    - -
    -
    -flush_bar_address_cache() → None[source]
    -
    - -
    -
    -get_MMCFG_base_address() → Tuple[int, int][source]
    -
    - -
    -
    -get_MMIO_BAR_base_address(bar_name: str, bus: Optional[int] = None) → Tuple[int, int][source]
    -
    - -
    -
    -get_extended_capabilities(bus: int, dev: int, fun: int) → List[chipsec.hal.mmio.ECEntry][source]
    -
    - -
    -
    -get_vsec(bus: int, dev: int, fun: int, ecoff: int) → chipsec.hal.mmio.VSECEntry[source]
    -
    - -
    -
    -is_MMIO_BAR_defined(bar_name: str) → bool[source]
    -
    - -
    -
    -is_MMIO_BAR_enabled(bar_name: str, bus: Optional[int] = None) → bool[source]
    -
    - -
    -
    -is_MMIO_BAR_programmed(bar_name: str) → bool[source]
    -
    - -
    -
    -list_MMIO_BARs() → None[source]
    -
    - -
    -
    -read_MMIO(bar_base: int, size: int) → List[int][source]
    -
    - -
    -
    -read_MMIO_BAR(bar_name: str, bus: Optional[int] = None) → List[int][source]
    -
    - -
    -
    -read_MMIO_BAR_reg(bar_name: str, offset: int, size: int = 4, bus: Optional[int] = None) → int[source]
    -
    - -
    -
    -read_MMIO_reg(bar_base: int, offset: int, size: int = 4, bar_size: Optional[int] = None) → int[source]
    -
    - -
    -
    -read_MMIO_reg_byte(bar_base: int, offset: int) → int[source]
    -
    - -
    -
    -read_MMIO_reg_dword(bar_base: int, offset: int) → int[source]
    -
    - -
    -
    -read_MMIO_reg_word(bar_base: int, offset: int) → int[source]
    -
    - -
    -
    -read_mmcfg_reg(bus: int, dev: int, fun: int, off: int, size: int) → int[source]
    -
    - -
    -
    -write_MMIO_BAR_reg(bar_name: str, offset: int, value: int, size: int = 4, bus: Optional[int] = None) → Optional[int][source]
    -
    - -
    -
    -write_MMIO_reg(bar_base: int, offset: int, value: int, size: int = 4) → int[source]
    -
    - -
    -
    -write_MMIO_reg_byte(bar_base: int, offset: int, value: int) → int[source]
    -
    - -
    -
    -write_MMIO_reg_dword(bar_base: int, offset: int, value: int) → int[source]
    -
    - -
    -
    -write_MMIO_reg_word(bar_base: int, offset: int, value: int) → int[source]
    -
    - -
    -
    -write_mmcfg_reg(bus: int, dev: int, fun: int, off: int, size: int, value: int) → bool[source]
    -
    - -
    - -
    -
    -class VSECEntry(value: int)[source]
    -

    Bases: object

    -
    - -
    -
    -print_pci_extended_capability(ecentries: List[chipsec.hal.mmio.ECEntry]) → None[source]
    -
    - -
    +
    @@ -282,12 +128,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.locks module

    + title="previous chapter">locks module

    Next topic

    chipsec.hal.msgbus module

    + title="next chapter">msgbus module

    - +
    @@ -313,20 +159,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.mmio module
    • +
  • hal package »
    • +
  • mmio module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.msgbus.html b/modules/chipsec.hal.msgbus.html index e6d91549..1e24df21 100644 --- a/modules/chipsec.hal.msgbus.html +++ b/modules/chipsec.hal.msgbus.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.msgbus module — CHIPSEC documentation - - + + + msgbus module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.msgbus module

    +
    +

    msgbus module

    Access to message bus (IOSF sideband) interface registers on Intel SoCs

    References:

      @@ -65,201 +64,7 @@

      Navigation

    -
    -
    -class MessageBusOpcode[source]
    -

    Bases: object

    -
    -
    -MB_OPCODE_CFG_READ = 4
    -
    - -
    -
    -MB_OPCODE_CFG_WRITE = 5
    -
    - -
    -
    -MB_OPCODE_CR_READ = 6
    -
    - -
    -
    -MB_OPCODE_CR_WRITE = 7
    -
    - -
    -
    -MB_OPCODE_ESRAM_READ = 18
    -
    - -
    -
    -MB_OPCODE_ESRAM_WRITE = 19
    -
    - -
    -
    -MB_OPCODE_IO_READ = 2
    -
    - -
    -
    -MB_OPCODE_IO_WRITE = 3
    -
    - -
    -
    -MB_OPCODE_MMIO_READ = 0
    -
    - -
    -
    -MB_OPCODE_MMIO_WRITE = 1
    -
    - -
    -
    -MB_OPCODE_REG_READ = 16
    -
    - -
    -
    -MB_OPCODE_REG_WRITE = 17
    -
    - -
    - -
    -
    -class MessageBusPort_Atom[source]
    -

    Bases: object

    -
    -
    -UNIT_AUNIT = 0
    -
    - -
    -
    -UNIT_BUNIT = 3
    -
    - -
    -
    -UNIT_CPU = 2
    -
    - -
    -
    -UNIT_GFX = 6
    -
    - -
    -
    -UNIT_PCIE = 166
    -
    - -
    -
    -UNIT_PMC = 4
    -
    - -
    -
    -UNIT_SATA = 163
    -
    - -
    -
    -UNIT_SMC = 1
    -
    - -
    -
    -UNIT_SMI = 12
    -
    - -
    -
    -UNIT_USB = 67
    -
    - -
    - -
    -
    -class MessageBusPort_Quark[source]
    -

    Bases: object

    -
    -
    -UNIT_HB = 3
    -
    - -
    -
    -UNIT_HBA = 0
    -
    - -
    -
    -UNIT_MM = 5
    -
    - -
    -
    -UNIT_RMU = 4
    -
    - -
    -
    -UNIT_SOC = 49
    -
    - -
    - -
    -
    -class MsgBus(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -mm_msgbus_reg_read(port: int, register: int) → int[source]
    -
    - -
    -
    -mm_msgbus_reg_write(port: int, register: int, data: int) → Optional[int][source]
    -
    - -
    -
    -msgbus_read_message(port: int, register: int, opcode: int) → Optional[int][source]
    -
    - -
    -
    -msgbus_reg_read(port: int, register: int) → Optional[int][source]
    -
    - -
    -
    -msgbus_reg_write(port: int, register: int, data: int) → None[source]
    -
    - -
    -
    -msgbus_send_message(port: int, register: int, opcode: int, data: Optional[int] = None) → Optional[int][source]
    -
    - -
    -
    -msgbus_write_message(port: int, register: int, opcode: int, data: int) → None[source]
    -
    - -
    - -
    +
    @@ -313,12 +118,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.mmio module

    + title="previous chapter">mmio module

    Next topic

    chipsec.hal.msr module

    + title="next chapter">msr module

    - +
    @@ -344,20 +149,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.msgbus module
    • +
  • hal package »
    • +
  • msgbus module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.msr.html b/modules/chipsec.hal.msr.html index 059f168c..2a9c6ae2 100644 --- a/modules/chipsec.hal.msr.html +++ b/modules/chipsec.hal.msr.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.msr module — CHIPSEC documentation - - + + + msr module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.msr module

    +
    +

    msr module

    Access to CPU resources (for each CPU thread): Model Specific Registers (MSR), IDT/GDT

    usage:
    >>> read_msr( 0x8B )
@@ -64,78 +63,7 @@ 
    Navigation
    -
    -
    -class Msr(cs)[source]
    -

    Bases: object

    -
    -
    -GDT(cpu_thread_id: int, num_entries: Optional[int] = None) → Tuple[int, int][source]
    -
    - -
    -
    -GDT_all(num_entries: Optional[int] = None) → None[source]
    -
    - -
    -
    -IDT(cpu_thread_id: int, num_entries: Optional[int] = None) → Tuple[int, int][source]
    -
    - -
    -
    -IDT_all(num_entries: Optional[int] = None) → None[source]
    -
    - -
    -
    -dump_Descriptor_Table(cpu_thread_id: int, code: int, num_entries: Optional[int] = None) → Tuple[int, int][source]
    -
    - -
    -
    -get_Desc_Table_Register(cpu_thread_id: int, code: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_GDTR(cpu_thread_id: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_IDTR(cpu_thread_id: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_LDTR(cpu_thread_id: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_cpu_core_count() → int[source]
    -
    - -
    -
    -get_cpu_thread_count() → int[source]
    -
    - -
    -
    -read_msr(cpu_thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -write_msr(cpu_thread_id: int, msr_addr: int, eax: int, edx: int) → None[source]
    -
    - -
    - -
    +
    @@ -189,12 +117,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.msgbus module

    + title="previous chapter">msgbus module

    Next topic

    chipsec.hal.paging module

    + title="next chapter">paging module

    - +
    @@ -220,20 +148,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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  • chipsec.hal.msr module
    • +
  • hal package »
    • +
  • msr module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.paging.html b/modules/chipsec.hal.paging.html index 4db41f76..14c317ac 100644 --- a/modules/chipsec.hal.paging.html +++ b/modules/chipsec.hal.paging.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.paging module — CHIPSEC documentation - - + + + paging module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,315 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.paging module

    +
    +

    paging module

    x64/IA-64 Paging functionality including x86 page tables, Extended Page Tables (EPT) and VT-d page tables

    -
    -
    -class c_4level_page_tables(cs)[source]
    -

    Bases: chipsec.hal.paging.c_paging

    -
    -
    -get_attr(entry: int) → str[source]
    -
    - -
    -
    -get_virt_addr(pml4e_index: int, pdpte_index: int = 0, pde_index: int = 0, pte_index: int = 0) → int[source]
    -
    - -
    -
    -is_bigpage(entry: int) → int[source]
    -
    - -
    -
    -is_present(entry: int) → int[source]
    -
    - -
    -
    -print_entry(lvl: int, pa: int, va: int = 0, perm: str = '') → None[source]
    -
    - -
    -
    -read_entry_by_virt_addr(virt: int) → Dict[str, Any][source]
    -
    - -
    -
    -read_page_tables(ptr: int) → None[source]
    -
    - -
    -
    -read_pd(addr: int, pml4e_index: int, pdpte_index: int) → None[source]
    -
    - -
    -
    -read_pdpt(addr: int, pml4e_index: int) → None[source]
    -
    - -
    -
    -read_pml4(addr: int) → None[source]
    -
    - -
    -
    -read_pt(addr: int, pml4e_index: int, pdpte_index: int, pde_index: int) → None[source]
    -
    - -
    - -
    -
    -class c_extended_page_tables(cs)[source]
    -

    Bases: chipsec.hal.paging.c_4level_page_tables

    -
    -
    -get_attr(entry: int) → str[source]
    -
    - -
    -
    -is_bigpage(entry: int) → bool[source]
    -
    - -
    -
    -is_present(entry: int) → bool[source]
    -
    - -
    -
    -map_bigpage_1G(virt: int, i: int) → None[source]
    -
    - -
    -
    -read_pt_and_show_status(path: str, name: str, ptr: int) → None[source]
    -
    - -
    - -
    -
    -class c_ia32e_page_tables(cs)[source]
    -

    Bases: chipsec.hal.paging.c_4level_page_tables

    -
    -
    -get_attr(entry: int) → str[source]
    -
    - -
    -
    -is_bigpage(entry: int) → bool[source]
    -
    - -
    -
    -is_present(entry: int) → bool[source]
    -
    - -
    - -
    -
    -class c_pae_page_tables(cs)[source]
    -

    Bases: chipsec.hal.paging.c_ia32e_page_tables

    -
    -
    -read_page_tables(ptr: int) → None[source]
    -
    - -
    -
    -read_pdpt(addr: int, pml4e_index: Optional[int] = None) → None[source]
    -
    - -
    -
    -read_pml4(addr: int)[source]
    -
    - -
    - -
    -
    -class c_paging(cs)[source]
    -

    Bases: chipsec.hal.paging.c_paging_with_2nd_level_translation, chipsec.hal.paging.c_translation

    -
    -
    -check_misconfig(addr_list: List[int]) → None[source]
    -
    - -
    -
    -get_canonical(va: int) → int[source]
    -
    - -
    -
    -get_field(entry: int, desc: Dict[str, int]) → int[source]
    -
    - -
    -
    -load_configuration(path: str) → None[source]
    -
    - -
    -
    -print_info(name: str) → None[source]
    -
    - -
    -
    -read_entries(info: str, addr: int, size: int = 8) → List[Any][source]
    -
    - -
    -
    -read_page_tables(entry: int)[source]
    -
    - -
    -
    -read_pt_and_show_status(path: str, name: str, ptr: int) → None[source]
    -
    - -
    -
    -save_configuration(path: str) → None[source]
    -
    - -
    -
    -set_field(value: int, desc: Dict[str, int]) → int[source]
    -
    - -
    - -
    -
    -class c_paging_memory_access(cs)[source]
    -

    Bases: object

    -
    -
    -readmem(name: str, addr: int, size: int = 4096) → bytes[source]
    -
    - -
    - -
    -
    -class c_paging_with_2nd_level_translation(cs)[source]
    -

    Bases: chipsec.hal.paging.c_paging_memory_access

    -
    -
    -readmem(name: str, addr: int, size: int = 4096) → bytes[source]
    -
    - -
    - -
    -
    -class c_reverse_translation(translation: Dict[int, Dict[str, Any]])[source]
    -

    Bases: object

    -
    -
    -get_reverse_translation(addr: int) → List[Dict[str, Any]][source]
    -
    - -
    - -
    -
    -class c_translation[source]
    -

    Bases: object

    -
    -
    -add_page(virt: int, phys: int, size: str, attr: str) → None[source]
    -
    - -
    -
    -del_page(addr: int) → None[source]
    -
    - -
    -
    -expand_pages(exp_size: str) → None[source]
    -
    - -
    -
    -get_address_space() → int[source]
    -
    - -
    -
    -get_mem_range(noattr: bool = False) → List[List[int]][source]
    -
    - -
    -
    -get_pages_by_physaddr(addr: int) → List[Dict[str, int]][source]
    -
    - -
    -
    -get_translation(addr: int) → Optional[int][source]
    -
    - -
    -
    -is_translation_exist(addr: int, mask: int, size: str) → bool[source]
    -
    - -
    - -
    -
    -class c_vtd_page_tables(cs)[source]
    -

    Bases: chipsec.hal.paging.c_extended_page_tables

    -
    -
    -print_context_entry(source_id: int, cee: Dict[int, int]) → None[source]
    -
    - -
    -
    -read_ce(addr: int, ree_index: int) → None[source]
    -
    - -
    -
    -read_page_tables(ptr: int) → None[source]
    -
    - -
    -
    -read_pt_and_show_status(path: str, name: str, ptr: int) → None[source]
    -
    - -
    -
    -read_re(addr: int) → None[source]
    -
    - -
    -
    -read_vtd_context(path: str, ptr: int) → None[source]
    -
    - -
    - -
    +
    @@ -409,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.msr module

    + title="previous chapter">msr module

    Next topic

    chipsec.hal.pci module

    + title="next chapter">pci module

    - +
    @@ -440,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.paging module
    • +
  • hal package »
    • +
  • paging module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.pci.html b/modules/chipsec.hal.pci.html index 473af796..d82c0fa4 100644 --- a/modules/chipsec.hal.pci.html +++ b/modules/chipsec.hal.pci.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.pci module — CHIPSEC documentation - - + + + pci module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.pci module

    +
    +

    pci module

    Access to of PCI/PCIe device hierarchy - enumerating PCI/PCIe devices - read/write access to PCI configuration headers/registers @@ -67,142 +66,7 @@

    Navigation

    -
    -
    -class EFI_XROM_HEADER(Signature, InitSize, EfiSignature, EfiSubsystem, EfiMachineType, CompressType, Reserved, EfiImageHeaderOffset, PCIROffset)[source]
    -

    Bases: chipsec.hal.pci.EFI_XROM_HEADER

    -
    - -
    -
    -class PCI_XROM_HEADER(Signature, ArchSpecific, PCIROffset)[source]
    -

    Bases: chipsec.hal.pci.PCI_XROM_HEADER

    -
    - -
    -
    -class Pci(cs)[source]
    -

    Bases: object

    -
    -
    -calc_bar_size(bus: int, dev: int, fun: int, off: int, is64: bool, isMMIO: bool) → int[source]
    -
    - -
    -
    -dump_pci_config(bus: int, device: int, function: int) → List[int][source]
    -
    - -
    -
    -enumerate_devices(bus: Optional[int] = None, device: Optional[int] = None, function: Optional[int] = None, spec: Optional[bool] = True) → List[Tuple[int, int, int, int, int, int]][source]
    -
    - -
    -
    -enumerate_xroms(try_init: bool = False, xrom_dump: bool = False, xrom_addr: Optional[int] = None) → List[Optional[chipsec.hal.pci.XROM]][source]
    -
    - -
    -
    -find_XROM(bus: int, dev: int, fun: int, try_init: bool = False, xrom_dump: bool = False, xrom_addr: Optional[int] = None) → Tuple[bool, Optional[chipsec.hal.pci.XROM]][source]
    -
    - -
    -
    -get_DIDVID(bus: int, dev: int, fun: int) → Tuple[int, int][source]
    -
    - -
    -
    -get_device_bars(bus: int, dev: int, fun: int, bCalcSize: bool = False) → List[Tuple[int, bool, bool, int, int, int]][source]
    -
    - -
    -
    -get_header_type(bus, dev, fun)[source]
    -
    - -
    -
    -is_enabled(bus: int, dev: int, fun: int) → bool[source]
    -
    - -
    -
    -parse_XROM(xrom: chipsec.hal.pci.XROM, xrom_dump: bool = False) → Optional[chipsec.hal.pci.PCI_XROM_HEADER][source]
    -
    - -
    -
    -print_pci_config_all() → None[source]
    -
    - -
    -
    -read_byte(bus: int, device: int, function: int, address: int) → int[source]
    -
    - -
    -
    -read_dword(bus: int, device: int, function: int, address: int) → int[source]
    -
    - -
    -
    -read_word(bus: int, device: int, function: int, address: int) → int[source]
    -
    - -
    -
    -write_byte(bus: int, device: int, function: int, address: int, byte_value: int) → None[source]
    -
    - -
    -
    -write_dword(bus: int, device: int, function: int, address: int, dword_value: int) → None[source]
    -
    - -
    -
    -write_word(bus: int, device: int, function: int, address: int, word_value: int) → None[source]
    -
    - -
    - -
    -
    -class XROM(bus, dev, fun, en, base, size)[source]
    -

    Bases: object

    -
    - -
    -
    -class XROM_HEADER(Signature, InitSize, InitEP, Reserved, PCIROffset)[source]
    -

    Bases: chipsec.hal.pci.XROM_HEADER

    -
    - -
    -
    -get_device_name_by_didvid(vid: int, did: int) → str[source]
    -
    - -
    -
    -get_vendor_name_by_vid(vid: int) → str[source]
    -
    - -
    -
    -print_pci_XROMs(_xroms: List[chipsec.hal.pci.XROM]) → None[source]
    -
    - -
    -
    -print_pci_devices(_devices: List[Tuple[int, int, int, int, int]]) → None[source]
    -
    - -
    +
    @@ -256,12 +120,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.paging module

    + title="previous chapter">paging module

    Next topic

    chipsec.hal.pcidb module

    + title="next chapter">pcidb module

    - +
    @@ -287,20 +151,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.pci module
    • +
  • hal package »
    • +
  • pci module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.pcidb.html b/modules/chipsec.hal.pcidb.html index 3d3b0bce..54125b64 100644 --- a/modules/chipsec.hal.pcidb.html +++ b/modules/chipsec.hal.pcidb.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.pcidb module — CHIPSEC documentation - - + + + pcidb module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.pcidb module

    +
    +

    pcidb module

    PCI Vendor & Device ID data.

    Note

    @@ -56,7 +55,7 @@

    Navigation

    Auto generated from:

    https://github.com/pciutils/pciids

    -
    +
    @@ -110,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.pci module

    + title="previous chapter">pci module

    Next topic

    chipsec.hal.physmem module

    + title="next chapter">physmem module

    - +
    @@ -141,20 +140,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.pcidb module
    • +
  • hal package »
    • +
  • pcidb module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.physmem.html b/modules/chipsec.hal.physmem.html index 2c2cc857..2784b487 100644 --- a/modules/chipsec.hal.physmem.html +++ b/modules/chipsec.hal.physmem.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.physmem module — CHIPSEC documentation - - + + + physmem module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.physmem module

    +
    +

    physmem module

    Access to physical memory

    usage:
    >>> read_physical_mem( 0xf0000, 0x100 )
@@ -59,83 +58,7 @@ 
    Navigation
    -
    -
    -class Memory(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -alloc_physical_mem(length: int, max_phys_address: int = 18446744073709551615) → Tuple[int, int][source]
    -
    - -
    -
    -free_physical_mem(pa: int) → bool[source]
    -
    - -
    -
    -map_io_space(pa: int, length: int, cache_type: int) → int[source]
    -
    - -
    -
    -read_physical_mem(phys_address: int, length: int) → bytes[source]
    -
    - -
    -
    -read_physical_mem_byte(phys_address: int) → int[source]
    -
    - -
    -
    -read_physical_mem_dword(phys_address: int) → int[source]
    -
    - -
    -
    -read_physical_mem_qword(phys_address: int) → int[source]
    -
    - -
    -
    -read_physical_mem_word(phys_address: int) → int[source]
    -
    - -
    -
    -set_mem_bit(addr: int, bit: int) → int[source]
    -
    - -
    -
    -va2pa(va: int) → Optional[int][source]
    -
    - -
    -
    -write_physical_mem(phys_address: int, length: int, buf: bytes) → int[source]
    -
    - -
    -
    -write_physical_mem_byte(phys_address: int, byte_value: int) → int[source]
    -
    - -
    -
    -write_physical_mem_dword(phys_address: int, dword_value: int) → int[source]
    -
    - -
    -
    -write_physical_mem_word(phys_address: int, word_value: int) → int[source]
    -
    - -
    - -
    +
    @@ -189,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.pcidb module

    + title="previous chapter">pcidb module

    Next topic

    chipsec.hal.smbios module

    + title="next chapter">smbios module

    - +
    @@ -220,20 +143,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.physmem module
    • +
  • hal package »
    • +
  • physmem module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.smbios.html b/modules/chipsec.hal.smbios.html index 040efb89..ff65ecce 100644 --- a/modules/chipsec.hal.smbios.html +++ b/modules/chipsec.hal.smbios.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.smbios module — CHIPSEC documentation - - + + + smbios module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,75 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.smbios module

    +
    +

    smbios module

    HAL component providing access to and decoding of SMBIOS structures

    -
    -
    -class SMBIOS(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -find_smbios_table() → bool[source]
    -
    - -
    -
    -get_decoded_structs(struct_type: Optional[int] = None, force_32bit: bool = False) → Optional[List[Type[Union[chipsec.hal.smbios.SMBIOS_BIOS_INFO_2_0, chipsec.hal.smbios.SMBIOS_SYSTEM_INFO_2_0]]]][source]
    -
    - -
    -
    -get_header(raw_data: bytes) → Optional[chipsec.hal.smbios.SMBIOS_STRUCT_HEADER][source]
    -
    - -
    -
    -get_raw_structs(struct_type: Optional[int], force_32bit: bool)[source]
    -

    Returns a list of raw data blobs for each SMBIOS structure. The default is to process the 64bit -entries if available unless specifically specified.

    -

    Error: -None

    -
    - -
    -
    -get_string_list(raw_data: bytes) → Optional[List[str]][source]
    -
    - -
    - -
    -
    -class SMBIOS_2_x_ENTRY_POINT(Anchor, EntryCs, EntryLen, MajorVer, MinorVer, MaxSize, EntryRev, FormatArea0, FormatArea1, FormatArea2, FormatArea3, FormatArea4, IntAnchor, IntCs, TableLen, TableAddr, NumStructures, BcdRev)[source]
    -

    Bases: chipsec.hal.smbios.SMBIOS_2_x_ENTRY_POINT

    -
    - -
    -
    -class SMBIOS_3_x_ENTRY_POINT(Anchor, EntryCs, EntryLen, MajorVer, MinorVer, Docrev, EntryRev, Reserved, MaxSize, TableAddr)[source]
    -

    Bases: chipsec.hal.smbios.SMBIOS_3_x_ENTRY_POINT

    -
    - -
    -
    -class SMBIOS_BIOS_INFO_2_0(type, length, handle, vendor_str, version_str, segment, release_str, rom_sz, bios_char, strings)[source]
    -

    Bases: chipsec.hal.smbios.SMBIOS_BIOS_INFO_2_0_ENTRY

    -
    - -
    -
    -class SMBIOS_STRUCT_HEADER(Type, Length, Handle)[source]
    -

    Bases: chipsec.hal.smbios.SMBIOS_STRUCT_HEADER

    -
    - -
    -
    -class SMBIOS_SYSTEM_INFO_2_0(type, length, handle, manufacturer_str, product_str, version_str, serial_str, strings)[source]
    -

    Bases: chipsec.hal.smbios.SMBIOS_SYSTEM_INFO_2_0_ENTRY

    -
    - -
    +
    @@ -169,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.physmem module

    + title="previous chapter">physmem module

    Next topic

    chipsec.hal.smbus module

    + title="next chapter">smbus module

    - +
    @@ -200,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.smbios module
    • +
  • hal package »
    • +
  • smbios module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.smbus.html b/modules/chipsec.hal.smbus.html index 0c60b097..f2fc53a8 100644 --- a/modules/chipsec.hal.smbus.html +++ b/modules/chipsec.hal.smbus.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.smbus module — CHIPSEC documentation - - + + + smbus module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,76 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.smbus module

    +
    +

    smbus module

    Access to SMBus Controller

    -
    -
    -class SMBus(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -display_SMBus_info() → None[source]
    -
    - -
    -
    -enable_SMBus_host_controller() → None[source]
    -
    - -
    -
    -get_SMBus_Base_Address() → int[source]
    -
    - -
    -
    -get_SMBus_HCFG() → int[source]
    -
    - -
    -
    -is_SMBus_enabled() → bool[source]
    -
    - -
    -
    -is_SMBus_host_controller_enabled() → int[source]
    -
    - -
    -
    -is_SMBus_supported() → bool[source]
    -
    - -
    -
    -read_byte(target_address: int, offset: int) → int[source]
    -
    - -
    -
    -read_range(target_address: int, start_offset: int, size: int) → bytes[source]
    -
    - -
    -
    -reset_SMBus_controller() → bool[source]
    -
    - -
    -
    -write_byte(target_address: int, offset: int, value: int) → bool[source]
    -
    - -
    -
    -write_range(target_address: int, start_offset: int, buffer: bytes) → bool[source]
    -
    - -
    - -
    +
    @@ -170,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.smbios module

    + title="previous chapter">smbios module

    Next topic

    chipsec.hal.spd module

    + title="next chapter">spd module

    - +
    @@ -201,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.smbus module
    • +
  • hal package »
    • +
  • smbus module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.spd.html b/modules/chipsec.hal.spd.html index e37a8fd7..91e633d7 100644 --- a/modules/chipsec.hal.spd.html +++ b/modules/chipsec.hal.spd.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.spd module — CHIPSEC documentation - - + + + spd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.spd module

    +
    +

    spd module

    Access to Memory (DRAM) Serial Presence Detect (SPD) EEPROM

    References:

    http://www.jedec.org/sites/default/files/docs/4_01_02R19.pdf @@ -59,107 +58,7 @@

    Navigation

    https://www.simmtester.com/News/PublicationArticle/153 https://www.simmtester.com/News/PublicationArticle/101 http://en.wikipedia.org/wiki/Serial_presence_detect

    -
    -
    -class SPD(smbus)[source]
    -

    Bases: object

    -
    -
    -decode(device: int = 160) → None[source]
    -
    - -
    -
    -detect() → List[int][source]
    -
    - -
    -
    -dump_spd_rom(device: int = 160) → bytes[source]
    -
    - -
    -
    -getDRAMDeviceType(device: int = 160) → int[source]
    -
    - -
    -
    -getModuleType(device: int = 160) → int[source]
    -
    - -
    -
    -isECC(device: int = 160) → bool[source]
    -
    - -
    -
    -isSPDPresent(device: int = 160) → bool[source]
    -
    - -
    -
    -read_byte(offset: int, device: int = 160) → int[source]
    -
    - -
    -
    -read_range(start_offset: int, size: int, device: int = 160) → bytes[source]
    -
    - -
    -
    -write_byte(offset: int, value: int, device: int = 160) → bool[source]
    -
    - -
    -
    -write_range(start_offset: int, buffer: bytes, device: int = 160) → bool[source]
    -
    - -
    - -
    -
    -class SPD_DDR(SPDBytes, TotalBytes, DeviceType, RowAddressCount)[source]
    -

    Bases: chipsec.hal.spd.SPD_DDR

    -
    - -
    -
    -class SPD_DDR2(SPDBytes, TotalBytes, DeviceType, RowAddressCount)[source]
    -

    Bases: chipsec.hal.spd.SPD_DDR2

    -
    - -
    -
    -class SPD_DDR3(SPDBytes, Revision, DeviceType, ModuleType, ChipSize, Addressing, Voltages, ModuleOrg, BusWidthECC, FTB, MTBDivident, MTBDivisor, tCKMin, RsvdD, CASLo, CASHi)[source]
    -

    Bases: chipsec.hal.spd.SPD_DDR3

    -
    - -
    -
    -class SPD_DDR4(SPDBytes, Revision, DeviceType, ModuleType, Density, Addressing, PackageType, OptFeatures, ThermalRefresh, OptFeatures1, ReservedA, VDD, ModuleOrg, BusWidthECC, ThermSensor, ModuleTypeExt)[source]
    -

    Bases: chipsec.hal.spd.SPD_DDR4

    -
    - -
    -
    -SPD_REVISION(revision: int) → str[source]
    -
    - -
    -
    -dram_device_type_name(dram_type: int) → str[source]
    -
    - -
    -
    -module_type_name(module_type: int) → str[source]
    -
    - -
    +
    @@ -213,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.smbus module

    + title="previous chapter">smbus module

    Next topic

    chipsec.hal.spi module

    + title="next chapter">spi module

    - +
    @@ -244,20 +143,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.spd module
    • +
  • hal package »
    • +
  • spd module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.spi.html b/modules/chipsec.hal.spi.html index 2d565e16..810e3976 100644 --- a/modules/chipsec.hal.spi.html +++ b/modules/chipsec.hal.spi.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.spi module — CHIPSEC documentation - - + + + spi module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.spi module

    +
    +

    spi module

    Access to SPI Flash parts

    usage:
    >>> read_spi( spi_fla, length )
@@ -71,149 +70,7 @@ 
    Navigation
    
 
    Approximate performance (on 2-core SMT Intel Core i5-4300U (Haswell) CPU 1.9GHz):
 SPI read: ~7 sec per 1MB (with DBC=64)
    -
    -
    -class SPI(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -SpiRegions
    -

    alias of Dict[int, Tuple[int, int, int, str, int]]

    -
    - -
    -
    -check_hardware_sequencing() → None[source]
    -
    - -
    -
    -disable_BIOS_write_protection() → bool[source]
    -
    - -
    -
    -display_BIOS_region() → None[source]
    -
    - -
    -
    -display_BIOS_write_protection() → None[source]
    -
    - -
    -
    -display_SPI_Flash_Descriptor() → None[source]
    -
    - -
    -
    -display_SPI_Flash_Regions() → None[source]
    -
    - -
    -
    -display_SPI_Protected_Ranges() → None[source]
    -
    - -
    -
    -display_SPI_Ranges_Access_Permissions() → None[source]
    -
    - -
    -
    -display_SPI_map() → None[source]
    -
    - -
    -
    -display_SPI_opcode_info() → None[source]
    -
    - -
    -
    -erase_spi_block(spi_fla: int) → bool[source]
    -
    - -
    -
    -get_SPI_JEDEC_ID() → int[source]
    -
    - -
    -
    -get_SPI_JEDEC_ID_decoded() → Tuple[int, str, str][source]
    -
    - -
    -
    -get_SPI_MMIO_base() → int[source]
    -
    - -
    -
    -get_SPI_Protected_Range(pr_num: int) → Tuple[int, int, int, int, int, int][source]
    -
    - -
    -
    -get_SPI_SFDP() → bool[source]
    -
    - -
    -
    -get_SPI_region(spi_region_id: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_SPI_regions(all_regions: bool = True) → Dict[int, Tuple[int, int, int, str, int]][source]
    -
    - -
    -
    -ptmesg(offset: int) → int[source]
    -
    - -
    -
    -read_spi(spi_fla: int, data_byte_count: int) → bytes[source]
    -
    - -
    -
    -read_spi_to_file(spi_fla: int, data_byte_count: int, filename: str) → bytes[source]
    -
    - -
    -
    -spi_reg_read(reg: int, size: int = 4) → int[source]
    -
    - -
    -
    -spi_reg_write(reg: int, value: int, size: int = 4) → Optional[int][source]
    -
    - -
    -
    -write_spi(spi_fla: int, buf: bytes) → bool[source]
    -
    - -
    -
    -write_spi_from_file(spi_fla: int, filename: str) → bool[source]
    -
    - -
    - -
    -
    -get_SPI_region(flreg: int) → Tuple[int, int][source]
    -
    - -
    +
    @@ -267,12 +124,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.spd module

    + title="previous chapter">spd module

    Next topic

    chipsec.hal.spi_descriptor module

    + title="next chapter">spi_descriptor module

    - +
    @@ -298,20 +155,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.spi module
    • +
  • hal package »
    • +
  • spi module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.spi_descriptor.html b/modules/chipsec.hal.spi_descriptor.html index ccedcd93..898f49c6 100644 --- a/modules/chipsec.hal.spi_descriptor.html +++ b/modules/chipsec.hal.spi_descriptor.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.spi_descriptor module — CHIPSEC documentation - - + + + spi_descriptor module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.spi_descriptor module

    +
    +

    spi_descriptor module

    SPI Flash Descriptor binary parsing functionality

    usage:
    >>> fd = read_file( fd_file )
@@ -57,27 +56,7 @@ 
    Navigation
    -
    -
    -get_SPI_master(flmstr: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_spi_flash_descriptor(rom: bytes) → Tuple[int, bytes][source]
    -
    - -
    -
    -get_spi_regions(fd: bytes) → Optional[List[Tuple[int, str, int, int, int, bool]]][source]
    -
    - -
    -
    -parse_spi_flash_descriptor(cs, rom: bytes) → None[source]
    -
    - -
    +
    @@ -131,12 +110,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.spi module

    + title="previous chapter">spi module

    Next topic

    chipsec.hal.spi_jedec_ids module

    + title="next chapter">spi_jedec_ids module

    - +
    @@ -162,20 +141,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.spi_descriptor module
    • +
  • hal package »
    • +
  • spi_descriptor module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.spi_jedec_ids.html b/modules/chipsec.hal.spi_jedec_ids.html index 58d39469..5676a4b9 100644 --- a/modules/chipsec.hal.spi_jedec_ids.html +++ b/modules/chipsec.hal.spi_jedec_ids.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.spi_jedec_ids module — CHIPSEC documentation - - + + + spi_jedec_ids module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,26 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.spi_jedec_ids module

    +
    +

    spi_jedec_ids module

    JEDED ID : Manufacturers and Device IDs

    -
    -
    -class JEDEC_ID[source]
    -

    Bases: object

    -
    -
    -DEVICE: Dict[int, str] = {12722199: 'MX25L6408', 12722200: 'MX25L12805', 15679511: 'W25Q64FV (SPI)', 15679512: 'W25Q128 (SPI)', 15679513: 'W25Q256', 15687703: 'W25Q64FV (QPI)', 15687704: 'W25Q128 (QPI)', 15691798: 'W25Q32JV'}
    -
    - -
    -
    -MANUFACTURER: Dict[int, str] = {194: 'Macronix', 239: 'Winbond'}
    -
    - -
    - -
    +
    @@ -120,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.spi_descriptor module

    + title="previous chapter">spi_descriptor module

    Next topic

    chipsec.hal.spi_uefi module

    + title="next chapter">spi_uefi module

    - +
    @@ -151,20 +134,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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  • chipsec.hal.spi_jedec_ids module
    • +
  • hal package »
    • +
  • spi_jedec_ids module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.spi_uefi.html b/modules/chipsec.hal.spi_uefi.html index a53d8c18..bcbec9e1 100644 --- a/modules/chipsec.hal.spi_uefi.html +++ b/modules/chipsec.hal.spi_uefi.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.spi_uefi module — CHIPSEC documentation - - + + + spi_uefi module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.spi_uefi module

    +
    +

    spi_uefi module

    UEFI firmware image parsing and manipulation functionality

    usage:
    >>> parse_uefi_region_from_file(_uefi, filename, fwtype, outpath):
@@ -56,140 +55,7 @@ 
    Navigation
    -
    -
    -class EFIModuleType[source]
    -

    Bases: object

    -
    -
    -FILE = 4
    -
    - -
    -
    -FV = 2
    -
    - -
    -
    -SECTION = 1
    -
    - -
    -
    -SECTION_EXE = 0
    -
    - -
    - -
    -
    -FILENAME(mod: Union[chipsec.hal.uefi_fv.EFI_FILE, chipsec.hal.uefi_fv.EFI_SECTION], parent: Optional[EFI_MODULE], modn: int) → str[source]
    -
    - -
    -
    -class UUIDEncoder(*, skipkeys=False, ensure_ascii=True, check_circular=True, allow_nan=True, sort_keys=False, indent=None, separators=None, default=None)[source]
    -

    Bases: json.encoder.JSONEncoder

    -
    -
    -default(obj: Any)[source]
    -

    Implement this method in a subclass such that it returns -a serializable object for o, or calls the base implementation -(to raise a TypeError).

    -

    For example, to support arbitrary iterators, you could -implement default like this:

    -
    def default(self, o):
-    try:
-        iterable = iter(o)
-    except TypeError:
-        pass
-    else:
-        return list(iterable)
-    # Let the base class default method raise the TypeError
-    return JSONEncoder.default(self, o)
-
    -
    -
    - -
    - -
    -
    -build_efi_file_tree(fv_img: bytes, fwtype: str) → List[chipsec.hal.uefi_fv.EFI_FILE][source]
    -
    - -
    -
    -build_efi_model(data: bytes, fwtype: str) → List[EFI_MODULE][source]
    -
    - -
    -
    -build_efi_modules_tree(fwtype: str, data: bytes, Size: int, offset: int, polarity: bool) → List[chipsec.hal.uefi_fv.EFI_SECTION][source]
    -
    - -
    -
    -build_efi_tree(data: bytes, fwtype: str) → List[EFI_MODULE][source]
    -
    - -
    -
    -compress_image(image: bytes, compression_type: int) → bytes[source]
    -
    - -
    -
    -decode_uefi_region(pth: str, fname: str, fwtype: str, filetype: List[int] = []) → None[source]
    -
    - -
    -
    -decompress_section_data(section_dir_path: str, sec_fs_name: str, compressed_data: bytes, compression_type: int) → bytes[source]
    -
    - -
    -
    -dump_efi_module(mod, parent: Optional[EFI_MODULE], modn: int, path: str) → str[source]
    -
    - -
    - -
    - -
    -
    -modify_uefi_region(data: bytes, command: int, guid: uuid.UUID, uefi_file: bytes = b'') → bytes[source]
    -
    - -
    -
    -parse_uefi_region_from_file(filename: str, fwtype: str, outpath: Optional[str] = None, filetype: List[int] = []) → None[source]
    -
    - -
    -
    -save_efi_tree(modules: List[EFI_MODULE], parent: Optional[EFI_MODULE] = None, save_modules: bool = True, path: str = '', save_log: bool = True, lvl: int = 0) → List[Dict[str, Any]][source]
    -
    - -
    -
    -save_efi_tree_filetype(modules: List[EFI_MODULE], parent: Optional[EFI_MODULE] = None, path: str = '', lvl: int = 0, filetype: List[int] = [], save: bool = False) → List[Dict[str, Any]][source]
    -
    - -
    -
    -search_efi_tree(modules: List[EFI_MODULE], search_callback: Optional[Callable], match_module_types: int = 0, findall: bool = True) → List[EFI_MODULE][source]
    -
    - -
    -
    -update_efi_tree(modules: List[EFI_MODULE], parent_guid: Optional[uuid.UUID] = None) → str[source]
    -
    - -
    +
    @@ -243,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.spi_jedec_ids module

    + title="previous chapter">spi_jedec_ids module

    Next topic

    chipsec.hal.tpm module

    + title="next chapter">tpm module

    - +
    @@ -274,20 +140,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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  • chipsec.hal.spi_uefi module
    • +
  • hal package »
    • +
  • spi_uefi module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.tpm.html b/modules/chipsec.hal.tpm.html index 191d6b6a..3ee69b34 100644 --- a/modules/chipsec.hal.tpm.html +++ b/modules/chipsec.hal.tpm.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.tpm module — CHIPSEC documentation - - + + + tpm module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,75 +46,11 @@

    Navigation

    -
    -

    chipsec.hal.tpm module

    +
    +

    tpm module

    Trusted Platform Module (TPM) HAL component

    https://trustedcomputinggroup.org

    -
    -
    -class TPM(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -command(commandName: str, locality: str, *command_argv: str) → None[source]
    -

    Send command to the TPM and receive data

    -
    - -
    -
    -dump_access(locality: str) → None[source]
    -

    View the contents of the register used to gain ownership of the TPM

    -
    - -
    -
    -dump_didvid(locality: str) → None[source]
    -

    TPM’s Vendor and Device ID

    -
    - -
    -
    -dump_intcap(locality: str) → None[source]
    -

    Provides information of which interrupts that particular TPM supports

    -
    - -
    -
    -dump_intenable(locality: str) → None[source]
    -

    View the contents of the register used to enable specific interrupts

    -
    - -
    -
    -dump_register(register_name: str, locality: str) → None[source]
    -
    - -
    -
    -dump_rid(locality: str) → None[source]
    -

    TPM’s Revision ID

    -
    - -
    -
    -dump_status(locality: str) → None[source]
    -

    View general status details

    -
    - -
    -
    -log_register_header(register_name: str, locality: str) → None[source]
    -
    - -
    - -
    -
    -class TPM_RESPONSE_HEADER(ResponseTag, DataSize, ReturnCode)[source]
    -

    Bases: chipsec.hal.tpm.TPM_RESPONSE_HEADER

    -
    - -
    +
    @@ -169,12 +104,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.spi_uefi module

    + title="previous chapter">spi_uefi module

    Next topic

    chipsec.hal.tpm12_commands module

    + title="next chapter">tpm12_commands module

    - +
    @@ -200,20 +135,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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  • chipsec.hal.tpm module
    • +
  • hal package »
    • +
  • tpm module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.tpm12_commands.html b/modules/chipsec.hal.tpm12_commands.html index 72930589..23ab4f08 100644 --- a/modules/chipsec.hal.tpm12_commands.html +++ b/modules/chipsec.hal.tpm12_commands.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.tpm12_commands module — CHIPSEC documentation - - + + + tpm12_commands module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,55 +46,12 @@

    Navigation

    -
    -

    chipsec.hal.tpm12_commands module

    +
    +

    tpm12_commands module

    Definition for TPMv1.2 commands to use with TPM HAL

    TCG PC Client TPM Specification TCG TPM v1.2 Specification

    -
    -
    -continueselftest(*command_argv: str) → Tuple[bytes, int][source]
    -

    TPM_ContinueSelfTest informs the TPM that it should complete self-test of all TPM functions. The TPM may return success immediately and then perform the self-test, or it may perform the self-test and then return success or failure.

    -
    - -
    -
    -forceclear(*command_argv: str) → Tuple[bytes, int][source]
    -
    - -
    -
    -getcap(*command_argv: str) → Tuple[bytes, int][source]
    -

    Returns current information regarding the TPM -CapArea - Capabilities Area -SubCapSize - Size of SubCapabilities -SubCap - Subcapabilities

    -
    - -
    -
    -nvread(*command_argv: str) → Tuple[bytes, int][source]
    -

    Read a value from the NV store -Index, Offset, Size

    -
    - -
    -
    -pcrread(*command_argv: str) → Tuple[bytes, int][source]
    -

    The TPM_PCRRead operation provides non-cryptographic reporting of the contents of a named PCR

    -
    - -
    -
    -startup(*command_argv: str) → Tuple[bytes, int][source]
    -

    Execute a tpm_startup command. TPM_Startup is always preceded by TPM_Init, which is the physical indication (a system wide reset) that TPM initialization is necessary -Type of Startup to be used: -1: TPM_ST_CLEAR -2: TPM_ST_STATE -3: TPM_ST_DEACTIVATED

    -
    - -
    +
    @@ -149,12 +105,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.tpm module

    + title="previous chapter">tpm module

    Next topic

    chipsec.hal.tpm_eventlog module

    + title="next chapter">tpm_eventlog module

    - +
    @@ -180,20 +136,20 @@

    Navigation

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  • Architecture Overview »
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    • +
  • hal package »
    • +
  • tpm12_commands module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.tpm_eventlog.html b/modules/chipsec.hal.tpm_eventlog.html index 33bdbc59..76499072 100644 --- a/modules/chipsec.hal.tpm_eventlog.html +++ b/modules/chipsec.hal.tpm_eventlog.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.tpm_eventlog module — CHIPSEC documentation - - + + + tpm_eventlog module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,66 +46,15 @@

    Navigation

    -
    -

    chipsec.hal.tpm_eventlog module

    +
    +

    tpm_eventlog module

    Trusted Platform Module Event Log

    Based on the following specifications:

    TCG EFI Platform Specification For TPM Family 1.1 or 1.2

    TCG PC Client Specific Implementation Specification for Conventional BIOS”, version 1.21

    TCG EFI Protocol Specification, Family “2.0”

    TCG PC Client Platform Firmware Profile Specification

    -
    -
    -class EFIFirmwareBlob(*args: Any)[source]
    -

    Bases: chipsec.hal.tpm_eventlog.TcgPcrEvent

    -
    - -
    -
    -class PcrLogParser(log: BinaryIO)[source]
    -

    Bases: object

    -

    Iterator over the events of a log.

    -
    -
    -next() → chipsec.hal.tpm_eventlog.TcgPcrEvent[source]
    -
    - -
    - -
    -
    -class SCRTMVersion(*args: Any)[source]
    -

    Bases: chipsec.hal.tpm_eventlog.TcgPcrEvent

    -
    - -
    -
    -class TcgPcrEvent(pcr_index: int, event_type: int, digest: bytes, event_size: int, event: Any)[source]
    -

    Bases: object

    -

    An Event (TPM 1.2 format) as recorded in the SML.

    -
    -
    -classmethod parse(log: BinaryIO) → Optional[chipsec.hal.tpm_eventlog.EventType][source]
    -

    Try to read an event from the log.

    -
    -
    Args:

    log (file-like): Log where the event is stored.

    -
    -
    Returns:

    An instance of the created event. If a subclass -exists for such event_type, an object of this class -is returned. Otherwise, a TcgPcrEvent is returned.

    -
    -
    -
    - -
    - -
    -
    -parse(log: BinaryIO) → None[source]
    -

    Simple wrapper around PcrLogParser.

    -
    - -
    +
    @@ -160,12 +108,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.tpm12_commands module

    + title="previous chapter">tpm12_commands module

    Next topic

    chipsec.hal.ucode module

    + title="next chapter">ucode module

    - +
    @@ -191,20 +139,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
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    • +
  • hal package »
    • +
  • tpm_eventlog module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.ucode.html b/modules/chipsec.hal.ucode.html index cfdf7898..f4441b0a 100644 --- a/modules/chipsec.hal.ucode.html +++ b/modules/chipsec.hal.ucode.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.ucode module — CHIPSEC documentation - - + + + ucode module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.ucode module

    +
    +

    ucode module

    Microcode update specific functionality (for each CPU thread)

    usage:
    >>> ucode_update_id( 0 )
@@ -59,54 +58,7 @@ 
    Navigation
    -
    -
    -class Ucode(cs)[source]
    -

    Bases: object

    -
    -
    -get_cpu_thread_count() → int[source]
    -
    - -
    -
    -load_ucode_update(cpu_thread_id: int, ucode_buf: AnyStr) → int[source]
    -
    - -
    -
    -ucode_update_id(cpu_thread_id: int) → int[source]
    -
    - -
    -
    -update_ucode(cpu_thread_id: int, ucode_file: str) → int[source]
    -
    - -
    -
    -update_ucode_all_cpus(ucode_file: str) → bool[source]
    -
    - -
    - -
    -
    -class UcodeUpdateHeader(header_version, update_revision, date, processor_signature, checksum, loader_revision, processor_flags, data_size, total_size, reserved1, reserved2, reserved3)[source]
    -

    Bases: chipsec.hal.ucode.UcodeUpdateHeader

    -
    - -
    -
    -dump_ucode_update_header(pdb_ucode_buffer: bytes) → chipsec.hal.ucode.UcodeUpdateHeader[source]
    -
    - -
    -
    -read_ucode_file(ucode_filename: str) → bytes[source]
    -
    - -
    +
    @@ -160,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.tpm_eventlog module

    + title="previous chapter">tpm_eventlog module

    Next topic

    chipsec.hal.uefi module

    + title="next chapter">uefi module

    - +
    @@ -191,20 +143,20 @@

    Navigation

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  • ucode module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.uefi.html b/modules/chipsec.hal.uefi.html index bf5ff9ff..673f55ad 100644 --- a/modules/chipsec.hal.uefi.html +++ b/modules/chipsec.hal.uefi.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.uefi module — CHIPSEC documentation - - + + + uefi module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,162 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.uefi module

    +
    +

    uefi module

    Main UEFI component using platform specific and common UEFI functionality

    -
    -
    -class UEFI(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -EfiTable
    -

    alias of Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_TABLE_HEADER], Optional[EFI_SYSTEM_TABLE], bytes]

    -
    - -
    -
    -delete_EFI_variable(name: str, guid: str) → Optional[int][source]
    -
    - -
    -
    -dump_EFI_tables() → None[source]
    -
    - -
    -
    -dump_EFI_variables_from_SPI() → bytes[source]
    -
    - -
    -
    -find_EFI_BootServices_Table() → Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_TABLE_HEADER], Optional[EFI_SYSTEM_TABLE], bytes][source]
    -
    - -
    -
    -find_EFI_Configuration_Table() → Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_CONFIGURATION_TABLE], bytes][source]
    -
    - -
    -
    -find_EFI_DXEServices_Table() → Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_TABLE_HEADER], Optional[EFI_SYSTEM_TABLE], bytes][source]
    -
    - -
    -
    -find_EFI_RuntimeServices_Table() → Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_TABLE_HEADER], Optional[EFI_SYSTEM_TABLE], bytes][source]
    -
    - -
    -
    -find_EFI_System_Table() → Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_TABLE_HEADER], Optional[EFI_SYSTEM_TABLE], bytes][source]
    -
    - -
    -
    -find_EFI_Table(table_sig: str) → Tuple[bool, int, Optional[chipsec.hal.uefi_common.EFI_TABLE_HEADER], Optional[EFI_SYSTEM_TABLE], bytes][source]
    -
    - -
    -
    -find_s3_bootscript() → Tuple[bool, List[int]][source]
    -
    - -
    -
    -get_EFI_variable(name: str, guid: str, filename: Optional[str] = None) → Optional[bytes][source]
    -
    - -
    -
    -get_s3_bootscript(log_script: bool = False) → Tuple[List[int], Optional[Dict[int, List[S3BOOTSCRIPT_ENTRY]]]][source]
    -
    - -
    -
    -list_EFI_variables() → Optional[Dict[str, List[Tuple[int, bytes, int, bytes, str, int]]]][source]
    -
    - -
    -
    -read_EFI_variables(efi_var_store: Optional[bytes], authvars: bool) → Dict[str, List[EfiVariableType]][source]
    -
    - -
    -
    -read_EFI_variables_from_SPI(BIOS_region_base: int, BIOS_region_size: int) → bytes[source]
    -
    - -
    -
    -read_EFI_variables_from_file(filename: str) → bytes[source]
    -
    - -
    -
    -set_EFI_variable(name: str, guid: str, var: bytes, datasize: Optional[int] = None, attrs: Optional[int] = None) → Optional[int][source]
    -
    - -
    -
    -set_EFI_variable_from_file(name: str, guid: str, filename: str, datasize: Optional[int] = None, attrs: Optional[int] = None) → Optional[int][source]
    -
    - -
    -
    -set_FWType(efi_nvram_format: str) → None[source]
    -
    - -
    - -
    -
    -decode_EFI_variables(efi_vars: Dict[str, List[EfiVariableType]], nvram_pth: str) → None[source]
    -
    - -
    -
    -find_EFI_variable_store(rom_buffer: Optional[bytes], _FWType: Optional[str]) → bytes[source]
    -
    - -
    -
    -get_attr_string(attr: int) → str[source]
    -
    - -
    -
    -get_auth_attr_string(attr: int) → str[source]
    -
    - -
    -
    -identify_EFI_NVRAM(buffer: bytes) → str[source]
    -
    - -
    -
    -parse_EFI_variables(fname: str, rom: bytes, authvars: bool, _fw_type: Optional[str] = None) → bool[source]
    -
    - -
    -
    -parse_script(script: bytes, log_script: bool = False) → List[S3BOOTSCRIPT_ENTRY][source]
    -
    - -
    -
    -print_efi_variable(offset: int, var_buf: bytes, var_header: EfiTableType, var_name: str, var_data: bytes, var_guid: str, var_attrib: int) → None[source]
    -
    - -
    -
    -print_sorted_EFI_variables(variables: Dict[str, List[EfiVariableType]]) → None[source]
    -
    - -
    +
    @@ -256,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.ucode module

    + title="previous chapter">ucode module

    Next topic

    chipsec.hal.uefi_common module

    + title="next chapter">uefi_common module

    - +
    @@ -287,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.uefi module
    • +
  • hal package »
    • +
  • uefi module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.uefi_common.html b/modules/chipsec.hal.uefi_common.html index 0433053f..a2800d0f 100644 --- a/modules/chipsec.hal.uefi_common.html +++ b/modules/chipsec.hal.uefi_common.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.uefi_common module — CHIPSEC documentation - - + + + uefi_common module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,643 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.uefi_common module

    +
    +

    uefi_common module

    Common UEFI/EFI functionality including UEFI variables, Firmware Volumes, Secure Boot variables, S3 boot-script, UEFI tables, etc.

    -
    -
    -class EFI_BOOT_SERVICES_TABLE(RaiseTPL, RestoreTPL, AllocatePages, FreePages, GetMemoryMap, AllocatePool, FreePool, CreateEvent, SetTimer, WaitForEvent, SignalEvent, CloseEvent, CheckEvent, InstallProtocolInterface, ReinstallProtocolInterface, UninstallProtocolInterface, HandleProtocol, Reserved, RegisterProtocolNotify, LocateHandle, LocateDevicePath, InstallConfigurationTable, LoadImage, StartImage, Exit, UnloadImage, ExitBootServices, GetNextMonotonicCount, Stall, SetWatchdogTimer, ConnectController, DisconnectController, OpenProtocol, CloseProtocol, OpenProtocolInformation, ProtocolsPerHandle, LocateHandleBuffer, LocateProtocol, InstallMultipleProtocolInterfaces, UninstallMultipleProtocolInterfaces, CalculateCrc32, CopyMem, SetMem, CreateEventEx)[source]
    -

    Bases: chipsec.hal.uefi_common.EFI_BOOT_SERVICES_TABLE

    -
    - -
    -
    -class EFI_CONFIGURATION_TABLE[source]
    -

    Bases: object

    -
    - -
    -
    -class EFI_DXE_SERVICES_TABLE(AddMemorySpace, AllocateMemorySpace, FreeMemorySpace, RemoveMemorySpace, GetMemorySpaceDescriptor, SetMemorySpaceAttributes, GetMemorySpaceMap, AddIoSpace, AllocateIoSpace, FreeIoSpace, RemoveIoSpace, GetIoSpaceDescriptor, GetIoSpaceMap, Dispatch, Schedule, Trust, ProcessFirmwareVolume)[source]
    -

    Bases: chipsec.hal.uefi_common.EFI_DXE_SERVICES_TABLE

    -
    - -
    -
    -EFI_ERROR_STR(error: int) → str[source]
    -

    Translates an EFI_STATUS value into its corresponding textual representation.

    -
    - -
    -
    -EFI_GUID_STR(guid: bytes) → str[source]
    -
    - -
    -
    -class EFI_RUNTIME_SERVICES_TABLE(GetTime, SetTime, GetWakeupTime, SetWakeupTime, SetVirtualAddressMap, ConvertPointer, GetVariable, GetNextVariableName, SetVariable, GetNextHighMonotonicCount, ResetSystem, UpdateCapsule, QueryCapsuleCapabilities, QueryVariableInfo)[source]
    -

    Bases: chipsec.hal.uefi_common.EFI_RUNTIME_SERVICES_TABLE

    -
    - -
    -
    -class EFI_SYSTEM_TABLE(FirmwareVendor, FirmwareRevision, ConsoleInHandle, ConIn, ConsoleOutHandle, ConOut, StandardErrorHandle, StdErr, RuntimeServices, BootServices, NumberOfTableEntries, ConfigurationTable)[source]
    -

    Bases: chipsec.hal.uefi_common.EFI_SYSTEM_TABLE

    -
    - -
    -
    -EFI_SYSTEM_TABLE_REVISION(revision: int) → str[source]
    -
    - -
    -
    -class EFI_TABLE_HEADER(Signature, Revision, HeaderSize, CRC32, Reserved)[source]
    -

    Bases: chipsec.hal.uefi_common.EFI_TABLE_HEADER

    -
    - -
    -
    -class EFI_VENDOR_TABLE(VendorGuidData, VendorTable)[source]
    -

    Bases: chipsec.hal.uefi_common.EFI_VENDOR_TABLE

    -
    -
    -VendorGuid() → str[source]
    -
    - -
    - -
    -
    -IS_EFI_VARIABLE_AUTHENTICATED(attr: int) → bool[source]
    -
    - -
    -
    -IS_VARIABLE_ATTRIBUTE(_c: int, _Mask: int) → bool[source]
    -
    - -
    -
    -class S3BOOTSCRIPT_ENTRY(script_type: int, index: Optional[int], offset_in_script: int, length: int, data: Optional[bytes] = None)[source]
    -

    Bases: object

    -
    - -
    -
    -class S3BootScriptOpcode[source]
    -

    Bases: object

    -
    -
    -EFI_BOOT_SCRIPT_DISPATCH_OPCODE = 8
    -
    - -
    -
    -EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE = 1
    -
    - -
    -
    -EFI_BOOT_SCRIPT_IO_WRITE_OPCODE = 0
    -
    - -
    -
    -EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE = 3
    -
    - -
    -
    -EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE = 2
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE = 5
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE = 4
    -
    - -
    -
    -EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE = 6
    -
    - -
    -
    -EFI_BOOT_SCRIPT_STALL_OPCODE = 7
    -
    - -
    -
    -EFI_BOOT_SCRIPT_TERMINATE_OPCODE = 255
    -
    - -
    - -
    -
    -class S3BootScriptOpcode_EdkCompat[source]
    -

    Bases: chipsec.hal.uefi_common.S3BootScriptOpcode

    -
    -
    -EFI_BOOT_SCRIPT_INFORMATION_OPCODE = 10
    -
    - -
    -
    -EFI_BOOT_SCRIPT_MEM_POLL_OPCODE = 9
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE = 12
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE = 11
    -
    - -
    -
    -EFI_BOOT_SCRIPT_TABLE_OPCODE = 170
    -
    - -
    - -
    -
    -class S3BootScriptOpcode_MDE[source]
    -

    Bases: chipsec.hal.uefi_common.S3BootScriptOpcode

    -
    -
    -EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE = 9
    -
    - -
    -
    -EFI_BOOT_SCRIPT_INFORMATION_OPCODE = 10
    -
    - -
    -
    -EFI_BOOT_SCRIPT_IO_POLL_OPCODE = 13
    -
    - -
    -
    -EFI_BOOT_SCRIPT_MEM_POLL_OPCODE = 14
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE = 16
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE = 12
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE = 11
    -
    - -
    -
    -EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE = 15
    -
    - -
    - -
    -
    -class S3BootScriptSmbusOperation[source]
    -

    Bases: object

    -
    -
    -BWBR_PROCESS_CALL = 11
    -
    - -
    -
    -PROCESS_CALL = 10
    -
    - -
    -
    -QUICK_READ = 0
    -
    - -
    -
    -QUICK_WRITE = 1
    -
    - -
    -
    -READ_BLOCK = 8
    -
    - -
    -
    -READ_BYTE = 4
    -
    - -
    -
    -READ_WORD = 6
    -
    - -
    -
    -RECEIVE_BYTE = 2
    -
    - -
    -
    -SEND_BYTE = 3
    -
    - -
    -
    -WRITE_BLOCK = 9
    -
    - -
    -
    -WRITE_BYTE = 5
    -
    - -
    -
    -WRITE_WORD = 7
    -
    - -
    - -
    -
    -class S3BootScriptWidth[source]
    -

    Bases: object

    -
    -
    -EFI_BOOT_SCRIPT_WIDTH_UINT16 = 1
    -
    - -
    -
    -EFI_BOOT_SCRIPT_WIDTH_UINT32 = 2
    -
    - -
    -
    -EFI_BOOT_SCRIPT_WIDTH_UINT64 = 3
    -
    - -
    -
    -EFI_BOOT_SCRIPT_WIDTH_UINT8 = 0
    -
    - -
    - -
    -
    -class StatusCode[source]
    -

    Bases: object

    -
    -
    -EFI_ABORTED = 21
    -
    - -
    -
    -EFI_ACCESS_DENIED = 15
    -
    - -
    -
    -EFI_ALREADY_STARTED = 20
    -
    - -
    -
    -EFI_BAD_BUFFER_SIZE = 4
    -
    - -
    -
    -EFI_BUFFER_TOO_SMALL = 5
    -
    - -
    -
    -EFI_COMPROMISED_DATA = 33
    -
    - -
    -
    -EFI_CRC_ERROR = 27
    -
    - -
    -
    -EFI_DEVICE_ERROR = 7
    -
    - -
    -
    -EFI_END_OF_FILE = 31
    -
    - -
    -
    -EFI_END_OF_MEDIA = 28
    -
    - -
    -
    -EFI_HTTP_ERROR = 35
    -

    EFI_WARN_UNKNOWN_GLYPH = 1 -EFI_WARN_DELETE_FAILURE = 2 -EFI_WARN_WRITE_FAILURE = 3 -EFI_WARN_BUFFER_TOO_SMALL = 4 -EFI_WARN_STALE_DATA = 5 -EFI_WARN_FILE_SYSTEM = 6

    -
    - -
    -
    -EFI_ICMP_ERROR = 22
    -
    - -
    -
    -EFI_INCOMPATIBLE_VERSION = 25
    -
    - -
    -
    -EFI_INVALID_LANGUAGE = 32
    -
    - -
    -
    -EFI_INVALID_PARAMETER = 2
    -
    - -
    -
    -EFI_LOAD_ERROR = 1
    -
    - -
    -
    -EFI_MEDIA_CHANGED = 13
    -
    - -
    -
    -EFI_NOT_FOUND = 14
    -
    - -
    -
    -EFI_NOT_READY = 6
    -
    - -
    -
    -EFI_NOT_STARTED = 19
    -
    - -
    -
    -EFI_NO_MAPPING = 17
    -
    - -
    -
    -EFI_NO_MEDIA = 12
    -
    - -
    -
    -EFI_NO_RESPONSE = 16
    -
    - -
    -
    -EFI_OUT_OF_RESOURCES = 9
    -
    - -
    -
    -EFI_PROTOCOL_ERROR = 24
    -
    - -
    -
    -EFI_SECURITY_VIOLATION = 26
    -
    - -
    -
    -EFI_SUCCESS = 0
    -
    - -
    -
    -EFI_TFTP_ERROR = 23
    -
    - -
    -
    -EFI_TIMEOUT = 18
    -
    - -
    -
    -EFI_UNSUPPORTED = 3
    -
    - -
    -
    -EFI_VOLUME_CORRUPTED = 10
    -
    - -
    -
    -EFI_VOLUME_FULL = 11
    -
    - -
    -
    -EFI_WRITE_PROTECTED = 8
    -
    - -
    - -
    -
    -align(of: int, size: int) → int[source]
    -
    - -
    -
    -bit_set(value: int, mask: int, polarity: bool = False) → bool[source]
    -
    - -
    -
    -get_3b_size(s_data: bytes) → int[source]
    -
    - -
    -
    -get_nvar_name(nvram: bytes, name_offset: int, isAscii: bool)[source]
    -
    - -
    -
    -class op_dispatch(opcode: int, size: int, entrypoint: int, context: Optional[int] = None)[source]
    -

    Bases: object

    -
    - -
    -
    -class op_io_pci_mem(opcode: int, size: int, width: int, address: int, unknown: Optional[int], count: Optional[int], buffer: Optional[bytes], value: Optional[int] = None, mask: Optional[int] = None)[source]
    -

    Bases: object

    -
    - -
    -
    -class op_mem_poll(opcode: int, size: int, width: int, address: int, duration: int, looptimes: int)[source]
    -

    Bases: object

    -
    - -
    -
    -class op_smbus_execute(opcode: int, size: int, address: int, command: int, operation: int, peccheck: int)[source]
    -

    Bases: object

    -
    - -
    -
    -class op_stall(opcode: int, size: int, duration: int)[source]
    -

    Bases: object

    -
    - -
    -
    -class op_terminate(opcode: int, size: int)[source]
    -

    Bases: object

    -
    - -
    -
    -class op_unknown(opcode: int, size: int)[source]
    -

    Bases: object

    -
    - -
    -
    -parse_auth_var(db: bytes, decode_dir: str) → List[bytes][source]
    -
    - -
    -
    -parse_efivar_file(fname: str, var: Optional[bytes] = None, var_type: int = 1) → None[source]
    -
    - -
    -
    -parse_esal_var(db: bytes, decode_dir: str) → List[bytes][source]
    -
    - -
    -
    -parse_external(data)[source]
    -
    - -
    -
    -parse_pkcs7(data)[source]
    -
    - -
    -
    -parse_rsa2048(data)[source]
    -
    - -
    -
    -parse_rsa2048_sha1(data)[source]
    -
    - -
    -
    -parse_rsa2048_sha256(data)[source]
    -
    - -
    -
    -parse_sb_db(db: bytes, decode_dir: str) → List[bytes][source]
    -
    - -
    -
    -parse_sha1(data)[source]
    -
    - -
    -
    -parse_sha224(data)[source]
    -
    - -
    -
    -parse_sha256(data)[source]
    -
    - -
    -
    -parse_sha384(data)[source]
    -
    - -
    -
    -parse_sha512(data)[source]
    -
    - -
    -
    -parse_x509(data)[source]
    -
    - -
    -
    -parse_x509_sha256(data)[source]
    -
    - -
    -
    -parse_x509_sha384(data)[source]
    -
    - -
    -
    -parse_x509_sha512(data)[source]
    -
    - -
    +
    @@ -737,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.uefi module

    + title="previous chapter">uefi module

    Next topic

    chipsec.hal.uefi_compression module

    + title="next chapter">uefi_compression module

    - +
    @@ -768,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.uefi_common module
    • +
  • hal package »
    • +
  • uefi_common module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.uefi_compression.html b/modules/chipsec.hal.uefi_compression.html index 92f05bad..a65c2d7d 100644 --- a/modules/chipsec.hal.uefi_compression.html +++ b/modules/chipsec.hal.uefi_compression.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.uefi_compression module — CHIPSEC documentation - - + + + uefi_compression module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,50 +46,9 @@

    Navigation

    -
    -

    chipsec.hal.uefi_compression module

    -
    -
    -class UEFICompression[source]
    -

    Bases: object

    -
    -
    -compress_EFI_binary(uncompressed_data: bytes, compression_type: int) → bytes[source]
    -
    - -
    -
    -decompress_EFI_binary(compressed_data: bytes, compression_type: int) → bytes[source]
    -
    - -
    -
    -decompression_oder_type1: List[int] = [1, 2]
    -
    - -
    -
    -decompression_oder_type2: List[int] = [1, 2, 3, 4]
    -
    - -
    -
    -rotate_list(rot_list: List[Any], n: int) → List[Any][source]
    -
    - -
    -
    -unknown_decompress(compressed_data: bytes) → bytes[source]
    -
    - -
    -
    -unknown_efi_decompress(compressed_data: bytes) → bytes[source]
    -
    - -
    - -
    +
    +

    uefi_compression module

    +
    @@ -144,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.uefi_common module

    + title="previous chapter">uefi_common module

    Next topic

    chipsec.hal.uefi_fv module

    + title="next chapter">uefi_fv module

    - +
    @@ -175,20 +133,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.uefi_compression module
    • +
  • hal package »
    • +
  • uefi_compression module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.uefi_fv.html b/modules/chipsec.hal.uefi_fv.html index 5d099bca..76ad6ca7 100644 --- a/modules/chipsec.hal.uefi_fv.html +++ b/modules/chipsec.hal.uefi_fv.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.uefi_fv module — CHIPSEC documentation - - + + + uefi_fv module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,124 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.uefi_fv module

    +
    +

    uefi_fv module

    UEFI Firmware Volume Parsing/Modification Functionality

    -
    -
    -DecodeSection(SecType, SecBody, SecHeaderSize) → None[source]
    -
    - -
    -
    -class EFI_FILE(Offset: int, Guid: uuid.UUID, Type: int, Attributes: int, State: int, Checksum: int, Size: int, Image: bytes, HeaderSize: int, UD: bool, CalcSum: int)[source]
    -

    Bases: chipsec.hal.uefi_fv.EFI_MODULE

    -
    - -
    -
    -class EFI_FV(Offset: int, Guid: uuid.UUID, Size: int, Attributes: int, HeaderSize: int, Checksum: int, ExtHeaderOffset: int, Image: bytes, CalcSum: int)[source]
    -

    Bases: chipsec.hal.uefi_fv.EFI_MODULE

    -
    - -
    -
    -class EFI_MODULE(Offset: int, Guid: Optional[uuid.UUID], HeaderSize: int, Attributes: int, Image: bytes)[source]
    -

    Bases: object

    -
    -
    -calc_hashes(off: int = 0) → None[source]
    -
    - -
    -
    -name() → str[source]
    -
    - -
    - -
    -
    -class EFI_SECTION(Offset: int, Name: str, Type: int, Image: bytes, HeaderSize: int, Size: int)[source]
    -

    Bases: chipsec.hal.uefi_fv.EFI_MODULE

    -
    -
    -name() → str[source]
    -
    - -
    - -
    -
    -FvChecksum16(buffer: bytes) → int[source]
    -
    - -
    -
    -FvChecksum8(buffer: bytes) → int[source]
    -
    - -
    -
    -FvSum16(buffer: bytes) → int[source]
    -
    - -
    -
    -FvSum8(buffer: bytes) → int[source]
    -
    - -
    -
    -GetFvHeader(buffer: bytes, off: int = 0) → Tuple[int, int, int][source]
    -
    - -
    -
    -NextFwFile(FvImage: bytes, FvLength: int, fof: int, polarity: bool) → Optional[chipsec.hal.uefi_fv.EFI_FILE][source]
    -
    - -
    -
    -NextFwFileSection(sections: bytes, ssize: int, sof: int, polarity: bool) → Optional[chipsec.hal.uefi_fv.EFI_SECTION][source]
    -
    - -
    -
    -NextFwVolume(buffer: bytes, off: int = 0, last_fv_size: int = 0) → Optional[chipsec.hal.uefi_fv.EFI_FV][source]
    -
    - -
    -
    -ValidateFwVolumeHeader(ZeroVector: str, FsGuid: uuid.UUID, FvLength: int, HeaderLength: int, ExtHeaderOffset: int, Reserved: int, size: int, Calcsum: int, Checksum: int) → bool[source]
    -
    - -
    -
    -align_image(image: bytes, size: int = 8, fill: bytes = b'\x00') → bytes[source]
    -
    - -
    -
    -assemble_uefi_file(guid: uuid.UUID, image: bytes) → bytes[source]
    -
    - -
    -
    -assemble_uefi_raw(image: bytes) → bytes[source]
    -
    - -
    -
    -assemble_uefi_section(image: bytes, uncomressed_size: int, compression_type: int) → bytes[source]
    -
    - -
    -
    -get_guid_bin(guid: uuid.UUID) → bytes[source]
    -
    - -
    +
    @@ -218,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.uefi_compression module

    + title="previous chapter">uefi_compression module

    Next topic

    chipsec.hal.uefi_platform module

    + title="next chapter">uefi_platform module

    - +
    @@ -249,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.uefi_fv module
    • +
  • hal package »
    • +
  • uefi_fv module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.uefi_platform.html b/modules/chipsec.hal.uefi_platform.html index d028bb0d..126ae1bb 100644 --- a/modules/chipsec.hal.uefi_platform.html +++ b/modules/chipsec.hal.uefi_platform.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.uefi_platform module — CHIPSEC documentation - - + + + uefi_platform module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,288 +46,10 @@

    Navigation

    -
    -

    chipsec.hal.uefi_platform module

    +
    +

    uefi_platform module

    Platform specific UEFI functionality (parsing platform specific EFI NVRAM, capsules, etc.)

    -
    -
    -class EFI_HDR_NVAR1(StartId, TotalSize, Reserved1, Reserved2, Reserved3, Attributes, State)[source]
    -

    Bases: chipsec.hal.uefi_platform.EFI_HDR_NVAR1

    -
    - -
    -
    -class EFI_HDR_VSS(StartId, State, Reserved, Attributes, NameSize, DataSize, guid)[source]
    -

    Bases: chipsec.hal.uefi_platform.EFI_HDR_VSS

    -
    - -
    -
    -class EFI_HDR_VSS_APPLE(StartId, State, Reserved, Attributes, NameSize, DataSize, guid, unknown)[source]
    -

    Bases: chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE

    -
    - -
    -
    -class EFI_HDR_VSS_AUTH(StartId, State, Reserved, Attributes, MonotonicCount, TimeStamp1, TimeStamp2, PubKeyIndex, NameSize, DataSize, guid)[source]
    -

    Bases: chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH

    -
    - -
    -
    -EFIvar_EVSA(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -class FWType[source]
    -

    Bases: object

    -
    -
    -EFI_FW_TYPE_EVSA = 'evsa'
    -
    - -
    -
    -EFI_FW_TYPE_NVAR = 'nvar'
    -
    - -
    -
    -EFI_FW_TYPE_UEFI = 'uefi'
    -
    - -
    -
    -EFI_FW_TYPE_UEFI_AUTH = 'uefi_auth'
    -
    - -
    -
    -EFI_FW_TYPE_VSS = 'vss'
    -
    - -
    -
    -EFI_FW_TYPE_VSS2 = 'vss2'
    -
    - -
    -
    -EFI_FW_TYPE_VSS2_AUTH = 'vss2_auth'
    -
    - -
    -
    -EFI_FW_TYPE_VSS_APPLE = 'vss_apple'
    -
    - -
    -
    -EFI_FW_TYPE_VSS_AUTH = 'vss_auth'
    -
    - -
    - -
    -
    -IS_VARIABLE_STATE(_c: int, _Mask: int) → bool[source]
    -
    - -
    -
    -class S3BootScriptType[source]
    -

    Bases: object

    -
    -
    -EFI_BOOT_SCRIPT_TYPE_DEFAULT = 0
    -
    - -
    -
    -EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT = 170
    -
    - -
    - -
    -
    -class UEFI_VARIABLE_HEADER(StartId, State, Reserved, Attributes, NameSize, DataSize, VendorGuid0, VendorGuid1, VendorGuid2, VendorGuid3)[source]
    -

    Bases: chipsec.hal.uefi_platform.UEFI_VARIABLE_HEADER

    -
    - -
    -
    -UEFI_VARIABLE_STORE_HEADER_SIZE = 28
    -

    EFI_VARIABLE_HEADER_AUTH = “<HBBI28sIIIHH8s” -EFI_VARIABLE_HEADER_AUTH_SIZE = struct.calcsize(EFI_VARIABLE_HEADER_AUTH)

    -

    EFI_VARIABLE_HEADER = “<HBBIIIIHH8s” -EFI_VARIABLE_HEADER_SIZE = struct.calcsize(EFI_VARIABLE_HEADER)

    -
    - -
    -
    -class VARIABLE_STORE_HEADER_VSS(Signature, Size, Format, State, Reserved, Reserved1)[source]
    -

    Bases: chipsec.hal.uefi_platform.VARIABLE_STORE_HEADER_VSS

    -
    - -
    -
    -class VARIABLE_STORE_HEADER_VSS2(Signature, Size, Format, State, Reserved, Reserved1)[source]
    -

    Bases: chipsec.hal.uefi_platform.VARIABLE_STORE_HEADER_VSS2

    -
    - -
    -
    -create_s3bootscript_entry_buffer(script_type: int, op, index=None) → bytes[source]
    -
    - -
    -
    -decode_s3bs_opcode(s3bootscript_type, script_data)[source]
    -
    - -
    -
    -decode_s3bs_opcode_def(data)[source]
    -
    - -
    -
    -decode_s3bs_opcode_edkcompat(data: bytes)[source]
    -
    - -
    -
    -encode_s3bootscript_entry(entry) → Optional[bytes][source]
    -
    - -
    -
    -encode_s3bs_opcode(s3bootscript_type: int, op: chipsec.hal.uefi_common.S3BOOTSCRIPT_ENTRY) → bytes[source]
    -
    - -
    -
    -encode_s3bs_opcode_def(op) → bytes[source]
    -
    - -
    -
    -encode_s3bs_opcode_edkcompat(op: chipsec.hal.uefi_common.S3BOOTSCRIPT_ENTRY) → bytes[source]
    -
    - -
    -
    -getEFIvariables_NVAR(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_NVAR_simple(nvram_buf: bytes) → Dict[str, Tuple[int, bytes, bytes, int, str, int]][source]
    -
    - -
    -
    -getEFIvariables_UEFI(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_UEFI_AUTH(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_VSS(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_VSS2(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_VSS2_AUTH(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_VSS_APPLE(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getEFIvariables_VSS_AUTH(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, Optional[Union[chipsec.hal.uefi_platform.EFI_HDR_VSS, chipsec.hal.uefi_platform.EFI_HDR_VSS_AUTH, chipsec.hal.uefi_platform.EFI_HDR_VSS_APPLE]], bytes, str, int]]][source]
    -
    - -
    -
    -getNVstore_EFI(nvram_buf: bytes) → Tuple[int, int, None][source]
    -
    - -
    -
    -getNVstore_EFI_AUTH(nvram_buf: bytes) → Tuple[int, int, None][source]
    -
    - -
    -
    -getNVstore_EVSA(nvram_buf: bytes) → Tuple[int, int, None][source]
    -
    - -
    -
    -getNVstore_NVAR(nvram_buf: bytes) → Tuple[int, int, None][source]
    -
    - -
    -
    -getNVstore_NVAR_simple(nvram_buf: bytes) → Tuple[Optional[int], int, None][source]
    -
    - -
    -
    -getNVstore_VSS(nvram_buf: bytes)[source]
    -
    - -
    -
    -getNVstore_VSS2(nvram_buf: bytes)[source]
    -
    - -
    -
    -getNVstore_VSS2_AUTH(nvram_buf: bytes)[source]
    -
    - -
    -
    -getNVstore_VSS_APPLE(nvram_buf: bytes)[source]
    -
    - -
    -
    -getNVstore_VSS_AUTH(nvram_buf: bytes)[source]
    -
    - -
    -
    -id_s3bootscript_type(script: bytes, log_script: bool = False) → Tuple[int, int][source]
    -
    - -
    -
    -isCorrectVSStype(nvram_buf: bytes, vss_type: str)[source]
    -
    - -
    -
    -parse_s3bootscript_entry(s3bootscript_type: int, script: bytes, off: int, log_script: bool = False)[source]
    -
    - -
    +
    @@ -382,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.uefi_fv module

    + title="previous chapter">uefi_fv module

    Next topic

    chipsec.hal.uefi_search module

    + title="next chapter">uefi_search module

    - +
    @@ -413,20 +134,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.uefi_platform module
    • +
  • hal package »
    • +
  • uefi_platform module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.uefi_search.html b/modules/chipsec.hal.uefi_search.html index c40b3590..db6a5606 100644 --- a/modules/chipsec.hal.uefi_search.html +++ b/modules/chipsec.hal.uefi_search.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.uefi_search module — CHIPSEC documentation - - + + + uefi_search module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    - +
    @@ -120,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.uefi_platform module

    + title="previous chapter">uefi_platform module

    Next topic

    chipsec.hal.virtmem module

    + title="next chapter">virtmem module

    - +
    @@ -151,20 +140,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
    • -
  • chipsec.hal.uefi_search module
    • +
  • hal package »
    • +
  • uefi_search module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.virtmem.html b/modules/chipsec.hal.virtmem.html index 4005b31e..fdb85165 100644 --- a/modules/chipsec.hal.virtmem.html +++ b/modules/chipsec.hal.virtmem.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.virtmem module — CHIPSEC documentation - - + + + virtmem module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.hal.virtmem module

    +
    +

    virtmem module

    Access to virtual memory

    usage:
    >>> read_virtual_mem( 0xf0000, 0x100 )
@@ -59,68 +58,7 @@ 
    Navigation
    -
    -
    -class VirtMemory(cs)[source]
    -

    Bases: chipsec.hal.hal_base.HALBase

    -
    -
    -alloc_virtual_mem(length: int, max_phys_address: int = 18446744073709551615) → Tuple[int, int][source]
    -
    - -
    -
    -free_virtual_mem(virt_address: int) → bool[source]
    -
    - -
    -
    -read_virtual_mem(virt_address: int, length: int) → int[source]
    -
    - -
    -
    -read_virtual_mem_byte(virt_address: int) → int[source]
    -
    - -
    -
    -read_virtual_mem_dword(virt_address: int) → int[source]
    -
    - -
    -
    -read_virtual_mem_word(virt_address: int) → int[source]
    -
    - -
    -
    -va2pa(va: int) → int[source]
    -
    - -
    -
    -write_virtual_mem(virt_address: int, length: int, buf: bytes) → int[source]
    -
    - -
    -
    -write_virtual_mem_byte(virt_address: int, byte_value: int) → int[source]
    -
    - -
    -
    -write_virtual_mem_dword(virt_address: int, dword_value: int) → int[source]
    -
    - -
    -
    -write_virtual_mem_word(virt_address: int, word_value: int) → int[source]
    -
    - -
    - -
    +
    @@ -174,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.uefi_search module

    + title="previous chapter">uefi_search module

    Next topic

    chipsec.hal.vmm module

    + title="next chapter">vmm module

    - +
    @@ -205,20 +143,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.hal package »
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  • chipsec.hal.virtmem module
    • +
  • hal package »
    • +
  • virtmem module
    • \ No newline at end of file diff --git a/modules/chipsec.hal.vmm.html b/modules/chipsec.hal.vmm.html index 23141553..4d56a6a7 100644 --- a/modules/chipsec.hal.vmm.html +++ b/modules/chipsec.hal.vmm.html @@ -1,24 +1,23 @@ - - + - - chipsec.hal.vmm module — CHIPSEC documentation - - + + + vmm module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,71 +46,14 @@

    Navigation

    -
    -

    chipsec.hal.vmm module

    +
    +

    vmm module

    VMM specific functionality 1. Hypervisor hypercall interfaces 2. Second-level Address Translation (SLAT) 3. VirtIO devices 4. …

    -
    -
    -class VMM(cs)[source]
    -

    Bases: object

    -
    -
    -dump_EPT_page_tables(eptp: str, pt_fname: Optional[str] = None) → None[source]
    -
    - -
    -
    -hypercall(rax: int, rbx: int, rcx: int, rdx: int, rdi: int, rsi: int, r8: int = 0, r9: int = 0, r10: int = 0, r11: int = 0, xmm_buffer: int = 0) → int[source]
    -
    - -
    -
    -hypercall64_extended_fast(hypervisor_input_value: int, parameter_block: bytes) → int[source]
    -
    - -
    -
    -hypercall64_fast(hypervisor_input_value: int, param0: int = 0, param1: int = 0) → int[source]
    -
    - -
    -
    -hypercall64_five_args(vector: int, arg1: int = 0, arg2: int = 0, arg3: int = 0, arg4: int = 0, arg5: int = 0) → int[source]
    -
    - -
    -
    -hypercall64_memory_based(hypervisor_input_value: int, parameters: AnyStr, size: int = 0) → int[source]
    -
    - -
    -
    -init() → None[source]
    -
    - -
    - -
    -
    -class VirtIO_Device(cs, b, d, f)[source]
    -

    Bases: object

    -
    -
    -dump_device() → None[source]
    -
    - -
    - -
    -
    -get_virtio_devices(devices: List[Tuple[int, int, int, int, int]]) → List[Tuple[int, int, int, int, int]][source]
    -
    - -
    +
    @@ -165,12 +107,12 @@

    Table of Contents

    Previous topic

    chipsec.hal.virtmem module

    + title="previous chapter">virtmem module

    Next topic

    chipsec.fuzzing package

    + title="next chapter">fuzzing package

    - +
    @@ -196,20 +138,20 @@

    Navigation

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  • CHIPSEC documentation »
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    • +
  • hal package »
    • +
  • vmm module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.basehelper.html b/modules/chipsec.helper.basehelper.html index 839a75e2..b5aa30d8 100644 --- a/modules/chipsec.helper.basehelper.html +++ b/modules/chipsec.helper.basehelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.basehelper module — CHIPSEC documentation - - + + + basehelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,215 +46,9 @@

    Navigation

    -
    -

    chipsec.helper.basehelper module

    -
    -
    -class Helper[source]
    -

    Bases: abc.ABC

    -
    -
    -abstract EFI_supported() → bool[source]
    -
    - -
    -
    -abstract alloc_phys_mem(size: int, max_phys_address: int) → Tuple[int, int][source]
    -
    - -
    -
    -abstract cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -abstract create() → bool[source]
    -
    - -
    -
    -abstract delete() → bool[source]
    -
    - -
    -
    -abstract delete_EFI_variable(name: str, guid: str) → Optional[int][source]
    -
    - -
    -
    -abstract free_phys_mem(phys_address: int)[source]
    -
    - -
    -
    -abstract get_ACPI_SDT() → Tuple[Optional[Array], bool][source]
    -
    - -
    -
    -abstract get_ACPI_table(table_name: str) → Optional[Array][source]
    -
    - -
    -
    -abstract get_EFI_variable(name: str, guid: str) → Optional[bytes][source]
    -
    - -
    -
    -abstract get_affinity() → Optional[int][source]
    -
    - -
    -
    -abstract get_descriptor_table(cpu_thread_id: int, desc_table_code: int) → Optional[Tuple[int, int, int]][source]
    -
    - -
    -
    -get_info() → Tuple[str, str][source]
    -
    - -
    -
    -abstract get_threads_count() → int[source]
    -
    - -
    -
    -abstract hypercall(rcx: int, rdx: int, r8: int, r9: int, r10: int, r11: int, rax: int, rbx: int, rdi: int, rsi: int, xmm_buffer: int) → int[source]
    -
    - -
    -
    -abstract list_EFI_variables() → Optional[Dict[str, List[EfiVariableType]]][source]
    -
    - -
    -
    -abstract load_ucode_update(cpu_thread_id: int, ucode_update_buffer: bytes) → bool[source]
    -
    - -
    -
    -abstract map_io_space(phys_address: int, size: int, cache_type: int) → int[source]
    -
    - -
    -
    -abstract msgbus_send_message(mcr: int, mcrx: int, mdr: Optional[int]) → Optional[int][source]
    -
    - -
    -
    -abstract msgbus_send_read_message(mcr: int, mcrx: int) → Optional[int][source]
    -
    - -
    -
    -abstract msgbus_send_write_message(mcr: int, mcrx: int, mdr: int) → None[source]
    -
    - -
    -
    -abstract read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -abstract read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -abstract read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -abstract read_msr(cpu_thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -abstract read_pci_reg(bus: int, device: int, function: int, address: int, size: int) → int[source]
    -
    - -
    -
    -abstract read_phys_mem(phys_address: int, size: int) → bytes[source]
    -
    - -
    -
    -abstract retpoline_enabled() → bool[source]
    -
    - -
    -
    -abstract send_sw_smi(cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) → Optional[int][source]
    -
    - -
    -
    -abstract set_EFI_variable(name: str, guid: str, buffer: bytes, buffer_size: Optional[int], attrs: Optional[int]) → Optional[int][source]
    -
    - -
    -
    -abstract set_affinity(value: int) → Optional[int][source]
    -
    - -
    -
    -abstract start() → bool[source]
    -
    - -
    -
    -abstract stop() → bool[source]
    -
    - -
    -
    -abstract va2pa(virtual_address: int) → Tuple[int, int][source]
    -
    - -
    -
    -abstract write_cr(cpu_thread_id: int, cr_number: int, value: int) → int[source]
    -
    - -
    -
    -abstract write_io_port(io_port: int, value: int, size: int) → int[source]
    -
    - -
    -
    -abstract write_mmio_reg(phys_address: int, size: int, value: int) → int[source]
    -
    - -
    -
    -abstract write_msr(cpu_thread_id: int, msr_addr: int, eax: int, edx: int) → int[source]
    -
    - -
    -
    -abstract write_pci_reg(bus: int, device: int, function: int, address: int, value: int, size: int) → int[source]
    -
    - -
    -
    -abstract write_phys_mem(phys_address: int, size: int, buffer: bytes) → int[source]
    -
    - -
    - -
    +
    +

    basehelper module

    +
    @@ -309,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.windows.windowshelper module

    + title="previous chapter">windowshelper module

    Next topic

    chipsec.helper.nonehelper module

    + title="next chapter">nonehelper module

    - +
    @@ -340,20 +133,20 @@

    Navigation

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  • CHIPSEC documentation »
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  • chipsec.helper.basehelper module
    • +
  • helper package »
    • +
  • basehelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.dal.dalhelper.html b/modules/chipsec.helper.dal.dalhelper.html index 775cb2ff..e47f1403 100644 --- a/modules/chipsec.helper.dal.dalhelper.html +++ b/modules/chipsec.helper.dal.dalhelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.dal.dalhelper module — CHIPSEC documentation - - + + + dalhelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,242 +47,11 @@

    Navigation

    -
    -

    chipsec.helper.dal.dalhelper module

    +
    +

    dalhelper module

    Intel DFx Abstraction Layer (DAL) helper

    From the Intel(R) DFx Abstraction Layer Python* Command Line Interface User Guide

    -
    -
    -class DALHelper[source]
    -

    Bases: chipsec.helper.basehelper.Helper

    -
    -
    -EFI_supported() → bool[source]
    -
    - -
    -
    -alloc_phys_mem(length, max_phys_address)[source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -create(start_driver: bool) → bool[source]
    -
    - -
    -
    -dal_version() → str[source]
    -
    - -
    -
    -delete() → bool[source]
    -
    - -
    -
    -delete_EFI_variable(name, guid)[source]
    -
    - -
    -
    -find_thread() → int[source]
    -
    - -
    -
    -free_phys_mem(physical_address)[source]
    -
    - -
    -
    -get_ACPI_SDT()[source]
    -
    - -
    -
    -get_ACPI_table(table_name)[source]
    -
    - -
    -
    -get_EFI_variable(name, guid, attrs)[source]
    -
    - -
    -
    -get_affinity()[source]
    -
    - -
    -
    -get_descriptor_table(cpu_thread_id, desc_table_code)[source]
    -
    - -
    -
    -get_threads_count() → int[source]
    -
    - -
    -
    -get_tool_info(tool_type: str) → Tuple[str, str][source]
    -
    - -
    -
    -hypercall(rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer)[source]
    -
    - -
    -
    -list_EFI_variables()[source]
    -
    - -
    -
    -load_ucode_update(core_id, ucode_update_buf)[source]
    -
    - -
    -
    -map_io_space(physical_address: int, length: int, cache_type: int) → int[source]
    -
    - -
    -
    -msgbus_send_message(mcr, mcrx, mdr)[source]
    -
    - -
    -
    -msgbus_send_read_message(mcr, mcrx)[source]
    -
    - -
    -
    -msgbus_send_write_message(mcr, mcrx, mdr)[source]
    -
    - -
    -
    -pci_addr(bus: int, device: int, function: int, offset: int) → int[source]
    -
    - -
    -
    -read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -read_msr(thread: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -read_pci_reg(bus: int, device: int, function: int, address: int, size: int) → int[source]
    -
    - -
    -
    -read_phys_mem(phys_address: int, length: int, bytewise: bool = False) → bytes[source]
    -
    - -
    -
    -retpoline_enabled() → bool[source]
    -
    - -
    -
    -send_sw_smi(cpu_thread_id, SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi)[source]
    -
    - -
    -
    -set_EFI_variable(name, guid, buffer, buffer_size, attrs)[source]
    -
    - -
    -
    -set_affinity(value)[source]
    -
    - -
    -
    -start(start_driver: bool, driver_exhists: bool = False) → bool[source]
    -
    - -
    -
    -stop() → bool[source]
    -
    - -
    -
    -target_machine() → str[source]
    -
    - -
    -
    -va2pa(va)[source]
    -
    - -
    -
    -write_cr(cpu_thread_id: int, cr_number: int, value: int) → int[source]
    -
    - -
    -
    -write_io_port(io_port: int, value: int, size: int) → int[source]
    -
    - -
    -
    -write_mmio_reg(phys_address: int, size: int, value: int) → int[source]
    -
    - -
    -
    -write_msr(thread: int, msr_addr: int, eax: int, edx: int) → int[source]
    -
    - -
    -
    -write_pci_reg(bus: int, device: int, function: int, address: int, dword_value: int, size: int) → int[source]
    -
    - -
    -
    -write_phys_mem(phys_address: int, length: int, buf: bytes, bytewise: bool = False) → int[source]
    -
    - -
    - -
    -
    -get_helper() → chipsec.helper.dal.dalhelper.DALHelper[source]
    -
    - -
    +
    @@ -337,12 +105,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.dal package

    + title="previous chapter">dal package

    Next topic

    chipsec.helper.efi package

    + title="next chapter">efi package

    - +
    @@ -368,21 +136,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • OS Helpers and Drivers »
    • -
  • chipsec.helper package »
    • -
  • chipsec.helper.dal package »
    • -
  • chipsec.helper.dal.dalhelper module
    • +
  • helper package »
    • +
  • dal package »
    • +
  • dalhelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.dal.html b/modules/chipsec.helper.dal.html index 97dfb0de..6256b9f7 100644 --- a/modules/chipsec.helper.dal.html +++ b/modules/chipsec.helper.dal.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.dal package — CHIPSEC documentation - - + + + dal package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,20 +46,14 @@

    Navigation

    -
    -

    chipsec.helper.dal package

    - -
    -

    Module contents

    -
    -
    +
    @@ -114,12 +107,12 @@

    Table of Contents

    Previous topic

    chipsec.helper package

    + title="previous chapter">helper package

    Next topic

    chipsec.helper.dal.dalhelper module

    + title="next chapter">dalhelper module

    - +
    @@ -145,20 +138,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • OS Helpers and Drivers »
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  • chipsec.helper package »
    • -
  • chipsec.helper.dal package
    • +
  • helper package »
    • +
  • dal package
    • \ No newline at end of file diff --git a/modules/chipsec.helper.efi.efihelper.html b/modules/chipsec.helper.efi.efihelper.html index 4b73dd5c..ce08b0b0 100644 --- a/modules/chipsec.helper.efi.efihelper.html +++ b/modules/chipsec.helper.efi.efihelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.efi.efihelper module — CHIPSEC documentation - - + + + efihelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,236 +47,10 @@

    Navigation

    -
    -

    chipsec.helper.efi.efihelper module

    +
    +

    efihelper module

    On UEFI use the efi package functions

    -
    -
    -class EfiHelper[source]
    -

    Bases: chipsec.helper.basehelper.Helper

    -
    -
    -EFI_supported() → bool[source]
    -
    - -
    -
    -alloc_phys_mem(length: int, max_pa: int) → Tuple[int, int][source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -create() → bool[source]
    -
    - -
    -
    -delete() → bool[source]
    -
    - -
    -
    -delete_EFI_variable(name: str, guid: str) → int[source]
    -
    - -
    -
    -free_phys_mem(physical_address)[source]
    -
    - -
    -
    -get_ACPI_SDT() → Tuple[None, bool][source]
    -
    - -
    -
    -get_ACPI_table(table_name)[source]
    -
    - -
    -
    -get_EFI_variable(name: str, guidstr: str) → Optional[bytes][source]
    -
    - -
    -
    -get_EFI_variable_full(name: str, guidstr: str) → Tuple[int, Optional[bytes], int][source]
    -
    - -
    -
    -get_affinity()[source]
    -
    - -
    -
    -get_descriptor_table(cpu_thread_id: int, desc_table_code: int) → None[source]
    -
    - -
    -
    -get_threads_count() → int[source]
    -
    - -
    -
    -get_tool_info(tool_type: str) → Tuple[str, str][source]
    -
    - -
    -
    -hypercall(rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer)[source]
    -
    - -
    -
    -list_EFI_variables() → Optional[Dict[str, List[EfiVariableType]]][source]
    -
    - -
    -
    -load_ucode_update(cpu_thread_id: int, ucode_update_buf: int) → bool[source]
    -
    - -
    -
    -map_io_space(physical_address: int, length: int, cache_type: int) → int[source]
    -
    - -
    -
    -msgbus_send_message(mcr: int, mcrx: int, mdr: Optional[int] = None) → None[source]
    -
    - -
    -
    -msgbus_send_read_message(mcr: int, mcrx: int) → None[source]
    -
    - -
    -
    -msgbus_send_write_message(mcr: int, mcrx: int, mdr: int) → None[source]
    -
    - -
    -
    -pa2va(pa: int) → int[source]
    -
    - -
    -
    -read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -read_msr(cpu_thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -read_pci_reg(bus: int, device: int, function: int, address: int, size: int) → int[source]
    -
    - -
    -
    -read_phys_mem(phys_address: int, length: int) → bytes[source]
    -
    - -
    -
    -retpoline_enabled() → bool[source]
    -
    - -
    -
    -send_sw_smi(cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) → None[source]
    -
    - -
    -
    -set_EFI_variable(name: str, guidstr: str, buffer: bytes, buffer_size: Optional[int] = None, attrs: Optional[int] = 7) → int[source]
    -
    - -
    -
    -set_affinity(value: int) → None[source]
    -
    - -
    -
    -split_address(pa: int) → Tuple[int, int][source]
    -
    - -
    -
    -start() → bool[source]
    -
    - -
    -
    -stop() → bool[source]
    -
    - -
    -
    -va2pa(va: int) → Tuple[int, int][source]
    -
    - -
    -
    -write_cr(cpu_thread_id: int, cr_number: int, value: int) → int[source]
    -
    - -
    -
    -write_io_port(io_port: int, value: int, size: int) → int[source]
    -
    - -
    -
    -write_mmio_reg(phys_address: int, size: int, value: int) → int[source]
    -
    - -
    -
    -write_msr(cpu_thread_id: int, msr_addr: int, eax: int, edx: int) → int[source]
    -
    - -
    -
    -write_pci_reg(bus: int, device: int, function: int, address: int, value: int, size: int) → int[source]
    -
    - -
    -
    -write_phys_mem(phys_address: int, length: int, buf: bytes) → int[source]
    -
    - -
    - -
    -
    -get_helper() → chipsec.helper.efi.efihelper.EfiHelper[source]
    -
    - -
    +
    @@ -331,12 +104,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.efi package

    + title="previous chapter">efi package

    Next topic

    chipsec.helper.linux package

    + title="next chapter">linux package

    - +
    @@ -362,21 +135,21 @@

    Navigation

    modules |
  • - next |
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  • CHIPSEC documentation »
  • OS Helpers and Drivers »
    • -
  • chipsec.helper package »
    • -
  • chipsec.helper.efi package »
    • -
  • chipsec.helper.efi.efihelper module
    • +
  • helper package »
    • +
  • efi package »
    • +
  • efihelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.efi.html b/modules/chipsec.helper.efi.html index 68e7a563..434f6657 100644 --- a/modules/chipsec.helper.efi.html +++ b/modules/chipsec.helper.efi.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.efi package — CHIPSEC documentation - - + + + efi package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,20 +46,14 @@

    Navigation

    -
    -

    chipsec.helper.efi package

    - -
    -

    Module contents

    -
    -
    +
    @@ -114,12 +107,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.dal.dalhelper module

    + title="previous chapter">dalhelper module

    Next topic

    chipsec.helper.efi.efihelper module

    + title="next chapter">efihelper module

    - +
    @@ -145,20 +138,20 @@

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    • +
  • helper package »
    • +
  • efi package
    • \ No newline at end of file diff --git a/modules/chipsec.helper.html b/modules/chipsec.helper.html index a8b6f1cf..5c95890c 100644 --- a/modules/chipsec.helper.html +++ b/modules/chipsec.helper.html @@ -1,23 +1,22 @@ - - + - - chipsec.helper package — CHIPSEC documentation - - + + + helper package — CHIPSEC documentation + + - - - - + + + - + - + @@ -46,71 +45,42 @@

    Navigation

    - +
    @@ -169,7 +139,7 @@

    Previous topic

    Next topic

    chipsec.helper.dal package

    + title="next chapter">dal package

    - +
    @@ -195,19 +165,19 @@

    Navigation

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  • chipsec.helper package
    • +
  • helper package
    • \ No newline at end of file diff --git a/modules/chipsec.helper.linux.html b/modules/chipsec.helper.linux.html index 3247c12f..74830408 100644 --- a/modules/chipsec.helper.linux.html +++ b/modules/chipsec.helper.linux.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.linux package — CHIPSEC documentation - - + + + linux package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,20 +46,14 @@

    Navigation

    -
    -

    chipsec.helper.linux package

    - -
    -

    Module contents

    -
    -
    +
    @@ -114,12 +107,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.efi.efihelper module

    + title="previous chapter">efihelper module

    Next topic

    chipsec.helper.linux.linuxhelper module

    + title="next chapter">linuxhelper module

    - +
    @@ -145,20 +138,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • OS Helpers and Drivers »
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  • chipsec.helper package »
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  • chipsec.helper.linux package
    • +
  • helper package »
    • +
  • linux package
    • \ No newline at end of file diff --git a/modules/chipsec.helper.linux.linuxhelper.html b/modules/chipsec.helper.linux.linuxhelper.html index 708d5051..6422e6b0 100644 --- a/modules/chipsec.helper.linux.linuxhelper.html +++ b/modules/chipsec.helper.linux.linuxhelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.linux.linuxhelper module — CHIPSEC documentation - - + + + linuxhelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,321 +47,10 @@

    Navigation

    -
    -

    chipsec.helper.linux.linuxhelper module

    +
    +

    linuxhelper module

    Linux helper

    -
    -
    -class LinuxHelper[source]
    -

    Bases: chipsec.helper.basehelper.Helper

    -
    -
    -DEVICE_NAME = '/dev/chipsec'
    -
    - -
    -
    -DEV_MEM = '/dev/mem'
    -
    - -
    -
    -DEV_PORT = '/dev/port'
    -
    - -
    -
    -DKMS_DIR = '/var/lib/dkms/'
    -
    - -
    -
    -EFI_supported() → bool[source]
    -
    - -
    -
    -MODULE_NAME = 'chipsec'
    -
    - -
    -
    -SUPPORT_KERNEL26_GET_PAGE_IS_RAM = False
    -
    - -
    -
    -SUPPORT_KERNEL26_GET_PHYS_MEM_ACCESS_PROT = False
    -
    - -
    -
    -alloc_phys_mem(num_bytes: int, max_addr: int)[source]
    -
    - -
    -
    -close() → None[source]
    -
    - -
    -
    -compute_ioctlbase(itype: str = 'C') → int[source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -create()[source]
    -
    - -
    -
    -delete() → bool[source]
    -
    - -
    -
    -delete_EFI_variable(name: str, guid: str) → int[source]
    -
    - -
    -
    -free_phys_mem(physmem: int)[source]
    -
    - -
    -
    -get_ACPI_SDT()[source]
    -
    - -
    -
    -get_ACPI_table(table_name)[source]
    -
    - -
    -
    -get_EFI_variable(name: str, guid: str, attrs: Optional[int] = None) → bytes[source]
    -
    - -
    -
    -get_affinity() → Optional[int][source]
    -
    - -
    -
    -get_descriptor_table(cpu_thread_id: int, desc_table_code: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_dkms_module_location() → str[source]
    -
    - -
    -
    -get_page_is_ram() → Optional[bytes][source]
    -
    - -
    -
    -get_phys_mem_access_prot() → Optional[bytes][source]
    -
    - -
    -
    -get_threads_count() → int[source]
    -
    - -
    -
    -get_tool_info(tool_type: str) → Tuple[Optional[str], str][source]
    -
    - -
    -
    -hypercall(rcx: int, rdx: int, r8: int, r9: int, r10: int, r11: int, rax: int, rbx: int, rdi: int, rsi: int, xmm_buffer: int) → int[source]
    -
    - -
    -
    -init() → None[source]
    -
    - -
    -
    -ioctl(nr: int, args: Iterable, *mutate_flag: bool) → bytes[source]
    -
    - -
    -
    -kern_get_EFI_variable(name: str, guid: str) → bytes[source]
    -
    - -
    -
    -kern_get_EFI_variable_full(name: str, guid: str) → EfiVariableType[source]
    -
    - -
    -
    -kern_list_EFI_variables() → Optional[Dict[str, List[EfiVariableType]]][source]
    -
    - -
    -
    -kern_set_EFI_variable(name: str, guid: str, value: bytes, attr: int = 7) → int[source]
    -
    - -
    -
    -list_EFI_variables() → Optional[Dict[str, List[EfiVariableType]]][source]
    -
    - -
    -
    -load_chipsec_module()[source]
    -
    - -
    -
    -load_ucode_update(cpu_thread_id: int, ucode_update_buf: bytes) → bool[source]
    -
    - -
    -
    -map_io_space(base: int, size: int, cache_type: int) → None[source]
    -
    - -
    -
    -msgbus_send_message(mcr: int, mcrx: int, mdr: Optional[int] = None) → int[source]
    -
    - -
    -
    -msgbus_send_read_message(mcr: int, mcrx: int) → Optional[int][source]
    -
    - -
    -
    -msgbus_send_write_message(mcr: int, mcrx: int, mdr: int) → None[source]
    -
    - -
    -
    -read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -read_msr(thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -read_pci_reg(bus: int, device: int, function: int, offset: int, size: int = 4) → int[source]
    -
    - -
    -
    -read_phys_mem(phys_address: int, length: int) → bytes[source]
    -
    - -
    -
    -retpoline_enabled()[source]
    -
    - -
    -
    -send_sw_smi(cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) → Optional[Tuple[int, int, int, int, int, int, int]][source]
    -
    - -
    -
    -set_EFI_variable(name: str, guid: str, buffer: bytes, buffer_size: int, attrs: Optional[int] = None) → int[source]
    -
    - -
    -
    -set_affinity(thread_id: int) → Optional[int][source]
    -
    - -
    -
    -start() → bool[source]
    -
    - -
    -
    -stop() → bool[source]
    -
    - -
    -
    -unload_chipsec_module() → None[source]
    -
    - -
    -
    -va2pa(va: int) → Tuple[Optional[int], int][source]
    -
    - -
    -
    -write_cr(cpu_thread_id: int, cr_number: int, value: int)[source]
    -
    - -
    -
    -write_io_port(io_port: int, value: int, size: int) → bytes[source]
    -
    - -
    -
    -write_mmio_reg(phys_address: int, size: int, value: int)[source]
    -
    - -
    -
    -write_msr(thread_id: int, msr_addr: int, eax: int, edx: int)[source]
    -
    - -
    -
    -write_pci_reg(bus: int, device: int, function: int, offset: int, value: int, size: int = 4) → int[source]
    -
    - -
    -
    -write_phys_mem(phys_address: int, length: int, newval: bytes) → int[source]
    -
    - -
    - -
    -
    -get_helper()[source]
    -
    - -
    +
    @@ -416,12 +104,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.linux package

    + title="previous chapter">linux package

    Next topic

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    + title="next chapter">linuxnative package

    - +
    @@ -447,21 +135,21 @@

    Navigation

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  • CHIPSEC documentation »
  • OS Helpers and Drivers »
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  • chipsec.helper.linux package »
    • -
  • chipsec.helper.linux.linuxhelper module
    • +
  • helper package »
    • +
  • linux package »
    • +
  • linuxhelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.linuxnative.cpuid.html b/modules/chipsec.helper.linuxnative.cpuid.html index 80b6bd2e..7408f6bb 100644 --- a/modules/chipsec.helper.linuxnative.cpuid.html +++ b/modules/chipsec.helper.linuxnative.cpuid.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.linuxnative.cpuid module — CHIPSEC documentation - - + + + cpuid module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,45 +47,9 @@

    Navigation

    -
    -

    chipsec.helper.linuxnative.cpuid module

    -
    -
    -class CPUID[source]
    -

    Bases: object

    -
    - -
    -
    -class CPUID_struct[source]
    -

    Bases: _ctypes.Structure

    -
    -
    -eax
    -

    Structure/Union member

    -
    - -
    -
    -ebx
    -

    Structure/Union member

    -
    - -
    -
    -ecx
    -

    Structure/Union member

    -
    - -
    -
    -edx
    -

    Structure/Union member

    -
    - -
    - -
    +
    +

    cpuid module

    +
    @@ -140,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.linuxnative package

    + title="previous chapter">linuxnative package

    Next topic

    chipsec.helper.linuxnative.legacy_pci module

    + title="next chapter">legacy_pci module

    - +
    @@ -171,21 +134,21 @@

    Navigation

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  • OS Helpers and Drivers »
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    • -
  • chipsec.helper.linuxnative package »
    • -
  • chipsec.helper.linuxnative.cpuid module
    • +
  • helper package »
    • +
  • linuxnative package »
    • +
  • cpuid module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.linuxnative.html b/modules/chipsec.helper.linuxnative.html index f43e528b..00236bf0 100644 --- a/modules/chipsec.helper.linuxnative.html +++ b/modules/chipsec.helper.linuxnative.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.linuxnative package — CHIPSEC documentation - - + + + linuxnative package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,22 +46,16 @@

    Navigation

    - +
    @@ -116,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.linux.linuxhelper module

    + title="previous chapter">linuxhelper module

    Next topic

    chipsec.helper.linuxnative.cpuid module

    + title="next chapter">cpuid module

    - +
    @@ -147,20 +140,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • OS Helpers and Drivers »
    • -
  • chipsec.helper package »
    • -
  • chipsec.helper.linuxnative package
    • +
  • helper package »
    • +
  • linuxnative package
    • \ No newline at end of file diff --git a/modules/chipsec.helper.linuxnative.legacy_pci.html b/modules/chipsec.helper.linuxnative.legacy_pci.html index 578fb8ac..1f5c055b 100644 --- a/modules/chipsec.helper.linuxnative.legacy_pci.html +++ b/modules/chipsec.helper.linuxnative.legacy_pci.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.linuxnative.legacy_pci module — CHIPSEC documentation - - + + + legacy_pci module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,51 +47,9 @@

    Navigation

    -
    -

    chipsec.helper.linuxnative.legacy_pci module

    -
    -
    -class LegacyPci[source]
    -

    Bases: object

    -
    -
    -static read_pci_config(bus: int, dev: int, func: int, offset: int) → int[source]
    -
    - -
    -
    -static write_pci_config(bus: int, dev: int, func: int, offset: int, value: int) → None[source]
    -
    - -
    - -
    -
    -class Ports[source]
    -

    Bases: object

    -
    -
    -classmethod get_instance() → chipsec.helper.linuxnative.legacy_pci.Ports[source]
    -
    - -
    -
    -inl(port: int) → int[source]
    -
    - -
    -
    -instance = None
    -
    - -
    -
    -outl(value: int, port: int) → None[source]
    -
    - -
    - -
    +
    +

    legacy_pci module

    +
    @@ -146,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.linuxnative.cpuid module

    + title="previous chapter">cpuid module

    Next topic

    chipsec.helper.linuxnative.linuxnativehelper module

    + title="next chapter">linuxnativehelper module

    - +
    @@ -177,21 +134,21 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • OS Helpers and Drivers »
    • -
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    • -
  • chipsec.helper.linuxnative package »
    • -
  • chipsec.helper.linuxnative.legacy_pci module
    • +
  • helper package »
    • +
  • linuxnative package »
    • +
  • legacy_pci module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.linuxnative.linuxnativehelper.html b/modules/chipsec.helper.linuxnative.linuxnativehelper.html index 7d4b67f8..e603063c 100644 --- a/modules/chipsec.helper.linuxnative.linuxnativehelper.html +++ b/modules/chipsec.helper.linuxnative.linuxnativehelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.linuxnative.linuxnativehelper module — CHIPSEC documentation - - + + + linuxnativehelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,285 +47,10 @@

    Navigation

    -
    -

    chipsec.helper.linuxnative.linuxnativehelper module

    +
    +

    linuxnativehelper module

    Native Linux helper

    -
    -
    -class LinuxNativeHelper[source]
    -

    Bases: chipsec.helper.basehelper.Helper

    -
    -
    -DEV_MEM = '/dev/mem'
    -
    - -
    -
    -DEV_PORT = '/dev/port'
    -
    - -
    -
    -EFI_supported()[source]
    -
    - -
    -
    -alloc_phys_mem(length, max_phys_address)[source]
    -
    - -
    -
    -close()[source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -create() → bool[source]
    -
    - -
    -
    -delete() → bool[source]
    -
    - -
    -
    -delete_EFI_variable(name, guid)[source]
    -
    - -
    -
    -devmem_available() → bool[source]
    -

    Check if /dev/mem is usable. -In case the driver is not loaded, we might be able to perform the -requested operation via /dev/mem. Returns True if /dev/mem is -accessible.

    -
    - -
    -
    -devmsr_available() → bool[source]
    -

    Check if /dev/cpu/CPUNUM/msr is usable. -In case the driver is not loaded, we might be able to perform the -requested operation via /dev/cpu/CPUNUM/msr. This requires loading -the (more standard) msr driver. Returns True if /dev/cpu/CPUNUM/msr -is accessible.

    -
    - -
    -
    -devport_available() → bool[source]
    -

    Check if /dev/port is usable. -In case the driver is not loaded, we might be able to perform the -requested operation via /dev/port. Returns True if /dev/port is -accessible.

    -
    - -
    -
    -free_phys_mem(physical_address)[source]
    -
    - -
    -
    -get_ACPI_SDT()[source]
    -
    - -
    -
    -get_ACPI_table(table_name)[source]
    -
    - -
    -
    -get_EFI_variable(name, guid)[source]
    -
    - -
    -
    -get_affinity() → Optional[int][source]
    -
    - -
    -
    -get_bios_version() → str[source]
    -
    - -
    -
    -get_descriptor_table(cpu_thread_id, desc_table_code)[source]
    -
    - -
    -
    -get_threads_count() → int[source]
    -
    - -
    -
    -hypercall(rcx=0, rdx=0, r8=0, r9=0, r10=0, r11=0, rax=0, rbx=0, rdi=0, rsi=0, xmm_buffer=0)[source]
    -
    - -
    -
    -init()[source]
    -
    - -
    -
    -list_EFI_variables()[source]
    -
    - -
    -
    -load_ucode_update(cpu_thread_id, ucode_update_buf)[source]
    -
    - -
    -
    -map_io_space(base: int, size: int, cache_type: int) → None[source]
    -

    Map to memory a specific region.

    -
    - -
    -
    -memory_mapping(base: int, size: int) → Optional[chipsec.helper.linuxnative.linuxnativehelper.MemoryMapping][source]
    -

    Returns the mmap region that fully encompasses this area. -Returns None if no region matches.

    -
    - -
    -
    -msgbus_send_message(mcr, mcrx, mdr)[source]
    -
    - -
    -
    -msgbus_send_read_message(mcr, mcrx)[source]
    -
    - -
    -
    -msgbus_send_write_message(mcr, mcrx, mdr)[source]
    -
    - -
    -
    -read_cr(cpu_thread_id, cr_number)[source]
    -
    - -
    -
    -read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -read_msr(thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -read_pci_reg(bus: int, device: int, function: int, offset: int, size: int, domain: int = 0) → int[source]
    -
    - -
    -
    -read_phys_mem(phys_address, length: int) → bytes[source]
    -
    - -
    -
    -retpoline_enabled()[source]
    -
    - -
    -
    -send_sw_smi(cpu_thread_id, SMI_code_data, _rax, _rbx, _rcx, _rdx, _rsi, _rdi)[source]
    -
    - -
    -
    -set_EFI_variable(name, guid, buffer, buffer_size=None, attrs=None)[source]
    -
    - -
    -
    -set_affinity(thread_id: int) → Optional[int][source]
    -
    - -
    -
    -start() → bool[source]
    -
    - -
    -
    -stop() → bool[source]
    -
    - -
    -
    -va2pa(va)[source]
    -
    - -
    -
    -write_cr(cpu_thread_id, cr_number, value)[source]
    -
    - -
    -
    -write_io_port(io_port: int, value: int, size: int) → bool[source]
    -
    - -
    -
    -write_mmio_reg(phys_address: int, size: int, value: int) → None[source]
    -
    - -
    -
    -write_msr(thread_id: int, msr_addr: int, eax: int, edx: int) → int[source]
    -
    - -
    -
    -write_pci_reg(bus: int, device: int, function: int, offset: int, value: int, size: int = 4, domain: int = 0) → int[source]
    -
    - -
    -
    -write_phys_mem(phys_address, length: int, newval: bytes) → int[source]
    -
    - -
    - -
    -
    -class MemoryMapping(fileno, length, flags, prot, offset)[source]
    -

    Bases: mmap.mmap

    -

    Memory mapping based on Python’s mmap. -This subclass keeps tracks of the start and end of the mapping.

    -
    - -
    -
    -get_helper()[source]
    -
    - -
    +
    @@ -380,12 +104,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.linuxnative.legacy_pci module

    + title="previous chapter">legacy_pci module

    Next topic

    chipsec.helper.windows package

    + title="next chapter">windows package

    - +
    @@ -411,21 +135,21 @@

    Navigation

    modules |
  • - next |
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  • CHIPSEC documentation »
  • OS Helpers and Drivers »
    • -
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  • chipsec.helper.linuxnative package »
    • -
  • chipsec.helper.linuxnative.linuxnativehelper module
    • +
  • helper package »
    • +
  • linuxnative package »
    • +
  • linuxnativehelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.nonehelper.html b/modules/chipsec.helper.nonehelper.html index e483b798..e0cac1f1 100644 --- a/modules/chipsec.helper.nonehelper.html +++ b/modules/chipsec.helper.nonehelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.nonehelper module — CHIPSEC documentation - - + + + nonehelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,215 +46,9 @@

    Navigation

    -
    -

    chipsec.helper.nonehelper module

    -
    -
    -class NoneHelper[source]
    -

    Bases: chipsec.helper.basehelper.Helper

    -
    -
    -EFI_supported() → bool[source]
    -
    - -
    -
    -alloc_phys_mem(length: int, max_phys_address: int) → Tuple[int, int][source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -create() → bool[source]
    -
    - -
    -
    -delete() → bool[source]
    -
    - -
    -
    -delete_EFI_variable(name: str, guid: str) → Optional[int][source]
    -
    - -
    -
    -free_phys_mem(physical_address: int)[source]
    -
    - -
    -
    -get_ACPI_SDT() → Tuple[Optional[Array], bool][source]
    -
    - -
    -
    -get_ACPI_table(table_name: str) → Optional[Array][source]
    -
    - -
    -
    -get_EFI_variable(name: str, guid: str) → Optional[bytes][source]
    -
    - -
    -
    -get_affinity() → Optional[int][source]
    -
    - -
    -
    -get_descriptor_table(cpu_thread_id: int, desc_table_code: int) → Optional[Tuple[int, int, int]][source]
    -
    - -
    -
    -get_info() → Tuple[str, str][source]
    -
    - -
    -
    -get_threads_count() → int[source]
    -
    - -
    -
    -hypercall(rcx: int, rdx: int, r8: int, r9: int, r10: int, r11: int, rax: int, rbx: int, rdi: int, rsi: int, xmm_buffer: int) → int[source]
    -
    - -
    -
    -list_EFI_variables() → Optional[Dict[str, List[EfiVariableType]]][source]
    -
    - -
    -
    -load_ucode_update(cpu_thread_id: int, ucode_update_buf: bytes) → bool[source]
    -
    - -
    -
    -map_io_space(physical_address: int, length: int, cache_type: int) → int[source]
    -
    - -
    -
    -msgbus_send_message(mcr: int, mcrx: int, mdr: Optional[int]) → Optional[int][source]
    -
    - -
    -
    -msgbus_send_read_message(mcr: int, mcrx: int) → Optional[int][source]
    -
    - -
    -
    -msgbus_send_write_message(mcr: int, mcrx: int, mdr: int) → None[source]
    -
    - -
    -
    -read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -read_msr(cpu_thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -read_pci_reg(bus: int, device: int, function: int, address: int, size: int) → int[source]
    -
    - -
    -
    -read_phys_mem(phys_address: int, length: int) → bytes[source]
    -
    - -
    -
    -retpoline_enabled() → bool[source]
    -
    - -
    -
    -send_sw_smi(cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) → Optional[int][source]
    -
    - -
    -
    -set_EFI_variable(name: str, guid: str, data: bytes, datasize: Optional[int], attrs: Optional[int]) → Optional[int][source]
    -
    - -
    -
    -set_affinity(value: int) → Optional[int][source]
    -
    - -
    -
    -start() → bool[source]
    -
    - -
    -
    -stop() → bool[source]
    -
    - -
    -
    -va2pa(va: int) → Tuple[int, int][source]
    -
    - -
    -
    -write_cr(cpu_thread_id: int, cr_number: int, value: int) → int[source]
    -
    - -
    -
    -write_io_port(io_port: int, value: int, size: int) → int[source]
    -
    - -
    -
    -write_mmio_reg(phys_address: int, size: int, value: int) → int[source]
    -
    - -
    -
    -write_msr(cpu_thread_id: int, msr_addr: int, eax: int, edx: int) → int[source]
    -
    - -
    -
    -write_pci_reg(bus: int, device: int, function: int, address: int, value: int, size: int) → int[source]
    -
    - -
    -
    -write_phys_mem(phys_address: int, length: int, buf: bytes) → int[source]
    -
    - -
    - -
    +
    +

    nonehelper module

    +
    @@ -309,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.basehelper module

    + title="previous chapter">basehelper module

    Next topic

    chipsec.helper.oshelper module

    + title="next chapter">oshelper module

    - +
    @@ -340,20 +133,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • OS Helpers and Drivers »
    • -
  • chipsec.helper package »
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  • chipsec.helper.nonehelper module
    • +
  • helper package »
    • +
  • nonehelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.oshelper.html b/modules/chipsec.helper.oshelper.html index 6b262840..782867bb 100644 --- a/modules/chipsec.helper.oshelper.html +++ b/modules/chipsec.helper.oshelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.oshelper module — CHIPSEC documentation - - + + + oshelper module — CHIPSEC documentation + + - - - - + + + - + - + @@ -47,86 +46,10 @@

    Navigation

    -
    -

    chipsec.helper.oshelper module

    +
    +

    oshelper module

    Abstracts support for various OS/environments, wrapper around platform specific code that invokes kernel driver

    -
    -
    -class OsHelper[source]
    -

    Bases: object

    -
    -
    -get_available_helpers() → List[str][source]
    -
    - -
    -
    -get_base_helper()[source]
    -
    - -
    -
    -get_default_helper()[source]
    -
    - -
    -
    -get_helper(name: str) → Any[source]
    -
    - -
    -
    -getcwd() → str[source]
    -
    - -
    -
    -is_dal() → bool[source]
    -
    - -
    -
    -is_efi() → bool[source]
    -
    - -
    -
    -is_linux() → bool[source]
    -
    - -
    -
    -is_macos() → bool[source]
    -
    - -
    -
    -is_win8_or_greater() → bool[source]
    -
    - -
    -
    -is_windows() → bool[source]
    -
    - -
    -
    -load_helpers() → None[source]
    -
    - -
    - -
    -
    -get_tools_path() → str[source]
    -
    - -
    -
    -helper()[source]
    -
    - -
    +
    @@ -180,7 +103,7 @@

    Table of Contents

    Previous topic

    chipsec.helper.nonehelper module

    + title="previous chapter">nonehelper module

    Next topic

    @@ -196,7 +119,7 @@

    Quick search

    - +
    @@ -214,17 +137,17 @@

    Navigation

    next |
  • - previous |
  • CHIPSEC documentation »
  • OS Helpers and Drivers »
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  • chipsec.helper.oshelper module
    • +
  • helper package »
    • +
  • oshelper module
    • \ No newline at end of file diff --git a/modules/chipsec.helper.windows.html b/modules/chipsec.helper.windows.html index e12321b3..fec7586c 100644 --- a/modules/chipsec.helper.windows.html +++ b/modules/chipsec.helper.windows.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.windows package — CHIPSEC documentation - - + + + windows package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,20 +46,14 @@

    Navigation

    -
    -

    chipsec.helper.windows package

    - -
    -

    Module contents

    -
    -
    +
    @@ -114,12 +107,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.linuxnative.linuxnativehelper module

    + title="previous chapter">linuxnativehelper module

    Next topic

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    + title="next chapter">windowshelper module

    - +
    @@ -145,20 +138,20 @@

    Navigation

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  • windows package
    • \ No newline at end of file diff --git a/modules/chipsec.helper.windows.windowshelper.html b/modules/chipsec.helper.windows.windowshelper.html index 41fd42d0..69b85d26 100644 --- a/modules/chipsec.helper.windows.windowshelper.html +++ b/modules/chipsec.helper.windows.windowshelper.html @@ -1,24 +1,23 @@ - - + - - chipsec.helper.windows.windowshelper module — CHIPSEC documentation - - + + + windowshelper module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,292 +47,9 @@

    Navigation

    -
    -

    chipsec.helper.windows.windowshelper module

    -

    Management and communication with Windows kernel mode driver which provides access to hardware resources

    -
    -

    Note

    -

    On Windows you need to install pywin32 Python extension corresponding to your Python version: -http://sourceforge.net/projects/pywin32/

    -
    -
    -
    -CTL_CODE(DeviceType: int, Function: int, Method: int, Access: int) → int[source]
    -
    - -
    -
    -class EFI_HDR_WIN(Size, DataOffset, DataSize, Attributes, guid)[source]
    -

    Bases: chipsec.helper.windows.windowshelper.EFI_HDR_WIN

    -
    - -
    -
    -class PCI_BDF[source]
    -

    Bases: _ctypes.Structure

    -
    -
    -BUS
    -

    Structure/Union member

    -
    - -
    -
    -DEV
    -

    Structure/Union member

    -
    - -
    -
    -FUNC
    -

    Structure/Union member

    -
    - -
    -
    -OFF
    -

    Structure/Union member

    -
    - -
    - -
    -
    -class WindowsHelper[source]
    -

    Bases: chipsec.helper.basehelper.Helper

    -
    -
    -EFI_supported() → bool[source]
    -
    - -
    -
    -alloc_phys_mem(length: int, max_pa: int) → Tuple[int, int][source]
    -
    - -
    -
    -check_driver_handle() → bool[source]
    -
    - -
    -
    -cpuid(eax: int, ecx: int) → Tuple[int, int, int, int][source]
    -
    - -
    -
    -create() → bool[source]
    -
    - -
    -
    -delete() → bool[source]
    -
    - -
    -
    -delete_EFI_variable(name: str, guid: str) → int[source]
    -
    - -
    -
    -free_phys_mem(physical_address)[source]
    -
    - -
    -
    -get_ACPI_SDT() → Tuple[Optional[_ctypes.Array], bool][source]
    -
    - -
    -
    -get_ACPI_table(table_name)[source]
    -
    - -
    -
    -get_EFI_variable(name: str, guid: str, attrs: Optional[int] = None) → Optional[bytes][source]
    -
    - -
    -
    -get_EFI_variable_full(name: str, guid: str, attrs: Optional[int] = None) → Tuple[int, Optional[bytes], int][source]
    -
    - -
    -
    -get_affinity() → Optional[int][source]
    -
    - -
    -
    -get_descriptor_table(cpu_thread_id: int, desc_table_code: int) → Tuple[int, int, int][source]
    -
    - -
    -
    -get_threads_count() → int[source]
    -
    - -
    -
    -hypercall(rcx, rdx, r8, r9, r10, r11, rax, rbx, rdi, rsi, xmm_buffer)[source]
    -
    - -
    -
    -list_EFI_variables(infcls: int = 2) → Optional[Dict[str, List[Tuple[int, bytes, int, bytes, str, int]]]][source]
    -
    - -
    -
    -load_ucode_update(cpu_thread_id: int, ucode_update_buf: bytes) → bool[source]
    -
    - -
    -
    -map_io_space(physical_address, length, cache_type)[source]
    -
    - -
    -
    -msgbus_send_message(mcr, mcrx, mdr)[source]
    -
    - -
    -
    -msgbus_send_read_message(mcr, mcrx)[source]
    -
    - -
    -
    -msgbus_send_write_message(mcr, mcrx, mdr)[source]
    -
    - -
    -
    -native_get_ACPI_table(table_name: str) → Optional[_ctypes.Array][source]
    -
    - -
    -
    -read_cr(cpu_thread_id: int, cr_number: int) → int[source]
    -
    - -
    -
    -read_io_port(io_port: int, size: int) → int[source]
    -
    - -
    -
    -read_mmio_reg(phys_address: int, size: int) → int[source]
    -
    - -
    -
    -read_msr(cpu_thread_id: int, msr_addr: int) → Tuple[int, int][source]
    -
    - -
    -
    -read_pci_reg(bus: int, device: int, function: int, address: int, size: int) → int[source]
    -
    - -
    -
    -read_phys_mem(phys_address: int, length: int) → bytes[source]
    -
    - -
    -
    -retpoline_enabled() → bool[source]
    -
    - -
    -
    -send_sw_smi(cpu_thread_id: int, SMI_code_data: int, _rax: int, _rbx: int, _rcx: int, _rdx: int, _rsi: int, _rdi: int) → Optional[Tuple[int, int, int, int, int, int, int]][source]
    -
    - -
    -
    -set_EFI_variable(name: str, guid: str, buffer: bytes, buffer_size: Optional[int], attrs: Optional[int]) → int[source]
    -
    - -
    -
    -set_affinity(value: int) → Optional[int][source]
    -
    - -
    -
    -show_warning() → None[source]
    -
    - -
    -
    -start() → bool[source]
    -
    - -
    -
    -stop() → bool[source]
    -
    - -
    -
    -va2pa(va: int) → Tuple[int, int][source]
    -
    - -
    -
    -write_cr(cpu_thread_id: int, cr_number: int, value: int) → int[source]
    -
    - -
    -
    -write_io_port(io_port: int, value: int, size: int) → bool[source]
    -
    - -
    -
    -write_mmio_reg(phys_address: int, size: int, value: int) → int[source]
    -
    - -
    -
    -write_msr(cpu_thread_id: int, msr_addr: int, eax: int, edx: int) → int[source]
    -
    - -
    -
    -write_pci_reg(bus: int, device: int, function: int, address: int, value: int, size: int) → int[source]
    -
    - -
    -
    -write_phys_mem(phys_address: int, length: int, buf: AnyStr)[source]
    -
    - -
    - -
    -
    -getEFIvariables_NtEnumerateSystemEnvironmentValuesEx2(nvram_buf: bytes) → Dict[str, List[Tuple[int, bytes, int, bytes, str, int]]][source]
    -
    - -
    -
    -get_helper() → chipsec.helper.windows.windowshelper.WindowsHelper[source]
    -
    - -
    -
    -packl_ctypes(lnum: int, bitlength: int) → bytes[source]
    -
    - -
    +
    +

    windowshelper module

    +
    @@ -387,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.helper.windows package

    + title="previous chapter">windows package

    Next topic

    chipsec.helper.basehelper module

    + title="next chapter">basehelper module

    - +
    @@ -418,21 +134,21 @@

    Navigation

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  • CHIPSEC documentation »
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  • chipsec.helper.windows.windowshelper module
    • +
  • helper package »
    • +
  • windows package »
    • +
  • windowshelper module
    • \ No newline at end of file diff --git a/modules/chipsec.library.architecture.html b/modules/chipsec.library.architecture.html index 4022c120..625e0d9f 100644 --- a/modules/chipsec.library.architecture.html +++ b/modules/chipsec.library.architecture.html @@ -1,20 +1,19 @@ - - + - - chipsec.library.architecture module — CHIPSEC documentation - - + + + architecture module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
  • CHIPSEC documentation »
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  • chipsec.library.architecture module
    • +
  • architecture module
    • @@ -37,25 +36,9 @@

    Navigation

    -
    -

    chipsec.library.architecture module

    -
    -
    -class ARCH_VID[source]
    -

    Bases: object

    -
    -
    -AMD = 4130
    -
    - -
    -
    -INTEL = 32902
    -
    - -
    - -
    +
    +

    architecture module

    +
    @@ -115,7 +98,7 @@

    Quick search

    - +
    @@ -130,12 +113,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.library.architecture module
    • +
  • architecture module
    • \ No newline at end of file diff --git a/modules/chipsec.library.bits.html b/modules/chipsec.library.bits.html index 90af53a7..96cc6203 100644 --- a/modules/chipsec.library.bits.html +++ b/modules/chipsec.library.bits.html @@ -1,20 +1,19 @@ - - + - - chipsec.library.bits module — CHIPSEC documentation - - + + + bits module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

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    modules |
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  • chipsec.library.bits module
    • +
  • bits module
    • @@ -37,39 +36,9 @@

    Navigation

    -
    -

    chipsec.library.bits module

    -
    -
    -bit(bit_num: int) → int[source]
    -
    - -
    -
    -get_bits(value: int, start: int, nbits: int) → int[source]
    -
    - -
    -
    -is_all_ones(value: int, size: int, width: int = 8) → bool[source]
    -
    - -
    -
    -is_set(val: int, bit_mask: int) → bool[source]
    -
    - -
    -
    -ones_complement(value: int, number_of_bits: int = 64) → int[source]
    -
    - -
    -
    -scan_single_bit_mask(bit_mask: int) → Optional[int][source]
    -
    - -
    +
    +

    bits module

    +
    @@ -129,7 +98,7 @@

    Quick search

    - +
    @@ -144,12 +113,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
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  • chipsec.library.bits module
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  • bits module
    • \ No newline at end of file diff --git a/modules/chipsec.library.control.html b/modules/chipsec.library.control.html new file mode 100644 index 00000000..6778e189 --- /dev/null +++ b/modules/chipsec.library.control.html @@ -0,0 +1,124 @@ + + + + + + + + control module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    control module

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.device.html b/modules/chipsec.library.device.html new file mode 100644 index 00000000..0d080861 --- /dev/null +++ b/modules/chipsec.library.device.html @@ -0,0 +1,124 @@ + + + + + + + + device module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    device module

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.html b/modules/chipsec.library.html index eb212103..1a65a14b 100644 --- a/modules/chipsec.library.html +++ b/modules/chipsec.library.html @@ -1,20 +1,19 @@ - - + - - chipsec.library package — CHIPSEC documentation - - + + + library package — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
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    • +
  • library package
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    Navigation

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    Quick search

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    @@ -130,12 +130,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
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  • chipsec.library package
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    • \ No newline at end of file diff --git a/modules/chipsec.library.lock.html b/modules/chipsec.library.lock.html new file mode 100644 index 00000000..f3138ac1 --- /dev/null +++ b/modules/chipsec.library.lock.html @@ -0,0 +1,124 @@ + + + + + + + + lock module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    lock module

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.memory.html b/modules/chipsec.library.memory.html index bd77ac98..85a649b3 100644 --- a/modules/chipsec.library.memory.html +++ b/modules/chipsec.library.memory.html @@ -1,20 +1,19 @@ - - + - - chipsec.library.memory module — CHIPSEC documentation - - + + + memory module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

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    chipsec.library.memory module

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    memory module

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    @@ -99,7 +98,7 @@

    Quick search

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    Navigation

    modules |
  • CHIPSEC documentation »
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  • chipsec.library.memory module
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  • memory module
    • \ No newline at end of file diff --git a/modules/chipsec.library.module_helper.html b/modules/chipsec.library.module_helper.html new file mode 100644 index 00000000..759d4aae --- /dev/null +++ b/modules/chipsec.library.module_helper.html @@ -0,0 +1,124 @@ + + + + + + + + module_helper module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    module_helper module

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.options.html b/modules/chipsec.library.options.html new file mode 100644 index 00000000..b5dac553 --- /dev/null +++ b/modules/chipsec.library.options.html @@ -0,0 +1,124 @@ + + + + + + + + options module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    options module

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.register.html b/modules/chipsec.library.register.html new file mode 100644 index 00000000..1da6c505 --- /dev/null +++ b/modules/chipsec.library.register.html @@ -0,0 +1,125 @@ + + + + + + + + register module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    register module

    +

    Main functionality to read/write configuration registers based on their XML configuration

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.returncode.html b/modules/chipsec.library.returncode.html new file mode 100644 index 00000000..795503fc --- /dev/null +++ b/modules/chipsec.library.returncode.html @@ -0,0 +1,125 @@ + + + + + + + + returncode module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    returncode module

    +

    Common include file for modules

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.library.strings.html b/modules/chipsec.library.strings.html index 7c3b46eb..d780b2f3 100644 --- a/modules/chipsec.library.strings.html +++ b/modules/chipsec.library.strings.html @@ -1,20 +1,19 @@ - - + - - chipsec.library.strings module — CHIPSEC documentation - - + + + strings module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
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  • strings module
    • @@ -37,34 +36,9 @@

    Navigation

    -
    -

    chipsec.library.strings module

    -
    -
    -bytestostring(mbytes: AnyStr) → str[source]
    -
    - -
    -
    -get_datetime_str() → str[source]
    -
    - -
    -
    -is_hex(maybe_hex: Iterable) → bool[source]
    -
    - -
    -
    -is_printable(seq: AnyStr) → bool[source]
    -
    - -
    -
    -stringtobytes(mstr: AnyStr) → bytes[source]
    -
    - -
    +
    +

    strings module

    +
    @@ -124,7 +98,7 @@

    Quick search

    - +
    @@ -139,12 +113,12 @@

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    modules |
  • CHIPSEC documentation »
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    • \ No newline at end of file diff --git a/modules/chipsec.library.structs.html b/modules/chipsec.library.structs.html index 11d58f84..5cf58303 100644 --- a/modules/chipsec.library.structs.html +++ b/modules/chipsec.library.structs.html @@ -1,20 +1,19 @@ - - + - - chipsec.library.structs module — CHIPSEC documentation - - + + + structs module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
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  • structs module
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    chipsec.library.structs module

    -
    -
    -DB(val: int) → bytes[source]
    -
    - -
    -
    -DD(val: int) → bytes[source]
    -
    - -
    -
    -DQ(val: int) → bytes[source]
    -
    - -
    -
    -DW(val: int) → bytes[source]
    -
    - -
    -
    -pack1(value: int, size: int) → bytes[source]
    -

    Shortcut to pack a single value into a string based on its size.

    -
    - -
    -
    -unpack1(string: bytes, size: int) → int[source]
    -

    Shortcut to unpack a single value from a string based on its size.

    -
    - -
    +
    +

    structs module

    +
    @@ -131,7 +98,7 @@

    Quick search

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    @@ -146,12 +113,12 @@

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    modules |
  • CHIPSEC documentation »
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  • chipsec.library.structs module
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  • structs module
    • \ No newline at end of file diff --git a/modules/chipsec.library.types.html b/modules/chipsec.library.types.html index 46a6b6c8..12383814 100644 --- a/modules/chipsec.library.types.html +++ b/modules/chipsec.library.types.html @@ -1,20 +1,19 @@ - - + - - chipsec.library.types module — CHIPSEC documentation - - + + + types module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

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    modules |
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    Navigation

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    chipsec.library.types module

    -
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    types module

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    @@ -99,7 +98,7 @@

    Quick search

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    modules |
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    • \ No newline at end of file diff --git a/modules/chipsec.modules.bdw.html b/modules/chipsec.modules.bdw.html index 16ac3ae4..58b7df19 100644 --- a/modules/chipsec.modules.bdw.html +++ b/modules/chipsec.modules.bdw.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.bdw package — CHIPSEC documentation - - + + + bdw package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,12 +46,9 @@

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    chipsec.modules.bdw package

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    Module contents

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    bdw package

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    Previous topic

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    • \ No newline at end of file diff --git a/modules/chipsec.modules.byt.html b/modules/chipsec.modules.byt.html index 32847aa0..e7947bd8 100644 --- a/modules/chipsec.modules.byt.html +++ b/modules/chipsec.modules.byt.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.byt package — CHIPSEC documentation - - + + + byt package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,12 +46,9 @@

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    • +
  • byt package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.bios_kbrd_buffer.html b/modules/chipsec.modules.common.bios_kbrd_buffer.html index a284f01b..2f8c4133 100644 --- a/modules/chipsec.modules.common.bios_kbrd_buffer.html +++ b/modules/chipsec.modules.common.bios_kbrd_buffer.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.bios_kbrd_buffer module — CHIPSEC documentation - - + + + bios_kbrd_buffer module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.bios_kbrd_buffer module

    +
    +

    bios_kbrd_buffer module

    Checks for exposure of pre-boot passwords (BIOS/HDD/pre-bot authentication SW) in the BIOS keyboard buffer.

    Reference:
      @@ -63,32 +62,7 @@

      Navigation

    -
    -
    -class bios_kbrd_buffer[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_BIOS_keyboard_buffer() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -142,12 +116,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.uefi.s3bootscript module

    + title="previous chapter">s3bootscript module

    Next topic

    chipsec.modules.common.bios_smi module

    + title="next chapter">bios_smi module

    - +
    @@ -173,21 +147,21 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.bios_kbrd_buffer module
    • +
  • modules package »
    • +
  • common package »
    • +
  • bios_kbrd_buffer module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.bios_smi.html b/modules/chipsec.modules.common.bios_smi.html index 13717af3..8a14f269 100644 --- a/modules/chipsec.modules.common.bios_smi.html +++ b/modules/chipsec.modules.common.bios_smi.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.bios_smi module — CHIPSEC documentation - - + + + bios_smi module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.bios_smi module

    +
    +

    bios_smi module

    The module checks that SMI events configuration is locked down - Global SMI Enable/SMI Lock - TCO SMI Enable/TCO Lock

    @@ -73,32 +72,7 @@

    Navigation

    -
    -
    -class bios_smi[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_SMI_locks() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -152,12 +126,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.bios_kbrd_buffer module

    + title="previous chapter">bios_kbrd_buffer module

    Next topic

    chipsec.modules.common.bios_ts module

    + title="next chapter">bios_ts module

    - +
    @@ -183,21 +157,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.bios_smi module
    • +
  • modules package »
    • +
  • common package »
    • +
  • bios_smi module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.bios_ts.html b/modules/chipsec.modules.common.bios_ts.html index 43f567d3..a9941bc9 100644 --- a/modules/chipsec.modules.common.bios_ts.html +++ b/modules/chipsec.modules.common.bios_ts.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.bios_ts module — CHIPSEC documentation - - + + + bios_ts module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.bios_ts module

    +
    +

    bios_ts module

    Checks for BIOS Interface Lock including Top Swap Mode

    References:
      @@ -69,32 +68,7 @@

      Navigation

    -
    -
    -class bios_ts[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_bios_iface_lock() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -148,12 +122,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.bios_smi module

    + title="previous chapter">bios_smi module

    Next topic

    chipsec.modules.common.bios_wp module

    + title="next chapter">bios_wp module

    - +
    @@ -179,21 +153,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.bios_ts module
    • +
  • modules package »
    • +
  • common package »
    • +
  • bios_ts module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.bios_wp.html b/modules/chipsec.modules.common.bios_wp.html index b054f6a4..2e564aa7 100644 --- a/modules/chipsec.modules.common.bios_wp.html +++ b/modules/chipsec.modules.common.bios_wp.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.bios_wp module — CHIPSEC documentation - - + + + bios_wp module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.bios_wp module

    +
    +

    bios_wp module

    The BIOS region in flash can be protected either using SMM-based protection or using configuration in the SPI controller. However, the SPI controller configuration is set once and locked, which would prevent writes later.

    This module checks both mechanisms. In order to pass this test using SPI controller configuration, the SPI Protected Range registers (PR0-4) will need to cover the entire BIOS region. Often, if this configuration is used at all, it is used only to protect part of the BIOS region (usually the boot block). @@ -87,37 +86,7 @@

    Navigation

  • Module will fail if SMM-based protection is not correctly configured and SPI protected ranges (PR registers) do not protect the entire BIOS region.

    • -
    -
    -class bios_wp[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_BIOS_write_protection() → int[source]
    -
    - -
    -
    -check_SPI_protected_ranges() → bool[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -171,12 +140,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.bios_ts module

    + title="previous chapter">bios_ts module

    Next topic

    chipsec.modules.common.cet module

    + title="next chapter">cet module

    - +
    @@ -202,21 +171,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.bios_wp module
    • +
  • modules package »
    • +
  • common package »
    • +
  • bios_wp module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.cet.html b/modules/chipsec.modules.common.cet.html index d3cb76a5..a3b00973 100644 --- a/modules/chipsec.modules.common.cet.html +++ b/modules/chipsec.modules.common.cet.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.cet module — CHIPSEC documentation - - + + + cet module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.cet module

    +
    +

    cet module

    Reports CET Settings

    Usage:

    chipsec_main -m common.cet

    @@ -67,57 +66,7 @@

    Navigation

  • Module is INFORMATION only and does NOT return a Pass/Fail

    • -
    -
    -class cet[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_cet()[source]
    -
    - -
    -
    -get_cpuid_value() → None[source]
    -
    - -
    -
    -is_supported()[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -print_cet_state(cet_msr)[source]
    -
    - -
    -
    -run(module_argv)[source]
    -
    - -
    -
    -setting_enabled(msr_val, field, mask, desc)[source]
    -
    - -
    -
    -support_ibt() → bool[source]
    -
    - -
    -
    -support_shadow() → bool[source]
    -
    - -
    - -
    +
    @@ -171,12 +120,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.bios_wp module

    + title="previous chapter">bios_wp module

    Next topic

    chipsec.modules.common.debugenabled module

    + title="next chapter">debugenabled module

    - +
    @@ -202,21 +151,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.cet module
    • +
  • modules package »
    • +
  • common package »
    • +
  • cet module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.cpu.cpu_info.html b/modules/chipsec.modules.common.cpu.cpu_info.html index ecfeb68a..2ea92ca8 100644 --- a/modules/chipsec.modules.common.cpu.cpu_info.html +++ b/modules/chipsec.modules.common.cpu.cpu_info.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.cpu.cpu_info module — CHIPSEC documentation - - + + + cpu_info module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -49,8 +48,8 @@

    Navigation

    -
    -

    chipsec.modules.common.cpu.cpu_info module

    +
    +

    cpu_info module

    Displays CPU information

    Reference:
      @@ -74,27 +73,7 @@

      Navigation

    -
    -
    -class cpu_info[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -148,12 +127,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.cpu package

    + title="previous chapter">cpu package

    Next topic

    chipsec.modules.common.cpu.ia_untrusted module

    + title="next chapter">ia_untrusted module

    - +
    @@ -179,22 +158,22 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
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    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.cpu package »
    • -
  • chipsec.modules.common.cpu.cpu_info module
    • +
  • modules package »
    • +
  • common package »
    • +
  • cpu package »
    • +
  • cpu_info module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.cpu.html b/modules/chipsec.modules.common.cpu.html index 642e0a55..cb6ce4b5 100644 --- a/modules/chipsec.modules.common.cpu.html +++ b/modules/chipsec.modules.common.cpu.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.cpu package — CHIPSEC documentation - - + + + cpu package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,22 +47,16 @@

    Navigation

    - +
    @@ -117,12 +110,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common package

    + title="previous chapter">common package

    Next topic

    chipsec.modules.common.cpu.cpu_info module

    + title="next chapter">cpu_info module

    - +
    @@ -148,21 +141,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.cpu package
    • +
  • modules package »
    • +
  • common package »
    • +
  • cpu package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.cpu.ia_untrusted.html b/modules/chipsec.modules.common.cpu.ia_untrusted.html index caad5445..0e566519 100644 --- a/modules/chipsec.modules.common.cpu.ia_untrusted.html +++ b/modules/chipsec.modules.common.cpu.ia_untrusted.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.cpu.ia_untrusted module — CHIPSEC documentation - - + + + ia_untrusted module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -49,8 +48,8 @@

    Navigation

    -
    -

    chipsec.modules.common.cpu.ia_untrusted module

    +
    +

    ia_untrusted module

    IA Untrusted checks

    Usage:

    chipsec_main -m common.cpu.ia_untrusted

    @@ -65,32 +64,7 @@

    Navigation

    -
    -
    -class ia_untrusted[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_untrusted() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -144,12 +118,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.cpu.cpu_info module

    + title="previous chapter">cpu_info module

    Next topic

    chipsec.modules.common.cpu.spectre_v2 module

    + title="next chapter">spectre_v2 module

    - +
    @@ -175,22 +149,22 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
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    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.cpu package »
    • -
  • chipsec.modules.common.cpu.ia_untrusted module
    • +
  • modules package »
    • +
  • common package »
    • +
  • cpu package »
    • +
  • ia_untrusted module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.cpu.spectre_v2.html b/modules/chipsec.modules.common.cpu.spectre_v2.html index ebf12c6d..9445cbe3 100644 --- a/modules/chipsec.modules.common.cpu.spectre_v2.html +++ b/modules/chipsec.modules.common.cpu.spectre_v2.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.cpu.spectre_v2 module — CHIPSEC documentation - - + + + spectre_v2 module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -49,8 +48,8 @@

    Navigation

    -
    -

    chipsec.modules.common.cpu.spectre_v2 module

    +
    +

    spectre_v2 module

    The module checks if system includes hardware mitigations for Speculative Execution Side Channel. Specifically, it verifies that the system supports CPU mitigations for Branch Target Injection vulnerability a.k.a. Spectre Variant 2 (CVE-2017-5715)

    @@ -132,32 +131,7 @@

    Navigation

  • Retpoline: a software construct for preventing branch-target-injection: https://support.google.com/faqs/answer/7625886

    • -
    -
    -class spectre_v2[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_spectre_mitigations() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -211,12 +185,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.cpu.ia_untrusted module

    + title="previous chapter">ia_untrusted module

    Next topic

    chipsec.modules.common.secureboot package

    + title="next chapter">secureboot package

    - +
    @@ -242,22 +216,22 @@

    Navigation

    modules |
  • - next |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.cpu package »
    • -
  • chipsec.modules.common.cpu.spectre_v2 module
    • +
  • modules package »
    • +
  • common package »
    • +
  • cpu package »
    • +
  • spectre_v2 module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.debugenabled.html b/modules/chipsec.modules.common.debugenabled.html index b01de007..74b3fe89 100644 --- a/modules/chipsec.modules.common.debugenabled.html +++ b/modules/chipsec.modules.common.debugenabled.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.debugenabled module — CHIPSEC documentation - - + + + debugenabled module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.debugenabled module

    +
    +

    debugenabled module

    This module checks if the system has debug features turned on, specifically the Direct Connect Interface (DCI).

    This module checks the following bits: @@ -77,37 +76,7 @@

    Navigation

    -
    -
    -class debugenabled[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_cpu_debug_enable() → int[source]
    -
    - -
    -
    -check_dci() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -161,12 +130,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.cet module

    + title="previous chapter">cet module

    Next topic

    chipsec.modules.common.ia32cfg module

    + title="next chapter">ia32cfg module

    - +
    @@ -192,21 +161,21 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.debugenabled module
    • +
  • modules package »
    • +
  • common package »
    • +
  • debugenabled module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.html b/modules/chipsec.modules.common.html index 0efded7d..7ade40d5 100644 --- a/modules/chipsec.modules.common.html +++ b/modules/chipsec.modules.common.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common package — CHIPSEC documentation - - + + + common package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,75 +46,54 @@

    Navigation

    -
    -

    chipsec.modules.common package

    - - -
    -

    Module contents

    -
    -
    +
    @@ -169,12 +147,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.byt package

    + title="previous chapter">byt package

    Next topic

    chipsec.modules.common.cpu package

    + title="next chapter">cpu package

    - +
    @@ -200,20 +178,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
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  • chipsec.modules.common package
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  • modules package »
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  • common package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.ia32cfg.html b/modules/chipsec.modules.common.ia32cfg.html index d1f74ab4..b689e86b 100644 --- a/modules/chipsec.modules.common.ia32cfg.html +++ b/modules/chipsec.modules.common.ia32cfg.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.ia32cfg module — CHIPSEC documentation - - + + + ia32cfg module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.ia32cfg module

    +
    +

    ia32cfg module

    Tests that IA-32/IA-64 architectural features are configured and locked, including IA32 Model Specific Registers (MSRs)

    Reference:
      @@ -74,32 +73,7 @@

      Navigation

    -
    -
    -class ia32cfg[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_ia32feature_control() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -153,12 +127,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.debugenabled module

    + title="previous chapter">debugenabled module

    Next topic

    chipsec.modules.common.me_mfg_mode module

    + title="next chapter">me_mfg_mode module

    - +
    @@ -184,21 +158,21 @@

    Navigation

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    • -
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  • chipsec.modules.common.ia32cfg module
    • +
  • modules package »
    • +
  • common package »
    • +
  • ia32cfg module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.me_mfg_mode.html b/modules/chipsec.modules.common.me_mfg_mode.html index 6575a0db..9b986068 100644 --- a/modules/chipsec.modules.common.me_mfg_mode.html +++ b/modules/chipsec.modules.common.me_mfg_mode.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.me_mfg_mode module — CHIPSEC documentation - - + + + me_mfg_mode module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.me_mfg_mode module

    +
    +

    me_mfg_mode module

    This module checks that ME Manufacturing mode is not enabled.

    References:

    https://blog.ptsecurity.com/2018/10/intel-me-manufacturing-mode-macbook.html

    @@ -116,32 +115,7 @@

    Navigation

    -
    -
    -class me_mfg_mode[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_me_mfg_mode() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -195,12 +169,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.ia32cfg module

    + title="previous chapter">ia32cfg module

    Next topic

    chipsec.modules.common.memconfig module

    + title="next chapter">memconfig module

    - +
    @@ -226,21 +200,21 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.me_mfg_mode module
    • +
  • modules package »
    • +
  • common package »
    • +
  • me_mfg_mode module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.memconfig.html b/modules/chipsec.modules.common.memconfig.html index ccf1fa03..fcab1a16 100644 --- a/modules/chipsec.modules.common.memconfig.html +++ b/modules/chipsec.modules.common.memconfig.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.memconfig module — CHIPSEC documentation - - + + + memconfig module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.memconfig module

    +
    +

    memconfig module

    This module verifies memory map secure configuration, that memory map registers are correctly configured and locked down.

    @@ -66,32 +65,7 @@

    Navigation

  • This module will only run on Core (client) platforms.

    • -
    -
    -class memconfig[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_memmap_locks() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -145,12 +119,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.me_mfg_mode module

    + title="previous chapter">me_mfg_mode module

    Next topic

    chipsec.modules.common.memlock module

    + title="next chapter">memlock module

    - +
    @@ -176,21 +150,21 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.memconfig module
    • +
  • modules package »
    • +
  • common package »
    • +
  • memconfig module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.memlock.html b/modules/chipsec.modules.common.memlock.html index 4cbd8a41..e307f6bd 100644 --- a/modules/chipsec.modules.common.memlock.html +++ b/modules/chipsec.modules.common.memlock.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.memlock module — CHIPSEC documentation - - + + + memlock module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.memlock module

    +
    +

    memlock module

    This module checks if memory configuration is locked to protect SMM

    Reference:
      @@ -84,32 +83,7 @@

      Navigation

    • This module will not run on Atom based platforms.

    -
    -
    -class memlock[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_MSR_LT_LOCK_MEMORY() → bool[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -163,12 +137,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.memconfig module

    + title="previous chapter">memconfig module

    Next topic

    chipsec.modules.common.remap module

    + title="next chapter">remap module

    - +
    @@ -194,21 +168,21 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.memlock module
    • +
  • modules package »
    • +
  • common package »
    • +
  • memlock module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.remap.html b/modules/chipsec.modules.common.remap.html index f251cd98..f498e12d 100644 --- a/modules/chipsec.modules.common.remap.html +++ b/modules/chipsec.modules.common.remap.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.remap module — CHIPSEC documentation - - + + + remap module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.remap module

    +
    +

    remap module

    Check Memory Remapping Configuration

    Reference:
      @@ -77,37 +76,7 @@

      Navigation

    • This module will only run on Core platforms.

    -
    -
    -class remap[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_remap_config() → int[source]
    -
    - -
    -
    -is_ibecc_enabled() → bool[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(_) → int[source]
    -
    - -
    - -
    +
    @@ -161,12 +130,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.memlock module

    + title="previous chapter">memlock module

    Next topic

    chipsec.modules.common.rtclock module

    + title="next chapter">rtclock module

    - +
    @@ -192,21 +161,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.remap module
    • +
  • modules package »
    • +
  • common package »
    • +
  • remap module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.rtclock.html b/modules/chipsec.modules.common.rtclock.html index dba98724..7e06bade 100644 --- a/modules/chipsec.modules.common.rtclock.html +++ b/modules/chipsec.modules.common.rtclock.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.rtclock module — CHIPSEC documentation - - + + + rtclock module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,9 +47,9 @@

    Navigation

    -
    -

    chipsec.modules.common.rtclock module

    -
    +
    +

    rtclock module

    +
    @@ -104,12 +103,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.remap module

    + title="previous chapter">remap module

    Next topic

    chipsec.modules.common.sgx_check module

    + title="next chapter">sgx_check module

    - +
    @@ -135,21 +134,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.rtclock module
    • +
  • modules package »
    • +
  • common package »
    • +
  • rtclock module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.secureboot.html b/modules/chipsec.modules.common.secureboot.html index 84ab5d34..c5b9edce 100644 --- a/modules/chipsec.modules.common.secureboot.html +++ b/modules/chipsec.modules.common.secureboot.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.secureboot package — CHIPSEC documentation - - + + + secureboot package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,20 +47,14 @@

    Navigation

    -
    -

    chipsec.modules.common.secureboot package

    - -
    -

    Module contents

    -
    -
    +
    @@ -115,12 +108,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.cpu.spectre_v2 module

    + title="previous chapter">spectre_v2 module

    Next topic

    chipsec.modules.common.secureboot.variables module

    + title="next chapter">variables module

    - +
    @@ -146,21 +139,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.secureboot package
    • +
  • modules package »
    • +
  • common package »
    • +
  • secureboot package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.secureboot.variables.html b/modules/chipsec.modules.common.secureboot.variables.html index f420a75e..9e9ee797 100644 --- a/modules/chipsec.modules.common.secureboot.variables.html +++ b/modules/chipsec.modules.common.secureboot.variables.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.secureboot.variables module — CHIPSEC documentation - - + + + variables module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -49,8 +48,8 @@

    Navigation

    -
    -

    chipsec.modules.common.secureboot.variables module

    +
    +

    variables module

    Verify that all Secure Boot key UEFI variables are authenticated (BS+RT+AT) and protected from unauthorized modification.

    @@ -77,37 +76,7 @@

    Navigation

  • Module is not supported in all environments.

    • -
    -
    -class variables[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -can_modify(name: str, guid: Optional[AnyStr], data: Optional[bytes]) → bool[source]
    -
    - -
    -
    -check_secureboot_variable_attributes(do_modify: bool) → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -161,12 +130,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.secureboot package

    + title="previous chapter">secureboot package

    Next topic

    chipsec.modules.common.uefi package

    + title="next chapter">uefi package

    - +
    @@ -192,22 +161,22 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.secureboot package »
    • -
  • chipsec.modules.common.secureboot.variables module
    • +
  • modules package »
    • +
  • common package »
    • +
  • secureboot package »
    • +
  • variables module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.sgx_check.html b/modules/chipsec.modules.common.sgx_check.html index 67a3107c..992cbe02 100644 --- a/modules/chipsec.modules.common.sgx_check.html +++ b/modules/chipsec.modules.common.sgx_check.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.sgx_check module — CHIPSEC documentation - - + + + sgx_check module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.sgx_check module

    +
    +

    sgx_check module

    Check SGX related configuration

    Reference:
      @@ -93,48 +92,7 @@

      Navigation

    • Will not run within the EFI Shell

    -
    -
    -class sgx_check[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -class PRMRR(logger, cs)[source]
    -

    Bases: object

    -
    -
    -reset_variables() → None[source]
    -
    - -
    - -
    -
    -check_prmrr_values() → None[source]
    -
    - -
    -
    -check_sgx_config() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(_) → int[source]
    -
    - -
    - -
    +
    @@ -188,12 +146,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.rtclock module

    + title="previous chapter">rtclock module

    Next topic

    chipsec.modules.common.smm module

    + title="next chapter">smm module

    - +
    @@ -219,21 +177,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.sgx_check module
    • +
  • modules package »
    • +
  • common package »
    • +
  • sgx_check module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.smm.html b/modules/chipsec.modules.common.smm.html index 2cea3d63..d257201d 100644 --- a/modules/chipsec.modules.common.smm.html +++ b/modules/chipsec.modules.common.smm.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.smm module — CHIPSEC documentation - - + + + smm module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.smm module

    +
    +

    smm module

    Compatible SMM memory (SMRAM) Protection check module This CHIPSEC module simply reads SMRAMC and checks that D_LCK is set.

    Reference: @@ -64,32 +63,7 @@

    Navigation

    This module will only run on client (core) platforms that have PCI0.0.0_SMRAMC defined.

    -
    -
    -class smm[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_SMRAMC() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -143,12 +117,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.sgx_check module

    + title="previous chapter">sgx_check module

    Next topic

    chipsec.modules.common.smm_code_chk module

    + title="next chapter">smm_code_chk module

    - +
    @@ -174,21 +148,21 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.smm module
    • +
  • modules package »
    • +
  • common package »
    • +
  • smm module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.smm_code_chk.html b/modules/chipsec.modules.common.smm_code_chk.html index dcc50eb2..262e916c 100644 --- a/modules/chipsec.modules.common.smm_code_chk.html +++ b/modules/chipsec.modules.common.smm_code_chk.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.smm_code_chk module — CHIPSEC documentation - - + + + smm_code_chk module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.smm_code_chk module

    +
    +

    smm_code_chk module

    SMM_Code_Chk_En (SMM Call-Out) Protection check

    SMM_Code_Chk_En is a bit found in the MSR_SMM_FEATURE_CONTROL register. Once set to ‘1’, any CPU that attempts to execute SMM code not within the ranges defined by the SMRR will assert an unrecoverable MCE. @@ -84,32 +83,7 @@

    Navigation

  • MSR_SMM_FEATURE_CONTROL may not be defined or readable on all platforms.

    • -
    -
    -class smm_code_chk[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_SMM_Code_Chk_En() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -163,12 +137,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.smm module

    + title="previous chapter">smm module

    Next topic

    chipsec.modules.common.smm_dma module

    + title="next chapter">smm_dma module

    - +
    @@ -194,21 +168,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.smm_code_chk module
    • +
  • modules package »
    • +
  • common package »
    • +
  • smm_code_chk module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.smm_dma.html b/modules/chipsec.modules.common.smm_dma.html index 3540dd4e..5a0a1899 100644 --- a/modules/chipsec.modules.common.smm_dma.html +++ b/modules/chipsec.modules.common.smm_dma.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.smm_dma module — CHIPSEC documentation - - + + + smm_dma module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.smm_dma module

    +
    +

    smm_dma module

    SMM TSEG Range Configuration Checks

    This module examines the configuration and locking of SMRAM range configuration protecting from DMA attacks. If it fails, then DMA protection may not be securely configured to protect SMRAM.

    @@ -86,37 +85,7 @@

    Navigation

    -
    -
    -class smm_dma[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_tseg_config() → int[source]
    -
    - -
    -
    -check_tseg_locks() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -170,12 +139,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.smm_code_chk module

    + title="previous chapter">smm_code_chk module

    Next topic

    chipsec.modules.common.smrr module

    + title="next chapter">smrr module

    - +
    @@ -201,21 +170,21 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.smm_dma module
    • +
  • modules package »
    • +
  • common package »
    • +
  • smm_dma module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.smrr.html b/modules/chipsec.modules.common.smrr.html index 71e61fad..04bb013c 100644 --- a/modules/chipsec.modules.common.smrr.html +++ b/modules/chipsec.modules.common.smrr.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.smrr module — CHIPSEC documentation - - + + + smrr module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.smrr module

    +
    +

    smrr module

    CPU SMM Cache Poisoning / System Management Range Registers check

    This module checks to see that SMRRs are enabled and configured.

    @@ -79,32 +78,7 @@

    Navigation

    -
    -
    -class smrr[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_SMRR(do_modify: bool) → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -158,12 +132,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.smm_dma module

    + title="previous chapter">smm_dma module

    Next topic

    chipsec.modules.common.spd_wd module

    + title="next chapter">spd_wd module

    - +
    @@ -189,21 +163,21 @@

    Navigation

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  • CHIPSEC Modules »
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    • -
  • chipsec.modules.common.smrr module
    • +
  • modules package »
    • +
  • common package »
    • +
  • smrr module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.spd_wd.html b/modules/chipsec.modules.common.spd_wd.html index c36797f5..f2b0d1ca 100644 --- a/modules/chipsec.modules.common.spd_wd.html +++ b/modules/chipsec.modules.common.spd_wd.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.spd_wd module — CHIPSEC documentation - - + + + spd_wd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.spd_wd module

    +
    +

    spd_wd module

    This module checks that SPD Write Disable bit in SMBus controller has been set

    References:

    Intel 8 Series/C220 Series Chipset Family Platform Controller Hub datasheet @@ -88,32 +87,7 @@

    Navigation

    -
    -
    -class spd_wd[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_spd_wd() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -167,12 +141,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.smrr module

    + title="previous chapter">smrr module

    Next topic

    chipsec.modules.common.spi_access module

    + title="next chapter">spi_access module

    - +
    @@ -198,21 +172,21 @@

    Navigation

    modules |
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  • CHIPSEC Modules »
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    • -
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    • -
  • chipsec.modules.common.spd_wd module
    • +
  • modules package »
    • +
  • common package »
    • +
  • spd_wd module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.spi_access.html b/modules/chipsec.modules.common.spi_access.html index 521df3c9..f5f0748e 100644 --- a/modules/chipsec.modules.common.spi_access.html +++ b/modules/chipsec.modules.common.spi_access.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.spi_access module — CHIPSEC documentation - - + + + spi_access module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.spi_access module

    +
    +

    spi_access module

    SPI Flash Region Access Control

    Checks SPI Flash Region Access Permissions programmed in the Flash Descriptor

    @@ -72,32 +71,7 @@

    Navigation

    Consider this when assessing results.

    -
    -
    -class spi_access[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_flash_access_permissions() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -151,12 +125,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.spd_wd module

    + title="previous chapter">spd_wd module

    Next topic

    chipsec.modules.common.spi_desc module

    + title="next chapter">spi_desc module

    - +
    @@ -182,21 +156,21 @@

    Navigation

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  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.spi_access module
    • +
  • modules package »
    • +
  • common package »
    • +
  • spi_access module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.spi_desc.html b/modules/chipsec.modules.common.spi_desc.html index 08a81943..f8d9daab 100644 --- a/modules/chipsec.modules.common.spi_desc.html +++ b/modules/chipsec.modules.common.spi_desc.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.spi_desc module — CHIPSEC documentation - - + + + spi_desc module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.spi_desc module

    +
    +

    spi_desc module

    The SPI Flash Descriptor indicates read/write permissions for devices to access regions of the flash memory. This module simply reads the Flash Descriptor and checks that software cannot modify the Flash Descriptor itself. If software can write to the Flash Descriptor, then software could bypass any protection defined by it. @@ -68,32 +67,7 @@

    Navigation

    -
    -
    -class spi_desc[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_flash_access_permissions() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -147,12 +121,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.spi_access module

    + title="previous chapter">spi_access module

    Next topic

    chipsec.modules.common.spi_fdopss module

    + title="next chapter">spi_fdopss module

    - +
    @@ -178,21 +152,21 @@

    Navigation

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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.spi_desc module
    • +
  • modules package »
    • +
  • common package »
    • +
  • spi_desc module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.spi_fdopss.html b/modules/chipsec.modules.common.spi_fdopss.html index b8b7b105..4c9d4347 100644 --- a/modules/chipsec.modules.common.spi_fdopss.html +++ b/modules/chipsec.modules.common.spi_fdopss.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.spi_fdopss module — CHIPSEC documentation - - + + + spi_fdopss module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.spi_fdopss module

    +
    +

    spi_fdopss module

    Checks for SPI Controller Flash Descriptor Security Override Pin Strap (FDOPSS). On some systems, this may be routed to a jumper on the motherboard.

    @@ -64,32 +63,7 @@

    Navigation

    -
    -
    -class spi_fdopss[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_fd_security_override_strap() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -143,12 +117,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.spi_desc module

    + title="previous chapter">spi_desc module

    Next topic

    chipsec.modules.common.spi_lock module

    + title="next chapter">spi_lock module

    - +
    @@ -174,21 +148,21 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.spi_fdopss module
    • +
  • modules package »
    • +
  • common package »
    • +
  • spi_fdopss module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.spi_lock.html b/modules/chipsec.modules.common.spi_lock.html index 7c52e152..a0bd338a 100644 --- a/modules/chipsec.modules.common.spi_lock.html +++ b/modules/chipsec.modules.common.spi_lock.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.spi_lock module — CHIPSEC documentation - - + + + spi_lock module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,8 +47,8 @@

    Navigation

    -
    -

    chipsec.modules.common.spi_lock module

    +
    +

    spi_lock module

    The configuration of the SPI controller, including protected ranges (PR0-PR4), is locked by HSFS[FLOCKDN] until reset. If not locked, the controller configuration may be bypassed by reprogramming these registers.

    This vulnerability (not setting FLOCKDN) is also checked by other tools, including flashrom @@ -73,32 +72,7 @@

    Navigation

    -
    -
    -class spi_lock[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_spi_lock() → int[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -152,12 +126,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.spi_fdopss module

    + title="previous chapter">spi_fdopss module

    Next topic

    chipsec.modules.hsw package

    + title="next chapter">hsw package

    - +
    @@ -183,21 +157,21 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
  • chipsec.modules.common package »
    • -
  • chipsec.modules.common.spi_lock module
    • +
  • modules package »
    • +
  • common package »
    • +
  • spi_lock module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.uefi.access_uefispec.html b/modules/chipsec.modules.common.uefi.access_uefispec.html index 077ca907..7d8c0e89 100644 --- a/modules/chipsec.modules.common.uefi.access_uefispec.html +++ b/modules/chipsec.modules.common.uefi.access_uefispec.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.uefi.access_uefispec module — CHIPSEC documentation - - + + + access_uefispec module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -49,8 +48,8 @@

    Navigation

    -
    -

    chipsec.modules.common.uefi.access_uefispec module

    +
    +

    access_uefispec module

    Checks protection of UEFI variables defined in the UEFI spec to have certain permissions.

    Returns failure if variable attributes are not as defined in table 11 “Global Variables” of the UEFI spec.

    @@ -71,42 +70,7 @@

    Navigation

    NOTE: Requires an OS with UEFI Runtime API support.

    -
    -
    -class access_uefispec[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -can_modify(name: str, guid: str, data: bytes) → bool[source]
    -
    - -
    -
    -check_vars(do_modify: bool) → int[source]
    -
    - -
    -
    -diff_var(data1: int, data2: int) → bool[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -160,12 +124,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.uefi package

    + title="previous chapter">uefi package

    Next topic

    chipsec.modules.common.uefi.s3bootscript module

    + title="next chapter">s3bootscript module

    - +
    @@ -191,22 +155,22 @@

    Navigation

    modules |
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    • -
  • chipsec.modules.common.uefi package »
    • -
  • chipsec.modules.common.uefi.access_uefispec module
    • +
  • modules package »
    • +
  • common package »
    • +
  • uefi package »
    • +
  • access_uefispec module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.uefi.html b/modules/chipsec.modules.common.uefi.html index b67aa0df..2220e344 100644 --- a/modules/chipsec.modules.common.uefi.html +++ b/modules/chipsec.modules.common.uefi.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.uefi package — CHIPSEC documentation - - + + + uefi package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -48,21 +47,15 @@

    Navigation

    -
    -

    chipsec.modules.common.uefi package

    - -
    -

    Module contents

    -
    -
    +
    @@ -116,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.secureboot.variables module

    + title="previous chapter">variables module

    Next topic

    chipsec.modules.common.uefi.access_uefispec module

    + title="next chapter">access_uefispec module

    - +
    @@ -147,21 +140,21 @@

    Navigation

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  • CHIPSEC documentation »
  • CHIPSEC Modules »
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    • -
  • chipsec.modules.common.uefi package
    • +
  • modules package »
    • +
  • common package »
    • +
  • uefi package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.common.uefi.s3bootscript.html b/modules/chipsec.modules.common.uefi.s3bootscript.html index 8f6e385a..637cfd63 100644 --- a/modules/chipsec.modules.common.uefi.s3bootscript.html +++ b/modules/chipsec.modules.common.uefi.s3bootscript.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.common.uefi.s3bootscript module — CHIPSEC documentation - - + + + s3bootscript module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -49,8 +48,8 @@

    Navigation

    -
    -

    chipsec.modules.common.uefi.s3bootscript module

    +
    +

    s3bootscript module

    Checks protections of the S3 resume boot-script implemented by the UEFI based firmware

    References:

    VU#976132 UEFI implementations do not properly secure the EFI S3 Resume Boot Path boot script

    @@ -78,52 +77,7 @@

    Navigation

    Note

    Requires an OS with UEFI Runtime API support.

    -
    -
    -class s3bootscript[source]
    -

    Bases: chipsec.module_common.BaseModule

    -
    -
    -check_dispatch_opcodes(bootscript_entries: List[chipsec.hal.uefi_common.S3BOOTSCRIPT_ENTRY]) → bool[source]
    -
    - -
    -
    -check_s3_bootscript(bootscript_pa: int) → int[source]
    -
    - -
    -
    -check_s3_bootscripts(bsaddress=None) → int[source]
    -
    - -
    -
    -is_inside_SMRAM(pa: int) → bool[source]
    -
    - -
    -
    -is_inside_SPI(pa: int) → bool[source]
    -
    - -
    -
    -is_supported() → bool[source]
    -

    This method should be overwritten by the module returning True or False -depending whether or not this module is supported in the currently running -platform. -To access the currently running platform use

    -
    - -
    -
    -run(module_argv: List[str]) → int[source]
    -
    - -
    - -
    +
    @@ -177,12 +131,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.uefi.access_uefispec module

    + title="previous chapter">access_uefispec module

    Next topic

    chipsec.modules.common.bios_kbrd_buffer module

    + title="next chapter">bios_kbrd_buffer module

    - +
    @@ -208,22 +162,22 @@

    Navigation

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    • -
  • chipsec.modules.common.uefi package »
    • -
  • chipsec.modules.common.uefi.s3bootscript module
    • +
  • modules package »
    • +
  • common package »
    • +
  • uefi package »
    • +
  • s3bootscript module
    • \ No newline at end of file diff --git a/modules/chipsec.modules.hsw.html b/modules/chipsec.modules.hsw.html index 889fbbd6..7236edb3 100644 --- a/modules/chipsec.modules.hsw.html +++ b/modules/chipsec.modules.hsw.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.hsw package — CHIPSEC documentation - - + + + hsw package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,12 +46,9 @@

    Navigation

    -
    -

    chipsec.modules.hsw package

    -
    -

    Module contents

    -
    -
    +
    +

    hsw package

    +
    @@ -106,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.common.spi_lock module

    + title="previous chapter">spi_lock module

    Next topic

    chipsec.modules.ivb package

    + title="next chapter">ivb package

    - +
    @@ -137,20 +133,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package »
    • -
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    • +
  • modules package »
    • +
  • hsw package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.html b/modules/chipsec.modules.html index 1b666071..0a0b8479 100644 --- a/modules/chipsec.modules.html +++ b/modules/chipsec.modules.html @@ -1,23 +1,22 @@ - - + - - chipsec.modules package — CHIPSEC documentation - - + + + modules package — CHIPSEC documentation + + - - - - + + + - + - + @@ -46,98 +45,117 @@

    Navigation

    -
    -

    chipsec.modules package

    -
    -

    Subpackages

    +
    +

    modules package

    -
    -
    -

    Module contents

    -
    -
    +
    @@ -196,7 +214,7 @@

    Previous topic

    Next topic

    chipsec.modules.bdw package

    + title="next chapter">bdw package

    - +
    @@ -222,19 +240,19 @@

    Navigation

    modules |
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  • previous |
  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
  • chipsec.modules package
    • +
  • modules package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.ivb.html b/modules/chipsec.modules.ivb.html index 80a34439..fc61c0b4 100644 --- a/modules/chipsec.modules.ivb.html +++ b/modules/chipsec.modules.ivb.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.ivb package — CHIPSEC documentation - - + + + ivb package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,12 +46,9 @@

    Navigation

    -
    -

    chipsec.modules.ivb package

    -
    -

    Module contents

    -
    -
    +
    +

    ivb package

    +
    @@ -106,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.hsw package

    + title="previous chapter">hsw package

    Next topic

    chipsec.modules.snb package

    + title="next chapter">snb package

    - +
    @@ -137,20 +133,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • CHIPSEC Modules »
    • -
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    • +
  • modules package »
    • +
  • ivb package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.snb.html b/modules/chipsec.modules.snb.html index 0c506076..578e1f67 100644 --- a/modules/chipsec.modules.snb.html +++ b/modules/chipsec.modules.snb.html @@ -1,24 +1,23 @@ - - + - - chipsec.modules.snb package — CHIPSEC documentation - - + + + snb package — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,12 +46,9 @@

    Navigation

    -
    -

    chipsec.modules.snb package

    -
    -

    Module contents

    -
    -
    +
    +

    snb package

    +
    @@ -106,12 +102,12 @@

    Table of Contents

    Previous topic

    chipsec.modules.ivb package

    + title="previous chapter">ivb package

    Next topic

    -

    Python Version

    +

    tools package

    - +
    @@ -137,20 +133,20 @@

    Navigation

    modules |
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  • modules package »
    • +
  • snb package
    • \ No newline at end of file diff --git a/modules/chipsec.modules.tools.cpu.html b/modules/chipsec.modules.tools.cpu.html new file mode 100644 index 00000000..83b82b95 --- /dev/null +++ b/modules/chipsec.modules.tools.cpu.html @@ -0,0 +1,159 @@ + + + + + + + + cpu package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    cpu package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.cpu.sinkhole.html b/modules/chipsec.modules.tools.cpu.sinkhole.html new file mode 100644 index 00000000..c91f85c5 --- /dev/null +++ b/modules/chipsec.modules.tools.cpu.sinkhole.html @@ -0,0 +1,189 @@ + + + + + + + + sinkhole module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    sinkhole module

    +

    This module checks if CPU is affected by ‘The SMM memory sinkhole’ vulnerability

    +
    +
    References:
    +
    +
    Usage:

    chipsec_main -m tools.cpu.sinkhole

    +
    +
    Examples:
    >>> chipsec_main.py -m tools.cpu.sinkhole
+
    +
    +
    +
    Registers used:
      +

    • IA32_APIC_BASE.APICBase

      • +

    • IA32_SMRR_PHYSBASE.PhysBase

      • +

    • IA32_SMRR_PHYSMASK

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Supported OS: Windows or Linux

      • +
    +
    +
    +

    Warning

    +
      +

    • The system may hang when running this test.

      • +

    • In that case, the mitigation to this issue is likely working but we may not be handling the exception generated.

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.generate_test_id.html b/modules/chipsec.modules.tools.generate_test_id.html new file mode 100644 index 00000000..f352ff43 --- /dev/null +++ b/modules/chipsec.modules.tools.generate_test_id.html @@ -0,0 +1,166 @@ + + + + + + + + generate_test_id module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    generate_test_id module

    +

    Generate a test ID using hashlib from the test’s file name (no file extension). +Hash is truncated to 28 bits.

    +
    +
    Usage:

    chipsec_main -m common.tools.generate_test_id -a <test name>

    +
    +
    Examples:
    >>> chipsec_main.py -m common.tools.generate_test_id -a remap
+>>> chipsec_main.py -m common.tools.generate_test_id -a s3bootscript
+>>> chipsec_main.py -m common.tools.generate_test_id -a bios_ts
+
    +
    +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.html b/modules/chipsec.modules.tools.html new file mode 100644 index 00000000..e63e78ea --- /dev/null +++ b/modules/chipsec.modules.tools.html @@ -0,0 +1,216 @@ + + + + + + + + tools package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    tools package

    +
    + +
    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.secureboot.html b/modules/chipsec.modules.tools.secureboot.html new file mode 100644 index 00000000..2bdaf5e1 --- /dev/null +++ b/modules/chipsec.modules.tools.secureboot.html @@ -0,0 +1,159 @@ + + + + + + + + secureboot package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    secureboot package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.secureboot.te.html b/modules/chipsec.modules.tools.secureboot.te.html new file mode 100644 index 00000000..bec0f141 --- /dev/null +++ b/modules/chipsec.modules.tools.secureboot.te.html @@ -0,0 +1,190 @@ + + + + + + + + te module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    te module

    +

    Tool to test for ‘TE Header’ vulnerability in Secure Boot implementations as described in +All Your Boot Are Belong To Us

    +
    +
    Usage:
    +
    chipsec_main.py -m tools.secureboot.te [-a <mode>,<cfg_file>,<efi_file>]
      +

    • <mode>

      +
      +
        +

      • generate_te (default) convert PE EFI binary <efi_file> to TE binary

        • +

      • replace_bootloader replace bootloader files listed in <cfg_file> on ESP with modified <efi_file>

        • +

      • restore_bootloader restore original bootloader files from .bak files

        • +
      +
      +
      • +

    • <cfg_file> path to config file listing paths to bootloader files to replace

      • +

    • <efi_file> path to EFI binary to convert to TE binary. If no file path is provided, the tool will look for Shell.efi

      • +
    +
    +
    +
    +
    +

    Examples:

    +

    Convert Shell.efi PE/COFF EFI executable to TE executable:

    +
    +

    chipsec_main.py -m tools.secureboot.te -a generate_te,Shell.efi

    +
    +

    Replace bootloaders listed in te.cfg file with TE version of Shell.efi executable:

    +
    +

    chipsec_main.py -m tools.secureboot.te -a replace_bootloader,te.cfg,Shell.efi

    +
    +

    Restore bootloaders listed in te.cfg file:

    +
    +

    chipsec_main.py -m tools.secureboot.te -a restore_bootloader,te.cfg

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.smm.html b/modules/chipsec.modules.tools.smm.html new file mode 100644 index 00000000..24c3ee23 --- /dev/null +++ b/modules/chipsec.modules.tools.smm.html @@ -0,0 +1,160 @@ + + + + + + + + smm package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    smm package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.smm.rogue_mmio_bar.html b/modules/chipsec.modules.tools.smm.rogue_mmio_bar.html new file mode 100644 index 00000000..e496f5a6 --- /dev/null +++ b/modules/chipsec.modules.tools.smm.rogue_mmio_bar.html @@ -0,0 +1,180 @@ + + + + + + + + rogue_mmio_bar module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    rogue_mmio_bar module

    +

    Experimental module that may help checking SMM firmware for MMIO BAR hijacking +vulnerabilities described in the following presentation:

    +

    BARing the System: New vulnerabilities in Coreboot & UEFI based systems by Intel Advanced Threat Research team at RECon Brussels 2017

    +
    +
    Usage:

    chipsec_main -m tools.smm.rogue_mmio_bar [-a <smi_start:smi_end>,<b:d.f>]

    +
      +

    • smi_start:smi_end: range of SMI codes (written to IO port 0xB2)

      • +

    • b:d.f: PCIe bus/device/function in b:d.f format (in hex)

      • +
    +
    +
    Example:
    >>> chipsec_main.py -m tools.smm.rogue_mmio_bar -a 0x00:0x80
+>>> chipsec_main.py -m tools.smm.rogue_mmio_bar -a 0x00:0xFF,0:1C.0
+
    +
    +
    +
    +
    +

    Note

    +

    Look for ‘changes found’ messages for items that should be further investigated.

    +
    +
    +

    Warning

    +

    When running this test, system may freeze, reboot, etc. This is not unexpected behavior and not generally considered a failure.

    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.smm.smm_ptr.html b/modules/chipsec.modules.tools.smm.smm_ptr.html new file mode 100644 index 00000000..bcfd2035 --- /dev/null +++ b/modules/chipsec.modules.tools.smm.smm_ptr.html @@ -0,0 +1,227 @@ + + + + + + + + smm_ptr module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    smm_ptr module

    +

    A tool to test SMI handlers for pointer validation vulnerabilities

    +
    +
    Reference:
    +
    +
    +

    Usage: +chipsec_main -m tools.smm.smm_ptr -l log.txt \ +[-a <mode>,<config_file>|<smic_start:smic_end>,<size>,<address>]

    +
      +

    • mode: SMI fuzzing mode

      +
      +
        +

      • config = use SMI configuration file <config_file>

        • +

      • fuzz = fuzz all SMI handlers with code in the range <smic_start:smic_end>

        • +

      • fuzzmore = fuzz mode + pass 2nd-order pointers within buffer to SMI handlers

        • +
      +
      +
      • +

    • size: size of the memory buffer (in Hex)

      • +

    • address: physical address of memory buffer to pass in GP regs to SMI handlers (in Hex)

      +
      +
        +

      • smram = option passes address of SMRAM base (system may hang in this mode!)

        • +
      +
      +
      • +
    +

    In config mode, SMI configuration file should have the following format

    +
    SMI_code=<SMI code> or *
+SMI_data=<SMI data> or *
+RAX=<value of RAX> or * or PTR or VAL
+RBX=<value of RBX> or * or PTR or VAL
+RCX=<value of RCX> or * or PTR or VAL
+RDX=<value of RDX> or * or PTR or VAL
+RSI=<value of RSI> or * or PTR or VAL
+RDI=<value of RDI> or * or PTR or VAL
+[PTR_OFFSET=<offset to pointer in the buffer>]
+[SIG=<signature>]
+[SIG_OFFSET=<offset to signature in the buffer>]
+[Name=<SMI name>]
+[Desc=<SMI description>]
+
    +
    +

    Where:

    +
    +
      +

    • []: optional line

      • +

    • *: Don’t Care (the module will replace * with 0x0)

      • +

    • PTR: Physical address SMI handler will write to (the module will replace PTR with physical address provided as a command-line argument)

      • +

    • VAL: Value SMI handler will write to PTR address (the module will replace VAL with hardcoded _FILL_VALUE_xx)

      • +
    +
    +

    Examples:

    +
    >>> chipsec_main.py -m tools.smm.smm_ptr
+>>> chipsec_main.py -m tools.smm.smm_ptr -a fuzzmore,0x0:0xFF -l smm.log
+
    +
    +
    +

    Warning

    +
      +

    • This is a potentially destructive test

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.uefi.html b/modules/chipsec.modules.tools.uefi.html new file mode 100644 index 00000000..93f2d6c4 --- /dev/null +++ b/modules/chipsec.modules.tools.uefi.html @@ -0,0 +1,163 @@ + + + + + + + + uefi package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    uefi package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.uefi.reputation.html b/modules/chipsec.modules.tools.uefi.reputation.html new file mode 100644 index 00000000..0f6d2a41 --- /dev/null +++ b/modules/chipsec.modules.tools.uefi.reputation.html @@ -0,0 +1,181 @@ + + + + + + + + reputation module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    reputation module

    +

    This module checks current contents of UEFI firmware ROM or specified firmware image for bad EFI binaries as per the +VirusTotal API. These can be EFI firmware volumes, EFI executable binaries (PEI modules, DXE drivers..) or EFI sections. +The module can find EFI binaries by their UI names, EFI GUIDs, MD5/SHA-1/SHA-256 hashes +or contents matching specified regular expressions.

    +

    Important! This module can only detect bad or vulnerable EFI modules based on the file’s reputation on VT.

    +
    +
    Usage:
    +
    chipsec_main.py -i -m tools.uefi.reputation -a <vt_api_key>[,<vt_threshold>,<fw_image>]
    +
    vt_api_keyAPI key to VirusTotal. Can be obtained by visting https://www.virustotal.com/gui/join-us.

    This argument must be specified.

    +
    +
    vt_thresholdThe minimal number of different AV vendors on VT which must claim an EFI module is malicious

    before failing the test. Defaults to 10.

    +
    +
    fw_imageFull file path to UEFI firmware image

    If not specified, the module will dump firmware image directly from ROM

    +
    +
    +
    +
    +
    +
    +
    +

    Note

    +
      +

    • Requires virustotal-api

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.uefi.s3script_modify.html b/modules/chipsec.modules.tools.uefi.s3script_modify.html new file mode 100644 index 00000000..3b21b483 --- /dev/null +++ b/modules/chipsec.modules.tools.uefi.s3script_modify.html @@ -0,0 +1,210 @@ + + + + + + + + s3script_modify module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    s3script_modify module

    +

    This module will attempt to modify the S3 Boot Script on the platform. Doing this could cause the platform to malfunction. Use with care!

    +
    +
    Usage:

    Replacing existing opcode:

    +
    chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,<reg_opcode>,<address>,<value>
+    <reg_opcode> = pci_wr|mmio_wr|io_wr|pci_rw|mmio_rw|io_rw
+
+chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,mem[,<address>,<value>]
+
+chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,dispatch``
+
+chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,dispatch_ep``
+
    +
    +

    Adding new opcode:

    +
    chipsec_main.py -m tools.uefi.s3script_modify -a add_op,<reg_opcode>,<address>,<value>,<width>
+    <reg_opcode> = pci_wr|mmio_wr|io_wr
+
+chipsec_main.py -m tools.uefi.s3script_modify -a add_op,dispatch[,<entrypoint>]
+
    +
    +
    +
    +

    Examples:

    +
    >>> chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,<reg_opcode>,<address>,<value>
+>>>   <reg_opcode> = pci_wr|mmio_wr|io_wr|pci_rw|mmio_rw|io_rw
+
    +
    +

    The option will look for a script opcode that writes to PCI config, MMIO or I/O registers and modify the opcode to write the given value to the register with the given address.

    +

    After executing this, if the system is vulnerable to boot script modification, the hardware configuration will have changed according to given <reg_opcode>.

    +
    >>> chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,mem
+
    +
    +

    The option will look for a script opcode that writes to memory and modify the opcode to write the given value to the given address.

    +

    By default this test will allocate memory and write write 0xB007B007 that location.

    +

    After executing this, if the system is vulnerable to boot script modification, you should find the given value in the allocated memory location.

    +
    >>> chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,dispatch
+
    +
    +

    The option will look for a dispatch opcode in the script and modify the opcode to point to a different entry point. The new entry point will contain a HLT instruction.

    +

    After executing this, if the system is vulnerable to boot script modification, the system should hang on resume from S3.

    +
    >>> chipsec_main.py -m tools.uefi.s3script_modify -a replace_op,dispatch_ep
+
    +
    +

    The option will look for a dispatch opcode in the script and will modify memory at the entry point for that opcode. The modified instructions will contain a HLT instruction.

    +

    After executing this, if the system is vulnerable to dispatch opcode entry point modification, the system should hang on resume from S3.

    +
    >>> chipsec_main.py -m tools.uefi.s3script_modify -a add_op,<reg_opcode>,<address>,<value>,<width>
+>>>   <reg_opcode> = pci_wr|mmio_wr|io_wr
+
    +
    +

    The option will add a new opcode which writes to PCI config, MMIO or I/O registers with specified values.

    +
    >>> chipsec_main.py -m tools.uefi.s3script_modify -a add_op,dispatch
+
    +
    +

    The option will add a new DISPATCH opcode to the script with entry point to either existing or newly allocated memory.

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.uefi.scan_blocked.html b/modules/chipsec.modules.tools.uefi.scan_blocked.html new file mode 100644 index 00000000..09feceed --- /dev/null +++ b/modules/chipsec.modules.tools.uefi.scan_blocked.html @@ -0,0 +1,188 @@ + + + + + + + + scan_blocked module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    scan_blocked module

    +

    This module checks current contents of UEFI firmware ROM or specified firmware image for blocked EFI binaries +which can be EFI firmware volumes, EFI executable binaries (PEI modules, DXE drivers..) or EFI sections. +The module can find EFI binaries by their UI names, EFI GUIDs, MD5/SHA-1/SHA-256 hashes +or contents matching specified regular expressions.

    +

    Important! This module can only detect what it knows about from its config file. +If a bad or vulnerable binary is not detected then its ‘signature’ needs to be added to the config.

    +
    +
    Usage:
    +
    chipsec_main.py -i -m tools.uefi.scan_blocked [-a <fw_image>,<blockedlist>]
      +

    • fw_image Full file path to UEFI firmware image. If not specified, the module will dump firmware image directly from ROM

      • +

    • blockedlist JSON file with configuration of blocked EFI binaries (default = blockedlist.json). Config file should be located in the same directory as this module

      • +
    +
    +
    +
    +
    +

    Examples:

    +
    >>> chipsec_main.py -m tools.uefi.scan_blocked
+
    +
    +

    Dumps UEFI firmware image from flash memory device, decodes it and checks for blocked EFI modules defined in the default config blockedlist.json

    +
    >>> chipsec_main.py -i --no_driver -m tools.uefi.scan_blocked -a uefi.rom,blockedlist.json
+
    +
    +

    Decodes uefi.rom binary with UEFI firmware image and checks for blocked EFI modules defined in blockedlist.json config

    +
    +

    Note

    +
      +

    • -i and --no_driver arguments can be used in this case because the test does not depend on the platform +and no kernel driver is required when firmware image is specified

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.uefi.scan_image.html b/modules/chipsec.modules.tools.uefi.scan_image.html new file mode 100644 index 00000000..eb4e8c04 --- /dev/null +++ b/modules/chipsec.modules.tools.uefi.scan_image.html @@ -0,0 +1,210 @@ + + + + + + + + scan_image module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    scan_image module

    +

    The module can generate a list of EFI executables from (U)EFI firmware file or +extracted from flash ROM, and then later check firmware image in flash ROM or +file against this list of expected executables

    +
    +
    Usage:
    +
    chipsec_main -m tools.uefi.scan_image [-a generate|check,<json>,<fw_image>]
      +
    • +
      generate Generates a list of EFI executable binaries from the UEFI

      firmware image (default)

      +
      +
      +
      • +
    • +
      check Decodes UEFI firmware image and checks all EFI executable

      binaries against a specified list

      +
      +
      +
      • +
    • +
      json JSON file with configuration of allowed list EFI

      executables (default = efilist.json)

      +
      +
      +
      • +
    • +
      fw_image Full file path to UEFI firmware image. If not specified,

      the module will dump firmware image directly from ROM

      +
      +
      +
      • +
    +
    +
    +
    +
    +

    Examples:

    +
    >>> chipsec_main -m tools.uefi.scan_image
+
    +
    +

    Creates a list of EFI executable binaries in efilist.json from the firmware +image extracted from ROM

    +
    >>> chipsec_main -i -n -m tools.uefi.scan_image -a generate,efilist.json,uefi.rom
+
    +
    +

    Creates a list of EFI executable binaries in efilist.json from uefi.rom +firmware binary

    +
    >>> chipsec_main -i -n -m tools.uefi.scan_image -a check,efilist.json,uefi.rom
+
    +
    +

    Decodes uefi.rom UEFI firmware image binary and checks all EFI executables +in it against a list defined in efilist.json

    +
    +

    Note

    +
      +

    • -i and -n arguments can be used when specifying firmware file +because the module doesn’t depend on the platform and doesn’t need kernel driver

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.uefi.uefivar_fuzz.html b/modules/chipsec.modules.tools.uefi.uefivar_fuzz.html new file mode 100644 index 00000000..8101406c --- /dev/null +++ b/modules/chipsec.modules.tools.uefi.uefivar_fuzz.html @@ -0,0 +1,206 @@ + + + + + + + + uefivar_fuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    uefivar_fuzz module

    +

    The module is fuzzing UEFI Variable interface.

    +

    The module is using UEFI SetVariable interface to write new UEFI variables +to SPI flash NVRAM with randomized name/attributes/GUID/data/size.

    +
    +
    Usage:

    chipsec_main -m tools.uefi.uefivar_fuzz [-a <options>]

    +
    +
    +

    Options:

    +
    +

    [-a <test>,<iterations>,<seed>,<test_case>]

    +
    +
      +

    • test : UEFI variable interface to fuzz (all, name, guid, attrib, data, size)

      • +

    • iterations : Number of tests to perform (default = 1000)

      • +

    • seed : RNG seed to use

      • +

    • test_case : Test case # to skip to (combined with seed, can be used to skip to failing test)

      • +
    +
    +

    All module arguments are optional

    +
    +
    +
    Examples::
    >>> chipsec_main.py -m tools.uefi.uefivar_fuzz
+>>> chipsec_main.py -m tools.uefi.uefivar_fuzz -a all,100000
+>>> chipsec_main.py -m tools.uefi.uefivar_fuzz -a data,1000,123456789
+>>> chipsec_main.py -m tools.uefi.uefivar_fuzz -a name,1,123456789,94
+
    +
    +
    +
    +
    +

    Note

    +
      +

    • This module returns a WARNING by default to indicate that a manual review is needed.

      • +

    • Writes may generate ‘ERROR’s, this can be expected behavior if the environment rejects them.

      • +
    +
    +
    +

    Warning

    +
      +

    • This module modifies contents of non-volatile SPI flash memory (UEFI Variable NVRAM).

      • +

    • This may render system UNBOOTABLE if firmware doesn’t properly handle variable update/delete operations.

      • +
    +
    +
    +

    Important

    +
      +

    • Evaluate the platform for expected behavior to determine PASS/FAIL.

      • +

    • Behavior can include platform stability and retaining protections.

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.common.html b/modules/chipsec.modules.tools.vmm.common.html new file mode 100644 index 00000000..82a3a690 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.common.html @@ -0,0 +1,157 @@ + + + + + + + + common module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    common module

    +

    Common functionality for VMM related modules/tools

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.cpuid_fuzz.html b/modules/chipsec.modules.tools.vmm.cpuid_fuzz.html new file mode 100644 index 00000000..cea47bac --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.cpuid_fuzz.html @@ -0,0 +1,199 @@ + + + + + + + + cpuid_fuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    cpuid_fuzz module

    +

    Simple CPUID VMM emulation fuzzer

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.cpuid_fuzz [-a random]

    +
      +

    • random : Fuzz in random order (default is sequential)

      • +
    +
    +
    Where:
      +

    • []: optional line

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.cpuid_fuzz
+>>> chipsec_main.py -i -m tools.vmm.cpuid_fuzz -l log.txt
+>>> chipsec_main.py -i -m tools.vmm.cpuid_fuzz -a random
+
    +
    +
    +
    Additional options set within the module:
      +

    • _NO_EAX_TO_FUZZ : No of EAX values to fuzz within each step

      • +

    • _EAX_FUZZ_STEP : Step to fuzz range of EAX values

      • +

    • _NO_ITERATIONS_TO_FUZZ : Number of iterations if random chosen

      • +

    • _FUZZ_ECX_RANDOM : Fuzz ECX with random values?

      • +

    • _MAX_ECX : Max ECX value

      • +

    • _EXCLUDE_CPUID : Exclude the following EAX values from fuzzing

      • +

    • _FLUSH_LOG_EACH_ITER : Flush log file after each iteration

      • +

    • _LOG_OUT_RESULTS : Log output results

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.ept_finder.html b/modules/chipsec.modules.tools.vmm.ept_finder.html new file mode 100644 index 00000000..3a1da4c4 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.ept_finder.html @@ -0,0 +1,186 @@ + + + + + + + + ept_finder module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    ept_finder module

    +

    Extended Page Table (EPT) Finder

    +
    +
    Usage:

    chipsec_main -m tools.vmm.ept_finder [-a dump,<file_name>|file,<file_name>,<revision_id>]

    +
    +
      +

    • dump : Dump contents

      • +

    • file : Load contents from file

      • +

    • <file_name> : File name to read from or dump to

      • +

    • <revision_id> : Revision ID (hex)

      • +
    +
    +
    +
    Where:
      +

    • []: optional line

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.ept_finder
+>>> chipsec_main.py -i -m tools.vmm.ept_finder -a dump,my_file.bin
+>>> chipsec_main.py -i -m tools.vmm.ept_finder -a file,my_file.bin,0x0
+
    +
    +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.html b/modules/chipsec.modules.tools.vmm.html new file mode 100644 index 00000000..4f539e2d --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.html @@ -0,0 +1,192 @@ + + + + + + + + vmm package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    vmm package

    +
    + +
    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.define.html b/modules/chipsec.modules.tools.vmm.hv.define.html new file mode 100644 index 00000000..19fa1797 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.define.html @@ -0,0 +1,159 @@ + + + + + + + + define module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    define module

    +

    Hyper-V specific defines

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.html b/modules/chipsec.modules.tools.vmm.hv.html new file mode 100644 index 00000000..65c605f9 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.html @@ -0,0 +1,167 @@ + + + + + + + + hv package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hv package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.hypercall.html b/modules/chipsec.modules.tools.vmm.hv.hypercall.html new file mode 100644 index 00000000..f5b57035 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.hypercall.html @@ -0,0 +1,159 @@ + + + + + + + + hypercall module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hypercall module

    +

    Hyper-V specific hypercall functionality

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.html b/modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.html new file mode 100644 index 00000000..ad95a713 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.html @@ -0,0 +1,180 @@ + + + + + + + + hypercallfuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hypercallfuzz module

    +

    Hyper-V hypercall fuzzer

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.hv.hypercall -a <mode>[,<vector>,<iterations>] -l log.txt

    +
    +
      +

    • mode fuzzing mode

      +
      +
        +

      • = status-fuzzing finding parameters with hypercall success status

        • +

      • = params-info shows input parameters valid ranges

        • +

      • = params-fuzzing parameters fuzzing based on their valid ranges

        • +

      • = custom-fuzzing fuzzing of known hypercalls

        • +
      +
      +
      • +

    • vector hypercall vector

      • +

    • iterations number of hypercall iterations

      • +
    +
    +
    +
    +

    Note: the fuzzer is incompatible with native VMBus driver (vmbus.sys). To use it, remove vmbus.sys

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.synth_dev.html b/modules/chipsec.modules.tools.vmm.hv.synth_dev.html new file mode 100644 index 00000000..cf9ccad1 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.synth_dev.html @@ -0,0 +1,167 @@ + + + + + + + + synth_dev module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    synth_dev module

    +

    Hyper-V VMBus synthetic device generic fuzzer

    +

    Usage:

    +
    +

    Print channel offers:

    +

    chipsec_main.py -i -m tools.vmm.hv.synth_dev -a info

    +

    Fuzzing device with specified relid:

    +

    chipsec_main.py -i -m tools.vmm.hv.synth_dev -a fuzz,<relid> -l log.txt

    +
    +

    Note: the fuzzer is incompatible with native VMBus driver (vmbus.sys). To use it, remove vmbus.sys

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.synth_kbd.html b/modules/chipsec.modules.tools.vmm.hv.synth_kbd.html new file mode 100644 index 00000000..51688e81 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.synth_kbd.html @@ -0,0 +1,164 @@ + + + + + + + + synth_kbd module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    synth_kbd module

    +

    Hyper-V VMBus synthetic keyboard fuzzer. Fuzzes inbound ring buffer in VMBus virtual keyboard device.

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.hv.synth_kbd -a fuzz -l log.txt

    +
    +
    +

    Note: the fuzzer is incompatible with native VMBus driver (vmbus.sys). To use it, remove vmbus.sys

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.vmbus.html b/modules/chipsec.modules.tools.vmm.hv.vmbus.html new file mode 100644 index 00000000..dfadefaf --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.vmbus.html @@ -0,0 +1,159 @@ + + + + + + + + vmbus module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    vmbus module

    +

    Hyper-V VMBus functionality

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.html b/modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.html new file mode 100644 index 00000000..fc39c111 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.html @@ -0,0 +1,189 @@ + + + + + + + + vmbusfuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    vmbusfuzz module

    +

    Hyper-V VMBus generic fuzzer

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.hv.vmbusfuzz -a fuzz,<parameters>

    +

    Parameters:

    +
      +

    • all : Fuzzing all bytes

      • +

    • hv : Fuzzing HyperV message header

      • +

    • vmbus : Fuzzing HyperV message body / VMBUS message

      • +

    • <pos>,<size> : Fuzzing number of bytes at specific position

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.hv.vmbusfuzz -a fuzz,all -l log.txt
+
    +
    +
    +
    +
    +

    Note

    +
      +

    • The fuzzer is incompatible with native VMBus driver (vmbus.sys). To use it, remove vmbus.sys

      • +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.hypercallfuzz.html b/modules/chipsec.modules.tools.vmm.hypercallfuzz.html new file mode 100644 index 00000000..3eaf42b7 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.hypercallfuzz.html @@ -0,0 +1,206 @@ + + + + + + + + hypercallfuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hypercallfuzz module

    +

    Pretty simple VMM hypercall fuzzer

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.hypercallfuzz [-a <mode>,<vector_reg>,<maxval>,<iterations>]

    +
      +
    • +
      modeHypercall fuzzing mode
        +

      • exhaustive : Fuzz all arguments exhaustively in range [0:<maxval>] (default)

        • +

      • random : Send random values in all registers in range [0:<maxval>]

        • +
      +
      +
      +
      • +

    • vector_reg : Hypercall vector register

      • +

    • maxval : Maximum value of each register

      • +

    • iterations : Number of iterations in random mode

      • +
    +
    +
    Where:
      +

    • []: optional line

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.hypercallfuzz
+>>> chipsec_main.py -i -m tools.vmm.hypercallfuzz -a random,22,0xFFFF,1000
+
    +
    +
    +
    Additional options set within the module:
      +

    • DEFAULT_VECTOR_MAXVAL : Default maximum value

      • +

    • DEFAULT_MAXVAL_EXHAUSTIVE : Default maximum value for exhaustive testing

      • +

    • DEFAULT_MAXVAL_RANDOM : Default maximum value for random testing

      • +

    • DEFAULT_RANDOM_ITERATIONS : Default iterations for random testing

      • +

    • _FLUSH_LOG_EACH_ITER : Set to flush log after each iteration

      • +

    • _LOG_ALL_GPRS : Display log of each iteration values

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.iofuzz.html b/modules/chipsec.modules.tools.vmm.iofuzz.html new file mode 100644 index 00000000..f0844927 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.iofuzz.html @@ -0,0 +1,206 @@ + + + + + + + + iofuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    iofuzz module

    +

    Simple port I/O VMM emulation fuzzer

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.iofuzz [-a <mode>,<count>,<iterations>]

    +
      +
    • +
      <mode>SMI handlers testing mode
        +

      • exhaustive : Fuzz all I/O ports exhaustively (default)

        • +

      • random : Fuzz randomly chosen I/O ports

        • +
      +
      +
      +
      • +

    • <count> : Number of times to write to each port (default = 1000)

      • +

    • <iterations> : Number of I/O ports to fuzz (default = 1000000 in random mode)

      • +
    +
    +
    Where:
      +

    • []: optional line

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.iofuzz
+>>> chipsec_main.py -i -m tools.vmm.iofuzz -a random,9000,4000000
+
    +
    +
    +
    Additional options set within the module:
      +

    • MAX_PORTS : Maximum ports

      • +

    • MAX_PORT_VALUE : Maximum port value to use

      • +

    • DEFAULT_PORT_WRITE_COUNT : Default port write count if not specified with switches

      • +

    • DEFAULT_RANDOM_ITERATIONS : Default port write iterations if not specified with switches

      • +

    • _FLUSH_LOG_EACH_ITER : Flush log after each iteration

      • +

    • _FUZZ_SPECIAL_VALUES : Specify to use 1-2-4 byte values

      • +

    • _EXCLUDE_PORTS : Ports to exclude (list)

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.msr_fuzz.html b/modules/chipsec.modules.tools.vmm.msr_fuzz.html new file mode 100644 index 00000000..6791b39b --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.msr_fuzz.html @@ -0,0 +1,197 @@ + + + + + + + + msr_fuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    msr_fuzz module

    +

    Simple CPU Module Specific Register (MSR) VMM emulation fuzzer

    +
    +
    Usage:

    chipsec_main -m tools.vmm.msr_fuzz [-a random]

    +
      +

    • -a : random = use random values (default = sequential numbering)

      • +
    +
    +
    Where:
      +

    • []: optional line

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.msr_fuzz
+>>> chipsec_main.py -i -m tools.vmm.msr_fuzz -a random
+
    +
    +
    +
    Additional options set within the module:
      +

    • _NO_ITERATIONS_TO_FUZZ : Number of iterations to fuzz randomly

      • +

    • _READ_MSR : Specify to read MSR when fuzzing it

      • +

    • _FLUSH_LOG_EACH_MSR : Flush log file before each MSR

      • +

    • _FUZZ_VALUE_0_all1s : Try all 0 & all 1 values to be written to each MSR

      • +

    • _FUZZ_VALUE_5A : Try 0x5A values to be written to each MSR

      • +

    • _FUZZ_VALUE_RND : Try random values to be written to each MSR

      • +

    • _EXCLUDE_MSR : MSR values to exclude (list)

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.pcie_fuzz.html b/modules/chipsec.modules.tools.vmm.pcie_fuzz.html new file mode 100644 index 00000000..e74cd29b --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.pcie_fuzz.html @@ -0,0 +1,199 @@ + + + + + + + + pcie_fuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pcie_fuzz module

    +

    Simple PCIe device Memory-Mapped I/O (MMIO) and I/O ranges VMM emulation fuzzer

    +
    +
    Usage:

    chipsec_main -m tools.vmm.pcie_fuzz [-a <bus> <dev> <fun>]

    +
      +

    • <bus> : Bus # to fuzz (in hex)

      • +

    • <dev> : Device # to fuzz (in hex)

      • +

    • <fun> : Function # to fuzz (in hex)

      • +
    +
    +
    Where:
      +

    • []: optional line

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.pcie_fuzz
+>>> chipsec_main.py -i -m tools.vmm.pcie_fuzz -l log.txt
+>>> chipsec_main.py -i -m tools.vmm.pcie_fuzz -a 0 1f 0
+
    +
    +
    +
    Additional options set within the module:
      +

    • IO_FUZZ : Set to fuzz IO BARs

      • +

    • CALC_BAR_SIZE : Set to calculate BAR sizes

      • +

    • TIMEOUT : Timeout between memory writes (seconds)

      • +

    • ACTIVE_RANGE : Set to fuzz MMIO BAR in Active range

      • +

    • BIT_FLIP : Set to fuzz using bit flips

      • +

    • _EXCLUDE_BAR : BARs to exclude (list)

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.html b/modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.html new file mode 100644 index 00000000..ddcb0fe1 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.html @@ -0,0 +1,189 @@ + + + + + + + + pcie_overlap_fuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    pcie_overlap_fuzz module

    +

    PCIe device Memory-Mapped I/O (MMIO) ranges VMM emulation fuzzer +which first overlaps MMIO BARs of all available PCIe devices +then fuzzes them by writing garbage if corresponding option is enabled

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.pcie_overlap_fuzz

    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.pcie_overlap_fuzz -l log.txt
+
    +
    +
    +
    Additional options set within the module:
      +

    • OVERLAP_MODE : Set overlap direction

      • +

    • FUZZ_OVERLAP : Set for fuzz overlaps

      • +

    • FUZZ_RANDOM : Set to fuzz in random mode

      • +

    • _EXCLUDE_MMIO_BAR1 : List 1 of MMIO bars to exclude

      • +

    • _EXCLUDE_MMIO_BAR2 : List 2 of MMIO bars to exclude

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.vbox.html b/modules/chipsec.modules.tools.vmm.vbox.html new file mode 100644 index 00000000..0947d5b3 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.vbox.html @@ -0,0 +1,161 @@ + + + + + + + + vbox package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    vbox package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.html b/modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.html new file mode 100644 index 00000000..629d2919 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.html @@ -0,0 +1,182 @@ + + + + + + + + vbox_crash_apicbase module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    vbox_crash_apicbase module

    +

    Oracle VirtualBox CVE-2015-0377 check

    +
    +
    Reference:
    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.vbox_crash_apicbase

    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.vbox_crash_apicbase
+
    +
    +
    +
    Registers used:
      +

    • IA32_APIC_BASE

      • +
    +
    +
    +
    +

    Warning

    +
      +

    • Module can cause VMM/Host OS to crash; if so, this is a FAILURE

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.venom.html b/modules/chipsec.modules.tools.vmm.venom.html new file mode 100644 index 00000000..e3772bb9 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.venom.html @@ -0,0 +1,191 @@ + + + + + + + + venom module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    venom module

    +

    QEMU VENOM vulnerability DoS PoC test

    +
    +
    Reference:
    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.venom

    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.venom
+
    +
    +
    +
    Additional options set within the module:
      +

    • ITER_COUNT : Iteration count

      • +

    • FDC_PORT_DATA_FIFO : FDC DATA FIFO port

      • +

    • FDC_CMD_WRVAL : FDC Command write value

      • +

    • FD_CMD : FD Command

      • +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.xen.define.html b/modules/chipsec.modules.tools.vmm.xen.define.html new file mode 100644 index 00000000..897cf1ec --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.xen.define.html @@ -0,0 +1,159 @@ + + + + + + + + define module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    define module

    +

    Xen specific defines

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.xen.html b/modules/chipsec.modules.tools.vmm.xen.html new file mode 100644 index 00000000..1dd8677f --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.xen.html @@ -0,0 +1,164 @@ + + + + + + + + xen package — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    xen package

    +
    + +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.xen.hypercall.html b/modules/chipsec.modules.tools.vmm.xen.hypercall.html new file mode 100644 index 00000000..3a781b7b --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.xen.hypercall.html @@ -0,0 +1,159 @@ + + + + + + + + hypercall module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hypercall module

    +

    Xen specific hypercall functionality

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.html b/modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.html new file mode 100644 index 00000000..f9795f10 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.html @@ -0,0 +1,198 @@ + + + + + + + + hypercallfuzz module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    hypercallfuzz module

    +

    Xen hypercall fuzzer

    +
    +
    Usage:

    chipsec_main.py -i -m tools.vmm.xen.hypercallfuzz -a <mode>[,<vector>,<iterations>]

    +
      +

    • mode : fuzzing mode

      +
      +
        +

      • help : Prints this help

        • +

      • info : Hypervisor information

        • +

      • fuzzing : Fuzzing specified hypercall

        • +

      • fuzzing-all : Fuzzing all hypercalls

        • +

      • fuzzing-all-randomly : Fuzzing random hypercalls

        • +
      +
      +
      • +

    • <vector> : Code or name of a hypercall to be fuzzed (use info)

      • +

    • <iterations> : Number of fuzzing iterations

      • +
    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.xen.hypercallfuzz -a fuzzing,10 -l log.txt
+>>> chipsec_main.py -i -m tools.vmm.xen.hypercallfuzz -a fuzzing-all,50 -l log.txt
+>>> chipsec_main.py -i -m tools.vmm.xen.hypercallfuzz -a fuzzing-all-randomly,10,0x10000000 -l log.txt
+
    +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.vmm.xen.xsa188.html b/modules/chipsec.modules.tools.vmm.xen.xsa188.html new file mode 100644 index 00000000..08fe3157 --- /dev/null +++ b/modules/chipsec.modules.tools.vmm.xen.xsa188.html @@ -0,0 +1,192 @@ + + + + + + + + xsa188 module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    xsa188 module

    +

    This module triggers host crash on vulnerable Xen 4.4

    +
    +
    Reference:
    +
    +
    Usage:

    chipsec_main.py -m tools.vmm.xen.xsa188

    +
    +
    Examples:
    >>> chipsec_main.py -i -m tools.vmm.xen.xsa188
+
    +
    +
    +
    +
    +

    Note

    +
      +

    • Returns a Warning by default

      • +

    • System may be in an unknown state, further evaluation may be needed

      • +
    +
    +
    +

    Important

    +
      +

    • This module is designed to run in a VM environment

      • +

    • Behavior on physical HW is undefined

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.modules.tools.wsmt.html b/modules/chipsec.modules.tools.wsmt.html new file mode 100644 index 00000000..414f45af --- /dev/null +++ b/modules/chipsec.modules.tools.wsmt.html @@ -0,0 +1,175 @@ + + + + + + + + wsmt module — CHIPSEC documentation + + + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    wsmt module

    +

    The Windows SMM Security Mitigation Table (WSMT) is an ACPI table defined by Microsoft that allows +system firmware to confirm to the operating system that certain security best practices have been +implemented in System Management Mode (SMM) software.

    +
    +
    Reference:
    +
    +
    Usage:

    chipsec_main -m common.wsmt

    +
    +
    Examples:
    >>> chipsec_main.py -m common.wsmt
+
    +
    +
    +
    +
    +

    Note

    +
      +

    • Analysis is only necessary if Windows is the primary OS

      • +
    +
    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.parsers.html b/modules/chipsec.parsers.html index 0cbfbb4d..61a26f66 100644 --- a/modules/chipsec.parsers.html +++ b/modules/chipsec.parsers.html @@ -1,20 +1,19 @@ - - + - - chipsec.parsers module — CHIPSEC documentation - - + + + parsers module — CHIPSEC documentation + + - - - - + + + - + @@ -28,7 +27,7 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.parsers module
    • +
  • parsers module
    • @@ -37,102 +36,9 @@

    Navigation

    -
    -

    chipsec.parsers module

    -
    -
    -class BaseConfigHelper(cfg_obj)[source]
    -

    Bases: object

    -
    - -
    -
    -class BaseConfigParser(cfg_obj)[source]
    -

    Bases: object

    -
    -
    -def_handler(et_node, stage_data=None)[source]
    -
    - -
    -
    -get_metadata()[source]
    -
    - -
    -
    -get_stage()[source]
    -
    - -
    -
    -startup()[source]
    -
    - -
    - -
    -
    -class Stage(value)[source]
    -

    Bases: enum.Enum

    -

    An enumeration.

    -
    -
    -CORE_SUPPORT = 30
    -
    - -
    -
    -CUST_SUPPORT = 40
    -
    - -
    -
    -DEVICE_CFG = 20
    -
    - -
    -
    -EXTRA = 50
    -
    - -
    -
    -GET_INFO = 10
    -
    - -
    -
    -NONE = 0
    -
    - -
    - -
    -
    -config_data
    -

    alias of chipsec.parsers.DevData

    -
    - -
    -
    -info_data
    -

    alias of chipsec.parsers.InfoData

    -
    - -
    -
    -stage_dev
    -

    alias of chipsec.parsers.StageCore

    -
    - -
    -
    -stage_info
    -

    alias of chipsec.parsers.StageInfo

    -
    - -
    +
    +

    parsers module

    +
    @@ -192,7 +98,7 @@

    Quick search

    - +
    @@ -207,12 +113,12 @@

    Navigation

    modules |
  • CHIPSEC documentation »
    • -
  • chipsec.parsers module
    • +
  • parsers module
    • \ No newline at end of file diff --git a/modules/chipsec.testcase.html b/modules/chipsec.testcase.html new file mode 100644 index 00000000..42064e70 --- /dev/null +++ b/modules/chipsec.testcase.html @@ -0,0 +1,124 @@ + + + + + + + + testcase module — CHIPSEC documentation + + + + + + + + + + + + + +
    +
    +
    +
    + +
    +

    testcase module

    +
    + + +
    +
    +
    +
    + +
    +
    + + + + \ No newline at end of file diff --git a/modules/chipsec.utilcmd.acpi_cmd.html b/modules/chipsec.utilcmd.acpi_cmd.html index de3a6c54..00ad6e95 100644 --- a/modules/chipsec.utilcmd.acpi_cmd.html +++ b/modules/chipsec.utilcmd.acpi_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.acpi_cmd module — CHIPSEC documentation - - + + + acpi_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.acpi_cmd module

    +
    +

    acpi_cmd module

    Command-line utility providing access to ACPI tables

    >>> chipsec_util acpi list
 >>> chipsec_util acpi table <name>|<file_path>
@@ -60,38 +59,7 @@ 
    Navigation
    
 >>> chipsec_util acpi table acpi_table.bin
    -
    -
    -class ACPICommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -acpi_list() → None[source]
    -
    - -
    -
    -acpi_table() → None[source]
    -
    - -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    -
    -set_up() → None[source]
    -
    - -
    - -
    +
    @@ -145,12 +113,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd package

    + title="previous chapter">utilcmd package

    Next topic

    chipsec.utilcmd.chipset_cmd module

    + title="next chapter">chipset_cmd module

    - +
    @@ -176,20 +144,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.acpi_cmd module
    • +
  • utilcmd package »
    • +
  • acpi_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.chipset_cmd.html b/modules/chipsec.utilcmd.chipset_cmd.html index c32c4655..8e90bb11 100644 --- a/modules/chipsec.utilcmd.chipset_cmd.html +++ b/modules/chipsec.utilcmd.chipset_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.chipset_cmd module — CHIPSEC documentation - - + + + chipset_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,37 +46,15 @@

    Navigation

    -
    -

    chipsec.utilcmd.chipset_cmd module

    +
    +

    chipset_cmd module

    usage as a standalone utility:
    >>> chipsec_util platform
    -
    -
    -class PlatformCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -

    chipsec_util platform

    -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    -
    -run()[source]
    -
    - -
    - -
    +
    @@ -131,12 +108,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.acpi_cmd module

    + title="previous chapter">acpi_cmd module

    Next topic

    chipsec.utilcmd.cmos_cmd module

    + title="next chapter">cmos_cmd module

    - +
    @@ -162,20 +139,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.chipset_cmd module
    • +
  • utilcmd package »
    • +
  • chipset_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.cmos_cmd.html b/modules/chipsec.utilcmd.cmos_cmd.html index 4af49671..b83f0176 100644 --- a/modules/chipsec.utilcmd.cmos_cmd.html +++ b/modules/chipsec.utilcmd.cmos_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.cmos_cmd module — CHIPSEC documentation - - + + + cmos_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.cmos_cmd module

    +
    +

    cmos_cmd module

    >>> chipsec_util cmos dump
 >>> chipsec_util cmos readl|writel|readh|writeh <byte_offset> [byte_val]
    @@ -59,53 +58,7 @@

    Navigation

    >>> chipsec_util cmos writeh 0x0 0xCC
    -
    -
    -class CMOSCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -cmos_dump() → None[source]
    -
    - -
    -
    -cmos_readh() → None[source]
    -
    - -
    -
    -cmos_readl() → None[source]
    -
    - -
    -
    -cmos_writeh() → None[source]
    -
    - -
    -
    -cmos_writel() → None[source]
    -
    - -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    -
    -set_up() → None[source]
    -
    - -
    - -
    +
    @@ -159,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.chipset_cmd module

    + title="previous chapter">chipset_cmd module

    Next topic

    chipsec.utilcmd.config_cmd module

    + title="next chapter">config_cmd module

    - +
    @@ -190,20 +143,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.cmos_cmd module
    • +
  • utilcmd package »
    • +
  • cmos_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.config_cmd.html b/modules/chipsec.utilcmd.config_cmd.html index 473e0c07..8fe29244 100644 --- a/modules/chipsec.utilcmd.config_cmd.html +++ b/modules/chipsec.utilcmd.config_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.config_cmd module — CHIPSEC documentation - - + + + config_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.config_cmd module

    +
    +

    config_cmd module

    >>> chipsec_util config show [config] <name>
    @@ -58,68 +57,7 @@

    Navigation

    >>> chipsec_util config show REGISTERS BC
    -
    -
    -class CONFIGCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -bus_details(regi: str) → str[source]
    -
    - -
    -
    -control_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -io_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -lock_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -mem_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -mmio_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -pci_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -register_details(regi: Dict[str, Any]) → str[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    -
    -show() → None[source]
    -
    - -
    - -
    +
    @@ -173,12 +111,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.cmos_cmd module

    + title="previous chapter">cmos_cmd module

    Next topic

    chipsec.utilcmd.cpu_cmd module

    + title="next chapter">cpu_cmd module

    - +
    @@ -204,20 +142,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.config_cmd module
    • +
  • utilcmd package »
    • +
  • config_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.cpu_cmd.html b/modules/chipsec.utilcmd.cpu_cmd.html index 59955e46..0df20da6 100644 --- a/modules/chipsec.utilcmd.cpu_cmd.html +++ b/modules/chipsec.utilcmd.cpu_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.cpu_cmd module — CHIPSEC documentation - - + + + cpu_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.cpu_cmd module

    +
    +

    cpu_cmd module

    >>> chipsec_util cpu info
 >>> chipsec_util cpu cr <thread> <cr_number> [value]
 >>> chipsec_util cpu cpuid <eax> [ecx]
@@ -65,48 +64,7 @@ 
    Navigation
    
 >>> chipsec_util cpu topology
    -
    -
    -class CPUCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -cpu_cpuid() → None[source]
    -
    - -
    -
    -cpu_cr() → Optional[Union[bool, int]][source]
    -
    - -
    -
    -cpu_info() → None[source]
    -
    - -
    -
    -cpu_pt() → None[source]
    -
    - -
    -
    -cpu_topology() → Dict[str, Dict[int, List[int]]][source]
    -
    - -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    - -
    +
    @@ -160,12 +118,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.config_cmd module

    + title="previous chapter">config_cmd module

    Next topic

    chipsec.utilcmd.decode_cmd module

    + title="next chapter">decode_cmd module

    - +
    @@ -191,20 +149,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.cpu_cmd module
    • +
  • utilcmd package »
    • +
  • cpu_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.decode_cmd.html b/modules/chipsec.utilcmd.decode_cmd.html index b6747db5..2f4f154b 100644 --- a/modules/chipsec.utilcmd.decode_cmd.html +++ b/modules/chipsec.utilcmd.decode_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.decode_cmd module — CHIPSEC documentation - - + + + decode_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.decode_cmd module

    +
    +

    decode_cmd module

    CHIPSEC can parse an image file containing data from the SPI flash (such as the result of chipsec_util spi dump). This can be critical in forensic analysis.

    This will create multiple log files, binaries, and directories that correspond to the sections, firmware volumes, files, variables, etc. stored in the SPI flash.

    Usage:

    @@ -71,33 +70,7 @@

    Navigation

    If the nvram directory does not appear and the list of nvram variables is empty, try again with another type.

    -
    -
    -class DecodeCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -decode_rom() → bool[source]
    -
    - -
    -
    -decode_types() → None[source]
    -
    - -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    - -
    +
    @@ -151,12 +124,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.cpu_cmd module

    + title="previous chapter">cpu_cmd module

    Next topic

    chipsec.utilcmd.deltas_cmd module

    + title="next chapter">deltas_cmd module

    - +
    @@ -182,20 +155,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.decode_cmd module
    • +
  • utilcmd package »
    • +
  • decode_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.deltas_cmd.html b/modules/chipsec.utilcmd.deltas_cmd.html index f954e0c2..2488cdfb 100644 --- a/modules/chipsec.utilcmd.deltas_cmd.html +++ b/modules/chipsec.utilcmd.deltas_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.deltas_cmd module — CHIPSEC documentation - - + + + deltas_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.deltas_cmd module

    +
    +

    deltas_cmd module

    >>> chipsec_util deltas <previous> <current> [out-format] [out-name]
    @@ -56,28 +55,7 @@

    Navigation

    out-name - Output file name

    Example: >>> chipsec_util deltas run1.json run2.json

    -
    -
    -class DeltasCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    +
    @@ -131,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.decode_cmd module

    + title="previous chapter">decode_cmd module

    Next topic

    chipsec.utilcmd.desc_cmd module

    + title="next chapter">desc_cmd module

    - +
    @@ -162,20 +140,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
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  • chipsec.utilcmd.deltas_cmd module
    • +
  • utilcmd package »
    • +
  • deltas_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.desc_cmd.html b/modules/chipsec.utilcmd.desc_cmd.html index f736e740..a45d8ff8 100644 --- a/modules/chipsec.utilcmd.desc_cmd.html +++ b/modules/chipsec.utilcmd.desc_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.desc_cmd module — CHIPSEC documentation - - + + + desc_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.desc_cmd module

    +
    +

    desc_cmd module

    The idt, gdt and ldt commands print the IDT, GDT and LDT, respectively.

    IDT command:

    >>> chipsec_util idt [cpu_id]
@@ -77,94 +76,7 @@ 
    Navigation
    
 >>> chipsec_util ldt
    -
    -
    -class GDTCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    >>> chipsec_util gdt [cpu_id]
-
    -
    -

    Examples:

    -
    >>> chipsec_util gdt 0
->>> chipsec_util gdt
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    Bases: chipsec.command.BaseCommand

    -
    >>> chipsec_util idt [cpu_id]
-
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    Examples:

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    >>> chipsec_util idt 0
->>> chipsec_util idt
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    Bases: chipsec.command.BaseCommand

    -
    >>> chipsec_util ldt [cpu_id]
-
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    Examples:

    -
    >>> chipsec_util ldt 0
->>> chipsec_util ldt
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    @@ -218,12 +130,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.deltas_cmd module

    + title="previous chapter">deltas_cmd module

    Next topic

    chipsec.utilcmd.ec_cmd module

    + title="next chapter">ec_cmd module

    - +
    @@ -249,20 +161,20 @@

    Navigation

    modules |
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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
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    • +
  • utilcmd package »
    • +
  • desc_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.ec_cmd.html b/modules/chipsec.utilcmd.ec_cmd.html index eb749648..fc991acd 100644 --- a/modules/chipsec.utilcmd.ec_cmd.html +++ b/modules/chipsec.utilcmd.ec_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.ec_cmd module — CHIPSEC documentation - - + + + ec_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.ec_cmd module

    +
    +

    ec_cmd module

    >>> chipsec_util ec dump    [<size>]
 >>> chipsec_util ec command <command>
 >>> chipsec_util ec read    <offset> [<size>]
@@ -64,53 +63,7 @@ 
    Navigation
    
 >>> chipsec_util ec index
    -
    -
    -class ECCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    @@ -164,12 +117,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.desc_cmd module

    + title="previous chapter">desc_cmd module

    Next topic

    chipsec.utilcmd.igd_cmd module

    + title="next chapter">igd_cmd module

    - +
    @@ -195,20 +148,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.ec_cmd module
    • +
  • utilcmd package »
    • +
  • ec_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.html b/modules/chipsec.utilcmd.html index 8fa3ce2a..7a9417b2 100644 --- a/modules/chipsec.utilcmd.html +++ b/modules/chipsec.utilcmd.html @@ -1,23 +1,22 @@ - - + - - chipsec.utilcmd package — CHIPSEC documentation - - + + + utilcmd package — CHIPSEC documentation + + - - - - + + + - + - + @@ -46,52 +45,46 @@

    Navigation

    -
    -

    chipsec.utilcmd package

    -
    -

    Submodules

    +
    +

    utilcmd package

    -
    -
    -

    Module contents

    -
    -
    +
    @@ -150,7 +143,7 @@

    Previous topic

    Next topic

    chipsec.utilcmd.acpi_cmd module

    + title="next chapter">acpi_cmd module

    - +
    @@ -176,19 +169,19 @@

    Navigation

    modules |
  • - next |
  • previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package
    • +
  • utilcmd package
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.igd_cmd.html b/modules/chipsec.utilcmd.igd_cmd.html index 4c6c834a..8340f36a 100644 --- a/modules/chipsec.utilcmd.igd_cmd.html +++ b/modules/chipsec.utilcmd.igd_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.igd_cmd module — CHIPSEC documentation - - + + + igd_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.igd_cmd module

    +
    +

    igd_cmd module

    The igd command allows memory read/write operations using igd dma.

    >>> chipsec_util igd
 >>> chipsec_util igd dmaread <address> [width] [file_name]
@@ -60,38 +59,7 @@ 
    Navigation
    
 >>> chipsec_util igd dmawrite 0x2217F1000 0x4 deadbeef
    -
    -
    -class IgdCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -
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    - -
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    @@ -145,12 +113,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.ec_cmd module

    + title="previous chapter">ec_cmd module

    Next topic

    chipsec.utilcmd.interrupts_cmd module

    + title="next chapter">interrupts_cmd module

    - +
    @@ -176,20 +144,20 @@

    Navigation

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  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.igd_cmd module
    • +
  • utilcmd package »
    • +
  • igd_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.interrupts_cmd.html b/modules/chipsec.utilcmd.interrupts_cmd.html index cfd0559c..c8788197 100644 --- a/modules/chipsec.utilcmd.interrupts_cmd.html +++ b/modules/chipsec.utilcmd.interrupts_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.interrupts_cmd module — CHIPSEC documentation - - + + + interrupts_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.interrupts_cmd module

    +
    +

    interrupts_cmd module

    SMI command:

    >>> chipsec_util smi count
 >>> chipsec_util smi send <thread_id> <SMI_code> <SMI_data> [RAX] [RBX] [RCX] [RDX] [RSI] [RDI]
@@ -70,83 +69,7 @@ 
    Navigation
    
 
    >>> chipsec_util nmi
 
    
 
    
-
    
-
    
-class NMICommand(argv, cs=None)[source]
    
-
    Bases: chipsec.command.BaseCommand
    
-
    >>> chipsec_util nmi
-
    
-
    
-
    Examples:
    
-
    >>> chipsec_util nmi
-
    
-
    
-
    
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-parse_arguments() → None[source]
    
-
    
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-
    
-
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-
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-class SMICommand(argv, cs=None)[source]
    
-
    Bases: chipsec.command.BaseCommand
    
-
    >>> chipsec_util smi count
->>> chipsec_util smi send <thread_id> <SMI_code> <SMI_data> [RAX] [RBX] [RCX] [RDX] [RSI] [RDI]
->>> chipsec_util smi smmc <RT_code_start> <RT_code_end> <GUID> <payload_loc> <payload_file|payload_string> [port]
-
    
-
    
-
    Examples:
    
-
    >>> chipsec_util smi count
->>> chipsec_util smi send 0x0 0xDE 0x0
->>> chipsec_util smi send 0x0 0xDE 0x0 0xAAAAAAAAAAAAAAAA ..
->>> chipsec_util smi smmc 0x79dfe000 0x79efdfff ed32d533-99e6-4209-9cc02d72cdd998a7 0x79dfaaaa payload.bin
-
    
-
    
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-
    
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-
    
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-smi_count() → None[source]
    
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-smi_send() → None[source]
    
-
    
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-smi_smmc() → None[source]
    
-
    
-
-
    
-
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    +
    @@ -200,12 +123,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.igd_cmd module

    + title="previous chapter">igd_cmd module

    Next topic

    chipsec.utilcmd.io_cmd module

    + title="next chapter">io_cmd module

    - +
    @@ -231,20 +154,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
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    • +
  • utilcmd package »
    • +
  • interrupts_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.io_cmd.html b/modules/chipsec.utilcmd.io_cmd.html index 9cc1b476..05cb66b2 100644 --- a/modules/chipsec.utilcmd.io_cmd.html +++ b/modules/chipsec.utilcmd.io_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.io_cmd module — CHIPSEC documentation - - + + + io_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.io_cmd module

    +
    +

    io_cmd module

    The io command allows direct access to read and write I/O port space.

    >>> chipsec_util io list
 >>> chipsec_util io read  <io_port> <width>
@@ -61,43 +60,7 @@ 
    Navigation
    
 >>> chipsec_util io write 0x430 1 0x0
    -
    -
    -class PortIOCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -io_list() → None[source]
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    -io_read() → None[source]
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    -io_write() → None[source]
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    -requirements() → chipsec.command.toLoad[source]
    -
    - -
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    -set_up() → None[source]
    -
    - -
    - -
    +
    @@ -151,12 +114,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.interrupts_cmd module

    + title="previous chapter">interrupts_cmd module

    Next topic

    chipsec.utilcmd.iommu_cmd module

    + title="next chapter">iommu_cmd module

    - +
    @@ -182,20 +145,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
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    • +
  • utilcmd package »
    • +
  • io_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.iommu_cmd.html b/modules/chipsec.utilcmd.iommu_cmd.html index e1edb460..7ff442a8 100644 --- a/modules/chipsec.utilcmd.iommu_cmd.html +++ b/modules/chipsec.utilcmd.iommu_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.iommu_cmd module — CHIPSEC documentation - - + + + iommu_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.iommu_cmd module

    +
    +

    iommu_cmd module

    Command-line utility providing access to IOMMU engines

    >>> chipsec_util iommu list
 >>> chipsec_util iommu config [iommu_engine]
@@ -65,63 +64,7 @@ 
    Navigation
    
 >>> chipsec_util iommu pt
    -
    -
    -class IOMMUCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -iommu_config() → None[source]
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    -iommu_enable() → None[source]
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    -iommu_engine(cmd) → None[source]
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    -iommu_pt() → None[source]
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    -iommu_status() → None[source]
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    -parse_arguments() → None[source]
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    -requirements() → chipsec.command.toLoad[source]
    -
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    -run() → None[source]
    -
    - -
    - -
    +
    @@ -175,12 +118,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.io_cmd module

    + title="previous chapter">io_cmd module

    Next topic

    chipsec.utilcmd.lock_check_cmd module

    + title="next chapter">lock_check_cmd module

    - +
    @@ -206,20 +149,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
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    • +
  • utilcmd package »
    • +
  • iommu_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.lock_check_cmd.html b/modules/chipsec.utilcmd.lock_check_cmd.html index d8b93a55..418ec315 100644 --- a/modules/chipsec.utilcmd.lock_check_cmd.html +++ b/modules/chipsec.utilcmd.lock_check_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.lock_check_cmd module — CHIPSEC documentation - - + + + lock_check_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.lock_check_cmd module

    +
    +

    lock_check_cmd module

    >>> chipsec_util check list
 >>> chipsec_util check lock <lockname>
 >>> chipsec_util check lock <lockname1, lockname2, ...>
@@ -74,68 +73,7 @@ 
    Navigation
    -
    -
    -class LOCKCHECKCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -check_lock() → None[source]
    -
    - -
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    -check_log(lock: str, is_locked: int) → str[source]
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    -list_locks() → None[source]
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    -
    - -
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    -version = '0.5'
    -
    - -
    - -
    +
    @@ -189,12 +127,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.iommu_cmd module

    + title="previous chapter">iommu_cmd module

    Next topic

    chipsec.utilcmd.mem_cmd module

    + title="next chapter">mem_cmd module

    - +
    @@ -220,20 +158,20 @@

    Navigation

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    • +
  • utilcmd package »
    • +
  • lock_check_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.mem_cmd.html b/modules/chipsec.utilcmd.mem_cmd.html index 6c673408..48aa5c8b 100644 --- a/modules/chipsec.utilcmd.mem_cmd.html +++ b/modules/chipsec.utilcmd.mem_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.mem_cmd module — CHIPSEC documentation - - + + + mem_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.mem_cmd module

    +
    +

    mem_cmd module

    The mem command provides direct access to read and write physical memory.

    >>> chipsec_util mem <op> <physical_address> <length> [value|buffer_file]
 >>> <physical_address> : 64-bit physical address
@@ -70,63 +69,7 @@ 
    Navigation
    
 >>> chipsec_util mem search   0xF0000            0x10000  _SM_
    -
    -
    -class MemCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -dump_region_to_path(path: str, pa_start: int, pa_end: int) → None[source]
    -
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    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    - -
    +
    @@ -180,12 +123,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.lock_check_cmd module

    + title="previous chapter">lock_check_cmd module

    Next topic

    chipsec.utilcmd.mmcfg_base_cmd module

    + title="next chapter">mmcfg_base_cmd module

    - +
    @@ -211,20 +154,20 @@

    Navigation

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  • utilcmd package »
    • +
  • mem_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.mmcfg_base_cmd.html b/modules/chipsec.utilcmd.mmcfg_base_cmd.html index 01d4010a..93b6e22f 100644 --- a/modules/chipsec.utilcmd.mmcfg_base_cmd.html +++ b/modules/chipsec.utilcmd.mmcfg_base_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.mmcfg_base_cmd module — CHIPSEC documentation - - + + + mmcfg_base_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.mmcfg_base_cmd module

    +
    +

    mmcfg_base_cmd module

    The mmcfg_base command displays PCIe MMCFG Base/Size.

    Usage:

    >>> chipsec_util mmcfg_base
@@ -58,28 +57,7 @@ 
    Navigation
    
 
    >>> chipsec_util mmcfg_base
 
    
 
    
-
    
-
    
-class MMCfgBaseCommand(argv, cs=None)[source]
    
-
    Bases: chipsec.command.BaseCommand
    
-
    
-
    
-parse_arguments() → None[source]
    
-
    
-
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-
    
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-
    
-
-
    
-
-
    +
    @@ -133,12 +111,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.mem_cmd module

    + title="previous chapter">mem_cmd module

    Next topic

    chipsec.utilcmd.mmcfg_cmd module

    + title="next chapter">mmcfg_cmd module

    - +
    @@ -164,20 +142,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.mmcfg_base_cmd module
    • +
  • utilcmd package »
    • +
  • mmcfg_base_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.mmcfg_cmd.html b/modules/chipsec.utilcmd.mmcfg_cmd.html index de22b44b..03e9bdba 100644 --- a/modules/chipsec.utilcmd.mmcfg_cmd.html +++ b/modules/chipsec.utilcmd.mmcfg_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.mmcfg_cmd module — CHIPSEC documentation - - + + + mmcfg_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.mmcfg_cmd module

    +
    +

    mmcfg_cmd module

    The mmcfg command allows direct access to memory mapped config space.

    >>> chipsec_util mmcfg base
 >>> chipsec_util mmcfg read <bus> <device> <function> <offset> <width>
@@ -63,43 +62,7 @@ 
    Navigation
    
 >>> chipsec_util mmcfg ec
    -
    -
    -class MMCfgCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    - -
    +
    @@ -153,12 +116,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.mmcfg_base_cmd module

    + title="previous chapter">mmcfg_base_cmd module

    Next topic

    chipsec.utilcmd.mmio_cmd module

    + title="next chapter">mmio_cmd module

    - +
    @@ -184,20 +147,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.mmcfg_cmd module
    • +
  • utilcmd package »
    • +
  • mmcfg_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.mmio_cmd.html b/modules/chipsec.utilcmd.mmio_cmd.html index 5a567e10..7cea8458 100644 --- a/modules/chipsec.utilcmd.mmio_cmd.html +++ b/modules/chipsec.utilcmd.mmio_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.mmio_cmd module — CHIPSEC documentation - - + + + mmio_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.mmio_cmd module

    +
    +

    mmio_cmd module

    >>> chipsec_util mmio list
 >>> chipsec_util mmio dump <MMIO_BAR_name> [offset] [length]
 >>> chipsec_util mmio dump-abs <MMIO_base_address> [offset] [length]
@@ -68,63 +67,7 @@ 
    Navigation
    
 >>> chipsec_util mmio write-abs 0xFE010000 0x74 0x04 0xFFFF0000
    -
    -
    -class MMIOCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -write_bar()[source]
    -
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    +
    @@ -178,12 +121,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.mmcfg_cmd module

    + title="previous chapter">mmcfg_cmd module

    Next topic

    chipsec.utilcmd.msgbus_cmd module

    + title="next chapter">msgbus_cmd module

    - +
    @@ -209,20 +152,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.mmio_cmd module
    • +
  • utilcmd package »
    • +
  • mmio_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.msgbus_cmd.html b/modules/chipsec.utilcmd.msgbus_cmd.html index 7ab4d42c..ad24a994 100644 --- a/modules/chipsec.utilcmd.msgbus_cmd.html +++ b/modules/chipsec.utilcmd.msgbus_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.msgbus_cmd module — CHIPSEC documentation - - + + + msgbus_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,14 +46,14 @@

    Navigation

    -
    -

    chipsec.utilcmd.msgbus_cmd module

    +
    +

    msgbus_cmd module

    >>> chipsec_util msgbus read     <port> <register>
 >>> chipsec_util msgbus write    <port> <register> <value>
 >>> chipsec_util msgbus mm_read  <port> <register>
 >>> chipsec_util msgbus mm_write <port> <register> <value>
 >>> chipsec_util msgbus message  <port> <register> <opcode> [value]
->>>
+>>>
 >>> <port>    : message bus port of the target unit
 >>> <register>: message bus register/offset in the target unit port
 >>> <value>   : value to be written to the message bus register/offset
@@ -68,53 +67,7 @@ 
    Navigation
    
 >>> chipsec_util msgbus message  0x3 0x2E 0x11 0x0
    -
    -
    -class MsgBusCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -msgbus_message()[source]
    -
    - -
    -
    -msgbus_mm_read()[source]
    -
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    -msgbus_mm_write()[source]
    -
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    -parse_arguments() → None[source]
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    -requirements() → chipsec.command.toLoad[source]
    -
    - -
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    -run()[source]
    -
    - -
    - -
    +
    @@ -168,12 +121,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.mmio_cmd module

    + title="previous chapter">mmio_cmd module

    Next topic

    chipsec.utilcmd.msr_cmd module

    + title="next chapter">msr_cmd module

    - +
    @@ -199,20 +152,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.msgbus_cmd module
    • +
  • utilcmd package »
    • +
  • msgbus_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.msr_cmd.html b/modules/chipsec.utilcmd.msr_cmd.html index e6066247..661870bf 100644 --- a/modules/chipsec.utilcmd.msr_cmd.html +++ b/modules/chipsec.utilcmd.msr_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.msr_cmd module — CHIPSEC documentation - - + + + msr_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.msr_cmd module

    +
    +

    msr_cmd module

    The msr command allows direct access to read and write MSRs.

    >>> chipsec_util msr <msr> [eax] [edx] [thread_id]
    @@ -59,28 +58,7 @@

    Navigation

    >>> chipsec_util msr 0x8B 0x0 0x0 0x0
    -
    -
    -class MSRCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    -
    -run()[source]
    -
    - -
    - -
    +
    @@ -134,12 +112,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.msgbus_cmd module

    + title="previous chapter">msgbus_cmd module

    Next topic

    chipsec.utilcmd.pci_cmd module

    + title="next chapter">pci_cmd module

    - +
    @@ -165,20 +143,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.msr_cmd module
    • +
  • utilcmd package »
    • +
  • msr_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.pci_cmd.html b/modules/chipsec.utilcmd.pci_cmd.html index 7c024241..35d7ea43 100644 --- a/modules/chipsec.utilcmd.pci_cmd.html +++ b/modules/chipsec.utilcmd.pci_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.pci_cmd module — CHIPSEC documentation - - + + + pci_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.pci_cmd module

    +
    +

    pci_cmd module

    The pci command can enumerate PCI/PCIe devices, enumerate expansion ROMs and allow direct access to PCI configuration registers via bus/device/function.

    >>> chipsec_util pci enumerate
 >>> chipsec_util pci read <bus> <device> <function> <offset> [width]
@@ -72,53 +71,7 @@ 
    Navigation
    
 >>> chipsec_util pci cmd 1
    -
    -
    -class PCICommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
    -
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    -
    -pci_cmd()[source]
    -
    - -
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    -pci_dump()[source]
    -
    - -
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    -pci_enumerate()[source]
    -
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    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    - -
    +
    @@ -172,12 +125,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.msr_cmd module

    + title="previous chapter">msr_cmd module

    Next topic

    chipsec.utilcmd.reg_cmd module

    + title="next chapter">reg_cmd module

    - +
    @@ -203,20 +156,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.pci_cmd module
    • +
  • utilcmd package »
    • +
  • pci_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.reg_cmd.html b/modules/chipsec.utilcmd.reg_cmd.html index aa529930..0ecb0985 100644 --- a/modules/chipsec.utilcmd.reg_cmd.html +++ b/modules/chipsec.utilcmd.reg_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.reg_cmd module — CHIPSEC documentation - - + + + reg_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.reg_cmd module

    +
    +

    reg_cmd module

    >>> chipsec_util reg read <reg_name> [<field_name>]
 >>> chipsec_util reg read_field <reg_name> <field_name>
 >>> chipsec_util reg write <reg_name> <value>
@@ -67,53 +66,7 @@ 
    Navigation
    
 >>> chipsec_util reg set_control BiosLockEnable 0x1
    -
    -
    -class RegisterCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -parse_arguments() → None[source]
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    -requirements() → chipsec.command.toLoad[source]
    -
    - -
    - -
    +
    @@ -167,12 +120,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.pci_cmd module

    + title="previous chapter">pci_cmd module

    Next topic

    chipsec.utilcmd.smbios_cmd module

    + title="next chapter">smbios_cmd module

    - +
    @@ -198,20 +151,20 @@

    Navigation

    modules |
  • - next |
  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.reg_cmd module
    • +
  • utilcmd package »
    • +
  • reg_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.smbios_cmd.html b/modules/chipsec.utilcmd.smbios_cmd.html index 635c926c..854a393f 100644 --- a/modules/chipsec.utilcmd.smbios_cmd.html +++ b/modules/chipsec.utilcmd.smbios_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.smbios_cmd module — CHIPSEC documentation - - + + + smbios_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.smbios_cmd module

    +
    +

    smbios_cmd module

    >>> chipsec_util smbios entrypoint
 >>> chipsec_util smbios get [raw|decoded] [type]
    @@ -58,38 +57,7 @@

    Navigation

    >>> chipsec_util smbios get raw
    -
    -
    -class smbios_cmd(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
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    -requirements() → chipsec.command.toLoad[source]
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    -smbios_get()[source]
    -
    - -
    - -
    +
    @@ -143,12 +111,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.reg_cmd module

    + title="previous chapter">reg_cmd module

    Next topic

    chipsec.utilcmd.smbus_cmd module

    + title="next chapter">smbus_cmd module

    - +
    @@ -174,20 +142,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.smbios_cmd module
    • +
  • utilcmd package »
    • +
  • smbios_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.smbus_cmd.html b/modules/chipsec.utilcmd.smbus_cmd.html index c4ab3e2e..4f729f74 100644 --- a/modules/chipsec.utilcmd.smbus_cmd.html +++ b/modules/chipsec.utilcmd.smbus_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.smbus_cmd module — CHIPSEC documentation - - + + + smbus_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.smbus_cmd module

    +
    +

    smbus_cmd module

    >>> chipsec_util smbus read <device_addr> <start_offset> [size]
 >>> chipsec_util smbus write <device_addr> <offset> <byte_val>
    @@ -57,43 +56,7 @@

    Navigation

    >>> chipsec_util smbus read 0xA0 0x0 0x100
    -
    -
    -class SMBusCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -parse_arguments() → None[source]
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    -smbus_write()[source]
    -
    - -
    - -
    +
    @@ -147,12 +110,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.smbios_cmd module

    + title="previous chapter">smbios_cmd module

    Next topic

    chipsec.utilcmd.spd_cmd module

    + title="next chapter">spd_cmd module

    - +
    @@ -178,20 +141,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.smbus_cmd module
    • +
  • utilcmd package »
    • +
  • smbus_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.spd_cmd.html b/modules/chipsec.utilcmd.spd_cmd.html index 6c101700..c9ac844f 100644 --- a/modules/chipsec.utilcmd.spd_cmd.html +++ b/modules/chipsec.utilcmd.spd_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.spd_cmd module — CHIPSEC documentation - - + + + spd_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.spd_cmd module

    +
    +

    spd_cmd module

    >>> chipsec_util spd detect
 >>> chipsec_util spd dump [device_addr]
 >>> chipsec_util spd read <device_addr> <offset>
@@ -64,48 +63,7 @@ 
    Navigation
    
 >>> chipsec_util spd write 0xA0 0x0 0xAA
    -
    -
    -class SPDCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -
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    - -
    +
    @@ -159,12 +117,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.smbus_cmd module

    + title="previous chapter">smbus_cmd module

    Next topic

    chipsec.utilcmd.spi_cmd module

    + title="next chapter">spi_cmd module

    - +
    @@ -190,20 +148,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.spd_cmd module
    • +
  • utilcmd package »
    • +
  • spd_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.spi_cmd.html b/modules/chipsec.utilcmd.spi_cmd.html index 56686fe3..2c564e22 100644 --- a/modules/chipsec.utilcmd.spi_cmd.html +++ b/modules/chipsec.utilcmd.spi_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.spi_cmd module — CHIPSEC documentation - - + + + spi_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.spi_cmd module

    +
    +

    spi_cmd module

    CHIPSEC includes functionality for reading and writing the SPI flash. When an image file is created from reading the SPI flash, this image can be parsed to reveal sections, files, variables, etc.

    Warning

    @@ -71,68 +70,7 @@

    Navigation

    >>> chipsec_util spi jedec decode
    -
    -
    -class SPICommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
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    -requirements() → chipsec.command.toLoad[source]
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    -
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    - -
    +
    @@ -186,12 +124,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.spd_cmd module

    + title="previous chapter">spd_cmd module

    Next topic

    chipsec.utilcmd.spidesc_cmd module

    + title="next chapter">spidesc_cmd module

    - +
    @@ -217,20 +155,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.spi_cmd module
    • +
  • utilcmd package »
    • +
  • spi_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.spidesc_cmd.html b/modules/chipsec.utilcmd.spidesc_cmd.html index 6174aad7..8da4c127 100644 --- a/modules/chipsec.utilcmd.spidesc_cmd.html +++ b/modules/chipsec.utilcmd.spidesc_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.spidesc_cmd module — CHIPSEC documentation - - + + + spidesc_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.spidesc_cmd module

    +
    +

    spidesc_cmd module

    >>> chipsec_util spidesc <rom>
    @@ -56,28 +55,7 @@

    Navigation

    >>> chipsec_util spidesc spi.bin
    -
    -
    -class SPIDescCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
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    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
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    -run()[source]
    -
    - -
    - -
    +
    @@ -131,12 +109,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.spi_cmd module

    + title="previous chapter">spi_cmd module

    Next topic

    chipsec.utilcmd.tpm_cmd module

    + title="next chapter">tpm_cmd module

    - +
    @@ -162,20 +140,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.spidesc_cmd module
    • +
  • utilcmd package »
    • +
  • spidesc_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.tpm_cmd.html b/modules/chipsec.utilcmd.tpm_cmd.html index 746260d0..0bb7f2f5 100644 --- a/modules/chipsec.utilcmd.tpm_cmd.html +++ b/modules/chipsec.utilcmd.tpm_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.tpm_cmd module — CHIPSEC documentation - - + + + tpm_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.tpm_cmd module

    +
    +

    tpm_cmd module

    >>> chipsec_util tpm parse_log <file>
 >>> chipsec_util tpm state <locality>
 >>> chipsec_util tpm command <commandName> <locality> <command_parameters>
@@ -69,53 +68,7 @@ 
    Navigation
    
 >>> chipsec_util tpm command continueselftest 0
    -
    -
    -class TPMCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -no_driver_cmd = ['parse_log']
    -
    - -
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    -parse_arguments() → None[source]
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    - -
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    -requirements() → chipsec.command.toLoad[source]
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    -tpm_parse()[source]
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    -tpm_state()[source]
    -
    - -
    - -
    +
    @@ -169,12 +122,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.spidesc_cmd module

    + title="previous chapter">spidesc_cmd module

    Next topic

    chipsec.utilcmd.txt_cmd module

    + title="next chapter">txt_cmd module

    - +
    @@ -200,20 +153,20 @@

    Navigation

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  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
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  • chipsec.utilcmd.tpm_cmd module
    • +
  • utilcmd package »
    • +
  • tpm_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.txt_cmd.html b/modules/chipsec.utilcmd.txt_cmd.html index ff354ec5..283e0d1e 100644 --- a/modules/chipsec.utilcmd.txt_cmd.html +++ b/modules/chipsec.utilcmd.txt_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.txt_cmd module — CHIPSEC documentation - - + + + txt_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.txt_cmd module

    +
    +

    txt_cmd module

    Command-line utility providing access to Intel TXT (Trusted Execution Technology) registers

    Usage:
    >>> chipsec_util txt dump
@@ -57,45 +56,7 @@ 
    Navigation
    -
    -
    -class TXTCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
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    -run()[source]
    -
    - -
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    -txt_dump()[source]
    -
    - -
    -
    -txt_state()[source]
    -

    Dump Intel TXT state

    -

    This is similar to command “txt-stat” from Trusted Boot project -https://sourceforge.net/p/tboot/code/ci/v2.0.0/tree/utils/txt-stat.c -which was documented on -https://www.intel.com/content/dam/www/public/us/en/documents/guides/dell-one-stop-txt-activation-guide.pdf -and it is also similar to command “sl-stat” from TrenchBoot project -https://github.com/TrenchBoot/sltools/blob/842cfd041b7454727b363b72b6d4dcca9c00daca/sl-stat/sl-stat.c

    -
    - -
    - -
    +
    @@ -149,12 +110,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.tpm_cmd module

    + title="previous chapter">tpm_cmd module

    Next topic

    chipsec.utilcmd.ucode_cmd module

    + title="next chapter">ucode_cmd module

    - +
    @@ -180,20 +141,20 @@

    Navigation

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  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.txt_cmd module
    • +
  • utilcmd package »
    • +
  • txt_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.ucode_cmd.html b/modules/chipsec.utilcmd.ucode_cmd.html index 9ad851f1..9827b6fe 100644 --- a/modules/chipsec.utilcmd.ucode_cmd.html +++ b/modules/chipsec.utilcmd.ucode_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.ucode_cmd module — CHIPSEC documentation - - + + + ucode_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.ucode_cmd module

    +
    +

    ucode_cmd module

    >>> chipsec_util ucode id|load|decode [ucode_update_file (in .PDB or .BIN format)] [cpu_id]
    @@ -58,38 +57,7 @@

    Navigation

    >>> chipsec_util ucode decode ucode.pdb
    -
    -
    -class UCodeCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
    -
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    -
    -requirements() → chipsec.command.toLoad[source]
    -
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    -ucode_decode()[source]
    -
    - -
    -
    -ucode_id()[source]
    -
    - -
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    -ucode_load()[source]
    -
    - -
    - -
    +
    @@ -143,12 +111,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.txt_cmd module

    + title="previous chapter">txt_cmd module

    Next topic

    chipsec.utilcmd.uefi_cmd module

    + title="next chapter">uefi_cmd module

    - +
    @@ -174,20 +142,20 @@

    Navigation

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  • Architecture Overview »
    • -
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    • +
  • utilcmd package »
    • +
  • ucode_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.uefi_cmd.html b/modules/chipsec.utilcmd.uefi_cmd.html index 280c6201..baeb7bc6 100644 --- a/modules/chipsec.utilcmd.uefi_cmd.html +++ b/modules/chipsec.utilcmd.uefi_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.uefi_cmd module — CHIPSEC documentation - - + + + uefi_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.uefi_cmd module

    +
    +

    uefi_cmd module

    The uefi command provides access to UEFI variables, both on the live system and in a SPI flash image file.

    >>> chipsec_util uefi types
 >>> chipsec_util uefi var-list
@@ -80,108 +79,7 @@ 
    Navigation
    
 >>> chipsec_util uefi replace  AAAAAAAA-BBBB-CCCC-DDDD-EEEEEEEEEEEE bios.bin new_bios.bin mydriver.efi
    -
    -
    -class UEFICommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
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    -assemble()[source]
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    -decode()[source]
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    -replace()[source]
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    -s3bootscript()[source]
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    -tables()[source]
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    -var_write()[source]
    -
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    - -
    +
    @@ -235,12 +133,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.ucode_cmd module

    + title="previous chapter">ucode_cmd module

    Next topic

    chipsec.utilcmd.vmem_cmd module

    + title="next chapter">vmem_cmd module

    - +
    @@ -266,20 +164,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
    • -
  • chipsec.utilcmd package »
    • -
  • chipsec.utilcmd.uefi_cmd module
    • +
  • utilcmd package »
    • +
  • uefi_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.vmem_cmd.html b/modules/chipsec.utilcmd.vmem_cmd.html index 548d5034..262b6325 100644 --- a/modules/chipsec.utilcmd.vmem_cmd.html +++ b/modules/chipsec.utilcmd.vmem_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.vmem_cmd module — CHIPSEC documentation - - + + + vmem_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,11 +46,11 @@

    Navigation

    -
    -

    chipsec.utilcmd.vmem_cmd module

    +
    +

    vmem_cmd module

    The vmem command provides direct access to read and write virtual memory.

    >>> chipsec_util vmem <op> <physical_address> <length> [value|buffer_file]
->>>
+>>>
 >>> <physical_address> : 64-bit physical address
 >>> <op>               : read|readval|write|writeval|allocate|pagedump|search|getphys
 >>> <length>           : byte|word|dword or length of the buffer from <buffer_file>
@@ -71,63 +70,7 @@ 
    Navigation
    
 >>> chipsec_util vmem getphys  0xFED00000
    -
    -
    -class VMemCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
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    -set_up() → None[source]
    -
    - -
    -
    -vmem_allocate()[source]
    -
    - -
    -
    -vmem_getphys()[source]
    -
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    -vmem_read()[source]
    -
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    -vmem_readval()[source]
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    -vmem_write()[source]
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    -vmem_writeval()[source]
    -
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    +
    @@ -181,12 +124,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.uefi_cmd module

    + title="previous chapter">uefi_cmd module

    Next topic

    chipsec.utilcmd.vmm_cmd module

    + title="next chapter">vmm_cmd module

    - +
    @@ -212,20 +155,20 @@

    Navigation

    modules |
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  • - previous |
  • CHIPSEC documentation »
  • Architecture Overview »
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  • chipsec.utilcmd package »
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    • +
  • utilcmd package »
    • +
  • vmem_cmd module
    • \ No newline at end of file diff --git a/modules/chipsec.utilcmd.vmm_cmd.html b/modules/chipsec.utilcmd.vmm_cmd.html index 14104f7b..32953e00 100644 --- a/modules/chipsec.utilcmd.vmm_cmd.html +++ b/modules/chipsec.utilcmd.vmm_cmd.html @@ -1,24 +1,23 @@ - - + - - chipsec.utilcmd.vmm_cmd module — CHIPSEC documentation - - + + + vmm_cmd module — CHIPSEC documentation + + - - - - + + + - + - - + + @@ -47,8 +46,8 @@

    Navigation

    -
    -

    chipsec.utilcmd.vmm_cmd module

    +
    +

    vmm_cmd module

    >>> chipsec_util vmm hypercall <rax> <rbx> <rcx> <rdx> <rdi> <rsi> [r8] [r9] [r10] [r11]
 >>> chipsec_util vmm hypercall <eax> <ebx> <ecx> <edx> <edi> <esi>
 >>> chipsec_util vmm pt|ept <ept_pointer>
@@ -62,43 +61,7 @@ 
    Navigation
    
 >>> chipsec_util vmm virtio 0:6.0
    -
    -
    -class VMMCommand(argv, cs=None)[source]
    -

    Bases: chipsec.command.BaseCommand

    -
    -
    -parse_arguments() → None[source]
    -
    - -
    -
    -requirements() → chipsec.command.toLoad[source]
    -
    - -
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    -run()[source]
    -
    - -
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    -vmm_hypercall()[source]
    -
    - -
    -
    -vmm_pt()[source]
    -
    - -
    -
    -vmm_virtio()[source]
    -
    - -
    - -
    +
    @@ -152,12 +115,12 @@

    Table of Contents

    Previous topic

    chipsec.utilcmd.vmem_cmd module

    + title="previous chapter">vmem_cmd module

    Next topic

    chipsec.hal package

    + title="next chapter">hal package

    - +
    @@ -183,20 +146,20 @@

    Navigation

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  • Architecture Overview »
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  • chipsec.utilcmd package »
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    • +
  • utilcmd package »
    • +
  • vmm_cmd module
    • \ No newline at end of file diff --git a/objects.inv b/objects.inv index 5a94134850df3674a2266a59a8dc6dd8b6589f01..b5b2bf01f48f11bb5fac8b680664c91de0467d55 100644 GIT binary patch delta 5150 zcmV+(6yfXieB>yQb$_j$S&!q$v4!93R|MdB@O`M7u3l!^hGD?dZNm-Nn1&1Efu975 zq$IjXk(Y}~uQpQi6u`e z8NxoQ0Z6Z6IDbXa0i0eH4ysj zJzRKJl}GKNtP6~2)jYRJqdGoeRILp%FIn9pdt{>vvkHJy1Q=;vrOf_nkT8S?b%uw- zCN;-RxPOa^Q3jCIAAFEr0Y_&)!=nr!sXzEQy#kJ&XXoyUPzNDI(|_aRT@*ns=SW?B z!h9_kkdaHPjUtIlo*tw4b;q6|hAKsV)BlBQXbZr(pUbnrYEpCDvcaiV%Q0WFb5g!E z2+~M5iFvlKqxv<7G8&HYpbjBfo5pQdrx4IBV1McRjJZN~g)A*D&uv}i5YT8@W|CgA z7@Kn~Wr^yF7UC%(OY4uyCAg}!lqU{v?SL(OwSwiBRokDAVXNI}S!SIcv!(@yYsCPy z--yrbsr6FMlAE^fFWj+ZV6+Ici(8nfv@ElItx}9QC^vbgDo8TZ9OGf1yg-~@$Fp8r zjDPjovMk_&$CrY{2lWlc?s;D)yM1>!FdI2jEAniLOzhRyh&VYGLanURkv3`h#uP?{gEWpIa;OY^weYq)vC2w^GNc z67@^ceRoXH>fViL{@gm$D~sN}jSokOjejXY9g1{U9FDt!JL+wh;Z6l`A9AZm;KH79 zt(TwXbx&r5CyC{y+Mz-yaReus6 zb=O4dqG}`_hor3J^P;OHKGI#JtwBB58w)FX3Hw2>zTxhWI)aP6X7wWP=AGK@>04-G zW4D-fJvG?1Pp@NH*<}y0dL7GZ&KRrLv8=W%b8L$rlo$^_ogURV_o2zo&!;j^g$A|^ zbm~tP(>iL?U7I%TE=vS%^HR`Jcz^0KFA}>vwCQa|ExHWRQ-D#8b06yR*!3sDMON;( zAKGxm0#|ixuUe^{sRDiAo%bXcko(i&s%xV*1HU|3t(5pR@ATeQU94n>SE=c&T;v=_ z=iOc%H`7FH>(q)pvm!dCH#rWK5p05u8|KND z-spJ4)-f-aIXAE8_S9dk+_3(}(pwy#_sOk}eW}dx!v64YyX*$1+t%S&DslXl&F02! zCM$0+(?tT8qN#7$Q`$0tQ-2j_=`B`coz$zmq;(!uH+#DE0`JSdybA49iO^yAYZup1 zbJ|5!7PG(B$1#$Tq~}t4wlLHPJg%wqgrTpH@ozimO@%_YTMv6)?X8|Sd>R(@Lhox6 zJ%0RngQ+eA-CmkPa#gM5n`Gn>G46>l_02%ceJZVJlhUBNTcPMc~P@`tK>dO^BV(INB=#9b|BfD}UHFteB?`kLcmtQ4Wx60k(#i{kc2LG+LHfr})}3T9&CFq=T`O z93giiFu1nVjboTvB_J~sFf)`XIsiF(maQHjL%BxFGq3pBlhLxwPIS`H!RHM6Autqc z#4Pn9*^OV&{rIJjKsT8Eg1K+n*M72kZBONynl|};9_`bd?tdR?_|bc|@6;WW?-yE4 z`;NZq%76Bk3%%}6pHO!7aG&M=kg4AVdDJAmqAC&>lPCU5HvS0cJM!M5;Vs2( zqqy~XO&iq%NxkJ%tI50YEDWHejKP_m&#F5oe{!B+q}p<~}+n z_n+(RqAo-?EY{W9?&l{m?@|9AnfE-iujVPq`_HLbo|(V8!%A)P_q1Q#Nkjd6WHmHu zJhP{$sQQgX&-DE#^=rrtv!zm->DSFin1-ha+O$xQdVi*CPQUaY?Y??=gqX2%rP}Kc z=aSm2&C@@6=zn&(y79ly@_t>WdZ~Z<>zA)jfBs~~ySc7_QnTgh7pKjmd^zW3l&pQG zKb!aLhuThC$lWnLt6NN0zu3O24Zo=W-c2$yct>G}^!V`j?%_=@?cMWy_-K6pMNj-~ zc=pgM-+vHkq}G3NM61|ev-9Ua{f*;ll?E&MujbJ&1V0FQ{`hM8~vW6n~EHA6hp7r}xM(?$q7<<)&A?-rG0K zE<}Hv^+veXhw0;+k3YCea7(lJ;BE?|B!9RTIRrIY4euuc)Jj0DTxu1fUd}jGYYp{s z-lnQYc~Gj+YHB|bqFx2mt4qBGsIM(f)mlS+ZMUiM0bg52tEv4&fO^8mYP5!W3XQc8 zjDNLo$6AEOs()7jgGaex57XQD=c*{Aw6FR(`JG=uN@=EHVD?FFHVtq=nPr39d8K3vR`yg^L`pKhzfpHM7llSv= z@}65Kz2GFZI4wL*tch^NzhAES_xy_gAf1^Hi<$Yr&ddk#%zRkR%m;pEez;!0ihpcu z!Q`S|VNIT-CQl2Kr?AP7vW@u1**5$mvk8Bc;Xlss9~pf7!yB1_Eto9SE1b!r)Z}qt z^2nOJeIqo{1+K~4Hvy9(-evFKzc~oz#VavJ<7?Yi|6k+hwMMJq{lqr4e#Xxbj8;?o zi2zk_`CPk~&voeXxj7{GZpex?SAR_fz=DO)xC@~PErjOzDxh9nYG5-^4~fClvvX40 zPi#}$V~!t3tXOl^R1n-rz?}yUoZJsxC2_J<8?>4Xu&?;ZxX~K!HE=TiBDmaraW8jY zHZFJVFWVTP`{Onme+?JK&(SfxLz|_eCW{8^Wy)$uIvG@ZOTqV_x6pkj@{WA(Ab=v2KDxcye{nk)NRsE zZf(F~Xxh%O$DZvps6(`>V`1j`RZ`k8DoX&Ed1REdJ^(adjS`{DLlg)d&1M84$*XTc#b#qh9^@IWY#>ewzS~tFx}!A zn$s+vOht$pv%6T^{*#n8j7s(Z%yf?@tq%cBA9)Vxw2>!U6Tq65@_!7~=_pU8BFyX% zWH%ARn~mx+&*4myc~aUSD&tX^MP&@i?K#g==Pl=HMqs?AF7$wv--Mq0dd6sY^d0aR zpLwUTDnM2(>KUl*P_Itp8I;?po~OLE zGQIH;8>clsxwQcc+bW;IyPfjM)`YMHk1Q;%*hcAYy&=-notJEH->qw`MIU{hJ8Pp) zPH}L^LsxwsZ=32<61p~A>#mQn{pR{Km4^q@GC%loI@qya<~eKF zPYy`nzUbdC9K>q-ep+I~Lvot>^Zv7*{^S&gUB(vwyocA}pT@#4|7H18PN3UAjVS@) zZPeD7f8kkKt$*{J!!u`-2LeuR@BocT1sk)onnD1;7a;`X5yGR_sRV$_7)n4x1w*yz z1OV6#Cm>tL;7w2gKzDKq$W$@xp*ti%9y>w~U(j$=6I}pso#X;CRUF$3F+eO983yDt z7(<(C09d)924w3P{1|Wm@V$Hk8Y@|cG3)^H@UjlbsefjCZ1e$O;wB%Et>f`S3Ic{7 zLlDT;F?bz_0Klg_1kyDd;9~h0MkpA8#w3M}J*JzI05EMx0u8AO9P_n>m?kWNhI9pn z$zMsYgeH*f%m%@i0SdU=YJLJOfZ>(92vrdJ+e`%-0Rq3ak=jiMHC-++d#R*mCTf9f zIcBC}7k_Xgo4P=%3^WMeW7`N{7;d+L8>N@RAhYs97-)pRbLJ;9$h;SU4CKM^F*peg zvJuPz8pr`*?p|I4?!Aa>AP5&+y$A}L5TIrFyWfpG3Tn2$1`g#?h@AXb3i3d>x5}xI+1i*2vgN2* zU5lJ*d)rYJf*v}$Lf|qbSCA=2oyHIgiJO;UK@J3W9U?7co@1iLcneqHXW}hnj!wD- zIe!q`Rk&02vMy)@V1C@q$F1B8eIF9siLNGK2u;@lFlf%i=h+X%5RPS$i9sHX8HEbT zKrW|EMg|R`8q9)LVHp6^W@XS2uE8)>Xa>NvnHe;MY%ok6o&iv&>5e0U~B0cxA>ay4Qj!K4W9M* z5gfxw4>(85EDn*~N)!jpc<6kN=^UZ~xZxaR36Ldvu$kp_V8@#E#15I;EU<$d5Ilp6 z{0`X=*5W&8juZ^Wjr0(XWS;0j9!xj}9r1C)2&RM&azMDd7x*FbU*vs|2ZP3Nk$>z? zyr0rw8@v+)BC=Wex*DAyHxfkV=_i7a!-2h>fDn=QEFXj%4(xrp2v?=~DVmBIfmh~~ z8Y1;_+NYC22xiS`q%NLGuZ=oQpquRF+tq582>C$CP^NSd=`j3o5t=}9dlfZuo4rjM zp$R0hzi__^XJSX_68e!i6F_p4?SHh+ClGG`4cp!SY@;*rBqDbworFw1>^BCLh#b9~ z5*it>>l9idvh_1dXrjoBy#y2a02Tozw4}lV8e&aEV;ECSNJpZ;$CJ%`6S@6Xya}!0 z@ntc@p2$Wsrk;?lhRsy|iO9;vpU{w;0xxwZ2Ssf6Eyr;`5k)?y-+Uxr#($&SK8SDL ztvY!r;!!wpDP$Os?~t4VyN$sqG}LW40FQvLK4ZRt8^crrJTFUy#)=K14OR&N-CPwK zgIG2`P>YZi0PJO~&{!EBu@|@kn9TE5$gStBZ2k)3+&v1O^;xiC0Ipoe0Ysjr@jZOm+@G9;k;KU(S&gd+B$E8*yRA$T z`#}1A;^mO68f+wy^l&DN#0ef?5(!L(jTcN%cjxnFxPlHy_=k~vvQGf&VVRf5L=NYn z`YFuAd3ydyzyDQTWO~6p?y6iS`iyx#elWNERX>N99Zgg*Qc_4OWa&u{KZXhxWBOp+6Z)#;@bUGkINJ&sr zMMDZBAXa5^b7^mGIv@%oAXI2&AaZ4GVQFq;WpW^IW*~HEX>%ZEX>4U6X>%ZBZ*6dL zWpi_7WFU2OX>MmAdTeQ8E(&3n%>@tjg62c*{NyE zQcJS4YF`i(3CWxkFHMkgxCE))%1P(yl;lG9{qyE6(?gpus zF`BWP^!-1hBq;Xu<}Wwu7xriWJlx)DQcIW^@;_ys8o%q8EEF-zHf!jkk&8+OUr5 zwLUxp_fjJ^s8uCVrm_w0@dbAMjajRP`@{zer&-g~7X-cH zQ7oW2_46=^J1b^ktn${1eM-&hBTGqEq-m1nG^h$m=L~1kr9+~xjjw2Ji+}wqjN7ZD zGR)QbsQR8iWEAG%fijTXDL6uTu<;nLT&us^D!^+T6ktGqym|%8TNBp~DJpU=r#*n; zA|evTOCIZim(e(&SuY@79-MH(oNPn74_x?Lr7d5_yqcgpnvqRX#DSNElsSDKmw9t! zK8#%Gz9pFpZ{1}{k-E}#SOqG5=QZCy9VL6l zyCF$*e9gO4cbElrit~(MLfdzcR!Z1mGL?WHQYb4Me%4b+2+OzGK8bfk{q67>?QY3(>=0dz(Ggc_>tI$%6cM{?C?PP(&#azmdE$^Qvz^HMe0LkmYK;u%adg za4Z|xl;o9&rmKh19k0e~vd#EA?|wL5Ta#T`)RN;)F4FXroGJxu86C2EcBP`n7u(4( zHALgW7c%PED+FXcynCFGuan_;vg}qdspn*%in0u=tuL!^CsQFdHq>FVYP21cq6X?@ zxR{Q}!*nzvqs6nMM>s;rc)D6Ir+3fm`O-OSwwgL;EGKm#}l{Ix%kg9V&$CiD1Q#eL=wC@@eMQ2Oodj_QK)%((guY6K(N0T;I=^ zvk%@rnylPnmvfF-&6g_I`eLp6gegaHMH|nCOEP>KkKF>+tEE%Gc=^@s6O8F0^y$h^ zQtFhm{JI*t10j!rVE?BMx$qGL&GD<3j#ipQuIA~(tO_pn` zsUZYi8LD(AS(apXV#%5-!UK&ZWD@7v8LtkQm0E1DeovjH)jEu9Yd_d_m%MPz)+Py@K6(+wOrXPCPL6jrXF>j zriDwtIm%CC^$O;XA*$|oyPRs!)LNDb!PCI3r_zSx2`Ox6vLrcho`<2`9v|0}38G!% zhF1PMv0NU7;2`q&*D<~G;_q@kC9`j|i)=gT4rgVj-I2IEZ5K7kNuD?V9Mm8u{RjT5 zv$T1dO;=S{#2F*W!>zOAS&XKZEuXDMcFVsIbWt`>x{ECN;Zl2?$SnoRRqTSE?x%KB zTL=!e`+~iG4dYxCephA>#EQpkPrUQVejQ5FLmZWEZT$#n|ZOfqY;hssrA;` za=5y;T3-l37k*gHn%gs!3yMVq;(v1R_F-V(U`GkDww(}8YL3;y@|>FxbY-Z+w(Uv& zDT$w_V^`|drJpDFE>>=wWCx>!zmkjXwyM`4i`Psz)$YMfv31bHt$`eP=eO0&Zh04i zgVB68BX`gD_md@g;;sM5m@L*yF(0~~jMmfnllAP7*!$`4oK%Ca+;CQZ@JE`F?T1qE+pKL50X`xO=sywol%y zh{^SX;!k__og{4;`Idz_wQOZgv!j`5q4(RgXm?xwJzy>1QRYhgf&WVV?_@PwE>HV` z^^XQqJw%ZOsk8_!SR{);%DXW2Wu{gYiMQW(SCvbuXUpNtn$*&sl1EBY~v{8hX-958r~{Og){ezm8+o0@vNW!;6!7f?5)vNF}Yd%{5X_TeE$ zX)zrG-awUDiweA&hlt6&B;3Ve{j3&I>T45A{MV9F{J)8I!C9qoF|zU>?U5QloiO-e zLk4hm7fMMS{3G@N1~w!!F9y_R?LuW)IfG)mzD_7c*d5#YmOxX#6)v(tEn|{CA7uM_24FHye(ZmZa9}nLRb0Y%2NI z6YGK&^SZ8TGn<7T3;$&!m$yHN$J^y{EqM@mM84EyrPy7ZH*EvCy@AkJG?oJ^k~Xze zridKxE+)VO zfQQnQ0}*06zteBhsfo3yRK_uv zFZ0tjgB=s72I(Sxx|E`=h{#Z_MMQ;oZhm?^cSZf1jW#Y zm^2M+35uV_MNsx1RfVi#3rGky07AfetBl~`-)pwvJu z8Hl24yb<5?Uyp51-tJ(@z5vy&5Qf}S!&|r65g>6^v_%1#%|`bRxYjdV+N5m`Rj+2U zczUGXCftWPc1Pxm(R@51qWuEx;&mr|TTa!yqGQyuuV-5J^+=P|ayaYhsT8ZH2jdk`KTpL$ zJw1}FRr`4;iR$UGmXp4!3PE!7P-4D_4D%$iTB{ya2hUH_H5rPZ?o3yZyFMW04jh+= zhx^}MBNn6S#5qH)B5;XV4c9~Gj2<3CtyFM{cwXJPLHwgA&lIs+bx2ud`d62hSBRl= z#%$&sv79|SXRPMdiUZr-70ia~NFm-KA?gF!eG`3eeOJp+9JVqOpi14fzbv;mtI?-Hh9p=}Sa*)dmrN@Bp~#1|kC5-l`Rv+OTG7%NjXp zGp5YX!Zc4Z0z3UwD=QE6iX4p__z66RU4w4*e&ru1k{N$lm77uNep0k}yC ztf{t&+EP_jGqaGRWu4PSD)n}{E3;3*TC1Egh);go(*xaqT%gld4b{~VvNC@}>p}bY zT>yuWw_3yup)*Rz$R^ySkoQIh1oVC}Q-m4>rl6BgO&PN2NCeru_mDGcy)R;=SvOGN zT0hMl6QccZjtQ2Y;5boXyPCQrY`LPkh_GFWT!UDxMlM1kFRdPh{PN%sR5}###5RxD zbYp>{{pgw*BfN!KzcGp8a(Hpy}wvaG7GQ*1jxnt;#+%B`qYk z`b8cD6@^SKCbwy(YTJ8p5{n~ktSfIrx(}?X?i1Mq!7QrB$g9>H=)@C@?6JWX+AAX` zVFv}UChq9PQ2xTa19h06%!LzHCv|wfUoMxlRMMNmGX41{R!x5k^H*}qGgLJ!^X5JS zThDQwV)vmkE-!Aow*43vbY*>Zh1dN-Y(GHVaNac}_8KmA<)G}E*jJ`MQc>#&ab{m# zHWtgZ+AQ^a>IT8x9C!eak-SVCF#sS=q_fxm|A=wv>!Q(H`;+%iAQ!ZQD2LpBr}l$p z*;?Rlubg+RY>xSS1gUXX>QLNz8{#s>QDfpFEOVJ&;=?lIyHWg5KkDpdaX`B+%}ZPLRe$M0w+t zmZt(So031WB(fkVPiqmG+FeS{%uUBHfLjVcTIEqnJcF4X!B<{D#mT0SOJTKwh=ZB5 zTJp?xOSy1bY_8lGG?}Yam313vV*yMGwwC~=Wk*U)7TS5l@=QvbhIQAf+{?JiwN>@k z%69BUBF#w<1_!m1ReOr3SnvOZ?M0+n~_`g#0$6)SbGRwh0qxw-O<&8qluHK2rx) zk)060nzIw*pFJ?FBUm|lunBXkx(Dwz^{gtEhhn*M%X4}AetCgm-!U&hx--xPhGE7s5&E3d<48!0Isc?7h+QnN632{nPqj=kFYG7d2f!)<*H)r zeGeHz11pnT@`FsC*2_Q0Vm^IZTk{R_t1DsoWBPPI=eGaFp6qJ9d>*ZV4P%6?y5P)` zy#=T?D72M9A??%eC8&wDs0@OTrF-w4$iHCIt3c)QfEOkFnlLpSngFB+ zK%HBLR{uJ>f3T$*vQiW}c!AaZkk-yP@C&to%J3l$j38{D2dv1BPGR4j5hEZd#qLRv z>aTR*VcP31{{3p9z0%<*b0z*jwJh{cqu0qP;6`b^ju^D&e~>JRx~uUzXS^KF#&Tq0 z4H+keNX}$DJ8~hLj7BzO_|FA!S)Eo5QFVZ%fF(w!g(=W5Ejxyh@p##_APS9J8zR5j z5c#dM$a3;BU6r@jYDNQFwSvrxs?k+3(IH1dyNap^w)8?kWgcoO^N=UnRG;YKRU1V7 z!72^K{;?!xkd3xlIkg`1)ysl6FQbIfe-x9!=-#Clf<&9JDd6M)Ntf^YjM#-m7hIU037PN#n(+X?oRy>sn#;pq0sySMA5wn|y`>Fk~vr zH*)i_+|g=9-abUF{c-$I|4sQDg@geE<^M6XHv3N@>n}r1oBX3bOn5NnJ*3eD*ibiQ z%!W_T_ruZpd8vl-Es+Yk1$BC4Ky9MSK$H7vb67=}=qG8I=HPz%2u^Lh_=_{?)nv3T zJJK%o$>evN$s_m+c5Z;Egq5dNEd zcal7#)Lu%Q#JLFFI}#Qm&J4G!>nBkvH@SpSxl6~6uIjeP-%%|WsCH>JQ$q;HOTR4v z#7O!nFYO5nO<^jx+sph{d%`?wxP5n%+^ShplWw+b?Lg!vPy6oOkd-D^OTI1X%Y1ZT zc##HTX}>k$Jk>Ahdi@OL`gfv^1ccwNwLc`qGN+lil$lq3g7CqGUN)E#^1o8B+Cq$~&w zQZj47b%nGZRICjM;`_fb-mtY#oHpzVI@2Qu$(dXUovLxBpjt|w4lzr{g z&)kXgf|BKh#Z)2mK;xX38;Cz11M9r;6p(kG?!zn+Gh%o9WCJKXA0Vyj3qN~Ib_>y1 z$s9@#V#t0@Bw#gKu4gYaV}Q;5Na?k|yQP+J~^Q>cEJY);w|u4@v&iytbh1PjozDg#Zi|4}41vn2j3 zwZ9&l7MLdu?r!kP%Gn=%pG(;%@|P!d>ms93=*mZFoFV zST_g<(F-W=CsHCd%pbfg1hu+Bx+0H-D)1BqlxAfqQ{D4&QA}rjxj#eb-z7=DqM6*N z2t2_Vr9Y~l@Z>tloKNCUT){S(5!qHr!p*Y?KvQ@t(9^9_6f_ zbyMXHnT--@MOIegeaPCaKd$M6CdMHE=E5^RiaN0Q{u^i+v_`HRXFu}`-TS>=^;j<) zpP%JPM!O4FXRww#(JToT`Kw*kFyOrjF`zEe;OS*KoORb!!|0YXs$4Q~th_p^se{S4 zVWTkF&}4Fdj^(G9BO2v`E?r}^46ALER^eoeXFgw()nq9a8?4BBc&BE;b*OR@hEn5ii7hv(_omG<)aX+51ePoHuNr+abC?g2DN z5nw~#Xz`cH)0q2^n4_@TKFb@S};zh`m(#oF^~5%0^{c1@SEJ>0u~s{=t>z4u7oAG^_JUn9+)=((t*d7mPgjfKdi1rt z@e?|LVAF*1j#hQi=;zw;*(S^;v!5d^gdv}8gE(SQwGMucG^yG1*`};!ch4)a>TdM> zxpu6FkB^_oUr&~^>C>>!G$51U`zVQ0FLzv3pFrm|)zkfaIa4j>Pk8W)wZ&rIrzf-+ zb1J5{pHgoCP5XJQQjOaFESZfbu8R&wTyN>z_WP_qN$I_4$-M7kd&!DVs68&3Q7@c7 znK_?Qjp>Z~x$NmJ%U0rSmU&7u&_xuMFoU~qcT2KZ&PS8gii~)ptH);?d=~c~&(qQ0 zrStbsmEPSaR+jO*$NA{*{Zs$=gh%~0Uyl2QjwaKWN$(H4nmqNN!m4iW-J446r#!54 zfBF^%`Kz<~UaFtH-@Z-9>#yW_`n3M#ukIhN1^?^qr{e$m+o$6HW}hzC_>Zg)_#S2D z(+uzC%W~x1k@X5QlFfth`}Zv{t!b?eLUNpct1Yh-%plgHT{1R=QxF0&*x+{ zbJE;u@<#I+Z{5wNtI3#*hwGtp-g2a-N?n804*7mq;tfB)C(upe7ErUvcKAY$K-MN^zb}%WIb`7sE>1A zN%oR`((lRWD^E%HRsR!j3f#}1pLzkwms%g7p5B{Jb21w)7SpGPK1h93hfnk4=1144 z`SV)T@*FpRUh=k;YaVX`tmmWoV?Tv>H5ongF54gEWjcQxu6w9~SI@GA>Ke1Y@9Tvr zR%~%6agBL?T0Jioz4Reo=8w;_32%=sm(Pp-c=yll+t_M+LX@$|$iL zbHZqDTUM-A{&jP_q|&x@eDE^psk|uhM4XJkQZM)I4gn?dA}nzOT6rswO=WR`PMWAI z4{hqo}@-F4y!QK<5b5`#*lUb))^`KmPK+-6=aw@(SQA-7A3Q#FyvIg^1loRRqwM zqhnyPJ#f^dLEfxQ7?yH61yD5DH@vB!ZfgZ?jp&H39p?9$aIxn+sjdY71=C4!W5R8Z zCS*x2&YJ+;3TO#gHXO<6>H8+jqZpmgw+C1qu|4Rk1|DWCclfSOcV$3ov`YJ$s3>aH zgpIa-0g1g>lbX%P&lW9Has%Jn`{dPQufTot811UdZAY|rYO$3BDD^B_d4Cv*`)ybe z{qk2^9(mIIn?1>uT?iz~)ZFjL5}w)@t2*ATFV@k``T)KlCRDqlZu?~QosOpp zs5hXi2dtmUuv!n{Co*6l^|iZB>Zp%^^F5OyA;**Z;q&9#NjkzTn2i6f*0VXW;kj{` z2jbKdbI58vUskB&f?IjFg(ci&l8Xk$Rno0>l%G*Ce#L%09pp!7oM-Q3Q*5{JE&zsE zp1a1Gth}SL9|{TRwkHw|zWc|W{Gu7BG4{)p+ zk$rFo3!`*T`@mK0)jl}KCWvcTS-1Cqx$TS7XWE_GroF)2J=oKWJi?Q>^YI#?mj`jw z@2?>o)^l})+bXUixvL0jgxekveK?ovlHcGsdYmw5Hm`s;pW!)dlw=w8bN(={80C^0 zm#xLqm3;c4Vii_DP+W%d#mp9o#PV6b*471VsOseg-hQ9>M0`pUlxuod?Qx&+8`()$FE%{$;m zn9h{oEy)7+7$=m2cbj_FRn-mgF0=ZK;3lunF>W&ZoMQnK0qV9$Q?K#wUuN3-Fpn}< z;+I#rEY>9Tb`*Lyj8^rPzlt-z+)ZFf>aV}awdZj_1G4o1%f(RA4iv)!C0@2;c4Z^! zmt^BH8gy3<?fEz2vH|Mdrc9PNCttgRe*VtNC$R9U?1dL|Bog@@9qh?CC&JEvxkPo$23H9WZ{X zJ&nDKx||?zCaC|uEWYu0bJLH z<%`30by#AU>*R7>A(j-oHDaKSbI=V$@L;+T2oZ$;gAZ;rBB0a<Q2No2D{Tt#)`UA(PKImkV&!!4_0-0AT5ruJqoJ~H zNaUDVS6JT-C)R7j2|S$E6$2Yr>qg$AdR zy`^MtwLX3r(1a%n*J&uPZOIgdLAN1fWRM5bjR%S#{2zR@u@M2KKA3Dn@Mz-&3|t>S z+Sm<;A8qW$1CKU##DGT|yK&$HfHpYjwn;ZAdQ7ex4m&1iiI(@1m?mR#c8O$Lz(#hu zV=*n-?lhC3!0uG^P@n}QW+<>54mA|m4P`bI*pX>66xa=k9SZD7GaCxD2gMEr+9RWf z0=uD8@Alxi#~{W5Er1Z6LJKrZpU?)5^_7f>9-$3dZ%s9$almd!2@g9A z2xIV%EXwg`0T3FYfe9vn21^2K1beRXApL$QBqiPh<akYv>jKo{zVus}Hf?5BGj2NW1%l(8dsL^b#EjV)C)*klrUfJxEI-%fcR(n9$ zgsUxH5r1-f1U&a^3y7How#)p4w-A12*fN=YLOOrKiwHk&+=YytKSr`*FAonCJm0H= zgJycmpr_dYguaY~rVK`l=jj+alYEYXGYHGG!q0m|4XF16Ghb!}x#=J2_m2$RBKLIX z`R}5l!j^(lOiWRz#d?&#E)*Hzs2{-w#8WrHPvUI|ub?fOaC$@ZZNq}U`dM#@E@|bV zyu1+`BgR`SvBP-ZKl1db$g!mZhHZw_ivjeB!&OKzOogIti)lRaibXgwHrkQ4m} zFWmopma*(7wM^8UKci`8YqOl2WwdguKdbVeD-(@ZEA(O+dN{rpt2SZ6Fo)IlXPNO@ zwqC3=TW00lH2hj9=O&?6N;$Wt!&(;iwiz!qac-K?LKOE_sjCRNacLOuej>X%ET8Gs zIHSciy;^9t^v1b~*o8U$7=)cL?Z+zgY-&$tv7asbu=B7zS@qNPip&=iIXBH@sZkF` z{jB{W_EYwYaEq9FFbA>3$+jsAC;lsVF8Ct>Dvh7DG$!FEB8^et$vkrc zcz(_p0iSZ~h(NdhjCtsp6k`&0a-=&bcb6g^67OhpX5c4HtqaNR(dE?Gws>ml6` z-KLJ9KH3;YLyg8XkV7JZ#s202_%j27m|Gj0u?WvW}2GYEb;BR#z13 zBkB66MDfE(093-@BPLZ?-FV3{+?;{ON}AdbQPmr&RwkCiOQ6=TAxj)7SR2K1L<#8D zEB3j2kZXYd7B~_Q840|-JMrqeF(=}uLyVosN1mTBck*vx{5O(hWG9E(GN+&*d2{t7 zvK#B9#;6WeVhH{LOMPq7iK{T0fG}d^~|A zQVSSN6bgPwA=Z;o0;M}CHv9AaA75gakw;m88aEQl); z*k@(|V%Ef!1)tj9HJYrpZw7J}+l2u?LyMPvdNY%~CU4};%VOZ>SO*qBr{rCrVRQBN z$>2$R`)JJUzAO5tz6kN_0i4;uJ~bCU^<9WxT42Kl-VWup{;>;3p7KdtL^R|5sMR~m zX*7usVV1-Zjq?|8Ur;vraogX#4tCRu4JPlwecuy5=iO^&mAVf%nU}q{PR5mCuFktv z-+LMVB&U8}WE3P=kAPAi440#?n2`oV5U#&$)jD+Cd?Tq6GT95 z;>$oAb^c3>@11L26;o#x<;c@d)Um0p{?8Mc>=wlfKL`7V2n+EK8E$+BxAG+1syMc;_z&xf z-)t+22FWkBMT^*~?6I|^^&%Past=X1T9wMbbsB?B@CMT1;q+SXIZW$4*J|-sQdAxs zsFPDcfr$ang_NxWv_TjX$uA9fCVmOP_%z4( zBo7YtM-jAC2m0YrT(4SYeq}u{Q7{0}SC`9H$w3SeyTX{d5r!dq?;@=T%XMpsI$)3< zijihC&v~C8G@acAqjG|To7^>my?R0NW}T82sM4Gk;L^;4@_(npR1kdZdW+tYFonA#$=F7n7TfcpnWw>X4oXRVoev1vtodO zuOYYr-4wfeQvv8_^>|P(YsC2o271{!*92HKiTS%geq1(|FzIa7kiZW=foVK=P+ z`u=qzjOhchP?X0Ax9^zDbz+GcRXGMa9V&2K2hBd)M$^*f!WLwCG&5oMgUEbAm6a+I zxPTlZGTT=q-jRioHN2s@R)Dqa<_G>fuKO@#K&mVcvP!rjQmg|-tF zTRh>gC_HHbW{Q}HMme-goKB!m|o zL2yFpHaVj^lUGT1D0-~Pl-b2EO?U>52*YF<&H=Lw?tMIL1pxb9mVt~`KaTIMB`$GL z5c8}?VbD1YQBMQ%hMJmHF~C`@LZ2|uY_3tD^2e$D<0C;+$^>Sd=_W92)O?H6a-2X7iH7+* zNe(p2!a(je_fl-?b~2`m19bu$xDkSfo%O8ZV4O&Xufq@y1e&HhgB)8iA$nt12WS@; zF+>_T2Z&Tum%9MnLWGC9gbZ802*mGVDI}WpA$}M3C0l?Vdfk+cHWsDqcW zpTi!WGFxHJ&tZ*e$#-WFvSKhdg#9XJ)YO^Z=u%vdj4Hy7h#yVB6y9?SjM3FXVV-zi z?!S^G6@!%c@?zg4_AB|2Nk5T2pPN8ptxC*9lTyyh{4BOCrk`zzd3|Qn5R+;Q#(!n7 zlV^B1ZOs%OHXtn?POHUYm=+IrRVztPn{lq`lwoulgZWA8TD{tkYSECJkeS+1FAffC zKTP(jYRVfS)rEA|o~{gY_35hb?>t6FatcL%y;DQ8U2Gvgu_`tQ=(fD{sJ+pHR~FgA zqmFGJU$ATatU4KTSGIsj1atMb$}5Y-hHkBuf(s=)sawwHe(= zs>s8=AGJ??m0_+{#ntzopN0e~Rs{yD4#Z6!Bi>5jHE3IrzYKsXs}IGsJFPX74T%0y zl8zLa>BP%+g*cg&xkP33pGBBa=Nz%`~GJUfZg$`l_}JH(ESnD%rX^OjdoQy(_#kA#*B!JR;8(AkCf1=SiCElij;Bh*5QA zz`++|9VDP?8wId{oq}u2SS{#S{)#ARA2AsH>WeIiKuKhSb-Gu$p0GNua+I7kA6FdvckDlj1D%YYB#H7e8V`aogB z+%_Q@WU~vf!Wzh(T7gwjA}gA|37m zaDgntYD;7lZn_H)WwN0TlQnWe6OQo1ObFBpO9|@7KOx5ia76) z$0)EdX9*WYzFk}buNM z_{znEf@luw^`odj_Zl$+h|c+eFiq!kyqXVqgn6R@ASP_rb*Rii;b@6 zY=IHYIa|n_dKn3lx42j8fo80{?YM0_5Ed(zDncvyGOV_CufokJW@AJ{9VRPhEQnaN zm&7DbNb2RVmEI;S@e!{&6W;^&woDx7*hziSK0+|@b*p_jF&{;ZH~h`*PRG1 zQ_AGMV8TJa1N4x{-|oo9WAJrw%_#b+su_GX8*O)LLo>YIx;?-(uqO54Rgtn{o#%7%(jjYv*Krjl1mdDruvm=#(Lb(pMCo*Hp#spLu@JOF75pfOLS3_6x-N&&wkOabus zf+^t#bibqt09`$3AsK~_zm#FMMYsyLEVt()%5ejM&^9W}#xU`@IF7MAgTp-xTrN6O z$Tp<=9$2i;iN!L^k^Eoc*>s|r3cz~V-AfjJGG868l- zhMPH|{FSEtaCjwZ6I7r)xBxqFQLWC#4MTijz{O2H*pO!8!KNs<2OAO)19crB5o$!E zD+vDnf{;@9*1a;UzKoRNR*NyFe53)$)S9eW$uQvH%Y+F8S{e+r#YX|nsh_(=Ks%nM z0C*uY1Rx5Ro)996RtPLwVQKXgRkT8osWn-{qJ`%e6fHai^BORb7dH&5EfM6+F$P}3 z%m6flu3RuBfX_WM1^hP+fNLX635aUQ48XR5+ib?vb9w^m_@P>ONPTw<%b#G(f5+8( z`ol!7BTVbSPE3>fup1EE>;Q1`6uu(446F5lD%^T8L*#u!9VR=76B1w~4&`2yrTpDMRMBQ-aukXN&Lye)mEdR$qq8aO>YO2WK_Z zVX|gL%YcI~S|$)^(K65$AAwtwrT~On>IenuNYw&-qUtH+^9XmIYN0=s^Rl>+lbX}e zu4;}_AFK09dqDw@fbNRfC!ReJ-NFY3s=#_Tt^z(!?lEHnO#oDRz(r{U-Is63z_^ha zA&eQ#a^h`s;1<(voDJP3nbQaQPT!eJ{rHf1k#hj?3gBKqLyA%TYlhN(Tmb)UE>qKCY&R z95DO456}(X$AB-mE#3$1j?YWVMpdmL3SCPXauBtLA>n}Duigc;qj~!J&YW|=<*zFQ zx*@v@2eEy<3kF`Fbf(x$HB7w)t+p!LXQ)aGW@=5=u*Sl345}*w2yg_+L|c6H`kvCv z=T((c3a~Y3Dt`#GJWLD`yo>sU%Hom%%UkUBp^Yf;j zy!BluiLYw0#h-s_e*`HMBtGzAKR#;xNrt>a4aFLjBBNjC2bvv1`c~K123CmrS2xvH zf6}DcHO{r}LKJ-^`Q~He~0kFJI}N7drNZ zyYH8=oUgiS{pHXKH(%Y9-`$AXwEV6CtM2vvGL~zH!e(~2hg6W6EKux*e|J-bxjBYu zz*b(Aa%WKw{Y8wyU4xy6R50~Om}cH4-1EGoD%D3{r;F8ORN8wruK-a?&r=_s+#`95l+c_M#Q*L+W+InUw`|b6`#lYQohWZS$)by?j9d3&uNxs zR8&e|GRlg5{^31Th)vNvDQe-CD%?r%^xaLV@h4tDFZf*g{-ye&tUFXWR^IpVh3s#4 zs-@Pf{91x3(M$1D&;QOJq>VA~lZ+B1upZ|sy{W9^&Mi@A`?hgqhz}GM>x$;K_}9Na zyq&HDX{uK7uBBQPDb2!&*JKCEAc#}wi?q7hmFIc&_H7{kbyHb{zxE6wu;-_tPEdq7 zQ&lmqTPeRMC$e3-)X`vNPiwn9uUb}1<0EENfqBM`& zB3{;iEz07*kFq>gizfdk&$rV0Um5OP|ESPH33u8=;X%%|MZ7lI<8=XA^<&5jkdsOq zE73BN3))G$rZ~YwE6W32QWkMr#iOXui}OI2#6{c|ado1uMqCCu7gupx#KmzfI&Bf= zTw2C#QS%7nJ=_BO7c0 z!olXEG>_XR{`$@$8foQKunT}PehWhF*3%JGsB=IWyIsG4$QPH@+g*{R+A5a^xgeYd z?Xsa>HoPPoYGjF6qbsIQlMFzpg}w-@t7*7$(LD(R2EiT!U#6b4G*B^z2H}Ztmr+uo zg_5V*!oh=_Ym0d8vcKF`OHUbqPz!w#R#$815_+I|(x2nnz zA4FBGtNmvcMf7OE`lrB`P<5@=Cm95qae!l}iL#pWVC-_0n;#|i!lmQPMdtzt{ zYJ&=WonERzlAx5*kGNckqccJ?9&;XkPj{aGPIR5AwuoArY7B&7r{8fNb1lB!%rj!U zwQ&-|O*;j?Xh%(}9hxvOvI=?;c+_dfy`4|Xw1>P1t5h^4q>?EA2S4b=cx{G!AY4g; zeYnZI?7hu^GDwqE#k=;jRV1%IZw`Re!(Sve72BU`unF4-AnV~S)1-oi!rNB~ED2S} z%cN38!(w?B#yikMl|e7lDjhwp@N+0m1igxrIvQO5o>CA@2E2??8dpHk`E>b}AWiWq z-ZgixB5i^k8{Sf^4R5L52CfRT!KXQb&qKGe zg&L6CK0SFJx}D3_fW<>d@qg;56PyKAG@U6YeQ;U~LXQ+NuiaTr1Eg8?s9Mt+9JqNb zGblEW?1xKl)}X*CASuz+rgow|be7S?#cgxmd4 zSC3-stKzg9byNmg(mvLG9=e@=eFXeGBvHHgU%%rFI7ZW1a?*#J6ht1<8XiMyh){*v zkYy+XvP?tIpv`%CFeB#et0J`Hl_u1Hka)gN8LHGCBWVmdYQv2Y^YTbjL=>$dQWtK< zHb_!*ny5%xQ%Y^PG01mL6-8?Z;;o~bkG>GR6<@SX*IW`)jwDw#h?XwamJiXjww>|d z$<*BIkF>KMS8rs4q_Oaofd++mu*+N#UzcIwVFO|CV3!#pzK+3S5Q7K1%nlM`;!dR z-#HXo3x1hf*VCb+^2!DXH>w@de{)qyN0fapF!LDt3iYI>}n7h!o7DEi?*Zg}VR>D}!F9RXRG{ zaqT^r+K6!l-c;4ukbv1q3p0VSqNsr5%D~r%m6ir7nt`hS3MDsVT*iM;)!0xS2m^rE z4{5l$rlZ3(E^Y@=&#!vF(WruKK;boH5ESmtjcajlt}5w>r>k=z%;puFH!W&fZU%>D zZNvTS#H*Ia6$0JuE%=)=(H&>N3!~^10eQ14GAAm3G>d+++u$9-qCG5*B diff --git a/py-modindex.html b/py-modindex.html index 65486b54..d2d6bb81 100644 --- a/py-modindex.html +++ b/py-modindex.html @@ -1,20 +1,18 @@ - - + Python Module Index — CHIPSEC documentation - - + + - - - - + + + - + @@ -49,8 +47,8 @@

    Python Module Index

    h | l | m | - o | p | + t | u @@ -373,11 +371,6 @@

    Python Module Index

        chipsec.helper.windows - - -     - chipsec.helper.windows.windowshelper -   l @@ -397,11 +390,46 @@

    Python Module Index

        chipsec.library.bits + + +     + chipsec.library.control + + + +     + chipsec.library.device + + + +     + chipsec.library.lock +     chipsec.library.memory + + +     + chipsec.library.module_helper + + + +     + chipsec.library.options + + + +     + chipsec.library.register + + + +     + chipsec.library.returncode +     @@ -606,13 +634,210 @@

    Python Module Index

        chipsec.modules.snb -   - - o - + - - chipsec.options +     + chipsec.modules.tools + + + +     + chipsec.modules.tools.cpu + + + +     + chipsec.modules.tools.cpu.sinkhole + + + +     + chipsec.modules.tools.generate_test_id + + + +     + chipsec.modules.tools.secureboot + + + +     + chipsec.modules.tools.secureboot.te + + + +     + chipsec.modules.tools.smm + + + +     + chipsec.modules.tools.smm.rogue_mmio_bar + + + +     + chipsec.modules.tools.smm.smm_ptr + + + +     + chipsec.modules.tools.uefi + + + +     + chipsec.modules.tools.uefi.reputation + + + +     + chipsec.modules.tools.uefi.s3script_modify + + + +     + chipsec.modules.tools.uefi.scan_blocked + + + +     + chipsec.modules.tools.uefi.scan_image + + + +     + chipsec.modules.tools.uefi.uefivar_fuzz + + + +     + chipsec.modules.tools.vmm + + + +     + chipsec.modules.tools.vmm.common + + + +     + chipsec.modules.tools.vmm.cpuid_fuzz + + + +     + chipsec.modules.tools.vmm.ept_finder + + + +     + chipsec.modules.tools.vmm.hv + + + +     + chipsec.modules.tools.vmm.hv.define + + + +     + chipsec.modules.tools.vmm.hv.hypercall + + + +     + chipsec.modules.tools.vmm.hv.hypercallfuzz + + + +     + chipsec.modules.tools.vmm.hv.synth_dev + + + +     + chipsec.modules.tools.vmm.hv.synth_kbd + + + +     + chipsec.modules.tools.vmm.hv.vmbus + + + +     + chipsec.modules.tools.vmm.hv.vmbusfuzz + + + +     + chipsec.modules.tools.vmm.hypercallfuzz + + + +     + chipsec.modules.tools.vmm.iofuzz + + + +     + chipsec.modules.tools.vmm.msr_fuzz + + + +     + chipsec.modules.tools.vmm.pcie_fuzz + + + +     + chipsec.modules.tools.vmm.pcie_overlap_fuzz + + + +     + chipsec.modules.tools.vmm.vbox + + + +     + chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase + + + +     + chipsec.modules.tools.vmm.venom + + + +     + chipsec.modules.tools.vmm.xen + + + +     + chipsec.modules.tools.vmm.xen.define + + + +     + chipsec.modules.tools.vmm.xen.hypercall + + + +     + chipsec.modules.tools.vmm.xen.hypercallfuzz + + + +     + chipsec.modules.tools.vmm.xen.xsa188 + + + +     + chipsec.modules.tools.wsmt   @@ -623,6 +848,14 @@

    Python Module Index

    chipsec.parsers   + + t + + + + chipsec.testcase + +   u @@ -856,7 +1089,7 @@

    Quick search

    - +
    @@ -875,8 +1108,8 @@

    Navigation

    \ No newline at end of file diff --git a/search.html b/search.html index 9ca95501..ec3b7c2b 100644 --- a/search.html +++ b/search.html @@ -1,23 +1,21 @@ - - + Search — CHIPSEC documentation - - + + - - - - + + + - + @@ -140,8 +138,8 @@

    Navigation

    \ No newline at end of file diff --git a/searchindex.js b/searchindex.js index b28e290e..63b878c4 100644 --- a/searchindex.js +++ b/searchindex.js @@ -1 +1 @@ -Search.setIndex({docnames:["contribution/code-style-python","development/Architecture-Overview","development/Configuration-Files","development/Developing","development/OS-Helpers-and-Drivers","development/Platform-Detection","development/Sample-Module-Code","development/Sample-Util-Command","development/Vulnerabilities-and-CHIPSEC-Modules","index","installation/InstallLinux","installation/InstallWinDAL","installation/InstallWindows","installation/USBwithUEFIShell","modules/chipsec.cfg.parsers","modules/chipsec.cfg.parsers.core_parsers","modules/chipsec.config","modules/chipsec.fuzzing","modules/chipsec.fuzzing.primitives","modules/chipsec.hal","modules/chipsec.hal.acpi","modules/chipsec.hal.acpi_tables","modules/chipsec.hal.cmos","modules/chipsec.hal.cpu","modules/chipsec.hal.cpuid","modules/chipsec.hal.ec","modules/chipsec.hal.hal_base","modules/chipsec.hal.igd","modules/chipsec.hal.interrupts","modules/chipsec.hal.io","modules/chipsec.hal.iobar","modules/chipsec.hal.iommu","modules/chipsec.hal.locks","modules/chipsec.hal.mmio","modules/chipsec.hal.msgbus","modules/chipsec.hal.msr","modules/chipsec.hal.paging","modules/chipsec.hal.pci","modules/chipsec.hal.pcidb","modules/chipsec.hal.physmem","modules/chipsec.hal.smbios","modules/chipsec.hal.smbus","modules/chipsec.hal.spd","modules/chipsec.hal.spi","modules/chipsec.hal.spi_descriptor","modules/chipsec.hal.spi_jedec_ids","modules/chipsec.hal.spi_uefi","modules/chipsec.hal.tpm","modules/chipsec.hal.tpm12_commands","modules/chipsec.hal.tpm_eventlog","modules/chipsec.hal.ucode","modules/chipsec.hal.uefi","modules/chipsec.hal.uefi_common","modules/chipsec.hal.uefi_compression","modules/chipsec.hal.uefi_fv","modules/chipsec.hal.uefi_platform","modules/chipsec.hal.uefi_search","modules/chipsec.hal.virtmem","modules/chipsec.hal.vmm","modules/chipsec.helper","modules/chipsec.helper.basehelper","modules/chipsec.helper.dal","modules/chipsec.helper.dal.dalhelper","modules/chipsec.helper.efi","modules/chipsec.helper.efi.efihelper","modules/chipsec.helper.linux","modules/chipsec.helper.linux.linuxhelper","modules/chipsec.helper.linuxnative","modules/chipsec.helper.linuxnative.cpuid","modules/chipsec.helper.linuxnative.legacy_pci","modules/chipsec.helper.linuxnative.linuxnativehelper","modules/chipsec.helper.nonehelper","modules/chipsec.helper.oshelper","modules/chipsec.helper.windows","modules/chipsec.helper.windows.windowshelper","modules/chipsec.library","modules/chipsec.library.architecture","modules/chipsec.library.bits","modules/chipsec.library.memory","modules/chipsec.library.strings","modules/chipsec.library.structs","modules/chipsec.library.types","modules/chipsec.modules","modules/chipsec.modules.bdw","modules/chipsec.modules.byt","modules/chipsec.modules.common","modules/chipsec.modules.common.bios_kbrd_buffer","modules/chipsec.modules.common.bios_smi","modules/chipsec.modules.common.bios_ts","modules/chipsec.modules.common.bios_wp","modules/chipsec.modules.common.cet","modules/chipsec.modules.common.cpu","modules/chipsec.modules.common.cpu.cpu_info","modules/chipsec.modules.common.cpu.ia_untrusted","modules/chipsec.modules.common.cpu.spectre_v2","modules/chipsec.modules.common.debugenabled","modules/chipsec.modules.common.ia32cfg","modules/chipsec.modules.common.me_mfg_mode","modules/chipsec.modules.common.memconfig","modules/chipsec.modules.common.memlock","modules/chipsec.modules.common.remap","modules/chipsec.modules.common.rtclock","modules/chipsec.modules.common.secureboot","modules/chipsec.modules.common.secureboot.variables","modules/chipsec.modules.common.sgx_check","modules/chipsec.modules.common.smm","modules/chipsec.modules.common.smm_code_chk","modules/chipsec.modules.common.smm_dma","modules/chipsec.modules.common.smrr","modules/chipsec.modules.common.spd_wd","modules/chipsec.modules.common.spi_access","modules/chipsec.modules.common.spi_desc","modules/chipsec.modules.common.spi_fdopss","modules/chipsec.modules.common.spi_lock","modules/chipsec.modules.common.uefi","modules/chipsec.modules.common.uefi.access_uefispec","modules/chipsec.modules.common.uefi.s3bootscript","modules/chipsec.modules.hsw","modules/chipsec.modules.ivb","modules/chipsec.modules.snb","modules/chipsec.options","modules/chipsec.parsers","modules/chipsec.utilcmd","modules/chipsec.utilcmd.acpi_cmd","modules/chipsec.utilcmd.chipset_cmd","modules/chipsec.utilcmd.cmos_cmd","modules/chipsec.utilcmd.config_cmd","modules/chipsec.utilcmd.cpu_cmd","modules/chipsec.utilcmd.decode_cmd","modules/chipsec.utilcmd.deltas_cmd","modules/chipsec.utilcmd.desc_cmd","modules/chipsec.utilcmd.ec_cmd","modules/chipsec.utilcmd.igd_cmd","modules/chipsec.utilcmd.interrupts_cmd","modules/chipsec.utilcmd.io_cmd","modules/chipsec.utilcmd.iommu_cmd","modules/chipsec.utilcmd.lock_check_cmd","modules/chipsec.utilcmd.mem_cmd","modules/chipsec.utilcmd.mmcfg_base_cmd","modules/chipsec.utilcmd.mmcfg_cmd","modules/chipsec.utilcmd.mmio_cmd","modules/chipsec.utilcmd.msgbus_cmd","modules/chipsec.utilcmd.msr_cmd","modules/chipsec.utilcmd.pci_cmd","modules/chipsec.utilcmd.reg_cmd","modules/chipsec.utilcmd.smbios_cmd","modules/chipsec.utilcmd.smbus_cmd","modules/chipsec.utilcmd.spd_cmd","modules/chipsec.utilcmd.spi_cmd","modules/chipsec.utilcmd.spidesc_cmd","modules/chipsec.utilcmd.tpm_cmd","modules/chipsec.utilcmd.txt_cmd","modules/chipsec.utilcmd.ucode_cmd","modules/chipsec.utilcmd.uefi_cmd","modules/chipsec.utilcmd.vmem_cmd","modules/chipsec.utilcmd.vmm_cmd","start/Contact","start/Download","usage/Interpreting-Results","usage/Running-Chipsec"],envversion:{"sphinx.domains.c":2,"sphinx.domains.changeset":1,"sphinx.domains.citation":1,"sphinx.domains.cpp":4,"sphinx.domains.index":1,"sphinx.domains.javascript":2,"sphinx.domains.math":2,"sphinx.domains.python":3,"sphinx.domains.rst":2,"sphinx.domains.std":2,"sphinx.ext.todo":2,"sphinx.ext.viewcode":1,sphinx:56},filenames:["contribution\\code-style-python.rst","development\\Architecture-Overview.rst","development\\Configuration-Files.rst","development\\Developing.rst","development\\OS-Helpers-and-Drivers.rst","development\\Platform-Detection.rst","development\\Sample-Module-Code.rst","development\\Sample-Util-Command.rst","development\\Vulnerabilities-and-CHIPSEC-Modules.rst","index.rst","installation\\InstallLinux.rst","installation\\InstallWinDAL.rst","installation\\InstallWindows.rst","installation\\USBwithUEFIShell.rst","modules\\chipsec.cfg.parsers.rst","modules\\chipsec.cfg.parsers.core_parsers.rst","modules\\chipsec.config.rst","modules\\chipsec.fuzzing.rst","modules\\chipsec.fuzzing.primitives.rst","modules\\chipsec.hal.rst","modules\\chipsec.hal.acpi.rst","modules\\chipsec.hal.acpi_tables.rst","modules\\chipsec.hal.cmos.rst","modules\\chipsec.hal.cpu.rst","modules\\chipsec.hal.cpuid.rst","modules\\chipsec.hal.ec.rst","modules\\chipsec.hal.hal_base.rst","modules\\chipsec.hal.igd.rst","modules\\chipsec.hal.interrupts.rst","modules\\chipsec.hal.io.rst","modules\\chipsec.hal.iobar.rst","modules\\chipsec.hal.iommu.rst","modules\\chipsec.hal.locks.rst","modules\\chipsec.hal.mmio.rst","modules\\chipsec.hal.msgbus.rst","modules\\chipsec.hal.msr.rst","modules\\chipsec.hal.paging.rst","modules\\chipsec.hal.pci.rst","modules\\chipsec.hal.pcidb.rst","modules\\chipsec.hal.physmem.rst","modules\\chipsec.hal.smbios.rst","modules\\chipsec.hal.smbus.rst","modules\\chipsec.hal.spd.rst","modules\\chipsec.hal.spi.rst","modules\\chipsec.hal.spi_descriptor.rst","modules\\chipsec.hal.spi_jedec_ids.rst","modules\\chipsec.hal.spi_uefi.rst","modules\\chipsec.hal.tpm.rst","modules\\chipsec.hal.tpm12_commands.rst","modules\\chipsec.hal.tpm_eventlog.rst","modules\\chipsec.hal.ucode.rst","modules\\chipsec.hal.uefi.rst","modules\\chipsec.hal.uefi_common.rst","modules\\chipsec.hal.uefi_compression.rst","modules\\chipsec.hal.uefi_fv.rst","modules\\chipsec.hal.uefi_platform.rst","modules\\chipsec.hal.uefi_search.rst","modules\\chipsec.hal.virtmem.rst","modules\\chipsec.hal.vmm.rst","modules\\chipsec.helper.rst","modules\\chipsec.helper.basehelper.rst","modules\\chipsec.helper.dal.rst","modules\\chipsec.helper.dal.dalhelper.rst","modules\\chipsec.helper.efi.rst","modules\\chipsec.helper.efi.efihelper.rst","modules\\chipsec.helper.linux.rst","modules\\chipsec.helper.linux.linuxhelper.rst","modules\\chipsec.helper.linuxnative.rst","modules\\chipsec.helper.linuxnative.cpuid.rst","modules\\chipsec.helper.linuxnative.legacy_pci.rst","modules\\chipsec.helper.linuxnative.linuxnativehelper.rst","modules\\chipsec.helper.nonehelper.rst","modules\\chipsec.helper.oshelper.rst","modules\\chipsec.helper.windows.rst","modules\\chipsec.helper.windows.windowshelper.rst","modules\\chipsec.library.rst","modules\\chipsec.library.architecture.rst","modules\\chipsec.library.bits.rst","modules\\chipsec.library.memory.rst","modules\\chipsec.library.strings.rst","modules\\chipsec.library.structs.rst","modules\\chipsec.library.types.rst","modules\\chipsec.modules.rst","modules\\chipsec.modules.bdw.rst","modules\\chipsec.modules.byt.rst","modules\\chipsec.modules.common.rst","modules\\chipsec.modules.common.bios_kbrd_buffer.rst","modules\\chipsec.modules.common.bios_smi.rst","modules\\chipsec.modules.common.bios_ts.rst","modules\\chipsec.modules.common.bios_wp.rst","modules\\chipsec.modules.common.cet.rst","modules\\chipsec.modules.common.cpu.rst","modules\\chipsec.modules.common.cpu.cpu_info.rst","modules\\chipsec.modules.common.cpu.ia_untrusted.rst","modules\\chipsec.modules.common.cpu.spectre_v2.rst","modules\\chipsec.modules.common.debugenabled.rst","modules\\chipsec.modules.common.ia32cfg.rst","modules\\chipsec.modules.common.me_mfg_mode.rst","modules\\chipsec.modules.common.memconfig.rst","modules\\chipsec.modules.common.memlock.rst","modules\\chipsec.modules.common.remap.rst","modules\\chipsec.modules.common.rtclock.rst","modules\\chipsec.modules.common.secureboot.rst","modules\\chipsec.modules.common.secureboot.variables.rst","modules\\chipsec.modules.common.sgx_check.rst","modules\\chipsec.modules.common.smm.rst","modules\\chipsec.modules.common.smm_code_chk.rst","modules\\chipsec.modules.common.smm_dma.rst","modules\\chipsec.modules.common.smrr.rst","modules\\chipsec.modules.common.spd_wd.rst","modules\\chipsec.modules.common.spi_access.rst","modules\\chipsec.modules.common.spi_desc.rst","modules\\chipsec.modules.common.spi_fdopss.rst","modules\\chipsec.modules.common.spi_lock.rst","modules\\chipsec.modules.common.uefi.rst","modules\\chipsec.modules.common.uefi.access_uefispec.rst","modules\\chipsec.modules.common.uefi.s3bootscript.rst","modules\\chipsec.modules.hsw.rst","modules\\chipsec.modules.ivb.rst","modules\\chipsec.modules.snb.rst","modules\\chipsec.options.rst","modules\\chipsec.parsers.rst","modules\\chipsec.utilcmd.rst","modules\\chipsec.utilcmd.acpi_cmd.rst","modules\\chipsec.utilcmd.chipset_cmd.rst","modules\\chipsec.utilcmd.cmos_cmd.rst","modules\\chipsec.utilcmd.config_cmd.rst","modules\\chipsec.utilcmd.cpu_cmd.rst","modules\\chipsec.utilcmd.decode_cmd.rst","modules\\chipsec.utilcmd.deltas_cmd.rst","modules\\chipsec.utilcmd.desc_cmd.rst","modules\\chipsec.utilcmd.ec_cmd.rst","modules\\chipsec.utilcmd.igd_cmd.rst","modules\\chipsec.utilcmd.interrupts_cmd.rst","modules\\chipsec.utilcmd.io_cmd.rst","modules\\chipsec.utilcmd.iommu_cmd.rst","modules\\chipsec.utilcmd.lock_check_cmd.rst","modules\\chipsec.utilcmd.mem_cmd.rst","modules\\chipsec.utilcmd.mmcfg_base_cmd.rst","modules\\chipsec.utilcmd.mmcfg_cmd.rst","modules\\chipsec.utilcmd.mmio_cmd.rst","modules\\chipsec.utilcmd.msgbus_cmd.rst","modules\\chipsec.utilcmd.msr_cmd.rst","modules\\chipsec.utilcmd.pci_cmd.rst","modules\\chipsec.utilcmd.reg_cmd.rst","modules\\chipsec.utilcmd.smbios_cmd.rst","modules\\chipsec.utilcmd.smbus_cmd.rst","modules\\chipsec.utilcmd.spd_cmd.rst","modules\\chipsec.utilcmd.spi_cmd.rst","modules\\chipsec.utilcmd.spidesc_cmd.rst","modules\\chipsec.utilcmd.tpm_cmd.rst","modules\\chipsec.utilcmd.txt_cmd.rst","modules\\chipsec.utilcmd.ucode_cmd.rst","modules\\chipsec.utilcmd.uefi_cmd.rst","modules\\chipsec.utilcmd.vmem_cmd.rst","modules\\chipsec.utilcmd.vmm_cmd.rst","start\\Contact.rst","start\\Download.rst","usage\\Interpreting-Results.rst","usage\\Running-Chipsec.rst"],objects:{"chipsec.cfg":[[14,0,0,"-","parsers"]],"chipsec.cfg.parsers":[[15,0,0,"-","core_parsers"]],"chipsec.cfg.parsers.core_parsers":[[15,1,1,"","CoreConfig"],[15,1,1,"","PlatformInfo"]],"chipsec.cfg.parsers.core_parsers.CoreConfig":[[15,2,1,"","get_metadata"],[15,2,1,"","get_stage"],[15,2,1,"","handle_controls"],[15,2,1,"","handle_ima"],[15,2,1,"","handle_io"],[15,2,1,"","handle_locks"],[15,2,1,"","handle_memory"],[15,2,1,"","handle_mmio"],[15,2,1,"","handle_pci"],[15,2,1,"","handle_registers"]],"chipsec.cfg.parsers.core_parsers.PlatformInfo":[[15,2,1,"","get_metadata"],[15,2,1,"","get_stage"],[15,2,1,"","handle_info"]],"chipsec.config":[[16,1,1,"","Cfg"]],"chipsec.config.Cfg":[[16,2,1,"","add_extra_configs"],[16,2,1,"","get_chipset_code"],[16,2,1,"","get_common_xml"],[16,2,1,"","get_pch_code"],[16,2,1,"","is_pch_req"],[16,2,1,"","load_parsers"],[16,2,1,"","load_platform_config"],[16,2,1,"","load_platform_info"],[16,2,1,"","platform_detection"],[16,2,1,"","print_pch_info"],[16,2,1,"","print_platform_info"],[16,2,1,"","print_supported_chipsets"],[16,2,1,"","set_pci_data"]],"chipsec.fuzzing":[[18,0,0,"-","primitives"]],"chipsec.fuzzing.primitives":[[18,1,1,"","base_primitive"],[18,1,1,"","bit_field"],[18,1,1,"","byte"],[18,1,1,"","delim"],[18,1,1,"","dword"],[18,1,1,"","group"],[18,1,1,"","qword"],[18,1,1,"","random_data"],[18,1,1,"","static"],[18,1,1,"","string"],[18,1,1,"","word"]],"chipsec.fuzzing.primitives.base_primitive":[[18,2,1,"","exhaust"],[18,2,1,"","mutate"],[18,2,1,"","num_mutations"],[18,2,1,"","render"],[18,2,1,"","reset"]],"chipsec.fuzzing.primitives.bit_field":[[18,2,1,"","add_integer_boundaries"],[18,2,1,"","render"],[18,2,1,"","to_binary"],[18,2,1,"","to_decimal"]],"chipsec.fuzzing.primitives.group":[[18,2,1,"","mutate"],[18,2,1,"","num_mutations"]],"chipsec.fuzzing.primitives.random_data":[[18,2,1,"","mutate"],[18,2,1,"","num_mutations"]],"chipsec.fuzzing.primitives.static":[[18,2,1,"","mutate"],[18,2,1,"","num_mutations"]],"chipsec.fuzzing.primitives.string":[[18,2,1,"","add_long_strings"],[18,3,1,"","fuzz_library"],[18,2,1,"","mutate"],[18,2,1,"","num_mutations"],[18,2,1,"","render"]],"chipsec.hal":[[20,0,0,"-","acpi"],[21,0,0,"-","acpi_tables"],[22,0,0,"-","cmos"],[23,0,0,"-","cpu"],[24,0,0,"-","cpuid"],[25,0,0,"-","ec"],[26,0,0,"-","hal_base"],[27,0,0,"-","igd"],[28,0,0,"-","interrupts"],[29,0,0,"-","io"],[30,0,0,"-","iobar"],[31,0,0,"-","iommu"],[32,0,0,"-","locks"],[33,0,0,"-","mmio"],[34,0,0,"-","msgbus"],[35,0,0,"-","msr"],[36,0,0,"-","paging"],[37,0,0,"-","pci"],[38,0,0,"-","pcidb"],[39,0,0,"-","physmem"],[40,0,0,"-","smbios"],[41,0,0,"-","smbus"],[42,0,0,"-","spd"],[43,0,0,"-","spi"],[44,0,0,"-","spi_descriptor"],[45,0,0,"-","spi_jedec_ids"],[46,0,0,"-","spi_uefi"],[47,0,0,"-","tpm"],[48,0,0,"-","tpm12_commands"],[49,0,0,"-","tpm_eventlog"],[50,0,0,"-","ucode"],[51,0,0,"-","uefi"],[52,0,0,"-","uefi_common"],[53,0,0,"-","uefi_compression"],[54,0,0,"-","uefi_fv"],[55,0,0,"-","uefi_platform"],[56,0,0,"-","uefi_search"],[57,0,0,"-","virtmem"],[58,0,0,"-","vmm"]],"chipsec.hal.acpi":[[20,1,1,"","ACPI"],[20,1,1,"","ACPI_TABLE_HEADER"]],"chipsec.hal.acpi.ACPI":[[20,3,1,"","ParseTable"],[20,3,1,"","RsdtXsdt"],[20,2,1,"","dump_ACPI_table"],[20,2,1,"","find_RSDP"],[20,2,1,"","get_ACPI_table"],[20,2,1,"","get_ACPI_table_list"],[20,2,1,"","get_DSDT_from_FADT"],[20,2,1,"","get_SDT"],[20,2,1,"","get_parse_ACPI_table"],[20,2,1,"","get_table_list_from_SDT"],[20,2,1,"","is_ACPI_table_present"],[20,2,1,"","print_ACPI_table_list"],[20,2,1,"","read_RSDP"]],"chipsec.hal.acpi_tables":[[21,1,1,"","ACPI_TABLE"],[21,1,1,"","ACPI_TABLE_APIC_GICC_CPU"],[21,1,1,"","ACPI_TABLE_APIC_GIC_DISTRIBUTOR"],[21,1,1,"","ACPI_TABLE_APIC_GIC_MSI"],[21,1,1,"","ACPI_TABLE_APIC_GIC_REDISTRIBUTOR"],[21,1,1,"","ACPI_TABLE_APIC_INTERRUPT_SOURSE_OVERRIDE"],[21,1,1,"","ACPI_TABLE_APIC_IOAPIC"],[21,1,1,"","ACPI_TABLE_APIC_IOSAPIC"],[21,1,1,"","ACPI_TABLE_APIC_LAPIC_ADDRESS_OVERRIDE"],[21,1,1,"","ACPI_TABLE_APIC_LAPIC_NMI"],[21,1,1,"","ACPI_TABLE_APIC_Lx2APIC_NMI"],[21,1,1,"","ACPI_TABLE_APIC_NMI_SOURCE"],[21,1,1,"","ACPI_TABLE_APIC_PLATFORM_INTERRUPT_SOURCES"],[21,1,1,"","ACPI_TABLE_APIC_PROCESSOR_LAPIC"],[21,1,1,"","ACPI_TABLE_APIC_PROCESSOR_LSAPIC"],[21,1,1,"","ACPI_TABLE_APIC_PROCESSOR_Lx2APIC"],[21,1,1,"","ACPI_TABLE_DMAR_ANDD"],[21,1,1,"","ACPI_TABLE_DMAR_ATSR"],[21,1,1,"","ACPI_TABLE_DMAR_DRHD"],[21,1,1,"","ACPI_TABLE_DMAR_DeviceScope"],[21,1,1,"","ACPI_TABLE_DMAR_RHSA"],[21,1,1,"","ACPI_TABLE_DMAR_RMRR"],[21,1,1,"","ACPI_TABLE_DMAR_SATC"],[21,1,1,"","ACPI_TABLE_DMAR_SIDP"],[21,1,1,"","APIC"],[21,1,1,"","BERT"],[21,1,1,"","BGRT"],[21,1,1,"","DMAR"],[21,1,1,"","EINJ"],[21,1,1,"","ERST"],[21,1,1,"","FADT"],[21,1,1,"","GAS"],[21,1,1,"","HEST"],[21,1,1,"","MSCT"],[21,1,1,"","NFIT"],[21,1,1,"","RASF"],[21,1,1,"","RSDP"],[21,1,1,"","RSDT"],[21,1,1,"","SPMI"],[21,1,1,"","UEFI_TABLE"],[21,1,1,"","WSMT"],[21,1,1,"","XSDT"]],"chipsec.hal.acpi_tables.ACPI_TABLE":[[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.APIC":[[21,2,1,"","get_structure_APIC"],[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.BERT":[[21,2,1,"","parse"],[21,2,1,"","parseErrorBlock"],[21,2,1,"","parseGenErrorEntries"],[21,2,1,"","parseSectionType"],[21,2,1,"","parseTime"]],"chipsec.hal.acpi_tables.BGRT":[[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.DMAR":[[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.EINJ":[[21,2,1,"","parse"],[21,2,1,"","parseAddress"],[21,2,1,"","parseInjection"],[21,2,1,"","parseInjectionActionTable"]],"chipsec.hal.acpi_tables.ERST":[[21,2,1,"","parse"],[21,2,1,"","parseActionTable"],[21,2,1,"","parseAddress"],[21,2,1,"","parseInstructionEntry"]],"chipsec.hal.acpi_tables.FADT":[[21,2,1,"","get_DSDT_address_to_use"],[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.GAS":[[21,2,1,"","get_info"]],"chipsec.hal.acpi_tables.HEST":[[21,2,1,"","machineBankParser"],[21,2,1,"","parse"],[21,2,1,"","parseAMCES"],[21,2,1,"","parseAMCS"],[21,2,1,"","parseAddress"],[21,2,1,"","parseErrEntry"],[21,2,1,"","parseGHESS"],[21,2,1,"","parseNMIStructure"],[21,2,1,"","parseNotify"],[21,2,1,"","parsePCIe"]],"chipsec.hal.acpi_tables.MSCT":[[21,2,1,"","parse"],[21,2,1,"","parseProx"],[21,2,1,"","parseProxDomInfoStruct"]],"chipsec.hal.acpi_tables.NFIT":[[21,2,1,"","flushHintAddrStruct"],[21,2,1,"","interleave"],[21,2,1,"","nvdimmBlockDataWindowsRegionStruct"],[21,2,1,"","nvdimmControlRegionStructMark"],[21,2,1,"","parse"],[21,2,1,"","parseMAP"],[21,2,1,"","parseSPA"],[21,2,1,"","parseStructures"],[21,2,1,"","platCapStruct"],[21,2,1,"","smbiosManagementInfo"]],"chipsec.hal.acpi_tables.RASF":[[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.RSDP":[[21,2,1,"","is_RSDP_valid"],[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.RSDT":[[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.SPMI":[[21,2,1,"","parse"],[21,2,1,"","parseAddress"],[21,2,1,"","parseNonUID"],[21,2,1,"","parseUID"]],"chipsec.hal.acpi_tables.UEFI_TABLE":[[21,3,1,"","CommBuffInfo"],[21,2,1,"","get_commbuf_info"],[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.WSMT":[[21,3,1,"","COMM_BUFFER_NESTED_PTR_PROTECTION"],[21,3,1,"","FIXED_COMM_BUFFERS"],[21,3,1,"","SYSTEM_RESOURCE_PROTECTION"],[21,2,1,"","parse"]],"chipsec.hal.acpi_tables.XSDT":[[21,2,1,"","parse"]],"chipsec.hal.cmos":[[22,1,1,"","CMOS"]],"chipsec.hal.cmos.CMOS":[[22,2,1,"","dump"],[22,2,1,"","dump_high"],[22,2,1,"","dump_low"],[22,2,1,"","read_cmos_high"],[22,2,1,"","read_cmos_low"],[22,2,1,"","write_cmos_high"],[22,2,1,"","write_cmos_low"]],"chipsec.hal.cpu":[[23,1,1,"","CPU"]],"chipsec.hal.cpu.CPU":[[23,2,1,"","check_SMRR_supported"],[23,2,1,"","check_vmm"],[23,2,1,"","cpuid"],[23,2,1,"","dump_page_tables"],[23,2,1,"","dump_page_tables_all"],[23,2,1,"","get_SMRAM"],[23,2,1,"","get_SMRR"],[23,2,1,"","get_SMRR_SMRAM"],[23,2,1,"","get_TSEG"],[23,2,1,"","get_cpu_topology"],[23,2,1,"","get_number_logical_processor_per_core"],[23,2,1,"","get_number_logical_processor_per_package"],[23,2,1,"","get_number_physical_processor_per_package"],[23,2,1,"","get_number_sockets_from_APIC_table"],[23,2,1,"","get_number_threads_from_APIC_table"],[23,2,1,"","is_HT_active"],[23,2,1,"","read_cr"],[23,2,1,"","write_cr"]],"chipsec.hal.cpuid":[[24,1,1,"","CpuID"]],"chipsec.hal.cpuid.CpuID":[[24,2,1,"","cpuid"],[24,2,1,"","get_proc_info"]],"chipsec.hal.ec":[[25,1,1,"","EC"]],"chipsec.hal.ec.EC":[[25,2,1,"","read_data"],[25,2,1,"","read_idx"],[25,2,1,"","read_memory"],[25,2,1,"","read_memory_extended"],[25,2,1,"","read_range"],[25,2,1,"","write_command"],[25,2,1,"","write_data"],[25,2,1,"","write_idx"],[25,2,1,"","write_memory"],[25,2,1,"","write_memory_extended"],[25,2,1,"","write_range"]],"chipsec.hal.hal_base":[[26,1,1,"","HALBase"]],"chipsec.hal.igd":[[27,1,1,"","IGD"]],"chipsec.hal.igd.IGD":[[27,2,1,"","dump_GGTT_PTEs"],[27,2,1,"","get_GGTT_PTE_from_PA"],[27,2,1,"","get_GGTT_PTE_from_PA_gen8"],[27,2,1,"","get_GGTT_PTE_from_PA_legacy"],[27,2,1,"","get_GGTT_base"],[27,2,1,"","get_GMADR"],[27,2,1,"","get_GTTMMADR"],[27,2,1,"","get_PA_from_PTE"],[27,2,1,"","get_PA_from_PTE_gen8"],[27,2,1,"","get_PA_from_PTE_legacy"],[27,2,1,"","get_PTE_size"],[27,2,1,"","gfx_aperture_dma_read_write"],[27,2,1,"","is_device_enabled"],[27,2,1,"","is_enabled"],[27,2,1,"","is_legacy_gen"],[27,2,1,"","read_GGTT_PTE"],[27,2,1,"","write_GGTT_PTE"],[27,2,1,"","write_GGTT_PTE_from_PA"]],"chipsec.hal.interrupts":[[28,1,1,"","Interrupts"]],"chipsec.hal.interrupts.Interrupts":[[28,2,1,"","find_ACPI_SMI_Buffer"],[28,2,1,"","find_smmc"],[28,2,1,"","send_ACPI_SMI"],[28,2,1,"","send_NMI"],[28,2,1,"","send_SMI_APMC"],[28,2,1,"","send_SW_SMI"],[28,2,1,"","send_smmc_SMI"]],"chipsec.hal.io":[[29,1,1,"","PortIO"]],"chipsec.hal.io.PortIO":[[29,2,1,"","dump_IO"],[29,2,1,"","read_IO"],[29,2,1,"","read_port_byte"],[29,2,1,"","read_port_dword"],[29,2,1,"","read_port_word"],[29,2,1,"","write_port_byte"],[29,2,1,"","write_port_dword"],[29,2,1,"","write_port_word"]],"chipsec.hal.iobar":[[30,1,1,"","IOBAR"]],"chipsec.hal.iobar.IOBAR":[[30,2,1,"","dump_IO_BAR"],[30,2,1,"","get_IO_BAR_base_address"],[30,2,1,"","is_IO_BAR_defined"],[30,2,1,"","is_IO_BAR_enabled"],[30,2,1,"","list_IO_BARs"],[30,2,1,"","read_IO_BAR"],[30,2,1,"","read_IO_BAR_reg"],[30,2,1,"","write_IO_BAR_reg"]],"chipsec.hal.iommu":[[31,1,1,"","IOMMU"]],"chipsec.hal.iommu.IOMMU":[[31,2,1,"","dump_IOMMU_configuration"],[31,2,1,"","dump_IOMMU_page_tables"],[31,2,1,"","dump_IOMMU_status"],[31,2,1,"","get_IOMMU_Base_Address"],[31,2,1,"","is_IOMMU_Engine_Enabled"],[31,2,1,"","is_IOMMU_Translation_Enabled"],[31,2,1,"","set_IOMMU_Translation"]],"chipsec.hal.locks":[[32,1,1,"","LockResult"],[32,1,1,"","locks"]],"chipsec.hal.locks.LockResult":[[32,3,1,"","CAN_READ"],[32,3,1,"","DEFINED"],[32,3,1,"","HAS_CONFIG"],[32,3,1,"","INCONSISTENT"],[32,3,1,"","LOCKED"]],"chipsec.hal.locks.locks":[[32,2,1,"","get_locks"],[32,2,1,"","is_locked"],[32,2,1,"","lock_valid"]],"chipsec.hal.mmio":[[33,1,1,"","ECEntry"],[33,1,1,"","MMIO"],[33,1,1,"","VSECEntry"],[33,4,1,"","print_pci_extended_capability"]],"chipsec.hal.mmio.MMIO":[[33,2,1,"","dump_MMIO"],[33,2,1,"","dump_MMIO_BAR"],[33,2,1,"","enable_cache_address_resolution"],[33,2,1,"","flush_bar_address_cache"],[33,2,1,"","get_MMCFG_base_address"],[33,2,1,"","get_MMIO_BAR_base_address"],[33,2,1,"","get_extended_capabilities"],[33,2,1,"","get_vsec"],[33,2,1,"","is_MMIO_BAR_defined"],[33,2,1,"","is_MMIO_BAR_enabled"],[33,2,1,"","is_MMIO_BAR_programmed"],[33,2,1,"","list_MMIO_BARs"],[33,2,1,"","read_MMIO"],[33,2,1,"","read_MMIO_BAR"],[33,2,1,"","read_MMIO_BAR_reg"],[33,2,1,"","read_MMIO_reg"],[33,2,1,"","read_MMIO_reg_byte"],[33,2,1,"","read_MMIO_reg_dword"],[33,2,1,"","read_MMIO_reg_word"],[33,2,1,"","read_mmcfg_reg"],[33,2,1,"","write_MMIO_BAR_reg"],[33,2,1,"","write_MMIO_reg"],[33,2,1,"","write_MMIO_reg_byte"],[33,2,1,"","write_MMIO_reg_dword"],[33,2,1,"","write_MMIO_reg_word"],[33,2,1,"","write_mmcfg_reg"]],"chipsec.hal.msgbus":[[34,1,1,"","MessageBusOpcode"],[34,1,1,"","MessageBusPort_Atom"],[34,1,1,"","MessageBusPort_Quark"],[34,1,1,"","MsgBus"]],"chipsec.hal.msgbus.MessageBusOpcode":[[34,3,1,"","MB_OPCODE_CFG_READ"],[34,3,1,"","MB_OPCODE_CFG_WRITE"],[34,3,1,"","MB_OPCODE_CR_READ"],[34,3,1,"","MB_OPCODE_CR_WRITE"],[34,3,1,"","MB_OPCODE_ESRAM_READ"],[34,3,1,"","MB_OPCODE_ESRAM_WRITE"],[34,3,1,"","MB_OPCODE_IO_READ"],[34,3,1,"","MB_OPCODE_IO_WRITE"],[34,3,1,"","MB_OPCODE_MMIO_READ"],[34,3,1,"","MB_OPCODE_MMIO_WRITE"],[34,3,1,"","MB_OPCODE_REG_READ"],[34,3,1,"","MB_OPCODE_REG_WRITE"]],"chipsec.hal.msgbus.MessageBusPort_Atom":[[34,3,1,"","UNIT_AUNIT"],[34,3,1,"","UNIT_BUNIT"],[34,3,1,"","UNIT_CPU"],[34,3,1,"","UNIT_GFX"],[34,3,1,"","UNIT_PCIE"],[34,3,1,"","UNIT_PMC"],[34,3,1,"","UNIT_SATA"],[34,3,1,"","UNIT_SMC"],[34,3,1,"","UNIT_SMI"],[34,3,1,"","UNIT_USB"]],"chipsec.hal.msgbus.MessageBusPort_Quark":[[34,3,1,"","UNIT_HB"],[34,3,1,"","UNIT_HBA"],[34,3,1,"","UNIT_MM"],[34,3,1,"","UNIT_RMU"],[34,3,1,"","UNIT_SOC"]],"chipsec.hal.msgbus.MsgBus":[[34,2,1,"","mm_msgbus_reg_read"],[34,2,1,"","mm_msgbus_reg_write"],[34,2,1,"","msgbus_read_message"],[34,2,1,"","msgbus_reg_read"],[34,2,1,"","msgbus_reg_write"],[34,2,1,"","msgbus_send_message"],[34,2,1,"","msgbus_write_message"]],"chipsec.hal.msr":[[35,1,1,"","Msr"]],"chipsec.hal.msr.Msr":[[35,2,1,"","GDT"],[35,2,1,"","GDT_all"],[35,2,1,"","IDT"],[35,2,1,"","IDT_all"],[35,2,1,"","dump_Descriptor_Table"],[35,2,1,"","get_Desc_Table_Register"],[35,2,1,"","get_GDTR"],[35,2,1,"","get_IDTR"],[35,2,1,"","get_LDTR"],[35,2,1,"","get_cpu_core_count"],[35,2,1,"","get_cpu_thread_count"],[35,2,1,"","read_msr"],[35,2,1,"","write_msr"]],"chipsec.hal.paging":[[36,1,1,"","c_4level_page_tables"],[36,1,1,"","c_extended_page_tables"],[36,1,1,"","c_ia32e_page_tables"],[36,1,1,"","c_pae_page_tables"],[36,1,1,"","c_paging"],[36,1,1,"","c_paging_memory_access"],[36,1,1,"","c_paging_with_2nd_level_translation"],[36,1,1,"","c_reverse_translation"],[36,1,1,"","c_translation"],[36,1,1,"","c_vtd_page_tables"]],"chipsec.hal.paging.c_4level_page_tables":[[36,2,1,"","get_attr"],[36,2,1,"","get_virt_addr"],[36,2,1,"","is_bigpage"],[36,2,1,"","is_present"],[36,2,1,"","print_entry"],[36,2,1,"","read_entry_by_virt_addr"],[36,2,1,"","read_page_tables"],[36,2,1,"","read_pd"],[36,2,1,"","read_pdpt"],[36,2,1,"","read_pml4"],[36,2,1,"","read_pt"]],"chipsec.hal.paging.c_extended_page_tables":[[36,2,1,"","get_attr"],[36,2,1,"","is_bigpage"],[36,2,1,"","is_present"],[36,2,1,"","map_bigpage_1G"],[36,2,1,"","read_pt_and_show_status"]],"chipsec.hal.paging.c_ia32e_page_tables":[[36,2,1,"","get_attr"],[36,2,1,"","is_bigpage"],[36,2,1,"","is_present"]],"chipsec.hal.paging.c_pae_page_tables":[[36,2,1,"","read_page_tables"],[36,2,1,"","read_pdpt"],[36,2,1,"","read_pml4"]],"chipsec.hal.paging.c_paging":[[36,2,1,"","check_misconfig"],[36,2,1,"","get_canonical"],[36,2,1,"","get_field"],[36,2,1,"","load_configuration"],[36,2,1,"","print_info"],[36,2,1,"","read_entries"],[36,2,1,"","read_page_tables"],[36,2,1,"","read_pt_and_show_status"],[36,2,1,"","save_configuration"],[36,2,1,"","set_field"]],"chipsec.hal.paging.c_paging_memory_access":[[36,2,1,"","readmem"]],"chipsec.hal.paging.c_paging_with_2nd_level_translation":[[36,2,1,"","readmem"]],"chipsec.hal.paging.c_reverse_translation":[[36,2,1,"","get_reverse_translation"]],"chipsec.hal.paging.c_translation":[[36,2,1,"","add_page"],[36,2,1,"","del_page"],[36,2,1,"","expand_pages"],[36,2,1,"","get_address_space"],[36,2,1,"","get_mem_range"],[36,2,1,"","get_pages_by_physaddr"],[36,2,1,"","get_translation"],[36,2,1,"","is_translation_exist"]],"chipsec.hal.paging.c_vtd_page_tables":[[36,2,1,"","print_context_entry"],[36,2,1,"","read_ce"],[36,2,1,"","read_page_tables"],[36,2,1,"","read_pt_and_show_status"],[36,2,1,"","read_re"],[36,2,1,"","read_vtd_context"]],"chipsec.hal.pci":[[37,1,1,"","EFI_XROM_HEADER"],[37,1,1,"","PCI_XROM_HEADER"],[37,1,1,"","Pci"],[37,1,1,"","XROM"],[37,1,1,"","XROM_HEADER"],[37,4,1,"","get_device_name_by_didvid"],[37,4,1,"","get_vendor_name_by_vid"],[37,4,1,"","print_pci_XROMs"],[37,4,1,"","print_pci_devices"]],"chipsec.hal.pci.Pci":[[37,2,1,"","calc_bar_size"],[37,2,1,"","dump_pci_config"],[37,2,1,"","enumerate_devices"],[37,2,1,"","enumerate_xroms"],[37,2,1,"","find_XROM"],[37,2,1,"","get_DIDVID"],[37,2,1,"","get_device_bars"],[37,2,1,"","get_header_type"],[37,2,1,"","is_enabled"],[37,2,1,"","parse_XROM"],[37,2,1,"","print_pci_config_all"],[37,2,1,"","read_byte"],[37,2,1,"","read_dword"],[37,2,1,"","read_word"],[37,2,1,"","write_byte"],[37,2,1,"","write_dword"],[37,2,1,"","write_word"]],"chipsec.hal.physmem":[[39,1,1,"","Memory"]],"chipsec.hal.physmem.Memory":[[39,2,1,"","alloc_physical_mem"],[39,2,1,"","free_physical_mem"],[39,2,1,"","map_io_space"],[39,2,1,"","read_physical_mem"],[39,2,1,"","read_physical_mem_byte"],[39,2,1,"","read_physical_mem_dword"],[39,2,1,"","read_physical_mem_qword"],[39,2,1,"","read_physical_mem_word"],[39,2,1,"","set_mem_bit"],[39,2,1,"","va2pa"],[39,2,1,"","write_physical_mem"],[39,2,1,"","write_physical_mem_byte"],[39,2,1,"","write_physical_mem_dword"],[39,2,1,"","write_physical_mem_word"]],"chipsec.hal.smbios":[[40,1,1,"","SMBIOS"],[40,1,1,"","SMBIOS_2_x_ENTRY_POINT"],[40,1,1,"","SMBIOS_3_x_ENTRY_POINT"],[40,1,1,"","SMBIOS_BIOS_INFO_2_0"],[40,1,1,"","SMBIOS_STRUCT_HEADER"],[40,1,1,"","SMBIOS_SYSTEM_INFO_2_0"]],"chipsec.hal.smbios.SMBIOS":[[40,2,1,"","find_smbios_table"],[40,2,1,"","get_decoded_structs"],[40,2,1,"","get_header"],[40,2,1,"","get_raw_structs"],[40,2,1,"","get_string_list"]],"chipsec.hal.smbus":[[41,1,1,"","SMBus"]],"chipsec.hal.smbus.SMBus":[[41,2,1,"","display_SMBus_info"],[41,2,1,"","enable_SMBus_host_controller"],[41,2,1,"","get_SMBus_Base_Address"],[41,2,1,"","get_SMBus_HCFG"],[41,2,1,"","is_SMBus_enabled"],[41,2,1,"","is_SMBus_host_controller_enabled"],[41,2,1,"","is_SMBus_supported"],[41,2,1,"","read_byte"],[41,2,1,"","read_range"],[41,2,1,"","reset_SMBus_controller"],[41,2,1,"","write_byte"],[41,2,1,"","write_range"]],"chipsec.hal.spd":[[42,1,1,"","SPD"],[42,1,1,"","SPD_DDR"],[42,1,1,"","SPD_DDR2"],[42,1,1,"","SPD_DDR3"],[42,1,1,"","SPD_DDR4"],[42,4,1,"","SPD_REVISION"],[42,4,1,"","dram_device_type_name"],[42,4,1,"","module_type_name"]],"chipsec.hal.spd.SPD":[[42,2,1,"","decode"],[42,2,1,"","detect"],[42,2,1,"","dump_spd_rom"],[42,2,1,"","getDRAMDeviceType"],[42,2,1,"","getModuleType"],[42,2,1,"","isECC"],[42,2,1,"","isSPDPresent"],[42,2,1,"","read_byte"],[42,2,1,"","read_range"],[42,2,1,"","write_byte"],[42,2,1,"","write_range"]],"chipsec.hal.spi":[[43,1,1,"","SPI"],[43,4,1,"","get_SPI_region"]],"chipsec.hal.spi.SPI":[[43,3,1,"","SpiRegions"],[43,2,1,"","check_hardware_sequencing"],[43,2,1,"","disable_BIOS_write_protection"],[43,2,1,"","display_BIOS_region"],[43,2,1,"","display_BIOS_write_protection"],[43,2,1,"","display_SPI_Flash_Descriptor"],[43,2,1,"","display_SPI_Flash_Regions"],[43,2,1,"","display_SPI_Protected_Ranges"],[43,2,1,"","display_SPI_Ranges_Access_Permissions"],[43,2,1,"","display_SPI_map"],[43,2,1,"","display_SPI_opcode_info"],[43,2,1,"","erase_spi_block"],[43,2,1,"","get_SPI_JEDEC_ID"],[43,2,1,"","get_SPI_JEDEC_ID_decoded"],[43,2,1,"","get_SPI_MMIO_base"],[43,2,1,"","get_SPI_Protected_Range"],[43,2,1,"","get_SPI_SFDP"],[43,2,1,"","get_SPI_region"],[43,2,1,"","get_SPI_regions"],[43,2,1,"","ptmesg"],[43,2,1,"","read_spi"],[43,2,1,"","read_spi_to_file"],[43,2,1,"","spi_reg_read"],[43,2,1,"","spi_reg_write"],[43,2,1,"","write_spi"],[43,2,1,"","write_spi_from_file"]],"chipsec.hal.spi_descriptor":[[44,4,1,"","get_SPI_master"],[44,4,1,"","get_spi_flash_descriptor"],[44,4,1,"","get_spi_regions"],[44,4,1,"","parse_spi_flash_descriptor"]],"chipsec.hal.spi_jedec_ids":[[45,1,1,"","JEDEC_ID"]],"chipsec.hal.spi_jedec_ids.JEDEC_ID":[[45,3,1,"","DEVICE"],[45,3,1,"","MANUFACTURER"]],"chipsec.hal.spi_uefi":[[46,1,1,"","EFIModuleType"],[46,4,1,"","FILENAME"],[46,1,1,"","UUIDEncoder"],[46,4,1,"","build_efi_file_tree"],[46,4,1,"","build_efi_model"],[46,4,1,"","build_efi_modules_tree"],[46,4,1,"","build_efi_tree"],[46,4,1,"","compress_image"],[46,4,1,"","decode_uefi_region"],[46,4,1,"","decompress_section_data"],[46,4,1,"","dump_efi_module"],[46,4,1,"","efi_data_search"],[46,4,1,"","modify_uefi_region"],[46,4,1,"","parse_uefi_region_from_file"],[46,4,1,"","save_efi_tree"],[46,4,1,"","save_efi_tree_filetype"],[46,4,1,"","search_efi_tree"],[46,4,1,"","update_efi_tree"]],"chipsec.hal.spi_uefi.EFIModuleType":[[46,3,1,"","FILE"],[46,3,1,"","FV"],[46,3,1,"","SECTION"],[46,3,1,"","SECTION_EXE"]],"chipsec.hal.spi_uefi.UUIDEncoder":[[46,2,1,"","default"]],"chipsec.hal.tpm":[[47,1,1,"","TPM"],[47,1,1,"","TPM_RESPONSE_HEADER"]],"chipsec.hal.tpm.TPM":[[47,2,1,"","command"],[47,2,1,"","dump_access"],[47,2,1,"","dump_didvid"],[47,2,1,"","dump_intcap"],[47,2,1,"","dump_intenable"],[47,2,1,"","dump_register"],[47,2,1,"","dump_rid"],[47,2,1,"","dump_status"],[47,2,1,"","log_register_header"]],"chipsec.hal.tpm12_commands":[[48,4,1,"","continueselftest"],[48,4,1,"","forceclear"],[48,4,1,"","getcap"],[48,4,1,"","nvread"],[48,4,1,"","pcrread"],[48,4,1,"","startup"]],"chipsec.hal.tpm_eventlog":[[49,1,1,"","EFIFirmwareBlob"],[49,1,1,"","PcrLogParser"],[49,1,1,"","SCRTMVersion"],[49,1,1,"","TcgPcrEvent"],[49,4,1,"","parse"]],"chipsec.hal.tpm_eventlog.PcrLogParser":[[49,2,1,"","next"]],"chipsec.hal.tpm_eventlog.TcgPcrEvent":[[49,2,1,"","parse"]],"chipsec.hal.ucode":[[50,1,1,"","Ucode"],[50,1,1,"","UcodeUpdateHeader"],[50,4,1,"","dump_ucode_update_header"],[50,4,1,"","read_ucode_file"]],"chipsec.hal.ucode.Ucode":[[50,2,1,"","get_cpu_thread_count"],[50,2,1,"","load_ucode_update"],[50,2,1,"","ucode_update_id"],[50,2,1,"","update_ucode"],[50,2,1,"","update_ucode_all_cpus"]],"chipsec.hal.uefi":[[51,1,1,"","UEFI"],[51,4,1,"","decode_EFI_variables"],[51,4,1,"","find_EFI_variable_store"],[51,4,1,"","get_attr_string"],[51,4,1,"","get_auth_attr_string"],[51,4,1,"","identify_EFI_NVRAM"],[51,4,1,"","parse_EFI_variables"],[51,4,1,"","parse_script"],[51,4,1,"","print_efi_variable"],[51,4,1,"","print_sorted_EFI_variables"]],"chipsec.hal.uefi.UEFI":[[51,3,1,"","EfiTable"],[51,2,1,"","delete_EFI_variable"],[51,2,1,"","dump_EFI_tables"],[51,2,1,"","dump_EFI_variables_from_SPI"],[51,2,1,"","find_EFI_BootServices_Table"],[51,2,1,"","find_EFI_Configuration_Table"],[51,2,1,"","find_EFI_DXEServices_Table"],[51,2,1,"","find_EFI_RuntimeServices_Table"],[51,2,1,"","find_EFI_System_Table"],[51,2,1,"","find_EFI_Table"],[51,2,1,"","find_s3_bootscript"],[51,2,1,"","get_EFI_variable"],[51,2,1,"","get_s3_bootscript"],[51,2,1,"","list_EFI_variables"],[51,2,1,"","read_EFI_variables"],[51,2,1,"","read_EFI_variables_from_SPI"],[51,2,1,"","read_EFI_variables_from_file"],[51,2,1,"","set_EFI_variable"],[51,2,1,"","set_EFI_variable_from_file"],[51,2,1,"","set_FWType"]],"chipsec.hal.uefi_common":[[52,1,1,"","EFI_BOOT_SERVICES_TABLE"],[52,1,1,"","EFI_CONFIGURATION_TABLE"],[52,1,1,"","EFI_DXE_SERVICES_TABLE"],[52,4,1,"","EFI_ERROR_STR"],[52,4,1,"","EFI_GUID_STR"],[52,1,1,"","EFI_RUNTIME_SERVICES_TABLE"],[52,1,1,"","EFI_SYSTEM_TABLE"],[52,4,1,"","EFI_SYSTEM_TABLE_REVISION"],[52,1,1,"","EFI_TABLE_HEADER"],[52,1,1,"","EFI_VENDOR_TABLE"],[52,4,1,"","IS_EFI_VARIABLE_AUTHENTICATED"],[52,4,1,"","IS_VARIABLE_ATTRIBUTE"],[52,1,1,"","S3BOOTSCRIPT_ENTRY"],[52,1,1,"","S3BootScriptOpcode"],[52,1,1,"","S3BootScriptOpcode_EdkCompat"],[52,1,1,"","S3BootScriptOpcode_MDE"],[52,1,1,"","S3BootScriptSmbusOperation"],[52,1,1,"","S3BootScriptWidth"],[52,1,1,"","StatusCode"],[52,4,1,"","align"],[52,4,1,"","bit_set"],[52,4,1,"","get_3b_size"],[52,4,1,"","get_nvar_name"],[52,1,1,"","op_dispatch"],[52,1,1,"","op_io_pci_mem"],[52,1,1,"","op_mem_poll"],[52,1,1,"","op_smbus_execute"],[52,1,1,"","op_stall"],[52,1,1,"","op_terminate"],[52,1,1,"","op_unknown"],[52,4,1,"","parse_auth_var"],[52,4,1,"","parse_efivar_file"],[52,4,1,"","parse_esal_var"],[52,4,1,"","parse_external"],[52,4,1,"","parse_pkcs7"],[52,4,1,"","parse_rsa2048"],[52,4,1,"","parse_rsa2048_sha1"],[52,4,1,"","parse_rsa2048_sha256"],[52,4,1,"","parse_sb_db"],[52,4,1,"","parse_sha1"],[52,4,1,"","parse_sha224"],[52,4,1,"","parse_sha256"],[52,4,1,"","parse_sha384"],[52,4,1,"","parse_sha512"],[52,4,1,"","parse_x509"],[52,4,1,"","parse_x509_sha256"],[52,4,1,"","parse_x509_sha384"],[52,4,1,"","parse_x509_sha512"]],"chipsec.hal.uefi_common.EFI_VENDOR_TABLE":[[52,2,1,"","VendorGuid"]],"chipsec.hal.uefi_common.S3BootScriptOpcode":[[52,3,1,"","EFI_BOOT_SCRIPT_DISPATCH_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_IO_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_STALL_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_TERMINATE_OPCODE"]],"chipsec.hal.uefi_common.S3BootScriptOpcode_EdkCompat":[[52,3,1,"","EFI_BOOT_SCRIPT_INFORMATION_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_MEM_POLL_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_TABLE_OPCODE"]],"chipsec.hal.uefi_common.S3BootScriptOpcode_MDE":[[52,3,1,"","EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_INFORMATION_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_IO_POLL_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_MEM_POLL_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG2_POLL_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG2_READ_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG2_WRITE_OPCODE"],[52,3,1,"","EFI_BOOT_SCRIPT_PCI_CONFIG_POLL_OPCODE"]],"chipsec.hal.uefi_common.S3BootScriptSmbusOperation":[[52,3,1,"","BWBR_PROCESS_CALL"],[52,3,1,"","PROCESS_CALL"],[52,3,1,"","QUICK_READ"],[52,3,1,"","QUICK_WRITE"],[52,3,1,"","READ_BLOCK"],[52,3,1,"","READ_BYTE"],[52,3,1,"","READ_WORD"],[52,3,1,"","RECEIVE_BYTE"],[52,3,1,"","SEND_BYTE"],[52,3,1,"","WRITE_BLOCK"],[52,3,1,"","WRITE_BYTE"],[52,3,1,"","WRITE_WORD"]],"chipsec.hal.uefi_common.S3BootScriptWidth":[[52,3,1,"","EFI_BOOT_SCRIPT_WIDTH_UINT16"],[52,3,1,"","EFI_BOOT_SCRIPT_WIDTH_UINT32"],[52,3,1,"","EFI_BOOT_SCRIPT_WIDTH_UINT64"],[52,3,1,"","EFI_BOOT_SCRIPT_WIDTH_UINT8"]],"chipsec.hal.uefi_common.StatusCode":[[52,3,1,"","EFI_ABORTED"],[52,3,1,"","EFI_ACCESS_DENIED"],[52,3,1,"","EFI_ALREADY_STARTED"],[52,3,1,"","EFI_BAD_BUFFER_SIZE"],[52,3,1,"","EFI_BUFFER_TOO_SMALL"],[52,3,1,"","EFI_COMPROMISED_DATA"],[52,3,1,"","EFI_CRC_ERROR"],[52,3,1,"","EFI_DEVICE_ERROR"],[52,3,1,"","EFI_END_OF_FILE"],[52,3,1,"","EFI_END_OF_MEDIA"],[52,3,1,"","EFI_HTTP_ERROR"],[52,3,1,"","EFI_ICMP_ERROR"],[52,3,1,"","EFI_INCOMPATIBLE_VERSION"],[52,3,1,"","EFI_INVALID_LANGUAGE"],[52,3,1,"","EFI_INVALID_PARAMETER"],[52,3,1,"","EFI_LOAD_ERROR"],[52,3,1,"","EFI_MEDIA_CHANGED"],[52,3,1,"","EFI_NOT_FOUND"],[52,3,1,"","EFI_NOT_READY"],[52,3,1,"","EFI_NOT_STARTED"],[52,3,1,"","EFI_NO_MAPPING"],[52,3,1,"","EFI_NO_MEDIA"],[52,3,1,"","EFI_NO_RESPONSE"],[52,3,1,"","EFI_OUT_OF_RESOURCES"],[52,3,1,"","EFI_PROTOCOL_ERROR"],[52,3,1,"","EFI_SECURITY_VIOLATION"],[52,3,1,"","EFI_SUCCESS"],[52,3,1,"","EFI_TFTP_ERROR"],[52,3,1,"","EFI_TIMEOUT"],[52,3,1,"","EFI_UNSUPPORTED"],[52,3,1,"","EFI_VOLUME_CORRUPTED"],[52,3,1,"","EFI_VOLUME_FULL"],[52,3,1,"","EFI_WRITE_PROTECTED"]],"chipsec.hal.uefi_compression":[[53,1,1,"","UEFICompression"]],"chipsec.hal.uefi_compression.UEFICompression":[[53,2,1,"","compress_EFI_binary"],[53,2,1,"","decompress_EFI_binary"],[53,3,1,"","decompression_oder_type1"],[53,3,1,"","decompression_oder_type2"],[53,2,1,"","rotate_list"],[53,2,1,"","unknown_decompress"],[53,2,1,"","unknown_efi_decompress"]],"chipsec.hal.uefi_fv":[[54,4,1,"","DecodeSection"],[54,1,1,"","EFI_FILE"],[54,1,1,"","EFI_FV"],[54,1,1,"","EFI_MODULE"],[54,1,1,"","EFI_SECTION"],[54,4,1,"","FvChecksum16"],[54,4,1,"","FvChecksum8"],[54,4,1,"","FvSum16"],[54,4,1,"","FvSum8"],[54,4,1,"","GetFvHeader"],[54,4,1,"","NextFwFile"],[54,4,1,"","NextFwFileSection"],[54,4,1,"","NextFwVolume"],[54,4,1,"","ValidateFwVolumeHeader"],[54,4,1,"","align_image"],[54,4,1,"","assemble_uefi_file"],[54,4,1,"","assemble_uefi_raw"],[54,4,1,"","assemble_uefi_section"],[54,4,1,"","get_guid_bin"]],"chipsec.hal.uefi_fv.EFI_MODULE":[[54,2,1,"","calc_hashes"],[54,2,1,"","name"]],"chipsec.hal.uefi_fv.EFI_SECTION":[[54,2,1,"","name"]],"chipsec.hal.uefi_platform":[[55,1,1,"","EFI_HDR_NVAR1"],[55,1,1,"","EFI_HDR_VSS"],[55,1,1,"","EFI_HDR_VSS_APPLE"],[55,1,1,"","EFI_HDR_VSS_AUTH"],[55,4,1,"","EFIvar_EVSA"],[55,1,1,"","FWType"],[55,4,1,"","IS_VARIABLE_STATE"],[55,1,1,"","S3BootScriptType"],[55,1,1,"","UEFI_VARIABLE_HEADER"],[55,5,1,"","UEFI_VARIABLE_STORE_HEADER_SIZE"],[55,1,1,"","VARIABLE_STORE_HEADER_VSS"],[55,1,1,"","VARIABLE_STORE_HEADER_VSS2"],[55,4,1,"","create_s3bootscript_entry_buffer"],[55,4,1,"","decode_s3bs_opcode"],[55,4,1,"","decode_s3bs_opcode_def"],[55,4,1,"","decode_s3bs_opcode_edkcompat"],[55,4,1,"","encode_s3bootscript_entry"],[55,4,1,"","encode_s3bs_opcode"],[55,4,1,"","encode_s3bs_opcode_def"],[55,4,1,"","encode_s3bs_opcode_edkcompat"],[55,4,1,"","getEFIvariables_NVAR"],[55,4,1,"","getEFIvariables_NVAR_simple"],[55,4,1,"","getEFIvariables_UEFI"],[55,4,1,"","getEFIvariables_UEFI_AUTH"],[55,4,1,"","getEFIvariables_VSS"],[55,4,1,"","getEFIvariables_VSS2"],[55,4,1,"","getEFIvariables_VSS2_AUTH"],[55,4,1,"","getEFIvariables_VSS_APPLE"],[55,4,1,"","getEFIvariables_VSS_AUTH"],[55,4,1,"","getNVstore_EFI"],[55,4,1,"","getNVstore_EFI_AUTH"],[55,4,1,"","getNVstore_EVSA"],[55,4,1,"","getNVstore_NVAR"],[55,4,1,"","getNVstore_NVAR_simple"],[55,4,1,"","getNVstore_VSS"],[55,4,1,"","getNVstore_VSS2"],[55,4,1,"","getNVstore_VSS2_AUTH"],[55,4,1,"","getNVstore_VSS_APPLE"],[55,4,1,"","getNVstore_VSS_AUTH"],[55,4,1,"","id_s3bootscript_type"],[55,4,1,"","isCorrectVSStype"],[55,4,1,"","parse_s3bootscript_entry"]],"chipsec.hal.uefi_platform.FWType":[[55,3,1,"","EFI_FW_TYPE_EVSA"],[55,3,1,"","EFI_FW_TYPE_NVAR"],[55,3,1,"","EFI_FW_TYPE_UEFI"],[55,3,1,"","EFI_FW_TYPE_UEFI_AUTH"],[55,3,1,"","EFI_FW_TYPE_VSS"],[55,3,1,"","EFI_FW_TYPE_VSS2"],[55,3,1,"","EFI_FW_TYPE_VSS2_AUTH"],[55,3,1,"","EFI_FW_TYPE_VSS_APPLE"],[55,3,1,"","EFI_FW_TYPE_VSS_AUTH"]],"chipsec.hal.uefi_platform.S3BootScriptType":[[55,3,1,"","EFI_BOOT_SCRIPT_TYPE_DEFAULT"],[55,3,1,"","EFI_BOOT_SCRIPT_TYPE_EDKCOMPAT"]],"chipsec.hal.uefi_search":[[56,4,1,"","check_match_criteria"],[56,4,1,"","check_rules"]],"chipsec.hal.virtmem":[[57,1,1,"","VirtMemory"]],"chipsec.hal.virtmem.VirtMemory":[[57,2,1,"","alloc_virtual_mem"],[57,2,1,"","free_virtual_mem"],[57,2,1,"","read_virtual_mem"],[57,2,1,"","read_virtual_mem_byte"],[57,2,1,"","read_virtual_mem_dword"],[57,2,1,"","read_virtual_mem_word"],[57,2,1,"","va2pa"],[57,2,1,"","write_virtual_mem"],[57,2,1,"","write_virtual_mem_byte"],[57,2,1,"","write_virtual_mem_dword"],[57,2,1,"","write_virtual_mem_word"]],"chipsec.hal.vmm":[[58,1,1,"","VMM"],[58,1,1,"","VirtIO_Device"],[58,4,1,"","get_virtio_devices"]],"chipsec.hal.vmm.VMM":[[58,2,1,"","dump_EPT_page_tables"],[58,2,1,"","hypercall"],[58,2,1,"","hypercall64_extended_fast"],[58,2,1,"","hypercall64_fast"],[58,2,1,"","hypercall64_five_args"],[58,2,1,"","hypercall64_memory_based"],[58,2,1,"","init"]],"chipsec.hal.vmm.VirtIO_Device":[[58,2,1,"","dump_device"]],"chipsec.helper":[[60,0,0,"-","basehelper"],[61,0,0,"-","dal"],[63,0,0,"-","efi"],[65,0,0,"-","linux"],[67,0,0,"-","linuxnative"],[71,0,0,"-","nonehelper"],[72,0,0,"-","oshelper"],[73,0,0,"-","windows"]],"chipsec.helper.basehelper":[[60,1,1,"","Helper"]],"chipsec.helper.basehelper.Helper":[[60,2,1,"","EFI_supported"],[60,2,1,"","alloc_phys_mem"],[60,2,1,"","cpuid"],[60,2,1,"","create"],[60,2,1,"","delete"],[60,2,1,"","delete_EFI_variable"],[60,2,1,"","free_phys_mem"],[60,2,1,"","get_ACPI_SDT"],[60,2,1,"","get_ACPI_table"],[60,2,1,"","get_EFI_variable"],[60,2,1,"","get_affinity"],[60,2,1,"","get_descriptor_table"],[60,2,1,"","get_info"],[60,2,1,"","get_threads_count"],[60,2,1,"","hypercall"],[60,2,1,"","list_EFI_variables"],[60,2,1,"","load_ucode_update"],[60,2,1,"","map_io_space"],[60,2,1,"","msgbus_send_message"],[60,2,1,"","msgbus_send_read_message"],[60,2,1,"","msgbus_send_write_message"],[60,2,1,"","read_cr"],[60,2,1,"","read_io_port"],[60,2,1,"","read_mmio_reg"],[60,2,1,"","read_msr"],[60,2,1,"","read_pci_reg"],[60,2,1,"","read_phys_mem"],[60,2,1,"","retpoline_enabled"],[60,2,1,"","send_sw_smi"],[60,2,1,"","set_EFI_variable"],[60,2,1,"","set_affinity"],[60,2,1,"","start"],[60,2,1,"","stop"],[60,2,1,"","va2pa"],[60,2,1,"","write_cr"],[60,2,1,"","write_io_port"],[60,2,1,"","write_mmio_reg"],[60,2,1,"","write_msr"],[60,2,1,"","write_pci_reg"],[60,2,1,"","write_phys_mem"]],"chipsec.helper.dal":[[62,0,0,"-","dalhelper"]],"chipsec.helper.dal.dalhelper":[[62,1,1,"","DALHelper"],[62,4,1,"","get_helper"]],"chipsec.helper.dal.dalhelper.DALHelper":[[62,2,1,"","EFI_supported"],[62,2,1,"","alloc_phys_mem"],[62,2,1,"","cpuid"],[62,2,1,"","create"],[62,2,1,"","dal_version"],[62,2,1,"","delete"],[62,2,1,"","delete_EFI_variable"],[62,2,1,"","find_thread"],[62,2,1,"","free_phys_mem"],[62,2,1,"","get_ACPI_SDT"],[62,2,1,"","get_ACPI_table"],[62,2,1,"","get_EFI_variable"],[62,2,1,"","get_affinity"],[62,2,1,"","get_descriptor_table"],[62,2,1,"","get_threads_count"],[62,2,1,"","get_tool_info"],[62,2,1,"","hypercall"],[62,2,1,"","list_EFI_variables"],[62,2,1,"","load_ucode_update"],[62,2,1,"","map_io_space"],[62,2,1,"","msgbus_send_message"],[62,2,1,"","msgbus_send_read_message"],[62,2,1,"","msgbus_send_write_message"],[62,2,1,"","pci_addr"],[62,2,1,"","read_cr"],[62,2,1,"","read_io_port"],[62,2,1,"","read_mmio_reg"],[62,2,1,"","read_msr"],[62,2,1,"","read_pci_reg"],[62,2,1,"","read_phys_mem"],[62,2,1,"","retpoline_enabled"],[62,2,1,"","send_sw_smi"],[62,2,1,"","set_EFI_variable"],[62,2,1,"","set_affinity"],[62,2,1,"","start"],[62,2,1,"","stop"],[62,2,1,"","target_machine"],[62,2,1,"","va2pa"],[62,2,1,"","write_cr"],[62,2,1,"","write_io_port"],[62,2,1,"","write_mmio_reg"],[62,2,1,"","write_msr"],[62,2,1,"","write_pci_reg"],[62,2,1,"","write_phys_mem"]],"chipsec.helper.efi":[[64,0,0,"-","efihelper"]],"chipsec.helper.efi.efihelper":[[64,1,1,"","EfiHelper"],[64,4,1,"","get_helper"]],"chipsec.helper.efi.efihelper.EfiHelper":[[64,2,1,"","EFI_supported"],[64,2,1,"","alloc_phys_mem"],[64,2,1,"","cpuid"],[64,2,1,"","create"],[64,2,1,"","delete"],[64,2,1,"","delete_EFI_variable"],[64,2,1,"","free_phys_mem"],[64,2,1,"","get_ACPI_SDT"],[64,2,1,"","get_ACPI_table"],[64,2,1,"","get_EFI_variable"],[64,2,1,"","get_EFI_variable_full"],[64,2,1,"","get_affinity"],[64,2,1,"","get_descriptor_table"],[64,2,1,"","get_threads_count"],[64,2,1,"","get_tool_info"],[64,2,1,"","hypercall"],[64,2,1,"","list_EFI_variables"],[64,2,1,"","load_ucode_update"],[64,2,1,"","map_io_space"],[64,2,1,"","msgbus_send_message"],[64,2,1,"","msgbus_send_read_message"],[64,2,1,"","msgbus_send_write_message"],[64,2,1,"","pa2va"],[64,2,1,"","read_cr"],[64,2,1,"","read_io_port"],[64,2,1,"","read_mmio_reg"],[64,2,1,"","read_msr"],[64,2,1,"","read_pci_reg"],[64,2,1,"","read_phys_mem"],[64,2,1,"","retpoline_enabled"],[64,2,1,"","send_sw_smi"],[64,2,1,"","set_EFI_variable"],[64,2,1,"","set_affinity"],[64,2,1,"","split_address"],[64,2,1,"","start"],[64,2,1,"","stop"],[64,2,1,"","va2pa"],[64,2,1,"","write_cr"],[64,2,1,"","write_io_port"],[64,2,1,"","write_mmio_reg"],[64,2,1,"","write_msr"],[64,2,1,"","write_pci_reg"],[64,2,1,"","write_phys_mem"]],"chipsec.helper.linux":[[66,0,0,"-","linuxhelper"]],"chipsec.helper.linux.linuxhelper":[[66,1,1,"","LinuxHelper"],[66,4,1,"","get_helper"]],"chipsec.helper.linux.linuxhelper.LinuxHelper":[[66,3,1,"","DEVICE_NAME"],[66,3,1,"","DEV_MEM"],[66,3,1,"","DEV_PORT"],[66,3,1,"","DKMS_DIR"],[66,2,1,"","EFI_supported"],[66,3,1,"","MODULE_NAME"],[66,3,1,"","SUPPORT_KERNEL26_GET_PAGE_IS_RAM"],[66,3,1,"","SUPPORT_KERNEL26_GET_PHYS_MEM_ACCESS_PROT"],[66,2,1,"","alloc_phys_mem"],[66,2,1,"","close"],[66,2,1,"","compute_ioctlbase"],[66,2,1,"","cpuid"],[66,2,1,"","create"],[66,2,1,"","delete"],[66,2,1,"","delete_EFI_variable"],[66,2,1,"","free_phys_mem"],[66,2,1,"","get_ACPI_SDT"],[66,2,1,"","get_ACPI_table"],[66,2,1,"","get_EFI_variable"],[66,2,1,"","get_affinity"],[66,2,1,"","get_descriptor_table"],[66,2,1,"","get_dkms_module_location"],[66,2,1,"","get_page_is_ram"],[66,2,1,"","get_phys_mem_access_prot"],[66,2,1,"","get_threads_count"],[66,2,1,"","get_tool_info"],[66,2,1,"","hypercall"],[66,2,1,"","init"],[66,2,1,"","ioctl"],[66,2,1,"","kern_get_EFI_variable"],[66,2,1,"","kern_get_EFI_variable_full"],[66,2,1,"","kern_list_EFI_variables"],[66,2,1,"","kern_set_EFI_variable"],[66,2,1,"","list_EFI_variables"],[66,2,1,"","load_chipsec_module"],[66,2,1,"","load_ucode_update"],[66,2,1,"","map_io_space"],[66,2,1,"","msgbus_send_message"],[66,2,1,"","msgbus_send_read_message"],[66,2,1,"","msgbus_send_write_message"],[66,2,1,"","read_cr"],[66,2,1,"","read_io_port"],[66,2,1,"","read_mmio_reg"],[66,2,1,"","read_msr"],[66,2,1,"","read_pci_reg"],[66,2,1,"","read_phys_mem"],[66,2,1,"","retpoline_enabled"],[66,2,1,"","send_sw_smi"],[66,2,1,"","set_EFI_variable"],[66,2,1,"","set_affinity"],[66,2,1,"","start"],[66,2,1,"","stop"],[66,2,1,"","unload_chipsec_module"],[66,2,1,"","va2pa"],[66,2,1,"","write_cr"],[66,2,1,"","write_io_port"],[66,2,1,"","write_mmio_reg"],[66,2,1,"","write_msr"],[66,2,1,"","write_pci_reg"],[66,2,1,"","write_phys_mem"]],"chipsec.helper.linuxnative":[[68,0,0,"-","cpuid"],[69,0,0,"-","legacy_pci"],[70,0,0,"-","linuxnativehelper"]],"chipsec.helper.linuxnative.cpuid":[[68,1,1,"","CPUID"],[68,1,1,"","CPUID_struct"]],"chipsec.helper.linuxnative.cpuid.CPUID_struct":[[68,3,1,"","eax"],[68,3,1,"","ebx"],[68,3,1,"","ecx"],[68,3,1,"","edx"]],"chipsec.helper.linuxnative.legacy_pci":[[69,1,1,"","LegacyPci"],[69,1,1,"","Ports"]],"chipsec.helper.linuxnative.legacy_pci.LegacyPci":[[69,2,1,"","read_pci_config"],[69,2,1,"","write_pci_config"]],"chipsec.helper.linuxnative.legacy_pci.Ports":[[69,2,1,"","get_instance"],[69,2,1,"","inl"],[69,3,1,"","instance"],[69,2,1,"","outl"]],"chipsec.helper.linuxnative.linuxnativehelper":[[70,1,1,"","LinuxNativeHelper"],[70,1,1,"","MemoryMapping"],[70,4,1,"","get_helper"]],"chipsec.helper.linuxnative.linuxnativehelper.LinuxNativeHelper":[[70,3,1,"","DEV_MEM"],[70,3,1,"","DEV_PORT"],[70,2,1,"","EFI_supported"],[70,2,1,"","alloc_phys_mem"],[70,2,1,"","close"],[70,2,1,"","cpuid"],[70,2,1,"","create"],[70,2,1,"","delete"],[70,2,1,"","delete_EFI_variable"],[70,2,1,"","devmem_available"],[70,2,1,"","devmsr_available"],[70,2,1,"","devport_available"],[70,2,1,"","free_phys_mem"],[70,2,1,"","get_ACPI_SDT"],[70,2,1,"","get_ACPI_table"],[70,2,1,"","get_EFI_variable"],[70,2,1,"","get_affinity"],[70,2,1,"","get_bios_version"],[70,2,1,"","get_descriptor_table"],[70,2,1,"","get_threads_count"],[70,2,1,"","hypercall"],[70,2,1,"","init"],[70,2,1,"","list_EFI_variables"],[70,2,1,"","load_ucode_update"],[70,2,1,"","map_io_space"],[70,2,1,"","memory_mapping"],[70,2,1,"","msgbus_send_message"],[70,2,1,"","msgbus_send_read_message"],[70,2,1,"","msgbus_send_write_message"],[70,2,1,"","read_cr"],[70,2,1,"","read_io_port"],[70,2,1,"","read_mmio_reg"],[70,2,1,"","read_msr"],[70,2,1,"","read_pci_reg"],[70,2,1,"","read_phys_mem"],[70,2,1,"","retpoline_enabled"],[70,2,1,"","send_sw_smi"],[70,2,1,"","set_EFI_variable"],[70,2,1,"","set_affinity"],[70,2,1,"","start"],[70,2,1,"","stop"],[70,2,1,"","va2pa"],[70,2,1,"","write_cr"],[70,2,1,"","write_io_port"],[70,2,1,"","write_mmio_reg"],[70,2,1,"","write_msr"],[70,2,1,"","write_pci_reg"],[70,2,1,"","write_phys_mem"]],"chipsec.helper.nonehelper":[[71,1,1,"","NoneHelper"]],"chipsec.helper.nonehelper.NoneHelper":[[71,2,1,"","EFI_supported"],[71,2,1,"","alloc_phys_mem"],[71,2,1,"","cpuid"],[71,2,1,"","create"],[71,2,1,"","delete"],[71,2,1,"","delete_EFI_variable"],[71,2,1,"","free_phys_mem"],[71,2,1,"","get_ACPI_SDT"],[71,2,1,"","get_ACPI_table"],[71,2,1,"","get_EFI_variable"],[71,2,1,"","get_affinity"],[71,2,1,"","get_descriptor_table"],[71,2,1,"","get_info"],[71,2,1,"","get_threads_count"],[71,2,1,"","hypercall"],[71,2,1,"","list_EFI_variables"],[71,2,1,"","load_ucode_update"],[71,2,1,"","map_io_space"],[71,2,1,"","msgbus_send_message"],[71,2,1,"","msgbus_send_read_message"],[71,2,1,"","msgbus_send_write_message"],[71,2,1,"","read_cr"],[71,2,1,"","read_io_port"],[71,2,1,"","read_mmio_reg"],[71,2,1,"","read_msr"],[71,2,1,"","read_pci_reg"],[71,2,1,"","read_phys_mem"],[71,2,1,"","retpoline_enabled"],[71,2,1,"","send_sw_smi"],[71,2,1,"","set_EFI_variable"],[71,2,1,"","set_affinity"],[71,2,1,"","start"],[71,2,1,"","stop"],[71,2,1,"","va2pa"],[71,2,1,"","write_cr"],[71,2,1,"","write_io_port"],[71,2,1,"","write_mmio_reg"],[71,2,1,"","write_msr"],[71,2,1,"","write_pci_reg"],[71,2,1,"","write_phys_mem"]],"chipsec.helper.oshelper":[[72,1,1,"","OsHelper"],[72,4,1,"","get_tools_path"],[72,4,1,"","helper"]],"chipsec.helper.oshelper.OsHelper":[[72,2,1,"","get_available_helpers"],[72,2,1,"","get_base_helper"],[72,2,1,"","get_default_helper"],[72,2,1,"","get_helper"],[72,2,1,"","getcwd"],[72,2,1,"","is_dal"],[72,2,1,"","is_efi"],[72,2,1,"","is_linux"],[72,2,1,"","is_macos"],[72,2,1,"","is_win8_or_greater"],[72,2,1,"","is_windows"],[72,2,1,"","load_helpers"]],"chipsec.helper.windows":[[74,0,0,"-","windowshelper"]],"chipsec.helper.windows.windowshelper":[[74,4,1,"","CTL_CODE"],[74,1,1,"","EFI_HDR_WIN"],[74,1,1,"","PCI_BDF"],[74,1,1,"","WindowsHelper"],[74,4,1,"","getEFIvariables_NtEnumerateSystemEnvironmentValuesEx2"],[74,4,1,"","get_helper"],[74,4,1,"","packl_ctypes"]],"chipsec.helper.windows.windowshelper.PCI_BDF":[[74,3,1,"","BUS"],[74,3,1,"","DEV"],[74,3,1,"","FUNC"],[74,3,1,"","OFF"]],"chipsec.helper.windows.windowshelper.WindowsHelper":[[74,2,1,"","EFI_supported"],[74,2,1,"","alloc_phys_mem"],[74,2,1,"","check_driver_handle"],[74,2,1,"","cpuid"],[74,2,1,"","create"],[74,2,1,"","delete"],[74,2,1,"","delete_EFI_variable"],[74,2,1,"","free_phys_mem"],[74,2,1,"","get_ACPI_SDT"],[74,2,1,"","get_ACPI_table"],[74,2,1,"","get_EFI_variable"],[74,2,1,"","get_EFI_variable_full"],[74,2,1,"","get_affinity"],[74,2,1,"","get_descriptor_table"],[74,2,1,"","get_threads_count"],[74,2,1,"","hypercall"],[74,2,1,"","list_EFI_variables"],[74,2,1,"","load_ucode_update"],[74,2,1,"","map_io_space"],[74,2,1,"","msgbus_send_message"],[74,2,1,"","msgbus_send_read_message"],[74,2,1,"","msgbus_send_write_message"],[74,2,1,"","native_get_ACPI_table"],[74,2,1,"","read_cr"],[74,2,1,"","read_io_port"],[74,2,1,"","read_mmio_reg"],[74,2,1,"","read_msr"],[74,2,1,"","read_pci_reg"],[74,2,1,"","read_phys_mem"],[74,2,1,"","retpoline_enabled"],[74,2,1,"","send_sw_smi"],[74,2,1,"","set_EFI_variable"],[74,2,1,"","set_affinity"],[74,2,1,"","show_warning"],[74,2,1,"","start"],[74,2,1,"","stop"],[74,2,1,"","va2pa"],[74,2,1,"","write_cr"],[74,2,1,"","write_io_port"],[74,2,1,"","write_mmio_reg"],[74,2,1,"","write_msr"],[74,2,1,"","write_pci_reg"],[74,2,1,"","write_phys_mem"]],"chipsec.library":[[76,0,0,"-","architecture"],[77,0,0,"-","bits"],[78,0,0,"-","memory"],[79,0,0,"-","strings"],[80,0,0,"-","structs"],[81,0,0,"-","types"]],"chipsec.library.architecture":[[76,1,1,"","ARCH_VID"]],"chipsec.library.architecture.ARCH_VID":[[76,3,1,"","AMD"],[76,3,1,"","INTEL"]],"chipsec.library.bits":[[77,4,1,"","bit"],[77,4,1,"","get_bits"],[77,4,1,"","is_all_ones"],[77,4,1,"","is_set"],[77,4,1,"","ones_complement"],[77,4,1,"","scan_single_bit_mask"]],"chipsec.library.strings":[[79,4,1,"","bytestostring"],[79,4,1,"","get_datetime_str"],[79,4,1,"","is_hex"],[79,4,1,"","is_printable"],[79,4,1,"","stringtobytes"]],"chipsec.library.structs":[[80,4,1,"","DB"],[80,4,1,"","DD"],[80,4,1,"","DQ"],[80,4,1,"","DW"],[80,4,1,"","pack1"],[80,4,1,"","unpack1"]],"chipsec.modules":[[83,0,0,"-","bdw"],[84,0,0,"-","byt"],[85,0,0,"-","common"],[117,0,0,"-","hsw"],[118,0,0,"-","ivb"],[119,0,0,"-","snb"]],"chipsec.modules.common":[[86,0,0,"-","bios_kbrd_buffer"],[87,0,0,"-","bios_smi"],[88,0,0,"-","bios_ts"],[89,0,0,"-","bios_wp"],[90,0,0,"-","cet"],[91,0,0,"-","cpu"],[95,0,0,"-","debugenabled"],[96,0,0,"-","ia32cfg"],[97,0,0,"-","me_mfg_mode"],[98,0,0,"-","memconfig"],[99,0,0,"-","memlock"],[100,0,0,"-","remap"],[102,0,0,"-","secureboot"],[104,0,0,"-","sgx_check"],[105,0,0,"-","smm"],[106,0,0,"-","smm_code_chk"],[107,0,0,"-","smm_dma"],[108,0,0,"-","smrr"],[109,0,0,"-","spd_wd"],[110,0,0,"-","spi_access"],[111,0,0,"-","spi_desc"],[112,0,0,"-","spi_fdopss"],[113,0,0,"-","spi_lock"],[114,0,0,"-","uefi"]],"chipsec.modules.common.bios_kbrd_buffer":[[86,1,1,"","bios_kbrd_buffer"]],"chipsec.modules.common.bios_kbrd_buffer.bios_kbrd_buffer":[[86,2,1,"","check_BIOS_keyboard_buffer"],[86,2,1,"","is_supported"],[86,2,1,"","run"]],"chipsec.modules.common.bios_smi":[[87,1,1,"","bios_smi"]],"chipsec.modules.common.bios_smi.bios_smi":[[87,2,1,"","check_SMI_locks"],[87,2,1,"","is_supported"],[87,2,1,"","run"]],"chipsec.modules.common.bios_ts":[[88,1,1,"","bios_ts"]],"chipsec.modules.common.bios_ts.bios_ts":[[88,2,1,"","check_bios_iface_lock"],[88,2,1,"","is_supported"],[88,2,1,"","run"]],"chipsec.modules.common.bios_wp":[[89,1,1,"","bios_wp"]],"chipsec.modules.common.bios_wp.bios_wp":[[89,2,1,"","check_BIOS_write_protection"],[89,2,1,"","check_SPI_protected_ranges"],[89,2,1,"","is_supported"],[89,2,1,"","run"]],"chipsec.modules.common.cet":[[90,1,1,"","cet"]],"chipsec.modules.common.cet.cet":[[90,2,1,"","check_cet"],[90,2,1,"","get_cpuid_value"],[90,2,1,"","is_supported"],[90,2,1,"","print_cet_state"],[90,2,1,"","run"],[90,2,1,"","setting_enabled"],[90,2,1,"","support_ibt"],[90,2,1,"","support_shadow"]],"chipsec.modules.common.cpu":[[92,0,0,"-","cpu_info"],[93,0,0,"-","ia_untrusted"],[94,0,0,"-","spectre_v2"]],"chipsec.modules.common.cpu.cpu_info":[[92,1,1,"","cpu_info"]],"chipsec.modules.common.cpu.cpu_info.cpu_info":[[92,2,1,"","is_supported"],[92,2,1,"","run"]],"chipsec.modules.common.cpu.ia_untrusted":[[93,1,1,"","ia_untrusted"]],"chipsec.modules.common.cpu.ia_untrusted.ia_untrusted":[[93,2,1,"","check_untrusted"],[93,2,1,"","is_supported"],[93,2,1,"","run"]],"chipsec.modules.common.cpu.spectre_v2":[[94,1,1,"","spectre_v2"]],"chipsec.modules.common.cpu.spectre_v2.spectre_v2":[[94,2,1,"","check_spectre_mitigations"],[94,2,1,"","is_supported"],[94,2,1,"","run"]],"chipsec.modules.common.debugenabled":[[95,1,1,"","debugenabled"]],"chipsec.modules.common.debugenabled.debugenabled":[[95,2,1,"","check_cpu_debug_enable"],[95,2,1,"","check_dci"],[95,2,1,"","is_supported"],[95,2,1,"","run"]],"chipsec.modules.common.ia32cfg":[[96,1,1,"","ia32cfg"]],"chipsec.modules.common.ia32cfg.ia32cfg":[[96,2,1,"","check_ia32feature_control"],[96,2,1,"","is_supported"],[96,2,1,"","run"]],"chipsec.modules.common.me_mfg_mode":[[97,1,1,"","me_mfg_mode"]],"chipsec.modules.common.me_mfg_mode.me_mfg_mode":[[97,2,1,"","check_me_mfg_mode"],[97,2,1,"","is_supported"],[97,2,1,"","run"]],"chipsec.modules.common.memconfig":[[98,1,1,"","memconfig"]],"chipsec.modules.common.memconfig.memconfig":[[98,2,1,"","check_memmap_locks"],[98,2,1,"","is_supported"],[98,2,1,"","run"]],"chipsec.modules.common.memlock":[[99,1,1,"","memlock"]],"chipsec.modules.common.memlock.memlock":[[99,2,1,"","check_MSR_LT_LOCK_MEMORY"],[99,2,1,"","is_supported"],[99,2,1,"","run"]],"chipsec.modules.common.remap":[[100,1,1,"","remap"]],"chipsec.modules.common.remap.remap":[[100,2,1,"","check_remap_config"],[100,2,1,"","is_ibecc_enabled"],[100,2,1,"","is_supported"],[100,2,1,"","run"]],"chipsec.modules.common.secureboot":[[103,0,0,"-","variables"]],"chipsec.modules.common.secureboot.variables":[[103,1,1,"","variables"]],"chipsec.modules.common.secureboot.variables.variables":[[103,2,1,"","can_modify"],[103,2,1,"","check_secureboot_variable_attributes"],[103,2,1,"","is_supported"],[103,2,1,"","run"]],"chipsec.modules.common.sgx_check":[[104,1,1,"","sgx_check"]],"chipsec.modules.common.sgx_check.sgx_check":[[104,1,1,"","PRMRR"],[104,2,1,"","check_prmrr_values"],[104,2,1,"","check_sgx_config"],[104,2,1,"","is_supported"],[104,2,1,"","run"]],"chipsec.modules.common.sgx_check.sgx_check.PRMRR":[[104,2,1,"","reset_variables"]],"chipsec.modules.common.smm":[[105,1,1,"","smm"]],"chipsec.modules.common.smm.smm":[[105,2,1,"","check_SMRAMC"],[105,2,1,"","is_supported"],[105,2,1,"","run"]],"chipsec.modules.common.smm_code_chk":[[106,1,1,"","smm_code_chk"]],"chipsec.modules.common.smm_code_chk.smm_code_chk":[[106,2,1,"","check_SMM_Code_Chk_En"],[106,2,1,"","is_supported"],[106,2,1,"","run"]],"chipsec.modules.common.smm_dma":[[107,1,1,"","smm_dma"]],"chipsec.modules.common.smm_dma.smm_dma":[[107,2,1,"","check_tseg_config"],[107,2,1,"","check_tseg_locks"],[107,2,1,"","is_supported"],[107,2,1,"","run"]],"chipsec.modules.common.smrr":[[108,1,1,"","smrr"]],"chipsec.modules.common.smrr.smrr":[[108,2,1,"","check_SMRR"],[108,2,1,"","is_supported"],[108,2,1,"","run"]],"chipsec.modules.common.spd_wd":[[109,1,1,"","spd_wd"]],"chipsec.modules.common.spd_wd.spd_wd":[[109,2,1,"","check_spd_wd"],[109,2,1,"","is_supported"],[109,2,1,"","run"]],"chipsec.modules.common.spi_access":[[110,1,1,"","spi_access"]],"chipsec.modules.common.spi_access.spi_access":[[110,2,1,"","check_flash_access_permissions"],[110,2,1,"","is_supported"],[110,2,1,"","run"]],"chipsec.modules.common.spi_desc":[[111,1,1,"","spi_desc"]],"chipsec.modules.common.spi_desc.spi_desc":[[111,2,1,"","check_flash_access_permissions"],[111,2,1,"","is_supported"],[111,2,1,"","run"]],"chipsec.modules.common.spi_fdopss":[[112,1,1,"","spi_fdopss"]],"chipsec.modules.common.spi_fdopss.spi_fdopss":[[112,2,1,"","check_fd_security_override_strap"],[112,2,1,"","is_supported"],[112,2,1,"","run"]],"chipsec.modules.common.spi_lock":[[113,1,1,"","spi_lock"]],"chipsec.modules.common.spi_lock.spi_lock":[[113,2,1,"","check_spi_lock"],[113,2,1,"","is_supported"],[113,2,1,"","run"]],"chipsec.modules.common.uefi":[[115,0,0,"-","access_uefispec"],[116,0,0,"-","s3bootscript"]],"chipsec.modules.common.uefi.access_uefispec":[[115,1,1,"","access_uefispec"]],"chipsec.modules.common.uefi.access_uefispec.access_uefispec":[[115,2,1,"","can_modify"],[115,2,1,"","check_vars"],[115,2,1,"","diff_var"],[115,2,1,"","is_supported"],[115,2,1,"","run"]],"chipsec.modules.common.uefi.s3bootscript":[[116,1,1,"","s3bootscript"]],"chipsec.modules.common.uefi.s3bootscript.s3bootscript":[[116,2,1,"","check_dispatch_opcodes"],[116,2,1,"","check_s3_bootscript"],[116,2,1,"","check_s3_bootscripts"],[116,2,1,"","is_inside_SMRAM"],[116,2,1,"","is_inside_SPI"],[116,2,1,"","is_supported"],[116,2,1,"","run"]],"chipsec.options":[[120,1,1,"","Options"]],"chipsec.options.Options":[[120,2,1,"","get_section_data"]],"chipsec.parsers":[[121,1,1,"","BaseConfigHelper"],[121,1,1,"","BaseConfigParser"],[121,1,1,"","Stage"],[121,3,1,"","config_data"],[121,3,1,"","info_data"],[121,3,1,"","stage_dev"],[121,3,1,"","stage_info"]],"chipsec.parsers.BaseConfigParser":[[121,2,1,"","def_handler"],[121,2,1,"","get_metadata"],[121,2,1,"","get_stage"],[121,2,1,"","startup"]],"chipsec.parsers.Stage":[[121,3,1,"","CORE_SUPPORT"],[121,3,1,"","CUST_SUPPORT"],[121,3,1,"","DEVICE_CFG"],[121,3,1,"","EXTRA"],[121,3,1,"","GET_INFO"],[121,3,1,"","NONE"]],"chipsec.utilcmd":[[123,0,0,"-","acpi_cmd"],[124,0,0,"-","chipset_cmd"],[125,0,0,"-","cmos_cmd"],[126,0,0,"-","config_cmd"],[127,0,0,"-","cpu_cmd"],[128,0,0,"-","decode_cmd"],[129,0,0,"-","deltas_cmd"],[130,0,0,"-","desc_cmd"],[131,0,0,"-","ec_cmd"],[132,0,0,"-","igd_cmd"],[133,0,0,"-","interrupts_cmd"],[134,0,0,"-","io_cmd"],[135,0,0,"-","iommu_cmd"],[136,0,0,"-","lock_check_cmd"],[137,0,0,"-","mem_cmd"],[138,0,0,"-","mmcfg_base_cmd"],[139,0,0,"-","mmcfg_cmd"],[140,0,0,"-","mmio_cmd"],[141,0,0,"-","msgbus_cmd"],[142,0,0,"-","msr_cmd"],[143,0,0,"-","pci_cmd"],[144,0,0,"-","reg_cmd"],[145,0,0,"-","smbios_cmd"],[146,0,0,"-","smbus_cmd"],[147,0,0,"-","spd_cmd"],[148,0,0,"-","spi_cmd"],[149,0,0,"-","spidesc_cmd"],[150,0,0,"-","tpm_cmd"],[151,0,0,"-","txt_cmd"],[152,0,0,"-","ucode_cmd"],[153,0,0,"-","uefi_cmd"],[154,0,0,"-","vmem_cmd"],[155,0,0,"-","vmm_cmd"]],"chipsec.utilcmd.acpi_cmd":[[123,1,1,"","ACPICommand"]],"chipsec.utilcmd.acpi_cmd.ACPICommand":[[123,2,1,"","acpi_list"],[123,2,1,"","acpi_table"],[123,2,1,"","parse_arguments"],[123,2,1,"","requirements"],[123,2,1,"","set_up"]],"chipsec.utilcmd.chipset_cmd":[[124,1,1,"","PlatformCommand"]],"chipsec.utilcmd.chipset_cmd.PlatformCommand":[[124,2,1,"","parse_arguments"],[124,2,1,"","requirements"],[124,2,1,"","run"]],"chipsec.utilcmd.cmos_cmd":[[125,1,1,"","CMOSCommand"]],"chipsec.utilcmd.cmos_cmd.CMOSCommand":[[125,2,1,"","cmos_dump"],[125,2,1,"","cmos_readh"],[125,2,1,"","cmos_readl"],[125,2,1,"","cmos_writeh"],[125,2,1,"","cmos_writel"],[125,2,1,"","parse_arguments"],[125,2,1,"","requirements"],[125,2,1,"","set_up"]],"chipsec.utilcmd.config_cmd":[[126,1,1,"","CONFIGCommand"]],"chipsec.utilcmd.config_cmd.CONFIGCommand":[[126,2,1,"","bus_details"],[126,2,1,"","control_details"],[126,2,1,"","io_details"],[126,2,1,"","lock_details"],[126,2,1,"","mem_details"],[126,2,1,"","mmio_details"],[126,2,1,"","parse_arguments"],[126,2,1,"","pci_details"],[126,2,1,"","register_details"],[126,2,1,"","requirements"],[126,2,1,"","show"]],"chipsec.utilcmd.cpu_cmd":[[127,1,1,"","CPUCommand"]],"chipsec.utilcmd.cpu_cmd.CPUCommand":[[127,2,1,"","cpu_cpuid"],[127,2,1,"","cpu_cr"],[127,2,1,"","cpu_info"],[127,2,1,"","cpu_pt"],[127,2,1,"","cpu_topology"],[127,2,1,"","parse_arguments"],[127,2,1,"","requirements"]],"chipsec.utilcmd.decode_cmd":[[128,1,1,"","DecodeCommand"]],"chipsec.utilcmd.decode_cmd.DecodeCommand":[[128,2,1,"","decode_rom"],[128,2,1,"","decode_types"],[128,2,1,"","parse_arguments"],[128,2,1,"","requirements"]],"chipsec.utilcmd.deltas_cmd":[[129,1,1,"","DeltasCommand"]],"chipsec.utilcmd.deltas_cmd.DeltasCommand":[[129,2,1,"","parse_arguments"],[129,2,1,"","requirements"],[129,2,1,"","run"]],"chipsec.utilcmd.desc_cmd":[[130,1,1,"","GDTCommand"],[130,1,1,"","IDTCommand"],[130,1,1,"","LDTCommand"]],"chipsec.utilcmd.desc_cmd.GDTCommand":[[130,2,1,"","parse_arguments"],[130,2,1,"","requirements"],[130,2,1,"","run"]],"chipsec.utilcmd.desc_cmd.IDTCommand":[[130,2,1,"","parse_arguments"],[130,2,1,"","requirements"],[130,2,1,"","run"]],"chipsec.utilcmd.desc_cmd.LDTCommand":[[130,2,1,"","parse_arguments"],[130,2,1,"","requirements"],[130,2,1,"","run"]],"chipsec.utilcmd.ec_cmd":[[131,1,1,"","ECCommand"]],"chipsec.utilcmd.ec_cmd.ECCommand":[[131,2,1,"","command"],[131,2,1,"","dump"],[131,2,1,"","index"],[131,2,1,"","parse_arguments"],[131,2,1,"","read"],[131,2,1,"","requirements"],[131,2,1,"","set_up"],[131,2,1,"","write"]],"chipsec.utilcmd.igd_cmd":[[132,1,1,"","IgdCommand"]],"chipsec.utilcmd.igd_cmd.IgdCommand":[[132,2,1,"","parse_arguments"],[132,2,1,"","read_dma"],[132,2,1,"","requirements"],[132,2,1,"","run"],[132,2,1,"","write_dma"]],"chipsec.utilcmd.interrupts_cmd":[[133,1,1,"","NMICommand"],[133,1,1,"","SMICommand"]],"chipsec.utilcmd.interrupts_cmd.NMICommand":[[133,2,1,"","parse_arguments"],[133,2,1,"","requirements"],[133,2,1,"","run"]],"chipsec.utilcmd.interrupts_cmd.SMICommand":[[133,2,1,"","parse_arguments"],[133,2,1,"","requirements"],[133,2,1,"","run"],[133,2,1,"","smi_count"],[133,2,1,"","smi_send"],[133,2,1,"","smi_smmc"]],"chipsec.utilcmd.io_cmd":[[134,1,1,"","PortIOCommand"]],"chipsec.utilcmd.io_cmd.PortIOCommand":[[134,2,1,"","io_list"],[134,2,1,"","io_read"],[134,2,1,"","io_write"],[134,2,1,"","parse_arguments"],[134,2,1,"","requirements"],[134,2,1,"","set_up"]],"chipsec.utilcmd.iommu_cmd":[[135,1,1,"","IOMMUCommand"]],"chipsec.utilcmd.iommu_cmd.IOMMUCommand":[[135,2,1,"","iommu_config"],[135,2,1,"","iommu_disable"],[135,2,1,"","iommu_enable"],[135,2,1,"","iommu_engine"],[135,2,1,"","iommu_list"],[135,2,1,"","iommu_pt"],[135,2,1,"","iommu_status"],[135,2,1,"","parse_arguments"],[135,2,1,"","requirements"],[135,2,1,"","run"]],"chipsec.utilcmd.lock_check_cmd":[[136,1,1,"","LOCKCHECKCommand"]],"chipsec.utilcmd.lock_check_cmd.LOCKCHECKCommand":[[136,2,1,"","check_lock"],[136,2,1,"","check_log"],[136,2,1,"","checkall_locks"],[136,2,1,"","list_locks"],[136,2,1,"","log_header"],[136,2,1,"","log_key"],[136,2,1,"","parse_arguments"],[136,2,1,"","requirements"],[136,2,1,"","set_up"],[136,2,1,"","tear_down"],[136,3,1,"","version"]],"chipsec.utilcmd.mem_cmd":[[137,1,1,"","MemCommand"]],"chipsec.utilcmd.mem_cmd.MemCommand":[[137,2,1,"","dump_region_to_path"],[137,2,1,"","mem_allocate"],[137,2,1,"","mem_pagedump"],[137,2,1,"","mem_read"],[137,2,1,"","mem_readval"],[137,2,1,"","mem_search"],[137,2,1,"","mem_write"],[137,2,1,"","mem_writeval"],[137,2,1,"","parse_arguments"],[137,2,1,"","requirements"]],"chipsec.utilcmd.mmcfg_base_cmd":[[138,1,1,"","MMCfgBaseCommand"]],"chipsec.utilcmd.mmcfg_base_cmd.MMCfgBaseCommand":[[138,2,1,"","parse_arguments"],[138,2,1,"","requirements"],[138,2,1,"","run"]],"chipsec.utilcmd.mmcfg_cmd":[[139,1,1,"","MMCfgCommand"]],"chipsec.utilcmd.mmcfg_cmd.MMCfgCommand":[[139,2,1,"","base"],[139,2,1,"","ec"],[139,2,1,"","parse_arguments"],[139,2,1,"","read"],[139,2,1,"","requirements"],[139,2,1,"","write"]],"chipsec.utilcmd.mmio_cmd":[[140,1,1,"","MMIOCommand"]],"chipsec.utilcmd.mmio_cmd.MMIOCommand":[[140,2,1,"","dump_bar"],[140,2,1,"","dump_bar_abs"],[140,2,1,"","list_bars"],[140,2,1,"","parse_arguments"],[140,2,1,"","read_abs"],[140,2,1,"","read_bar"],[140,2,1,"","requirements"],[140,2,1,"","set_up"],[140,2,1,"","write_abs"],[140,2,1,"","write_bar"]],"chipsec.utilcmd.msgbus_cmd":[[141,1,1,"","MsgBusCommand"]],"chipsec.utilcmd.msgbus_cmd.MsgBusCommand":[[141,2,1,"","msgbus_message"],[141,2,1,"","msgbus_mm_read"],[141,2,1,"","msgbus_mm_write"],[141,2,1,"","msgbus_read"],[141,2,1,"","msgbus_write"],[141,2,1,"","parse_arguments"],[141,2,1,"","requirements"],[141,2,1,"","run"]],"chipsec.utilcmd.msr_cmd":[[142,1,1,"","MSRCommand"]],"chipsec.utilcmd.msr_cmd.MSRCommand":[[142,2,1,"","parse_arguments"],[142,2,1,"","requirements"],[142,2,1,"","run"]],"chipsec.utilcmd.pci_cmd":[[143,1,1,"","PCICommand"]],"chipsec.utilcmd.pci_cmd.PCICommand":[[143,2,1,"","parse_arguments"],[143,2,1,"","pci_cmd"],[143,2,1,"","pci_dump"],[143,2,1,"","pci_enumerate"],[143,2,1,"","pci_read"],[143,2,1,"","pci_write"],[143,2,1,"","pci_xrom"],[143,2,1,"","requirements"]],"chipsec.utilcmd.reg_cmd":[[144,1,1,"","RegisterCommand"]],"chipsec.utilcmd.reg_cmd.RegisterCommand":[[144,2,1,"","parse_arguments"],[144,2,1,"","reg_get_control"],[144,2,1,"","reg_read"],[144,2,1,"","reg_read_field"],[144,2,1,"","reg_set_control"],[144,2,1,"","reg_write"],[144,2,1,"","reg_write_field"],[144,2,1,"","requirements"]],"chipsec.utilcmd.smbios_cmd":[[145,1,1,"","smbios_cmd"]],"chipsec.utilcmd.smbios_cmd.smbios_cmd":[[145,2,1,"","parse_arguments"],[145,2,1,"","requirements"],[145,2,1,"","run"],[145,2,1,"","smbios_ep"],[145,2,1,"","smbios_get"]],"chipsec.utilcmd.smbus_cmd":[[146,1,1,"","SMBusCommand"]],"chipsec.utilcmd.smbus_cmd.SMBusCommand":[[146,2,1,"","parse_arguments"],[146,2,1,"","requirements"],[146,2,1,"","run"],[146,2,1,"","set_up"],[146,2,1,"","smbus_read"],[146,2,1,"","smbus_write"]],"chipsec.utilcmd.spd_cmd":[[147,1,1,"","SPDCommand"]],"chipsec.utilcmd.spd_cmd.SPDCommand":[[147,2,1,"","parse_arguments"],[147,2,1,"","requirements"],[147,2,1,"","run"],[147,2,1,"","spd_detect"],[147,2,1,"","spd_dump"],[147,2,1,"","spd_read"],[147,2,1,"","spd_write"]],"chipsec.utilcmd.spi_cmd":[[148,1,1,"","SPICommand"]],"chipsec.utilcmd.spi_cmd.SPICommand":[[148,2,1,"","parse_arguments"],[148,2,1,"","requirements"],[148,2,1,"","set_up"],[148,2,1,"","spi_disable_wp"],[148,2,1,"","spi_dump"],[148,2,1,"","spi_erase"],[148,2,1,"","spi_info"],[148,2,1,"","spi_jedec"],[148,2,1,"","spi_read"],[148,2,1,"","spi_sfdp"],[148,2,1,"","spi_write"]],"chipsec.utilcmd.spidesc_cmd":[[149,1,1,"","SPIDescCommand"]],"chipsec.utilcmd.spidesc_cmd.SPIDescCommand":[[149,2,1,"","parse_arguments"],[149,2,1,"","requirements"],[149,2,1,"","run"]],"chipsec.utilcmd.tpm_cmd":[[150,1,1,"","TPMCommand"]],"chipsec.utilcmd.tpm_cmd.TPMCommand":[[150,3,1,"","no_driver_cmd"],[150,2,1,"","parse_arguments"],[150,2,1,"","requirements"],[150,2,1,"","run"],[150,2,1,"","set_up"],[150,2,1,"","tpm_command"],[150,2,1,"","tpm_parse"],[150,2,1,"","tpm_state"]],"chipsec.utilcmd.txt_cmd":[[151,1,1,"","TXTCommand"]],"chipsec.utilcmd.txt_cmd.TXTCommand":[[151,2,1,"","parse_arguments"],[151,2,1,"","requirements"],[151,2,1,"","run"],[151,2,1,"","txt_dump"],[151,2,1,"","txt_state"]],"chipsec.utilcmd.ucode_cmd":[[152,1,1,"","UCodeCommand"]],"chipsec.utilcmd.ucode_cmd.UCodeCommand":[[152,2,1,"","parse_arguments"],[152,2,1,"","requirements"],[152,2,1,"","ucode_decode"],[152,2,1,"","ucode_id"],[152,2,1,"","ucode_load"]],"chipsec.utilcmd.uefi_cmd":[[153,1,1,"","UEFICommand"]],"chipsec.utilcmd.uefi_cmd.UEFICommand":[[153,2,1,"","assemble"],[153,2,1,"","decode"],[153,2,1,"","insert_after"],[153,2,1,"","insert_before"],[153,2,1,"","keys"],[153,2,1,"","nvram"],[153,2,1,"","nvram_auth"],[153,2,1,"","parse_arguments"],[153,2,1,"","remove"],[153,2,1,"","replace"],[153,2,1,"","requirements"],[153,2,1,"","s3bootscript"],[153,2,1,"","set_up"],[153,2,1,"","tables"],[153,2,1,"","var_delete"],[153,2,1,"","var_find"],[153,2,1,"","var_list"],[153,2,1,"","var_read"],[153,2,1,"","var_write"]],"chipsec.utilcmd.vmem_cmd":[[154,1,1,"","VMemCommand"]],"chipsec.utilcmd.vmem_cmd.VMemCommand":[[154,2,1,"","parse_arguments"],[154,2,1,"","requirements"],[154,2,1,"","set_up"],[154,2,1,"","vmem_allocate"],[154,2,1,"","vmem_getphys"],[154,2,1,"","vmem_read"],[154,2,1,"","vmem_readval"],[154,2,1,"","vmem_search"],[154,2,1,"","vmem_write"],[154,2,1,"","vmem_writeval"]],"chipsec.utilcmd.vmm_cmd":[[155,1,1,"","VMMCommand"]],"chipsec.utilcmd.vmm_cmd.VMMCommand":[[155,2,1,"","parse_arguments"],[155,2,1,"","requirements"],[155,2,1,"","run"],[155,2,1,"","vmm_hypercall"],[155,2,1,"","vmm_pt"],[155,2,1,"","vmm_virtio"]],chipsec:[[16,0,0,"-","config"],[17,0,0,"-","fuzzing"],[19,0,0,"-","hal"],[59,0,0,"-","helper"],[75,0,0,"-","library"],[82,0,0,"-","modules"],[120,0,0,"-","options"],[121,0,0,"-","parsers"],[122,0,0,"-","utilcmd"]]},objnames:{"0":["py","module","Python module"],"1":["py","class","Python class"],"2":["py","method","Python method"],"3":["py","attribute","Python attribute"],"4":["py","function","Python function"],"5":["py","data","Python data"]},objtypes:{"0":"py:module","1":"py:class","2":"py:method","3":"py:attribute","4":"py:function","5":"py:data"},terms:{"0":[0,2,3,5,12,18,24,27,28,29,33,34,35,36,37,46,49,50,52,54,55,58,70,89,90,94,97,99,100,105,107,108,121,127,130,136,139,143,150,151,152,155,158],"000102030405060708090a0b0c0d0e0f":[137,154],"003":34,"01":94,"07h":94,"0_bgsm":107,"0_remapbas":100,"0_remaplimit":100,"0_smramc":105,"0_tolud":100,"0_touud":100,"0_tsegmb":[100,107],"0x0":[2,33,125,127,133,134,141,142,146,147,148],"0x00":[131,143],"0x00000000bde10000":116,"0x001":131,"0x004e0040":143,"0x04":140,"0x1":[143,144],"0x10":[2,33,137,140,141,154],"0x100":[27,39,57,146],"0x1000":[2,33,137,154],"0x10000":[137,154],"0x100000":[137,148],"0x100000000":[137,154],"0x1022":5,"0x11":141,"0x12345678":35,"0x16":97,"0x1a":[37,139],"0x1f":[2,143],"0x20":[137,154],"0x200":139,"0x20000000":132,"0x2217f1000":132,"0x27":141,"0x2e":141,"0x2e7":99,"0x2f":131,"0x3":141,"0x3a":142,"0x4":[97,132,140],"0x40":97,"0x40000000":127,"0x41e":[137,154],"0x430":134,"0x524b01e":155,"0x61":[29,134],"0x70":140,"0x700000":148,"0x71":29,"0x74":140,"0x79":35,"0x79dfaaaa":133,"0x79dfe000":133,"0x79efdfff":133,"0x80000000":27,"0x8086":5,"0x8088":144,"0x88":[37,143],"0x8b":[35,142],"0x9090cccc":[137,154],"0x98":143,"0xa0":[146,147],"0xa0000":[137,154],"0xaa":147,"0xaaaaaaaaaaaaaaaa":133,"0xcc":125,"0xdc":[2,143],"0xde":[28,133],"0xdeadbeef":[39,57],"0xe0000001":141,"0xf0000":[39,57,137,154],"0xfe010000":140,"0xfed00000":[37,137,154],"0xfed40000":[39,57,137,154],"0xfedf0000":143,"0xffff0000":140,"0xfffff000":2,"0xffffffff":33,"1":[0,2,3,9,12,18,21,29,30,32,34,43,46,48,49,52,53,58,89,90,94,95,97,106,134,139,143,150,158,159],"10":[0,12,34,52,97,121],"101":42,"11":[0,12,52,115],"12":[0,34,52],"120":0,"12722199":45,"12722200":45,"13":52,"14":52,"15":52,"153":42,"15679511":45,"15679512":45,"15679513":45,"15687703":45,"15687704":45,"15691798":45,"16":[32,34,52,86],"160":42,"163":34,"166":34,"17":[34,52,150],"170":[52,55],"18":[34,52],"184":42,"18446744073709551615":[39,57],"19":[34,52],"19041":12,"194":45,"1mb":43,"2":[3,9,12,21,32,34,37,43,46,48,49,52,53,58,74,89,94,95,103,150,159],"20":[0,52,121],"2006":105,"2012":[12,34],"2016":12,"2017":94,"2018":[94,97],"2019":12,"2020":[10,11,12],"2022":12,"21":[49,52],"22":[52,97],"23":[52,150],"239":45,"24":52,"25":[18,52],"255":52,"26":[52,94],"27":[52,94],"28":[52,55,103],"29":94,"3":[0,9,10,11,12,34,48,52,53,58,89,95,97,143,150],"30":121,"300":109,"31":[12,52],"3107":0,"32":[52,92,96,106,155],"32902":76,"32bit":10,"33":52,"336996":94,"35":52,"362":0,"36817":0,"3d3a":153,"4":[0,2,21,27,32,33,34,43,46,52,53,58,66,70,89,95,97,103,127,132,139,150,159],"40":121,"4096":36,"4130":76,"4209":133,"423":12,"4300u":43,"4596":153,"483":0,"484":0,"49":34,"498":0,"4_01_02_10r17":42,"4_01_02_11r24":42,"4_01_02_12r23a":42,"4_01_02r19":42,"4th":3,"5":[0,2,34,52,136],"50":121,"515":0,"526":0,"544":0,"565432":104,"5715":94,"572":0,"585":0,"586":0,"589":0,"593":0,"6":[0,34,52,155],"604":0,"612":0,"613":0,"62":0,"63":94,"632":0,"64":[9,36,43,77,92,96,106,137,154],"646":0,"647":0,"64bit":[10,40],"655":0,"67":34,"673":0,"675":0,"681":0,"692":0,"695":0,"698":0,"7":[0,2,9,10,11,12,34,43,52,64,66,90],"701":0,"7625886":94,"7h":94,"8":[0,12,32,36,52,54,77,89,109],"8086":[2,3],"842cfd041b7454727b363b72b6d4dcca9c00daca":151,"9":[0,52],"976132":116,"99e6":133,"9cc02d72cdd998a7":133,"9ghz":43,"abstract":[0,2,3,60,62,72],"boolean":18,"break":0,"byte":[18,20,21,25,27,28,36,39,40,41,42,43,44,46,48,49,50,51,52,53,54,55,57,58,60,62,64,66,70,71,74,79,80,103,115,137,143,154,159],"case":[0,18,70,111],"class":[0,1,3,4,6,7,8,15,16,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,42,43,45,46,47,49,50,51,52,53,54,55,57,58,60,62,64,66,68,69,70,71,72,74,76,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,120,121,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],"default":[0,4,40,42,43,46,94],"do":[0,1,3,8,18,89,116,158],"enum":121,"final":99,"function":[0,1,3,4,8,18,22,23,28,36,37,44,46,48,50,51,52,54,55,56,58,60,62,64,66,70,71,74,105,139,143,148,155,159],"import":[0,1,3,6,7,9,43,89,97,106,159],"int":[18,20,21,22,23,24,25,27,28,29,30,31,32,33,34,35,36,37,39,40,41,42,43,44,45,46,48,49,50,51,52,53,54,55,57,58,60,62,64,66,69,70,71,74,77,80,86,87,88,89,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,127,136,137],"long":[0,158],"new":[0,3,12,13,42],"public":151,"return":[0,3,6,7,18,32,40,46,48,49,70,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,158],"static":[0,18,69],"super":4,"true":[0,3,6,18,20,37,43,46,56,70,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],"try":[0,12,46,49,103,128],"var":[8,51,52,66,153],"while":[0,111],A:[0,8,12,89,148,158],AT:103,And:0,As:[3,89,106],At:0,BY:1,For:[0,3,12,46,49,89,94,128,156,159],If:[0,3,5,9,12,43,49,89,107,108,111,113,128,156,159],In:[0,9,12,70,89,94,105,158],It:[3,9,128,148,158],NO:97,NOT:[90,158,159],No:[0,12],Not:[0,158],ON:12,On:[64,74,112],One:89,Such:105,THESE:1,The:[0,3,4,5,8,9,12,13,18,40,48,87,89,94,95,97,99,109,111,113,130,132,134,137,138,139,142,143,148,153,154,158],There:[8,9],These:[0,108,148],To:[10,12,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,159],Will:104,With:12,_:[100,104],__doc__:7,__dunders__:0,__future__:0,__init__:[4,6],__install__:13,__pack:97,_c:[52,55],_cmd:7,_ctype:[68,74],_deltas_fil:159,_devic:37,_fw_type:51,_fwtype:51,_helper:159,_json_out:159,_log:56,_mask:[52,55],_modul:159,_module1:159,_module_argv:159,_pch:159,_pch_dev:97,_pch_devfn:97,_platform:159,_private_vari:0,_rax:[28,60,62,64,66,70,71,74],_rbx:[28,60,62,64,66,70,71,74],_rcx:[28,60,62,64,66,70,71,74],_rdi:[28,60,62,64,66,70,71,74],_rdx:[28,60,62,64,66,70,71,74],_rsi:[28,60,62,64,66,70,71,74],_sm_:[137,154],_type:21,_uefi:46,_xml_out:159,_xrom:37,a3bc:153,aaaaaaaa:153,ab:140,abc:60,abl:[70,89,105],about:[0,3,113,158],abov:12,accept:0,access:[1,9,20,25,29,30,31,33,34,35,37,39,40,41,42,43,57,70,74,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,123,134,135,137,139,142,143,151,153,154,158,159],access_uefispec:[8,82,85,114,158],accomplish:148,accord:[8,18,158],ack_data:97,acpi:[1,8,12,19,21,123],acpi_cmd:[1,122],acpi_list:123,acpi_t:[1,19,20,28,123],acpi_table_apic_gic_distributor:21,acpi_table_apic_gic_msi:21,acpi_table_apic_gic_redistributor:21,acpi_table_apic_gicc_cpu:21,acpi_table_apic_interrupt_sourse_overrid:21,acpi_table_apic_ioap:21,acpi_table_apic_iosap:21,acpi_table_apic_lapic_address_overrid:21,acpi_table_apic_lapic_nmi:21,acpi_table_apic_lx2apic_nmi:21,acpi_table_apic_nmi_sourc:21,acpi_table_apic_platform_interrupt_sourc:21,acpi_table_apic_processor_lap:21,acpi_table_apic_processor_lsap:21,acpi_table_apic_processor_lx2ap:21,acpi_table_dmar_andd:21,acpi_table_dmar_atsr:21,acpi_table_dmar_devicescop:21,acpi_table_dmar_drhd:21,acpi_table_dmar_rhsa:21,acpi_table_dmar_rmrr:21,acpi_table_dmar_satc:21,acpi_table_dmar_sidp:21,acpi_table_head:20,acpicommand:123,acpidevnum:21,acpiobjectnam:21,acpiprocessorid:21,acpiprocid:21,acpiprocuid:21,acpiprocuidstr:21,acpiprocuidvalu:21,acquir:9,acronym:0,across:[3,18],action:[6,7],activ:151,ad:[0,3,4],add:[0,18],add_extra_config:16,add_integer_boundari:18,add_long_str:18,add_pag:36,add_pars:7,add_subpars:7,addiospac:52,addit:[12,90,94,115,158,159],addmemoryspac:52,addr:[36,39],addr_list:36,address:[8,27,37,42,52,58,60,62,64,71,74,116,132,137,154,156],administr:[9,12,159],adminstr:12,advanc:[12,116,159],advantag:94,after:[0,12,157],again:128,against:[87,107,158],alert:156,alia:[0,20,21,43,51,121],alias:0,align:[6,52],align_imag:54,all:[0,1,3,7,8,48,89,94,95,103,106,126,136,158,159],all_region:43,alloc:[137,154],alloc_phys_mem:[60,62,64,66,70,71,74],alloc_physical_mem:39,alloc_virtual_mem:57,allocateiospac:52,allocatememoryspac:52,allocatepag:52,allocatepool:52,allow:[0,3,9,12,89,107,132,134,139,142,143,158],allow_nan:46,alreadi:[0,9,159],also:[0,3,8,89,105,107,113,151,156,158,159],altern:110,alwai:[2,48],amd64:12,amd:[5,76,156],an:[0,3,9,12,49,52,89,106,108,115,116,121,128,148,156,158],analysi:[8,128,158],analyz:9,anc_se_svn:104,anchor:40,ani:[0,8,9,12,36,46,49,53,56,72,95,106,111,126,156,159],annot:0,anoth:[0,94,128],answer:94,anystr:[50,58,74,79,103],anywher:0,apertur:8,api:[3,11,12,115,116],apic:21,apicid:21,apollolak:97,appear:[128,158],append:18,appli:8,applic:[0,1,3,4,6,8,9,158],appropri:[3,9,13],approxim:43,apt:10,ar:[0,1,3,5,8,9,12,13,89,94,95,96,98,103,108,115,157,158,159],arbitrari:[0,46],arch:12,arch_vid:76,architectur:[8,12,75,92,96,106],archiv:156,archspecif:37,archstrik:10,area:[48,70,107,150],arg1:58,arg2:58,arg3:58,arg4:58,arg5:58,arg:[49,66,159],argpars:7,argument:159,argumentpars:7,argv:[7,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],around:[0,1,49,72],arrai:[60,71,74],articl:[92,96,106],artifact:9,ascii:[0,18],asm:13,assembl:153,assemble_uefi_fil:54,assemble_uefi_raw:54,assemble_uefi_sect:54,assert:[8,106],assess:[9,110],assign:0,assumpt:113,atom:[34,99],attack:[87,105,107,108,116,158],attempt:[0,9,89,106,108,115,159],attr:[36,51,52,60,62,64,66,70,71,74],attribut:[54,55,74,115,158],auth:153,authent:[8,86,103],author:3,authvar:51,auto:38,autodetect:128,autom:1,automat:[9,159],auxillari:56,avail:[0,3,12,40,158,159],avoid:0,b:[46,54,58],back:5,background:12,backslash:0,bad:0,badli:158,banner:159,bar:[2,30,33,37],bar_bas:33,bar_nam:[30,33],bar_siz:33,barrier:94,base:[0,1,2,3,4,8,12,15,16,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,42,43,45,46,47,49,50,51,52,53,54,55,57,58,60,62,64,66,68,69,70,71,72,74,76,80,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,120,121,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,158],base_primit:18,basecommand:[7,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],baseconfighelp:121,baseconfigpars:[15,121],basehelp:[59,62,64,66,70,71,74],basemodul:[0,3,6,8,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],basic:[13,94,148,159],bbbb:153,bc:[2,3,126,144],bcalcsiz:37,bcdedit:12,bcdrev:40,bdf:97,bdw:[8,82],becaus:94,been:[0,5,105,107,109,158],befor:[0,10],begin:0,behavior:[0,108],being:8,below:[12,158],bert:21,best:12,beta:9,between:[0,1,89],bgrt:21,bgsm:107,bild:2,bin:[123,128,133,137,148,149,152,153,154],binari:[12,18,44,128,148],binary_bios_measur:150,binaryio:49,bing:88,binpath:12,bio:[2,3,8,12,13,49,86,87,88,89,105,107,108,113,148,153,158],bios_char:40,bios_debug:97,bios_kbrd_buff:[8,82,85,158],bios_msg_ack:97,bios_region_bas:51,bios_region_s:51,bios_se_svn:104,bios_se_svn_statu:104,bios_smi:[8,82,85,158],bios_t:[8,82,85,158],bios_wp:[8,82,85,158,159],biosinterfacelockdown:[2,88],bioslocken:[3,89,144],biosw:[2,89],bioswriteen:[87,89,144],bit:[2,9,18,39,75,89,90,94,95,97,99,106,109,137,154],bit_count:18,bit_field:18,bit_mask:77,bit_num:77,bit_set:52,bitlength:74,ble:[3,89,144],blob:[13,40,97,99,151],block:[8,89,108],blog:[56,97],blogspot:94,blue:12,bool:[20,21,23,25,27,30,31,33,36,37,39,40,41,42,43,44,46,50,51,52,54,55,56,57,60,62,64,66,70,71,72,74,77,79,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,127,128],boot:[10,12,13,52,86,87,88,89,103,107,116,151,158],boot_options_pres:97,bootabl:9,bootmgr:12,bootregion:21,bootscript:116,bootscript_entri:116,bootscript_pa:116,bootservic:52,bootx64:13,border:18,bot:86,both:[89,153],bpo:0,brace:0,bracket:0,branch:94,broadwel:99,broken:2,brossard:86,brows:12,brra:111,brwa:[110,111],bs:103,bsaddress:116,bsod:12,bu:[2,12,21,32,33,34,37,60,62,64,66,69,70,71,74,139,141,143,155],buf:[39,43,57,62,64,71,74],buf_addr:28,buffer:[8,25,39,41,42,51,52,54,57,60,62,64,66,70,74,86,137,154,158],buffer_fil:[137,154],buffer_s:[60,62,64,66,70,74],bug:[0,156],build:[0,9,157],build_efi_file_tre:46,build_efi_model:46,build_efi_modules_tre:46,build_efi_tre:46,build_exe_:1,build_ext:[10,12,159],bus_detail:126,buswidthecc:42,butterworth:87,button:12,bwbr_process_cal:52,bwg:104,bypass:[86,89,111,113],byt:[8,82],byte_offset:125,byte_v:[125,131,146,147],byte_valu:[37,39,57],bytestostr:79,bytewis:62,c220:109,c5:94,c:[13,66,97,99,151],c_4level_page_t:36,c_extended_page_t:36,c_ia32e_page_t:36,c_pae_page_t:36,c_page:36,c_paging_memory_access:36,c_paging_with_2nd_level_transl:36,c_reverse_transl:36,c_translat:36,c_vtd_page_t:36,cach:[8,94,108,158],cachabl:108,cache_typ:[39,60,62,64,66,70,71,74],cacheabl:108,calc_bar_s:37,calc_hash:54,calcsiz:55,calcsum:54,calcul:18,calculatecrc32:52,call:[0,3,8,46,89,97,106],callabl:[0,46,56],can:[0,2,3,8,9,12,18,89,94,105,108,111,128,143,148,157,158,159],can_modifi:[103,115],can_read:32,cannot:[111,158],capabl:[1,48,150],caparea:48,capit:0,capitalization_with_underscor:0,capsul:[8,55],care:148,cashi:42,caslo:42,cccc:153,cd:[12,13],cdi:104,cee:36,certain:[0,3,9,89,115,158,159],certif:[8,12],cet:[8,82,85],cet_msr:90,cfg:[3,16],cfg_obj:[15,121],chain:0,chang:[0,9,12,43,89,108],channel:94,charact:[0,158],check:[0,1,5,6,8,70,86,87,88,89,93,94,95,97,99,100,104,105,106,107,108,109,110,111,112,113,115,116,136,158,159],check_bios_iface_lock:88,check_bios_keyboard_buff:86,check_bios_write_protect:89,check_cet:90,check_circular:46,check_cpu_debug_en:95,check_dci:95,check_dispatch_opcod:116,check_driver_handl:74,check_fd_security_override_strap:112,check_flash_access_permiss:[110,111],check_hardware_sequenc:43,check_ia32feature_control:96,check_lock:136,check_log:136,check_match_criteria:56,check_me_mfg_mod:97,check_memmap_lock:98,check_misconfig:36,check_msr_lt_lock_memori:99,check_prmrr_valu:104,check_remap_config:100,check_rul:56,check_s3_bootscript:116,check_secureboot_variable_attribut:103,check_sgx_config:104,check_smi_lock:87,check_smm_code_chk_en:106,check_smramc:105,check_smrr:108,check_smrr_support:23,check_spd_wd:109,check_spectre_mitig:94,check_spi_lock:113,check_spi_protected_rang:89,check_tseg_config:107,check_tseg_lock:107,check_untrust:93,check_var:115,check_vmm:23,checkall_lock:136,checker:0,checkev:52,checksum:[20,50,54],chipsec:[1,2,3,4,6,7,11,156,158],chipsec_hlpr:12,chipsec_main:[3,13,86,87,88,89,90,92,93,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],chipsec_py368_uefi_x64:13,chipsec_root:1,chipsec_root_dir:12,chipsec_toolscompress:12,chipsec_util:[7,8,12,13,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],chipset:[1,8,109],chipset_cmd:[1,122],chipsiz:42,choos:12,chosen:18,chunk:43,ci:151,circumst:9,circumv:105,clarifi:0,clariti:158,classmethod:[49,69],cleanup:1,clear:[8,89,158],client:[12,48,49,98,105,107],clone:[10,11,12],close:[66,70],closeev:52,closeprotocol:52,cmd:[12,135,143],cmo:[1,8,19,125],cmos_cmd:[1,122],cmos_dump:125,cmos_readh:125,cmos_readl:125,cmos_writeh:125,cmos_writel:125,cmoscommand:125,code:[1,3,9,10,12,35,72,105,106,108,151,156,159],collect:0,collis:0,colon:0,color:12,com:[10,11,12,13,34,38,42,92,94,96,97,99,106,151,156],comm_buffer_nested_ptr_protect:21,comma:0,command:[0,3,4,7,12,25,46,47,48,52,62,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,159],command_argv:[47,48],command_display_nam:7,command_paramet:150,commandclass:7,commandnam:[47,150],commandport:28,commbuff:8,commbuffinfo:21,comment:0,common:[1,2,3,4,8,18,51,52,82,158,159],commun:74,comparison:0,compat:[8,12,105,158],compil:12,complet:[12,18,48,158],compon:[9,12,20,21,26,40,47,51],compress:[10,12],compress_efi_binari:53,compress_imag:46,compressed_data:[46,53],compression_typ:[46,53,54],compresstyp:37,comput:[12,159],compute_ioctlbas:66,concaten:0,concept:8,conclus:158,condit:[0,8,12,89],config:[0,10,33,126,135,139],config_cmd:[1,122],config_data:121,configcommand:126,configur:[0,1,3,9,12,32,33,37,87,89,96,98,99,100,104,105,107,108,113,136,143,158,159],configurationt:52,confirm:158,confus:8,conin:52,connect:[9,95,159],connectcontrol:52,conout:52,consid:[0,110],consist:[0,94],consol:12,consoleinhandl:52,consoleouthandl:52,constant:0,construct:94,contact:9,contain:[0,8,9,128,148,158],content:[1,4,8,13,34,47,48,92,96,106,137,151,154,158],context:[0,52],continueselftest:[48,150],contribut:156,control:[2,3,8,11,12,25,41,87,88,89,94,95,96,107,109,110,112,113,158],control_detail:126,control_nam:144,convent:[0,49],convert:18,convertpoint:52,copernicu:113,copi:[3,12,13],copymem:52,core:[3,43,94,98,100,105,107],core_id:62,core_pars:14,core_support:121,coreboot:[97,99],coreconfig:15,corei:[87,116],cornwel:87,correct:[2,9,128],correctli:[3,8,89,98,107,128,158],correspond:[5,52,74,128],corrupt:103,could:[0,1,9,46,107,108,111,148,158],count:[52,133],counterintuit:0,cover:[13,89,158],cp:12,cpu:[1,5,8,13,19,28,35,43,50,70,82,85,99,105,106,107,108,127,158,159],cpu_cmd:[1,122],cpu_cpuid:127,cpu_cr:127,cpu_gcc:13,cpu_ia32:13,cpu_ia32_gcc:13,cpu_id:[130,152],cpu_info:[8,82,85,91,127,159],cpu_pt:127,cpu_thread_id:[23,35,50,60,62,64,66,70,71,74],cpu_topolog:127,cpucommand:127,cpuid:[1,5,16,19,23,56,59,60,62,64,66,67,70,71,74,90,94,127],cpuid_struct:68,cpuintnumb:21,cpunum:70,cpython:13,cr3:23,cr:127,cr_number:[23,60,62,64,66,70,71,74,127],crc32:52,creat:[3,8,9,12,13,49,60,62,64,66,70,71,74,128,148,159],create_s3bootscript_entry_buff:55,createev:52,createeventex:52,creation:[13,18],creatorid:20,creatorrevis:20,credenti:12,criteria:56,critic:[8,9,128],cryptograph:48,cs:[3,20,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,43,44,47,50,51,57,58,104,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],cse:97,cseg:105,csm:8,ctl_code:74,current:[0,3,5,48,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,128,129],cust_support:121,cve:94,cycl:43,d2000:34,d719b2cb:153,d:[36,58,156,158,159],d_lck:[105,158],d_open:158,dad00e67656f:153,dal:[9,59],dal_vers:62,dalhelp:[59,61],dam:[34,151],data1:115,data2:115,data:[0,8,25,28,34,38,40,43,46,47,52,55,71,89,94,103,105,115,128],data_byte_count:43,data_list:0,data_s:50,dataclass:0,dataoffset:74,dataport:28,datas:[47,51,55,71,74],datasheet:[3,34,109],datastructur:21,date:[0,50],db:[52,80,153],dbc:43,dci:95,dci_control_reg:95,dd:80,dddd:153,ddisable_integrity_check:12,deadbeef:132,death:12,debian:10,debug:[0,95,111,159],debugelock:95,debugen:[8,82,85],debugeoccur:95,debuglock:136,decid:89,decim:18,declar:0,decod:[20,21,40,42,97,128,145,148,152,153],decode_cmd:[1,122],decode_dir:52,decode_efi_vari:51,decode_rom:128,decode_s3bs_opcod:55,decode_s3bs_opcode_def:55,decode_s3bs_opcode_edkcompat:55,decode_typ:128,decode_uefi_region:46,decodecommand:128,decodesect:54,decompress:8,decompress_efi_binari:53,decompress_section_data:46,decompression_oder_type1:53,decompression_oder_type2:53,decor:0,def:[4,6,7,18,46],def_handl:121,defcon:86,defeat:87,defend:12,defin:[0,1,2,3,12,32,90,97,105,106,109,111,115,136,158],definit:48,del_pag:36,delet:[8,12,60,62,64,66,70,71,74,153],delete_efi_vari:[51,60,62,64,66,70,71,74],delim:18,dell:151,delta:[1,129,159],deltas_cmd:[1,122],deltascommand:129,demonstr:[89,108],deni:12,densiti:42,depend:[10,13,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],deploi:9,deprec:[9,10,11,12,159],depric:5,deriv:0,desc:[2,3,36,90],desc_cmd:[1,122],desc_table_cod:[60,62,64,66,70,71,74],describ:[13,105],descript:[0,6,8],descriptor:[8,44,110,111,112,158],descriptor_table_code_idtr:35,design:[12,107],desir:10,detail:[3,12,47,116],detect:[1,2,9,42,100,109,147,158],determin:158,dev:[2,10,33,37,66,69,70,74,156],dev_mem:[66,70],dev_port:[66,70],devdata:121,devel:10,develop:[12,92,96,106],devic:[5,8,9,12,27,37,38,42,45,47,58,60,62,64,66,70,71,74,107,109,111,139,143,155],device_addr:[146,147],device_cfg:121,device_nam:66,devicescop:21,devicetyp:[42,74],devmem_avail:70,devmsr_avail:70,devport_avail:70,dfx:62,dict:[20,23,36,43,45,46,51,55,56,60,64,66,71,74,126,127],dictionari:0,did:37,diff_var:115,differ:94,difficult:0,dig:88,digest:49,digit:8,dimm0:147,dimm2:147,direct:[1,9,95,107,134,137,139,142,143,154],directli:4,directori:[3,8,12,13,128],disabl:[8,12,13,89,95,109,135,136,148,158],disable_bios_write_protect:43,disconnectcontrol:52,discord:156,discoverrangebaseadd:21,discoverrangelength:21,disk:[12,158],dispatch:[8,52,158],displai:[92,138,159],display_bios_region:43,display_bios_write_protect:43,display_smbus_info:41,display_spi_flash_descriptor:43,display_spi_flash_region:43,display_spi_map:43,display_spi_opcode_info:43,display_spi_protected_rang:43,display_spi_ranges_access_permiss:43,displaybootmenu:12,displaynam:12,distribut:[9,10,11,12],distutil:9,dkm:66,dkms_dir:66,dma:[8,107,132,158],dmar:21,dmaread:132,dmawrit:132,dmytro:116,dnf:10,do_modifi:[103,108,115],doc:[34,42],docrev:40,docstr:0,document:[0,8,151],doe:[90,107,128,136,158],doesn:[8,12,94,158],domain:70,don:[158,159],done:[9,97],doubl:0,doubt:0,down:[2,87,97,98,158],download:[9,10,11,12,13],dq:80,draft:158,dram:[42,107],dram_device_type_nam:42,dram_typ:42,drive:[9,10],driver:[1,9,10,70,72,74,157,159],driver_exhist:62,drvier:12,duck:0,due:[8,9,12],dump:[8,12,22,30,125,128,131,140,143,147,148,151],dump_access:47,dump_acpi_t:20,dump_bar:140,dump_bar_ab:140,dump_descriptor_t:35,dump_devic:58,dump_didvid:47,dump_efi_modul:46,dump_efi_t:51,dump_efi_variables_from_spi:51,dump_ept_page_t:58,dump_ggtt_pt:27,dump_high:22,dump_intcap:47,dump_inten:47,dump_io:29,dump_io_bar:30,dump_iommu_configur:31,dump_iommu_page_t:31,dump_iommu_statu:31,dump_low:22,dump_mmio:33,dump_mmio_bar:33,dump_page_t:23,dump_page_tables_al:23,dump_pci_config:37,dump_region_to_path:137,dump_regist:47,dump_rid:47,dump_spd_rom:42,dump_statu:[47,97],dump_ucode_update_head:50,dunder:0,durat:52,dure:8,dw:80,dword:[18,137,143,154,159],dword_valu:[37,39,57,62],e:[10,159],each:[0,8,35,40,50,115,158],earliest:0,easier:0,eax:[23,24,35,60,62,64,66,68,70,71,74,94,127,142,155],ebx:[68,155],ec:[1,19,131,139],ec_cmd:[1,122],eccommand:131,ecentri:33,ecoff:33,ecx:[23,24,60,62,64,66,68,70,71,74,94,127,155],ed32d533:133,edi:155,edk2:13,edk2modul:13,edx:[35,60,62,64,66,68,70,71,74,94,142,155],eeeeeeeeeeee:153,eeprom:42,effect:108,effort:158,efi:[0,13,49,52,55,56,59,104,116,153,158],efi_abort:52,efi_access_deni:52,efi_already_start:52,efi_bad_buffer_s:52,efi_boot_script_dispatch_2_opcod:52,efi_boot_script_dispatch_opcod:52,efi_boot_script_information_opcod:52,efi_boot_script_io_poll_opcod:52,efi_boot_script_io_read_write_opcod:52,efi_boot_script_io_write_opcod:52,efi_boot_script_mem_poll_opcod:52,efi_boot_script_mem_read_write_opcod:52,efi_boot_script_mem_write_opcod:52,efi_boot_script_pci_config2_poll_opcod:52,efi_boot_script_pci_config2_read_write_opcod:52,efi_boot_script_pci_config2_write_opcod:52,efi_boot_script_pci_config_poll_opcod:52,efi_boot_script_pci_config_read_write_opcod:52,efi_boot_script_pci_config_write_opcod:52,efi_boot_script_smbus_execute_opcod:52,efi_boot_script_stall_opcod:52,efi_boot_script_table_opcod:52,efi_boot_script_terminate_opcod:52,efi_boot_script_type_default:55,efi_boot_script_type_edkcompat:55,efi_boot_script_width_uint16:52,efi_boot_script_width_uint32:52,efi_boot_script_width_uint64:52,efi_boot_script_width_uint8:52,efi_boot_services_t:52,efi_buffer_too_smal:52,efi_compromised_data:52,efi_configuration_t:[51,52],efi_crc_error:52,efi_data_search:46,efi_device_error:52,efi_dxe_services_t:52,efi_end_of_fil:52,efi_end_of_media:52,efi_error_str:52,efi_fil:[46,54],efi_fv:54,efi_fw_type_evsa:55,efi_fw_type_nvar:55,efi_fw_type_uefi:55,efi_fw_type_uefi_auth:55,efi_fw_type_vss2:55,efi_fw_type_vss2_auth:55,efi_fw_type_vss:55,efi_fw_type_vss_appl:55,efi_fw_type_vss_auth:55,efi_guid_str:52,efi_hdr_nvar1:55,efi_hdr_vss:55,efi_hdr_vss_appl:55,efi_hdr_vss_auth:55,efi_hdr_win:74,efi_http_error:52,efi_icmp_error:52,efi_incompatible_vers:52,efi_invalid_languag:52,efi_invalid_paramet:52,efi_load_error:52,efi_media_chang:52,efi_modul:[46,54,56],efi_no_map:52,efi_no_media:52,efi_no_respons:52,efi_not_found:52,efi_not_readi:52,efi_not_start:52,efi_nvram_format:51,efi_out_of_resourc:52,efi_protocol_error:52,efi_runtime_services_t:52,efi_sect:[46,54,56],efi_security_viol:52,efi_statu:52,efi_success:52,efi_support:[60,62,64,66,70,71,74],efi_system_t:[51,52],efi_system_table_revis:52,efi_table_head:[51,52],efi_tftp_error:52,efi_timeout:52,efi_unsupport:52,efi_var:51,efi_var_stor:51,efi_variable_fil:153,efi_variable_head:55,efi_variable_header_auth:55,efi_variable_header_auth_s:55,efi_variable_header_s:55,efi_vendor_t:52,efi_volume_corrupt:52,efi_volume_ful:52,efi_warn_buffer_too_smal:52,efi_warn_delete_failur:52,efi_warn_file_system:52,efi_warn_stale_data:52,efi_warn_unknown_glyph:52,efi_warn_write_failur:52,efi_write_protect:52,efi_xrom_head:37,eficompressor:12,efifirmwareblob:49,efihelp:[59,63],efiimageheaderoffset:37,efimachinetyp:37,efimoduletyp:46,efisignatur:37,efisubsystem:37,efit:51,efitabletyp:51,efivar_evsa:55,efivariabletyp:[51,60,64,66,71],eg:[0,6,89],einj:21,eiss:89,either:89,elfutil:10,els:[0,3,46],email:156,embed:25,emploi:0,empti:[128,158],en:[11,12,37,42,92,96,106,151],enabl:[0,2,3,8,9,12,13,33,47,87,89,94,95,97,104,106,108,109,135,158],enable_cache_address_resolut:33,enable_smbus_host_control:41,encapsul:28,encod:[0,18,46],encode_s3bootscript_entri:55,encode_s3bs_opcod:55,encode_s3bs_opcode_def:55,encode_s3bs_opcode_edkcompat:55,encompass:70,encount:12,encourag:[0,3],encrypt:158,end:[9,28,70,158],endian:18,enforc:12,engin:[31,135],enhanc:[94,158],ensur:89,ensure_ascii:46,entir:[89,148,158],entri:[36,40,55,158],entry_nam:56,entryc:40,entrylen:40,entrypoint:[52,145],entryrev:40,enum_devic:16,enumer:[5,12,37,94,121,143],enumerate_devic:37,enumerate_xrom:37,enumerationid:21,environ:[0,9,72,103],ept:[36,155],ept_point:155,eptp:58,equival:9,eras:148,erase_spi_block:43,error:[0,8,12,40,52,99,158],error_cod:97,erst:21,esi:155,especi:3,essenti:10,et_nod:[15,121],etc:[4,8,52,55,128,148],evalu:0,even:[0,94,105,159],event:[8,49,87],event_s:49,event_typ:49,eventtyp:49,everi:8,evid:0,evsa:55,ex:12,examin:[107,158],exampl:[0,3,7,8,9,12,46,86,87,88,89,90,92,93,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,123,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,152,153,154,155,159],except:[0,4,12,46,159],exchang:8,execut:[6,8,9,48,94,106,107,108,151,158],exhaust:18,exist:[0,9,49,89,159],exit:[52,159],exitbootservic:52,exp_siz:36,expand_pag:36,expans:[37,143],expect:[0,158],expens:0,explicit:0,explicitli:[0,97,159],exploit:[108,116],expos:158,exposur:86,express:0,extend:[0,18,36],extens:74,extheaderoffset:54,extra:[121,158],extract:13,f7:12,f8:12,f:[9,58],fadt:21,fail:[3,89,90,94,95,97,99,107,109,158,159],failfast:159,failur:[48,87,115,158],fall:5,fals:[0,6,16,18,20,36,37,40,46,51,52,55,62,66,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],famili:[49,109],fanci:18,faq:94,fat32:13,fd:44,fd_file:44,fdopss:112,fdv:110,featur:[0,8,12,95,96],fedora:10,fgo:144,field:[2,3,90],field_nam:144,file:[0,1,3,6,7,9,11,12,13,32,38,42,46,49,94,128,129,136,137,148,150,153,154,157,159],file_nam:132,file_path:123,filenam:[16,43,46,51,159],fileno:70,filetyp:[46,153],fill:[54,158],find:[8,153,157,158],find_acpi_smi_buff:28,find_efi_bootservices_t:51,find_efi_configuration_t:51,find_efi_dxeservices_t:51,find_efi_runtimeservices_t:51,find_efi_system_t:51,find_efi_t:51,find_efi_variable_stor:51,find_rsdp:20,find_s3_bootscript:51,find_smbios_t:40,find_smmc:28,find_thread:62,find_xrom:37,findal:46,finish:12,firmwar:[9,46,49,52,54,116,128,158],firmwarerevis:52,firmwarevendor:52,first:[2,3],fix:0,fixed_comm_buff:21,flag:[5,21,70],flake8:0,flash:[8,10,43,44,89,110,111,112,113,128,148,153,158],flash_address:148,flash_descriptor:148,flashlockdown:113,flashrom:113,flexibl:0,flmstr:44,flockdn:113,flow:0,flreg:43,flush_bar_address_cach:33,flushhintaddrstruct:21,fname:[46,51,52],fof:54,folder:4,follow:[0,8,10,12,13,49,94,95,97,99,109,148,156,157],forc:108,force_32bit:40,forceclear:[48,150],forens:[128,148],form:[8,18],formal:0,format:[0,13,18,49,55,128,129,152],formatarea0:40,formatarea1:40,formatarea2:40,formatarea3:40,formatarea4:40,forward:0,found:[3,8,106,157],fpt_bad:97,fr:156,framework:[8,9],frap:[110,111],free_phys_mem:[60,62,64,66,70,71,74],free_physical_mem:39,free_virtual_mem:57,freeform:153,freeiospac:52,freememoryspac:52,freepag:52,freepool:52,from:[0,1,6,7,10,12,13,38,48,49,62,80,89,94,103,107,108,128,137,148,151,154,158,159],fs0:13,fsguid:54,ft_bup_ld_flr:97,ftb:42,full:[148,158],full_rang:18,fulli:[0,70],fun:[2,33,37],func:[7,69,74],further:[10,158],furtur:0,fuzz:9,fuzz_librari:18,fuzzabl:18,fuzzer:[8,158],fv:46,fv_img:46,fv_mm:153,fvchecksum16:54,fvchecksum8:54,fvimag:54,fvlength:54,fvsum16:54,fvsum8:54,fw:128,fw_init_complet:97,fw_type:128,fwsts1:97,fwtype:[46,55,153],g:[10,159],ga:[21,28],gabriel:156,gain:47,garbag:158,gbe:158,gcc:10,gdt:[35,130],gdt_all:35,gdtcommand:130,gener:[0,1,3,4,12,18,28,38,47,89,156],get:[0,3,10,108,145],get_3b_siz:52,get_acpi_sdt:[60,62,64,66,70,71,74],get_acpi_t:[20,60,62,64,66,70,71,74],get_acpi_table_list:20,get_address_spac:36,get_affin:[60,62,64,66,70,71,74],get_attr:36,get_attr_str:51,get_auth_attr_str:51,get_available_help:72,get_base_help:72,get_bios_vers:70,get_bit:77,get_canon:36,get_chipset_cod:16,get_commbuf_info:21,get_common_xml:16,get_control:[3,144],get_cpu_core_count:35,get_cpu_thread_count:[35,50],get_cpu_topolog:23,get_cpuid_valu:90,get_datetime_str:79,get_decoded_struct:40,get_default_help:72,get_desc_table_regist:35,get_descriptor_t:[60,62,64,66,70,71,74],get_device_bar:37,get_device_name_by_didvid:37,get_didvid:37,get_dkms_module_loc:66,get_dsdt_address_to_us:21,get_dsdt_from_fadt:20,get_efi_vari:[51,60,62,64,66,70,71,74],get_efi_variable_ful:[64,74],get_extended_cap:33,get_field:36,get_gdtr:35,get_ggtt_bas:27,get_ggtt_pte_from_pa:27,get_ggtt_pte_from_pa_gen8:27,get_ggtt_pte_from_pa_legaci:27,get_gmadr:27,get_gttmmadr:27,get_guid_bin:54,get_head:40,get_header_typ:37,get_help:[62,64,66,70,72,74],get_idtr:35,get_info:[21,60,71,121],get_inst:69,get_io_bar_base_address:30,get_iommu_base_address:31,get_ldtr:35,get_lock:32,get_mem_rang:36,get_metadata:[15,121],get_mmcfg_base_address:33,get_mmio_bar_base_address:33,get_number_logical_processor_per_cor:23,get_number_logical_processor_per_packag:23,get_number_physical_processor_per_packag:23,get_number_sockets_from_apic_t:23,get_number_threads_from_apic_t:23,get_nvar_nam:52,get_pa_from_pt:27,get_pa_from_pte_gen8:27,get_pa_from_pte_legaci:27,get_page_is_ram:66,get_pages_by_physaddr:36,get_parse_acpi_t:20,get_pch_cod:16,get_phys_mem_access_prot:66,get_proc_info:24,get_pte_s:27,get_raw_struct:40,get_reverse_transl:36,get_s3_bootscript:51,get_sdt:20,get_section_data:120,get_smbus_base_address:41,get_smbus_hcfg:41,get_smram:23,get_smrr:23,get_smrr_smram:23,get_spi_flash_descriptor:44,get_spi_jedec_id:43,get_spi_jedec_id_decod:43,get_spi_mast:44,get_spi_mmio_bas:43,get_spi_protected_rang:43,get_spi_region:[43,44],get_spi_sfdp:43,get_stag:[15,121],get_string_list:40,get_structure_ap:21,get_table_list_from_sdt:20,get_threads_count:[60,62,64,66,70,71,74],get_tool_info:[62,64,66],get_tools_path:72,get_transl:36,get_tseg:23,get_vendor_name_by_vid:37,get_virt_addr:36,get_virtio_devic:58,get_vsec:33,getcap:[48,150],getcwd:72,getdramdevicetyp:42,getefivariables_ntenumeratesystemenvironmentvaluesex2:74,getefivariables_nvar:55,getefivariables_nvar_simpl:55,getefivariables_uefi:55,getefivariables_uefi_auth:55,getefivariables_vss2:55,getefivariables_vss2_auth:55,getefivariables_vss:55,getefivariables_vss_appl:55,getefivariables_vss_auth:55,getfvhead:54,getiospacedescriptor:52,getiospacemap:52,getmemorymap:52,getmemoryspacedescriptor:52,getmemoryspacemap:52,getmoduletyp:42,getnexthighmonotoniccount:52,getnextmonotoniccount:52,getnextvariablenam:52,getnvstore_efi:55,getnvstore_efi_auth:55,getnvstore_evsa:55,getnvstore_nvar:55,getnvstore_nvar_simpl:55,getnvstore_vss2:55,getnvstore_vss2_auth:55,getnvstore_vss:55,getnvstore_vss_appl:55,getnvstore_vss_auth:55,getphi:154,gettim:52,getvari:52,getwakeuptim:52,gfx_aperture_dma_read:27,gfx_aperture_dma_read_writ:27,gfxvtd:135,gg:156,gich:21,gicid:21,gicmsiframeid:21,gicrbaseaddress:21,gicv:21,git:[10,11,12],github:[10,11,12,13,38,97,99,151,156],given:18,global:[87,115],globalsysintbas:21,globalsysteminterrupt:21,go:12,goal:0,good:0,googl:94,googleprojectzero:94,gouv:156,grammar:0,graphic:[8,27],great:0,group:[0,18],guard:[0,12],guid:[28,46,51,52,54,55,60,62,64,66,70,71,74,103,115,133,151,153],guidelin:0,guidstr:64,h:[97,99,159],ha:[0,5,10,11,12,32,95,109,158],hal:[0,3,116,159],hal_bas:[1,19,20,22,23,24,25,27,28,30,31,32,33,34,39,40,41,43,47,51,57],halbas:[20,22,23,24,25,26,27,28,30,31,32,33,34,39,40,41,43,47,51,57],handl:[6,8,40],handle_control:15,handle_ima:15,handle_info:15,handle_io:15,handle_lock:15,handle_memori:15,handle_mmio:15,handle_pci:15,handle_regist:15,handleprotocol:52,handler:89,hang:[8,9],happen:0,hard:0,hardwar:[9,12,74,94,97,109,158,159],has_config:32,hash:0,haswel:[3,43],have:[0,12,94,105,107,115,156,158],hbbi28siiihh8:55,hbbiiiihh8:55,hdcien:95,hdd:[86,158],header:[0,8,10,21,37],header_vers:50,headerlength:54,headers:[52,54],help:[0,3,159],helper:[1,9,12,159],here:[97,157],hest:21,heurist:18,hex:[1,159],hf:97,hidden:136,hierarchi:37,higher:[9,10,11,12],highli:13,highlight:0,hijack:88,hint:9,horn:94,how:12,howev:89,hsf:[110,112,113],hsfc:144,hsw:[3,8,82],html:[92,94,96,97,106],http:[10,11,12,13,34,38,42,47,74,92,94,96,97,99,106,151,156,157],hub:109,human:2,hypercal:[58,60,62,64,66,70,71,74,155],hypercall64_extended_fast:58,hypercall64_fast:58,hypercall64_five_arg:58,hypercall64_memory_bas:58,hypervisor:[12,58,100],hypervisor_input_valu:58,i386:12,i5:43,i:[4,5,10,12,29,30,36,37,134,159],ia32:96,ia32_arch_cap:94,ia32_bios_sign_id:92,ia32_debug_interfac:[95,104],ia32_feature_control:[96,104,158],ia32_s_cet:90,ia32_smrr_physbas:[107,108],ia32_smrr_physmask:[107,108],ia32_spec_ctrl:94,ia32_u_cet:90,ia32cfg:[8,82,85,158],ia32featurecontrollock:96,ia:[36,92,93,96,106],ia_untrust:[8,82,85,91,107],ibp:104,ibpb:94,ibr:[94,158],ibrs_al:94,icon:12,id:[0,38,45,47,152],id_s3bootscript_typ:55,identifi:[37,136],identify_efi_nvram:51,idt:[35,130],idt_al:35,idtcommand:130,igd:[1,19,132],igd_cmd:[1,122],igdcommand:132,ignor:[5,158],ignore_platform:159,imag:[8,46,54,56,128,148,153],immedi:[0,48],implement:[1,3,8,18,46,49,94,116],import_path:159,improv:[0,158],includ:[0,3,8,9,10,12,36,52,88,94,96,99,113,148,158,159],incompat:12,inconclus:158,inconsist:32,incorrect:9,indent:[0,46],index:[48,52,55,131,150],indic:[0,48,111],indirect:94,individu:[0,8,18],inf:13,infcl:74,influenc:0,info:[12,36,127,148,156,159],info_data:121,infodata:121,inform:[0,3,8,24,47,48,90,92,109,136,158,159],inherit:[0,3,8],init:[58,66,70],initep:37,initi:48,inits:37,inject:94,inl:69,insecur:8,insert_aft:153,insert_befor:153,insid:0,inspect:158,instal:[1,8,74,157,159],installconfigurationt:52,installmultipleprotocolinterfac:52,installprotocolinterfac:52,instanc:[0,49,69],instead:[0,94],instrcountentri:21,instruct:1,instrument:86,insuffici:8,int15:8,intanchor:40,intc:40,integ:18,integr:[12,27],intel:[3,5,11,27,34,43,62,76,92,94,96,97,99,106,108,109,116,151,156],interact:4,interconnect:12,interfac:[2,4,9,12,34,58,62,88,95,158],interleav:21,intern:8,interpol:0,interpret:[0,8,9],interrupt:[1,8,19,47],interrupts_cmd:[1,122],interrupttyp:21,introduc:0,invalid:8,invoc_reg:28,invok:[1,72],io:[1,19,33,134],io_cmd:[1,122],io_detail:126,io_list:134,io_port:[29,60,62,64,66,70,71,74,134],io_read:134,io_writ:134,ioapicaddr:21,ioapicid:21,iobar:[1,19],ioctl:66,iommu:[1,8,19,135],iommu_cmd:[1,122],iommu_config:135,iommu_dis:135,iommu_en:135,iommu_engin:[31,135],iommu_list:135,iommu_pt:135,iommu_statu:135,iommucommand:135,iosapicaddress:21,iosapicvector:21,iosf:34,irp:12,is64:37,is_acpi_table_pres:20,is_all_on:77,is_bigpag:36,is_dal:72,is_device_en:27,is_efi:72,is_efi_variable_authent:52,is_en:[27,37],is_hex:79,is_ht_act:23,is_ibecc_en:100,is_inside_smram:116,is_inside_spi:116,is_io_bar_defin:30,is_io_bar_en:30,is_iommu_engine_en:31,is_iommu_translation_en:31,is_legacy_gen:27,is_linux:72,is_lock:[32,136],is_maco:72,is_mmio_bar_defin:33,is_mmio_bar_en:33,is_mmio_bar_program:33,is_pch_req:16,is_pres:36,is_print:79,is_rsdp_valid:21,is_set:77,is_smbus_en:41,is_smbus_host_controller_en:41,is_smbus_support:41,is_support:[3,6,8,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],is_translation_exist:36,is_variable_attribut:52,is_variable_st:55,is_win8_or_great:72,is_window:72,is_xsdt:20,isascii:52,iscorrectvsstyp:55,isecc:42,isfil:20,ismmio:37,isspdpres:42,issu:[0,9,12,89,105,107,156,158],item:[0,18],iter:[46,49,66,79],its:[0,9,52,80,159],itself:111,ityp:66,ivb:[8,82],j:159,jann:94,jede:45,jedec:[42,148],jedec_id:45,joanna:100,john:87,jonathan:86,json:[1,46,129,159],jsonencod:46,juli:[12,34],jumper:112,june:[10,11,12],junit:159,just:[8,107,158],k:[94,159],kallenberg:[87,116],kb4568831:12,keep:70,kei:[0,5,8,12,89,103,120,136,153],kern_get_efi_vari:66,kern_get_efi_variable_ful:66,kern_list_efi_vari:66,kern_set_efi_vari:66,kernei:156,kernel:[1,9,10,72,74,156,159],keyboard:[8,86,158],keyvar_fil:153,know:[1,3],knowledg:158,known:[8,158],kovah:87,kwarg:0,l:159,last_fv_siz:54,later:[12,89],latest:[0,10,12,13,157],launch:[9,159],layer:62,ldt:130,ldtcommand:130,learn:12,least:[0,3],left:0,legaci:[8,12],legacy_pci:[59,67],legacypci:69,legal:0,length:[0,18,20,21,39,40,43,52,57,62,64,66,70,71,74,137,140,148,154],lenovo:12,less:8,let:46,level:[9,58],lib:[12,13,66],libc:13,libelf:10,librari:[0,18],lift:0,like:[4,8,13,46,49,107,156],limit:0,line:[0,9,62,103,108,115,116,123,135,151,159],link:[12,13],lint:0,linux:[9,59,70,156],linux_requir:10,linuxhelp:[59,65],linuxn:59,linuxnativehelp:[59,67],list:[0,1,4,8,18,20,22,23,29,30,32,33,36,37,40,42,44,46,51,52,53,55,58,60,64,66,71,72,74,86,87,88,89,92,93,94,95,96,97,98,99,103,105,106,107,108,109,110,111,112,113,115,116,123,127,128,134,135,136,140,153,156,159],list_bar:140,list_efi_vari:[51,60,62,64,66,70,71,74],list_io_bar:30,list_lock:136,list_mmio_bar:33,list_tag:159,liter:9,literalstr:0,live:[7,153],lnum:74,load:[1,2,8,9,12,70,94,152,159],load_chipsec_modul:66,load_configur:36,load_help:72,load_pars:16,load_platform_config:16,load_platform_info:16,load_ucode_upd:[50,60,62,64,66,70,71,74],loader_revis:50,loadimag:52,loadnow:16,loadopt:12,local:[0,47,150],localapicaddress:21,localapiclint:21,localsapiceid:21,localsapicid:21,localx2apiclint:21,locat:[3,12,158],locatedevicepath:52,locatehandl:52,locatehandlebuff:52,locateprotocol:52,lock:[1,2,3,8,19,87,88,89,95,96,97,98,99,104,105,106,107,113,136,158],lock_check_cmd:[1,122],lock_detail:126,lock_nam:32,lock_valid:32,lockcheckcommand:136,locknam:136,lockname1:136,lockname2:136,lockresult:32,log:[1,49,128,158,159],log_fail:3,log_head:136,log_kei:136,log_pass:[3,6],log_register_head:47,log_script:[51,55],logger:[1,3,6,56,104],logic:[0,1,6,43,94,158],look:[13,158],lookup:5,loop:0,looptim:52,lore:156,lot:13,low:9,lower:0,luv:10,lvl:[36,46],lxde:10,lzma:153,m:[86,87,88,89,90,92,93,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,159],mac:9,macbook:97,machinebankpars:21,macronix:45,mai:[0,9,13,48,89,94,106,107,110,112,113,128,158],mail:156,main:[1,12,51],maintain:157,majorv:40,make:[0,1,12,13,108,148,156],malici:[8,12],malwar:[9,89,107],manag:[12,74,94,105,107,108],mani:0,manipul:[12,46,107],manner:12,manual:[1,8,12,92,96,106,158,159],manufactur:[45,97],manufacturer_str:40,map:[8,12,33,70,98,139,158],map_bigpage_1g:36,map_io_spac:[39,60,62,64,66,70,71,74],mark:0,markdown:159,mask:[2,36,52,90,143,159],master:[97,99],match:[0,5,70,136],match_criteria:56,match_module_typ:46,max_addr:66,max_len:18,max_length:18,max_mut:18,max_num:18,max_pa:[64,74],max_phys_address:[39,57,60,62,70,71],maximum:[0,43],maxsiz:40,maybe_hex:79,mb_opcode_cfg_read:34,mb_opcode_cfg_writ:34,mb_opcode_cr_read:34,mb_opcode_cr_writ:34,mb_opcode_esram_read:34,mb_opcode_esram_writ:34,mb_opcode_io_read:34,mb_opcode_io_writ:34,mb_opcode_mmio_read:34,mb_opcode_mmio_writ:34,mb_opcode_reg_read:34,mb_opcode_reg_writ:34,mbyte:79,mce:106,mcfg:12,mchbar:[33,140],mcr:[60,62,64,66,70,71,74],mcrx:[60,62,64,66,70,71,74],mdr:[60,62,64,66,70,71,74],me:97,me_hf:97,me_mfg_mod:[8,82,85],me_statu:97,mean:[8,105,110],mechan:[0,9,12,89,158],media:13,meltdown:94,meltdownattack:94,mem:[66,70,137],mem_alloc:137,mem_cmd:[1,122],mem_detail:126,mem_pagedump:137,mem_read:137,mem_readv:137,mem_search:137,mem_writ:137,mem_writev:137,member:[68,74],memcommand:137,memconfig:[8,82,85,158],memlock:[8,82,85],memori:[8,9,12,22,33,39,42,57,70,75,94,98,99,100,105,107,108,111,132,137,139,154,158],memory_map:70,memorymap:70,menu:12,messag:[8,34,141,158,159],messagebusopcod:34,messagebusport_atom:34,messagebusport_quark:34,met:12,metaclass:0,metadata:0,method:[0,3,6,9,46,74,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],mfg_mode:97,microcod:[50,92],microsoft:[9,12],might:[12,70,148,158],min_length:18,minim:[0,4,97],minimum:0,minorv:40,miss:[0,136,158],mitig:[12,94,106,158],mitr:113,mix:0,mm_msgbus_reg_read:34,mm_msgbus_reg_writ:34,mm_read:141,mm_write:141,mmap:70,mmcfg:[33,138,139],mmcfg_base:138,mmcfg_base_cmd:[1,122],mmcfg_cmd:[1,122],mmcfgbasecommand:138,mmcfgcommand:139,mmio:[1,2,19,37,140],mmio_bar:126,mmio_bar_nam:140,mmio_base_address:140,mmio_cmd:[1,122],mmio_detail:126,mmiocommand:140,mod:46,mode:[8,9,12,74,88,97,105,107,108,158,159],model:[35,96],model_206ax:99,modif:[13,54,103],modifi:[8,12,103,105,108,111,115],modify_uefi_region:46,modn:46,modul:[1,159],module_arg:159,module_argv:[6,86,87,88,89,90,92,93,94,95,96,97,98,99,103,105,106,107,108,109,110,111,112,113,115,116],module_common:[0,1,6,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],module_exclud:159,module_nam:66,module_typ:42,module_type_nam:42,moduleclass:6,moduleorg:42,moduleresult:[0,3,6],moduletyp:[42,159],moduletypeext:42,monotoniccount:55,more:[0,8,12,70],most:[0,3,8,9,18,97],mostli:0,motherboard:112,move:[12,18],mpidr:21,msbuild:12,msct:21,msgbu:[1,19,141],msgbus_cmd:[1,122],msgbus_messag:141,msgbus_mm_read:141,msgbus_mm_writ:141,msgbus_read:141,msgbus_read_messag:34,msgbus_reg_read:34,msgbus_reg_writ:34,msgbus_send_messag:[34,60,62,64,66,70,71,74],msgbus_send_read_messag:[60,62,64,66,70,71,74],msgbus_send_write_messag:[60,62,64,66,70,71,74],msgbus_writ:141,msgbus_write_messag:34,msgbuscommand:141,msr:[1,4,19,70,94,95,96,99,142,158],msr_addr:[35,60,62,64,66,70,71,74],msr_bios_don:[93,107],msr_cmd:[1,122],msr_lt_lock_memori:99,msr_smm_feature_control:106,msr_val:90,msrcommand:142,mstr:79,msv:13,mtbdivid:42,mtbdivisor:42,mtrrcap:104,much:10,multipl:[0,9,128],must:[0,12,89,90,148],mutat:18,mutate_flag:66,mx25l12805:45,mx25l6408:45,mx:159,mydriv:153,n2000:34,n:[53,89,158,159],name:[0,2,3,4,6,7,8,18,20,33,36,48,51,54,60,62,64,66,70,71,72,74,103,115,123,126,129,136,153,156],name_offset:52,names:55,namespac:[0,7],narrow:0,nasm:[10,13],nativ:70,native_get_acpi_t:74,natur:9,navig:12,nb:159,nbit:77,necessari:[0,9,10,48,94,128],need:[0,3,4,6,10,13,74,89,94,97,107,108,159],nest:0,net:[74,151],new_bio:153,new_rom:153,newhelp:4,newval:[66,70],next:[3,13,18,49],nextfwfil:54,nextfwfilesect:54,nextfwvolum:54,nfit:21,nl:159,nmi:[28,133],nmicommand:133,no_bann:159,no_driv:159,no_driver_cmd:150,no_tim:159,noattr:36,nointegritycheck:12,non:[0,48,108],none:[16,18,20,21,22,23,25,27,28,29,30,31,32,33,34,35,36,37,40,41,42,43,44,46,47,49,51,52,54,55,56,58,60,64,66,69,70,71,72,74,90,104,116,121,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],nonehelp:59,not_applic:158,notapplic:6,notat:0,note:[0,94,115,158],noth:18,notic:10,notrequir:0,now:[12,13,158],nr:66,num:[21,27],num_byt:66,num_entri:35,num_mut:18,number:[0,18,150],number_of_bit:77,numberoftableentri:52,numer:[1,9,159],numinject:21,numstructur:40,nv:48,nvar:55,nvdimmblockdatawindowsregionstruct:21,nvdimmcontrolregionstructmark:21,nvram:[8,52,55,89,128,153],nvram_auth:153,nvram_buf:[55,74],nvram_pth:51,nvread:[48,150],nvxdpe8rkt:156,o:[4,12,29,30,37,46,134,136],obj:46,object:[0,16,18,21,26,29,32,33,34,35,36,37,42,45,46,49,50,52,53,54,55,58,68,69,72,76,104,120,121],observ:158,occur:[0,95],octothorp:0,oe:156,oemid:20,oemrevis:20,oemtableid:20,off:[2,9,33,37,54,55,74],offici:12,offset:[2,22,25,30,33,41,42,43,46,48,51,54,62,66,69,70,97,131,139,140,141,143,146,147,150],offset_in_script:52,often:[89,111],ok:158,older:[0,157],oleksiuk:116,onc:[0,89,94,106],one:[0,8,94,95,151],ones_compl:77,onli:[0,9,89,90,98,100,105,109,159],op:[55,137,154],op_dispatch:52,op_io_pci_mem:52,op_mem_pol:52,op_smbus_execut:52,op_stal:52,op_termin:52,op_unknown:52,opcod:[8,34,52,141],open:[11,12,107,156],openprotocol:52,openprotocolinform:52,oper:[9,43,48,52,70,94,132,148],operation_mod:97,operation_st:97,optfeatur:42,optfeatures1:42,optim:43,option:[1,8,9,12,18,20,21,23,25,27,28,32,33,34,35,36,37,39,40,43,44,46,49,51,52,54,55,56,58,60,64,66,70,71,74,77,103,115,116,127,128],order:[0,9,89,97,128,158],org:[10,11,12,42,47,156,157],origin:12,os:[1,8,9,12,72,94,105,115,116,158,159],oshelp:[1,59],other:[0,3,12,89,105,113],otherwis:[18,49],our:156,out:[97,106,129],outdat:10,outl:69,outlin:105,outpath:46,output:[1,12,129,159],outsid:8,outstand:89,over:[0,8,49],overflow:8,overload:0,overrid:[0,2,4,8,112,158],overview:9,overwrit:0,overwritten:[86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,158],own:9,ownership:47,p2sb_dci:95,p:[5,12,151,159],pa2va:64,pa:[27,36,39,64,116],pa_end:137,pa_start:137,pack1:80,pack:80,packag:[1,8,10,12,64],packagetyp:42,packl_ctyp:74,pacman:10,pad:18,page:[1,19],pagedump:[137,154],paging_base_cr3:127,panic:9,param0:58,param1:58,param:18,paramet:[0,58,150],parameter_block:58,parameteris:0,paramspec:0,parent:46,parent_guid:46,parenthes:0,parkedaddress:21,parkingprotocolvers:21,pars:[8,12,21,44,46,49,54,55,128,148],parse_arg:7,parse_argu:[7,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],parse_auth_var:52,parse_efi_vari:51,parse_efivar_fil:52,parse_esal_var:52,parse_extern:52,parse_log:150,parse_pkcs7:52,parse_rsa2048:52,parse_rsa2048_sha1:52,parse_rsa2048_sha256:52,parse_s3bootscript_entri:55,parse_sb_db:52,parse_script:51,parse_sha1:52,parse_sha224:52,parse_sha256:52,parse_sha384:52,parse_sha512:52,parse_spi_flash_descriptor:44,parse_uefi_region_from_fil:46,parse_x509:52,parse_x509_sha256:52,parse_x509_sha384:52,parse_x509_sha512:52,parse_xrom:37,parseactiont:21,parseaddress:21,parseamc:21,parseerrentri:21,parseerrorblock:21,parsegenerrorentri:21,parseghess:21,parseinject:21,parseinjectionactiont:21,parseinstructionentri:21,parsemap:21,parsenmistructur:21,parsenonuid:21,parsenotifi:21,parsepci:21,parseprox:21,parseproxdominfostruct:21,parser:7,parser_entrypoint:7,parsesectiontyp:21,parsespa:21,parsestructur:21,parset:20,parsetim:21,parseuid:21,part:[43,89],parti:0,particular:[47,148],pascalcas:0,pass:[3,6,46,89,90,94,95,97,99,109,158],password:[8,86,158],path:[16,21,36,46,116,137,159],path_to_si:12,pattern:158,payload:[28,133],payload_fil:133,payload_loc:[28,133],payload_str:133,pc:[48,49],pccrread:150,pch:[97,159],pch_code:16,pch_dev_cs:97,pch_dev_slot_cs:97,pch_devfn_cs:97,pch_me_dev:97,pci0:[100,105,107],pci:[1,4,8,19,33,38,143],pci_addr:62,pci_bdf:74,pci_cmd:[1,122],pci_detail:126,pci_dev:97,pci_dump:143,pci_enumer:143,pci_me_hfsts1:97,pci_read:143,pci_writ:143,pci_xrom:143,pci_xrom_head:37,pcicfg:2,pcicommand:143,pcidb:[1,19],pcie:[37,138,143],pciid:38,pciroffset:37,pciutil:38,pcr:[48,150],pcr_index:49,pcrlogpars:49,pcrread:[48,150],pdb:[50,152],pdb_ucode_buff:50,pde_index:36,pdf:[34,42,94,151],pdpte_index:36,peccheck:52,pentium:105,pep8:0,per:[5,43,94],perform:[12,43,48,70,89],performanceinterruptgsiv:21,peripher:12,perm:36,permiss:[8,110,111,115,158],persist:10,pfat_se_svn:104,philosophi:0,phy:36,phys_address:[39,60,62,64,66,70,71,74],physbas:[107,108],physic:[9,39,48,137,154],physical_address:[62,64,70,71,74,137,154],physicaladdress:21,physicalbaseaddress:21,physmask:[107,108],physmem:[1,19,66],piec:97,pin:112,pip:[10,12],pk:153,place:[3,159],platcapstruct:21,platform:[1,2,3,9,12,47,49,51,55,72,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,124,158,159],platform_cod:3,platform_detect:16,platformcommand:124,platforminfo:15,platintsourceflag:21,pleas:[10,12,156,157],pml4e_index:36,poc:159,point:[12,158],pointer:8,poison:108,polar:[46,52,54],polici:8,pollut:0,popul:108,port:[29,34,66,69,70,133,134,141],portio:29,portiocommand:134,portion:158,possibl:[0,10,18,89,158],potenti:0,power:12,pr0:[89,113],pr4:113,pr:89,pr_num:43,prb:89,pre:[86,158],preced:[0,48],precis:0,predict:94,predictor:94,prefer:0,prefix:0,prerequisit:6,presenc:42,present:[0,12],press:12,prevent:[0,12,89,94,100,158],preview:12,previou:129,primari:6,primit:[1,17],principl:0,print:[130,158],print_acpi_table_list:20,print_cet_st:90,print_context_entri:36,print_efi_vari:51,print_entri:36,print_info:36,print_pch_info:16,print_pci_config_al:37,print_pci_devic:37,print_pci_extended_cap:33,print_pci_xrom:37,print_platform_info:16,print_sorted_efi_vari:51,print_supported_chipset:16,printk:97,prior:97,privat:0,privileg:[9,94],prl:89,prmrr:104,prmrr_base_address_field:104,prmrr_lock:104,prmrr_mask:104,prmrr_mask_bit:104,prmrr_memtyp:104,prmrr_phybas:104,prmrr_uncore_mask:104,prmrr_uncore_phybas:104,prmrr_valid_config:104,prmrr_vld:104,prn:89,probabl:158,problem:99,proc_cod:16,proceid:21,process:[12,40,89],process_cal:52,processfirmwarevolum:52,processor:[27,34,94],processor_flag:50,processor_signatur:50,procid:21,product:[9,97,111,158],product_str:40,profil:49,prog:7,program:[0,107,110,158],progress:158,project:[11,12,74,94,151,159],prompt:12,proper:107,properli:[0,116,158],properti:12,propos:0,prot:70,protect:[9,89,94,99,103,105,106,107,110,111,113,115,116,158],protocol:[0,49],protocolsperhandl:52,provid:[0,1,2,3,4,9,12,20,40,47,48,74,123,135,137,151,153,154],proximitydomain:21,pt:[127,135,155],pt_fname:[23,58],pte:27,pte_index:36,pte_num:27,pth:46,ptmesg:43,ptr:36,ptsecur:97,pubkeyindex:55,publicationarticl:42,pull:156,purpos:[0,105],py368readm:13,py:[1,3,4,6,7,8,10,12,13,86,87,88,89,90,92,93,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,148,159],pyd:12,pypi:[10,11,159],python2:[10,11,12],python368:13,python36:13,python3:10,python:[8,9,10,11,12,62,70,74,148],pyver:12,pywin32:[11,12,74],qpi:45,querycapsulecap:52,queryvariableinfo:52,question:[113,156],quick_read:52,quick_writ:52,quot:0,qword:18,r10:[58,60,62,64,66,70,71,74,155],r11:[58,60,62,64,66,70,71,74,155],r8:[58,60,62,64,66,70,71,74,155],r9:[58,60,62,64,66,70,71,74,155],r:[10,12,34,62],race:[8,89],racer:89,rafal:[100,116],rais:46,raisetpl:52,random_data:18,rang:[2,8,37,89,106,107,108,113,158],range_bas:29,range_s:29,rasf:21,raw:[40,145,153],raw_data:40,raw_fil:153,rax:[58,60,62,64,66,70,71,74,133,155],rbx:[58,60,62,64,66,70,71,74,133,155],rcdl:94,rcdl_no:94,rcx:[58,60,62,64,66,70,71,74,133,155],rdcl:94,rdcl_no:94,rdi:[58,60,62,64,66,70,71,74,133,155],rdx:[58,60,62,64,66,70,71,74,133,155],re:[3,6,8],reach:18,react:[3,158],read:[0,1,3,22,30,37,43,48,49,94,99,105,106,111,131,132,134,136,137,139,140,141,142,143,144,146,147,148,153,154],read_ab:140,read_bar:140,read_block:52,read_byt:[37,41,42,52],read_c:36,read_cmos_high:22,read_cmos_low:22,read_cr:[23,60,62,64,66,70,71,74],read_data:25,read_dma:132,read_dword:37,read_efi_vari:51,read_efi_variables_from_fil:51,read_efi_variables_from_spi:51,read_entri:36,read_entry_by_virt_addr:36,read_field:144,read_fil:44,read_ggtt_pt:27,read_idx:25,read_io:29,read_io_bar:30,read_io_bar_reg:30,read_io_port:[60,62,64,66,70,71,74],read_memori:25,read_memory_extend:25,read_mmcfg_reg:33,read_mmio:33,read_mmio_bar:33,read_mmio_bar_reg:33,read_mmio_reg:[33,60,62,64,66,70,71,74],read_mmio_reg_byt:33,read_mmio_reg_dword:33,read_mmio_reg_word:33,read_msr:[35,60,62,64,66,70,71,74],read_page_t:36,read_pci_config:69,read_pci_reg:[60,62,64,66,70,71,74],read_pd:36,read_pdpt:36,read_phys_mem:[60,62,64,66,70,71,74],read_physical_mem:39,read_physical_mem_byt:39,read_physical_mem_dowrd:39,read_physical_mem_dword:39,read_physical_mem_qword:39,read_physical_mem_word:39,read_pml4:36,read_port_byt:29,read_port_dword:29,read_port_word:29,read_pt:36,read_pt_and_show_statu:36,read_r:36,read_rang:[25,41,42],read_rsdp:20,read_spi:43,read_spi_to_fil:43,read_ucode_fil:50,read_virtual_mem:57,read_virtual_mem_byt:57,read_virtual_mem_dowrd:57,read_virtual_mem_dword:57,read_virtual_mem_word:57,read_vtd_context:36,read_word:[37,52],readabl:[0,2,106],readh:125,readl:125,readmem:36,readval:[137,154],reason:[9,89,94],reboot:[10,12,13],receiv:[12,47],receive_byt:52,recogn:159,recommend:[0,12,13,158],record:[8,49],redhat:10,redirect:8,ree_index:36,refer:[12,34,42,86,87,88,89,92,94,96,97,99,100,103,104,105,106,107,108,109,113,116,157],refrain:10,reg:[2,43,144],reg_cmd:[1,122],reg_get_control:144,reg_nam:144,reg_read:144,reg_read_field:144,reg_set_control:144,reg_writ:144,reg_write_field:144,regard:48,regi:126,region:[8,70,89,110,111,158],regist:[2,3,5,34,35,37,47,87,88,89,92,93,94,95,96,97,98,99,100,104,105,106,107,108,109,110,111,112,113,126,136,141,143,151,158],register_detail:126,register_nam:47,registerbaseaddr:21,registercommand:144,registerprotocolnotifi:52,registri:1,reinstallprotocolinterfac:52,relat:[23,104,105,156],releas:[10,12,156],release_str:40,relev:94,reload:108,remaind:43,remap:[8,82,85,158],remov:[0,12,153,158],removeiospac:52,removememoryspac:52,renam:13,render:18,repeat:18,replac:[0,153],repo:[10,12,156],report:[1,48,90,156],repositori:10,represent:52,reprogram:[107,113],request:[70,156],requir:[0,5,7,9,10,12,70,115,116,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,158],research:[108,116],reserv:[21,37,40,52,54,55,97],reserved1:[50,55],reserved2:[21,50,55],reserved3:[50,55],reserveda:42,reset:[12,18,48,113],reset_smbus_control:41,reset_vari:104,resetsystem:52,resourc:[1,9,35,74,159],respect:130,responsetag:47,restart:12,restor:8,restoretpl:52,restrict:[0,8,12,94,158],result:[1,3,6,9,12,89,94,95,97,99,109,110,128,159],result_delta:1,resum:116,retpolin:94,retpoline_en:[60,62,64,66,70,71,74],returncod:47,reus:3,reveal:[148,158],review:[3,158],revis:[20,34,42,47,52],rewrit:0,right:0,ring:[105,108],rmrbaseaddr:21,rmrlimitaddr:21,rogu:94,rom:[37,44,51,128,143,148,149,153],rom_buff:51,rom_fil:153,rom_sz:40,root:[8,9,12,13,159],root_dir:8,rot_list:53,rotate_list:53,rout:112,routin:0,rowaddresscount:42,rpe:89,rpm:10,rsdp:[20,21],rsdp_pa:20,rsdt:[20,21],rsdtxsdt:20,rsi:[58,60,62,64,66,70,71,74,133,155],rsvdd:42,rt:103,rt_code_end:133,rt_code_start:133,rtc:158,rtclock:[8,82,85,158],rtype:18,rufu:10,rule:[0,56],run1:129,run2:129,run:[1,3,6,7,8,9,12,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,124,128,129,130,132,133,135,138,141,142,145,146,147,149,150,151,155,157,158],runtim:[0,115,116],runtimeservic:52,rutkowska:100,rw:136,rweveryth:12,s3:[8,52,116,158],s3bootscript:[8,82,85,114,153,158],s3bootscript_entri:[51,52,55,116],s3bootscript_typ:55,s3bootscriptopcod:52,s3bootscriptopcode_edkcompat:52,s3bootscriptopcode_md:52,s3bootscriptsmbusoper:52,s3bootscripttyp:55,s3bootscriptwidth:52,s3script_modifi:8,s:[0,8,10,13,47,70,97,116,159],s_data:52,sam:87,sampl:9,sanit:8,save:[46,159],save_configur:36,save_efi_tre:46,save_efi_tree_filetyp:46,save_log:46,save_modul:46,sc:12,scan:5,scan_block:8,scan_single_bit_mask:77,schedul:52,sclean_se_svn:104,scm:11,scope:0,screen:12,script:[8,51,52,55,116,158],script_address:[116,153],script_data:55,script_typ:[52,55],scrtmversion:49,sdev:12,sdk:12,sdm:[92,96,106],sdt:20,search:[56,137,154],search_callback:46,search_efi_tre:46,search_rsdp:20,sec:43,sec_fs_nam:46,secbodi:54,secheaders:54,second:58,section:[0,3,10,13,34,46,54,103,120,128,148],section_dir_path:46,section_ex:46,sectyp:54,secur:[9,12,13,52,87,89,98,103,105,107,112,113,116,158,159],secureboot:[8,82,85,87,158],see:[3,108],seem:158,segment:40,segmentnumb:21,select:[1,5,12,18],self:[0,3,4,6,7,12,18,37,46,48,56],semicolon:0,send:[47,133,156],send_acpi_smi:28,send_byt:52,send_nmi:28,send_smi_apmc:28,send_smmc_smi:28,send_sw_smi:[28,60,62,64,66,70,71,74],sensit:8,separ:[0,46],seq:79,sequenc:18,seri:[34,109],serial:42,serial_presence_detect:42,serial_str:40,serializ:46,server:[12,156],servic:[8,9,12,159],set:[0,3,8,9,12,32,89,90,94,97,99,105,106,109,113],set_affin:[60,62,64,66,70,71,74],set_control:[3,144],set_default:7,set_efi_vari:[51,60,62,64,66,70,71,74],set_efi_variable_from_fil:51,set_field:36,set_fwtyp:51,set_iommu_transl:31,set_mem_bit:39,set_pci_data:16,set_up:[123,125,131,134,136,140,146,148,150,153,154],setmem:52,setmemoryspaceattribut:52,settim:52,setting_en:90,setup:[1,8,10,12,13,87,159],setuptool:[0,10,12],setvari:52,setvirtualaddressmap:52,setwakeuptim:52,setwatchdogtim:52,sfdp:148,sgx:104,sgx_check:[8,82,85],sgx_debug_mod:104,sgx_debug_mode_status_bit:104,sgx_global_en:104,share:18,shell:[0,9,12,104],shellbinpkg:13,shift:12,ship:97,shortcut:80,should:[0,3,4,5,8,9,13,48,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,158,159],show:[126,159],show_warn:74,shutdown:12,side:94,sideband:34,sign:[0,9,12,18],signalev:52,signatur:[0,8,9,20,37,52,55],similar:[0,151],simmtest:42,simpl:[9,49],simpli:[18,105,106,111],simplifi:0,sinc:[10,11,12],singl:[0,80,94],sinit_se_svn:104,sinkhol:8,site:[42,94,156],size:[2,18,25,27,29,30,33,36,37,41,42,43,46,48,52,54,55,58,60,62,64,66,70,71,74,77,80,131,138,146,150,158],skip:[9,159],skip_config:159,skipkei:46,skipped_not_applic:158,sl:151,slat:58,sltool:151,smbase:108,smbio:[1,19,145],smbios_2_x_entry_point:40,smbios_3_x_entry_point:40,smbios_bios_info_2_0:40,smbios_bios_info_2_0_entri:40,smbios_cmd:[1,122],smbios_ep:145,smbios_get:145,smbios_struct_head:40,smbios_system_info_2_0:40,smbios_system_info_2_0_entri:40,smbiosmanagementinfo:21,smbu:[1,19,42,109,146],smbus_cmd:[1,122],smbus_hcfg:109,smbus_read:146,smbus_vid:144,smbus_writ:146,smbuscommand:146,smi:[28,87,89,108,133,158],smi_cod:133,smi_code_data:[60,62,64,66,70,71,74],smi_code_port_valu:28,smi_count:133,smi_data:133,smi_data_port_valu:28,smi_num:28,smi_send:133,smi_smmc:133,smicommand:133,smilock:87,sml:49,smm:[8,82,85,89,99,106,107,108,158],smm_bwp:89,smm_code_chk:[8,82,85],smm_code_chk_en:106,smm_dma:[8,82,85,158],smm_ptr:8,smmbioswriteprotect:[87,89],smmc:[28,133],smmruntim:8,smram:[105,107,108,158],smramc:105,smrr:[8,82,85,106,158,159],smt:43,snake_cas:0,snb:[8,82],so:[0,2,97,159],soc:[34,97,99],soc_bios_don:93,sof:54,softwar:[8,11,89,92,94,96,105,106,107,108,111,158],solut:12,some:[0,3,12,89,105,110,112,157,158],some_module_requir:6,someth:158,sometim:89,sort_kei:46,sourc:[9,10,11,12,15,16,18,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,60,62,64,66,68,69,70,71,72,74,76,77,79,80,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,120,121,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,157,158],source_id:36,sourceforg:[74,151],space:[0,33,134,139],spd:[1,19,109,147],spd_cmd:[1,122],spd_ddr2:42,spd_ddr3:42,spd_ddr4:42,spd_ddr:42,spd_detect:147,spd_dump:147,spd_read:147,spd_revis:42,spd_wd:[8,82,85],spd_write:147,spdbyte:42,spdcommand:147,spec:[37,103,115,158],specif:[0,1,2,3,5,8,22,28,35,40,47,48,49,50,51,55,58,70,72,94,95,96,159],specifi:[0,5,18,40,116,159],spectr:[12,94],spectre_v2:[8,82,85,91,158],spectreattack:94,specul:94,speed:89,spi:[1,2,8,19,44,45,89,110,111,112,113,128,148,149,153,158,159],spi_access:[8,82,85,158],spi_cmd:[1,122],spi_desc:[8,82,85,158],spi_descriptor:[1,19],spi_disable_wp:148,spi_dump:148,spi_eras:148,spi_fdopss:[8,82,85,158],spi_fla:43,spi_info:148,spi_jedec:148,spi_jedec_id:[1,19],spi_lock:[8,82,85,158,159],spi_read:148,spi_read_write_max_dbc:43,spi_reg_read:43,spi_reg_writ:43,spi_region_id:43,spi_sfdp:148,spi_uefi:[1,19],spi_writ:148,spibar:[2,140],spibas:21,spicommand:148,spicount:21,spidesc:149,spidesc_cmd:[1,122],spidesccommand:149,spiregion:43,spiwritestatusdi:113,split_address:64,spmi:21,src:[97,99],ssi:156,ssize:54,stage:121,stage_data:[15,121],stage_dev:121,stage_info:121,stagecor:121,stageinfo:121,stall:52,standalon:124,standard:[0,70,158],standarderrorhandl:52,start:[12,13,18,28,60,62,64,66,70,71,74,77,159],start_driv:62,start_offset:[25,41,42,146],start_test:6,startbusnum:21,startid:55,startimag:52,startup:[12,48,121,150],stat:151,state:[18,54,55,136,150,151],statement:0,statu:[3,47,135],statuscod:52,stderr:52,stdlib:13,step:[10,13,18,106,157],stibp:[94,158],stick:10,still:158,stop:[12,60,62,64,66,70,71,74,151],storag:10,store:[8,48,49,89,128],str:[20,21,23,28,30,31,32,33,36,37,40,42,43,44,45,46,47,48,50,51,52,54,55,56,58,60,62,64,66,70,71,72,74,79,86,87,88,89,92,93,94,95,96,97,98,99,103,105,106,107,108,109,110,111,112,113,115,116,126,127,136,137],strap:112,string:[8,9,18,40,75,80],stringtobyt:79,struct:[55,75,97],struct_typ:40,structur:[0,3,4,13,40,68,74],studio:[11,12],style:159,sub:150,subcap:48,subcaps:48,subclass:[3,46,49,70,143],subdirectori:[8,13],submodul:[1,4,8,13,82],subpackag:[4,8],subpars:7,subscrib:156,subtyp:0,subvers:100,success:[6,18,48],sudo:159,suggest:156,summari:[0,87,107],sun:88,supertyp:0,supplement:12,suppli:18,support:[1,3,8,9,10,11,12,46,47,72,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,158],support_ibt:90,support_kernel26_get_page_is_ram:66,support_kernel26_get_phys_mem_access_prot:66,support_shadow:90,sure:[0,1,12,13],surround:9,sw:[86,158],swap:[8,88,158],sy:0,syntact:0,syntax:0,system:[1,2,4,9,11,12,48,89,94,95,105,107,108,111,112,148,153,158],system_resource_protect:21,systemvectorbas:21,t:[8,12,94,158,159],tab:0,tabl:[0,8,12,20,21,36,52,115,116,123,153],table_cont:21,table_nam:[60,62,64,66,70,71,74],table_sig:51,tableaddr:40,tablelen:[21,40],tag:159,take:[18,94],taken:148,tale:89,target:[9,94,141],target_address:41,target_machin:62,task:1,tbd:43,tboot:151,tcg:[48,49],tcgpcrevent:49,tckmin:42,tco:87,tcosmilock:87,te:[8,31],team:116,tear_down:136,technic:[92,96,106,116],technolog:151,templat:9,test1:0,test2:0,test:[0,1,3,6,8,9,10,48,89,96,159],testcas:1,testsign:[9,12],text:0,textual:52,thei:0,them:[0,158],theori:0,therebi:89,therefor:12,thermalrefresh:42,thermsensor:42,thi:[0,3,8,9,12,13,18,38,46,49,70,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,128,148,151,158,159],thing:[0,10],thinkpad:12,third:0,those:0,though:94,thread:[35,50,62,94,127],thread_id:[28,66,70,133,142],threat:116,three:0,through:[18,107],tiano:153,tianocor:13,time:0,timestamp1:55,timestamp2:55,timestamp:159,titl:0,tm:34,to_binari:18,to_decim:18,todo:94,toload:[7,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],too:0,tool:[0,8,9,10,12,13,113,159],tool_typ:[62,64,66],top:[8,88,158],topolog:127,topswap:88,topswapstatu:88,total:18,total_s:50,totalbyt:42,totals:55,tpm12_command:[1,19],tpm:[1,19,48,49,150],tpm_cmd:[1,122],tpm_command:150,tpm_continueselftest:48,tpm_eventlog:[1,19],tpm_init:48,tpm_pars:150,tpm_pcrread:48,tpm_response_head:47,tpm_st_clear:48,tpm_st_deactiv:48,tpm_st_state:48,tpm_startup:48,tpm_state:150,tpmcommand:150,tpmv1:48,track:70,tracker:156,trail:0,transform:0,translat:[36,52,58],tree:151,trenchboot:151,tri:12,trigger:[12,108],troubleshoot:12,trust:[47,49,52,151],trustedcomputinggroup:47,try_init:37,tseg:[107,158],tsegbaselock:107,tseglimitlock:107,tsegmb:107,tupl:[20,21,23,24,28,30,33,35,37,39,43,44,48,51,54,55,57,58,60,62,64,66,70,71,74],turn:[9,95],twitter:156,two:0,txt:[10,12,13,151],txt_cmd:[1,122],txt_dump:151,txt_state:151,txtcommand:151,type:[2,4,9,12,18,21,40,48,54,75,108,128,145,150,153,159],typeddict:0,typeerror:46,typevartupl:0,typic:0,u32:97,ubuntu:10,ucod:[1,19,94,152],ucode_buf:50,ucode_cmd:[1,122],ucode_decod:152,ucode_fil:50,ucode_filenam:50,ucode_id:152,ucode_load:152,ucode_update_buf:[62,64,66,70,71,74],ucode_update_buff:60,ucode_update_fil:152,ucode_update_id:50,ucodecommand:152,ucodeupdatehead:50,ud:54,udk2018:13,uefi:[1,4,8,9,10,12,19,46,52,54,55,56,64,82,85,103,153,158],uefi_auth:55,uefi_cmd:[1,122],uefi_common:[1,19,51,55,116],uefi_compress:[1,19],uefi_fil:[46,153],uefi_fv:[1,19,46,56],uefi_platform:[1,19],uefi_search:[1,19],uefi_t:21,uefi_variable_head:55,uefi_variable_store_header_s:55,ueficommand:153,ueficompress:53,uefishel:13,unabl:136,unam:10,unauthent:8,unauthor:103,unboot:[1,148],uncompressed_data:53,uncomressed_s:54,undefin:136,under:[8,94],underscor:9,undoc:136,unfortun:158,uninstallmultipleprotocolinterfac:52,uninstallprotocolinterfac:52,union:[0,20,40,46,55,68,74,127],unit:141,unit_aunit:34,unit_bunit:34,unit_cpu:34,unit_gfx:34,unit_hb:34,unit_hba:34,unit_mm:34,unit_pci:34,unit_pmc:34,unit_rmu:34,unit_sata:34,unit_smc:34,unit_smi:34,unit_soc:34,unit_usb:34,unknown:[52,55],unknown_decompress:53,unknown_efi_decompress:53,unless:40,unload_chipsec_modul:66,unloadimag:52,unlock:[95,136],unpack1:80,unpack:80,unprotect:8,unrecover:106,unsign:8,unsupport:12,until:[10,113],untrust:93,up:[0,158],updat:[0,10,12,13,50,94],update_efi_tre:46,update_in_progress:97,update_revis:50,update_ucod:50,update_ucode_all_cpu:50,updatecapsul:52,uppercamelcas:0,upstream:0,us:[0,1,2,3,8,10,11,12,43,47,48,51,64,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,132,148,151,156,158],usabl:[70,158],usag:[7,8,13,22,24,25,27,28,29,30,33,34,35,37,39,43,44,46,50,56,57,86,87,88,89,90,92,93,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116,124,128,138,151,159],usb:[9,10],user:[0,9,62,158],user_module_tag:159,usual:89,utf:0,util:[0,1,7,123,124,135,148,151,159],utilcmd:[0,1,7],uuid:[46,54],uuidencod:46,v1:48,v2:151,v:159,va2pa:[39,57,60,62,64,66,70,71,74],va:[36,39,57,62,64,66,70,71,74],val:[21,77,80],valid:[8,10,108],validatefwvolumehead:54,valu:[0,1,2,18,21,22,23,25,27,29,30,32,33,36,41,42,43,48,52,60,62,64,66,69,70,71,74,77,80,99,108,121,127,132,134,136,137,139,140,141,143,144,154,158,159],var_attrib:51,var_buf:51,var_data:51,var_delet:153,var_find:153,var_guid:51,var_head:51,var_list:153,var_nam:51,var_read:153,var_typ:52,var_writ:153,vari:0,variabl:[0,4,8,51,52,82,85,102,115,128,148,153,158],variable_store_header_vss2:55,variable_store_header_vss:55,variad:0,variant:94,variou:[1,9,21,72,128,159],vb:12,vcxproj:12,vdd:42,vector:58,vendor:[38,47],vendor_str:40,vendorguid0:55,vendorguid1:55,vendorguid2:55,vendorguid3:55,vendorguid:52,vendorguiddata:52,vendort:52,verbos:159,veri:159,verif:8,verifi:[0,94,98,103],version:[3,9,10,11,12,49,74,136],version_str:40,vgicmaintenanceinterrupt:21,via:[70,108,143],vid:37,view:47,virt:36,virt_address:57,virtio:[58,155],virtio_devic:58,virtmem:[1,19],virtmemori:57,virtual:[12,57,154],virtual_address:[60,154],visit:13,visual:[0,12,158],vmem:154,vmem_alloc:154,vmem_cmd:[1,122],vmem_getphi:154,vmem_read:154,vmem_readv:154,vmem_search:154,vmem_writ:154,vmem_writev:154,vmemcommand:154,vmm:[1,19,155],vmm_cmd:[1,122],vmm_hypercal:155,vmm_pt:155,vmm_virtio:155,vmmcommand:155,vmware:88,vol:34,voltag:42,volum:[34,52,54,128],vs2019:12,vs2022:12,vs:[0,12],vsecentri:33,vss2:55,vss2_auth:55,vss:[55,128],vss_appl:55,vss_auth:[55,153],vss_type:55,vt:36,vtd:135,vu:116,vulner:[8,9,88,89,94,106,113,116,158],vv:159,vverbos:159,w25q128:45,w25q256:45,w25q32jv:45,w25q64fv:45,wa:[6,38,89,105,151,158],wai:[0,89,94,108],waitforev:52,wake:8,walru:9,want:43,warn:[94,158],wasn:94,wconio2:12,wdk:12,we:[70,94,156,158],well:[0,94,158],went:158,were:[105,109,158],what:1,when:[0,3,8,9,12,89,94,105,108,110,148,158],where:[8,49,89,103,105,115,116],whether:[32,86,87,88,89,90,92,93,94,95,96,97,98,99,100,103,104,105,106,107,108,109,110,111,112,113,115,116],which:[0,3,8,9,12,47,48,74,89,151,158],whitespac:0,wide:48,width:[2,18,52,77,132,134,139,140,143,159],wiki:42,wikipedia:42,win:12,win_:12,winbond:45,window:[1,9,59,89],windows_amd64:12,windows_requir:12,windowshelp:[59,73],wish:156,within:[0,3,12,32,104,106,136],without:[0,3,8,12,159],wojtczuk:[100,116],won:159,word:[0,18,137,154,159],word_offset:25,word_valu:[37,39,57],work:[0,9,12,27,158,159],working_st:97,would:89,wp:148,wpd:89,wpe:89,wrap:0,wrapper:[1,49,72],write:[0,1,2,8,9,22,30,37,43,89,103,109,111,131,132,134,137,139,140,141,142,143,144,146,147,148,153,154,158],write_ab:140,write_bar:140,write_block:52,write_byt:[37,41,42,52],write_cmos_high:22,write_cmos_low:22,write_command:25,write_cr:[23,60,62,64,66,70,71,74],write_data:25,write_dma:132,write_dword:37,write_field:144,write_ggtt_pt:27,write_ggtt_pte_from_pa:27,write_idx:25,write_io_bar_reg:30,write_io_port:[60,62,64,66,70,71,74],write_memori:25,write_memory_extend:25,write_mmcfg_reg:33,write_mmio_bar_reg:33,write_mmio_reg:[33,60,62,64,66,70,71,74],write_mmio_reg_byt:33,write_mmio_reg_dword:33,write_mmio_reg_word:33,write_msr:[35,60,62,64,66,70,71,74],write_pci_config:69,write_pci_reg:[60,62,64,66,70,71,74],write_phys_mem:[60,62,64,66,70,71,74],write_physical_mem:39,write_physical_mem_byt:39,write_physical_mem_dowrd:39,write_physical_mem_dword:39,write_physical_mem_word:39,write_port_byt:29,write_port_dword:29,write_port_word:29,write_rang:[25,41,42],write_spi:43,write_spi_from_fil:43,write_virtual_mem:57,write_virtual_mem_byt:57,write_virtual_mem_dowrd:57,write_virtual_mem_dword:57,write_virtual_mem_word:57,write_word:[37,52],writeabl:158,writeh:125,writel:125,writev:[137,154],written:[137,141,154],wrong:158,wsmt:21,www:[10,11,12,34,42,92,96,106,151,157],x00:[18,54],x2apicid:21,x32:12,x64:[9,12,36],x86:[12,36],x:[0,9,159],xen:100,xeno:87,xml:[1,2,3,129,159],xmm_buffer:[58,60,62,64,66,70,71,74],xrom:[8,37,143],xrom_addr:37,xrom_address:143,xrom_dump:37,xrom_head:37,xsdt:[20,21,123],y:0,ye:[0,12,97],yet:43,you:[0,1,10,13,43,46,74,156,157,159],your:[1,9,13,74,113,148,158,159],zen:0,zero:94,zerovector:54,zip:[10,13]},titles:["Python Version","Architecture Overview","Configuration Files","Writing Your Own Modules","OS Helpers and Drivers","Methods for Platform Detection","Sample module code template","<no title>","CHIPSEC Modules","CHIPSEC","Linux Installation","DAL Windows Installation","Windows Installation","Building a Bootable USB drive with UEFI Shell (x64)","chipsec.cfg.parsers package","chipsec.cfg.parsers.core_parsers module","chipsec.config module","chipsec.fuzzing package","chipsec.fuzzing.primitives module","chipsec.hal package","chipsec.hal.acpi module","chipsec.hal.acpi_tables module","chipsec.hal.cmos module","chipsec.hal.cpu module","chipsec.hal.cpuid module","chipsec.hal.ec module","chipsec.hal.hal_base module","chipsec.hal.igd module","chipsec.hal.interrupts module","chipsec.hal.io module","chipsec.hal.iobar module","chipsec.hal.iommu module","chipsec.hal.locks module","chipsec.hal.mmio module","chipsec.hal.msgbus module","chipsec.hal.msr module","chipsec.hal.paging module","chipsec.hal.pci module","chipsec.hal.pcidb module","chipsec.hal.physmem module","chipsec.hal.smbios module","chipsec.hal.smbus module","chipsec.hal.spd module","chipsec.hal.spi module","chipsec.hal.spi_descriptor module","chipsec.hal.spi_jedec_ids module","chipsec.hal.spi_uefi module","chipsec.hal.tpm module","chipsec.hal.tpm12_commands module","chipsec.hal.tpm_eventlog module","chipsec.hal.ucode module","chipsec.hal.uefi module","chipsec.hal.uefi_common module","chipsec.hal.uefi_compression module","chipsec.hal.uefi_fv module","chipsec.hal.uefi_platform module","chipsec.hal.uefi_search module","chipsec.hal.virtmem module","chipsec.hal.vmm module","chipsec.helper package","chipsec.helper.basehelper module","chipsec.helper.dal package","chipsec.helper.dal.dalhelper module","chipsec.helper.efi package","chipsec.helper.efi.efihelper module","chipsec.helper.linux package","chipsec.helper.linux.linuxhelper module","chipsec.helper.linuxnative package","chipsec.helper.linuxnative.cpuid module","chipsec.helper.linuxnative.legacy_pci module","chipsec.helper.linuxnative.linuxnativehelper module","chipsec.helper.nonehelper module","chipsec.helper.oshelper module","chipsec.helper.windows package","chipsec.helper.windows.windowshelper module","chipsec.library package","chipsec.library.architecture module","chipsec.library.bits module","chipsec.library.memory module","chipsec.library.strings module","chipsec.library.structs module","chipsec.library.types module","chipsec.modules package","chipsec.modules.bdw package","chipsec.modules.byt package","chipsec.modules.common package","chipsec.modules.common.bios_kbrd_buffer module","chipsec.modules.common.bios_smi module","chipsec.modules.common.bios_ts module","chipsec.modules.common.bios_wp module","chipsec.modules.common.cet module","chipsec.modules.common.cpu package","chipsec.modules.common.cpu.cpu_info module","chipsec.modules.common.cpu.ia_untrusted module","chipsec.modules.common.cpu.spectre_v2 module","chipsec.modules.common.debugenabled module","chipsec.modules.common.ia32cfg module","chipsec.modules.common.me_mfg_mode module","chipsec.modules.common.memconfig module","chipsec.modules.common.memlock module","chipsec.modules.common.remap module","chipsec.modules.common.rtclock module","chipsec.modules.common.secureboot package","chipsec.modules.common.secureboot.variables module","chipsec.modules.common.sgx_check module","chipsec.modules.common.smm module","chipsec.modules.common.smm_code_chk module","chipsec.modules.common.smm_dma module","chipsec.modules.common.smrr module","chipsec.modules.common.spd_wd module","chipsec.modules.common.spi_access module","chipsec.modules.common.spi_desc module","chipsec.modules.common.spi_fdopss module","chipsec.modules.common.spi_lock module","chipsec.modules.common.uefi package","chipsec.modules.common.uefi.access_uefispec module","chipsec.modules.common.uefi.s3bootscript module","chipsec.modules.hsw package","chipsec.modules.ivb package","chipsec.modules.snb package","chipsec.options module","chipsec.parsers module","chipsec.utilcmd package","chipsec.utilcmd.acpi_cmd module","chipsec.utilcmd.chipset_cmd module","chipsec.utilcmd.cmos_cmd module","chipsec.utilcmd.config_cmd module","chipsec.utilcmd.cpu_cmd module","chipsec.utilcmd.decode_cmd module","chipsec.utilcmd.deltas_cmd module","chipsec.utilcmd.desc_cmd module","chipsec.utilcmd.ec_cmd module","chipsec.utilcmd.igd_cmd module","chipsec.utilcmd.interrupts_cmd module","chipsec.utilcmd.io_cmd module","chipsec.utilcmd.iommu_cmd module","chipsec.utilcmd.lock_check_cmd module","chipsec.utilcmd.mem_cmd module","chipsec.utilcmd.mmcfg_base_cmd module","chipsec.utilcmd.mmcfg_cmd module","chipsec.utilcmd.mmio_cmd module","chipsec.utilcmd.msgbus_cmd module","chipsec.utilcmd.msr_cmd module","chipsec.utilcmd.pci_cmd module","chipsec.utilcmd.reg_cmd module","chipsec.utilcmd.smbios_cmd module","chipsec.utilcmd.smbus_cmd module","chipsec.utilcmd.spd_cmd module","chipsec.utilcmd.spi_cmd module","chipsec.utilcmd.spidesc_cmd module","chipsec.utilcmd.tpm_cmd module","chipsec.utilcmd.txt_cmd module","chipsec.utilcmd.ucode_cmd module","chipsec.utilcmd.uefi_cmd module","chipsec.utilcmd.vmem_cmd module","chipsec.utilcmd.vmm_cmd module","Contact","Download CHIPSEC","Interpreting results","Running CHIPSEC"],titleterms:{"3":13,"6":13,"8":13,"abstract":1,"import":4,"new":4,access:12,access_uefispec:115,acpi:20,acpi_cmd:123,acpi_t:21,altern:12,architectur:[1,9,76],attack:8,autom:158,auxiliari:1,basehelp:[4,60],bdw:83,bios_kbrd_buff:86,bios_smi:87,bios_t:88,bios_wp:89,bit:77,boot:8,bootabl:13,build:[1,10,11,12,13],byt:84,cet:90,cfg:[2,14,15],check:12,chip:5,chipsec:[0,5,8,9,10,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,157,159],chipsec_main:[1,159],chipsec_util:[1,159],chipset:5,chipset_cmd:124,cmo:22,cmos_cmd:125,code:[0,6],command:[1,9],common:[85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116],compon:[1,2,4],config:[12,16],config_cmd:126,configur:[2,5,8],contact:156,content:[14,17,19,59,61,63,65,67,73,75,82,83,84,85,91,102,114,117,118,119,122],contribut:9,core:1,core_pars:15,cpu:[23,91,92,93,94],cpu_cmd:127,cpu_info:92,cpuid:[24,68],creat:[4,10],dal:[11,61,62],dalhelp:62,debugen:95,decode_cmd:128,deltas_cmd:129,depend:12,deprec:0,desc_cmd:130,detect:5,develop:9,did:5,distutil:0,download:157,drive:13,driver:[4,12],ec:25,ec_cmd:131,efi:[63,64],efihelp:64,eg:8,exampl:[2,4],execut:1,f:0,file:2,filter:12,firmwar:8,flow:1,from:[4,8],fuzz:[1,17,18],gener:158,github:157,guid:[0,9],hal:[1,4,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58],hal_bas:26,handler:8,hardwar:[1,8],helper:[4,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74],here:9,hint:0,hsw:117,ia32cfg:96,ia_untrust:93,igd:27,igd_cmd:132,imag:10,incorrect:8,inform:5,instal:[9,10,11,12,13],interfac:8,interpret:158,interrupt:28,interrupts_cmd:133,invok:4,io:29,io_cmd:134,iobar:30,iommu:31,iommu_cmd:135,ivb:118,kali:10,kernel:12,layer:1,legacy_pci:69,librari:[75,76,77,78,79,80,81],linux:[10,65,66],linuxhelp:66,linuxn:[67,68,69,70],linuxnativehelp:70,list:2,liter:0,live:10,locat:5,lock:32,lock_check_cmd:136,me_mfg_mod:97,mean:158,mem_cmd:137,memconfig:98,memlock:99,memori:78,method:[5,12],misc:8,mmcfg_base_cmd:138,mmcfg_cmd:139,mmio:33,mmio_cmd:140,modul:[0,3,4,6,8,9,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63,64,65,66,67,68,69,70,71,72,73,74,75,76,77,78,79,80,81,82,83,84,85,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155,158],mostli:4,msgbu:34,msgbus_cmd:141,msr:35,msr_cmd:142,network:8,nonehelp:71,numer:0,off:12,oper:0,option:[5,13,120,159],os:4,oshelp:72,overview:1,own:3,packag:[14,17,19,59,61,63,65,67,73,75,82,83,84,85,91,102,114,117,118,119,122,159],page:36,parser:[14,15,121],pch:5,pci:[5,12,37],pci_cmd:143,pcidb:38,pep:0,persist:8,physmem:39,platform:[5,8],power:8,prerequisit:[10,11],primit:18,processor:5,program:1,protect:8,py:5,python:[0,13,157,159],reg_cmd:144,releas:157,remap:100,repositori:157,result:158,resum:8,rom:8,rtclock:101,run:[10,13,159],runtim:8,s3bootscript:116,sampl:6,script:1,secur:8,secureboot:[102,103],sgx_check:104,shell:[13,159],signatur:12,sleep:8,smbio:40,smbios_cmd:145,smbu:41,smbus_cmd:146,smi:8,smm:105,smm_code_chk:106,smm_dma:107,smram:8,smrr:108,snb:119,space:12,spd:42,spd_cmd:147,spd_wd:109,spectre_v2:94,spi:43,spi_access:110,spi_cmd:148,spi_desc:111,spi_descriptor:44,spi_fdopss:112,spi_jedec_id:45,spi_lock:113,spi_uefi:46,spidesc_cmd:149,start:9,state:8,string:[0,79],struct:80,style:[0,9],submodul:[14,17,19,59,61,63,65,67,73,75,85,91,102,114,122],subpackag:[59,82,85],support:0,surfac:8,templat:6,test:[12,158],time:8,tool:158,tpm12_command:48,tpm:47,tpm_cmd:150,tpm_eventlog:49,transit:8,turn:12,txt_cmd:151,type:[0,81],ucod:50,ucode_cmd:152,uefi:[13,51,114,115,116],uefi_cmd:153,uefi_common:52,uefi_compress:53,uefi_fv:54,uefi_platform:55,uefi_search:56,underscor:0,updat:8,us:[5,9,159],usb:13,utilcmd:[122,123,124,125,126,127,128,129,130,131,132,133,134,135,136,137,138,139,140,141,142,143,144,145,146,147,148,149,150,151,152,153,154,155],variabl:103,vector:8,version:0,vid:5,virtmem:57,vmem_cmd:154,vmm:58,vmm_cmd:155,walru:0,window:[11,12,73,74],windowshelp:74,write:3,x64:13,your:3}}) \ No newline at end of file +Search.setIndex({"docnames": ["contribution/code-style-python", "development/Architecture-Overview", "development/Configuration-Files", "development/Developing", "development/OS-Helpers-and-Drivers", "development/Platform-Detection", "development/Sample-Module-Code", "development/Sample-Util-Command", "development/Vulnerabilities-and-CHIPSEC-Modules", "index", "installation/InstallLinux", "installation/InstallWinDAL", "installation/InstallWindows", "installation/USBwithUEFIShell", "modules/chipsec.cfg.8086", "modules/chipsec.cfg.8086.adl.xml", "modules/chipsec.cfg.8086.apl.xml", "modules/chipsec.cfg.8086.avn.xml", "modules/chipsec.cfg.8086.bdw.xml", "modules/chipsec.cfg.8086.bdx.xml", "modules/chipsec.cfg.8086.byt.xml", "modules/chipsec.cfg.8086.cfl.xml", "modules/chipsec.cfg.8086.cht.xml", "modules/chipsec.cfg.8086.cml.xml", "modules/chipsec.cfg.8086.common.xml", "modules/chipsec.cfg.8086.dnv.xml", "modules/chipsec.cfg.8086.ehl.xml", "modules/chipsec.cfg.8086.glk.xml", "modules/chipsec.cfg.8086.hsw.xml", "modules/chipsec.cfg.8086.hsx.xml", "modules/chipsec.cfg.8086.icl.xml", "modules/chipsec.cfg.8086.icx.xml", "modules/chipsec.cfg.8086.iommu.xml", "modules/chipsec.cfg.8086.ivb.xml", "modules/chipsec.cfg.8086.ivt.xml", "modules/chipsec.cfg.8086.jkt.xml", "modules/chipsec.cfg.8086.kbl.xml", "modules/chipsec.cfg.8086.pch_1xx.xml", "modules/chipsec.cfg.8086.pch_2xx.xml", "modules/chipsec.cfg.8086.pch_3xx.xml", "modules/chipsec.cfg.8086.pch_3xxlp.xml", "modules/chipsec.cfg.8086.pch_3xxop.xml", "modules/chipsec.cfg.8086.pch_495.xml", "modules/chipsec.cfg.8086.pch_4xx.xml", "modules/chipsec.cfg.8086.pch_4xxh.xml", "modules/chipsec.cfg.8086.pch_4xxlp.xml", "modules/chipsec.cfg.8086.pch_5xxh.xml", "modules/chipsec.cfg.8086.pch_5xxlp.xml", "modules/chipsec.cfg.8086.pch_6xxP.xml", "modules/chipsec.cfg.8086.pch_6xxS.xml", "modules/chipsec.cfg.8086.pch_7x.xml", "modules/chipsec.cfg.8086.pch_8x.xml", "modules/chipsec.cfg.8086.pch_c60x.xml", "modules/chipsec.cfg.8086.pch_c61x.xml", "modules/chipsec.cfg.8086.pch_c620.xml", "modules/chipsec.cfg.8086.pmc_i440fx.xml", "modules/chipsec.cfg.8086.qrk.xml", "modules/chipsec.cfg.8086.rkl.xml", "modules/chipsec.cfg.8086.rpl.xml", "modules/chipsec.cfg.8086.sfdp.xml", "modules/chipsec.cfg.8086.skl.xml", "modules/chipsec.cfg.8086.skx.xml", "modules/chipsec.cfg.8086.snb.xml", "modules/chipsec.cfg.8086.tglh.xml", "modules/chipsec.cfg.8086.tglu.xml", "modules/chipsec.cfg.8086.tpm12.xml", "modules/chipsec.cfg.8086.txt.xml", "modules/chipsec.cfg.8086.whl.xml", "modules/chipsec.cfg.parsers", "modules/chipsec.cfg.parsers.core_parsers", "modules/chipsec.config", "modules/chipsec.fuzzing", "modules/chipsec.fuzzing.primitives", "modules/chipsec.hal", "modules/chipsec.hal.acpi", "modules/chipsec.hal.acpi_tables", "modules/chipsec.hal.cmos", "modules/chipsec.hal.cpu", "modules/chipsec.hal.cpuid", "modules/chipsec.hal.ec", "modules/chipsec.hal.hal_base", "modules/chipsec.hal.igd", "modules/chipsec.hal.interrupts", "modules/chipsec.hal.io", "modules/chipsec.hal.iobar", "modules/chipsec.hal.iommu", "modules/chipsec.hal.locks", "modules/chipsec.hal.mmio", "modules/chipsec.hal.msgbus", "modules/chipsec.hal.msr", "modules/chipsec.hal.paging", "modules/chipsec.hal.pci", "modules/chipsec.hal.pcidb", "modules/chipsec.hal.physmem", "modules/chipsec.hal.smbios", "modules/chipsec.hal.smbus", "modules/chipsec.hal.spd", "modules/chipsec.hal.spi", "modules/chipsec.hal.spi_descriptor", "modules/chipsec.hal.spi_jedec_ids", "modules/chipsec.hal.spi_uefi", "modules/chipsec.hal.tpm", "modules/chipsec.hal.tpm12_commands", "modules/chipsec.hal.tpm_eventlog", "modules/chipsec.hal.ucode", "modules/chipsec.hal.uefi", "modules/chipsec.hal.uefi_common", "modules/chipsec.hal.uefi_compression", "modules/chipsec.hal.uefi_fv", "modules/chipsec.hal.uefi_platform", "modules/chipsec.hal.uefi_search", "modules/chipsec.hal.virtmem", "modules/chipsec.hal.vmm", "modules/chipsec.helper", "modules/chipsec.helper.basehelper", "modules/chipsec.helper.dal", "modules/chipsec.helper.dal.dalhelper", "modules/chipsec.helper.efi", "modules/chipsec.helper.efi.efihelper", "modules/chipsec.helper.linux", "modules/chipsec.helper.linux.linuxhelper", "modules/chipsec.helper.linuxnative", "modules/chipsec.helper.linuxnative.cpuid", "modules/chipsec.helper.linuxnative.legacy_pci", "modules/chipsec.helper.linuxnative.linuxnativehelper", "modules/chipsec.helper.nonehelper", "modules/chipsec.helper.oshelper", "modules/chipsec.helper.windows", "modules/chipsec.helper.windows.windowshelper", "modules/chipsec.library", "modules/chipsec.library.architecture", "modules/chipsec.library.bits", "modules/chipsec.library.control", "modules/chipsec.library.device", "modules/chipsec.library.lock", "modules/chipsec.library.memory", "modules/chipsec.library.module_helper", "modules/chipsec.library.options", "modules/chipsec.library.register", "modules/chipsec.library.returncode", "modules/chipsec.library.strings", "modules/chipsec.library.structs", "modules/chipsec.library.types", "modules/chipsec.modules", "modules/chipsec.modules.bdw", "modules/chipsec.modules.byt", "modules/chipsec.modules.common", "modules/chipsec.modules.common.bios_kbrd_buffer", "modules/chipsec.modules.common.bios_smi", "modules/chipsec.modules.common.bios_ts", "modules/chipsec.modules.common.bios_wp", "modules/chipsec.modules.common.cet", "modules/chipsec.modules.common.cpu", "modules/chipsec.modules.common.cpu.cpu_info", "modules/chipsec.modules.common.cpu.ia_untrusted", "modules/chipsec.modules.common.cpu.spectre_v2", "modules/chipsec.modules.common.debugenabled", "modules/chipsec.modules.common.ia32cfg", "modules/chipsec.modules.common.me_mfg_mode", "modules/chipsec.modules.common.memconfig", "modules/chipsec.modules.common.memlock", "modules/chipsec.modules.common.remap", "modules/chipsec.modules.common.rtclock", "modules/chipsec.modules.common.secureboot", "modules/chipsec.modules.common.secureboot.variables", "modules/chipsec.modules.common.sgx_check", "modules/chipsec.modules.common.smm", "modules/chipsec.modules.common.smm_code_chk", "modules/chipsec.modules.common.smm_dma", "modules/chipsec.modules.common.smrr", "modules/chipsec.modules.common.spd_wd", "modules/chipsec.modules.common.spi_access", "modules/chipsec.modules.common.spi_desc", "modules/chipsec.modules.common.spi_fdopss", "modules/chipsec.modules.common.spi_lock", "modules/chipsec.modules.common.uefi", "modules/chipsec.modules.common.uefi.access_uefispec", "modules/chipsec.modules.common.uefi.s3bootscript", "modules/chipsec.modules.hsw", "modules/chipsec.modules.ivb", "modules/chipsec.modules.snb", "modules/chipsec.modules.tools", "modules/chipsec.modules.tools.cpu", "modules/chipsec.modules.tools.cpu.sinkhole", "modules/chipsec.modules.tools.generate_test_id", "modules/chipsec.modules.tools.secureboot", "modules/chipsec.modules.tools.secureboot.te", "modules/chipsec.modules.tools.smm", "modules/chipsec.modules.tools.smm.rogue_mmio_bar", "modules/chipsec.modules.tools.smm.smm_ptr", "modules/chipsec.modules.tools.uefi", "modules/chipsec.modules.tools.uefi.reputation", "modules/chipsec.modules.tools.uefi.s3script_modify", "modules/chipsec.modules.tools.uefi.scan_blocked", "modules/chipsec.modules.tools.uefi.scan_image", "modules/chipsec.modules.tools.uefi.uefivar_fuzz", "modules/chipsec.modules.tools.vmm", "modules/chipsec.modules.tools.vmm.common", "modules/chipsec.modules.tools.vmm.cpuid_fuzz", "modules/chipsec.modules.tools.vmm.ept_finder", "modules/chipsec.modules.tools.vmm.hv", "modules/chipsec.modules.tools.vmm.hv.define", "modules/chipsec.modules.tools.vmm.hv.hypercall", "modules/chipsec.modules.tools.vmm.hv.hypercallfuzz", "modules/chipsec.modules.tools.vmm.hv.synth_dev", "modules/chipsec.modules.tools.vmm.hv.synth_kbd", "modules/chipsec.modules.tools.vmm.hv.vmbus", "modules/chipsec.modules.tools.vmm.hv.vmbusfuzz", "modules/chipsec.modules.tools.vmm.hypercallfuzz", "modules/chipsec.modules.tools.vmm.iofuzz", "modules/chipsec.modules.tools.vmm.msr_fuzz", "modules/chipsec.modules.tools.vmm.pcie_fuzz", "modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz", "modules/chipsec.modules.tools.vmm.vbox", "modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase", "modules/chipsec.modules.tools.vmm.venom", "modules/chipsec.modules.tools.vmm.xen", "modules/chipsec.modules.tools.vmm.xen.define", "modules/chipsec.modules.tools.vmm.xen.hypercall", "modules/chipsec.modules.tools.vmm.xen.hypercallfuzz", "modules/chipsec.modules.tools.vmm.xen.xsa188", "modules/chipsec.modules.tools.wsmt", "modules/chipsec.parsers", "modules/chipsec.testcase", "modules/chipsec.utilcmd", "modules/chipsec.utilcmd.acpi_cmd", "modules/chipsec.utilcmd.chipset_cmd", "modules/chipsec.utilcmd.cmos_cmd", "modules/chipsec.utilcmd.config_cmd", "modules/chipsec.utilcmd.cpu_cmd", "modules/chipsec.utilcmd.decode_cmd", "modules/chipsec.utilcmd.deltas_cmd", "modules/chipsec.utilcmd.desc_cmd", "modules/chipsec.utilcmd.ec_cmd", "modules/chipsec.utilcmd.igd_cmd", "modules/chipsec.utilcmd.interrupts_cmd", "modules/chipsec.utilcmd.io_cmd", "modules/chipsec.utilcmd.iommu_cmd", "modules/chipsec.utilcmd.lock_check_cmd", "modules/chipsec.utilcmd.mem_cmd", "modules/chipsec.utilcmd.mmcfg_base_cmd", "modules/chipsec.utilcmd.mmcfg_cmd", "modules/chipsec.utilcmd.mmio_cmd", "modules/chipsec.utilcmd.msgbus_cmd", "modules/chipsec.utilcmd.msr_cmd", "modules/chipsec.utilcmd.pci_cmd", "modules/chipsec.utilcmd.reg_cmd", "modules/chipsec.utilcmd.smbios_cmd", "modules/chipsec.utilcmd.smbus_cmd", "modules/chipsec.utilcmd.spd_cmd", "modules/chipsec.utilcmd.spi_cmd", "modules/chipsec.utilcmd.spidesc_cmd", "modules/chipsec.utilcmd.tpm_cmd", "modules/chipsec.utilcmd.txt_cmd", "modules/chipsec.utilcmd.ucode_cmd", "modules/chipsec.utilcmd.uefi_cmd", "modules/chipsec.utilcmd.vmem_cmd", "modules/chipsec.utilcmd.vmm_cmd", "start/Contact", "start/Download", "usage/Interpreting-Results", "usage/Running-Chipsec"], "filenames": ["contribution/code-style-python.rst", "development/Architecture-Overview.rst", "development/Configuration-Files.rst", "development/Developing.rst", "development/OS-Helpers-and-Drivers.rst", "development/Platform-Detection.rst", "development/Sample-Module-Code.rst", "development/Sample-Util-Command.rst", "development/Vulnerabilities-and-CHIPSEC-Modules.rst", "index.rst", "installation/InstallLinux.rst", "installation/InstallWinDAL.rst", "installation/InstallWindows.rst", "installation/USBwithUEFIShell.rst", "modules/chipsec.cfg.8086.rst", "modules/chipsec.cfg.8086.adl.xml.rst", "modules/chipsec.cfg.8086.apl.xml.rst", "modules/chipsec.cfg.8086.avn.xml.rst", "modules/chipsec.cfg.8086.bdw.xml.rst", "modules/chipsec.cfg.8086.bdx.xml.rst", "modules/chipsec.cfg.8086.byt.xml.rst", "modules/chipsec.cfg.8086.cfl.xml.rst", "modules/chipsec.cfg.8086.cht.xml.rst", "modules/chipsec.cfg.8086.cml.xml.rst", "modules/chipsec.cfg.8086.common.xml.rst", "modules/chipsec.cfg.8086.dnv.xml.rst", "modules/chipsec.cfg.8086.ehl.xml.rst", "modules/chipsec.cfg.8086.glk.xml.rst", "modules/chipsec.cfg.8086.hsw.xml.rst", "modules/chipsec.cfg.8086.hsx.xml.rst", "modules/chipsec.cfg.8086.icl.xml.rst", "modules/chipsec.cfg.8086.icx.xml.rst", "modules/chipsec.cfg.8086.iommu.xml.rst", "modules/chipsec.cfg.8086.ivb.xml.rst", "modules/chipsec.cfg.8086.ivt.xml.rst", "modules/chipsec.cfg.8086.jkt.xml.rst", "modules/chipsec.cfg.8086.kbl.xml.rst", "modules/chipsec.cfg.8086.pch_1xx.xml.rst", "modules/chipsec.cfg.8086.pch_2xx.xml.rst", "modules/chipsec.cfg.8086.pch_3xx.xml.rst", "modules/chipsec.cfg.8086.pch_3xxlp.xml.rst", "modules/chipsec.cfg.8086.pch_3xxop.xml.rst", "modules/chipsec.cfg.8086.pch_495.xml.rst", "modules/chipsec.cfg.8086.pch_4xx.xml.rst", "modules/chipsec.cfg.8086.pch_4xxh.xml.rst", "modules/chipsec.cfg.8086.pch_4xxlp.xml.rst", "modules/chipsec.cfg.8086.pch_5xxh.xml.rst", "modules/chipsec.cfg.8086.pch_5xxlp.xml.rst", "modules/chipsec.cfg.8086.pch_6xxP.xml.rst", "modules/chipsec.cfg.8086.pch_6xxS.xml.rst", "modules/chipsec.cfg.8086.pch_7x.xml.rst", "modules/chipsec.cfg.8086.pch_8x.xml.rst", "modules/chipsec.cfg.8086.pch_c60x.xml.rst", "modules/chipsec.cfg.8086.pch_c61x.xml.rst", "modules/chipsec.cfg.8086.pch_c620.xml.rst", "modules/chipsec.cfg.8086.pmc_i440fx.xml.rst", "modules/chipsec.cfg.8086.qrk.xml.rst", "modules/chipsec.cfg.8086.rkl.xml.rst", "modules/chipsec.cfg.8086.rpl.xml.rst", "modules/chipsec.cfg.8086.sfdp.xml.rst", "modules/chipsec.cfg.8086.skl.xml.rst", "modules/chipsec.cfg.8086.skx.xml.rst", "modules/chipsec.cfg.8086.snb.xml.rst", "modules/chipsec.cfg.8086.tglh.xml.rst", "modules/chipsec.cfg.8086.tglu.xml.rst", "modules/chipsec.cfg.8086.tpm12.xml.rst", "modules/chipsec.cfg.8086.txt.xml.rst", "modules/chipsec.cfg.8086.whl.xml.rst", "modules/chipsec.cfg.parsers.rst", "modules/chipsec.cfg.parsers.core_parsers.rst", "modules/chipsec.config.rst", "modules/chipsec.fuzzing.rst", "modules/chipsec.fuzzing.primitives.rst", "modules/chipsec.hal.rst", "modules/chipsec.hal.acpi.rst", "modules/chipsec.hal.acpi_tables.rst", "modules/chipsec.hal.cmos.rst", "modules/chipsec.hal.cpu.rst", "modules/chipsec.hal.cpuid.rst", "modules/chipsec.hal.ec.rst", "modules/chipsec.hal.hal_base.rst", "modules/chipsec.hal.igd.rst", "modules/chipsec.hal.interrupts.rst", "modules/chipsec.hal.io.rst", "modules/chipsec.hal.iobar.rst", "modules/chipsec.hal.iommu.rst", "modules/chipsec.hal.locks.rst", "modules/chipsec.hal.mmio.rst", "modules/chipsec.hal.msgbus.rst", "modules/chipsec.hal.msr.rst", "modules/chipsec.hal.paging.rst", "modules/chipsec.hal.pci.rst", "modules/chipsec.hal.pcidb.rst", "modules/chipsec.hal.physmem.rst", "modules/chipsec.hal.smbios.rst", "modules/chipsec.hal.smbus.rst", "modules/chipsec.hal.spd.rst", "modules/chipsec.hal.spi.rst", "modules/chipsec.hal.spi_descriptor.rst", "modules/chipsec.hal.spi_jedec_ids.rst", "modules/chipsec.hal.spi_uefi.rst", "modules/chipsec.hal.tpm.rst", "modules/chipsec.hal.tpm12_commands.rst", "modules/chipsec.hal.tpm_eventlog.rst", "modules/chipsec.hal.ucode.rst", "modules/chipsec.hal.uefi.rst", "modules/chipsec.hal.uefi_common.rst", "modules/chipsec.hal.uefi_compression.rst", "modules/chipsec.hal.uefi_fv.rst", "modules/chipsec.hal.uefi_platform.rst", "modules/chipsec.hal.uefi_search.rst", "modules/chipsec.hal.virtmem.rst", "modules/chipsec.hal.vmm.rst", "modules/chipsec.helper.rst", "modules/chipsec.helper.basehelper.rst", "modules/chipsec.helper.dal.rst", "modules/chipsec.helper.dal.dalhelper.rst", "modules/chipsec.helper.efi.rst", "modules/chipsec.helper.efi.efihelper.rst", "modules/chipsec.helper.linux.rst", "modules/chipsec.helper.linux.linuxhelper.rst", "modules/chipsec.helper.linuxnative.rst", "modules/chipsec.helper.linuxnative.cpuid.rst", "modules/chipsec.helper.linuxnative.legacy_pci.rst", "modules/chipsec.helper.linuxnative.linuxnativehelper.rst", "modules/chipsec.helper.nonehelper.rst", "modules/chipsec.helper.oshelper.rst", "modules/chipsec.helper.windows.rst", "modules/chipsec.helper.windows.windowshelper.rst", "modules/chipsec.library.rst", "modules/chipsec.library.architecture.rst", "modules/chipsec.library.bits.rst", "modules/chipsec.library.control.rst", "modules/chipsec.library.device.rst", "modules/chipsec.library.lock.rst", "modules/chipsec.library.memory.rst", "modules/chipsec.library.module_helper.rst", "modules/chipsec.library.options.rst", "modules/chipsec.library.register.rst", "modules/chipsec.library.returncode.rst", "modules/chipsec.library.strings.rst", "modules/chipsec.library.structs.rst", "modules/chipsec.library.types.rst", "modules/chipsec.modules.rst", "modules/chipsec.modules.bdw.rst", "modules/chipsec.modules.byt.rst", "modules/chipsec.modules.common.rst", "modules/chipsec.modules.common.bios_kbrd_buffer.rst", "modules/chipsec.modules.common.bios_smi.rst", "modules/chipsec.modules.common.bios_ts.rst", "modules/chipsec.modules.common.bios_wp.rst", "modules/chipsec.modules.common.cet.rst", "modules/chipsec.modules.common.cpu.rst", "modules/chipsec.modules.common.cpu.cpu_info.rst", "modules/chipsec.modules.common.cpu.ia_untrusted.rst", "modules/chipsec.modules.common.cpu.spectre_v2.rst", "modules/chipsec.modules.common.debugenabled.rst", "modules/chipsec.modules.common.ia32cfg.rst", "modules/chipsec.modules.common.me_mfg_mode.rst", "modules/chipsec.modules.common.memconfig.rst", "modules/chipsec.modules.common.memlock.rst", "modules/chipsec.modules.common.remap.rst", "modules/chipsec.modules.common.rtclock.rst", "modules/chipsec.modules.common.secureboot.rst", "modules/chipsec.modules.common.secureboot.variables.rst", "modules/chipsec.modules.common.sgx_check.rst", "modules/chipsec.modules.common.smm.rst", "modules/chipsec.modules.common.smm_code_chk.rst", "modules/chipsec.modules.common.smm_dma.rst", "modules/chipsec.modules.common.smrr.rst", "modules/chipsec.modules.common.spd_wd.rst", "modules/chipsec.modules.common.spi_access.rst", "modules/chipsec.modules.common.spi_desc.rst", "modules/chipsec.modules.common.spi_fdopss.rst", "modules/chipsec.modules.common.spi_lock.rst", "modules/chipsec.modules.common.uefi.rst", "modules/chipsec.modules.common.uefi.access_uefispec.rst", "modules/chipsec.modules.common.uefi.s3bootscript.rst", "modules/chipsec.modules.hsw.rst", "modules/chipsec.modules.ivb.rst", "modules/chipsec.modules.snb.rst", "modules/chipsec.modules.tools.rst", "modules/chipsec.modules.tools.cpu.rst", "modules/chipsec.modules.tools.cpu.sinkhole.rst", "modules/chipsec.modules.tools.generate_test_id.rst", "modules/chipsec.modules.tools.secureboot.rst", "modules/chipsec.modules.tools.secureboot.te.rst", "modules/chipsec.modules.tools.smm.rst", "modules/chipsec.modules.tools.smm.rogue_mmio_bar.rst", "modules/chipsec.modules.tools.smm.smm_ptr.rst", "modules/chipsec.modules.tools.uefi.rst", "modules/chipsec.modules.tools.uefi.reputation.rst", "modules/chipsec.modules.tools.uefi.s3script_modify.rst", "modules/chipsec.modules.tools.uefi.scan_blocked.rst", "modules/chipsec.modules.tools.uefi.scan_image.rst", "modules/chipsec.modules.tools.uefi.uefivar_fuzz.rst", "modules/chipsec.modules.tools.vmm.rst", "modules/chipsec.modules.tools.vmm.common.rst", "modules/chipsec.modules.tools.vmm.cpuid_fuzz.rst", "modules/chipsec.modules.tools.vmm.ept_finder.rst", "modules/chipsec.modules.tools.vmm.hv.rst", "modules/chipsec.modules.tools.vmm.hv.define.rst", "modules/chipsec.modules.tools.vmm.hv.hypercall.rst", "modules/chipsec.modules.tools.vmm.hv.hypercallfuzz.rst", "modules/chipsec.modules.tools.vmm.hv.synth_dev.rst", "modules/chipsec.modules.tools.vmm.hv.synth_kbd.rst", "modules/chipsec.modules.tools.vmm.hv.vmbus.rst", "modules/chipsec.modules.tools.vmm.hv.vmbusfuzz.rst", "modules/chipsec.modules.tools.vmm.hypercallfuzz.rst", "modules/chipsec.modules.tools.vmm.iofuzz.rst", "modules/chipsec.modules.tools.vmm.msr_fuzz.rst", "modules/chipsec.modules.tools.vmm.pcie_fuzz.rst", "modules/chipsec.modules.tools.vmm.pcie_overlap_fuzz.rst", "modules/chipsec.modules.tools.vmm.vbox.rst", "modules/chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase.rst", "modules/chipsec.modules.tools.vmm.venom.rst", "modules/chipsec.modules.tools.vmm.xen.rst", "modules/chipsec.modules.tools.vmm.xen.define.rst", "modules/chipsec.modules.tools.vmm.xen.hypercall.rst", "modules/chipsec.modules.tools.vmm.xen.hypercallfuzz.rst", "modules/chipsec.modules.tools.vmm.xen.xsa188.rst", "modules/chipsec.modules.tools.wsmt.rst", "modules/chipsec.parsers.rst", "modules/chipsec.testcase.rst", "modules/chipsec.utilcmd.rst", "modules/chipsec.utilcmd.acpi_cmd.rst", "modules/chipsec.utilcmd.chipset_cmd.rst", "modules/chipsec.utilcmd.cmos_cmd.rst", "modules/chipsec.utilcmd.config_cmd.rst", "modules/chipsec.utilcmd.cpu_cmd.rst", "modules/chipsec.utilcmd.decode_cmd.rst", "modules/chipsec.utilcmd.deltas_cmd.rst", "modules/chipsec.utilcmd.desc_cmd.rst", "modules/chipsec.utilcmd.ec_cmd.rst", "modules/chipsec.utilcmd.igd_cmd.rst", "modules/chipsec.utilcmd.interrupts_cmd.rst", "modules/chipsec.utilcmd.io_cmd.rst", "modules/chipsec.utilcmd.iommu_cmd.rst", "modules/chipsec.utilcmd.lock_check_cmd.rst", "modules/chipsec.utilcmd.mem_cmd.rst", "modules/chipsec.utilcmd.mmcfg_base_cmd.rst", "modules/chipsec.utilcmd.mmcfg_cmd.rst", "modules/chipsec.utilcmd.mmio_cmd.rst", "modules/chipsec.utilcmd.msgbus_cmd.rst", "modules/chipsec.utilcmd.msr_cmd.rst", "modules/chipsec.utilcmd.pci_cmd.rst", "modules/chipsec.utilcmd.reg_cmd.rst", "modules/chipsec.utilcmd.smbios_cmd.rst", "modules/chipsec.utilcmd.smbus_cmd.rst", "modules/chipsec.utilcmd.spd_cmd.rst", "modules/chipsec.utilcmd.spi_cmd.rst", "modules/chipsec.utilcmd.spidesc_cmd.rst", "modules/chipsec.utilcmd.tpm_cmd.rst", "modules/chipsec.utilcmd.txt_cmd.rst", "modules/chipsec.utilcmd.ucode_cmd.rst", "modules/chipsec.utilcmd.uefi_cmd.rst", "modules/chipsec.utilcmd.vmem_cmd.rst", "modules/chipsec.utilcmd.vmm_cmd.rst", "start/Contact.rst", "start/Download.rst", "usage/Interpreting-Results.rst", "usage/Running-Chipsec.rst"], "titles": ["Python Version", "Architecture Overview", "Configuration Files", "Writing Your Own Modules", "OS Helpers and Drivers", "Methods for Platform Detection", "Sample module code template", "<no title>", "CHIPSEC Modules", "CHIPSEC 1.13.0", "Linux Installation", "DAL Windows Installation", "Windows Installation", "Building a Bootable USB drive with UEFI Shell (x64)", "<no title>", "adl", "apl", "avn", "bdw", "bdx", "byt", "cfl", "cht", "cml", "common", "dnv", "ehl", "glk", "hsw", "hsx", "icl", "icx", "iommu", "ivb", "ivt", "jkt", "kbl", "pch_1xx", "pch_2xx", "pch_3xx", "pch_3xxlp", "pch_3xxop", "pch_495", "pch_4xx", "pch_4xxh", "pch_4xxlp", "pch_5xxh", "pch_5xxlp", "pch_6xxP", "pch_6xxS", "pch_7x", "pch_8x", "pch_c60x", "pch_c61x", "pch_c620", "pmc_i440fx", "qrk", "rkl", "rpl", "sfdp", "skl", "skx", "snb", "tglh", "tglu", "tpm12", "txt", "whl", "parsers package", "core_parsers module", "config module", "fuzzing package", "primitives module", "hal package", "acpi module", "acpi_tables module", "cmos module", "cpu module", "cpuid module", "ec module", "hal_base module", "igd module", "interrupts module", "io module", "iobar module", "iommu module", "locks module", "mmio module", "msgbus module", "msr module", "paging module", "pci module", "pcidb module", "physmem module", "smbios module", "smbus module", "spd module", "spi module", "spi_descriptor module", "spi_jedec_ids module", "spi_uefi module", "tpm module", "tpm12_commands module", "tpm_eventlog module", "ucode module", "uefi module", "uefi_common module", "uefi_compression module", "uefi_fv module", "uefi_platform module", "uefi_search module", "virtmem module", "vmm module", "helper package", "basehelper module", "dal package", "dalhelper module", "efi package", "efihelper module", "linux package", "linuxhelper module", "linuxnative package", "cpuid module", "legacy_pci module", "linuxnativehelper module", "nonehelper module", "oshelper module", "windows package", "windowshelper module", "library package", "architecture module", "bits module", "control module", "device module", "lock module", "memory module", "module_helper module", "options module", "register module", "returncode module", "strings module", "structs module", "types module", "modules package", "bdw package", "byt package", "common package", "bios_kbrd_buffer module", "bios_smi module", "bios_ts module", "bios_wp module", "cet module", "cpu package", "cpu_info module", "ia_untrusted module", "spectre_v2 module", "debugenabled module", "ia32cfg module", "me_mfg_mode module", "memconfig module", "memlock module", "remap module", "rtclock module", "secureboot package", "variables module", "sgx_check module", "smm module", "smm_code_chk module", "smm_dma module", "smrr module", "spd_wd module", "spi_access module", "spi_desc module", "spi_fdopss module", "spi_lock module", "uefi package", "access_uefispec module", "s3bootscript module", "hsw package", "ivb package", "snb package", "tools package", "cpu package", "sinkhole module", "generate_test_id module", "secureboot package", "te module", "smm package", "rogue_mmio_bar module", "smm_ptr module", "uefi package", "reputation module", "s3script_modify module", "scan_blocked module", "scan_image module", "uefivar_fuzz module", "vmm package", "common module", "cpuid_fuzz module", "ept_finder module", "hv package", "define module", "hypercall module", "hypercallfuzz module", "synth_dev module", "synth_kbd module", "vmbus module", "vmbusfuzz module", "hypercallfuzz module", "iofuzz module", "msr_fuzz module", "pcie_fuzz module", "pcie_overlap_fuzz module", "vbox package", "vbox_crash_apicbase module", "venom module", "xen package", "define module", "hypercall module", "hypercallfuzz module", "xsa188 module", "wsmt module", "parsers module", "testcase module", "utilcmd package", "acpi_cmd module", "chipset_cmd module", "cmos_cmd module", "config_cmd module", "cpu_cmd module", "decode_cmd module", "deltas_cmd module", "desc_cmd module", "ec_cmd module", "igd_cmd module", "interrupts_cmd module", "io_cmd module", "iommu_cmd module", "lock_check_cmd module", "mem_cmd module", "mmcfg_base_cmd module", "mmcfg_cmd module", "mmio_cmd module", "msgbus_cmd module", "msr_cmd module", "pci_cmd module", "reg_cmd module", "smbios_cmd module", "smbus_cmd module", "spd_cmd module", "spi_cmd module", "spidesc_cmd module", "tpm_cmd module", "txt_cmd module", "ucode_cmd module", "uefi_cmd module", "vmem_cmd module", "vmm_cmd module", "Contact", "Download CHIPSEC", "Interpreting results", "Running CHIPSEC"], "terms": {"all": [0, 1, 3, 7, 8, 150, 155, 156, 164, 167, 186, 189, 194, 195, 207, 208, 209, 210, 212, 219, 228, 238, 260, 261], "must": [0, 12, 150, 151, 191, 250], "limit": 0, "featur": [0, 8, 12, 59, 156, 157], "3": [0, 9, 10, 11, 12, 112, 150, 156, 158, 245, 252], "6": [0, 257], "8": [0, 12, 150, 170], "thi": [0, 3, 8, 9, 12, 13, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 92, 150, 155, 156, 158, 159, 160, 161, 166, 167, 168, 169, 170, 171, 172, 173, 174, 183, 188, 189, 191, 192, 193, 194, 195, 198, 199, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 230, 250, 260, 261], "i": [0, 3, 4, 5, 6, 8, 9, 10, 12, 15, 32, 36, 37, 40, 48, 49, 50, 51, 55, 57, 58, 60, 63, 64, 65, 66, 83, 84, 91, 97, 148, 150, 151, 155, 156, 158, 160, 164, 166, 167, 168, 169, 170, 174, 183, 184, 186, 188, 189, 191, 192, 193, 194, 195, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 221, 230, 236, 238, 250, 260, 261], "earliest": 0, "util": [0, 1, 7, 225, 226, 237, 250, 253, 261], "efi": [0, 4, 13, 103, 106, 109, 113, 118, 165, 177, 186, 191, 193, 194, 255, 260], "shell": [0, 9, 12, 165, 186], "mostli": 0, "follow": [0, 8, 10, 12, 13, 66, 103, 155, 156, 158, 160, 170, 188, 189, 198, 250, 258, 259], "pep8": 0, "some": [0, 3, 12, 150, 166, 171, 173, 259, 260], "except": [0, 4, 12, 183, 261], "attempt": [0, 9, 150, 167, 169, 176, 192, 261], "highlight": 0, "those": 0, "well": [0, 155, 260], "clarifi": 0, "other": [0, 3, 12, 150, 166, 174], "consist": [0, 155], "readabl": [0, 2, 167], "ar": [0, 1, 3, 5, 8, 9, 12, 13, 66, 150, 155, 156, 157, 159, 164, 169, 176, 186, 195, 259, 260, 261], "goal": 0, "expens": 0, "function": [0, 1, 3, 4, 8, 76, 77, 82, 90, 98, 100, 104, 105, 106, 108, 109, 110, 112, 118, 138, 166, 188, 197, 202, 206, 211, 218, 241, 245, 250, 257, 261], "If": [0, 3, 5, 9, 12, 97, 150, 168, 169, 172, 174, 186, 191, 193, 194, 230, 258, 261], "doubt": 0, "exist": [0, 9, 150, 192, 261], "format": [0, 13, 188, 189, 230, 231, 254], "set": [0, 3, 8, 9, 12, 150, 151, 155, 158, 160, 166, 167, 170, 174, 198, 208, 209, 210, 211, 212, 215], "recommend": [0, 12, 13, 260], "guidelin": 0, "convent": [0, 103], "lint": 0, "tool": [0, 8, 9, 10, 12, 13, 143, 174, 183, 184, 186, 188, 189, 191, 192, 193, 194, 195, 197, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 261], "includ": [0, 3, 8, 9, 10, 12, 90, 106, 139, 149, 155, 157, 160, 174, 195, 250, 260, 261], "flake8": 0, "configur": [0, 1, 3, 9, 12, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 52, 53, 54, 55, 56, 59, 60, 61, 62, 66, 67, 87, 91, 138, 148, 150, 157, 159, 160, 161, 165, 166, 168, 169, 174, 189, 192, 193, 194, 238, 245, 260, 261], "file": [0, 1, 3, 6, 7, 9, 11, 12, 13, 19, 21, 23, 24, 25, 26, 28, 29, 30, 31, 32, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 52, 53, 54, 55, 59, 60, 61, 67, 92, 96, 139, 155, 184, 186, 189, 191, 193, 194, 198, 199, 210, 230, 231, 238, 239, 250, 252, 255, 256, 259, 261], "config": [0, 10, 87, 186, 189, 192, 193, 228, 237, 241], "zen": 0, "great": 0, "philosophi": 0, "around": [0, 1, 126], "build": [0, 9, 259], "principl": 0, "20": 0, "header": [0, 8, 10, 91, 186, 207], "comment": 0, "us": [0, 1, 2, 3, 8, 10, 12, 15, 37, 48, 49, 50, 51, 55, 57, 58, 63, 64, 65, 97, 102, 105, 118, 148, 149, 150, 153, 154, 155, 156, 157, 158, 160, 161, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 183, 184, 189, 192, 193, 194, 195, 203, 204, 205, 207, 209, 210, 211, 214, 219, 220, 234, 250, 260], "singl": [0, 155], "line": [0, 9, 40, 116, 164, 169, 176, 177, 189, 198, 199, 208, 209, 210, 211, 225, 237, 253, 261], "hash": [0, 184, 191, 193], "number": [0, 191, 195, 198, 203, 207, 208, 209, 210, 219, 252], "sign": [0, 9, 12], "octothorp": 0, "should": [0, 3, 4, 5, 8, 9, 13, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 155, 166, 168, 172, 188, 189, 192, 193, 260, 261], "contain": [0, 8, 9, 192, 230, 250, 260], "space": [0, 66, 87, 236, 241], "immedi": 0, "after": [0, 12, 192, 198, 208, 209, 220, 259], "good": 0, "v": [0, 12, 201, 202, 203, 204, 205, 206, 207, 261], "doubl": 0, "quot": 0, "encourag": [0, 3], "can": [0, 2, 3, 8, 9, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 150, 155, 166, 169, 172, 191, 193, 194, 195, 214, 230, 245, 250, 259, 260, 261], "vari": 0, "case": [0, 172, 183, 193, 195], "avoid": 0, "backslash": 0, "prefer": 0, "also": [0, 3, 8, 150, 166, 168, 174, 258, 260, 261], "an": [0, 3, 9, 12, 150, 167, 169, 176, 177, 191, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 221, 230, 250, 258, 260], "accept": 0, "make": [0, 1, 12, 13, 169, 250, 258], "import": [0, 1, 3, 6, 7, 9, 97, 150, 158, 167, 191, 193, 261], "order": [0, 9, 150, 158, 189, 198, 230, 260], "standard": [0, 260], "librari": [0, 6], "third": 0, "parti": 0, "local": [0, 252], "applic": [0, 1, 3, 4, 6, 8, 9, 260], "from": [0, 1, 6, 7, 10, 12, 13, 66, 92, 116, 150, 155, 164, 168, 169, 184, 186, 191, 192, 193, 194, 198, 199, 230, 239, 250, 256, 260, 261], "could": [0, 1, 9, 168, 169, 172, 192, 250, 260], "pollut": 0, "namespac": [0, 7], "sy": [0, 203, 204, 205, 207], "module_common": [0, 1, 6], "basemodul": [0, 3, 6, 8], "returncod": [0, 6, 129], "moduleresult": [0, 3, 6], "bad": [0, 191, 193], "__future__": 0, "These": [0, 66, 169, 191, 250], "mai": [0, 9, 13, 20, 150, 155, 167, 168, 171, 173, 174, 183, 188, 189, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 230, 260], "work": [0, 9, 12, 81, 183, 260, 261], "older": [0, 259], "interpret": [0, 8, 9], "requir": [0, 5, 7, 9, 10, 12, 176, 177, 191, 193, 260], "environ": [0, 9, 66, 126, 164, 195, 198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220], "length": [0, 97, 239, 242, 250, 256], "maximum": [0, 97, 208, 209], "120": 0, "charact": [0, 260], "consid": [0, 171, 188], "rewrit": 0, "eg": [0, 6, 150], "simplifi": 0, "instead": [0, 155], "break": 0, "multipl": [0, 9, 230], "long": [0, 260], "indic": [0, 172, 195], "too": 0, "mani": 0, "thing": [0, 10], "happen": 0, "onc": [0, 150, 155, 167], "difficult": 0, "read": [0, 1, 3, 76, 84, 91, 97, 138, 155, 160, 166, 167, 172, 199, 210, 233, 234, 236, 238, 239, 241, 242, 243, 244, 245, 246, 248, 249, 250, 255, 256], "class": [0, 1, 3, 4, 6, 7, 8, 189, 245], "name": [0, 2, 3, 4, 6, 7, 8, 87, 184, 189, 191, 193, 195, 199, 219, 225, 228, 231, 238, 255, 258], "hal": [0, 3, 74, 75, 80, 94, 101, 102, 110, 261], "utilcmd": [0, 7], "uppercamelcas": 0, "pascalcas": 0, "word": [0, 239, 256, 261], "acronym": 0, "capit": 0, "test": [0, 1, 3, 6, 8, 9, 10, 150, 157, 183, 184, 186, 188, 189, 191, 192, 193, 195, 208, 209, 214, 215, 261], "match": [0, 5, 191, 193, 238], "which": [0, 3, 8, 9, 12, 150, 191, 192, 193, 212, 260], "typic": 0, "snake_cas": 0, "constant": 0, "capitalization_with_underscor": 0, "variabl": [0, 4, 8, 106, 143, 146, 163, 176, 195, 230, 250, 255, 260], "lower": 0, "text": 0, "between": [0, 1, 150, 211], "privat": [0, 66], "prefix": 0, "_private_vari": 0, "Not": [0, 260], "hard": 0, "rule": 0, "help": [0, 3, 188, 219, 261], "minim": [0, 4, 158, 191], "ani": [0, 8, 9, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 156, 167, 172, 258, 261], "collis": 0, "upstream": 0, "dunder": 0, "__dunders__": 0, "when": [0, 3, 8, 9, 12, 150, 155, 166, 169, 171, 183, 188, 193, 194, 210, 214, 250, 260], "overwrit": 0, "add": [0, 192], "onli": [0, 9, 66, 150, 151, 159, 161, 166, 170, 191, 193, 221, 261], "need": [0, 3, 4, 6, 10, 13, 150, 155, 158, 168, 169, 193, 194, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 261], "two": [0, 66], "befor": [0, 10, 191, 210], "indent": 0, "4": [0, 2, 20, 87, 97, 112, 150, 156, 158, 164, 209, 220, 229, 234, 241, 252, 261], "tab": 0, "No": [0, 12, 198], "mix": 0, "1": [0, 2, 3, 12, 66, 67, 88, 97, 103, 112, 150, 151, 155, 156, 158, 167, 191, 193, 195, 209, 210, 212, 236, 241, 245, 252, 260, 261], "updat": [0, 10, 12, 13, 19, 29, 52, 104, 155, 195], "id": [0, 16, 26, 27, 92, 99, 184, 199, 254], "default": [0, 4, 24, 96, 97, 155, 186, 191, 192, 193, 194, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220], "preced": 0, "comparison": 0, "parenthes": 0, "wrap": 0, "evalu": [0, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220], "logic": [0, 1, 6, 97, 155, 260], "section": [0, 3, 10, 13, 32, 88, 164, 191, 193, 230, 250], "improv": [0, 260], "while": [0, 172], "most": [0, 3, 8, 9, 158], "possibl": [0, 10, 150, 260], "left": 0, "right": 0, "chain": 0, "issu": [0, 9, 12, 150, 166, 168, 183, 258, 260], "test1": 0, "true": [0, 3, 6, 91], "test2": 0, "data_list": 0, "return": [0, 3, 6, 7, 151, 155, 156, 158, 160, 170, 176, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 260], "legal": 0, "behavior": [0, 169, 188, 195, 198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220], "evid": 0, "fals": [0, 6], "whitespac": 0, "insid": 0, "bracket": 0, "brace": 0, "comma": 0, "colon": 0, "semicolon": 0, "trail": [0, 20, 22], "non": [0, 169, 195], "ascii": 0, "anywher": 0, "encod": 0, "begin": 0, "utf": 0, "docstr": 0, "three": 0, "descript": [0, 6, 8, 189], "do": [0, 1, 3, 8, 150, 177, 192, 215, 260], "try": [0, 12, 164, 210, 230], "nest": 0, "The": [0, 3, 4, 5, 8, 9, 12, 13, 66, 148, 150, 155, 156, 158, 160, 170, 172, 174, 183, 191, 192, 193, 194, 195, 207, 221, 232, 234, 236, 239, 240, 241, 244, 245, 250, 255, 256, 260], "routin": 0, "you": [0, 1, 10, 13, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 97, 192, 258, 259, 261], "call": [0, 3, 8, 150, 158, 167], "alreadi": [0, 9, 261], "one": [0, 8, 155, 156], "els": [0, 3], "loop": 0, "counterintuit": 0, "thei": 0, "have": [0, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 155, 166, 168, 176, 189, 192, 221, 258, 260], "sure": [0, 1, 12, 13], "properli": [0, 177, 195, 260], "document": [0, 8, 16, 22, 26, 27, 32, 54, 59, 66, 67], "expect": [0, 194, 195, 260], "flow": 0, "bpo": 0, "titl": 0, "summari": [0, 148, 168], "498": 0, "interpol": 0, "new": [0, 3, 12, 13, 96, 188, 189, 192, 195], "mechan": [0, 9, 12, 150, 260], "ye": [0, 12, 158], "36817": 0, "easier": 0, "debug": [0, 156, 172, 261], "self": [0, 3, 4, 6, 7, 12, 91, 110], "express": [0, 19, 29, 52, 191, 193], "701": 0, "syntact": 0, "formal": 0, "lift": 0, "restrict": [0, 8, 12, 155, 260], "grammar": 0, "12": 0, "For": [0, 3, 12, 103, 150, 155, 230, 258, 261], "more": [0, 8, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 221], "inform": [0, 3, 8, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 78, 151, 153, 170, 219, 238, 260, 261], "483": 0, "theori": 0, "tabl": [0, 8, 12, 74, 75, 90, 106, 176, 177, 199, 221, 225, 255], "list": [0, 1, 4, 8, 186, 194, 209, 210, 211, 212, 225, 230, 236, 237, 238, 242, 255, 258, 261], "scope": 0, "3107": 0, "annot": 0, "syntax": 0, "ad": [0, 3, 4, 192, 193], "arbitrari": 0, "metadata": 0, "0": [0, 2, 3, 5, 12, 20, 55, 78, 83, 87, 89, 91, 103, 104, 150, 151, 155, 158, 160, 161, 166, 168, 169, 188, 208, 210, 211, 229, 232, 241, 245, 252, 254, 257, 260], "362": 0, "signatur": [0, 8, 9, 189, 193], "object": 0, "necessari": [0, 9, 10, 155, 221, 230], "about": [0, 3, 174, 193, 260], "its": [0, 9, 193, 261], "paramet": [0, 59, 203, 207, 252], "484": 0, "5": [0, 2], "526": 0, "544": 0, "protocol": [0, 103], "structur": [0, 3, 4, 13, 94], "subtyp": 0, "static": 0, "duck": 0, "specifi": [0, 5, 177, 191, 192, 193, 194, 204, 209, 210, 219, 261], "checker": 0, "585": 0, "gener": [0, 1, 3, 4, 12, 15, 21, 36, 37, 48, 49, 50, 51, 57, 58, 60, 63, 64, 65, 67, 82, 92, 150, 183, 184, 188, 194, 195, 204, 207, 258], "In": [0, 9, 12, 150, 155, 166, 183, 189, 260], "collect": 0, "enabl": [0, 2, 3, 8, 9, 12, 13, 148, 150, 155, 156, 158, 165, 167, 169, 170, 212, 237, 260], "current": [0, 3, 5, 191, 193, 230, 231], "avail": [0, 3, 12, 55, 66, 212, 260, 261], "9": 0, "586": 0, "ha": [0, 5, 10, 11, 12, 156, 170, 260], "specif": [0, 1, 2, 3, 5, 8, 19, 29, 32, 52, 67, 76, 82, 89, 102, 103, 104, 105, 109, 112, 126, 155, 156, 157, 201, 202, 207, 210, 217, 218, 261], "valu": [0, 1, 2, 76, 84, 160, 169, 189, 192, 198, 208, 209, 210, 215, 229, 234, 236, 238, 239, 241, 242, 243, 245, 246, 256, 260, 261], "": [0, 8, 10, 13, 21, 60, 66, 158, 177, 184, 191, 195, 261], "589": 0, "typeddict": 0, "dictionari": 0, "fix": 0, "kei": [0, 5, 8, 12, 150, 164, 191, 238, 255], "each": [0, 8, 89, 104, 176, 198, 208, 209, 210, 260], "593": 0, "flexibl": 0, "decor": 0, "context": 0, "604": 0, "allow": [0, 3, 9, 12, 150, 168, 194, 221, 234, 236, 241, 244, 245, 260], "write": [0, 1, 2, 8, 9, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 76, 84, 91, 97, 138, 150, 164, 170, 172, 189, 192, 195, 209, 211, 212, 214, 215, 233, 234, 236, 239, 241, 242, 243, 244, 245, 246, 248, 249, 250, 255, 256, 260], "union": 0, "x": [0, 9, 261], "y": [0, 36, 40, 60], "overload": 0, "10": [0, 12, 32, 88, 158, 191, 219], "612": 0, "propos": 0, "paramspec": 0, "concaten": 0, "forward": 0, "callabl": 0, "over": [0, 8], "anoth": [0, 155, 230], "613": 0, "explicit": 0, "alias": 0, "wai": [0, 150, 155, 169], "explicitli": [0, 158, 261], "declar": 0, "assign": 0, "alia": 0, "646": 0, "variad": 0, "introduc": 0, "typevartupl": 0, "parameteris": 0, "11": [0, 12, 176], "647": 0, "user": [0, 9, 116, 260], "defin": [0, 1, 2, 3, 8, 12, 143, 151, 158, 166, 167, 170, 172, 176, 181, 193, 194, 196, 200, 216, 221, 238, 260], "guard": [0, 12], "program": [0, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 168, 171, 260], "influenc": 0, "condit": [0, 8, 12, 150], "narrow": 0, "emploi": 0, "base": [0, 1, 2, 3, 4, 8, 12, 16, 17, 18, 19, 20, 28, 29, 33, 34, 35, 36, 37, 38, 56, 60, 62, 80, 103, 138, 150, 160, 169, 177, 188, 189, 191, 203, 215, 240, 241, 260], "runtim": [0, 176, 177], "check": [0, 1, 5, 6, 8, 147, 148, 149, 150, 154, 155, 156, 158, 160, 161, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 188, 191, 193, 194, 214, 238, 260, 261], "655": 0, "mark": 0, "individu": [0, 8], "item": [0, 188], "potenti": [0, 189], "miss": [0, 238, 260], "notat": 0, "them": [0, 195, 212, 260], "notrequir": 0, "673": 0, "method": [0, 3, 6, 9], "instanc": 0, "675": 0, "supertyp": 0, "literalstr": 0, "681": 0, "data": [0, 8, 79, 88, 92, 97, 150, 155, 166, 189, 195, 215, 230], "transform": 0, "provid": [0, 1, 2, 3, 4, 9, 12, 74, 94, 186, 189, 225, 237, 239, 253, 255, 256], "certain": [0, 3, 9, 150, 176, 221, 260, 261], "metaclass": 0, "similar": 0, "dataclass": 0, "692": 0, "precis": 0, "kwarg": 0, "A": [0, 8, 12, 15, 37, 48, 49, 50, 51, 55, 57, 58, 63, 64, 65, 150, 189, 250, 260], "without": [0, 3, 8, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 261], "695": 0, "within": [0, 3, 12, 165, 167, 189, 198, 208, 209, 210, 211, 212, 215, 238], "And": 0, "statement": 0, "698": 0, "overrid": [0, 2, 4, 8, 173, 260], "prevent": [0, 12, 150, 155, 161, 260], "bug": [0, 258], "occur": [0, 156], "chang": [0, 9, 12, 97, 150, 169, 188, 192], "inherit": [0, 3, 8], "deriv": 0, "even": [0, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 155, 166, 261], "group": 0, "exampl": [0, 3, 7, 8, 9, 12, 147, 148, 149, 150, 151, 153, 154, 156, 157, 158, 159, 160, 161, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 184, 186, 188, 189, 192, 193, 194, 195, 198, 199, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 221, 225, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 254, 255, 256, 257, 261], "present": [0, 12, 183, 188, 189], "abstract": [0, 2, 3, 116, 126], "515": 0, "extend": [0, 90, 199], "so": [0, 2, 158, 214, 261], "visual": [0, 12, 260], "separ": 0, "purpos": [0, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 166], "At": 0, "time": [0, 209], "572": 0, "remov": [0, 12, 203, 204, 205, 207, 255, 260], "furtur": 0, "setuptool": [0, 10, 12], "been": [0, 5, 166, 168, 170, 221, 260], "fulli": 0, "replac": [0, 186, 189, 192, 255], "up": [0, 260], "date": 0, "minimum": 0, "62": 0, "7": [0, 2, 9, 10, 11, 12, 97, 151], "latest": [0, 10, 12, 13, 259], "note": [0, 155, 176, 203, 204, 205, 260], "get": [0, 3, 10, 169, 247], "command": [0, 3, 4, 7, 12, 79, 102, 116, 189, 215, 225, 232, 233, 234, 235, 236, 237, 239, 240, 241, 244, 245, 250, 252, 253, 255, 256, 261], "error": [0, 8, 12, 160, 195, 260], "verifi": [0, 155, 159, 164], "least": [0, 3], "632": 0, "chipsec": [1, 2, 3, 4, 6, 7, 11, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 110, 166, 167, 230, 250, 258, 260], "py": [1, 3, 4, 6, 7, 8, 10, 12, 13, 147, 148, 149, 150, 151, 153, 154, 156, 157, 158, 159, 160, 161, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 184, 186, 188, 189, 191, 192, 193, 195, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 221, 250, 261], "main": [1, 12, 105, 138], "autom": 1, "access": [1, 9, 74, 79, 83, 84, 85, 87, 88, 89, 91, 93, 94, 95, 96, 97, 111, 166, 168, 169, 171, 172, 225, 236, 237, 239, 241, 244, 245, 253, 255, 256, 260, 261], "variou": [1, 9, 75, 126, 230, 261], "resourc": [1, 9, 21, 25, 36, 37, 38, 60, 67, 89, 261], "chipset": [1, 8, 19, 29, 37, 38, 39, 41, 52, 53, 54, 60, 67, 170], "detect": [1, 2, 9, 96, 161, 170, 191, 193, 249, 260], "common": [1, 2, 3, 4, 8, 14, 105, 106, 139, 143, 147, 148, 149, 150, 151, 153, 154, 156, 157, 158, 159, 160, 161, 164, 165, 166, 167, 169, 170, 171, 172, 173, 174, 176, 177, 181, 184, 196, 221, 260, 261], "logger": [1, 3, 6, 110], "log": [1, 103, 189, 198, 203, 204, 205, 207, 208, 209, 210, 211, 212, 219, 230, 260, 261], "modul": [1, 68, 71, 73, 113, 115, 117, 119, 121, 127, 129, 146, 152, 163, 175, 181, 182, 185, 187, 190, 196, 200, 213, 216, 224, 261], "load": [1, 2, 8, 9, 12, 155, 199, 254, 261], "result_delta": 1, "support": [1, 3, 8, 9, 10, 11, 12, 126, 155, 164, 168, 176, 177, 183, 260], "result": [1, 3, 6, 9, 12, 150, 155, 156, 158, 160, 170, 171, 198, 230, 261], "delta": [1, 231, 261], "run": [1, 3, 6, 7, 8, 9, 12, 66, 151, 159, 160, 161, 165, 166, 170, 183, 188, 198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220, 230, 259, 260], "testcas": 1, "xml": [1, 2, 3, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 138, 231, 261], "json": [1, 193, 194, 231, 261], "output": [1, 12, 198, 231, 261], "helper": [1, 9, 12, 116, 120, 124, 261], "registri": 1, "o": [1, 8, 9, 12, 32, 36, 40, 60, 83, 84, 91, 126, 155, 166, 176, 177, 183, 192, 209, 211, 212, 214, 221, 236, 238, 260, 261], "oshelp": [1, 4, 113], "wrapper": [1, 126], "platform": [1, 2, 3, 9, 12, 15, 17, 18, 19, 20, 21, 24, 28, 29, 33, 34, 35, 36, 37, 38, 48, 49, 50, 51, 53, 54, 56, 57, 58, 60, 62, 63, 64, 65, 67, 101, 103, 105, 109, 126, 150, 159, 160, 161, 166, 167, 168, 170, 171, 192, 193, 194, 195, 226, 260, 261], "code": [1, 3, 9, 10, 12, 126, 166, 167, 169, 188, 189, 219, 220, 258, 261], "invok": [1, 126], "kernel": [1, 9, 10, 126, 193, 194, 258, 261], "driver": [1, 9, 10, 126, 191, 193, 194, 203, 204, 205, 207, 259, 261], "implement": [1, 3, 8, 55, 103, 155, 177, 186, 221], "capabl": [1, 252], "manual": [1, 8, 12, 153, 157, 167, 195, 260, 261], "direct": [1, 9, 32, 156, 168, 212, 236, 239, 241, 244, 245, 256], "BY": 1, "THESE": 1, "your": [1, 9, 13, 174, 186, 250, 260, 261], "system": [1, 2, 4, 9, 11, 12, 59, 150, 155, 156, 166, 168, 169, 172, 173, 183, 188, 189, 192, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 221, 250, 255, 260], "unboot": [1, 195, 250], "know": [1, 3, 193], "what": [1, 193], "numer": [1, 9, 261], "instruct": [1, 192], "hex": [1, 188, 189, 199, 211, 261], "acpi_cmd": [1, 224], "chipset_cmd": [1, 224], "cmos_cmd": [1, 224], "config_cmd": [1, 224], "cpu_cmd": [1, 224], "decode_cmd": [1, 224], "deltas_cmd": [1, 224], "desc_cmd": [1, 224], "ec_cmd": [1, 224], "igd_cmd": [1, 224], "interrupts_cmd": [1, 224], "io_cmd": [1, 224], "iommu_cmd": [1, 224], "lock_check_cmd": [1, 224], "mem_cmd": [1, 224], "mmcfg_base_cmd": [1, 224], "mmcfg_cmd": [1, 224], "mmio_cmd": [1, 224], "msgbus_cmd": [1, 224], "msr_cmd": [1, 224], "pci_cmd": [1, 224], "reg_cmd": [1, 224], "smbios_cmd": [1, 224], "smbus_cmd": [1, 224], "spd_cmd": [1, 224], "spi_cmd": [1, 224], "spidesc_cmd": [1, 224], "tpm_cmd": [1, 224], "txt_cmd": [1, 224], "ucode_cmd": [1, 224], "uefi_cmd": [1, 224], "vmem_cmd": [1, 224], "vmm_cmd": [1, 224], "task": 1, "spi": [1, 2, 8, 73, 98, 150, 171, 172, 173, 174, 195, 230, 250, 251, 255, 260, 261], "acpi": [1, 8, 12, 73, 75, 221, 225], "acpi_t": [1, 73, 225], "cmo": [1, 8, 73, 227], "cpu": [1, 5, 8, 13, 73, 82, 89, 97, 104, 143, 146, 153, 154, 155, 160, 166, 167, 168, 169, 181, 183, 210, 229, 260, 261], "cpuid": [1, 5, 73, 113, 121, 151, 155, 198, 229], "ec": [1, 73, 233, 241], "hal_bas": [1, 73], "igd": [1, 73, 234], "interrupt": [1, 8, 73], "io": [1, 32, 73, 87, 188, 211, 236], "iobar": [1, 73], "iommu": [1, 2, 8, 14, 73, 237], "lock": [1, 2, 3, 8, 73, 129, 148, 149, 150, 156, 157, 158, 159, 160, 165, 166, 167, 168, 174, 238, 260], "mmio": [1, 2, 73, 91, 188, 192, 211, 212, 242], "msgbu": [1, 73, 243], "msr": [1, 4, 73, 155, 156, 157, 160, 210, 214, 244, 260], "page": [1, 73, 199], "pci": [1, 4, 8, 55, 73, 87, 92, 192, 245], "pcidb": [1, 73], "physmem": [1, 73], "smbio": [1, 73, 247], "smbu": [1, 73, 170, 248], "spd": [1, 73, 170, 249], "spi_descriptor": [1, 73], "spi_jedec_id": [1, 73], "spi_uefi": [1, 73], "tpm": [1, 73, 102, 103, 252], "tpm12_command": [1, 73], "tpm_eventlog": [1, 73], "ucod": [1, 73, 155, 254], "uefi": [1, 4, 8, 9, 10, 12, 73, 100, 106, 108, 109, 110, 118, 143, 146, 164, 176, 177, 181, 188, 189, 191, 192, 193, 194, 195, 221, 255, 260], "uefi_common": [1, 73], "uefi_compress": [1, 73], "uefi_fv": [1, 73], "uefi_platform": [1, 73], "uefi_search": [1, 73], "virtmem": [1, 73], "vmm": [1, 8, 73, 143, 181, 197, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 257], "primit": [1, 71], "select": [1, 5, 12], "option": [1, 8, 9, 12, 91, 129, 164, 176, 177, 189, 192, 195, 198, 199, 208, 209, 210, 211, 212, 215, 230], "report": [1, 151, 258], "cleanup": 1, "setup": [1, 8, 10, 12, 13, 148, 261], "instal": [1, 8, 259, 261], "packag": [1, 4, 8, 10, 12, 41, 67, 118], "chipsec_root": 1, "build_exe_": 1, "window": [1, 4, 9, 113, 150, 183, 221], "human": 2, "regist": [2, 3, 5, 66, 88, 89, 91, 129, 148, 149, 150, 153, 154, 155, 156, 157, 158, 159, 160, 161, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 183, 192, 208, 210, 214, 228, 238, 243, 245, 253, 260], "8086": [2, 3, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67], "broken": 2, "control": [2, 3, 8, 11, 12, 19, 29, 37, 38, 53, 54, 55, 60, 79, 95, 129, 148, 149, 150, 155, 156, 157, 168, 170, 171, 173, 174, 260], "bit": [2, 9, 129, 150, 151, 155, 156, 158, 160, 167, 170, 184, 211, 239, 256], "field": [2, 3], "alwai": 2, "first": [2, 3, 212], "correct": [2, 9, 230], "off": [2, 9], "bar": [2, 84, 87, 91, 188, 211, 212], "spibar": [2, 242], "bu": [2, 12, 88, 188, 211, 241, 243, 245, 257], "dev": [2, 10, 211, 258], "0x1f": [2, 245], "fun": [2, 211], "reg": [2, 189, 246], "0x10": [2, 87, 239, 242, 243, 256], "width": [2, 192, 234, 236, 241, 242, 245, 261], "mask": [2, 245, 261], "0xfffff000": 2, "size": [2, 79, 84, 97, 189, 195, 207, 211, 233, 240, 248, 252, 260], "0x1000": [2, 87, 239, 256], "desc": [2, 3, 189], "rang": [2, 8, 66, 91, 150, 167, 168, 169, 174, 188, 189, 198, 203, 208, 211, 212, 260], "offset": [2, 76, 79, 84, 158, 189, 233, 241, 242, 243, 245, 248, 249, 252], "0x0": [2, 87, 189, 199, 227, 229, 235, 236, 243, 244, 248, 249, 250], "bc": [2, 3, 228, 246], "type": [2, 4, 9, 12, 129, 169, 230, 247, 252, 255, 261], "pcicfg": 2, "0xdc": [2, 245], "bio": [2, 3, 8, 12, 13, 103, 147, 148, 149, 150, 166, 168, 169, 174, 189, 250, 255, 260], "biosw": [2, 150], "bild": 2, "interfac": [2, 4, 9, 12, 88, 112, 116, 149, 156, 195, 260], "down": [2, 148, 158, 159, 260], "biosinterfacelockdown": [2, 149], "ehl": [2, 14], "pch_8x": [2, 14], "hsw": [2, 3, 8, 14, 143], "sfdp": [2, 14, 250], "pmc_i440fx": [2, 14], "pch_4xxlp": [2, 14], "glk": [2, 14], "icx": [2, 14], "ivt": [2, 14], "pch_2xx": [2, 14], "cht": [2, 14], "skx": [2, 14], "pch_5xxh": [2, 14], "jkt": [2, 14], "pch_7x": [2, 14], "tpm12": [2, 14], "apl": [2, 14], "pch_495": [2, 14], "snb": [2, 8, 14, 143], "pch_3xx": [2, 14], "pch_3xxop": [2, 14], "pch_5xxlp": [2, 14], "bdx": [2, 14], "cml": [2, 14], "pch_6xx": [2, 14], "skl": [2, 14], "tglu": [2, 14], "hsx": [2, 14], "rpl": [2, 14], "qrk": [2, 14], "pch_4xx": [2, 14], "txt": [2, 10, 12, 13, 14, 189, 198, 203, 204, 205, 207, 211, 212, 219, 253], "rkl": [2, 14], "pch_3xxlp": [2, 14], "whl": [2, 14], "bdw": [2, 8, 14, 143], "byt": [2, 8, 14, 143], "avn": [2, 14], "pch_c620": [2, 14], "dnv": [2, 14], "icl": [2, 14], "tglh": [2, 14], "pch_6xxp": [2, 14], "pch_c60x": [2, 14], "kbl": [2, 14], "ivb": [2, 8, 14, 143], "pch_c61x": [2, 14], "pch_1xx": [2, 14], "cfl": [2, 14], "pch_4xxh": [2, 14], "adl": [2, 14], "subclass": [3, 245], "is_support": [3, 6, 8], "chipsec_main": [3, 13, 147, 148, 149, 150, 151, 153, 154, 156, 157, 158, 159, 160, 161, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 184, 186, 188, 189, 191, 192, 193, 194, 195, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 221], "As": [3, 66, 150, 167], "version": [3, 9, 10, 11, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 103, 186], "2": [3, 9, 12, 15, 19, 22, 29, 37, 39, 40, 41, 48, 49, 50, 51, 57, 58, 61, 63, 64, 65, 88, 91, 97, 102, 103, 112, 150, 155, 156, 164, 209, 212, 252, 261], "author": 3, "creat": [3, 8, 9, 12, 13, 194, 230, 250, 261], "get_control": [3, 246], "set_control": [3, 246], "especi": 3, "reus": 3, "across": 3, "pass": [3, 6, 150, 151, 155, 156, 158, 160, 170, 189, 195, 260], "fail": [3, 150, 151, 155, 156, 158, 160, 168, 170, 191, 195, 260, 261], "cfg": [3, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 186], "bioslocken": [3, 150, 246], "ble": [3, 150, 246], "statu": [3, 203, 237], "c": [3, 13, 15, 19, 29, 37, 48, 49, 50, 51, 52, 53, 55, 57, 58, 61, 63, 64, 65, 87, 91, 158, 160], "react": [3, 260], "log_pass": [3, 6], "log_fail": 3, "re": [3, 6, 8], "api": [3, 11, 12, 176, 177, 191], "see": [3, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 169, 221], "next": [3, 13], "detail": [3, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 66, 177, 221], "copi": [3, 12, 13, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "directori": [3, 8, 12, 13, 193, 230], "locat": [3, 12, 192, 193, 260], "platform_cod": 3, "found": [3, 8, 167, 188, 259], "review": [3, 195, 260], "datasheet": [3, 17, 19, 20, 22, 29, 39, 40, 41, 52, 53, 54, 55, 60, 61, 67, 88, 170], "appropri": [3, 9, 13], "place": [3, 261], "correctli": [3, 8, 150, 159, 168, 230, 260], "It": [3, 9, 55, 230, 250, 260], "4th": 3, "intel": [3, 5, 11, 15, 17, 19, 20, 21, 22, 25, 29, 32, 36, 37, 38, 39, 40, 41, 48, 49, 50, 51, 52, 53, 54, 55, 57, 58, 60, 61, 63, 64, 65, 66, 67, 81, 88, 97, 116, 153, 155, 157, 158, 160, 167, 169, 170, 177, 188, 253, 258], "core": [3, 21, 36, 37, 38, 40, 60, 67, 97, 155, 159, 161, 166, 168], "haswel": [3, 28, 29, 97], "interact": 4, "directli": [4, 191, 193, 194], "etc": [4, 8, 106, 109, 188, 230, 250], "folder": 4, "like": [4, 8, 13, 168, 183, 258], "newhelp": 4, "def": [4, 6, 7], "__init__": [4, 6], "super": 4, "dal": [4, 9, 113, 116], "linux": [4, 9, 113, 120, 124, 183, 258], "linuxn": [4, 113], "nonehelp": [4, 113], "scan": 5, "enumer": [5, 12, 91, 155, 245], "devic": [5, 8, 9, 12, 81, 91, 92, 99, 112, 129, 168, 170, 172, 188, 193, 204, 205, 211, 212, 221, 241, 245, 257], "correspond": [5, 212, 230], "per": [5, 97, 155, 191], "0x8086": 5, "0x1022": 5, "amd": [5, 258], "lookup": 5, "fall": 5, "back": 5, "p": [5, 12, 261], "flag": 5, "ignor": [5, 260], "depric": 5, "moduleclass": 6, "align": 6, "prerequisit": 6, "some_module_requir": 6, "notapplic": 6, "action": [6, 7], "wa": [6, 92, 150, 166, 260], "success": [6, 203], "module_argv": 6, "primari": [6, 221], "execut": [6, 8, 9, 66, 155, 167, 168, 169, 186, 191, 192, 193, 194, 253, 260], "handl": [6, 8, 183, 195], "start_test": 6, "chipsec_util": [7, 8, 12, 13, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257], "live": [7, 255], "command_display_nam": 7, "_cmd": 7, "argpars": 7, "argumentpars": 7, "basecommand": 7, "toload": 7, "commandclass": 7, "parse_argu": 7, "parser": 7, "prog": 7, "usag": [7, 8, 13, 76, 78, 79, 81, 82, 83, 84, 87, 88, 89, 91, 93, 97, 98, 100, 104, 110, 111, 147, 148, 149, 150, 151, 153, 154, 156, 157, 158, 159, 160, 161, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 184, 186, 188, 189, 191, 192, 193, 194, 195, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 221, 226, 230, 240, 253, 261], "__doc__": 7, "subpars": 7, "add_subpars": 7, "parser_entrypoint": 7, "add_pars": 7, "set_default": 7, "func": 7, "parse_arg": 7, "argv": 7, "just": [8, 168, 260], "python": [8, 9, 10, 11, 12, 116, 250], "store": [8, 150, 230], "under": [8, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 155], "subdirectori": [8, 13], "There": [8, 9], "appli": 8, "everi": 8, "where": [8, 66, 150, 164, 166, 176, 177, 189, 198, 199, 208, 209, 210, 211], "framework": [8, 9, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "fuzzer": [8, 198, 203, 204, 205, 207, 208, 209, 210, 211, 212, 219, 260], "intern": 8, "concept": [8, 220], "string": [8, 9, 129], "form": 8, "bios_wp": [8, 143, 146, 260, 261], "mean": [8, 166, 171], "script": [8, 106, 177, 192, 260], "root_dir": 8, "map": [8, 12, 66, 87, 159, 211, 212, 241, 260], "vulner": [8, 9, 149, 150, 155, 167, 174, 177, 183, 186, 188, 189, 191, 192, 193, 215, 220, 260], "being": 8, "known": [8, 203, 260], "event": [8, 103, 148, 220], "bios_smi": [8, 143, 146, 260], "flash": [8, 10, 59, 97, 98, 150, 171, 172, 173, 174, 193, 194, 195, 230, 250, 255, 260], "descriptor": [8, 98, 171, 172, 173, 260], "spi_desc": [8, 143, 146, 260], "spi_fdopss": [8, 143, 146, 260], "spi_lock": [8, 143, 146, 260, 261], "analysi": [8, 221, 230, 260], "smm": [8, 143, 146, 150, 160, 167, 168, 169, 181, 183, 188, 189, 221, 260], "region": [8, 66, 150, 171, 172, 260], "bios_t": [8, 143, 146, 184, 260], "compat": [8, 12, 166, 260], "cach": [8, 155, 169, 260], "smrr": [8, 143, 146, 167, 260, 261], "memori": [8, 9, 12, 55, 66, 76, 87, 93, 96, 111, 129, 155, 159, 160, 161, 166, 168, 169, 172, 183, 189, 192, 193, 195, 211, 212, 234, 239, 241, 256, 260], "remap": [8, 143, 146, 184, 260], "dma": [8, 168, 234, 260], "smm_dma": [8, 143, 146, 260], "graphic": [8, 81], "apertur": 8, "redirect": 8, "memconfig": [8, 143, 146, 260], "sinkhol": [8, 143, 181, 182], "root": [8, 9, 12, 13, 261], "certif": [8, 12], "secureboot": [8, 143, 146, 148, 164, 181, 186, 260], "exchang": 8, "csm": 8, "disabl": [8, 12, 13, 150, 156, 170, 237, 238, 250, 260], "imag": [8, 100, 110, 191, 193, 194, 230, 250, 255], "verif": 8, "polici": 8, "clear": [8, 150, 260], "restor": [8, 186], "var": [8, 255], "find": [8, 191, 192, 193, 203, 255, 259, 260], "te": [8, 143, 181, 185], "confus": 8, "nvram": [8, 109, 150, 195, 230, 255], "insecur": 8, "unprotect": 8, "permiss": [8, 171, 172, 176, 260], "accord": [8, 192, 260], "access_uefispec": [8, 143, 146, 175, 260], "sensit": 8, "password": [8, 147, 260], "doesn": [8, 12, 155, 194, 195, 260], "t": [8, 12, 155, 189, 194, 195, 260, 261], "sanit": 8, "pointer": [8, 189], "address": [8, 66, 112, 177, 189, 192, 234, 239, 256, 258], "hang": [8, 9, 183, 189, 192], "invalid": 8, "content": [8, 13, 17, 20, 21, 22, 25, 32, 36, 37, 38, 39, 40, 41, 54, 60, 66, 67, 88, 153, 157, 167, 191, 193, 195, 199, 239, 256, 260], "delet": [8, 12, 195, 255], "less": 8, "overflow": 8, "critic": [8, 9, 230], "rtclock": [8, 143, 146, 260], "block": [8, 150, 169, 193], "top": [8, 149, 260], "swap": [8, 149, 260], "mode": [8, 9, 12, 149, 158, 166, 168, 169, 186, 189, 203, 208, 209, 212, 219, 221, 260, 261], "architectur": [8, 12, 129, 153, 157, 167], "ia32cfg": [8, 143, 146, 260], "valid": [8, 10, 169, 189, 203], "smm_ptr": [8, 143, 181, 187], "legaci": [8, 12], "outsid": 8, "int15": 8, "servic": [8, 9, 12, 261], "malici": [8, 12, 191], "commbuff": 8, "race": [8, 150], "dure": 8, "authent": [8, 147, 164], "smmruntim": 8, "scan_block": [8, 143, 181, 190], "softwar": [8, 11, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 66, 150, 153, 155, 157, 166, 167, 168, 169, 172, 221, 260], "pars": [8, 12, 98, 100, 108, 109, 230, 250], "decompress": 8, "digit": 8, "unsign": 8, "xrom": [8, 245], "due": [8, 9, 12], "assert": [8, 167], "insuffici": 8, "s3": [8, 106, 177, 192, 260], "s3bootscript": [8, 143, 146, 175, 184, 255, 260], "s3script_modifi": [8, 143, 181, 190], "dispatch": [8, 192, 260], "opcod": [8, 88, 192, 243], "record": 8, "wake": 8, "modifi": [8, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 164, 166, 169, 172, 176, 186, 192, 195], "dump": [8, 12, 76, 84, 191, 193, 194, 199, 227, 230, 233, 242, 245, 249, 250, 253], "unauthent": 8, "capsul": [8, 109], "messag": [8, 88, 188, 207, 243, 260, 261], "keyboard": [8, 147, 205, 260], "buffer": [8, 79, 93, 111, 147, 189, 205, 239, 256, 260], "bios_kbrd_buff": [8, 143, 146, 260], "cpu_info": [8, 143, 146, 152, 261], "ia_untrust": [8, 143, 146, 152, 168], "spectre_v2": [8, 143, 146, 152, 260], "cet": [8, 143, 146], "debugen": [8, 143, 146], "me_mfg_mod": [8, 143, 146], "memlock": [8, 143, 146], "sgx_check": [8, 143, 146], "smm_code_chk": [8, 143, 146], "spd_wd": [8, 143, 146], "spi_access": [8, 143, 146, 260], "rogue_mmio_bar": [8, 143, 181, 187], "reput": [8, 143, 181, 190], "scan_imag": [8, 143, 181, 190], "uefivar_fuzz": [8, 143, 181, 190], "hv": [8, 143, 181, 196, 203, 204, 205, 207], "hypercal": [8, 112, 143, 181, 196, 200, 203, 208, 216, 219, 257], "hypercallfuzz": [8, 143, 181, 196, 200, 216], "synth_dev": [8, 143, 181, 196, 200], "synth_kbd": [8, 143, 181, 196, 200], "vmbu": [8, 143, 181, 196, 200, 203, 204, 205, 207], "vmbusfuzz": [8, 143, 181, 196, 200], "vbox": [8, 143, 181, 196], "vbox_crash_apicbas": [8, 143, 181, 196, 213], "xen": [8, 143, 161, 181, 196, 217, 218, 219, 220], "xsa188": [8, 143, 181, 196, 216], "cpuid_fuzz": [8, 143, 181, 196], "ept_find": [8, 143, 181, 196], "iofuzz": [8, 143, 181, 196], "msr_fuzz": [8, 143, 181, 196], "pcie_fuzz": [8, 143, 181, 196], "pcie_overlap_fuzz": [8, 143, 181, 196], "venom": [8, 143, 181, 196], "generate_test_id": [8, 143, 181], "wsmt": [8, 143, 181], "analyz": 9, "level": [9, 112], "secur": [9, 12, 13, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 106, 148, 150, 159, 164, 166, 168, 173, 174, 177, 186, 214, 221, 260, 261], "hardwar": [9, 12, 155, 158, 170, 192, 221, 260, 261], "firmwar": [9, 100, 103, 106, 108, 177, 188, 189, 191, 193, 194, 195, 221, 230, 260], "low": 9, "protect": [9, 150, 155, 160, 164, 166, 167, 168, 171, 172, 174, 176, 177, 195, 260], "compon": [9, 12, 74, 75, 80, 94, 101, 105], "simpl": [9, 198, 208, 209, 210, 211], "assess": [9, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 171], "fuzz": [9, 189, 195, 198, 203, 204, 205, 207, 208, 209, 210, 211, 212, 219], "acquir": 9, "artifact": 9, "mac": 9, "beta": 9, "deploi": 9, "product": [9, 17, 19, 20, 25, 29, 32, 39, 40, 41, 52, 53, 158, 172, 260], "end": [9, 260], "reason": [9, 150, 155], "physic": [9, 93, 189, 198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220, 239, 256], "malwar": [9, 150, 168], "privileg": [9, 155], "distribut": [9, 10, 11, 12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "sourc": [9, 10, 11, 12, 259, 260], "oper": [9, 97, 155, 195, 221, 234, 250], "64": [9, 90, 97, 153, 157, 167, 239, 256], "microsoft": [9, 12, 221], "higher": [9, 10, 11, 12], "testsign": [9, 12], "equival": 9, "turn": [9, 156], "done": [9, 158], "natur": 9, "incorrect": 9, "panic": 9, "contact": [9, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "download": [9, 10, 11, 12, 13], "circumst": 9, "surround": 9, "target": [9, 155, 243], "bootabl": 9, "usb": [9, 10], "drive": [9, 10], "x64": [9, 12, 90], "launch": [9, 66, 261], "administr": [9, 12, 261], "automat": [9, 261], "connect": [9, 156, 261], "skip": [9, 195, 261], "overview": 9, "own": 9, "sampl": 9, "templat": 9, "f": [9, 188], "hint": 9, "underscor": 9, "liter": 9, "walru": 9, "deprec": [9, 10, 11, 12, 261], "distutil": 9, "fedora": 10, "lxde": 10, "64bit": 10, "ubuntu": 10, "debian": 10, "32bit": 10, "luv": 10, "archstrik": 10, "desir": 10, "boot": [10, 12, 13, 106, 147, 148, 149, 150, 164, 168, 177, 186, 192, 260], "e": [10, 34, 35, 261], "g": [10, 261], "rufu": 10, "stick": 10, "much": 10, "persist": 10, "storag": 10, "reboot": [10, 12, 13, 188], "http": [10, 11, 12, 13, 17, 20, 21, 22, 25, 32, 36, 37, 38, 39, 40, 41, 52, 53, 54, 55, 59, 60, 66, 67, 88, 92, 96, 101, 153, 155, 157, 158, 160, 167, 191, 214, 221, 258, 259], "www": [10, 11, 12, 17, 20, 21, 22, 25, 32, 36, 37, 38, 39, 40, 41, 54, 59, 60, 66, 67, 88, 96, 153, 157, 167, 191, 214, 259], "org": [10, 11, 12, 55, 59, 66, 96, 101, 258, 259], "python2": [10, 11, 12], "sinc": [10, 11, 12], "june": [10, 11, 12], "2020": [10, 11, 12, 37], "depend": [10, 13, 193, 194], "dnf": 10, "devel": 10, "unam": 10, "r": [10, 12, 17, 20, 21, 22, 25, 36, 37, 38, 54, 60, 67, 88, 116], "python3": 10, "gcc": 10, "nasm": [10, 13], "redhat": 10, "rpm": 10, "elfutil": 10, "libelf": 10, "git": [10, 11, 12], "apt": 10, "essenti": 10, "pacman": 10, "To": [10, 12, 186, 203, 204, 205, 207, 261], "pip": [10, 12], "linux_requir": 10, "releas": [10, 12, 258], "pypi": [10, 11, 261], "repositori": 10, "outdat": 10, "pleas": [10, 12, 258, 259], "refrain": 10, "until": [10, 174], "further": [10, 188, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 260], "notic": 10, "zip": [10, 13], "repo": [10, 12, 258], "clone": [10, 11, 12], "github": [10, 11, 12, 13, 55, 92, 158, 160, 258], "com": [10, 11, 12, 13, 15, 17, 20, 21, 22, 25, 32, 36, 37, 38, 39, 40, 41, 48, 49, 50, 51, 52, 53, 54, 55, 57, 58, 60, 63, 64, 65, 66, 67, 88, 92, 96, 153, 155, 157, 158, 160, 167, 191, 214, 221, 258], "compress": [10, 12], "build_ext": [10, 12, 261], "step": [10, 13, 167, 198, 259], "pywin32": [11, 12], "project": [11, 12, 155, 261], "studio": [11, 12], "en": [11, 12, 17, 20, 21, 22, 25, 32, 36, 37, 38, 39, 40, 41, 54, 60, 66, 67, 96, 153, 157, 167, 221], "u": [11, 12, 17, 20, 21, 22, 25, 32, 36, 37, 38, 39, 40, 41, 45, 54, 60, 66, 67, 153, 157, 167, 186, 191, 194, 221, 258], "open": [11, 12, 168, 258], "scm": 11, "x86": [12, 90], "amd64": 12, "server": [12, 19, 29, 31, 61, 258], "2012": [12, 88], "2016": [12, 20, 66, 220], "2019": 12, "2022": [12, 15, 48, 49, 50, 51, 58, 63], "rweveryth": 12, "windows_requir": 12, "wconio2": 12, "color": 12, "consol": 12, "compil": 12, "wdk": 12, "best": [12, 221], "vs2022": 12, "sdk": 12, "vs2019": 12, "spectr": [12, 155], "mitig": [12, 155, 167, 183, 221, 260], "encount": 12, "vcxproj": 12, "point": [12, 192, 260], "incompat": [12, 203, 204, 205, 207], "properti": 12, "menu": 12, "cmd": [12, 245], "bcdedit": 12, "bootmgr": 12, "displaybootmenu": 12, "With": 12, "shutdown": 12, "start": [12, 13, 66, 261], "button": 12, "power": 12, "icon": 12, "shift": 12, "restart": 12, "navig": 12, "troubleshoot": 12, "advanc": [12, 177, 188, 261], "startup": [12, 252], "reset": [12, 174], "choos": 12, "f7": 12, "screen": 12, "ex": 12, "adminstr": 12, "ON": 12, "addit": [12, 151, 155, 176, 198, 208, 209, 210, 211, 212, 215, 260, 261], "nointegritycheck": 12, "loadopt": 12, "ddisable_integrity_check": 12, "press": 12, "f8": 12, "enforc": 12, "chipsec_hlpr": 12, "go": 12, "solut": 12, "develop": [12, 66, 153, 157, 167], "prompt": 12, "cd": [12, 13], "chipsec_root_dir": 12, "msbuild": 12, "x32": 12, "process": [12, 150], "complet": [12, 260], "binari": [12, 98, 186, 191, 193, 194, 230, 250], "move": 12, "windows_amd64": 12, "i386": 12, "chipsec_toolscompress": 12, "eficompressor": 12, "cp": 12, "pyver": 12, "win_": 12, "arch": 12, "pyd": 12, "lib": [12, 13], "win": 12, "sc": 12, "binpath": 12, "path_to_si": 12, "displaynam": 12, "finish": 12, "stop": 12, "background": 12, "juli": [12, 88], "31": 12, "kb4568831": 12, "19041": 12, "423": 12, "preview": 12, "might": [12, 250, 260], "bsod": 12, "blue": 12, "death": 12, "trigger": [12, 169, 220], "sdev": 12, "vb": 12, "therefor": 12, "now": [12, 13, 260], "supplement": 12, "origin": [12, 186], "abov": 12, "met": 12, "receiv": [12, 15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "later": [12, 150, 194], "how": 12, "peripher": 12, "interconnect": 12, "virtual": [12, 32, 111, 205, 256], "offici": 12, "hypervisor": [12, 112, 161, 219], "integr": [12, 81], "defend": 12, "credenti": 12, "design": [12, 168, 198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220, 221], "manipul": [12, 100, 168], "irp": 12, "tri": 12, "unsupport": 12, "manner": 12, "mcfg": 12, "deni": 12, "refer": [12, 88, 96, 147, 148, 149, 150, 153, 155, 157, 158, 160, 161, 164, 165, 166, 167, 168, 169, 170, 174, 177, 183, 189, 214, 215, 220, 221, 259], "below": [12, 260], "link": [12, 13], "learn": 12, "client": [12, 102, 103, 159, 166, 168], "perform": [12, 97, 150, 195], "lenovo": 12, "thinkpad": 12, "drvier": 12, "manag": [12, 155, 166, 168, 169, 221], "brows": 12, "disk": [12, 260], "comput": [12, 261], "info": [12, 189, 203, 204, 219, 229, 250, 258, 261], "media": 13, "fat32": 13, "tianocor": 13, "edk2": 13, "blob": [13, 55, 158, 160], "udk2018": 13, "shellbinpkg": 13, "uefishel": 13, "renam": 13, "bootx64": 13, "extract": [13, 194], "__install__": 13, "chipsec_py368_uefi_x64": 13, "stdlib": 13, "look": [13, 186, 188, 192, 260], "fs0": 13, "python36": 13, "lot": 13, "basic": [13, 155, 250, 261], "py368readm": 13, "visit": 13, "submodul": 13, "libc": 13, "describ": [13, 66, 166, 186, 188], "modif": [13, 108, 164, 192], "cpython": 13, "edk2modul": 13, "asm": 13, "cpu_ia32": 13, "cpu_gcc": 13, "cpu_ia32_gcc": 13, "inf": 13, "python368": 13, "creation": 13, "cover": [13, 150, 260], "msv": 13, "highli": 13, "path": [15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 177, 186, 191, 193, 194, 261], "copyright": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "2021": [15, 37, 48, 49, 57, 64, 65], "corpor": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "free": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 220], "redistribut": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "term": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "gnu": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "public": [15, 22, 32, 37, 48, 49, 50, 51, 54, 57, 58, 63, 64, 65, 66, 67], "licens": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "publish": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "foundat": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "hope": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "warranti": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "impli": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "merchant": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "fit": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "FOR": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "particular": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65, 250], "along": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "inc": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "51": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "franklin": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "street": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "fifth": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "floor": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "boston": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "ma": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "02110": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "1301": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "usa": [15, 37, 48, 49, 50, 51, 57, 58, 63, 64, 65], "apollo": 16, "lake": [16, 21, 23, 26, 30, 36, 67], "soc": [16, 22, 88, 158, 160], "334818": 16, "334819": 16, "avoton": 17, "atom": [17, 20, 22, 25, 88, 160], "tm": [17, 20, 22, 88], "processor": [17, 19, 20, 21, 22, 25, 29, 36, 37, 38, 40, 60, 61, 67, 81, 88, 155], "c2000": 17, "famili": [17, 19, 20, 21, 25, 29, 36, 37, 38, 40, 54, 60, 61, 67, 103, 170], "microserv": 17, "septemb": 17, "2014": 17, "html": [17, 20, 21, 22, 25, 36, 37, 38, 39, 40, 41, 60, 66, 67, 153, 155, 157, 158, 167, 214], "broadwel": [18, 19, 160], "xeon": [19, 29, 61], "e5": [19, 29], "v4": 19, "vol": [19, 22, 29, 39, 40, 41, 61, 67, 88], "e7": [19, 29], "c600": [19, 29, 52], "seri": [19, 22, 29, 37, 38, 39, 40, 41, 42, 45, 46, 47, 52, 53, 54, 60, 67, 88, 170], "x79": [19, 29, 52], "c610": [19, 29, 53], "x99": [19, 29, 53], "hub": [19, 29, 37, 38, 53, 54, 60, 170], "pch": [19, 29, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, 52, 53, 60, 67, 158, 261], "bai": 20, "e3800": 20, "revis": [20, 66, 88, 199], "embed": [20, 79], "coffe": 21, "8th": [21, 40, 67], "technic": [21, 25, 36, 37, 38, 60, 67, 153, 157, 167, 177], "cherri": 22, "braswel": 22, "z8000": 22, "n": [22, 150, 194, 260, 261], "pentium": [22, 166], "celeron": 22, "dam": [22, 32, 54, 67, 88], "pdf": [22, 32, 54, 55, 59, 67, 88, 96, 155], "comet": 23, "denverton": 25, "c3000": 25, "337018": 25, "002": [25, 41], "elkhart": 26, "635255": 26, "636112": 26, "636722": 26, "636723": 26, "336561": 27, "001": [27, 39], "1600": 29, "2400": 29, "2600": 29, "4600": 29, "v3": 29, "8800": 29, "4800": 29, "ic": 30, "icelak": 31, "lewisburg": 31, "technologi": [32, 66, 253], "vt": [32, 90, 191], "d": [32, 90, 188, 258, 260, 261], "spec": [32, 164, 176, 260], "ivybridg": 33, "ivytown": 34, "ivi": 34, "bridg": [34, 35, 62], "jaketown": 35, "sandi": [35, 62], "kabi": 36, "7th": [36, 40], "100": [37, 60], "200": 38, "300": [39, 40, 41, 67, 170], "doc": [39, 40, 41, 59, 88, 96, 221], "337348": 39, "lp": [40, 45], "gen": 40, "mobil": 40, "334659": 40, "005": 40, "On": [41, 118, 173], "337868": 41, "495": 42, "4xx": 43, "4xxh": 44, "620855": 44, "400": 45, "h": [45, 60, 158, 160, 261], "5xxh": 46, "5xxlp": 47, "ark": [52, 53], "98463": 52, "98915": 53, "c620": 54, "440fx": 55, "pmc": 55, "qemu": [55, 215], "pc": [55, 102, 103], "machin": 55, "v7": 55, "hw": [55, 198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220], "host": [55, 214, 220], "i440fx": 55, "wiki": [55, 66, 96], "29054901": 55, "quark": 56, "serial": [59, 96], "discover": 59, "jedec": [59, 96, 250], "jesd216d": 59, "01": [59, 155], "skylak": [60, 61], "6th": 60, "pure": 61, "scalabl": 61, "guid": [66, 116, 191, 193, 195, 235, 255], "trust": [66, 101, 103, 253], "measur": 66, "august": 66, "013": 66, "web": 66, "archiv": [66, 258], "20170506220426": 66, "usermanu": 66, "inteltxtsoftwaredevelopmentguid": 66, "1721028921": 66, "appendix": 66, "b": [66, 164, 188], "repres": 66, "fed20000h": 66, "fed30000h": 66, "usual": [66, 150], "were": [66, 166, 170, 260], "here": [66, 158, 259], "whiskei": 67, "core_pars": 68, "decod": [74, 75, 94, 158, 193, 194, 230, 247, 250, 254, 255], "dump_low": 76, "dump_high": 76, "read_cmos_low": 76, "write_cmos_low": 76, "read_cmos_high": 76, "write_cmos_high": 76, "relat": [77, 165, 166, 197, 258], "write_command": 79, "write_data": 79, "read_data": 79, "read_memori": 79, "write_memori": 79, "read_memory_extend": 79, "word_offset": 79, "write_memory_extend": 79, "read_rang": 79, "start_offset": [79, 248], "write_rang": 79, "gfx_aperture_dma_read": 81, "0x80000000": 81, "0x100": [81, 93, 111, 248], "encapsul": 82, "smi": [82, 148, 150, 169, 188, 189, 209, 235, 260], "nmi": [82, 235], "send_smi_apmc": 82, "0xde": [82, 235], "send_nmi": 82, "port": [83, 88, 188, 209, 215, 235, 236, 243], "read_port_byt": 83, "0x61": [83, 236], "read_port_word": 83, "read_port_dword": 83, "write_port_byt": 83, "0x71": 83, "write_port_word": 83, "write_port_dword": 83, "get_io_bar_base_address": 84, "bar_nam": 84, "read_io_bar_reg": 84, "write_io_bar_reg": 84, "dump_io_bar": 84, "engin": [85, 237], "mmcfg": [87, 240, 241], "read_mmio_reg": 87, "bar_bas": 87, "write_mmio_reg": 87, "0xffffffff": 87, "read_mmio": 87, "dump_mmio": 87, "read_mmio_bar_reg": 87, "mchbar": [87, 242], "write_mmio_bar_reg": 87, "get_mmio_bar_base_address": 87, "is_mmio_bar_en": 87, "is_mmio_bar_program": 87, "dump_mmio_bar": 87, "list_mmio_bar": 87, "get_mmcfg_base_address": 87, "read_mmcfg_reg": 87, "iosf": 88, "sideband": 88, "d2000": 88, "n2000": 88, "volum": [88, 106, 108, 191, 193, 230], "003": 88, "msgbus_reg_read": 88, "msgbus_reg_writ": 88, "msgbus_read_messag": 88, "msgbus_write_messag": 88, "msgbus_send_messag": 88, "thread": [89, 104, 155, 229], "model": [89, 157], "idt": [89, 232], "gdt": [89, 232], "read_msr": 89, "0x8b": [89, 244], "write_msr": 89, "0x79": 89, "0x12345678": 89, "get_idtr": 89, "get_gdtr": 89, "dump_descriptor_t": 89, "descriptor_table_code_idtr": 89, "idt_al": 89, "gdt_all": 89, "ia": [90, 153, 154, 157, 167], "ept": [90, 199, 257], "pcie": [91, 188, 211, 212, 240, 245], "hierarchi": 91, "expans": [91, 245], "rom": [91, 191, 193, 194, 230, 245, 250, 251, 255], "identifi": [91, 238], "read_byt": 91, "0x88": [91, 245], "write_byt": 91, "0x1a": [91, 241], "enumerate_devic": 91, "enumerate_xrom": 91, "find_xrom": 91, "0xfed00000": [91, 239, 256], "get_device_bar": 91, "get_didvid": 91, "is_en": 91, "vendor": [92, 191], "auto": 92, "pciutil": 92, "pciid": 92, "read_physical_mem": 93, "0xf0000": [93, 111, 239, 256], "write_physical_mem": 93, "write_physical_mem_dowrd": 93, "0xdeadbeef": [93, 111], "read_physical_mem_dowrd": 93, "0xfed40000": [93, 111, 239, 256], "dram": [96, 168], "presenc": 96, "eeprom": 96, "site": [96, 155, 258], "4_01_02r19": 96, "4_01_02_10r17": 96, "4_01_02_11r24": 96, "4_01_02_12r23a": 96, "simmtest": 96, "publicationarticl": 96, "184": 96, "153": 96, "101": 96, "wikipedia": 96, "serial_presence_detect": 96, "part": [97, 150], "read_spi": 97, "spi_fla": 97, "write_spi": 97, "buf": 97, "erase_spi_block": 97, "get_spi_jedec_id": 97, "get_spi_jedec_id_decod": 97, "chunk": 97, "cycl": 97, "byte": [97, 207, 209, 239, 245, 256, 261], "remaind": 97, "want": 97, "spi_read_write_max_dbc": 97, "tbd": 97, "optim": 97, "yet": 97, "approxim": 97, "smt": 97, "i5": 97, "4300u": 97, "9ghz": 97, "sec": 97, "1mb": 97, "dbc": 97, "fd": [98, 215], "read_fil": 98, "fd_file": 98, "parse_spi_flash_descriptor": 98, "jede": 99, "manufactur": [99, 158], "parse_uefi_region_from_fil": 100, "_uefi": 100, "filenam": [100, 261], "fwtype": [100, 255], "outpath": 100, "trustedcomputinggroup": 101, "definit": 102, "tpmv1": 102, "tcg": [102, 103], "v1": 102, "21": 103, "profil": 103, "microcod": [104, 153], "ucode_update_id": 104, "load_ucode_upd": 104, "ucode_buf": 104, "update_ucode_all_cpu": 104, "pdb": [104, 254], "dump_ucode_update_head": 104, "search": [110, 239, 256], "auxillari": 110, "check_match_criteria": 110, "efi_modul": 110, "match_criteria": 110, "read_virtual_mem": 111, "write_virtual_mem": 111, "write_virtual_mem_dowrd": 111, "read_virtual_mem_dowrd": 111, "second": [112, 211], "translat": 112, "slat": 112, "virtio": [112, 257], "dalhelp": [113, 115], "efihelp": [113, 117], "linuxhelp": [113, 119], "legacy_pci": [113, 121], "linuxnativehelp": [113, 121], "windowshelp": [113, 127], "basehelp": 113, "dfx": 116, "layer": 116, "nativ": [124, 203, 204, 205, 207], "module_help": 129, "struct": [129, 158], "exposur": 147, "pre": [147, 260], "hdd": [147, 260], "bot": 147, "sw": [147, 260], "defcon": 147, "16": 147, "bypass": [147, 150, 172, 174], "instrument": 147, "jonathan": 147, "brossard": 147, "m": [147, 148, 149, 150, 151, 153, 154, 156, 157, 158, 159, 160, 161, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 184, 186, 188, 189, 191, 192, 193, 194, 195, 198, 199, 203, 204, 205, 207, 208, 209, 210, 211, 212, 214, 215, 219, 220, 221, 261], "global": [148, 176], "tco": 148, "failur": [148, 176, 188, 214, 260], "defeat": 148, "corei": [148, 177], "kallenberg": [148, 177], "xeno": 148, "kovah": 148, "john": 148, "butterworth": 148, "sam": 148, "cornwel": 148, "attack": [148, 166, 168, 169, 177, 260], "against": [148, 168, 194, 260], "smmbioswriteprotect": [148, 150], "tcosmilock": 148, "smilock": 148, "bioswriteen": [148, 150, 246], "hijack": [149, 188], "vmware": 149, "dig": 149, "bing": 149, "sun": 149, "topswapstatu": 149, "topswap": 149, "either": [150, 192], "howev": 150, "would": 150, "both": [150, 255], "pr0": [150, 174], "entir": [150, 250, 260], "often": [150, 172], "tale": 150, "One": 150, "abl": [150, 166], "therebi": 150, "sometim": 150, "wpd": 150, "handler": [150, 189, 209], "decid": 150, "whether": 150, "demonstr": [150, 169], "speed": 150, "racer": 150, "outstand": 150, "eiss": 150, "smm_bwp": 150, "ensur": 150, "prn": 150, "prb": 150, "rpe": 150, "prl": 150, "wpe": 150, "pr": 150, "ia32_u_cet": 151, "ia32_s_cet": 151, "doe": [151, 168, 193, 230, 238, 260], "NOT": [151, 260, 261], "displai": [153, 208, 240, 261], "32": [153, 157, 167, 257], "sdm": [153, 157, 167], "articl": [153, 157, 167], "ia32_bios_sign_id": 153, "untrust": 154, "msr_bios_don": [154, 168], "soc_bios_don": 154, "specul": 155, "side": 155, "channel": [155, 204, 220], "branch": 155, "inject": 155, "k": [155, 261], "variant": 155, "cve": [155, 214, 215, 220], "2017": [155, 188], "5715": 155, "indirect": 155, "ibr": [155, 260], "predictor": 155, "barrier": 155, "ibpb": 155, "eax": [155, 198, 229, 244, 257], "7h": 155, "ecx": [155, 198, 229, 257], "edx": [155, 244, 257], "26": 155, "stibp": [155, 260], "27": 155, "ia32_spec_ctrl": 155, "enhanc": [155, 260], "29": 155, "ia32_arch_cap": 155, "ibrs_al": 155, "todo": 155, "rogu": 155, "rdcl": 155, "rdcl_no": 155, "we": [155, 183, 258, 260], "relev": 155, "warn": [155, 195, 198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 260], "though": 155, "take": 155, "advantag": 155, "predict": 155, "retpolin": 155, "07h": 155, "becaus": [155, 193, 194], "differ": [155, 191, 192], "wasn": 155, "rcdl_no": 155, "rcdl": 155, "jann": 155, "horn": 155, "googl": 155, "zero": 155, "googleprojectzero": 155, "blogspot": 155, "2018": [155, 158], "spectreattack": 155, "meltdown": 155, "meltdownattack": 155, "c5": 155, "63": 155, "336996": 155, "construct": 155, "faq": 155, "answer": 155, "7625886": 155, "dci": 156, "hdcien": 156, "ia32_debug_interfac": [156, 165], "unlock": [156, 238], "debugelock": 156, "debugeoccur": 156, "p2sb_dci": 156, "dci_control_reg": 156, "ia32": 157, "ia32_feature_control": [157, 165, 260], "ia32featurecontrollock": 157, "me": 158, "blog": 158, "ptsecur": 158, "macbook": 158, "pci_dev": 158, "pch_dev_slot_cs": 158, "0x16": 158, "pch_devfn_cs": 158, "_pch_devfn": 158, "cse": 158, "pch_dev_cs": 158, "_pch_dev": 158, "coreboot": [158, 160, 188], "master": [158, 160], "src": [158, 160], "apollolak": 158, "fwsts1": 158, "dump_statu": 158, "pci_me_hfsts1": 158, "out": [158, 167, 231], "piec": 158, "prior": 158, "ship": 158, "printk": 158, "bios_debug": 158, "0x4": [158, 234, 242], "NO": 158, "pch_me_dev": 158, "me_hf": 158, "u32": 158, "working_st": 158, "mfg_mode": 158, "fpt_bad": 158, "operation_st": 158, "fw_init_complet": 158, "ft_bup_ld_flr": 158, "update_in_progress": 158, "error_cod": 158, "operation_mod": 158, "reserv": 158, "boot_options_pres": 158, "ack_data": 158, "bios_msg_ack": 158, "__pack": 158, "me_statu": 158, "hf": 158, "bdf": 158, "22": [158, 208], "0x40": 158, "model_206ax": 160, "final": 160, "msr_lt_lock_memori": 160, "0x2e7": 160, "problem": 160, "subvers": 161, "joanna": 161, "rutkowska": 161, "rafal": [161, 177], "wojtczuk": [161, 177], "pci0": [161, 166, 168], "0_remapbas": 161, "0_remaplimit": 161, "0_touud": 161, "0_tolud": 161, "0_tsegmb": [161, 168], "rt": 164, "AT": 164, "unauthor": 164, "28": [164, 184], "corrupt": 164, "sgx": 165, "bwg": 165, "cdi": 165, "ibp": 165, "565432": 165, "sgx_global_en": 165, "mtrrcap": 165, "prmrr": 165, "prmrr_valid_config": 165, "prmrr_phybas": 165, "prmrr_base_address_field": 165, "prmrr_memtyp": 165, "prmrr_mask": 165, "prmrr_mask_bit": 165, "prmrr_vld": 165, "prmrr_lock": 165, "prmrr_uncore_phybas": 165, "prmrr_uncore_mask": 165, "bios_se_svn": 165, "pfat_se_svn": 165, "anc_se_svn": 165, "sclean_se_svn": 165, "sinit_se_svn": 165, "bios_se_svn_statu": 165, "sgx_debug_mod": 165, "sgx_debug_mode_status_bit": 165, "Will": 165, "smram": [166, 168, 169, 189, 260], "simpli": [166, 167, 172], "smramc": 166, "d_lck": [166, 260], "2006": 166, "outlin": 166, "ring": [166, 169, 205], "cseg": 166, "Such": 166, "circumv": 166, "0_smramc": 166, "smm_code_chk_en": 167, "msr_smm_feature_control": 167, "unrecover": 167, "mce": 167, "tseg": [168, 260], "examin": [168, 260], "through": 168, "proper": 168, "reprogram": [168, 174], "area": [168, 252], "tsegbaselock": 168, "tseglimitlock": 168, "tsegmb": 168, "0_bgsm": 168, "bgsm": 168, "ia32_smrr_physbas": [168, 169, 183], "physbas": [168, 169, 183], "ia32_smrr_physmask": [168, 169, 183], "physmask": [168, 169], "poison": 169, "research": [169, 177, 188], "effect": 169, "via": [169, 245], "reload": 169, "cacheabl": 169, "popul": 169, "smbase": 169, "exploit": [169, 177], "forc": 169, "cachabl": 169, "c220": 170, "smbus_hcfg": 170, "hsf": [171, 173, 174], "fdv": 171, "frap": [171, 172], "brwa": [171, 172], "altern": 171, "cannot": [172, 260], "itself": 172, "brra": 172, "pin": 173, "strap": 173, "fdopss": 173, "rout": 173, "jumper": 173, "motherboard": 173, "pr4": 174, "flockdn": 174, "flashrom": 174, "copernicu": 174, "mitr": 174, "question": [174, 258], "assumpt": 174, "flashlockdown": 174, "spiwritestatusdi": 174, "attribut": [176, 195, 260], "resum": [177, 192], "vu": 177, "976132": 177, "threat": [177, 188], "team": [177, 188], "dmytro": 177, "oleksiuk": 177, "script_address": [177, 255], "bootscript": 177, "0x00000000bde10000": 177, "affect": 183, "christoph": 183, "doma": 183, "whitepap": 183, "ia32_apic_bas": [183, 214], "apicbas": 183, "hashlib": 184, "extens": 184, "truncat": 184, "belong": 186, "cfg_file": 186, "efi_fil": 186, "generate_t": 186, "convert": 186, "pe": 186, "replace_bootload": 186, "bootload": 186, "esp": 186, "restore_bootload": 186, "bak": 186, "coff": 186, "experiment": 188, "bare": 188, "recon": 188, "brussel": 188, "smi_start": 188, "smi_end": 188, "written": [188, 210, 239, 243, 256], "0xb2": 188, "0x00": [188, 233, 245], "0x80": 188, "0xff": [188, 189], "1c": 188, "investig": 188, "freez": 188, "unexpect": 188, "cansecwest": 189, "2015": [189, 214, 215], "c7zero": 189, "l": [189, 198, 203, 204, 205, 207, 211, 212, 219, 261], "config_fil": 189, "smic_start": 189, "smic_end": 189, "fuzzmor": 189, "2nd": 189, "gp": 189, "smi_cod": [189, 235], "smi_data": [189, 235], "rax": [189, 235, 257], "ptr": 189, "val": 189, "rbx": [189, 235, 257], "rcx": [189, 235, 257], "rdx": [189, 235, 257], "rsi": [189, 235, 257], "rdi": [189, 235, 257], "ptr_offset": 189, "sig": 189, "sig_offset": 189, "don": [189, 260, 261], "care": [189, 192, 250], "argument": [189, 191, 193, 194, 195, 208, 261], "hardcod": 189, "_fill_value_xx": 189, "destruct": 189, "virustot": 191, "pei": [191, 193], "dxe": [191, 193], "ui": [191, 193], "md5": [191, 193], "sha": [191, 193], "256": [191, 193], "regular": [191, 193], "vt_api_kei": 191, "vt_threshold": 191, "fw_imag": [191, 193, 194], "obtain": 191, "vist": 191, "gui": 191, "join": 191, "av": 191, "claim": 191, "full": [191, 193, 194, 250, 260], "caus": [192, 214], "malfunct": 192, "replace_op": 192, "reg_opcod": 192, "pci_wr": 192, "mmio_wr": 192, "io_wr": 192, "pci_rw": 192, "mmio_rw": 192, "io_rw": 192, "mem": [192, 239], "dispatch_ep": 192, "add_op": 192, "entrypoint": [192, 247], "given": 192, "By": 192, "alloc": [192, 239, 256], "0xb007b007": 192, "entri": [192, 260], "hlt": 192, "newli": 192, "blockedlist": 193, "same": 193, "no_driv": [193, 261], "efilist": 194, "setvari": 195, "random": [195, 198, 208, 209, 210, 212, 219], "iter": [195, 198, 203, 208, 209, 210, 215, 219], "seed": 195, "test_cas": 195, "attrib": 195, "1000": [195, 208, 209], "rng": 195, "combin": 195, "100000": 195, "123456789": 195, "94": 195, "reject": 195, "volatil": 195, "render": 195, "determin": [195, 260], "stabil": 195, "retain": 195, "emul": [198, 209, 210, 211, 212], "sequenti": [198, 210], "_no_eax_to_fuzz": 198, "_eax_fuzz_step": 198, "_no_iterations_to_fuzz": [198, 210], "chosen": [198, 209], "_fuzz_ecx_random": 198, "_max_ecx": 198, "max": 198, "_exclude_cpuid": 198, "exclud": [198, 209, 210, 211, 212], "_flush_log_each_it": [198, 208, 209], "flush": [198, 208, 209, 210], "_log_out_result": 198, "unknown": [198, 207, 208, 209, 210, 211, 212, 215, 219, 220], "state": [198, 207, 208, 209, 210, 211, 212, 215, 219, 220, 238, 252, 253], "vm": [198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220], "undefin": [198, 199, 207, 208, 209, 210, 211, 212, 215, 219, 220, 238], "finder": 199, "file_nam": [199, 234], "revision_id": 199, "my_fil": 199, "bin": [199, 225, 230, 235, 239, 250, 251, 254, 255, 256], "hyper": [201, 202, 203, 204, 205, 206, 207], "vector": [203, 208, 219], "param": 203, "show": [203, 228, 261], "input": 203, "custom": 203, "synthet": [204, 205], "print": [204, 219, 232, 260], "offer": 204, "relid": 204, "inbound": 205, "hyperv": 207, "bodi": 207, "po": 207, "posit": 207, "pretti": 208, "vector_reg": 208, "maxval": 208, "exhaust": [208, 209], "send": [208, 235, 258], "0xffff": 208, "default_vector_maxv": 208, "default_maxval_exhaust": 208, "default_maxval_random": 208, "default_random_iter": [208, 209], "_log_all_gpr": 208, "count": [209, 215, 235], "randomli": [209, 210, 219], "1000000": 209, "9000": 209, "4000000": 209, "max_port": 209, "max_port_valu": 209, "default_port_write_count": 209, "switch": 209, "_fuzz_special_valu": 209, "_exclude_port": 209, "_read_msr": 210, "_flush_log_each_msr": 210, "_fuzz_value_0_all1": 210, "_fuzz_value_5a": 210, "0x5a": 210, "_fuzz_value_rnd": 210, "_exclude_msr": 210, "1f": 211, "io_fuzz": 211, "calc_bar_s": 211, "calcul": 211, "timeout": 211, "active_rang": 211, "activ": 211, "bit_flip": 211, "flip": 211, "_exclude_bar": 211, "overlap": 212, "garbag": [212, 260], "overlap_mod": 212, "fuzz_overlap": 212, "fuzz_random": 212, "_exclude_mmio_bar1": 212, "_exclude_mmio_bar2": 212, "oracl": 214, "virtualbox": 214, "0377": 214, "poc": [214, 215, 261], "crash": [214, 220], "technetwork": 214, "topic": 214, "cpujan2015": 214, "1972971": 214, "marcu": 215, "meissner": 215, "3456": 215, "iter_count": 215, "fdc_port_data_fifo": 215, "fdc": 215, "fifo": [215, 220], "fdc_cmd_wrval": 215, "fd_cmd": 215, "50": 219, "0x10000000": 219, "proof": 220, "xsa": 220, "188": 220, "7154": 220, "discov": 220, "mikhail": 220, "gorobet": 220, "confirm": [221, 260], "practic": 221, "experi": 221, "oem": 221, "file_path": 225, "xsdt": 225, "standalon": 226, "readl": 227, "writel": 227, "readh": 227, "writeh": 227, "byte_offset": 227, "byte_v": [227, 233, 248, 249], "0xcc": 227, "mmio_bar": 228, "cr": 229, "cr_number": 229, "pt": [229, 237, 257], "paging_base_cr3": 229, "topologi": 229, "0x40000000": 229, "forens": [230, 250], "fw_type": 230, "fw": 230, "vss": 230, "autodetect": 230, "appear": [230, 260], "empti": [230, 260], "again": 230, "previou": 231, "run1": 231, "run2": 231, "ldt": 232, "respect": 232, "cpu_id": [232, 254], "index": [233, 252], "0x001": 233, "0x2f": 233, "dmaread": 234, "dmawrit": 234, "0x20000000": 234, "0x2217f1000": 234, "deadbeef": 234, "thread_id": [235, 244], "smmc": 235, "rt_code_start": 235, "rt_code_end": 235, "payload_loc": 235, "payload_fil": 235, "payload_str": 235, "0xaaaaaaaaaaaaaaaa": 235, "0x79dfe000": 235, "0x79efdfff": 235, "ed32d533": 235, "99e6": 235, "4209": 235, "9cc02d72cdd998a7": 235, "0x79dfaaaa": 235, "payload": 235, "io_port": 236, "0x430": 236, "iommu_engin": 237, "vtd": 237, "gfxvtd": 237, "locknam": 238, "lockname1": 238, "lockname2": 238, "debuglock": 238, "undoc": 238, "hidden": 238, "unabl": 238, "rw": 238, "op": [239, 256], "physical_address": [239, 256], "buffer_fil": [239, 256], "readval": [239, 256], "writev": [239, 256], "pagedump": [239, 256], "dword": [239, 245, 256, 261], "0x41e": [239, 256], "0x20": [239, 256], "0xa0000": [239, 256], "0x9090cccc": [239, 256], "0x100000000": [239, 256], "000102030405060708090a0b0c0d0e0f": [239, 256], "0x100000": [239, 250], "0x10000": [239, 256], "_sm_": [239, 256], "mmcfg_base": 240, "0x200": 241, "mmio_bar_nam": 242, "ab": 242, "mmio_base_address": 242, "0xfe010000": 242, "0x70": 242, "0x74": 242, "0x04": 242, "0xffff0000": 242, "mm_read": 243, "mm_write": 243, "unit": 243, "0x3": 243, "0x2e": 243, "0x27": 243, "0xe0000001": 243, "0x11": 243, "0x3a": 244, "xrom_address": 245, "0x1": [245, 246], "0x98": 245, "0x004e0040": 245, "0xfedf0000": 245, "reg_nam": 246, "field_nam": 246, "read_field": 246, "write_field": 246, "control_nam": 246, "smbus_vid": 246, "hsfc": 246, "fgo": 246, "0x8088": 246, "raw": [247, 255], "device_addr": [248, 249], "0xa0": [248, 249], "dimm0": 249, "dimm2": 249, "0xaa": 249, "reveal": [250, 260], "taken": 250, "eras": 250, "accomplish": 250, "wp": 250, "flash_address": 250, "0x700000": 250, "flash_descriptor": 250, "spidesc": 251, "parse_log": 252, "commandnam": 252, "command_paramet": 252, "pccrread": 252, "pcr": 252, "23": 252, "nvread": 252, "continueselftest": 252, "getcap": 252, "sub": 252, "forceclear": 252, "binary_bios_measur": 252, "pcrread": 252, "17": 252, "ucode_update_fil": 254, "efi_variable_fil": 255, "rom_fil": 255, "filetyp": 255, "auth": 255, "keyvar_fil": 255, "assembl": 255, "freeform": 255, "none": 255, "lzma": 255, "tiano": 255, "raw_fil": 255, "uefi_fil": 255, "insert_befor": 255, "insert_aft": 255, "new_rom": 255, "pk": 255, "db": 255, "d719b2cb": 255, "3d3a": 255, "4596": 255, "a3bc": 255, "dad00e67656f": 255, "fv_mm": 255, "vss_auth": 255, "aaaaaaaa": 255, "bbbb": 255, "cccc": 255, "dddd": 255, "eeeeeeeeeeee": 255, "mydriv": 255, "new_bio": 255, "vmem": 256, "getphi": 256, "virtual_address": 256, "r8": 257, "r9": 257, "r10": 257, "r11": 257, "ebx": 257, "edi": 257, "esi": 257, "ept_point": 257, "0x524b01e": 257, "suggest": 258, "tracker": 258, "our": 258, "request": 258, "contribut": 258, "pull": 258, "mail": 258, "oe": 258, "lore": 258, "wish": 258, "subscrib": 258, "email": 258, "twitter": 258, "alert": 258, "discord": 258, "gg": 258, "nvxdpe8rkt": 258, "gabriel": 258, "kernei": 258, "ssi": 258, "gouv": 258, "fr": 258, "maintain": 259, "draft": 260, "progress": 260, "usabl": 260, "someth": 260, "inconclus": 260, "not_applic": 260, "went": 260, "wrong": 260, "effort": 260, "clariti": 260, "seem": 260, "portion": 260, "fill": 260, "pattern": 260, "expos": 260, "conclus": 260, "overwritten": 260, "inspect": 260, "encrypt": 260, "still": 260, "rtc": 260, "d_open": 260, "skipped_not_applic": 260, "ok": 260, "gbe": 260, "writeabl": 260, "observ": 260, "badli": 260, "probabl": 260, "extra": 260, "unfortun": 260, "knowledg": 260, "sudo": 261, "exit": 261, "_modul": 261, "mx": 261, "module_exclud": 261, "_module1": 261, "module_arg": 261, "_module_argv": 261, "verbos": 261, "vv": 261, "vverbos": 261, "veri": 261, "_platform": 261, "_pch": 261, "won": 261, "ignore_platform": 261, "recogn": 261, "j": 261, "_json_out": 261, "_xml_out": 261, "junit": 261, "style": 261, "markdown": 261, "moduletyp": 261, "user_module_tag": 261, "tag": 261, "list_tag": 261, "import_path": 261, "failfast": 261, "no_tim": 261, "timestamp": 261, "_deltas_fil": 261, "_helper": 261, "nb": 261, "no_bann": 261, "banner": 261, "skip_config": 261, "nl": 261, "save": 261, "arg": 261}, "objects": {"chipsec.cfg": [[68, 0, 0, "-", "parsers"]], "chipsec.cfg.parsers": [[69, 0, 0, "-", "core_parsers"]], "chipsec": [[70, 0, 0, "-", "config"], [71, 0, 0, "-", "fuzzing"], [73, 0, 0, "-", "hal"], [113, 0, 0, "-", "helper"], [129, 0, 0, "-", "library"], [143, 0, 0, "-", "modules"], [222, 0, 0, "-", "parsers"], [223, 0, 0, "-", "testcase"], [224, 0, 0, "-", "utilcmd"]], "chipsec.fuzzing": [[72, 0, 0, "-", "primitives"]], "chipsec.hal": [[74, 0, 0, "-", "acpi"], [75, 0, 0, "-", "acpi_tables"], [76, 0, 0, "-", "cmos"], [77, 0, 0, "-", "cpu"], [78, 0, 0, "-", "cpuid"], [79, 0, 0, "-", "ec"], [80, 0, 0, "-", "hal_base"], [81, 0, 0, "-", "igd"], [82, 0, 0, "-", "interrupts"], [83, 0, 0, "-", "io"], [84, 0, 0, "-", "iobar"], [85, 0, 0, "-", "iommu"], [86, 0, 0, "-", "locks"], [87, 0, 0, "-", "mmio"], [88, 0, 0, "-", "msgbus"], [89, 0, 0, "-", "msr"], [90, 0, 0, "-", "paging"], [91, 0, 0, "-", "pci"], [92, 0, 0, "-", "pcidb"], [93, 0, 0, "-", "physmem"], [94, 0, 0, "-", "smbios"], [95, 0, 0, "-", "smbus"], [96, 0, 0, "-", "spd"], [97, 0, 0, "-", "spi"], [98, 0, 0, "-", "spi_descriptor"], [99, 0, 0, "-", "spi_jedec_ids"], [100, 0, 0, "-", "spi_uefi"], [101, 0, 0, "-", "tpm"], [102, 0, 0, "-", "tpm12_commands"], [103, 0, 0, "-", "tpm_eventlog"], [104, 0, 0, "-", "ucode"], [105, 0, 0, "-", "uefi"], [106, 0, 0, "-", "uefi_common"], [107, 0, 0, "-", "uefi_compression"], [108, 0, 0, "-", "uefi_fv"], [109, 0, 0, "-", "uefi_platform"], [110, 0, 0, "-", "uefi_search"], [111, 0, 0, "-", "virtmem"], [112, 0, 0, "-", "vmm"]], "chipsec.helper": [[114, 0, 0, "-", "basehelper"], [115, 0, 0, "-", "dal"], [117, 0, 0, "-", "efi"], [119, 0, 0, "-", "linux"], [121, 0, 0, "-", "linuxnative"], [125, 0, 0, "-", "nonehelper"], [126, 0, 0, "-", "oshelper"], [127, 0, 0, "-", "windows"]], "chipsec.helper.dal": [[116, 0, 0, "-", "dalhelper"]], "chipsec.helper.efi": [[118, 0, 0, "-", "efihelper"]], "chipsec.helper.linux": [[120, 0, 0, "-", "linuxhelper"]], "chipsec.helper.linuxnative": [[122, 0, 0, "-", "cpuid"], [123, 0, 0, "-", "legacy_pci"], [124, 0, 0, "-", "linuxnativehelper"]], "chipsec.library": [[130, 0, 0, "-", "architecture"], [131, 0, 0, "-", "bits"], [132, 0, 0, "-", "control"], [133, 0, 0, "-", "device"], [134, 0, 0, "-", "lock"], [135, 0, 0, "-", "memory"], [136, 0, 0, "-", "module_helper"], [137, 0, 0, "-", "options"], [138, 0, 0, "-", "register"], [139, 0, 0, "-", "returncode"], [140, 0, 0, "-", "strings"], [141, 0, 0, "-", "structs"], [142, 0, 0, "-", "types"]], "chipsec.modules": [[144, 0, 0, "-", "bdw"], [145, 0, 0, "-", "byt"], [146, 0, 0, "-", "common"], [178, 0, 0, "-", "hsw"], [179, 0, 0, "-", "ivb"], [180, 0, 0, "-", "snb"], [181, 0, 0, "-", "tools"]], "chipsec.modules.common": [[147, 0, 0, "-", "bios_kbrd_buffer"], [148, 0, 0, "-", "bios_smi"], [149, 0, 0, "-", "bios_ts"], [150, 0, 0, "-", "bios_wp"], [151, 0, 0, "-", "cet"], [152, 0, 0, "-", "cpu"], [156, 0, 0, "-", "debugenabled"], [157, 0, 0, "-", "ia32cfg"], [158, 0, 0, "-", "me_mfg_mode"], [159, 0, 0, "-", "memconfig"], [160, 0, 0, "-", "memlock"], [161, 0, 0, "-", "remap"], [163, 0, 0, "-", "secureboot"], [165, 0, 0, "-", "sgx_check"], [166, 0, 0, "-", "smm"], [167, 0, 0, "-", "smm_code_chk"], [168, 0, 0, "-", "smm_dma"], [169, 0, 0, "-", "smrr"], [170, 0, 0, "-", "spd_wd"], [171, 0, 0, "-", "spi_access"], [172, 0, 0, "-", "spi_desc"], [173, 0, 0, "-", "spi_fdopss"], [174, 0, 0, "-", "spi_lock"], [175, 0, 0, "-", "uefi"]], "chipsec.modules.common.cpu": [[153, 0, 0, "-", "cpu_info"], [154, 0, 0, "-", "ia_untrusted"], [155, 0, 0, "-", "spectre_v2"]], "chipsec.modules.common.secureboot": [[164, 0, 0, "-", "variables"]], "chipsec.modules.common.uefi": [[176, 0, 0, "-", "access_uefispec"], [177, 0, 0, "-", "s3bootscript"]], "chipsec.modules.tools": [[182, 0, 0, "-", "cpu"], [184, 0, 0, "-", "generate_test_id"], [185, 0, 0, "-", "secureboot"], [187, 0, 0, "-", "smm"], [190, 0, 0, "-", "uefi"], [196, 0, 0, "-", "vmm"], [221, 0, 0, "-", "wsmt"]], "chipsec.modules.tools.cpu": [[183, 0, 0, "-", "sinkhole"]], "chipsec.modules.tools.secureboot": [[186, 0, 0, "-", "te"]], "chipsec.modules.tools.smm": [[188, 0, 0, "-", "rogue_mmio_bar"], [189, 0, 0, "-", "smm_ptr"]], "chipsec.modules.tools.uefi": [[191, 0, 0, "-", "reputation"], [192, 0, 0, "-", "s3script_modify"], [193, 0, 0, "-", "scan_blocked"], [194, 0, 0, "-", "scan_image"], [195, 0, 0, "-", "uefivar_fuzz"]], "chipsec.modules.tools.vmm": [[197, 0, 0, "-", "common"], [198, 0, 0, "-", "cpuid_fuzz"], [199, 0, 0, "-", "ept_finder"], [200, 0, 0, "-", "hv"], [208, 0, 0, "-", "hypercallfuzz"], [209, 0, 0, "-", "iofuzz"], [210, 0, 0, "-", "msr_fuzz"], [211, 0, 0, "-", "pcie_fuzz"], [212, 0, 0, "-", "pcie_overlap_fuzz"], [213, 0, 0, "-", "vbox"], [215, 0, 0, "-", "venom"], [216, 0, 0, "-", "xen"]], "chipsec.modules.tools.vmm.hv": [[201, 0, 0, "-", "define"], [202, 0, 0, "-", "hypercall"], [203, 0, 0, "-", "hypercallfuzz"], [204, 0, 0, "-", "synth_dev"], [205, 0, 0, "-", "synth_kbd"], [206, 0, 0, "-", "vmbus"], [207, 0, 0, "-", "vmbusfuzz"]], "chipsec.modules.tools.vmm.vbox": [[214, 0, 0, "-", "vbox_crash_apicbase"]], "chipsec.modules.tools.vmm.xen": [[217, 0, 0, "-", "define"], [218, 0, 0, "-", "hypercall"], [219, 0, 0, "-", "hypercallfuzz"], [220, 0, 0, "-", "xsa188"]], "chipsec.utilcmd": [[225, 0, 0, "-", "acpi_cmd"], [226, 0, 0, "-", "chipset_cmd"], [227, 0, 0, "-", "cmos_cmd"], [228, 0, 0, "-", "config_cmd"], [229, 0, 0, "-", "cpu_cmd"], [230, 0, 0, "-", "decode_cmd"], [231, 0, 0, "-", "deltas_cmd"], [232, 0, 0, "-", "desc_cmd"], [233, 0, 0, "-", "ec_cmd"], [234, 0, 0, "-", "igd_cmd"], [235, 0, 0, "-", "interrupts_cmd"], [236, 0, 0, "-", "io_cmd"], [237, 0, 0, "-", "iommu_cmd"], [238, 0, 0, "-", "lock_check_cmd"], [239, 0, 0, "-", "mem_cmd"], [240, 0, 0, "-", "mmcfg_base_cmd"], [241, 0, 0, "-", "mmcfg_cmd"], [242, 0, 0, "-", "mmio_cmd"], [243, 0, 0, "-", "msgbus_cmd"], [244, 0, 0, "-", "msr_cmd"], [245, 0, 0, "-", "pci_cmd"], [246, 0, 0, "-", "reg_cmd"], [247, 0, 0, "-", "smbios_cmd"], [248, 0, 0, "-", "smbus_cmd"], [249, 0, 0, "-", "spd_cmd"], [250, 0, 0, "-", "spi_cmd"], [251, 0, 0, "-", "spidesc_cmd"], [252, 0, 0, "-", "tpm_cmd"], [253, 0, 0, "-", "txt_cmd"], [254, 0, 0, "-", "ucode_cmd"], [255, 0, 0, "-", "uefi_cmd"], [256, 0, 0, "-", "vmem_cmd"], [257, 0, 0, "-", "vmm_cmd"]]}, "objtypes": {"0": "py:module"}, "objnames": {"0": ["py", "module", "Python module"]}, "titleterms": {"python": [0, 13, 259, 261], "version": 0, "code": [0, 6], "style": [0, 9], "guid": [0, 9], "f": 0, "string": [0, 140], "pep": 0, "support": 0, "chipsec": [0, 5, 8, 9, 10, 12, 13, 259, 261], "type": [0, 142], "hint": 0, "underscor": 0, "numer": 0, "liter": 0, "walru": 0, "oper": 0, "deprec": 0, "distutil": 0, "modul": [0, 3, 4, 6, 8, 9, 69, 70, 72, 74, 75, 76, 77, 78, 79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, 106, 107, 108, 109, 110, 111, 112, 114, 116, 118, 120, 122, 123, 124, 125, 126, 128, 130, 131, 132, 133, 134, 135, 136, 137, 138, 139, 140, 141, 142, 143, 147, 148, 149, 150, 151, 153, 154, 155, 156, 157, 158, 159, 160, 161, 162, 164, 165, 166, 167, 168, 169, 170, 171, 172, 173, 174, 176, 177, 183, 184, 186, 188, 189, 191, 192, 193, 194, 195, 197, 198, 199, 201, 202, 203, 204, 205, 206, 207, 208, 209, 210, 211, 212, 214, 215, 217, 218, 219, 220, 221, 222, 223, 225, 226, 227, 228, 229, 230, 231, 232, 233, 234, 235, 236, 237, 238, 239, 240, 241, 242, 243, 244, 245, 246, 247, 248, 249, 250, 251, 252, 253, 254, 255, 256, 257, 260], "architectur": [1, 9, 130], "overview": 1, "core": 1, "compon": [1, 2, 4], "command": [1, 9], "hal": [1, 4, 73], "hardwar": [1, 8], "abstract": 1, "layer": 1, "fuzz": [1, 71], "chipsec_main": [1, 261], "program": 1, "flow": 1, "chipsec_util": [1, 261], "auxiliari": 1, "execut": 1, "build": [1, 10, 11, 12, 13], "script": 1, "configur": [2, 5, 8], "file": 2, "exampl": [2, 4], "list": 2, "cfg": 2, "write": 3, "your": 3, "own": 3, "o": 4, "helper": [4, 113], "driver": [4, 12], "mostli": 4, "invok": 4, "import": 4, "from": [4, 8], "basehelp": [4, 114], "creat": [4, 10], "new": 4, "method": [5, 12], "platform": [5, 8], "detect": 5, "us": [5, 9, 261], "pci": [5, 12, 91], "vid": 5, "did": 5, "processor": 5, "pch": 5, "chip": 5, "inform": 5, "locat": 5, "chipset": 5, "py": 5, "option": [5, 13, 137, 261], "sampl": 6, "templat": 6, "attack": 8, "surfac": 8, "vector": 8, "firmwar": 8, "protect": 8, "rom": 8, "runtim": 8, "smram": 8, "secur": 8, "boot": 8, "incorrect": 8, "persist": 8, "eg": 8, "smi": 8, "handler": 8, "time": 8, "power": 8, "state": 8, "transit": 8, "resum": 8, "sleep": 8, "updat": 8, "network": 8, "interfac": 8, "misc": 8, "1": 9, "13": 9, "0": 9, "start": 9, "here": 9, "instal": [9, 10, 11, 12, 13], "develop": 9, "contribut": 9, "linux": [10, 119], "live": 10, "imag": 10, "kali": 10, "prerequisit": [10, 11], "run": [10, 13, 261], "dal": [11, 115], "window": [11, 12, 127], "depend": 12, "turn": 12, "off": 12, "kernel": 12, "signatur": 12, "check": 12, "altern": 12, "filter": 12, "access": 12, "config": [12, 70], "space": 12, "test": [12, 260], "bootabl": 13, "usb": 13, "drive": 13, "uefi": [13, 105, 175, 190], "shell": [13, 261], "x64": 13, "3": 13, "6": 13, "8": 13, "adl": 15, "apl": 16, "avn": 17, "bdw": [18, 144], "bdx": 19, "byt": [20, 145], "cfl": 21, "cht": 22, "cml": 23, "common": [24, 146, 197], "dnv": 25, "ehl": 26, "glk": 27, "hsw": [28, 178], "hsx": 29, "icl": 30, "icx": 31, "iommu": [32, 85], "ivb": [33, 179], "ivt": 34, "jkt": 35, "kbl": 36, "pch_1xx": 37, "pch_2xx": 38, "pch_3xx": 39, "pch_3xxlp": 40, "pch_3xxop": 41, "pch_495": 42, "pch_4xx": 43, "pch_4xxh": 44, "pch_4xxlp": 45, "pch_5xxh": 46, "pch_5xxlp": 47, "pch_6xxp": 48, "pch_6xx": 49, "pch_7x": 50, "pch_8x": 51, "pch_c60x": 52, "pch_c61x": 53, "pch_c620": 54, "pmc_i440fx": 55, "qrk": 56, "rkl": 57, "rpl": 58, "sfdp": 59, "skl": 60, "skx": 61, "snb": [62, 180], "tglh": 63, "tglu": 64, "tpm12": 65, "txt": 66, "whl": 67, "parser": [68, 222], "packag": [68, 71, 73, 113, 115, 117, 119, 121, 127, 129, 143, 144, 145, 146, 152, 163, 175, 178, 179, 180, 181, 182, 185, 187, 190, 196, 200, 213, 216, 224, 261], "core_pars": 69, "primit": 72, "acpi": 74, "acpi_t": 75, "cmo": 76, "cpu": [77, 152, 182], "cpuid": [78, 122], "ec": 79, "hal_bas": 80, "igd": 81, "interrupt": 82, "io": 83, "iobar": 84, "lock": [86, 134], "mmio": 87, "msgbu": 88, "msr": 89, "page": 90, "pcidb": 92, "physmem": 93, "smbio": 94, "smbu": 95, "spd": 96, "spi": 97, "spi_descriptor": 98, "spi_jedec_id": 99, "spi_uefi": 100, "tpm": 101, "tpm12_command": 102, "tpm_eventlog": 103, "ucod": 104, "uefi_common": 106, "uefi_compress": 107, "uefi_fv": 108, "uefi_platform": 109, "uefi_search": 110, "virtmem": 111, "vmm": [112, 196], "dalhelp": 116, "efi": 117, "efihelp": 118, "linuxhelp": 120, "linuxn": 121, "legacy_pci": 123, "linuxnativehelp": 124, "nonehelp": 125, "oshelp": 126, "windowshelp": 128, "librari": 129, "bit": 131, "control": 132, "devic": 133, "memori": 135, "module_help": 136, "regist": 138, "returncod": 139, "struct": 141, "bios_kbrd_buff": 147, "bios_smi": 148, "bios_t": 149, "bios_wp": 150, "cet": 151, "cpu_info": 153, "ia_untrust": 154, "spectre_v2": 155, "debugen": 156, "ia32cfg": 157, "me_mfg_mod": 158, "memconfig": 159, "memlock": 160, "remap": 161, "rtclock": 162, "secureboot": [163, 185], "variabl": 164, "sgx_check": 165, "smm": [166, 187], "smm_code_chk": 167, "smm_dma": 168, "smrr": 169, "spd_wd": 170, "spi_access": 171, "spi_desc": 172, "spi_fdopss": 173, "spi_lock": 174, "access_uefispec": 176, "s3bootscript": 177, "tool": [181, 260], "sinkhol": 183, "generate_test_id": 184, "te": 186, "rogue_mmio_bar": 188, "smm_ptr": 189, "reput": 191, "s3script_modifi": 192, "scan_block": 193, "scan_imag": 194, "uefivar_fuzz": 195, "cpuid_fuzz": 198, "ept_find": 199, "hv": 200, "defin": [201, 217], "hypercal": [202, 218], "hypercallfuzz": [203, 208, 219], "synth_dev": 204, "synth_kbd": 205, "vmbu": 206, "vmbusfuzz": 207, "iofuzz": 209, "msr_fuzz": 210, "pcie_fuzz": 211, "pcie_overlap_fuzz": 212, "vbox": 213, "vbox_crash_apicbas": 214, "venom": 215, "xen": 216, "xsa188": 220, "wsmt": 221, "testcas": 223, "utilcmd": 224, "acpi_cmd": 225, "chipset_cmd": 226, "cmos_cmd": 227, "config_cmd": 228, "cpu_cmd": 229, "decode_cmd": 230, "deltas_cmd": 231, "desc_cmd": 232, "ec_cmd": 233, "igd_cmd": 234, "interrupts_cmd": 235, "io_cmd": 236, "iommu_cmd": 237, "lock_check_cmd": 238, "mem_cmd": 239, "mmcfg_base_cmd": 240, "mmcfg_cmd": 241, "mmio_cmd": 242, "msgbus_cmd": 243, "msr_cmd": 244, "pci_cmd": 245, "reg_cmd": 246, "smbios_cmd": 247, "smbus_cmd": 248, "spd_cmd": 249, "spi_cmd": 250, "spidesc_cmd": 251, "tpm_cmd": 252, "txt_cmd": 253, "ucode_cmd": 254, "uefi_cmd": 255, "vmem_cmd": 256, "vmm_cmd": 257, "contact": 258, "download": 259, "github": 259, "repositori": 259, "releas": 259, "interpret": 260, "result": 260, "gener": 260, "mean": 260, "autom": 260}, "envversion": {"sphinx.domains.c": 3, "sphinx.domains.changeset": 1, "sphinx.domains.citation": 1, "sphinx.domains.cpp": 9, "sphinx.domains.index": 1, "sphinx.domains.javascript": 3, "sphinx.domains.math": 2, "sphinx.domains.python": 4, "sphinx.domains.rst": 2, "sphinx.domains.std": 2, "sphinx.ext.todo": 2, "sphinx.ext.viewcode": 1, "sphinx": 60}, "alltitles": {"Python Version": [[0, "python-version"]], "Python Coding Style Guide": [[0, "python-coding-style-guide"]], "f-Strings": [[0, "f-strings"]], "PEP versions supported by CHIPSEC": [[0, "id2"], [0, "id3"], [0, "id4"], [0, "id5"], [0, "id6"]], "Type Hints": [[0, "type-hints"]], "Underscores in Numeric Literals": [[0, "underscores-in-numeric-literals"]], "Walrus Operator (:=)": [[0, "walrus-operator"]], "Deprecate distutils module support": [[0, "deprecate-distutils-module-support"]], "Architecture Overview": [[1, "architecture-overview"]], "Core components": [[1, "core-components"]], "Commands": [[1, "commands"]], "HAL (Hardware Abstraction Layer)": [[1, "hal-hardware-abstraction-layer"]], "Fuzzing": [[1, "fuzzing"]], "CHIPSEC_MAIN Program Flow": [[1, "chipsec-main-program-flow"]], "CHIPSEC_UTIL Program Flow": [[1, "chipsec-util-program-flow"]], "Auxiliary components": [[1, "auxiliary-components"]], "Executable build scripts": [[1, "executable-build-scripts"]], "Configuration Files": [[2, "configuration-files"]], "Configuration File Example": [[2, "configuration-file-example"]], "List of Cfg components": [[2, "list-of-cfg-components"]], "Writing Your Own Modules": [[3, "writing-your-own-modules"]], "OS Helpers and Drivers": [[4, "os-helpers-and-drivers"]], "Mostly invoked by HAL modules": [[4, "mostly-invoked-by-hal-modules"]], "Helpers import from BaseHelper": [[4, "helpers-import-from-basehelper"]], "Create a New Helper": [[4, "create-a-new-helper"]], "Example": [[4, "example"]], "Helper components": [[4, "helper-components"]], "Methods for Platform Detection": [[5, "methods-for-platform-detection"]], "Uses PCI VID and DID to detect processor and PCH": [[5, "uses-pci-vid-and-did-to-detect-processor-and-pch"]], "Chip information located in chipsec/chipset.py.": [[5, "chip-information-located-in-chipsec-chipset-py"]], "Platform Configuration Options": [[5, "platform-configuration-options"]], "Sample module code template": [[6, "sample-module-code-template"]], "CHIPSEC Modules": [[8, "chipsec-modules"]], "Attack Surface/Vector: Firmware protections in ROM": [[8, "id1"]], "Attack Surface/Vector: Runtime protection of SMRAM": [[8, "id2"]], "Attack Surface/Vector: Secure boot - Incorrect protection of secure boot configuration": [[8, "id3"]], "Attack Surface/Vector: Persistent firmware configuration": [[8, "id4"]], "Attack Surface/Vector: Platform hardware configuration": [[8, "id5"]], "Attack Surface/Vector: Runtime firmware (eg. SMI handlers)": [[8, "id6"]], "Attack Surface/Vector: Boot time firmware": [[8, "id7"]], "Attack Surface/Vector: Power state transitions (eg. resume from sleep)": [[8, "id8"]], "Attack Surface/Vector: Firmware update": [[8, "id9"]], "Attack Surface/Vector: Network interfaces": [[8, "id10"]], "Attack Surface/Vector: Misc": [[8, "id11"]], "Modules": [[8, "modules"]], "CHIPSEC 1.13.0": [[9, "chipsec-1-13-0"]], "Start here": [[9, null]], "Installation": [[9, "installation"], [9, null]], "Using CHIPSEC": [[9, "using-chipsec"], [9, null]], "Module & Command Development": [[9, "module-command-development"]], "Architecture and Modules": [[9, null]], "Contribution and Style Guides": [[9, "contribution-and-style-guides"]], "Contribution Guide": [[9, null]], "Linux Installation": [[10, "linux-installation"]], "Creating a Live Linux image": [[10, "creating-a-live-linux-image"]], "Installing Kali Linux": [[10, "installing-kali-linux"]], "Prerequisites": [[10, "prerequisites"], [11, "prerequisites"]], "Installing CHIPSEC": [[10, "installing-chipsec"], [13, "installing-chipsec"]], "Building CHIPSEC": [[10, "building-chipsec"]], "Run CHIPSEC": [[10, "run-chipsec"]], "DAL Windows Installation": [[11, "dal-windows-installation"]], "Building": [[11, "building"], [12, "building"]], "Windows Installation": [[12, "windows-installation"]], "Install CHIPSEC Dependencies": [[12, "install-chipsec-dependencies"]], "Turn off kernel driver signature checks": [[12, "turn-off-kernel-driver-signature-checks"]], "Alternate Build Methods": [[12, "alternate-build-methods"]], "Windows PCI Filter Driver": [[12, "windows-pci-filter-driver"]], "Install PCI Filter Driver": [[12, "install-pci-filter-driver"]], "Filter Driver Access PCI Config Space Test": [[12, "filter-driver-access-pci-config-space-test"]], "Building a Bootable USB drive with UEFI Shell (x64)": [[13, "building-a-bootable-usb-drive-with-uefi-shell-x64"]], "Run CHIPSEC in UEFI Shell": [[13, "run-chipsec-in-uefi-shell"]], "Building UEFI Python 3.6.8 (optional)": [[13, "building-uefi-python-3-6-8-optional"]], "adl": [[15, "adl"]], "apl": [[16, "apl"]], "avn": [[17, "avn"]], "bdw": [[18, "bdw"]], "bdx": [[19, "bdx"]], "byt": [[20, "byt"]], "cfl": [[21, "cfl"]], "cht": [[22, "cht"]], "cml": [[23, "cml"]], "common": [[24, "common"]], "dnv": [[25, "dnv"]], "ehl": [[26, "ehl"]], "glk": [[27, "glk"]], "hsw": [[28, "hsw"]], "hsx": [[29, "hsx"]], "icl": [[30, "icl"]], "icx": [[31, "icx"]], "iommu": [[32, "iommu"]], "ivb": [[33, "ivb"]], "ivt": [[34, "ivt"]], "jkt": [[35, "jkt"]], "kbl": [[36, "kbl"]], "pch_1xx": [[37, "pch-1xx"]], "pch_2xx": [[38, "pch-2xx"]], "pch_3xx": [[39, "pch-3xx"]], "pch_3xxlp": [[40, "pch-3xxlp"]], "pch_3xxop": [[41, "pch-3xxop"]], "pch_495": [[42, "pch-495"]], "pch_4xx": [[43, "pch-4xx"]], "pch_4xxh": [[44, "pch-4xxh"]], "pch_4xxlp": [[45, "pch-4xxlp"]], "pch_5xxh": [[46, "pch-5xxh"]], "pch_5xxlp": [[47, "pch-5xxlp"]], "pch_6xxP": [[48, "pch-6xxp"]], "pch_6xxS": [[49, "pch-6xxs"]], "pch_7x": [[50, "pch-7x"]], "pch_8x": [[51, "pch-8x"]], "pch_c60x": [[52, "pch-c60x"]], "pch_c61x": [[53, "pch-c61x"]], "pch_c620": [[54, "pch-c620"]], "pmc_i440fx": [[55, "pmc-i440fx"]], "qrk": [[56, "qrk"]], "rkl": [[57, "rkl"]], "rpl": [[58, "rpl"]], "sfdp": [[59, "sfdp"]], "skl": [[60, "skl"]], "skx": [[61, "skx"]], "snb": [[62, "snb"]], "tglh": [[63, "tglh"]], "tglu": [[64, "tglu"]], "tpm12": [[65, "tpm12"]], "txt": [[66, "txt"]], "whl": [[67, "whl"]], "parsers package": [[68, "parsers-package"]], "core_parsers module": [[69, "module-chipsec.cfg.parsers.core_parsers"]], "config module": [[70, "module-chipsec.config"]], "fuzzing package": [[71, "fuzzing-package"]], "primitives module": [[72, "module-chipsec.fuzzing.primitives"]], "hal package": [[73, "hal-package"]], "acpi module": [[74, "module-chipsec.hal.acpi"]], "acpi_tables module": [[75, "module-chipsec.hal.acpi_tables"]], "cmos module": [[76, "module-chipsec.hal.cmos"]], "cpu module": [[77, "module-chipsec.hal.cpu"]], "cpuid module": [[78, "module-chipsec.hal.cpuid"], [122, "module-chipsec.helper.linuxnative.cpuid"]], "ec module": [[79, "module-chipsec.hal.ec"]], "hal_base module": [[80, "module-chipsec.hal.hal_base"]], "igd module": [[81, "module-chipsec.hal.igd"]], "interrupts module": [[82, "module-chipsec.hal.interrupts"]], "io module": [[83, "module-chipsec.hal.io"]], "iobar module": [[84, "module-chipsec.hal.iobar"]], "iommu module": [[85, "module-chipsec.hal.iommu"]], "locks module": [[86, "module-chipsec.hal.locks"]], "mmio module": [[87, "module-chipsec.hal.mmio"]], "msgbus module": [[88, "module-chipsec.hal.msgbus"]], "msr module": [[89, "module-chipsec.hal.msr"]], "paging module": [[90, "module-chipsec.hal.paging"]], "pci module": [[91, "module-chipsec.hal.pci"]], "pcidb module": [[92, "module-chipsec.hal.pcidb"]], "physmem module": [[93, "module-chipsec.hal.physmem"]], "smbios module": [[94, "module-chipsec.hal.smbios"]], "smbus module": [[95, "module-chipsec.hal.smbus"]], "spd module": [[96, "module-chipsec.hal.spd"]], "spi module": [[97, "module-chipsec.hal.spi"]], "spi_descriptor module": [[98, "module-chipsec.hal.spi_descriptor"]], "spi_jedec_ids module": [[99, "module-chipsec.hal.spi_jedec_ids"]], "spi_uefi module": [[100, "module-chipsec.hal.spi_uefi"]], "tpm module": [[101, "module-chipsec.hal.tpm"]], "tpm12_commands module": [[102, "module-chipsec.hal.tpm12_commands"]], "tpm_eventlog module": [[103, "module-chipsec.hal.tpm_eventlog"]], "ucode module": [[104, "module-chipsec.hal.ucode"]], "uefi module": [[105, "module-chipsec.hal.uefi"]], "uefi_common module": [[106, "module-chipsec.hal.uefi_common"]], "uefi_compression module": [[107, "module-chipsec.hal.uefi_compression"]], "uefi_fv module": [[108, "module-chipsec.hal.uefi_fv"]], "uefi_platform module": [[109, "module-chipsec.hal.uefi_platform"]], "uefi_search module": [[110, "module-chipsec.hal.uefi_search"]], "virtmem module": [[111, "module-chipsec.hal.virtmem"]], "vmm module": [[112, "module-chipsec.hal.vmm"]], "helper package": [[113, "helper-package"]], "basehelper module": [[114, "module-chipsec.helper.basehelper"]], "dal package": [[115, "dal-package"]], "dalhelper module": [[116, "module-chipsec.helper.dal.dalhelper"]], "efi package": [[117, "efi-package"]], "efihelper module": [[118, "module-chipsec.helper.efi.efihelper"]], "linux package": [[119, "linux-package"]], "linuxhelper module": [[120, "module-chipsec.helper.linux.linuxhelper"]], "linuxnative package": [[121, "linuxnative-package"]], "legacy_pci module": [[123, "module-chipsec.helper.linuxnative.legacy_pci"]], "linuxnativehelper module": [[124, "module-chipsec.helper.linuxnative.linuxnativehelper"]], "nonehelper module": [[125, "module-chipsec.helper.nonehelper"]], "oshelper module": [[126, "module-chipsec.helper.oshelper"]], "windows package": [[127, "windows-package"]], "windowshelper module": [[128, "windowshelper-module"]], "library package": [[129, "library-package"]], "architecture module": [[130, "module-chipsec.library.architecture"]], "bits module": [[131, "module-chipsec.library.bits"]], "control module": [[132, "module-chipsec.library.control"]], "device module": [[133, "module-chipsec.library.device"]], "lock module": [[134, "module-chipsec.library.lock"]], "memory module": [[135, "module-chipsec.library.memory"]], "module_helper module": [[136, "module-chipsec.library.module_helper"]], "options module": [[137, "module-chipsec.library.options"]], "register module": [[138, "module-chipsec.library.register"]], "returncode module": [[139, "module-chipsec.library.returncode"]], "strings module": [[140, "module-chipsec.library.strings"]], "structs module": [[141, "module-chipsec.library.structs"]], "types module": [[142, "module-chipsec.library.types"]], "modules package": [[143, "modules-package"]], "bdw package": [[144, "module-chipsec.modules.bdw"]], "byt package": [[145, "module-chipsec.modules.byt"]], "common package": [[146, "common-package"]], "bios_kbrd_buffer module": [[147, "module-chipsec.modules.common.bios_kbrd_buffer"]], "bios_smi module": [[148, "module-chipsec.modules.common.bios_smi"]], "bios_ts module": [[149, "module-chipsec.modules.common.bios_ts"]], "bios_wp module": [[150, "module-chipsec.modules.common.bios_wp"]], "cet module": [[151, "module-chipsec.modules.common.cet"]], "cpu package": [[152, "cpu-package"], [182, "cpu-package"]], "cpu_info module": [[153, "module-chipsec.modules.common.cpu.cpu_info"]], "ia_untrusted module": [[154, "module-chipsec.modules.common.cpu.ia_untrusted"]], "spectre_v2 module": [[155, "module-chipsec.modules.common.cpu.spectre_v2"]], "debugenabled module": [[156, "module-chipsec.modules.common.debugenabled"]], "ia32cfg module": [[157, "module-chipsec.modules.common.ia32cfg"]], "me_mfg_mode module": [[158, "module-chipsec.modules.common.me_mfg_mode"]], "memconfig module": [[159, "module-chipsec.modules.common.memconfig"]], "memlock module": [[160, "module-chipsec.modules.common.memlock"]], "remap module": [[161, "module-chipsec.modules.common.remap"]], "rtclock module": [[162, "rtclock-module"]], "secureboot package": [[163, "secureboot-package"], [185, "secureboot-package"]], "variables module": [[164, "module-chipsec.modules.common.secureboot.variables"]], "sgx_check module": [[165, "module-chipsec.modules.common.sgx_check"]], "smm module": [[166, "module-chipsec.modules.common.smm"]], "smm_code_chk module": [[167, "module-chipsec.modules.common.smm_code_chk"]], "smm_dma module": [[168, "module-chipsec.modules.common.smm_dma"]], "smrr module": [[169, "module-chipsec.modules.common.smrr"]], "spd_wd module": [[170, "module-chipsec.modules.common.spd_wd"]], "spi_access module": [[171, "module-chipsec.modules.common.spi_access"]], "spi_desc module": [[172, "module-chipsec.modules.common.spi_desc"]], "spi_fdopss module": [[173, "module-chipsec.modules.common.spi_fdopss"]], "spi_lock module": [[174, "module-chipsec.modules.common.spi_lock"]], "uefi package": [[175, "uefi-package"], [190, "uefi-package"]], "access_uefispec module": [[176, "module-chipsec.modules.common.uefi.access_uefispec"]], "s3bootscript module": [[177, "module-chipsec.modules.common.uefi.s3bootscript"]], "hsw package": [[178, "module-chipsec.modules.hsw"]], "ivb package": [[179, "module-chipsec.modules.ivb"]], "snb package": [[180, "module-chipsec.modules.snb"]], "tools package": [[181, "tools-package"]], "sinkhole module": [[183, "module-chipsec.modules.tools.cpu.sinkhole"]], "generate_test_id module": [[184, "module-chipsec.modules.tools.generate_test_id"]], "te module": [[186, "module-chipsec.modules.tools.secureboot.te"]], "smm package": [[187, "smm-package"]], "rogue_mmio_bar module": [[188, "module-chipsec.modules.tools.smm.rogue_mmio_bar"]], "smm_ptr module": [[189, "module-chipsec.modules.tools.smm.smm_ptr"]], "reputation module": [[191, "module-chipsec.modules.tools.uefi.reputation"]], "s3script_modify module": [[192, "module-chipsec.modules.tools.uefi.s3script_modify"]], "scan_blocked module": [[193, "module-chipsec.modules.tools.uefi.scan_blocked"]], "scan_image module": [[194, "module-chipsec.modules.tools.uefi.scan_image"]], "uefivar_fuzz module": [[195, "module-chipsec.modules.tools.uefi.uefivar_fuzz"]], "vmm package": [[196, "vmm-package"]], "common module": [[197, "module-chipsec.modules.tools.vmm.common"]], "cpuid_fuzz module": [[198, "module-chipsec.modules.tools.vmm.cpuid_fuzz"]], "ept_finder module": [[199, "module-chipsec.modules.tools.vmm.ept_finder"]], "hv package": [[200, "hv-package"]], "define module": [[201, "module-chipsec.modules.tools.vmm.hv.define"], [217, "module-chipsec.modules.tools.vmm.xen.define"]], "hypercall module": [[202, "module-chipsec.modules.tools.vmm.hv.hypercall"], [218, "module-chipsec.modules.tools.vmm.xen.hypercall"]], "hypercallfuzz module": [[203, "module-chipsec.modules.tools.vmm.hv.hypercallfuzz"], [208, "module-chipsec.modules.tools.vmm.hypercallfuzz"], [219, "module-chipsec.modules.tools.vmm.xen.hypercallfuzz"]], "synth_dev module": [[204, "module-chipsec.modules.tools.vmm.hv.synth_dev"]], "synth_kbd module": [[205, "module-chipsec.modules.tools.vmm.hv.synth_kbd"]], "vmbus module": [[206, "module-chipsec.modules.tools.vmm.hv.vmbus"]], "vmbusfuzz module": [[207, "module-chipsec.modules.tools.vmm.hv.vmbusfuzz"]], "iofuzz module": [[209, "module-chipsec.modules.tools.vmm.iofuzz"]], "msr_fuzz module": [[210, "module-chipsec.modules.tools.vmm.msr_fuzz"]], "pcie_fuzz module": [[211, "module-chipsec.modules.tools.vmm.pcie_fuzz"]], "pcie_overlap_fuzz module": [[212, "module-chipsec.modules.tools.vmm.pcie_overlap_fuzz"]], "vbox package": [[213, "vbox-package"]], "vbox_crash_apicbase module": [[214, "module-chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase"]], "venom module": [[215, "module-chipsec.modules.tools.vmm.venom"]], "xen package": [[216, "xen-package"]], "xsa188 module": [[220, "module-chipsec.modules.tools.vmm.xen.xsa188"]], "wsmt module": [[221, "module-chipsec.modules.tools.wsmt"]], "parsers module": [[222, "module-chipsec.parsers"]], "testcase module": [[223, "module-chipsec.testcase"]], "utilcmd package": [[224, "utilcmd-package"]], "acpi_cmd module": [[225, "module-chipsec.utilcmd.acpi_cmd"]], "chipset_cmd module": [[226, "module-chipsec.utilcmd.chipset_cmd"]], "cmos_cmd module": [[227, "module-chipsec.utilcmd.cmos_cmd"]], "config_cmd module": [[228, "module-chipsec.utilcmd.config_cmd"]], "cpu_cmd module": [[229, "module-chipsec.utilcmd.cpu_cmd"]], "decode_cmd module": [[230, "module-chipsec.utilcmd.decode_cmd"]], "deltas_cmd module": [[231, "module-chipsec.utilcmd.deltas_cmd"]], "desc_cmd module": [[232, "module-chipsec.utilcmd.desc_cmd"]], "ec_cmd module": [[233, "module-chipsec.utilcmd.ec_cmd"]], "igd_cmd module": [[234, "module-chipsec.utilcmd.igd_cmd"]], "interrupts_cmd module": [[235, "module-chipsec.utilcmd.interrupts_cmd"]], "io_cmd module": [[236, "module-chipsec.utilcmd.io_cmd"]], "iommu_cmd module": [[237, "module-chipsec.utilcmd.iommu_cmd"]], "lock_check_cmd module": [[238, "module-chipsec.utilcmd.lock_check_cmd"]], "mem_cmd module": [[239, "module-chipsec.utilcmd.mem_cmd"]], "mmcfg_base_cmd module": [[240, "module-chipsec.utilcmd.mmcfg_base_cmd"]], "mmcfg_cmd module": [[241, "module-chipsec.utilcmd.mmcfg_cmd"]], "mmio_cmd module": [[242, "module-chipsec.utilcmd.mmio_cmd"]], "msgbus_cmd module": [[243, "module-chipsec.utilcmd.msgbus_cmd"]], "msr_cmd module": [[244, "module-chipsec.utilcmd.msr_cmd"]], "pci_cmd module": [[245, "module-chipsec.utilcmd.pci_cmd"]], "reg_cmd module": [[246, "module-chipsec.utilcmd.reg_cmd"]], "smbios_cmd module": [[247, "module-chipsec.utilcmd.smbios_cmd"]], "smbus_cmd module": [[248, "module-chipsec.utilcmd.smbus_cmd"]], "spd_cmd module": [[249, "module-chipsec.utilcmd.spd_cmd"]], "spi_cmd module": [[250, "module-chipsec.utilcmd.spi_cmd"]], "spidesc_cmd module": [[251, "module-chipsec.utilcmd.spidesc_cmd"]], "tpm_cmd module": [[252, "module-chipsec.utilcmd.tpm_cmd"]], "txt_cmd module": [[253, "module-chipsec.utilcmd.txt_cmd"]], "ucode_cmd module": [[254, "module-chipsec.utilcmd.ucode_cmd"]], "uefi_cmd module": [[255, "module-chipsec.utilcmd.uefi_cmd"]], "vmem_cmd module": [[256, "module-chipsec.utilcmd.vmem_cmd"]], "vmm_cmd module": [[257, "module-chipsec.utilcmd.vmm_cmd"]], "Contact": [[258, "contact"]], "Download CHIPSEC": [[259, "download-chipsec"]], "GitHub repository": [[259, "github-repository"]], "Releases": [[259, "releases"]], "Python": [[259, "python"]], "Interpreting results": [[260, "interpreting-results"]], "Results": [[260, "results"]], "Generic results meanings": [[260, "id2"]], "Automated Tests": [[260, "automated-tests"]], "Modules results meanings": [[260, "id3"]], "Tools": [[260, "tools"]], "Running CHIPSEC": [[261, "running-chipsec"]], "Running in Shell": [[261, "running-in-shell"]], "Using as a Python Package": [[261, "using-as-a-python-package"]], "chipsec_main options": [[261, "chipsec-main-options"]], "chipsec_util options": [[261, "chipsec-util-options"]]}, "indexentries": {"chipsec.cfg.parsers": [[68, "module-chipsec.cfg.parsers"]], "module": [[68, "module-chipsec.cfg.parsers"], [69, "module-chipsec.cfg.parsers.core_parsers"], [70, "module-chipsec.config"], [71, "module-chipsec.fuzzing"], [72, "module-chipsec.fuzzing.primitives"], [73, "module-chipsec.hal"], [74, "module-chipsec.hal.acpi"], [75, "module-chipsec.hal.acpi_tables"], [76, "module-chipsec.hal.cmos"], [77, "module-chipsec.hal.cpu"], [78, "module-chipsec.hal.cpuid"], [79, "module-chipsec.hal.ec"], [80, "module-chipsec.hal.hal_base"], [81, "module-chipsec.hal.igd"], [82, "module-chipsec.hal.interrupts"], [83, "module-chipsec.hal.io"], [84, "module-chipsec.hal.iobar"], [85, "module-chipsec.hal.iommu"], [86, "module-chipsec.hal.locks"], [87, "module-chipsec.hal.mmio"], [88, "module-chipsec.hal.msgbus"], [89, "module-chipsec.hal.msr"], [90, "module-chipsec.hal.paging"], [91, "module-chipsec.hal.pci"], [92, "module-chipsec.hal.pcidb"], [93, "module-chipsec.hal.physmem"], [94, "module-chipsec.hal.smbios"], [95, "module-chipsec.hal.smbus"], [96, "module-chipsec.hal.spd"], [97, "module-chipsec.hal.spi"], [98, "module-chipsec.hal.spi_descriptor"], [99, "module-chipsec.hal.spi_jedec_ids"], [100, "module-chipsec.hal.spi_uefi"], [101, "module-chipsec.hal.tpm"], [102, "module-chipsec.hal.tpm12_commands"], [103, "module-chipsec.hal.tpm_eventlog"], [104, "module-chipsec.hal.ucode"], [105, "module-chipsec.hal.uefi"], [106, "module-chipsec.hal.uefi_common"], [107, "module-chipsec.hal.uefi_compression"], [108, "module-chipsec.hal.uefi_fv"], [109, "module-chipsec.hal.uefi_platform"], [110, "module-chipsec.hal.uefi_search"], [111, "module-chipsec.hal.virtmem"], [112, "module-chipsec.hal.vmm"], [113, "module-chipsec.helper"], [114, "module-chipsec.helper.basehelper"], [115, "module-chipsec.helper.dal"], [116, "module-chipsec.helper.dal.dalhelper"], [117, "module-chipsec.helper.efi"], [118, "module-chipsec.helper.efi.efihelper"], [119, "module-chipsec.helper.linux"], [120, "module-chipsec.helper.linux.linuxhelper"], [121, "module-chipsec.helper.linuxnative"], [122, "module-chipsec.helper.linuxnative.cpuid"], [123, "module-chipsec.helper.linuxnative.legacy_pci"], [124, "module-chipsec.helper.linuxnative.linuxnativehelper"], [125, "module-chipsec.helper.nonehelper"], [126, "module-chipsec.helper.oshelper"], [127, "module-chipsec.helper.windows"], [129, "module-chipsec.library"], [130, "module-chipsec.library.architecture"], [131, "module-chipsec.library.bits"], [132, "module-chipsec.library.control"], [133, "module-chipsec.library.device"], [134, "module-chipsec.library.lock"], [135, "module-chipsec.library.memory"], [136, "module-chipsec.library.module_helper"], [137, "module-chipsec.library.options"], [138, "module-chipsec.library.register"], [139, "module-chipsec.library.returncode"], [140, "module-chipsec.library.strings"], [141, "module-chipsec.library.structs"], [142, "module-chipsec.library.types"], [143, "module-chipsec.modules"], [144, "module-chipsec.modules.bdw"], [145, "module-chipsec.modules.byt"], [146, "module-chipsec.modules.common"], [147, "module-chipsec.modules.common.bios_kbrd_buffer"], [148, "module-chipsec.modules.common.bios_smi"], [149, "module-chipsec.modules.common.bios_ts"], [150, "module-chipsec.modules.common.bios_wp"], [151, "module-chipsec.modules.common.cet"], [152, "module-chipsec.modules.common.cpu"], [153, "module-chipsec.modules.common.cpu.cpu_info"], [154, "module-chipsec.modules.common.cpu.ia_untrusted"], [155, "module-chipsec.modules.common.cpu.spectre_v2"], [156, "module-chipsec.modules.common.debugenabled"], [157, "module-chipsec.modules.common.ia32cfg"], [158, "module-chipsec.modules.common.me_mfg_mode"], [159, "module-chipsec.modules.common.memconfig"], [160, "module-chipsec.modules.common.memlock"], [161, "module-chipsec.modules.common.remap"], [163, "module-chipsec.modules.common.secureboot"], [164, "module-chipsec.modules.common.secureboot.variables"], [165, "module-chipsec.modules.common.sgx_check"], [166, "module-chipsec.modules.common.smm"], [167, "module-chipsec.modules.common.smm_code_chk"], [168, "module-chipsec.modules.common.smm_dma"], [169, "module-chipsec.modules.common.smrr"], [170, "module-chipsec.modules.common.spd_wd"], [171, "module-chipsec.modules.common.spi_access"], [172, "module-chipsec.modules.common.spi_desc"], [173, "module-chipsec.modules.common.spi_fdopss"], [174, "module-chipsec.modules.common.spi_lock"], [175, "module-chipsec.modules.common.uefi"], [176, "module-chipsec.modules.common.uefi.access_uefispec"], [177, "module-chipsec.modules.common.uefi.s3bootscript"], [178, "module-chipsec.modules.hsw"], [179, "module-chipsec.modules.ivb"], [180, "module-chipsec.modules.snb"], [181, "module-chipsec.modules.tools"], [182, "module-chipsec.modules.tools.cpu"], [183, "module-chipsec.modules.tools.cpu.sinkhole"], [184, "module-chipsec.modules.tools.generate_test_id"], [185, "module-chipsec.modules.tools.secureboot"], [186, "module-chipsec.modules.tools.secureboot.te"], [187, "module-chipsec.modules.tools.smm"], [188, "module-chipsec.modules.tools.smm.rogue_mmio_bar"], [189, "module-chipsec.modules.tools.smm.smm_ptr"], [190, "module-chipsec.modules.tools.uefi"], [191, "module-chipsec.modules.tools.uefi.reputation"], [192, "module-chipsec.modules.tools.uefi.s3script_modify"], [193, "module-chipsec.modules.tools.uefi.scan_blocked"], [194, "module-chipsec.modules.tools.uefi.scan_image"], [195, "module-chipsec.modules.tools.uefi.uefivar_fuzz"], [196, "module-chipsec.modules.tools.vmm"], [197, "module-chipsec.modules.tools.vmm.common"], [198, "module-chipsec.modules.tools.vmm.cpuid_fuzz"], [199, "module-chipsec.modules.tools.vmm.ept_finder"], [200, "module-chipsec.modules.tools.vmm.hv"], [201, "module-chipsec.modules.tools.vmm.hv.define"], [202, "module-chipsec.modules.tools.vmm.hv.hypercall"], [203, "module-chipsec.modules.tools.vmm.hv.hypercallfuzz"], [204, "module-chipsec.modules.tools.vmm.hv.synth_dev"], [205, "module-chipsec.modules.tools.vmm.hv.synth_kbd"], [206, "module-chipsec.modules.tools.vmm.hv.vmbus"], [207, "module-chipsec.modules.tools.vmm.hv.vmbusfuzz"], [208, "module-chipsec.modules.tools.vmm.hypercallfuzz"], [209, "module-chipsec.modules.tools.vmm.iofuzz"], [210, "module-chipsec.modules.tools.vmm.msr_fuzz"], [211, "module-chipsec.modules.tools.vmm.pcie_fuzz"], [212, "module-chipsec.modules.tools.vmm.pcie_overlap_fuzz"], [213, "module-chipsec.modules.tools.vmm.vbox"], [214, "module-chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase"], [215, "module-chipsec.modules.tools.vmm.venom"], [216, "module-chipsec.modules.tools.vmm.xen"], [217, "module-chipsec.modules.tools.vmm.xen.define"], [218, "module-chipsec.modules.tools.vmm.xen.hypercall"], [219, "module-chipsec.modules.tools.vmm.xen.hypercallfuzz"], [220, "module-chipsec.modules.tools.vmm.xen.xsa188"], [221, "module-chipsec.modules.tools.wsmt"], [222, "module-chipsec.parsers"], [223, "module-chipsec.testcase"], [224, "module-chipsec.utilcmd"], [225, "module-chipsec.utilcmd.acpi_cmd"], [226, "module-chipsec.utilcmd.chipset_cmd"], [227, "module-chipsec.utilcmd.cmos_cmd"], [228, "module-chipsec.utilcmd.config_cmd"], [229, "module-chipsec.utilcmd.cpu_cmd"], [230, "module-chipsec.utilcmd.decode_cmd"], [231, "module-chipsec.utilcmd.deltas_cmd"], [232, "module-chipsec.utilcmd.desc_cmd"], [233, "module-chipsec.utilcmd.ec_cmd"], [234, "module-chipsec.utilcmd.igd_cmd"], [235, "module-chipsec.utilcmd.interrupts_cmd"], [236, "module-chipsec.utilcmd.io_cmd"], [237, "module-chipsec.utilcmd.iommu_cmd"], [238, "module-chipsec.utilcmd.lock_check_cmd"], [239, "module-chipsec.utilcmd.mem_cmd"], [240, "module-chipsec.utilcmd.mmcfg_base_cmd"], [241, "module-chipsec.utilcmd.mmcfg_cmd"], [242, "module-chipsec.utilcmd.mmio_cmd"], [243, "module-chipsec.utilcmd.msgbus_cmd"], [244, "module-chipsec.utilcmd.msr_cmd"], [245, "module-chipsec.utilcmd.pci_cmd"], [246, "module-chipsec.utilcmd.reg_cmd"], [247, "module-chipsec.utilcmd.smbios_cmd"], [248, "module-chipsec.utilcmd.smbus_cmd"], [249, "module-chipsec.utilcmd.spd_cmd"], [250, "module-chipsec.utilcmd.spi_cmd"], [251, "module-chipsec.utilcmd.spidesc_cmd"], [252, "module-chipsec.utilcmd.tpm_cmd"], [253, "module-chipsec.utilcmd.txt_cmd"], [254, "module-chipsec.utilcmd.ucode_cmd"], [255, "module-chipsec.utilcmd.uefi_cmd"], [256, "module-chipsec.utilcmd.vmem_cmd"], [257, "module-chipsec.utilcmd.vmm_cmd"]], "chipsec.cfg.parsers.core_parsers": [[69, "module-chipsec.cfg.parsers.core_parsers"]], "chipsec.config": [[70, "module-chipsec.config"]], "chipsec.fuzzing": [[71, "module-chipsec.fuzzing"]], "chipsec.fuzzing.primitives": [[72, "module-chipsec.fuzzing.primitives"]], "chipsec.hal": [[73, "module-chipsec.hal"]], "chipsec.hal.acpi": [[74, "module-chipsec.hal.acpi"]], "chipsec.hal.acpi_tables": [[75, "module-chipsec.hal.acpi_tables"]], "chipsec.hal.cmos": [[76, "module-chipsec.hal.cmos"]], "chipsec.hal.cpu": [[77, "module-chipsec.hal.cpu"]], "chipsec.hal.cpuid": [[78, "module-chipsec.hal.cpuid"]], "chipsec.hal.ec": [[79, "module-chipsec.hal.ec"]], "chipsec.hal.hal_base": [[80, "module-chipsec.hal.hal_base"]], "chipsec.hal.igd": [[81, "module-chipsec.hal.igd"]], "chipsec.hal.interrupts": [[82, "module-chipsec.hal.interrupts"]], "chipsec.hal.io": [[83, "module-chipsec.hal.io"]], "chipsec.hal.iobar": [[84, "module-chipsec.hal.iobar"]], "chipsec.hal.iommu": [[85, "module-chipsec.hal.iommu"]], "chipsec.hal.locks": [[86, "module-chipsec.hal.locks"]], "chipsec.hal.mmio": [[87, "module-chipsec.hal.mmio"]], "chipsec.hal.msgbus": [[88, "module-chipsec.hal.msgbus"]], "chipsec.hal.msr": [[89, "module-chipsec.hal.msr"]], "chipsec.hal.paging": [[90, "module-chipsec.hal.paging"]], "chipsec.hal.pci": [[91, "module-chipsec.hal.pci"]], "chipsec.hal.pcidb": [[92, "module-chipsec.hal.pcidb"]], "chipsec.hal.physmem": [[93, "module-chipsec.hal.physmem"]], "chipsec.hal.smbios": [[94, "module-chipsec.hal.smbios"]], "chipsec.hal.smbus": [[95, "module-chipsec.hal.smbus"]], "chipsec.hal.spd": [[96, "module-chipsec.hal.spd"]], "chipsec.hal.spi": [[97, "module-chipsec.hal.spi"]], "chipsec.hal.spi_descriptor": [[98, "module-chipsec.hal.spi_descriptor"]], "chipsec.hal.spi_jedec_ids": [[99, "module-chipsec.hal.spi_jedec_ids"]], "chipsec.hal.spi_uefi": [[100, "module-chipsec.hal.spi_uefi"]], "chipsec.hal.tpm": [[101, "module-chipsec.hal.tpm"]], "chipsec.hal.tpm12_commands": [[102, "module-chipsec.hal.tpm12_commands"]], "chipsec.hal.tpm_eventlog": [[103, "module-chipsec.hal.tpm_eventlog"]], "chipsec.hal.ucode": [[104, "module-chipsec.hal.ucode"]], "chipsec.hal.uefi": [[105, "module-chipsec.hal.uefi"]], "chipsec.hal.uefi_common": [[106, "module-chipsec.hal.uefi_common"]], "chipsec.hal.uefi_compression": [[107, "module-chipsec.hal.uefi_compression"]], "chipsec.hal.uefi_fv": [[108, "module-chipsec.hal.uefi_fv"]], "chipsec.hal.uefi_platform": [[109, "module-chipsec.hal.uefi_platform"]], "chipsec.hal.uefi_search": [[110, "module-chipsec.hal.uefi_search"]], "chipsec.hal.virtmem": [[111, "module-chipsec.hal.virtmem"]], "chipsec.hal.vmm": [[112, "module-chipsec.hal.vmm"]], "chipsec.helper": [[113, "module-chipsec.helper"]], "chipsec.helper.basehelper": [[114, "module-chipsec.helper.basehelper"]], "chipsec.helper.dal": [[115, "module-chipsec.helper.dal"]], "chipsec.helper.dal.dalhelper": [[116, "module-chipsec.helper.dal.dalhelper"]], "chipsec.helper.efi": [[117, "module-chipsec.helper.efi"]], "chipsec.helper.efi.efihelper": [[118, "module-chipsec.helper.efi.efihelper"]], "chipsec.helper.linux": [[119, "module-chipsec.helper.linux"]], "chipsec.helper.linux.linuxhelper": [[120, "module-chipsec.helper.linux.linuxhelper"]], "chipsec.helper.linuxnative": [[121, "module-chipsec.helper.linuxnative"]], "chipsec.helper.linuxnative.cpuid": [[122, "module-chipsec.helper.linuxnative.cpuid"]], "chipsec.helper.linuxnative.legacy_pci": [[123, "module-chipsec.helper.linuxnative.legacy_pci"]], "chipsec.helper.linuxnative.linuxnativehelper": [[124, "module-chipsec.helper.linuxnative.linuxnativehelper"]], "chipsec.helper.nonehelper": [[125, "module-chipsec.helper.nonehelper"]], "chipsec.helper.oshelper": [[126, "module-chipsec.helper.oshelper"]], "chipsec.helper.windows": [[127, "module-chipsec.helper.windows"]], "chipsec.library": [[129, "module-chipsec.library"]], "chipsec.library.architecture": [[130, "module-chipsec.library.architecture"]], "chipsec.library.bits": [[131, "module-chipsec.library.bits"]], "chipsec.library.control": [[132, "module-chipsec.library.control"]], "chipsec.library.device": [[133, "module-chipsec.library.device"]], "chipsec.library.lock": [[134, "module-chipsec.library.lock"]], "chipsec.library.memory": [[135, "module-chipsec.library.memory"]], "chipsec.library.module_helper": [[136, "module-chipsec.library.module_helper"]], "chipsec.library.options": [[137, "module-chipsec.library.options"]], "chipsec.library.register": [[138, "module-chipsec.library.register"]], "chipsec.library.returncode": [[139, "module-chipsec.library.returncode"]], "chipsec.library.strings": [[140, "module-chipsec.library.strings"]], "chipsec.library.structs": [[141, "module-chipsec.library.structs"]], "chipsec.library.types": [[142, "module-chipsec.library.types"]], "chipsec.modules": [[143, "module-chipsec.modules"]], "chipsec.modules.bdw": [[144, "module-chipsec.modules.bdw"]], "chipsec.modules.byt": [[145, "module-chipsec.modules.byt"]], "chipsec.modules.common": [[146, "module-chipsec.modules.common"]], "chipsec.modules.common.bios_kbrd_buffer": [[147, "module-chipsec.modules.common.bios_kbrd_buffer"]], "chipsec.modules.common.bios_smi": [[148, "module-chipsec.modules.common.bios_smi"]], "chipsec.modules.common.bios_ts": [[149, "module-chipsec.modules.common.bios_ts"]], "chipsec.modules.common.bios_wp": [[150, "module-chipsec.modules.common.bios_wp"]], "chipsec.modules.common.cet": [[151, "module-chipsec.modules.common.cet"]], "chipsec.modules.common.cpu": [[152, "module-chipsec.modules.common.cpu"]], "chipsec.modules.common.cpu.cpu_info": [[153, "module-chipsec.modules.common.cpu.cpu_info"]], "chipsec.modules.common.cpu.ia_untrusted": [[154, "module-chipsec.modules.common.cpu.ia_untrusted"]], "chipsec.modules.common.cpu.spectre_v2": [[155, "module-chipsec.modules.common.cpu.spectre_v2"]], "chipsec.modules.common.debugenabled": [[156, "module-chipsec.modules.common.debugenabled"]], "chipsec.modules.common.ia32cfg": [[157, "module-chipsec.modules.common.ia32cfg"]], "chipsec.modules.common.me_mfg_mode": [[158, "module-chipsec.modules.common.me_mfg_mode"]], "chipsec.modules.common.memconfig": [[159, "module-chipsec.modules.common.memconfig"]], "chipsec.modules.common.memlock": [[160, "module-chipsec.modules.common.memlock"]], "chipsec.modules.common.remap": [[161, "module-chipsec.modules.common.remap"]], "chipsec.modules.common.secureboot": [[163, "module-chipsec.modules.common.secureboot"]], "chipsec.modules.common.secureboot.variables": [[164, "module-chipsec.modules.common.secureboot.variables"]], "chipsec.modules.common.sgx_check": [[165, "module-chipsec.modules.common.sgx_check"]], "chipsec.modules.common.smm": [[166, "module-chipsec.modules.common.smm"]], "chipsec.modules.common.smm_code_chk": [[167, "module-chipsec.modules.common.smm_code_chk"]], "chipsec.modules.common.smm_dma": [[168, "module-chipsec.modules.common.smm_dma"]], "chipsec.modules.common.smrr": [[169, "module-chipsec.modules.common.smrr"]], "chipsec.modules.common.spd_wd": [[170, "module-chipsec.modules.common.spd_wd"]], "chipsec.modules.common.spi_access": [[171, "module-chipsec.modules.common.spi_access"]], "chipsec.modules.common.spi_desc": [[172, "module-chipsec.modules.common.spi_desc"]], "chipsec.modules.common.spi_fdopss": [[173, "module-chipsec.modules.common.spi_fdopss"]], "chipsec.modules.common.spi_lock": [[174, "module-chipsec.modules.common.spi_lock"]], "chipsec.modules.common.uefi": [[175, "module-chipsec.modules.common.uefi"]], "chipsec.modules.common.uefi.access_uefispec": [[176, "module-chipsec.modules.common.uefi.access_uefispec"]], "chipsec.modules.common.uefi.s3bootscript": [[177, "module-chipsec.modules.common.uefi.s3bootscript"]], "chipsec.modules.hsw": [[178, "module-chipsec.modules.hsw"]], "chipsec.modules.ivb": [[179, "module-chipsec.modules.ivb"]], "chipsec.modules.snb": [[180, "module-chipsec.modules.snb"]], "chipsec.modules.tools": [[181, "module-chipsec.modules.tools"]], "chipsec.modules.tools.cpu": [[182, "module-chipsec.modules.tools.cpu"]], "chipsec.modules.tools.cpu.sinkhole": [[183, "module-chipsec.modules.tools.cpu.sinkhole"]], "chipsec.modules.tools.generate_test_id": [[184, "module-chipsec.modules.tools.generate_test_id"]], "chipsec.modules.tools.secureboot": [[185, "module-chipsec.modules.tools.secureboot"]], "chipsec.modules.tools.secureboot.te": [[186, "module-chipsec.modules.tools.secureboot.te"]], "chipsec.modules.tools.smm": [[187, "module-chipsec.modules.tools.smm"]], "chipsec.modules.tools.smm.rogue_mmio_bar": [[188, "module-chipsec.modules.tools.smm.rogue_mmio_bar"]], "chipsec.modules.tools.smm.smm_ptr": [[189, "module-chipsec.modules.tools.smm.smm_ptr"]], "chipsec.modules.tools.uefi": [[190, "module-chipsec.modules.tools.uefi"]], "chipsec.modules.tools.uefi.reputation": [[191, "module-chipsec.modules.tools.uefi.reputation"]], "chipsec.modules.tools.uefi.s3script_modify": [[192, "module-chipsec.modules.tools.uefi.s3script_modify"]], "chipsec.modules.tools.uefi.scan_blocked": [[193, "module-chipsec.modules.tools.uefi.scan_blocked"]], "chipsec.modules.tools.uefi.scan_image": [[194, "module-chipsec.modules.tools.uefi.scan_image"]], "chipsec.modules.tools.uefi.uefivar_fuzz": [[195, "module-chipsec.modules.tools.uefi.uefivar_fuzz"]], "chipsec.modules.tools.vmm": [[196, "module-chipsec.modules.tools.vmm"]], "chipsec.modules.tools.vmm.common": [[197, "module-chipsec.modules.tools.vmm.common"]], "chipsec.modules.tools.vmm.cpuid_fuzz": [[198, "module-chipsec.modules.tools.vmm.cpuid_fuzz"]], "chipsec.modules.tools.vmm.ept_finder": [[199, "module-chipsec.modules.tools.vmm.ept_finder"]], "chipsec.modules.tools.vmm.hv": [[200, "module-chipsec.modules.tools.vmm.hv"]], "chipsec.modules.tools.vmm.hv.define": [[201, "module-chipsec.modules.tools.vmm.hv.define"]], "chipsec.modules.tools.vmm.hv.hypercall": [[202, "module-chipsec.modules.tools.vmm.hv.hypercall"]], "chipsec.modules.tools.vmm.hv.hypercallfuzz": [[203, "module-chipsec.modules.tools.vmm.hv.hypercallfuzz"]], "chipsec.modules.tools.vmm.hv.synth_dev": [[204, "module-chipsec.modules.tools.vmm.hv.synth_dev"]], "chipsec.modules.tools.vmm.hv.synth_kbd": [[205, "module-chipsec.modules.tools.vmm.hv.synth_kbd"]], "chipsec.modules.tools.vmm.hv.vmbus": [[206, "module-chipsec.modules.tools.vmm.hv.vmbus"]], "chipsec.modules.tools.vmm.hv.vmbusfuzz": [[207, "module-chipsec.modules.tools.vmm.hv.vmbusfuzz"]], "chipsec.modules.tools.vmm.hypercallfuzz": [[208, "module-chipsec.modules.tools.vmm.hypercallfuzz"]], "chipsec.modules.tools.vmm.iofuzz": [[209, "module-chipsec.modules.tools.vmm.iofuzz"]], "chipsec.modules.tools.vmm.msr_fuzz": [[210, "module-chipsec.modules.tools.vmm.msr_fuzz"]], "chipsec.modules.tools.vmm.pcie_fuzz": [[211, "module-chipsec.modules.tools.vmm.pcie_fuzz"]], "chipsec.modules.tools.vmm.pcie_overlap_fuzz": [[212, "module-chipsec.modules.tools.vmm.pcie_overlap_fuzz"]], "chipsec.modules.tools.vmm.vbox": [[213, "module-chipsec.modules.tools.vmm.vbox"]], "chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase": [[214, "module-chipsec.modules.tools.vmm.vbox.vbox_crash_apicbase"]], "chipsec.modules.tools.vmm.venom": [[215, "module-chipsec.modules.tools.vmm.venom"]], "chipsec.modules.tools.vmm.xen": [[216, "module-chipsec.modules.tools.vmm.xen"]], "chipsec.modules.tools.vmm.xen.define": [[217, "module-chipsec.modules.tools.vmm.xen.define"]], "chipsec.modules.tools.vmm.xen.hypercall": [[218, "module-chipsec.modules.tools.vmm.xen.hypercall"]], "chipsec.modules.tools.vmm.xen.hypercallfuzz": [[219, "module-chipsec.modules.tools.vmm.xen.hypercallfuzz"]], "chipsec.modules.tools.vmm.xen.xsa188": [[220, "module-chipsec.modules.tools.vmm.xen.xsa188"]], "chipsec.modules.tools.wsmt": [[221, "module-chipsec.modules.tools.wsmt"]], "chipsec.parsers": [[222, "module-chipsec.parsers"]], "chipsec.testcase": [[223, "module-chipsec.testcase"]], "chipsec.utilcmd": [[224, "module-chipsec.utilcmd"]], "chipsec.utilcmd.acpi_cmd": [[225, "module-chipsec.utilcmd.acpi_cmd"]], "chipsec.utilcmd.chipset_cmd": [[226, "module-chipsec.utilcmd.chipset_cmd"]], "chipsec.utilcmd.cmos_cmd": [[227, "module-chipsec.utilcmd.cmos_cmd"]], "chipsec.utilcmd.config_cmd": [[228, "module-chipsec.utilcmd.config_cmd"]], "chipsec.utilcmd.cpu_cmd": [[229, "module-chipsec.utilcmd.cpu_cmd"]], "chipsec.utilcmd.decode_cmd": [[230, "module-chipsec.utilcmd.decode_cmd"]], "chipsec.utilcmd.deltas_cmd": [[231, "module-chipsec.utilcmd.deltas_cmd"]], "chipsec.utilcmd.desc_cmd": [[232, "module-chipsec.utilcmd.desc_cmd"]], "chipsec.utilcmd.ec_cmd": [[233, "module-chipsec.utilcmd.ec_cmd"]], "chipsec.utilcmd.igd_cmd": [[234, "module-chipsec.utilcmd.igd_cmd"]], "chipsec.utilcmd.interrupts_cmd": [[235, "module-chipsec.utilcmd.interrupts_cmd"]], "chipsec.utilcmd.io_cmd": [[236, "module-chipsec.utilcmd.io_cmd"]], "chipsec.utilcmd.iommu_cmd": [[237, "module-chipsec.utilcmd.iommu_cmd"]], "chipsec.utilcmd.lock_check_cmd": [[238, "module-chipsec.utilcmd.lock_check_cmd"]], "chipsec.utilcmd.mem_cmd": [[239, "module-chipsec.utilcmd.mem_cmd"]], "chipsec.utilcmd.mmcfg_base_cmd": [[240, "module-chipsec.utilcmd.mmcfg_base_cmd"]], "chipsec.utilcmd.mmcfg_cmd": [[241, "module-chipsec.utilcmd.mmcfg_cmd"]], "chipsec.utilcmd.mmio_cmd": [[242, "module-chipsec.utilcmd.mmio_cmd"]], "chipsec.utilcmd.msgbus_cmd": [[243, "module-chipsec.utilcmd.msgbus_cmd"]], "chipsec.utilcmd.msr_cmd": [[244, "module-chipsec.utilcmd.msr_cmd"]], "chipsec.utilcmd.pci_cmd": [[245, "module-chipsec.utilcmd.pci_cmd"]], "chipsec.utilcmd.reg_cmd": [[246, "module-chipsec.utilcmd.reg_cmd"]], "chipsec.utilcmd.smbios_cmd": [[247, "module-chipsec.utilcmd.smbios_cmd"]], "chipsec.utilcmd.smbus_cmd": [[248, "module-chipsec.utilcmd.smbus_cmd"]], "chipsec.utilcmd.spd_cmd": [[249, "module-chipsec.utilcmd.spd_cmd"]], "chipsec.utilcmd.spi_cmd": [[250, "module-chipsec.utilcmd.spi_cmd"]], "chipsec.utilcmd.spidesc_cmd": [[251, "module-chipsec.utilcmd.spidesc_cmd"]], "chipsec.utilcmd.tpm_cmd": [[252, "module-chipsec.utilcmd.tpm_cmd"]], "chipsec.utilcmd.txt_cmd": [[253, "module-chipsec.utilcmd.txt_cmd"]], "chipsec.utilcmd.ucode_cmd": [[254, "module-chipsec.utilcmd.ucode_cmd"]], "chipsec.utilcmd.uefi_cmd": [[255, "module-chipsec.utilcmd.uefi_cmd"]], "chipsec.utilcmd.vmem_cmd": [[256, "module-chipsec.utilcmd.vmem_cmd"]], "chipsec.utilcmd.vmm_cmd": [[257, "module-chipsec.utilcmd.vmm_cmd"]]}}) \ No newline at end of file diff --git a/start/Contact.html b/start/Contact.html index a4f11177..d65353fd 100644 --- a/start/Contact.html +++ b/start/Contact.html @@ -1,24 +1,23 @@ - - + - + + Contact — CHIPSEC documentation - - + + - - - - + + + - + - +
    @@ -165,15 +164,15 @@

    Navigation

    next |
  • - previous |
  • CHIPSEC documentation »
  • Contact
    • \ No newline at end of file diff --git a/start/Download.html b/start/Download.html index 8936b480..4a54dfb1 100644 --- a/start/Download.html +++ b/start/Download.html @@ -1,20 +1,19 @@ - - + - + + Download CHIPSEC — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,26 +44,26 @@

    Navigation

    -
    -

    Download CHIPSEC

    -
    -

    GitHub repository

    +
    +

    Download CHIPSEC

    +
    +

    GitHub repository

    CHIPSEC source files are maintained in a GitHub repository:

    ../_images/GHRepo.png -
    -
    -

    Releases

    + +
    +

    Releases

    You can find the latest release here:

    ../_images/LR.png

    Older releases can be found here

    After downloading there are some steps to follow to build the driver and run, please refer to Installation and running CHIPSEC

    -
    -
    -

    Python

    + +
    +

    Python

    Python downloads:

    https://www.python.org/downloads/

    -
    -
    + +
    @@ -134,7 +133,7 @@

    Quick search

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    Navigation

    \ No newline at end of file diff --git a/usage/Interpreting-Results.html b/usage/Interpreting-Results.html index 68404107..24ef237d 100644 --- a/usage/Interpreting-Results.html +++ b/usage/Interpreting-Results.html @@ -1,20 +1,19 @@ - - + - + + Interpreting results — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,21 +44,21 @@

    Navigation

    -
    -

    Interpreting results

    +
    +

    Interpreting results

    Note

    DRAFT (work in progress)

    In order to improve usability, we are reviewing and improving the messages and meaning of information returned by CHIPSEC.

    -
    -

    Results

    - - +
    +

    Results

    +
    Generic results meanings
    +--++ @@ -87,20 +86,20 @@

    Results -

    Automated Tests

    + +
    +

    Automated Tests

    Each test module can log additional messaging in addition to the return value. In an effort to standardize and improve the clarity of this messaging, the mapping of result and messages is defined below:

    -

    Generic results meanings

    Result

    - +
    Modules results meanings
    +-----+++++ @@ -227,14 +226,14 @@

    Automated Tests -

    Tools

    + +
    +

    Tools

    CHIPSEC also contains tools such as fuzzers, which require a knowledgeable user to run. We can examine the usability of these tools as well.

    - - +
    +
    @@ -304,7 +303,7 @@

    Quick search

    - +
    @@ -329,8 +328,8 @@

    Navigation

    \ No newline at end of file diff --git a/usage/Running-Chipsec.html b/usage/Running-Chipsec.html index 55c148da..7f123862 100644 --- a/usage/Running-Chipsec.html +++ b/usage/Running-Chipsec.html @@ -1,20 +1,19 @@ - - + - + + Running CHIPSEC — CHIPSEC documentation - - + + - - - - + + + - + @@ -45,8 +44,8 @@

    Navigation

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    Running CHIPSEC

    +
    +

    Running CHIPSEC

    CHIPSEC should be launched as Administrator/root.

    CHIPSEC will automatically attempt to create and start its service, including load its kernel-mode driver. If CHIPSEC service is already running then it will attempt to connect to the existing service.

    Use –no-driver command-line option to skip loading the kernel module. This option will only work for certain commands or modules.

    @@ -65,17 +64,17 @@

    Navigation

    -
    -

    Running in Shell

    +
    +

    Running in Shell

    Basic usage

    # python chipsec_main.py

    # python chipsec_util.py

    For help, run

    # python chipsec_main.py --help

    # python chipsec_util.py --help

    -
    -
    -

    Using as a Python Package

    + +
    +

    Using as a Python Package

    Install CHIPSEC manually or from PyPI. You can then use CHIPSEC from your Python project or from the Python shell:

    To install and run CHIPSEC as a package:

    # python setup.py install

    @@ -94,9 +93,9 @@

    Using as a Python Package# python setup.py build_ext -i

    # sudo python chipsec_main.py

    -

    -
    -

    chipsec_main options

    + +
    +

    chipsec_main options

    usage: chipsec_main.py [options]
 
 Options:
@@ -130,9 +129,9 @@ 
    chipsec_main options-nl                                 Chipsec won't save logs automatically
    -
    -
    -

    chipsec_util options

    + +
    +

    chipsec_util options

    usage: chipsec_util.py [options] <command> [<args>]
 
 Options:
@@ -154,8 +153,8 @@ 
    chipsec_util optionsargs                         Additional arguments for specific command. All numeric values are in hex. <width> is in {1 - byte, 2 - word, 4 - dword}
    -
    -
    + +
    @@ -225,7 +224,7 @@

    Quick search

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    Navigation

     \ No newline at end of file
    Modules results meanings

    Test