From 02a7800da831b18a6937c70a47f3c485c7d1ce97 Mon Sep 17 00:00:00 2001 From: Rot127 Date: Fri, 5 Jan 2024 07:44:37 -0500 Subject: [PATCH] Fix BL definition. BL does not read SP. --- llvm/lib/Target/AArch64/AArch64InstrInfo.td | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index 17fc90afcaab..d0e02b944c2d 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -2551,7 +2551,7 @@ def ERET : SpecialReturn<0b0100, "eret">; // Default to the LR register. def : InstAlias<"ret", (RET LR)>; -let isCall = 1, Defs = [LR], Uses = [SP] in { +let isCall = 1, Defs = [LR], isBranch = 1, isIndirectBranch = 1 in { def BLR : BranchReg<0b0001, "blr", []>; def BLRNoIP : Pseudo<(outs), (ins GPR64noip:$Rn), []>, Sched<[WriteBrReg]>, @@ -2648,7 +2648,7 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1 in { def B : BranchImm<0, "b", [(br bb:$addr)]>; } // isBranch, isTerminator, isBarrier -let isCall = 1, Defs = [LR], Uses = [SP] in { +let isCall = 1, Defs = [LR], isBranch = 1 in { def BL : CallImm<1, "bl", [(AArch64call tglobaladdr:$addr)]>; } // isCall def : Pat<(AArch64call texternalsym:$func), (BL texternalsym:$func)>;