Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Change RegVal type to 64bit. #2182

Merged
merged 1 commit into from
Oct 25, 2023
Merged

Conversation

Rot127
Copy link
Collaborator

@Rot127 Rot127 commented Oct 23, 2023

It does become an endian issue on big endian machines, if the operand is an immediate value with the high 32bits set, but getRegVal() == 0 is checked on it.

@kabeor Sorry, of cause I missed the endian issue in the last PR -.-

It does become an endian issue on big endian machines,
if the operand is an immediate value with the high 32bits set,
but getRegVal() == 0 is checked on it.
@XVilka
Copy link
Contributor

XVilka commented Oct 24, 2023

@aquynh @kabeor could you please merge this one?

@kabeor
Copy link
Member

kabeor commented Oct 25, 2023

Merged

@kabeor kabeor merged commit 46154e8 into capstone-engine:next Oct 25, 2023
11 checks passed
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

Successfully merging this pull request may close these issues.

3 participants