[skip ci]Xtensa+autosync: fix AddCSDetail

capstone-engine · Jun 27, 2024 · 941f4cd · 941f4cd
1 parent 9638970
commit 941f4cd
Showing 1 changed file with 3 additions and 0 deletions.
diff --git a/suite/auto-sync/src/autosync/cpptranslator/patches/AddCSDetail.py b/suite/auto-sync/src/autosync/cpptranslator/patches/AddCSDetail.py
@@ -34,6 +34,8 @@ class AddCSDetail(Patch):
         b"(SStream*O,ARM_AM::ShiftOpcShOpc,unsignedShImm,boolgetUseMarkup())",  # ARM - printRegImmShift
         b"(MCInst*MI,unsignedOpNo,SStream*O,constchar*Modifier)",  # PPC - printPredicateOperand
         b"(MCInst*MI,uint64_tAddress,unsignedOpNo,SStream*O)",  # PPC - printBranchOperand
+        b"(MCInst*MI,intOpNum,SStream*O)",  # Xtensa printOperand parameters.
+        b"(MCInst*MI,intOpNum,SStream*OS)",  # Xtensa printOperand parameters.
     ]
 
     def __init__(self, priority: int, arch: str):
@@ -45,6 +47,7 @@ def __init__(self, priority: int, arch: str):
                 "PPCInstPrinter.cpp",
                 "AArch64InstPrinter.cpp",
                 "LoongArchInstPrinter.cpp",
+                "XtensaInstPrinter.cpp",
             ],
             "archs": list(),
         }