diff --git a/arch/ARM/ARMInstPrinter.c b/arch/ARM/ARMInstPrinter.c
index 14170eb522..677c27a418 100644
--- a/arch/ARM/ARMInstPrinter.c
+++ b/arch/ARM/ARMInstPrinter.c
@@ -452,8 +452,10 @@ void printOperandAddr(MCInst *MI, uint64_t Address, unsigned OpNum, SStream *O)
 {
 	MCOperand *Op = MCInst_getOperand(MI, (OpNum));
 	if (!MCOperand_isImm(Op) || MI->csh->PrintBranchImmNotAsAddress ||
-	    getUseMarkup())
-		return printOperand(MI, OpNum, O);
+	    getUseMarkup()) {
+		printOperand(MI, OpNum, O);
+		return;
+	}
 	int64_t Imm = MCOperand_getImm(Op);
 	// For ARM instructions the PC offset is 8 bytes, for Thumb instructions it
 	// is 4 bytes.
@@ -1631,8 +1633,10 @@ void printModImmOperand(MCInst *MI, unsigned OpNum, SStream *O)
 	MCOperand *Op = MCInst_getOperand(MI, (OpNum));
 
 	// Support for fixups (MCFixup)
-	if (MCOperand_isExpr(Op))
-		return printOperand(MI, OpNum, O);
+	if (MCOperand_isExpr(Op)) {
+		printOperand(MI, OpNum, O);
+		return;
+	}
 
 	unsigned Bits = MCOperand_getImm(Op) & 0xFF;
 	unsigned Rot = (MCOperand_getImm(Op) & 0xF00) >> 7;
diff --git a/arch/Alpha/AlphaMapping.c b/arch/Alpha/AlphaMapping.c
index c3ae47d051..2bc18671ca 100644
--- a/arch/Alpha/AlphaMapping.c
+++ b/arch/Alpha/AlphaMapping.c
@@ -157,7 +157,7 @@ const char *Alpha_getRegisterName(csh handle, unsigned int id)
 
 void Alpha_printInst(MCInst *MI, SStream *O, void *Info)
 {
-	return Alpha_LLVM_printInstruction(MI, O, Info);
+	Alpha_LLVM_printInstruction(MI, O, Info);
 }
 
 void Alpha_set_instr_map_data(MCInst *MI) 
diff --git a/arch/PowerPC/PPCInstPrinter.c b/arch/PowerPC/PPCInstPrinter.c
index a13aa0fbd9..fe6194ff4b 100644
--- a/arch/PowerPC/PPCInstPrinter.c
+++ b/arch/PowerPC/PPCInstPrinter.c
@@ -505,8 +505,10 @@ void printU16ImmOperand(MCInst *MI, unsigned OpNo, SStream *O)
 void printBranchOperand(MCInst *MI, uint64_t Address, unsigned OpNo, SStream *O)
 {
 	add_cs_detail(MI, PPC_OP_GROUP_BranchOperand, OpNo);
-	if (!MCOperand_isImm(MCInst_getOperand(MI, (OpNo))))
-		return printOperand(MI, OpNo, O);
+	if (!MCOperand_isImm(MCInst_getOperand(MI, (OpNo)))) {
+		printOperand(MI, OpNo, O);
+		return;
+	}
 	int32_t Imm = SignExtend32(
 		((unsigned)MCOperand_getImm(MCInst_getOperand(MI, (OpNo)))
 		 << 2),
@@ -534,8 +536,10 @@ void printBranchOperand(MCInst *MI, uint64_t Address, unsigned OpNo, SStream *O)
 void printAbsBranchOperand(MCInst *MI, unsigned OpNo, SStream *O)
 {
 	add_cs_detail(MI, PPC_OP_GROUP_AbsBranchOperand, OpNo);
-	if (!MCOperand_isImm(MCInst_getOperand(MI, (OpNo))))
-		return printOperand(MI, OpNo, O);
+	if (!MCOperand_isImm(MCInst_getOperand(MI, (OpNo)))) {
+		printOperand(MI, OpNo, O);
+		return;
+	}
 
 	printInt32(O, SignExtend32(((unsigned)MCOperand_getImm(
 					    MCInst_getOperand(MI, (OpNo)))