From 60907fc1695162585dd30d1a526693bb3def5ccc Mon Sep 17 00:00:00 2001 From: luozexuan Date: Fri, 9 Aug 2024 23:07:07 +0800 Subject: [PATCH] chore: fix some comments Signed-off-by: luozexuan --- suite/synctools/tablegen/include/llvm/IR/Constants.h | 2 +- suite/synctools/tablegen/include/llvm/Target/GenericOpcodes.td | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/suite/synctools/tablegen/include/llvm/IR/Constants.h b/suite/synctools/tablegen/include/llvm/IR/Constants.h index e23ecd8e4c..05b35ec179 100644 --- a/suite/synctools/tablegen/include/llvm/IR/Constants.h +++ b/suite/synctools/tablegen/include/llvm/IR/Constants.h @@ -108,7 +108,7 @@ class ConstantInt final : public ConstantData { static ConstantInt *get(IntegerType *Ty, uint64_t V, bool IsSigned = false); /// Return a ConstantInt with the specified value for the specified type. The - /// value V will be canonicalized to a an unsigned APInt. Accessing it with + /// value V will be canonicalized to an unsigned APInt. Accessing it with /// either getSExtValue() or getZExtValue() will yield a correctly sized and /// signed value for the type Ty. /// Get a ConstantInt for a specific signed value. diff --git a/suite/synctools/tablegen/include/llvm/Target/GenericOpcodes.td b/suite/synctools/tablegen/include/llvm/Target/GenericOpcodes.td index 2af20ab6a5..33537ca242 100644 --- a/suite/synctools/tablegen/include/llvm/Target/GenericOpcodes.td +++ b/suite/synctools/tablegen/include/llvm/Target/GenericOpcodes.td @@ -51,7 +51,7 @@ def G_SEXT : GenericInstruction { let hasSideEffects = false; } -// Sign extend the a value from an arbitrary bit position, copying the sign bit +// Sign extend the value from an arbitrary bit position, copying the sign bit // into all bits above it. This is equivalent to a shl + ashr pair with an // appropriate shift amount. $sz is an immediate (MachineOperand::isImm() // returns true) to allow targets to have some bitwidths legal and others