From c38598c248dcabb0937f08067550ddce7c3995c4 Mon Sep 17 00:00:00 2001 From: Ayaka Yorihiro <36107281+ayakayorihiro@users.noreply.github.com> Date: Mon, 19 Aug 2024 18:44:46 -0400 Subject: [PATCH] [FIRRTL] Documentation and cleanup for the FIRRTL backend (#2096) This PR contains some small follow-ons to the FIRRTL backend: - We now use [firtool](https://github.com/llvm/circt/releases/tag/firtool-1.75.0) instead of the deprecated FIRRTL compiler in fud2 (thanks @ekiwi!). Note that I changed fud2's configurations for FIRRTL. - We also use the `external-to-ref` pass instead of a `sed`-based hack for converting `@external`s to `ref`s. - I wrote some documentation on running the FIRRTL backend! Other than some relatively minor things (like playing around with firtool arguments), I'm hoping this will tie a small bow around the FIRRTL backend work until we want to pick it back again for ESSENT simulation :) --- docs/SUMMARY.md | 1 + docs/running-calyx/firrtl.md | 71 ++++ fud2/scripts/axi.rhai | 1 + fud2/scripts/firrtl.rhai | 12 +- fud2/src/lib.rs | 366 +++++++++--------- ...alyx_through_firrtl_to_verilog-refmem.snap | 8 +- .../tests__test@plan_calyx-to-firrtl.snap | 4 + .../tests__test@plan_firrtl-noverify.snap | 4 +- ...s__test@plan_firrtl-with-primitives-2.snap | 4 +- ...@plan_firrtl-with-primitives-noverify.snap | 4 +- ...sts__test@plan_firrtl-with-primitives.snap | 4 + .../snapshots/tests__test@plan_firrtl.snap | 4 +- fud2/tests/tests.rs | 2 +- 13 files changed, 284 insertions(+), 201 deletions(-) create mode 100644 docs/running-calyx/firrtl.md diff --git a/docs/SUMMARY.md b/docs/SUMMARY.md index bd19291978..55a50136b9 100644 --- a/docs/SUMMARY.md +++ b/docs/SUMMARY.md @@ -26,6 +26,7 @@ - [Scripting](./running-calyx/fud2/scripts.md) - [Interfacing with Calyx RTL](./running-calyx/interfacing.md) - [The Calyx Interpreter](./running-calyx/interpreter.md) +- [FIRRTL Backend](./running-calyx/firrtl.md) # Compiler Development Guide diff --git a/docs/running-calyx/firrtl.md b/docs/running-calyx/firrtl.md new file mode 100644 index 0000000000..d7bec54e49 --- /dev/null +++ b/docs/running-calyx/firrtl.md @@ -0,0 +1,71 @@ +# FIRRTL Backend + +Calyx programs can be translated into the [FIRRTL](https://bar.eecs.berkeley.edu/projects/firrtl.html) intermediate language. + +## Basic Use + +To translate an example program to FIRRTL, try: + + $ cargo run examples/tutorial/language-tutorial-iterate.futil -p external-to-ref -p all -b firrtl + +## Running with `fud2` + +The FIRRTL backend can also be run through fud2, which we recommend using. + +### Setup + +To run FIRRTL-translated programs, we need to set up [Firtool](https://github.com/llvm/circt) for use by fud2. We recommend using [Firtool version 1.75.0](https://github.com/llvm/circt/releases/tag/firtool-1.75.0). + +First, download and extract the Firtool binary. Then, edit `fud2`'s configuration file: + + $ fud2 edit-config + +Add these lines: + +```toml +[firrtl] +firtool = "/bin/firtool" +``` + +[fud2]: ./fud2.md + +### Obtaining FIRRTL + +> The FIRRTL backend on fud2 currently requires Calyx with the YXI feature to be built. (Refer to the above) + +The FIRRTL backend offers two options based on how Calyx primitives are handled: (1) use Calyx's existing Verilog implementations, and (2) generate FIRRTL implementations. + +To generate FIRRTL-version of the Calyx program that will use Verilog primitives, run fud2 with `--to firrtl`: +``` +fud2 examples/tutorial/language-tutorial-iterate.futil --to firrtl +``` + +To generate FIRRTL-version of the Calyx program containing FIRRTL primitives, run fud2 with `--to firrtl-with-primitives`: +``` +fud2 examples/tutorial/language-tutorial-iterate.futil --to firrtl-with-primitives +``` + +### Simulating FIRRTL-translated programs + +To simulate a FIRRTL-translated Calyx program using Verilog primitives, run fud2 with `--through firrtl`: +``` +fud2 examples/tutorial/language-tutorial-iterate.futil --to dat -s sim.data=examples/tutorial/data.json --through firrtl +``` + +To simulate a FIRRTL-translated Calyx program using FIRRTL primitives, run fud2 with `--through firrtl-with-primitives`: + +``` +fud2 examples/tutorial/language-tutorial-iterate.futil --to dat -s sim.data=examples/tutorial/data.json --through firrtl-with-primitives +``` + +Both examples will yield +``` +{ + "cycles": 76, + "memories": { + "mem": [ + 42 + ] + } +} +``` diff --git a/fud2/scripts/axi.rhai b/fud2/scripts/axi.rhai index 9505c9ffc6..2eab6522d8 100644 --- a/fud2/scripts/axi.rhai +++ b/fud2/scripts/axi.rhai @@ -2,6 +2,7 @@ import "calyx" as c; export const yxi = state("yxi", ["yxi"]); +export let yxi_setup = yxi_setup; fn yxi_setup(e) { e.config_var_or("yxi", "yxi", "$calyx-base/target/debug/yxi"); e.rule("yxi", "$yxi -l $calyx-base $in > $out"); diff --git a/fud2/scripts/firrtl.rhai b/fud2/scripts/firrtl.rhai index 8895622c7e..2cdbb31c05 100644 --- a/fud2/scripts/firrtl.rhai +++ b/fud2/scripts/firrtl.rhai @@ -1,3 +1,4 @@ +import "axi" as a; import "calyx" as c; import "testbench" as tb; @@ -93,7 +94,7 @@ let firrtl_with_primitives = state("firrtl-with-primitives", ["fir"]); // using op( // use Verilog "calyx-to-firrtl", - [c::calyx_setup, tb::custom_setup], + [c::calyx_setup, a::yxi_setup, tb::custom_setup], c::calyx_state, firrtl, |e, input, output| calyx_to_firrtl_helper(e, input, output, false), @@ -101,7 +102,7 @@ op( op( "firrtl-with-primitives", - [c::calyx_setup, firrtl_primitives_setup, tb::custom_setup], + [c::calyx_setup, firrtl_primitives_setup, a::yxi_setup, tb::custom_setup], c::calyx_state, firrtl_with_primitives, |e, input, output| calyx_to_firrtl_helper(e, input, output, true), @@ -109,8 +110,11 @@ op( // The FIRRTL compiler. fn firrtl_setup(e) { - e.config_var("firrtl-exe", "firrtl.exe"); - e.rule("firrtl", "$firrtl-exe -i $in -o $out -X sverilog"); + e.config_var("firrtl-exe", "firrtl.firtool"); + e.rule( + "firrtl", + "$firrtl-exe $in -o $out --disable-all-randomization", + ); e.rsrc("primitives-for-firrtl.sv"); // adding Verilog implementations of primitives to FIRRTL --> Verilog compiled code diff --git a/fud2/src/lib.rs b/fud2/src/lib.rs index dcef0adf96..704b9b60f3 100644 --- a/fud2/src/lib.rs +++ b/fud2/src/lib.rs @@ -187,14 +187,10 @@ pub fn build_driver(bld: &mut DriverBuilder) { Ok(()) }); - // [Needs YXI backend compiled] Setup for creating a custom testbench (needed for FIRRTL) let custom_testbench_setup = bld.setup("Custom Testbench Setup", |e| { // Convert all ref cells to @external (FIXME: YXI should work for both?) e.rule("ref-to-external", "sed 's/ref /@external /g' $in > $out")?; - // Convert all @external cells to ref (FIXME: we want to deprecate @external) - e.rule("external-to-ref", "sed 's/@external([0-9]*)/ref/g' $in | sed 's/@external/ref/g' > $out")?; - e.var( "gen-testbench-script", "$calyx-base/tools/firrtl/generate-testbench.py", @@ -256,188 +252,6 @@ pub fn build_driver(bld: &mut DriverBuilder) { }, ); - // setup for FIRRTL-implemented primitives - let firrtl_primitives_setup = bld.setup("FIRRTL with primitives", |e| { - // Produce FIRRTL with FIRRTL-defined primitives. - e.var( - "gen-firrtl-primitives-script", - "$calyx-base/tools/firrtl/generate-firrtl-with-primitives.py", - )?; - e.rule( - "generate-firrtl-with-primitives", - "python3 $gen-firrtl-primitives-script $in > $out", - )?; - - Ok(()) - }); - - fn calyx_to_firrtl_helper( - e: &mut StreamEmitter, - input: &str, - output: &str, - firrtl_primitives: bool, // Use FIRRTL primitive implementations? - ) -> EmitResult { - // Temporary Calyx where all refs are converted into external (FIXME: fix YXI to emit for ref as well?) - let only_externals_calyx = "external.futil"; - // Temporary Calyx where all externals are converted into refs (for FIRRTL backend) - let only_refs_calyx = "ref.futil"; - // JSON with memory information created by YXI - let memories_json = "memory-info.json"; - // Custom testbench (same name as standalone testbench) - let testbench = "tb.sv"; - // Holds contents of file we want to output. Gets cat-ed via final dummy command - let tmp_out = "tmp-out.fir"; - // Convert ref into external to get YXI working (FIXME: fix YXI to emit for ref as well?) - e.build_cmd(&[only_externals_calyx], "ref-to-external", &[input], &[])?; - // Convert external to ref to get FIRRTL backend working - e.build_cmd(&[only_refs_calyx], "external-to-ref", &[input], &[])?; - - // Get YXI to generate JSON for testbench generation - e.build_cmd(&[memories_json], "yxi", &[only_externals_calyx], &[])?; - // generate custom testbench - e.build_cmd( - &[testbench], - "generate-refmem-testbench", - &[memories_json], - &[], - )?; - - if firrtl_primitives { - let core_program_firrtl = "core.fir"; - - // Obtain FIRRTL of core program - e.build_cmd( - &[core_program_firrtl], - "calyx", - &[only_refs_calyx], - &[], - )?; - e.arg("backend", "firrtl")?; - e.arg("args", "--synthesis")?; - - // Obtain primitive uses JSON for metaprogramming - let primitive_uses_json = "primitive-uses.json"; - e.build_cmd( - &[primitive_uses_json], - "calyx", - &[only_refs_calyx], - &[], - )?; - e.arg("backend", "primitive-uses")?; - e.arg("args", "--synthesis")?; - - // run metaprogramming script to get FIRRTL with primitives - e.build_cmd( - &[tmp_out], - "generate-firrtl-with-primitives", - &[core_program_firrtl, primitive_uses_json], - &[], - )?; - } else { - // emit extmodule declarations to use Verilog primitive implementations - e.build_cmd(&[tmp_out], "calyx", &[only_refs_calyx], &[])?; - e.arg("backend", "firrtl")?; - e.arg("args", "--emit-primitive-extmodules")?; - } - - // dummy command to make sure custom testbench is created but not emitted as final answer - e.build_cmd(&[output], "dummy", &[tmp_out, testbench], &[])?; - - Ok(()) - } - - // Calyx to FIRRTL. - let firrtl = bld.state("firrtl", &["fir"]); // using Verilog primitives - let firrtl_with_primitives = bld.state("firrtl-with-primitives", &["fir"]); // using FIRRTL primitives - bld.op( - // use Verilog - "calyx-to-firrtl", - &[calyx_setup, custom_testbench_setup], - calyx, - firrtl, - |e, input, output| { - calyx_to_firrtl_helper(e, input[0], output[0], false) - }, - ); - - bld.op( - "firrtl-with-primitives", - &[calyx_setup, firrtl_primitives_setup, custom_testbench_setup], - calyx, - firrtl_with_primitives, - |e, input, output| calyx_to_firrtl_helper(e, input[0], output[0], true), - ); - - // The FIRRTL compiler. - let firrtl_setup = bld.setup("Firrtl to Verilog compiler", |e| { - e.config_var("firrtl-exe", "firrtl.exe")?; - e.rule("firrtl", "$firrtl-exe -i $in -o $out -X sverilog")?; - - e.rsrc("primitives-for-firrtl.sv")?; - // adding Verilog implementations of primitives to FIRRTL --> Verilog compiled code - e.rule( - "add-verilog-primitives", - "cat primitives-for-firrtl.sv $in > $out", - )?; - - Ok(()) - }); - - fn firrtl_compile_helper( - e: &mut StreamEmitter, - input: &str, - output: &str, - firrtl_primitives: bool, - ) -> EmitResult { - if firrtl_primitives { - e.build_cmd(&[output], "firrtl", &[input], &[])?; - } else { - let tmp_verilog = "partial.sv"; - e.build_cmd(&[tmp_verilog], "firrtl", &[input], &[])?; - e.build_cmd( - &[output], - "add-verilog-primitives", - &[tmp_verilog], - &["primitives-for-firrtl.sv"], - )?; - } - Ok(()) - } - // FIRRTL --> Verilog compilation using Verilog primitive implementations for Verilator - bld.op( - "firrtl", - &[firrtl_setup], - firrtl, - verilog_refmem, - |e, input, output| firrtl_compile_helper(e, input[0], output[0], false), - ); - // FIRRTL --> Verilog compilation using Verilog primitive implementations for Icarus - // This is a bit of a hack, but the Icarus-friendly "noverify" state is identical for this path - // (since FIRRTL compilation doesn't come with verification). - bld.op( - "firrtl-noverify", - &[firrtl_setup], - firrtl, - verilog_refmem_noverify, - |e, input, output| firrtl_compile_helper(e, input[0], output[0], false), - ); - // FIRRTL --> Verilog compilation using FIRRTL primitive implementations for Verilator - bld.op( - "firrtl-with-primitives", - &[firrtl_setup], - firrtl_with_primitives, - verilog_refmem, - |e, input, output| firrtl_compile_helper(e, input[0], output[0], true), - ); - // FIRRTL --> Verilog compilation using FIRRTL primitive implementations for Icarus - bld.op( - "firrtl-with-primitives-noverify", - &[firrtl_setup], - firrtl_with_primitives, - verilog_refmem_noverify, - |e, input, output| firrtl_compile_helper(e, input[0], output[0], true), - ); - // primitive-uses backend let primitive_uses_json = bld.state("primitive-uses-json", &["json"]); bld.op( @@ -906,4 +720,184 @@ e.var("cocotb-args", if waves {"WAVES=1"} else {""})?; Ok(()) }, ); + + // setup for FIRRTL-implemented primitives + let firrtl_primitives_setup = bld.setup("FIRRTL with primitives", |e| { + // Produce FIRRTL with FIRRTL-defined primitives. + e.var( + "gen-firrtl-primitives-script", + "$calyx-base/tools/firrtl/generate-firrtl-with-primitives.py", + )?; + e.rule( + "generate-firrtl-with-primitives", + "python3 $gen-firrtl-primitives-script $in > $out", + )?; + + Ok(()) + }); + + fn calyx_to_firrtl_helper( + e: &mut StreamEmitter, + input: &str, + output: &str, + firrtl_primitives: bool, // Use FIRRTL primitive implementations? + ) -> EmitResult { + // Temporary Calyx where all refs are converted into external (FIXME: fix YXI to emit for ref as well?) + let only_externals_calyx = "external.futil"; + // JSON with memory information created by YXI + let memories_json = "memory-info.json"; + // Custom testbench (same name as standalone testbench) + let testbench = "tb.sv"; + // Holds contents of file we want to output. Gets cat-ed via final dummy command + let tmp_out = "tmp-out.fir"; + // Convert ref into external to get YXI working (FIXME: fix YXI to emit for ref as well?) + e.build_cmd(&[only_externals_calyx], "ref-to-external", &[input], &[])?; + + // Get YXI to generate JSON for testbench generation + e.build_cmd(&[memories_json], "yxi", &[only_externals_calyx], &[])?; + // generate custom testbench + e.build_cmd( + &[testbench], + "generate-refmem-testbench", + &[memories_json], + &[], + )?; + + if firrtl_primitives { + let core_program_firrtl = "core.fir"; + + // Obtain FIRRTL of core program + e.build_cmd(&[core_program_firrtl], "calyx", &[input], &[])?; + e.arg("backend", "firrtl")?; + e.arg("args", "-p external-to-ref -p all --synthesis")?; + + // Obtain primitive uses JSON for metaprogramming + let primitive_uses_json = "primitive-uses.json"; + e.build_cmd(&[primitive_uses_json], "calyx", &[input], &[])?; + e.arg("backend", "primitive-uses")?; + e.arg("args", "-p external-to-ref -p all --synthesis")?; + + // run metaprogramming script to get FIRRTL with primitives + e.build_cmd( + &[tmp_out], + "generate-firrtl-with-primitives", + &[core_program_firrtl, primitive_uses_json], + &[], + )?; + } else { + // emit extmodule declarations to use Verilog primitive implementations + e.build_cmd(&[tmp_out], "calyx", &[input], &[])?; + e.arg("backend", "firrtl")?; + e.arg( + "args", + "-p external-to-ref -p all --emit-primitive-extmodules", + )?; + } + + // dummy command to make sure custom testbench is created but not emitted as final answer + e.build_cmd(&[output], "dummy", &[tmp_out, testbench], &[])?; + + Ok(()) + } + + // Calyx to FIRRTL. + let firrtl = bld.state("firrtl", &["fir"]); // using Verilog primitives + let firrtl_with_primitives = bld.state("firrtl-with-primitives", &["fir"]); // using FIRRTL primitives + bld.op( + // use Verilog + "calyx-to-firrtl", + &[calyx_setup, custom_testbench_setup, yxi_setup], + calyx, + firrtl, + |e, input, output| { + calyx_to_firrtl_helper(e, input[0], output[0], false) + }, + ); + + bld.op( + "firrtl-with-primitives", + &[ + calyx_setup, + yxi_setup, + firrtl_primitives_setup, + custom_testbench_setup, + ], + calyx, + firrtl_with_primitives, + |e, input, output| calyx_to_firrtl_helper(e, input[0], output[0], true), + ); + + // The FIRRTL compiler. + let firrtl_setup = bld.setup("Firrtl to Verilog compiler", |e| { + // NOTE: Recommend CIRCT firtool version 1.75.0 + e.config_var("firrtl-exe", "firrtl.firtool")?; + e.rule( + "firrtl", + "$firrtl-exe $in -o $out --disable-all-randomization", + )?; + + e.rsrc("primitives-for-firrtl.sv")?; + // adding Verilog implementations of primitives to FIRRTL --> Verilog compiled code + e.rule( + "add-verilog-primitives", + "cat primitives-for-firrtl.sv $in > $out", + )?; + + Ok(()) + }); + + fn firrtl_compile_helper( + e: &mut StreamEmitter, + input: &str, + output: &str, + firrtl_primitives: bool, + ) -> EmitResult { + if firrtl_primitives { + e.build_cmd(&[output], "firrtl", &[input], &[])?; + } else { + let tmp_verilog = "partial.sv"; + e.build_cmd(&[tmp_verilog], "firrtl", &[input], &[])?; + e.build_cmd( + &[output], + "add-verilog-primitives", + &[tmp_verilog], + &["primitives-for-firrtl.sv"], + )?; + } + Ok(()) + } + // FIRRTL --> Verilog compilation using Verilog primitive implementations for Verilator + bld.op( + "firrtl", + &[firrtl_setup], + firrtl, + verilog_refmem, + |e, input, output| firrtl_compile_helper(e, input[0], output[0], false), + ); + // FIRRTL --> Verilog compilation using Verilog primitive implementations for Icarus + // This is a bit of a hack, but the Icarus-friendly "noverify" state is identical for this path + // (since FIRRTL compilation doesn't come with verification). + bld.op( + "firrtl-noverify", + &[firrtl_setup], + firrtl, + verilog_refmem_noverify, + |e, input, output| firrtl_compile_helper(e, input[0], output[0], false), + ); + // FIRRTL --> Verilog compilation using FIRRTL primitive implementations for Verilator + bld.op( + "firrtl-with-primitives", + &[firrtl_setup], + firrtl_with_primitives, + verilog_refmem, + |e, input, output| firrtl_compile_helper(e, input[0], output[0], true), + ); + // FIRRTL --> Verilog compilation using FIRRTL primitive implementations for Icarus + bld.op( + "firrtl-with-primitives-noverify", + &[firrtl_setup], + firrtl_with_primitives, + verilog_refmem_noverify, + |e, input, output| firrtl_compile_helper(e, input[0], output[0], true), + ); } diff --git a/fud2/tests/snapshots/tests__test@calyx_through_firrtl_to_verilog-refmem.snap b/fud2/tests/snapshots/tests__test@calyx_through_firrtl_to_verilog-refmem.snap index 5b22cb0ebf..3ff1ae5137 100644 --- a/fud2/tests/snapshots/tests__test@calyx_through_firrtl_to_verilog-refmem.snap +++ b/fud2/tests/snapshots/tests__test@calyx_through_firrtl_to_verilog-refmem.snap @@ -17,6 +17,10 @@ flags = -p none rule calyx-with-flags command = $calyx-exe -l $calyx-base $flags $args $in > $out +yxi = $calyx-base/target/debug/yxi +rule yxi + command = $yxi -l $calyx-base $in > $out + rule ref-to-external command = sed 's/ref /@external /g' $in > $out rule external-to-ref @@ -28,9 +32,9 @@ rule generate-refmem-testbench rule dummy command = sh -c 'cat $$0' $in > $out -firrtl-exe = /test/bin/firrtl +firrtl-exe = /test/bin/firtool rule firrtl - command = $firrtl-exe -i $in -o $out -X sverilog + command = $firrtl-exe $in -o $out --disable-all-randomization build primitives-for-firrtl.sv: get-rsrc rule add-verilog-primitives command = cat primitives-for-firrtl.sv $in > $out diff --git a/fud2/tests/snapshots/tests__test@plan_calyx-to-firrtl.snap b/fud2/tests/snapshots/tests__test@plan_calyx-to-firrtl.snap index 72960c1404..4f01a5d194 100644 --- a/fud2/tests/snapshots/tests__test@plan_calyx-to-firrtl.snap +++ b/fud2/tests/snapshots/tests__test@plan_calyx-to-firrtl.snap @@ -17,6 +17,10 @@ flags = -p none rule calyx-with-flags command = $calyx-exe -l $calyx-base $flags $args $in > $out +yxi = $calyx-base/target/debug/yxi +rule yxi + command = $yxi -l $calyx-base $in > $out + rule ref-to-external command = sed 's/ref /@external /g' $in > $out rule external-to-ref diff --git a/fud2/tests/snapshots/tests__test@plan_firrtl-noverify.snap b/fud2/tests/snapshots/tests__test@plan_firrtl-noverify.snap index 63333b0431..1c4bf08d95 100644 --- a/fud2/tests/snapshots/tests__test@plan_firrtl-noverify.snap +++ b/fud2/tests/snapshots/tests__test@plan_firrtl-noverify.snap @@ -6,9 +6,9 @@ build-tool = fud2 rule get-rsrc command = $build-tool get-rsrc $out -firrtl-exe = /test/bin/firrtl +firrtl-exe = /test/bin/firtool rule firrtl - command = $firrtl-exe -i $in -o $out -X sverilog + command = $firrtl-exe $in -o $out --disable-all-randomization build primitives-for-firrtl.sv: get-rsrc rule add-verilog-primitives command = cat primitives-for-firrtl.sv $in > $out diff --git a/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-2.snap b/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-2.snap index ad304ba392..e723de63a0 100644 --- a/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-2.snap +++ b/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-2.snap @@ -6,9 +6,9 @@ build-tool = fud2 rule get-rsrc command = $build-tool get-rsrc $out -firrtl-exe = /test/bin/firrtl +firrtl-exe = /test/bin/firtool rule firrtl - command = $firrtl-exe -i $in -o $out -X sverilog + command = $firrtl-exe $in -o $out --disable-all-randomization build primitives-for-firrtl.sv: get-rsrc rule add-verilog-primitives command = cat primitives-for-firrtl.sv $in > $out diff --git a/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-noverify.snap b/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-noverify.snap index 22171f9429..6a2fd7672c 100644 --- a/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-noverify.snap +++ b/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives-noverify.snap @@ -6,9 +6,9 @@ build-tool = fud2 rule get-rsrc command = $build-tool get-rsrc $out -firrtl-exe = /test/bin/firrtl +firrtl-exe = /test/bin/firtool rule firrtl - command = $firrtl-exe -i $in -o $out -X sverilog + command = $firrtl-exe $in -o $out --disable-all-randomization build primitives-for-firrtl.sv: get-rsrc rule add-verilog-primitives command = cat primitives-for-firrtl.sv $in > $out diff --git a/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives.snap b/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives.snap index 8070441b5e..344ae279b1 100644 --- a/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives.snap +++ b/fud2/tests/snapshots/tests__test@plan_firrtl-with-primitives.snap @@ -21,6 +21,10 @@ gen-firrtl-primitives-script = $calyx-base/tools/firrtl/generate-firrtl-with-pri rule generate-firrtl-with-primitives command = python3 $gen-firrtl-primitives-script $in > $out +yxi = $calyx-base/target/debug/yxi +rule yxi + command = $yxi -l $calyx-base $in > $out + rule ref-to-external command = sed 's/ref /@external /g' $in > $out rule external-to-ref diff --git a/fud2/tests/snapshots/tests__test@plan_firrtl.snap b/fud2/tests/snapshots/tests__test@plan_firrtl.snap index da2114436a..66ae53504c 100644 --- a/fud2/tests/snapshots/tests__test@plan_firrtl.snap +++ b/fud2/tests/snapshots/tests__test@plan_firrtl.snap @@ -6,9 +6,9 @@ build-tool = fud2 rule get-rsrc command = $build-tool get-rsrc $out -firrtl-exe = /test/bin/firrtl +firrtl-exe = /test/bin/firtool rule firrtl - command = $firrtl-exe -i $in -o $out -X sverilog + command = $firrtl-exe $in -o $out --disable-all-randomization build primitives-for-firrtl.sv: get-rsrc rule add-verilog-primitives command = cat primitives-for-firrtl.sv $in > $out diff --git a/fud2/tests/tests.rs b/fud2/tests/tests.rs index a163dc4b9f..3c4f32545e 100644 --- a/fud2/tests/tests.rs +++ b/fud2/tests/tests.rs @@ -93,7 +93,7 @@ impl InstaTest for Plan { let config = default_config() .merge(("exe", "fud2")) .merge(("calyx.base", "/test/calyx")) - .merge(("firrtl.exe", "/test/bin/firrtl")) + .merge(("firrtl.firtool", "/test/bin/firtool")) .merge(("sim.data", "/test/data.json")) .merge(("xilinx.vivado", "/test/xilinx/vivado")) .merge(("xilinx.vitis", "/test/xilinx/vitis"))