From 8d6042eb67568d692904c9d699bd31fe68341db6 Mon Sep 17 00:00:00 2001 From: dragonmux Date: Thu, 13 Jul 2023 09:18:47 +0100 Subject: [PATCH] msp432e4: Cleaned up the Flash region registration logic with some extra comments and simplification --- src/target/msp432e4.c | 31 +++++++++++++++++++------------ 1 file changed, 19 insertions(+), 12 deletions(-) diff --git a/src/target/msp432e4.c b/src/target/msp432e4.c index a6b298c3b06..ad4cc127507 100644 --- a/src/target/msp432e4.c +++ b/src/target/msp432e4.c @@ -175,7 +175,8 @@ static bool msp432e4_flash_erase(target_flash_s *flash, target_addr_t addr, size static bool msp432e4_flash_write(target_flash_s *flash, target_addr_t dest, const void *src, size_t len); static bool msp432e4_mass_erase(target_s *const target); -static void msp432e4_add_flash(target_s *const target, const uint32_t sector, const uint32_t base, const size_t length) +static void msp432e4_add_flash( + target_s *const target, const uint32_t sector_size, const uint32_t base, const size_t length) { msp432e4_flash_s *const flash = calloc(1, sizeof(*flash)); if (flash == NULL) { @@ -186,7 +187,7 @@ static void msp432e4_add_flash(target_s *const target, const uint32_t sector, co target_flash_s *target_flash = &flash->target_flash; target_flash->start = base; target_flash->length = length; - target_flash->blocksize = sector; + target_flash->blocksize = sector_size; target_flash->erase = msp432e4_flash_erase; target_flash->write = msp432e4_flash_write; target_flash->writesize = BUFFERED_WRITE_SIZE; @@ -214,22 +215,28 @@ bool msp432e4_probe(target_s *const target) DEBUG_INFO("%s: ver %x:%x part %x pin %x temp %x package %x\n", __func__, (devid0 >> 8) & 0xff, (devid0 >> 0) & 0xff, (devid1 >> 16) & 0xff, (devid1 >> 13) & 0x7, (devid1 >> 5) & 0x7, (devid1 >> 3) & 0x3); + target->driver = "MSP432E4"; + target->mass_erase = msp432e4_mass_erase; + /* SRAM is banked but interleaved into one logical bank */ const uint32_t sram_size = ((target_mem_read32(target, MSP432E4_FLASH_SRAM_SIZE) & 0xffffU) + 1U) * 256U; + target_add_ram(target, MSP432E4_SRAM_BASE, sram_size); /* Flash is in four banks but two-way interleaved */ const uint32_t flash_props = target_mem_read32(target, MSP432E4_FLASH_PERIPH_PROP); const uint32_t flash_size = ((flash_props & 0xffffU) + 1U) * 2048U; - const uint32_t flash_sector = (1U << ((flash_props >> 16U) & 0x07U)) * 1024U; - - target->driver = "MSP432E4"; - target->mass_erase = msp432e4_mass_erase; - - target_add_ram(target, MSP432E4_SRAM_BASE, sram_size); - - /* the flash is physically 4x but is 2x banked and 2x interleaved. */ - msp432e4_add_flash(target, flash_sector, MSP432E4_FLASH_BASE, flash_size / 2U); - msp432e4_add_flash(target, flash_sector, MSP432E4_FLASH_BASE + flash_size / 2U, flash_size / 2U); + /* + * Convert the Flash sector size from a value between 1 (2kiB) and 4 (16kiB) to a value of + * 2, 4, 8 or 16. Then multiply by a kibibyte to land on the final size. + */ + const uint32_t flash_sector_size = (1U << ((flash_props >> 16U) & 7U)) * 1024U; + + /* + * While the Flash is in a banked 2x2 arrangement, this doesn't matter in practical terms + * because the controller hides this for us behind a cohearent interface. + * Register just the one big linear region. + */ + msp432e4_add_flash(target, flash_sector_size, MSP432E4_FLASH_BASE, flash_size); /* All done */ return true;