From a0a2ec89266dc63d15f8d5f52987928e693a31da Mon Sep 17 00:00:00 2001 From: Stefan Rueger Date: Sat, 31 Aug 2024 10:44:30 +0100 Subject: [PATCH 1/2] Add AVR128DAxxS parts --- src/avrdude.conf.in | 54 ++++++++- src/avrintel.c | 243 ++++++++++++++++++++++++++++---------- src/libavrdude-avrintel.h | 58 ++++++--- 3 files changed, 277 insertions(+), 78 deletions(-) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 4dfbf8e49..6a15533ab 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -21275,7 +21275,7 @@ part parent ".avrdx" # 32da48 "AVR32DA48T-I/PT: TQFP48, Fmax=24 MHz, T=[-40 C, 85 C], Vcc=[1.8 V, 5.5 V]"; family_id = " AVR"; mcuid = 346; - n_interrupts = 58; + n_interrupts = 61; signature = 0x1e 0x95 0x32; memory "eeprom" @@ -21710,6 +21710,58 @@ part parent ".avrdx" # 128da64 ; ; +#------------------------------------------------------------ +# AVR128DA28S +#------------------------------------------------------------ + +part parent "128da28" # 128da28s + desc = "AVR128DA28S"; + id = "128da28s"; + variants = + "AVR128DA28S-SPDIP: SOIC28, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; + mcuid = 394; + signature = 0x1e 0x97 0x12; +; + +#------------------------------------------------------------ +# AVR128DA32S +#------------------------------------------------------------ + +part parent "128da32" # 128da32s + desc = "AVR128DA32S"; + id = "128da32s"; + variants = + "AVR128DA32S-VQFN/TQFP: QFN32, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; + mcuid = 395; + signature = 0x1e 0x97 0x11; +; + +#------------------------------------------------------------ +# AVR128DA48S +#------------------------------------------------------------ + +part parent "128da48" # 128da48s + desc = "AVR128DA48S"; + id = "128da48s"; + variants = + "AVR128DA48S-VQFN/TQFP: QFN48, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; + mcuid = 396; + signature = 0x1e 0x97 0x10; +; + +#------------------------------------------------------------ +# AVR128DA64S +#------------------------------------------------------------ + +part parent "128da64" # 128da64s + desc = "AVR128DA64S"; + id = "128da64s"; + variants = + "AVR128DA64S-VQFN/TQFP: QFN64, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; + mcuid = 397; + signature = 0x1e 0x97 0x0f; +; + #------------------------------------------------------------ # AVR32DB28 #------------------------------------------------------------ diff --git a/src/avrintel.c b/src/avrintel.c index 5874dd61f..dbae4dd09 100644 --- a/src/avrintel.c +++ b/src/avrintel.c @@ -8,8 +8,8 @@ * Published under GNU General Public License, version 3 (GPL-3.0) * Meta-author Stefan Rueger * - * v 1.39 - * 15.08.2024 + * v 1.40 + * 31.08.2024 * */ @@ -2271,7 +2271,7 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR32DA28 atdf, avrdude // Sources {"AVR32DA28", 338, F_AVR8X, {0x1E, 0x95, 0x34}, // ID /*AVR32DA28*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem - /*AVR32DA28*/ 16, 4, 41, vtab_avr128da28, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR32DA28*/ 16, 4, 41, vtab_avr128da28s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR32DA28*/ 432, rgftab_avr32da28}, // Register file //AVR32DB28 atdf, avrdude // Sources @@ -2301,7 +2301,7 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR32DA32 atdf, avrdude // Sources {"AVR32DA32", 342, F_AVR8X, {0x1E, 0x95, 0x33}, // ID /*AVR32DA32*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem - /*AVR32DA32*/ 16, 4, 44, vtab_avr128da32, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR32DA32*/ 16, 4, 44, vtab_avr128da32s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR32DA32*/ 447, rgftab_avr32da32}, // Register file //AVR32DB32 atdf, avrdude // Sources @@ -2331,8 +2331,8 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR32DA48 atdf, avrdude // Sources {"AVR32DA48", 346, F_AVR8X, {0x1E, 0x95, 0x32}, // ID /*AVR32DA48*/ 0, 0x08000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x7000, 0x1000, // Mem - /*AVR32DA48*/ 16, 4, 58, vtab_avr128da48, 15, cfgtab_avr32da28, // ISRs, Config - /*AVR32DA48*/ 600, rgftab_avr32da48}, // Register file + /*AVR32DA48*/ 16, 4, 61, vtab_avr32da48, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR32DA48*/ 610, rgftab_avr32da48}, // Register file //AVR32DB48 atdf, avrdude // Sources {"AVR32DB48", 347, F_AVR8X, {0x1E, 0x95, 0x35}, // ID @@ -2361,7 +2361,7 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR64DA28 atdf, avrdude // Sources {"AVR64DA28", 351, F_AVR8X, {0x1E, 0x96, 0x15}, // ID /*AVR64DA28*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem - /*AVR64DA28*/ 16, 4, 41, vtab_avr128da28, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR64DA28*/ 16, 4, 41, vtab_avr128da28s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA28*/ 433, rgftab_avr64da28}, // Register file //AVR64DB28 atdf, avrdude // Sources @@ -2391,7 +2391,7 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR64DA32 atdf, avrdude // Sources {"AVR64DA32", 355, F_AVR8X, {0x1E, 0x96, 0x14}, // ID /*AVR64DA32*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem - /*AVR64DA32*/ 16, 4, 44, vtab_avr128da32, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR64DA32*/ 16, 4, 44, vtab_avr128da32s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA32*/ 448, rgftab_avr64da32}, // Register file //AVR64DB32 atdf, avrdude // Sources @@ -2421,7 +2421,7 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR64DA48 atdf, avrdude // Sources {"AVR64DA48", 359, F_AVR8X, {0x1E, 0x96, 0x13}, // ID /*AVR64DA48*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem - /*AVR64DA48*/ 16, 4, 58, vtab_avr128da48, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR64DA48*/ 16, 4, 58, vtab_avr128da48s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA48*/ 601, rgftab_avr64da48}, // Register file //AVR64DB48 atdf, avrdude // Sources @@ -2439,7 +2439,7 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR64DA64 atdf, avrdude // Sources {"AVR64DA64", 362, F_AVR8X, {0x1E, 0x96, 0x12}, // ID /*AVR64DA64*/ 0, 0x10000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x6000, 0x2000, // Mem - /*AVR64DA64*/ 16, 4, 64, vtab_avr128da64, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR64DA64*/ 16, 4, 64, vtab_avr128da64s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR64DA64*/ 659, rgftab_avr64da64}, // Register file //AVR64DB64 atdf, avrdude // Sources @@ -2451,9 +2451,15 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR128DA28 atdf, avrdude // Sources {"AVR128DA28", 364, F_AVR8X, {0x1E, 0x97, 0x0A}, // ID /*AVR128DA28*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem - /*AVR128DA28*/ 16, 4, 41, vtab_avr128da28, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR128DA28*/ 16, 4, 41, vtab_avr128da28s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA28*/ 433, rgftab_avr64da28}, // Register file + //AVR128DA28S atdf // Sources + {"AVR128DA28S", 394, F_AVR8X, {0x1E, 0x97, 0x12}, // ID + /*AVR128DA28S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem + /*AVR128DA28S*/ 16, 4, 41, vtab_avr128da28s, 17, cfgtab_avr128da28s, // ISRs, Config + /*AVR128DA28S*/ 433, rgftab_avr64da28}, // Register file + //AVR128DB28 atdf, avrdude // Sources {"AVR128DB28", 365, F_AVR8X, {0x1E, 0x97, 0x0E}, // ID /*AVR128DB28*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem @@ -2463,9 +2469,15 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR128DA32 atdf, avrdude // Sources {"AVR128DA32", 366, F_AVR8X, {0x1E, 0x97, 0x09}, // ID /*AVR128DA32*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem - /*AVR128DA32*/ 16, 4, 44, vtab_avr128da32, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR128DA32*/ 16, 4, 44, vtab_avr128da32s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA32*/ 448, rgftab_avr64da32}, // Register file + //AVR128DA32S atdf // Sources + {"AVR128DA32S", 395, F_AVR8X, {0x1E, 0x97, 0x11}, // ID + /*AVR128DA32S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem + /*AVR128DA32S*/ 16, 4, 44, vtab_avr128da32s, 17, cfgtab_avr128da28s, // ISRs, Config + /*AVR128DA32S*/ 448, rgftab_avr64da32}, // Register file + //AVR128DB32 atdf, avrdude // Sources {"AVR128DB32", 367, F_AVR8X, {0x1E, 0x97, 0x0D}, // ID /*AVR128DB32*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem @@ -2475,9 +2487,15 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR128DA48 atdf, avrdude // Sources {"AVR128DA48", 368, F_AVR8X, {0x1E, 0x97, 0x08}, // ID /*AVR128DA48*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem - /*AVR128DA48*/ 16, 4, 58, vtab_avr128da48, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR128DA48*/ 16, 4, 58, vtab_avr128da48s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA48*/ 601, rgftab_avr64da48}, // Register file + //AVR128DA48S atdf // Sources + {"AVR128DA48S", 396, F_AVR8X, {0x1E, 0x97, 0x10}, // ID + /*AVR128DA48S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem + /*AVR128DA48S*/ 16, 4, 58, vtab_avr128da48s, 17, cfgtab_avr128da28s, // ISRs, Config + /*AVR128DA48S*/ 601, rgftab_avr64da48}, // Register file + //AVR128DB48 atdf, avrdude // Sources {"AVR128DB48", 369, F_AVR8X, {0x1E, 0x97, 0x0C}, // ID /*AVR128DB48*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem @@ -2487,9 +2505,15 @@ const Avrintel uP_table[] = { // Value of -1 typically means unknown //AVR128DA64 atdf, avrdude // Sources {"AVR128DA64", 370, F_AVR8X, {0x1E, 0x97, 0x07}, // ID /*AVR128DA64*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem - /*AVR128DA64*/ 16, 4, 64, vtab_avr128da64, 15, cfgtab_avr32da28, // ISRs, Config + /*AVR128DA64*/ 16, 4, 64, vtab_avr128da64s, 15, cfgtab_avr32da28, // ISRs, Config /*AVR128DA64*/ 659, rgftab_avr64da64}, // Register file + //AVR128DA64S atdf // Sources + {"AVR128DA64S", 397, F_AVR8X, {0x1E, 0x97, 0x0F}, // ID + /*AVR128DA64S*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem + /*AVR128DA64S*/ 16, 4, 64, vtab_avr128da64s, 17, cfgtab_avr128da28s, // ISRs, Config + /*AVR128DA64S*/ 659, rgftab_avr64da64}, // Register file + //AVR128DB64 atdf, avrdude // Sources {"AVR128DB64", 371, F_AVR8X, {0x1E, 0x97, 0x0B}, // ID /*AVR128DB64*/ 0, 0x20000, 0x200, 1, 0x0200, 0x01400, 0x0200, 1, 0x4000, 0x4000, // Mem @@ -7235,6 +7259,71 @@ const char * const vtab_avr16eb32[vts_avr16eb32] = { "NVMCTRL_EEREADY/NVMCTRL_FLREADY/NVMCTRL_NVMREADY", // 30: NVM EEPROM Ready/NVM Flash Ready/NVM Ready }; +// AVR32DA48 +const char * const vtab_avr32da48[vts_avr32da48] = { + "RESET", // 0: Reset (various reasons) + "CRCSCAN_NMI", // 1: CRCSCAN Non-maskable Interrupt + "BOD_VLM", // 2: Brown-out Detector Voltage Level Monitor + "RTC_CNT", // 3: RTC Counter Interrupt + "RTC_PIT", // 4: RTC Periodic Interrupt Timer + "CCL_CCL", // 5: Configurable Custom Logic + "PORTA_PORT", // 6: Interrupt PORT A + "TCA0_LUNF/TCA0_OVF", // 7: TC A0 Low Underflow/TC A0 Overflow + "TCA0_HUNF", // 8: TC A0 High Underflow + "TCA0_CMP0/TCA0_LCMP0", // 9: TC A0 Compare 0/TC A0 Low Compare 0 + "TCA0_CMP1/TCA0_LCMP1", // 10: TC A0 Compare 1/TC A0 Low Compare 1 + "TCA0_CMP2/TCA0_LCMP2", // 11: TC A0 Compare 2/TC A0 Low Compare 2 + "TCB0_INT", // 12: TC B0 Interrupt + "TCB1_INT", // 13: TC B1 Interrupt + "TCD0_OVF", // 14: TC D0 Overflow + "TCD0_TRIG", // 15: TC D0 Trigger + "TWI0_TWIP", // 16: 2-Wire Interface 0 Peripheral + "TWI0_TWIM", // 17: 2-Wire Interface 0 Controller + "SPI0_INT", // 18: SPI 0 Interrupt + "USART0_RXC", // 19: USART 0 Receive Complete + "USART0_DRE", // 20: USART 0 Data Register Empty + "USART0_TXC", // 21: USART 0 Transmit Complete + "PORTD_PORT", // 22: Interrupt PORT D + "AC0_AC", // 23: AC0 AC Interrupt + "ADC0_RESRDY", // 24: ADC 0 Result Ready + "ADC0_WCMP", // 25: ADC 0 Window Comparator + "ZCD0_ZCD", // 26: Zero Cross Detect 0 + "PTC_PTC", // 27: PTC Interrupt + "AC1_AC", // 28: AC1 AC Interrupt + "PORTC_PORT", // 29: Interrupt PORT C + "TCB2_INT", // 30: TC B2 Interrupt + "USART1_RXC", // 31: USART 1 Receive Complete + "USART1_DRE", // 32: USART 1 Data Register Empty + "USART1_TXC", // 33: USART 1 Transmit Complete + "PORTF_PORT", // 34: Interrupt PORT F + "NVMCTRL_EE", // 35: NVM EEPROM + "SPI1_INT", // 36: SPI 1 Interrupt + "USART2_RXC", // 37: USART 2 Receive Complete + "USART2_DRE", // 38: USART 2 Data Register Empty + "USART2_TXC", // 39: USART 2 Transmit Complete + "AC2_AC", // 40: AC2 AC Interrupt + "TCB3_INT", // 41: TC B3 Interrupt + "TWI1_TWIP", // 42: 2-Wire Interface 1 Peripheral + "TWI1_TWIM", // 43: 2-Wire Interface 1 Controller + "PORTB_PORT", // 44: Interrupt PORT B + "PORTE_PORT", // 45: Interrupt PORT E + "TCA1_LUNF/TCA1_OVF", // 46: TC A1 Low Underflow/TC A1 Overflow + "TCA1_HUNF", // 47: TC A1 High Underflow + "TCA1_CMP0/TCA1_LCMP0", // 48: TC A1 Compare 0/TC A1 Low Compare 0 + "TCA1_CMP1/TCA1_LCMP1", // 49: TC A1 Compare 1/TC A1 Low Compare 1 + "TCA1_CMP2/TCA1_LCMP2", // 50: TC A1 Compare 2/TC A1 Low Compare 2 + "ZCD1_ZCD", // 51: Zero Cross Detect 1 + "USART3_RXC", // 52: USART 3 Receive Complete + "USART3_DRE", // 53: USART 3 Data Register Empty + "USART3_TXC", // 54: USART 3 Transmit Complete + "USART4_RXC", // 55: USART 4 Receive Complete + "USART4_DRE", // 56: USART 4 Data Register Empty + "USART4_TXC", // 57: USART 4 Transmit Complete + "UNUSED", // 58: not implemented on this device + "UNUSED", // 59: not implemented on this device + "TCB4_INT", // 60: TC B4 Interrupt +}; + /* * AVR64DD32 AVR64DD28 AVR64DD20 AVR64DD14 AVR32DD32 AVR32DD28 AVR32DD20 AVR32DD14 AVR16DD32 * AVR16DD28 AVR16DD20 AVR16DD14 @@ -7409,8 +7498,8 @@ const char * const vtab_avr64ea48[vts_avr64ea48] = { "PORTB_PORT", // 44: Interrupt PORT B }; -// AVR128DA28 AVR64DA28 AVR32DA28 -const char * const vtab_avr128da28[vts_avr128da28] = { +// AVR128DA28S AVR128DA28 AVR64DA28 AVR32DA28 +const char * const vtab_avr128da28s[vts_avr128da28s] = { "RESET", // 0: Reset (various reasons) "CRCSCAN_NMI", // 1: CRCSCAN Non-maskable Interrupt "BOD_VLM", // 2: Brown-out Detector Voltage Level Monitor @@ -7500,8 +7589,8 @@ const char * const vtab_avr128db28[vts_avr128db28] = { "AC2_AC", // 41: AC2 AC Interrupt }; -// AVR128DA32 AVR64DA32 AVR32DA32 -const char * const vtab_avr128da32[vts_avr128da32] = { +// AVR128DA32S AVR128DA32 AVR64DA32 AVR32DA32 +const char * const vtab_avr128da32s[vts_avr128da32s] = { "RESET", // 0: Reset (various reasons) "CRCSCAN_NMI", // 1: CRCSCAN Non-maskable Interrupt "BOD_VLM", // 2: Brown-out Detector Voltage Level Monitor @@ -7596,8 +7685,8 @@ const char * const vtab_avr128db32[vts_avr128db32] = { "TWI1_TWIM", // 43: 2-Wire Interface 1 Controller }; -// AVR128DA48 AVR64DA48 AVR32DA48 -const char * const vtab_avr128da48[vts_avr128da48] = { +// AVR128DA48S AVR128DA48 AVR64DA48 +const char * const vtab_avr128da48s[vts_avr128da48s] = { "RESET", // 0: Reset (various reasons) "CRCSCAN_NMI", // 1: CRCSCAN Non-maskable Interrupt "BOD_VLM", // 2: Brown-out Detector Voltage Level Monitor @@ -7723,8 +7812,8 @@ const char * const vtab_avr128db48[vts_avr128db48] = { "ZCD2_ZCD", // 60: Zero Cross Detect 2 }; -// AVR128DA64 AVR64DA64 -const char * const vtab_avr128da64[vts_avr128da64] = { +// AVR128DA64S AVR128DA64 AVR64DA64 +const char * const vtab_avr128da64s[vts_avr128da64s] = { "RESET", // 0: Reset (various reasons) "CRCSCAN_NMI", // 1: CRCSCAN Non-maskable Interrupt "BOD_VLM", // 2: Brown-out Detector Voltage Level Monitor @@ -9273,8 +9362,9 @@ static const Configvalue _values_eesave_atmega328[2] = { * AVR16EB32 AVR16EA48 AVR32DU14 AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 * AVR32EA28 AVR32DA32 AVR32DB32 AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 * AVR64DD14 AVR64DD20 AVR64DA28 AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 - * AVR64DD32 AVR64DU32 AVR64EA32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 - * AVR128DA32 AVR128DB32 AVR128DA48 AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DD32 AVR64DU32 AVR64EA32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S + * AVR128DB28 AVR128DA32 AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 + * AVR128DA64S AVR128DB64 */ static const Configvalue _values_eesave_attiny204[2] = { {0, "eex_erased", "EEPROM content is erased during chip erase"}, @@ -9572,7 +9662,8 @@ static const Configvalue _values_bodlevel_attiny204[3] = { * AVR32DU14 AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32DA48 AVR32DB48 AVR64DD14 AVR64DD20 AVR64DA28 AVR64DB28 AVR64DD28 * AVR64DU28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 - * AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 AVR128DB48 AVR128DA64 AVR128DB64 + * AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S + * AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_bodlevel_avr32dd14[4] = { {0, "bod_1v9", "brownout detection at 1.9 V"}, @@ -9852,8 +9943,9 @@ static const Configvalue _values_sut_atmega64hve[4] = { * AVR16EB32 AVR16EA48 AVR32DU14 AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 * AVR32EA28 AVR32DA32 AVR32DB32 AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 * AVR64DD14 AVR64DD20 AVR64DA28 AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 - * AVR64DD32 AVR64DU32 AVR64EA32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 - * AVR128DA32 AVR128DB32 AVR128DA48 AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DD32 AVR64DU32 AVR64EA32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S + * AVR128DB28 AVR128DA32 AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 + * AVR128DA64S AVR128DB64 */ static const Configvalue _values_sut_attiny204[8] = { {0, "sut_0ms", "startup time 0 ms"}, @@ -10568,8 +10660,8 @@ static const Configvalue _values_wdtperiod_attiny204[12] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_wdtperiod_avr32dd14[12] = { {0x00, "t_off", "watchdog timer off"}, @@ -10615,8 +10707,8 @@ static const Configvalue _values_wdtwindow_attiny204[12] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_wdtwindow_avr32dd14[12] = { {0x00, "t_off", "window mode off"}, @@ -10653,8 +10745,8 @@ static const Configvalue _values_bodsleep_attiny204[3] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_bodsleep_avr32dd14[3] = { {0, "bod_disabled", "brownout detection disabled"}, @@ -10683,8 +10775,8 @@ static const Configvalue _values_bodactive_attiny204[4] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_bodactive_avr32dd14[4] = { {0, "bod_disabled", "brownout detection disabled"}, @@ -10712,8 +10804,8 @@ static const Configvalue _values_bodsampfreq_attiny204[2] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_bodsampfreq_avr32dd14[2] = { {0, "bod_128hz", "128 Hz sampling frequency"}, @@ -10884,8 +10976,8 @@ static const Configvalue _values_rstpincfg_avr64ea48[2] = { /* * AVR32DA28 AVR32DB28 AVR32DA32 AVR32DB32 AVR32DA48 AVR32DB48 AVR64DA28 AVR64DB28 AVR64DA32 - * AVR64DB32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 - * AVR128DA48 AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DB32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_rstpincfg_avr32da28[2] = { {0, "gpio", "GPIO mode"}, @@ -10903,8 +10995,9 @@ static const Configvalue _values_rstpincfg_avr32da28[2] = { * AVR16EB32 AVR16EA48 AVR32DU14 AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 * AVR32EA28 AVR32DA32 AVR32DB32 AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 * AVR64DD14 AVR64DD20 AVR64DA28 AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 - * AVR64DD32 AVR64DU32 AVR64EA32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 - * AVR128DA32 AVR128DB32 AVR128DA48 AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DD32 AVR64DU32 AVR64EA32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S + * AVR128DB28 AVR128DA32 AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 + * AVR128DA64S AVR128DB64 */ static const Configvalue _values_crcsrc_attiny204[4] = { {0, "flash", "CRC of entire flash (boot, application code and application data)"}, @@ -10927,7 +11020,8 @@ static const Configvalue _values_toutdis_attiny1624[2] = { * AVR32DU14 AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32DA48 AVR32DB48 AVR64DD14 AVR64DD20 AVR64DA28 AVR64DB28 AVR64DD28 * AVR64DU28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 - * AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 AVR128DB48 AVR128DA64 AVR128DB64 + * AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S + * AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_clksel_avr32dd14[2] = { {0, "oschf", "1-32 MHz internal oscillator"}, @@ -10959,8 +11053,8 @@ static const Configvalue _values_updipincfg_avr64ea48[2] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_crcsel_avr32dd14[2] = { {0, "crc16", "enable CRC16"}, @@ -10983,8 +11077,8 @@ static const Configvalue _values_mvsyscfg_avr32dd14[2] = { * AVR32DD20 AVR32DU20 AVR32DA28 AVR32DB28 AVR32DD28 AVR32DU28 AVR32EA28 AVR32DA32 AVR32DB32 * AVR32DD32 AVR32DU32 AVR32EA32 AVR32DA48 AVR32DB48 AVR32EA48 AVR64DD14 AVR64DD20 AVR64DA28 * AVR64DB28 AVR64DD28 AVR64DU28 AVR64EA28 AVR64DA32 AVR64DB32 AVR64DD32 AVR64DU32 AVR64EA32 - * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DB28 AVR128DA32 AVR128DB32 AVR128DA48 - * AVR128DB48 AVR128DA64 AVR128DB64 + * AVR64DA48 AVR64DB48 AVR64DA64 AVR64DB64 AVR128DA28 AVR128DA28S AVR128DB28 AVR128DA32 + * AVR128DA32S AVR128DB32 AVR128DA48 AVR128DA48S AVR128DB48 AVR128DA64 AVR128DA64S AVR128DB64 */ static const Configvalue _values_key_avr32dd14[2] = { {0x5cc5c55c, "nolock", "no locks"}, @@ -11019,23 +11113,19 @@ static const Configvalue _values_usbsink_avr16du14[2] = { }; /* - * AVR16DU14 AVR16DU20 AVR16DU28 AVR16DU32 AVR32DU14 AVR32DU20 AVR32DU28 AVR32DU32 AVR64DU28 - * AVR64DU32 + * AVR16DU14 AVR16EB14 AVR16DU20 AVR16EB20 AVR16DU28 AVR16EB28 AVR16DU32 AVR16EB32 AVR32DU14 + * AVR32DU20 AVR32DU28 AVR32DU32 AVR64DU28 AVR64DU32 AVR128DA28S AVR128DA32S AVR128DA48S + * AVR128DA64S */ static const Configvalue _values_nvmlevel_avr16du14[2] = { - {1, "nvmaccdis", "NVM access through UPDI disabled"}, - {3, "basic", "UPDI and UPDI pins working normally"}, -}; - -// AVR16EB14 AVR16EB20 AVR16EB28 AVR16EB32 -static const Configvalue _values_nvmlevel_avr16eb14[2] = { {2, "nvmaccdis", "NVM access through UPDI disabled"}, {3, "basic", "UPDI and UPDI pins working normally"}, }; /* * AVR16DU14 AVR16EB14 AVR16DU20 AVR16EB20 AVR16DU28 AVR16EB28 AVR16DU32 AVR16EB32 AVR32DU14 - * AVR32DU20 AVR32DU28 AVR32DU32 AVR64DU28 AVR64DU32 + * AVR32DU20 AVR32DU28 AVR32DU32 AVR64DU28 AVR64DU32 AVR128DA28S AVR128DA32S AVR128DA48S + * AVR128DA64S */ static const Configvalue _values_nvmkey_avr16du14[2] = { {0x00, "notact", "not active"}, @@ -13036,7 +13126,7 @@ const Configitem cfgtab_avr16eb14[18] = { {"sut", 8, _values_sut_attiny204, "syscfg1", 6, 0x07, 0, 7, "startup time"}, {"codesize", 0, NULL, "codesize", 7, 0xff, 0, 0x00, "code section size [# of blocks]"}, {"bootsize", 0, NULL, "bootsize", 8, 0xff, 0, 0x00, "boot section size [# of blocks]"}, - {"nvmlevel", 2, _values_nvmlevel_avr16eb14, "pdicfg", 10, 0x03, 0, 3, "NVM protection level"}, + {"nvmlevel", 2, _values_nvmlevel_avr16du14, "pdicfg", 10, 0x03, 0, 3, "NVM protection level"}, {"nvmkey", 2, _values_nvmkey_avr16du14, "pdicfg", 10, 0xfff0, 4, 0x00, "NVM protection activation key"}, {"key", 2, _values_key_avr32dd14, "lock", 0, 0xffffffff, 0, 0x5cc5c55c, "lock key"}, }; @@ -13086,6 +13176,27 @@ const Configitem cfgtab_avr32db28[16] = { {"key", 2, _values_key_avr32dd14, "lock", 0, 0xffffffff, 0, 0x5cc5c55c, "lock key"}, }; +// AVR128DA28S AVR128DA32S AVR128DA48S AVR128DA64S +const Configitem cfgtab_avr128da28s[17] = { + {"wdtperiod", 12, _values_wdtperiod_avr32dd14, "wdtcfg", 0, 0x0f, 0, 0x00, "watchdog timeout period"}, + {"wdtwindow", 12, _values_wdtwindow_avr32dd14, "wdtcfg", 0, 0xf0, 4, 0x00, "watchdog window timeout period"}, + {"bodsleep", 3, _values_bodsleep_avr32dd14, "bodcfg", 1, 0x03, 0, 0, "brownout detection in sleep mode"}, + {"bodactive", 4, _values_bodactive_avr32dd14, "bodcfg", 1, 0x0c, 2, 0, "brownout detection in active/idle mode"}, + {"bodsampfreq", 2, _values_bodsampfreq_avr32dd14, "bodcfg", 1, 0x10, 4, 0, "brownout detection sampling frequency"}, + {"bodlevel", 4, _values_bodlevel_avr32dd14, "bodcfg", 1, 0xe0, 5, 0, "brownout detection level"}, + {"clksel", 2, _values_clksel_avr32dd14, "osccfg", 2, 0x07, 0, 0, "oscillator frequency"}, + {"eesave", 2, _values_eesave_attiny204, "syscfg0", 5, 0x01, 0, 0, "EEPROM after chip erase"}, + {"rstpincfg", 2, _values_rstpincfg_avr32da28, "syscfg0", 5, 0x0c, 2, 0, "reset pin configuration"}, + {"crcsel", 2, _values_crcsel_avr32dd14, "syscfg0", 5, 0x20, 5, 0, "CRC select"}, + {"crcsrc", 4, _values_crcsrc_attiny204, "syscfg0", 5, 0xc0, 6, 3, "CRC source"}, + {"sut", 8, _values_sut_attiny204, "syscfg1", 6, 0x07, 0, 0, "startup time"}, + {"codesize", 0, NULL, "codesize", 7, 0xff, 0, 0x00, "code section size [# of blocks]"}, + {"bootsize", 0, NULL, "bootsize", 8, 0xff, 0, 0x00, "boot section size [# of blocks]"}, + {"nvmlevel", 2, _values_nvmlevel_avr16du14, "pdicfg", 10, 0x03, 0, 3, "NVM protection level"}, + {"nvmkey", 2, _values_nvmkey_avr16du14, "pdicfg", 10, 0xfff0, 4, 0x00, "NVM protection activation key"}, + {"key", 2, _values_key_avr32dd14, "lock", 0, 0xffffffff, 0, 0x5cc5c55c, "lock key"}, +}; + // I/O Register files @@ -47862,7 +47973,7 @@ const Register_file rgftab_avr32db32[477] = { // I/O memory [0, 4159] }; // AVR32DA48 -const Register_file rgftab_avr32da48[600] = { // I/O memory [0, 4159] +const Register_file rgftab_avr32da48[610] = { // I/O memory [0, 4159] {"vporta.dir", 0x0000, 1, -1, 0x00, "data direction register"}, {"vporta.out", 0x0001, 1, -1, 0x00, "I/O port output register"}, {"vporta.in", 0x0002, 1, -1, 0x00, "I/O port input register"}, @@ -48429,6 +48540,16 @@ const Register_file rgftab_avr32da48[600] = { // I/O memory [0, 4159] {"tcb3.temp", 0x0b39, 1, -1, -1, "temporary register for 16-bit access"}, {"tcb3.cnt", 0x0b3a, 2, -1, 0x0000, "counter (16 bits)"}, {"tcb3.ccmp", 0x0b3c, 2, -1, -1, "compare or capture register (16 bits)"}, + {"tcb4.ctrla", 0x0b40, 1, -1, 0x00, "control register A"}, + {"tcb4.ctrlb", 0x0b41, 1, -1, 0x00, "control register B"}, + {"tcb4.evctrl", 0x0b44, 1, -1, 0x00, "event control register"}, + {"tcb4.intctrl", 0x0b45, 1, -1, 0x00, "interrupt control register"}, + {"tcb4.intflags", 0x0b46, 1, -1, 0x00, "interrupt flags register"}, + {"tcb4.status", 0x0b47, 1, -1, 0x00, "status register"}, + {"tcb4.dbgctrl", 0x0b48, 1, -1, 0x00, "debug control register"}, + {"tcb4.temp", 0x0b49, 1, -1, -1, "temporary register for 16-bit access"}, + {"tcb4.cnt", 0x0b4a, 2, -1, 0x0000, "counter (16 bits)"}, + {"tcb4.ccmp", 0x0b4c, 2, -1, -1, "compare or capture register (16 bits)"}, {"tcd0.ctrla", 0x0b80, 1, -1, 0x00, "control register A"}, {"tcd0.ctrlb", 0x0b81, 1, -1, 0x00, "control register B"}, {"tcd0.ctrlc", 0x0b82, 1, -1, 0x00, "control register C"}, @@ -49112,7 +49233,7 @@ const Register_file rgftab_avr32db48[643] = { // I/O memory [0, 4159] {"nvmctrl.addr", 0x1008, 4, -1, -1, "address register (32 bits)"}, }; -// AVR64DA28 AVR128DA28 +// AVR64DA28 AVR128DA28 AVR128DA28S const Register_file rgftab_avr64da28[433] = { // I/O memory [0, 4159] {"vporta.dir", 0x0000, 1, -1, 0x00, "data direction register"}, {"vporta.out", 0x0001, 1, -1, 0x00, "I/O port output register"}, @@ -49549,7 +49670,7 @@ const Register_file rgftab_avr64da28[433] = { // I/O memory [0, 4159] {"nvmctrl.addr", 0x1008, 4, -1, -1, "address register (32 bits)"}, }; -// AVR64DA32 AVR128DA32 +// AVR64DA32 AVR128DA32 AVR128DA32S const Register_file rgftab_avr64da32[448] = { // I/O memory [0, 4159] {"vporta.dir", 0x0000, 1, -1, 0x00, "data direction register"}, {"vporta.out", 0x0001, 1, -1, 0x00, "I/O port output register"}, @@ -50001,7 +50122,7 @@ const Register_file rgftab_avr64da32[448] = { // I/O memory [0, 4159] {"nvmctrl.addr", 0x1008, 4, -1, -1, "address register (32 bits)"}, }; -// AVR64DA48 AVR128DA48 +// AVR64DA48 AVR128DA48 AVR128DA48S const Register_file rgftab_avr64da48[601] = { // I/O memory [0, 4159] {"vporta.dir", 0x0000, 1, -1, 0x00, "data direction register"}, {"vporta.out", 0x0001, 1, -1, 0x00, "I/O port output register"}, @@ -50606,7 +50727,7 @@ const Register_file rgftab_avr64da48[601] = { // I/O memory [0, 4159] {"nvmctrl.addr", 0x1008, 4, -1, -1, "address register (32 bits)"}, }; -// AVR64DA64 AVR128DA64 +// AVR64DA64 AVR128DA64 AVR128DA64S const Register_file rgftab_avr64da64[659] = { // I/O memory [0, 4159] {"vporta.dir", 0x0000, 1, -1, 0x00, "data direction register"}, {"vporta.out", 0x0001, 1, -1, 0x00, "I/O port output register"}, diff --git a/src/libavrdude-avrintel.h b/src/libavrdude-avrintel.h index 89d3b00ed..2208fabff 100644 --- a/src/libavrdude-avrintel.h +++ b/src/libavrdude-avrintel.h @@ -11,8 +11,8 @@ * Published under GNU General Public License, version 3 (GPL-3.0) * Meta-author Stefan Rueger * - * v 1.39 - * 15.08.2024 + * v 1.40 + * 31.08.2024 * */ @@ -82,7 +82,7 @@ typedef struct { // Value of -1 typically means unknown #define UB_N_MCU 2040 // mcuid is in 0..2039 -extern const Avrintel uP_table[394]; +extern const Avrintel uP_table[398]; // MCU id: running number in arbitrary order; once assigned never change for backward compatibility @@ -474,12 +474,16 @@ extern const Avrintel uP_table[394]; #define id_avr64da64 362u #define id_avr64db64 363u #define id_avr128da28 364u +#define id_avr128da28s 394u #define id_avr128db28 365u #define id_avr128da32 366u +#define id_avr128da32s 395u #define id_avr128db32 367u #define id_avr128da48 368u +#define id_avr128da48s 396u #define id_avr128db48 369u #define id_avr128da64 370u +#define id_avr128da64s 397u #define id_avr128db64 371u @@ -833,7 +837,7 @@ extern const Avrintel uP_table[394]; #define vts_avr32dd32 36 #define vts_avr32du32 34 #define vts_avr32ea32 37 -#define vts_avr32da48 58 +#define vts_avr32da48 61 #define vts_avr32db48 61 #define vts_avr32ea48 45 #define vts_avr64dd14 36 @@ -854,12 +858,16 @@ extern const Avrintel uP_table[394]; #define vts_avr64da64 64 #define vts_avr64db64 65 #define vts_avr128da28 41 +#define vts_avr128da28s 41 #define vts_avr128db28 42 #define vts_avr128da32 44 +#define vts_avr128da32s 44 #define vts_avr128db32 44 #define vts_avr128da48 58 +#define vts_avr128da48s 58 #define vts_avr128db48 61 #define vts_avr128da64 64 +#define vts_avr128da64s 64 #define vts_avr128db64 65 @@ -1234,12 +1242,16 @@ extern const Avrintel uP_table[394]; #define vbu_avr64da64 64 #define vbu_avr64db64 65 #define vbu_avr128da28 41 +#define vbu_avr128da28s 41 #define vbu_avr128db28 42 #define vbu_avr128da32 41 +#define vbu_avr128da32s 41 #define vbu_avr128db32 44 #define vbu_avr128da48 58 +#define vbu_avr128da48s 58 #define vbu_avr128db48 59 #define vbu_avr128da64 64 +#define vbu_avr128da64s 64 #define vbu_avr128db64 65 @@ -1678,6 +1690,8 @@ extern const char * const vtab_avr16eb32[31]; #define vtab_avr16eb20 vtab_avr16eb32 #define vtab_avr16eb14 vtab_avr16eb32 +extern const char * const vtab_avr32da48[61]; + extern const char * const vtab_avr64dd32[36]; #define vtab_avr64dd28 vtab_avr64dd32 #define vtab_avr64dd20 vtab_avr64dd32 @@ -1713,32 +1727,35 @@ extern const char * const vtab_avr64ea48[45]; #define vtab_avr32ea48 vtab_avr64ea48 #define vtab_avr16ea48 vtab_avr64ea48 -extern const char * const vtab_avr128da28[41]; -#define vtab_avr64da28 vtab_avr128da28 -#define vtab_avr32da28 vtab_avr128da28 +extern const char * const vtab_avr128da28s[41]; +#define vtab_avr128da28 vtab_avr128da28s +#define vtab_avr64da28 vtab_avr128da28s +#define vtab_avr32da28 vtab_avr128da28s extern const char * const vtab_avr128db28[42]; #define vtab_avr64db28 vtab_avr128db28 #define vtab_avr32db28 vtab_avr128db28 -extern const char * const vtab_avr128da32[44]; -#define vtab_avr64da32 vtab_avr128da32 -#define vtab_avr32da32 vtab_avr128da32 +extern const char * const vtab_avr128da32s[44]; +#define vtab_avr128da32 vtab_avr128da32s +#define vtab_avr64da32 vtab_avr128da32s +#define vtab_avr32da32 vtab_avr128da32s extern const char * const vtab_avr128db32[44]; #define vtab_avr64db32 vtab_avr128db32 #define vtab_avr32db32 vtab_avr128db32 -extern const char * const vtab_avr128da48[58]; -#define vtab_avr64da48 vtab_avr128da48 -#define vtab_avr32da48 vtab_avr128da48 +extern const char * const vtab_avr128da48s[58]; +#define vtab_avr128da48 vtab_avr128da48s +#define vtab_avr64da48 vtab_avr128da48s extern const char * const vtab_avr128db48[61]; #define vtab_avr64db48 vtab_avr128db48 #define vtab_avr32db48 vtab_avr128db48 -extern const char * const vtab_avr128da64[64]; -#define vtab_avr64da64 vtab_avr128da64 +extern const char * const vtab_avr128da64s[64]; +#define vtab_avr128da64 vtab_avr128da64s +#define vtab_avr64da64 vtab_avr128da64s extern const char * const vtab_avr128db64[65]; #define vtab_avr64db64 vtab_avr128db64 @@ -2239,6 +2256,11 @@ extern const Configitem cfgtab_avr32db28[16]; #define cfgtab_avr128db48 cfgtab_avr32db28 #define cfgtab_avr128db64 cfgtab_avr32db28 +extern const Configitem cfgtab_avr128da28s[17]; +#define cfgtab_avr128da32s cfgtab_avr128da28s +#define cfgtab_avr128da48s cfgtab_avr128da28s +#define cfgtab_avr128da64s cfgtab_avr128da28s + // I/O Register files extern const Register_file rgftab_atmega328[81]; @@ -2731,7 +2753,7 @@ extern const Register_file rgftab_avr32db32[477]; #define rgftab_avr64db32 rgftab_avr32db32 #define rgftab_avr128db32 rgftab_avr32db32 -extern const Register_file rgftab_avr32da48[600]; +extern const Register_file rgftab_avr32da48[610]; extern const Register_file rgftab_avr32db48[643]; #define rgftab_avr64db48 rgftab_avr32db48 @@ -2739,15 +2761,19 @@ extern const Register_file rgftab_avr32db48[643]; extern const Register_file rgftab_avr64da28[433]; #define rgftab_avr128da28 rgftab_avr64da28 +#define rgftab_avr128da28s rgftab_avr64da28 extern const Register_file rgftab_avr64da32[448]; #define rgftab_avr128da32 rgftab_avr64da32 +#define rgftab_avr128da32s rgftab_avr64da32 extern const Register_file rgftab_avr64da48[601]; #define rgftab_avr128da48 rgftab_avr64da48 +#define rgftab_avr128da48s rgftab_avr64da48 extern const Register_file rgftab_avr64da64[659]; #define rgftab_avr128da64 rgftab_avr64da64 +#define rgftab_avr128da64s rgftab_avr64da64 extern const Register_file rgftab_avr64db64[698]; #define rgftab_avr128db64 rgftab_avr64db64 From 13e5af1b3c558584f6b202a814ebc16b5a72d01d Mon Sep 17 00:00:00 2001 From: Stefan Rueger Date: Sat, 31 Aug 2024 18:00:15 +0100 Subject: [PATCH 2/2] Add memory pdicfg to AVR128DAnnS --- src/avrdude.conf.in | 49 +++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 49 insertions(+) diff --git a/src/avrdude.conf.in b/src/avrdude.conf.in index 6a15533ab..e89ed3da5 100644 --- a/src/avrdude.conf.in +++ b/src/avrdude.conf.in @@ -5313,6 +5313,7 @@ part parent "t44" # t44a "ATtiny44A-SSU: SOIC14, Fmax=20 MHz, T=[-40 C, 85 C], Vcc=[1.8 V, 5.5 V]", "ATtiny44A-SSUR: SOIC14N, Fmax=20 MHz, T=[-40 C, 85 C], Vcc=[1.8 V, 5.5 V]"; mcuid = XVII + IV; # 21; + ; #------------------------------------------------------------ @@ -21721,6 +21722,18 @@ part parent "128da28" # 128da28s "AVR128DA28S-SPDIP: SOIC28, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; mcuid = 394; signature = 0x1e 0x97 0x12; + + memory "fusea" + size = 2; + initval = 0x03; + bitmask = 0xfff3; + offset = 0x105a; + readsize = 1; + ; + + memory "pdicfg" + alias "fusea"; + ; ; #------------------------------------------------------------ @@ -21734,6 +21747,18 @@ part parent "128da32" # 128da32s "AVR128DA32S-VQFN/TQFP: QFN32, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; mcuid = 395; signature = 0x1e 0x97 0x11; + + memory "fusea" + size = 2; + initval = 0x03; + bitmask = 0xfff3; + offset = 0x105a; + readsize = 1; + ; + + memory "pdicfg" + alias "fusea"; + ; ; #------------------------------------------------------------ @@ -21747,6 +21772,18 @@ part parent "128da48" # 128da48s "AVR128DA48S-VQFN/TQFP: QFN48, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; mcuid = 396; signature = 0x1e 0x97 0x10; + + memory "fusea" + size = 2; + initval = 0x03; + bitmask = 0xfff3; + offset = 0x105a; + readsize = 1; + ; + + memory "pdicfg" + alias "fusea"; + ; ; #------------------------------------------------------------ @@ -21760,6 +21797,18 @@ part parent "128da64" # 128da64s "AVR128DA64S-VQFN/TQFP: QFN64, Fmax=24 MHz, T=[-40 C, 125 C], Vcc=[1.8 V, 5.5 V]"; mcuid = 397; signature = 0x1e 0x97 0x0f; + + memory "fusea" + size = 2; + initval = 0x03; + bitmask = 0xfff3; + offset = 0x105a; + readsize = 1; + ; + + memory "pdicfg" + alias "fusea"; + ; ; #------------------------------------------------------------