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1. AMBA-AXI4-Lite AMBA-AXI4-Lite Public

   An implementation of AMBA AXI4Lite on an FPGA using verilog

   Verilog 2 1

2. RTL-design-using-Verilog-with-SKY130-Technology RTL-design-using-Verilog-with-SKY130-Technology Public

   a Workshop by Kunal Ghosh and VSDIAT

3. RISCV-MYTH-WORKSHOP/riscv_myth_workshop_nov22-anmol109 RISCV-MYTH-WORKSHOP/riscv_myth_workshop_nov22-anmol109 Public

   riscv_myth_workshop_nov22-anmol109 created by GitHub Classroom

4. Pseudo-Noise-Sequence-to-Triangular-and-Sinusoidal-Wave-Converter Pseudo-Noise-Sequence-to-Triangular-and-Sinusoidal-Wave-Converter Public

5. RISC-V-core RISC-V-core Public

   RV32IM with branch predictor design

   Verilog