From 28a78e2a4a2c358900aaac1a1eb9efce17a7f5a5 Mon Sep 17 00:00:00 2001 From: Kazu Hirata Date: Thu, 7 Dec 2023 22:33:46 -0800 Subject: [PATCH] [AMDGPU] Use isNullConstant (NFC) --- llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp index fb8d685409e429..a6d1da94b89078 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp @@ -2334,9 +2334,8 @@ static SDValue combineBallotPattern(SDValue VCMP, bool &Negate) { // Note that ballot doesn't use SETEQ condition but its easy to support it // here for completeness, so in this case Negate is set true on return. auto VCMP_CC = cast(VCMP.getOperand(2))->get(); - auto *VCMP_CRHS = dyn_cast(VCMP.getOperand(1)); - if ((VCMP_CC == ISD::SETEQ || VCMP_CC == ISD::SETNE) && VCMP_CRHS && - VCMP_CRHS->isZero()) { + if ((VCMP_CC == ISD::SETEQ || VCMP_CC == ISD::SETNE) && + isNullConstant(VCMP.getOperand(1))) { auto Cond = VCMP.getOperand(0); if (ISD::isExtOpcode(Cond->getOpcode())) // Skip extension. @@ -2370,8 +2369,8 @@ void AMDGPUDAGToDAGISel::SelectBRCOND(SDNode *N) { Cond->getOperand(0)->getOpcode() == AMDGPUISD::SETCC) { SDValue VCMP = Cond->getOperand(0); auto CC = cast(Cond->getOperand(2))->get(); - auto *CRHS = dyn_cast(Cond->getOperand(1)); - if ((CC == ISD::SETEQ || CC == ISD::SETNE) && CRHS && CRHS->isZero() && + if ((CC == ISD::SETEQ || CC == ISD::SETNE) && + isNullConstant(Cond->getOperand(1)) && // TODO: make condition below an assert after fixing ballot bitwidth. VCMP.getValueType().getSizeInBits() == ST->getWavefrontSize()) { // %VCMP = i(WaveSize) AMDGPUISD::SETCC ...