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srriw.adoc

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th.srriw

Synopsis

Rotate Right Word (by Immediate)

Mnemonic

th.srriw rd, rs1, imm5

Encoding
{reg:[
    { bits:  7, name: 0xb, attr: ['custom-0, 32 bit'] },
    { bits:  5, name: 'rd' },
    { bits:  3, name: 0x1, attr: ['Arithmetic'] },
    { bits:  5, name: 'rs1' },
    { bits:  5, name: 'imm5' },
    { bits:  7, name: 0x0a, attr: ['SRRIW'] },
]}
Description

This operation performs a rotate-right on on the least-significant word of rs1 by imm5 bits and stores the result in rd.

Operation (SAIL)
let rs1_val = (X(rs1))[31..0];
let result : xlenbits = EXTS(rs1_val >>> imm5);
X(rd) = result;
Permission

This instruction can be executed in all privilege levels.

Exceptions

This instruction does not trigger any exceptions.

Included in
Extension

XTheadBb ([xtheadbb])