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patch-avrdude.5.11-avrdude.conf
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patch-avrdude.5.11-avrdude.conf
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--- hardware/tools/avr/etc/avrdude.conf 2013-12-08 16:04:20.000000000 -0800
+++ hardware/tools/avr/etc/avrdude.conf 2017-01-30 15:01:28.000000000 -0800
@@ -15468,43 +15468,84 @@
signature = 0x1e 0x97 0x4c;
has_jtag = yes;
has_pdi = yes;
nvm_base = 0x01c0;
+# needed for wiring aka stk500v2 protocol
+ reset = dedicated;
+ pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
+ "x x x x x x x x x x x x x x x x";
+
memory "eeprom"
size = 0x0800;
offset = 0x08c0000;
page_size = 0x20;
readsize = 0x100;
;
memory "application"
size = 0x00020000;
offset = 0x0800000;
- page_size = 0x100;
- readsize = 0x100;
+ page_size = 0x200;
+ readsize = 0x200;
;
memory "apptable"
size = 0x00002000;
offset = 0x0081e000;
- page_size = 0x100;
- readsize = 0x100;
+ page_size = 0x200;
+ readsize = 0x200;
;
memory "boot"
size = 0x00002000;
offset = 0x00820000;
- page_size = 0x100;
- readsize = 0x100;
+ page_size = 0x200;
+ readsize = 0x200;
;
memory "flash"
size = 0x00022000;
offset = 0x0800000;
- page_size = 0x100;
- readsize = 0x100;
+ page_size = 0x200;
+ readsize = 0x200;
+# needed for wiring aka stk500v2 protocol
+ paged = yes; # this appears to affect how it is read/written with stk500v2
+ num_pages = 272;
+ blocksize = 0x200;
+ mode = 0x41;
+ delay = 10;
+
+ read_lo = " 0 0 1 0 0 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ read_hi = " 0 0 1 0 1 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ loadpage_lo = " 0 1 0 0 0 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ loadpage_hi = " 0 1 0 0 1 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ writepage = " 0 1 0 0 1 1 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 x x x x x x x",
+ " x x x x x x x x";
+
+ load_ext_addr = " 0 1 0 0 1 1 0 1",
+ " 0 0 0 0 0 0 0 0",
+ " 0 0 0 0 0 0 0 a16",
+ " 0 0 0 0 0 0 0 0";
;
memory "prodsig"
size = 0x200;
offset = 0x8e0200;
@@ -15520,10 +15561,13 @@
;
memory "signature"
size = 3;
offset = 0x1000090;
+# needed for wiring aka stk500v2 protocol
+ read = "0 0 1 1 0 0 0 0 x x x x x x x x",
+ "x x x x x x a1 a0 o o o o o o o o";
;
memory "fuse0"
size = 1;
offset = 0x8f0020;
@@ -15547,10 +15591,20 @@
memory "fuse5"
size = 1;
offset = 0x8f0025;
;
+ memory "fuse6"
+ size = 1;
+ offset = 0x8f0026;
+ ;
+
+ memory "lockbits"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+
memory "lock"
size = 1;
offset = 0x8f0027;
;
;
@@ -16915,5 +16969,539 @@
page_size = 16;
;
;
+#------------------------------------------------------------
+# ATXMEGA32E5
+#------------------------------------------------------------
+
+part
+ id = "x32e5";
+ desc = "ATXMEGA32E5";
+ signature = 0x1e 0x95 0x4c;
+
+ has_jtag = no; # was yes, verify
+ has_pdi = yes;
+ nvm_base = 0x01c0;
+
+ memory "eeprom"
+ size = 0x0400; # xxE5 datasheet table 8-3 (16e5 and 8e5 are 200)
+ offset = 0x008c0000;
+ page_size = 0x20;
+ readsize = 0x80;
+ ;
+
+ memory "application"
+ size = 0x00008000; # xxE5 datasheet table 8-2
+ offset = 0x00800000;
+ page_size = 0x80;
+ readsize = 0x80;
+ ;
+
+ memory "apptable"
+ size = 0x00001000;
+ offset = 0x00807000;
+ page_size = 0x80;
+ readsize = 0x80;
+ ;
+
+ memory "boot"
+ size = 0x00001000;
+ offset = 0x00808000;
+ page_size = 0x80;
+ readsize = 0x80;
+ ;
+
+ memory "flash"
+ size = 0x00009000;
+ offset = 0x00800000;
+ page_size = 0x80;
+ readsize = 0x80;
+ ;
+
+ memory "prodsig"
+ size = 0x80; # 0x100; # was 200, sect 8.3.4, should be 'one page'
+ offset = 0x8e0200;
+ page_size = 0x80; # header file says 128, was 0x100;
+ readsize = 0x80; # 0x100;
+ ;
+
+ memory "usersig"
+ size = 0x80; # 0x100; # was 200, sect 8.3.5 says 'one page', verify page size
+ offset = 0x8e0400;
+ page_size = 0x80; # header file says 128, was 0x100;
+ readsize = 0x80; # 0x100;
+ ;
+
+ memory "signature"
+ size = 3;
+ offset = 0x1000090;
+ ;
+
+# pg 418 in 'E' manual
+ memory "fuse0"
+ size = 1;
+ offset = 0x8f0020;
+ ;
+
+ memory "fuse1"
+ size = 1;
+ offset = 0x8f0021;
+ ;
+
+ memory "fuse2"
+ size = 1;
+ offset = 0x8f0022;
+ ;
+
+ memory "fuse4"
+ size = 1;
+ offset = 0x8f0024;
+ ;
+
+ memory "fuse5"
+ size = 1;
+ offset = 0x8f0025;
+ ;
+
+ memory "fuse6"
+ size = 1;
+ offset = 0x8f0026;
+ ;
+
+ memory "lock"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+
+ memory "lockbits"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+
+;
+
+
+#------------------------------------------------------------
+# ATXMEGA64D4
+#------------------------------------------------------------
+
+part
+ id = "x64d4";
+ desc = "ATXMEGA64D4";
+ signature = 0x1e 0x96 0x47;
+ has_jtag = yes;
+ has_pdi = yes;
+ nvm_base = 0x01c0;
+
+ memory "eeprom"
+ size = 0x0800;
+ offset = 0x008c0000;
+ page_size = 0x20;
+ readsize = 0x100;
+ ;
+
+ memory "application"
+ size = 0x00010000;
+ offset = 0x00800000;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "apptable"
+ size = 0x00001000;
+ offset = 0x0080f000;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "boot"
+ size = 0x00001000;
+ offset = 0x00810000;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "flash"
+ size = 0x00011000;
+ offset = 0x00800000;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "prodsig"
+ size = 0x200;
+ offset = 0x8e0200;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "usersig"
+ size = 0x200;
+ offset = 0x8e0400;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "signature"
+ size = 3;
+ offset = 0x1000090;
+ ;
+
+# NOTE: fuse0 is currently 'reserved'
+ memory "fuse0"
+ size = 1;
+ offset = 0x8f0020;
+ ;
+
+ memory "fuse1"
+ size = 1;
+ offset = 0x8f0021;
+ ;
+
+ memory "fuse2"
+ size = 1;
+ offset = 0x8f0022;
+ ;
+
+ memory "fuse4"
+ size = 1;
+ offset = 0x8f0024;
+ ;
+
+ memory "fuse5"
+ size = 1;
+ offset = 0x8f0025;
+ ;
+
+ memory "fuse6"
+ size = 1;
+ offset = 0x8f0026;
+ ;
+
+ memory "lockbits"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+
+ memory "lock"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+;
+
+#------------------------------------------------------------
+# ATXMEGA128A1U
+#------------------------------------------------------------
+
+part
+ id = "x128a1u";
+ desc = "ATXMEGA128A1U";
+ signature = 0x1e 0x97 0x4c; # see CPU manual, section 7.3.4
+ has_jtag = yes;
+ has_pdi = yes;
+ nvm_base = 0x01c0;
+
+# needed for wiring aka stk500v2 protocol
+ reset = dedicated;
+ pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
+ "x x x x x x x x x x x x x x x x";
+
+# additional things for 'wiring' protocol?
+ retry_pulse = reset;
+ resetdelayms = 100;
+
+ rampz = 0x3b; # verified in iox128a1u.h
+
+ memory "eeprom"
+ size = 0x0800;
+ offset = 0x08c0000;
+ page_size = 0x20;
+ readsize = 0x100;
+ ;
+
+ memory "application"
+ size = 0x00020000;
+ offset = 0x0800000;
+ page_size = 0x200;
+ readsize = 0x200;
+ ;
+
+ memory "apptable"
+ size = 0x00002000; # 8k 'apptable'
+ offset = 0x0081e000;
+ page_size = 0x200;
+ readsize = 0x200;
+ ;
+
+ memory "boot"
+ size = 0x00002000; # 128a1u has an 8k boot section
+ offset = 0x00820000;
+ page_size = 0x200;
+ readsize = 0x200;
+ ;
+
+ memory "flash"
+ size = 0x00022000; # 128a1u has an 8k boot section
+ offset = 0x00800000;
+ page_size = 0x200;
+ readsize = 0x200;
+# needed for wiring aka stk500v2 protocol
+ paged = yes; # this appears to affect how it is read/written with stk500v2
+ num_pages = 272;
+ blocksize = 0x200;
+ mode = 0x41;
+ delay = 10;
+
+ read_lo = " 0 0 1 0 0 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ read_hi = " 0 0 1 0 1 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ loadpage_lo = " 0 1 0 0 0 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ loadpage_hi = " 0 1 0 0 1 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ writepage = " 0 1 0 0 1 1 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 x x x x x x x",
+ " x x x x x x x x";
+
+ load_ext_addr = " 0 1 0 0 1 1 0 1",
+ " 0 0 0 0 0 0 0 0",
+ " 0 0 0 0 0 0 0 a16",
+ " 0 0 0 0 0 0 0 0";
+ ;
+
+ memory "prodsig"
+ size = 0x200;
+ offset = 0x8e0200;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "usersig"
+ size = 0x200;
+ offset = 0x8e0400;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "signature"
+ size = 3;
+ offset = 0x1000090;
+# needed for wiring aka stk500v2 protocol
+ read = "0 0 1 1 0 0 0 0 x x x x x x x x",
+ "x x x x x x a1 a0 o o o o o o o o";
+ ;
+
+ memory "fuse0"
+ size = 1;
+ offset = 0x8f0020;
+ ;
+
+ memory "fuse1"
+ size = 1;
+ offset = 0x8f0021;
+ ;
+
+ memory "fuse2"
+ size = 1;
+ offset = 0x8f0022;
+ ;
+
+ memory "fuse4"
+ size = 1;
+ offset = 0x8f0024;
+ ;
+
+ memory "fuse5"
+ size = 1;
+ offset = 0x8f0025;
+ ;
+
+ memory "fuse6"
+ size = 1;
+ offset = 0x8f0026;
+ ;
+
+ memory "lockbits"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+
+ memory "lock"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+;
+
+#------------------------------------------------------------
+# ATXMEGA128A4U
+#------------------------------------------------------------
+
+part
+ id = "x128a4u";
+ desc = "ATXMEGA128A4U";
+ signature = 0x1e 0x97 0x46; # see CPU manual, section 7.3.4
+ has_jtag = yes;
+ has_pdi = yes;
+ nvm_base = 0x01c0;
+
+# needed for wiring aka stk500v2 protocol
+ reset = dedicated;
+ pgm_enable = "1 0 1 0 1 1 0 0 0 1 0 1 0 0 1 1",
+ "x x x x x x x x x x x x x x x x";
+
+# additional things for 'wiring' protocol?
+ retry_pulse = reset;
+ resetdelayms = 100;
+
+ rampz = 0x3b; # verified in iox128a4u.h
+
+ memory "eeprom"
+ size = 0x0800;
+ offset = 0x08c0000;
+ page_size = 0x20;
+ readsize = 0x100;
+ ;
+
+ memory "application"
+ size = 0x00020000;
+ offset = 0x0800000;
+ page_size = 0x100; # value from V6 conf file (verify)
+ readsize = 0x100; # value from V6 conf file (verify)
+ ;
+
+ memory "apptable"
+ size = 0x00002000; # 8k 'apptable'
+ offset = 0x0081e000;
+ page_size = 0x100; # value from V6 conf file (verify)
+ readsize = 0x100; # value from V6 conf file (verify)
+ ;
+
+ memory "boot"
+ size = 0x00002000; # 128a4u has an 8k boot section
+ offset = 0x00820000;
+ page_size = 0x100; # value from V6 conf file (verify)
+ readsize = 0x100; # value from V6 conf file (verify)
+ ;
+
+ memory "flash"
+ size = 0x00022000; # 128a4u has an 8k boot section
+ offset = 0x00800000;
+ page_size = 0x100; # value from V6 conf file (verify)
+ readsize = 0x100; # value from V6 conf file (verify)
+# needed for wiring aka stk500v2 protocol
+ paged = yes; # this appears to affect how it is read/written with stk500v2
+ num_pages = 544;
+ blocksize = 0x100; # value DERIVED from V6 conf file (verify)
+ mode = 0x41;
+ delay = 10;
+
+ read_lo = " 0 0 1 0 0 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ read_hi = " 0 0 1 0 1 0 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 a6 a5 a4 a3 a2 a1 a0",
+ " o o o o o o o o";
+
+ loadpage_lo = " 0 1 0 0 0 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ loadpage_hi = " 0 1 0 0 1 0 0 0",
+ " x x x x x x x x",
+ " x a6 a5 a4 a3 a2 a1 a0",
+ " i i i i i i i i";
+
+ writepage = " 0 1 0 0 1 1 0 0",
+ "a15 a14 a13 a12 a11 a10 a9 a8",
+ " a7 x x x x x x x",
+ " x x x x x x x x";
+
+ load_ext_addr = " 0 1 0 0 1 1 0 1",
+ " 0 0 0 0 0 0 0 0",
+ " 0 0 0 0 0 0 0 a16",
+ " 0 0 0 0 0 0 0 0";
+ ;
+
+ memory "prodsig"
+ size = 0x200;
+ offset = 0x8e0200;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "usersig"
+ size = 0x200;
+ offset = 0x8e0400;
+ page_size = 0x100;
+ readsize = 0x100;
+ ;
+
+ memory "signature"
+ size = 3;
+ offset = 0x1000090;
+# needed for wiring aka stk500v2 protocol
+ read = "0 0 1 1 0 0 0 0 x x x x x x x x",
+ "x x x x x x a1 a0 o o o o o o o o";
+ ;
+
+ memory "fuse0"
+ size = 1;
+ offset = 0x8f0020;
+ ;
+
+ memory "fuse1"
+ size = 1;
+ offset = 0x8f0021;
+ ;
+
+ memory "fuse2"
+ size = 1;
+ offset = 0x8f0022;
+ ;
+
+ memory "fuse4"
+ size = 1;
+ offset = 0x8f0024;
+ ;
+
+ memory "fuse5"
+ size = 1;
+ offset = 0x8f0025;
+ ;
+
+ memory "fuse6"
+ size = 1;
+ offset = 0x8f0026;
+ ;
+
+ memory "lockbits"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+
+ memory "lock"
+ size = 1;
+ offset = 0x8f0027;
+ ;
+;
+
+