counter | LUlargev1w1 | LUlargev1w128 | LUlargev2w128 | LUlargev3w256 | LUlargev4w1 | LUlargev4w128 | LUlargev4w256 | LUlargev4w512 |
---|---|---|---|---|---|---|---|---|
duration | 24075.0000 | 20769.0000 | 20880.0000 | 16411.0000 | 23881.0000 | 19284.0000 | 17229.0000 | 15909.0000 |
task-clock | 24184.3000 | 20881.4300 | 20943.7800 | 16461.5500 | 23879.5400 | 19252.0300 | 17195.9000 | 15875.9000 |
cycles | 91.1498 | 78.6823 | 78.9179 | 61.9772 | 90.0193 | 72.5418 | 64.7808 | 59.7748 |
stalled-cycles-backend | 0.0253 | 0.0171 | 0.0318 | 0.0167 | 0.0146 | 0.0139 | 0.0036 | 0.0195 |
stalled-cycles-frontend | 0.0040 | 0.0034 | 0.0041 | 0.0042 | 0.0030 | 0.0035 | 0.0057 | 0.0067 |
iTLB-load-misses | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
iTLB-loads | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
instructions | 367.3262 | 184.2244 | 184.1356 | 69.6609 | 275.5033 | 137.9247 | 69.3460 | 35.2231 |
branch-instructions | 45.9113 | 23.0487 | 23.0338 | 11.6122 | 45.9197 | 22.9990 | 11.5636 | 5.8562 |
branch-misses | 0.0293 | 0.0288 | 0.0221 | 0.0173 | 0.0167 | 0.0164 | 0.0140 | 0.0039 |
ex_ret_instr | 367.1258 | 184.3268 | 184.0048 | 69.7007 | 275.2156 | 137.9699 | 69.3314 | 35.2470 |
ex_ret_ops | 321.4628 | 161.3659 | 160.9864 | 58.2038 | 229.6144 | 115.0480 | 57.9178 | 35.1678 |
ex_no_retire.all | 45.0488 | 55.6173 | 55.9923 | 52.7286 | 56.3062 | 55.2301 | 55.2824 | 54.6720 |
ex_div_busy | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
sse_avx_ops_retired.all | 137.4122 | 68.7641 | 68.7870 | 23.0458 | 91.7673 | 45.9644 | 22.9992 | 17.3208 |
sse_avx_ops_retired.sse_avx_other | 137.3943 | 68.7593 | 68.7744 | 23.0002 | 91.7135 | 45.9327 | 22.9841 | 17.2598 |
sse_avx_ops_retired.sse_avx_shuffle | 0.0000 | 0.0165 | 0.0168 | 0.0082 | 0.0000 | 0.0169 | 0.0084 | 0.0000 |
sse_avx_ops_retired.sse_avx_mov | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0170 | 0.0170 | 0.0584 |
sse_avx_ops_retired.sse_avx_logical | 0.0001 | 0.0000 | 0.0171 | 0.0096 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
sse_avx_ops_retired.sse_avx_shift | 0.0000 | 0.0000 | 0.0029 | 0.0016 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
packed_int_op_type.int128_mov | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0171 | 0.0171 | 0.0589 |
packed_int_op_type.int256_mov | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
packed_int_op_type.all | 137.5511 | 68.8447 | 69.0589 | 23.0356 | 91.6916 | 45.7984 | 22.9672 | 0.2164 |
fp_ret_sse_avx_ops.all | 91.7433 | 91.7308 | 91.8817 | 91.6765 | 91.6018 | 91.3257 | 91.3885 | 91.4965 |
fp_ret_sse_avx_ops.add_sub_flops | 45.9313 | 45.8647 | 45.9602 | 0.0032 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
fp_ret_sse_avx_ops.mult_flops | 45.9408 | 45.9715 | 45.9601 | 0.0169 | 0.0164 | 0.0155 | 0.0167 | 0.0182 |
fp_ret_sse_avx_ops.mac_flops | 0.0000 | 0.0000 | 0.0000 | 91.7129 | 91.7881 | 89.6211 | 91.5322 | 91.4017 |
fp_ret_sse_avx_ops.div_flops | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
fp_ops_retired_by_width.all | 229.4724 | 114.7650 | 114.7397 | 34.7275 | 137.6033 | 67.8159 | 34.4524 | 23.1739 |
fp_ops_retired_by_width.mmx_uops_retired | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
fp_ops_retired_by_width.pack_128_uops_retired | 137.5838 | 114.7012 | 114.3815 | 0.1570 | 91.6567 | 68.3333 | 0.1514 | 0.2199 |
fp_ops_retired_by_width.pack_256_uops_retired | 0.0000 | 0.0000 | 0.0000 | 34.3899 | 0.0000 | 0.0000 | 34.2560 | 0.0336 |
fp_ops_retired_by_width.pack_512_uops_retired | 0.0002 | 0.0000 | 0.0412 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 22.8302 |
fp_ops_retired_by_width.scalar_uops_retired | 91.7166 | 0.1096 | 0.0988 | 0.0882 | 45.8182 | 0.0575 | 0.0579 | 0.0758 |
cache-misses | 0.1308 | 0.1790 | 0.1770 | 0.3051 | 0.1322 | 0.1818 | 0.2647 | 0.3331 |
cache-references | 26.5866 | 27.7152 | 27.8940 | 28.3052 | 28.1206 | 27.6664 | 27.1719 | 28.0384 |
all_data_cache_accesses | 138.0716 | 69.5298 | 69.3264 | 34.9634 | 138.0133 | 69.0383 | 34.8306 | 23.3392 |
L1-dcache-load-misses | 11.0126 | 11.0238 | 11.0160 | 11.1487 | 11.1202 | 11.1120 | 11.1283 | 11.1708 |
L1-dcache-loads | 137.6542 | 77.5589 | 77.7807 | 47.7088 | 137.5070 | 77.8269 | 47.6652 | 39.2367 |
L1-dcache-prefetches | 7.7771 | 4.5251 | 4.4594 | 2.1043 | 4.4533 | 4.7283 | 5.4723 | 1.3988 |
L1-icache-load-misses | 0.0000 | 0.0000 | 0.0001 | 0.0001 | 0.0000 | 0.0000 | 0.0000 | 0.0001 |
L1-icache-loads | 0.0261 | 0.0360 | 0.0298 | 0.0425 | 0.0227 | 0.0276 | 0.0396 | 0.0481 |
dTLB-load-misses | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 | 0.0000 |
dTLB-loads | 0.0047 | 0.0049 | 0.0048 | 0.0046 | 0.0048 | 0.0047 | 0.0046 | 0.0047 |