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[NOT FOR MERGE] Intel txt aem 2.06 rebased #20
[NOT FOR MERGE] Intel txt aem 2.06 rebased #20
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It does not make sense to have separate headers for separate static functions. Additionally, we have to add some constants with MSR addresses in subsequent patches. So, make one common place to store them. Signed-off-by: Daniel Kiper <[email protected]>
... to grub_rdmsr() and grub_wrmsr() respectively. New names are more obvious than older ones. Signed-off-by: Daniel Kiper <[email protected]>
Currently rdmsr and wrmsr commands have own MSR support detection code. This code is the same. So, it is duplicated. Additionally, this code cannot be reused by others. Hence, extract this code to a function and make it public. By the way, improve a code a bit. Additionally, use GRUB_ERR_BAD_DEVICE instead of GRUB_ERR_BUG to signal an error because errors encountered by this new routine are not bugs. Signed-off-by: Daniel Kiper <[email protected]>
...to avoid potential conflicts and confusion. Signed-off-by: Daniel Kiper <[email protected]>
Subsequent patches will use that constant. Signed-off-by: Daniel Kiper <[email protected]>
…acros Subsequent patches will use those macros and constant. Signed-off-by: Krystian Hebel <[email protected]>
The functions calculate lowest and highest available RAM addresses respectively. Both functions are needed to calculate PMR boundaries for Intel TXT secure launcher introduced by subsequent patches. Signed-off-by: Daniel Kiper <[email protected]>
...to avoid naming collision with TPM TIS and CRB driver introduced by subsequent patch. Signed-off-by: Daniel Kiper <[email protected]>
It will be used by Intel TXT secure launcher introduced by subsequent patches. Signed-off-by: Daniel Kiper <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Some of the commands declared in header files will be implemented in the follow-up commits. Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Daniel Kiper <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Provide definitions of structures and basic functions for constructing and parsing of SLRT. Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Daniel Kiper <[email protected]>
Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Daniel Kiper <[email protected]> Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Daniel Kiper <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Daniel Kiper <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Signed-off-by: Ross Philipson <[email protected]> Signed-off-by: Daniel Kiper <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
GRUB_MULTIBOOT(get_mbi_size) doesn't look like an accurate source of the final size, more like a minimal memory buffer size. Signed-off-by: Sergii Dmytruk <[email protected]>
The code makes sure that MBI entry goes first in DRTM, so the payload can measure it first on launch. SLRT table is allocated on the heap first, size for it is reserved inside TXT heap by TXT code and data is later copied into its final place. Signed-off-by: Sergii Dmytruk <[email protected]> Signed-off-by: Michał Żygowski <[email protected]> Signed-off-by: Tomasz Żyjewski <[email protected]> Signed-off-by: Krystian Hebel <[email protected]>
Signed-off-by: Sergii Dmytruk <[email protected]>
Signed-off-by: Sergii Dmytruk <[email protected]>
This still runs CI twice in a PR. Signed-off-by: Sergii Dmytruk <[email protected]>
After QubesOS/qubes-grub2#13 got merged, some of the commits were duplicated, causing build system to fail. Skip those commits and add the rest starting at the next available patch-start number. Signed-off-by: Krystian Hebel <[email protected]>
Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
This updates `struct grub_slr_entry_dl_info`: * by adding `dlme_base` and `dlme_size` which weren't necessary for Intel TXT because the same information is passed via OS2SINIT data * by changing `dlme_entry` from `grub_uint64_t` to `grub_uint32_t` because that should be enough for an offset Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Signed-off-by: Krystian Hebel <[email protected]> Signed-off-by: Sergii Dmytruk <[email protected]>
Update `slaunch_module` global only if new module passed all checks. Closes #11. Signed-off-by: Sergii Dmytruk <[email protected]>
It's measured and we better measure the binary as is without changing it on the fly. Signed-off-by: Sergii Dmytruk <[email protected]>
Do allocation in the same way as it's done for TXT (preferring high addresses), otherwise Xen loads Dom0 kernel over the TPM even log and Linux ends up panicking when it detects conflict with e820 map in Xen-specific code (why wouldn't Xen check it? who knows). Signed-off-by: Sergii Dmytruk <[email protected]>
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To see real delta between those branches: https://github.com/TrenchBoot/grub/compare/intel-txt-aem-2.06-testing..intel-txt-aem-2.06-rebased, changes presented by GH in |
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Looked at the changes after not working with them for a few weeks and found some things that could be improved while doing the rebase. Also ran openQA test on Supermicro M11 with the artifacts produced by CI and it passed successfully.
/* Contrary to the TXT, on AMD we do not have vendor-provided blobs in | ||
* reserved memory, we are using normal RAM */ | ||
err = grub_relocator_alloc_chunk_align (rel, &ch, 0, | ||
0xffffffff - GRUB_SKINIT_SLB_SIZE, |
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I guess someone during future review could point out that UP_TO_TOP32()
should be used here as above, could update right away.
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This could be squashed into i386/skinit: Add AMD SKINIT implementation
.
0xffffffff - GRUB_SKINIT_SLB_SIZE, | ||
GRUB_SKINIT_SLB_SIZE, | ||
GRUB_SKINIT_SLB_ALIGN, | ||
GRUB_RELOCATOR_PREFERENCE_LOW, 1); |
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Given that GRUB_RELOCATOR_PREFERENCE_LOW
caused us problems for TPM log, any benefits of using GRUB_RELOCATOR_PREFERENCE_HIGH
here as well? In that case 0x1000000
was used for a base, so maybe there is no danger here assuming availability of aligned 64KiB below 16MiB boundary.
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grub_dprintf ("slaunch", "broadcasting INIT\r\n"); | ||
*apic = 0x000c0500; // INIT, all excluding self | ||
grub_dprintf ("slaunch", "grub_tpm_relinquish_locality\r\n"); |
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IIRC this print might be helpful for the delay that it introduces, but the message could probably be edited to say something like "sent INIT broadcasts".
if (slp == SLP_NONE) | ||
return grub_error (GRUB_ERR_BAD_ARGUMENT, N_("secure launch not enabled")); | ||
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||
if (slp > SLP_AMD_SKINIT) |
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There should probably be SLP_END
with the slp >= SLP_END
check here, because what I've done doesn't look nice.
#define GRUB_SKINIT_SLB_SIZE 0x10000 | ||
#define GRUB_SKINIT_SLB_ALIGN 0x10000 | ||
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||
#ifndef ASM_FILE |
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I think this file is never included in an asm-file (directly or indirectly), so this check and defining constants after includes are unnecessary.
To avoid mismatch between OS SINIT data MLE size and MLE size from MLE header, take the mle_size from MLE header and do not align it to PMR size, which is 2MB. Signed-off-by: Michał Żygowski <[email protected]>
Cleanup: @krystian-hebel, I think the comments were basically taken care of in |
Agreed. |
(had to restore branch to switch target on #23, removing again) |
This PR is made to show and test SKINIT changes on top of what was sent to QubesOS/qubes-grub2#13. After review
intel-txt-aem-2.06-rebased
should be used to overwriteintel-txt-aem-2.06
, and-testing
can be removed.