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Publish test results Publish test results #106: completed by Timmmm
June 18, 2024 16:05 13s
June 18, 2024 16:05 13s
Publish test results Publish test results #105: completed by Timmmm
June 18, 2024 16:02 23s
June 18, 2024 16:02 23s
Increase TLB size to 64 CI #108: Commit 3f5b7f4 pushed by Timmmm
June 18, 2024 15:43 23m 30s user/timh/bigger_tlb_2
user/timh/bigger_tlb_2
June 18, 2024 15:43 23m 30s
Increase TLB size to 64 CI #107: Commit 51970a6 pushed by Timmmm
June 18, 2024 15:42 24m 38s user/timh/bigger_tlb_2
user/timh/bigger_tlb_2
June 18, 2024 15:42 24m 38s
Remove redundant CSR privilege checks CI #106: Commit 50b6448 pushed by Timmmm
June 18, 2024 15:41 24m 13s user/timh/redundant_access_checks
user/timh/redundant_access_checks
June 18, 2024 15:41 24m 13s
Fix TLB bug CI #105: Commit ff1515d pushed by Timmmm
June 18, 2024 15:38 23m 46s user/timh/tlb_fix
user/timh/tlb_fix
June 18, 2024 15:38 23m 46s
Publish test results Publish test results #104: completed by Timmmm
June 14, 2024 14:32 13s
June 14, 2024 14:32 13s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #104: Commit 3dfd09f pushed by Timmmm
June 14, 2024 14:08 23m 50s user/timh/cbo
user/timh/cbo
June 14, 2024 14:08 23m 50s
Publish test results Publish test results #103: completed by Timmmm
June 12, 2024 10:42 21s
June 12, 2024 10:42 21s
Use bool <-> bit mappings from riscv_types.sail CI #103: Commit 25e7827 pushed by Timmmm
June 12, 2024 10:19 23m 7s user/timh/bool_mappings
user/timh/bool_mappings
June 12, 2024 10:19 23m 7s
Publish test results Publish test results #102: completed by Timmmm
June 11, 2024 21:22 17s
June 11, 2024 21:22 17s
Publish test results Publish test results #101: completed by Timmmm
June 11, 2024 21:19 13s
June 11, 2024 21:19 13s
Publish test results Publish test results #100: completed by Timmmm
June 11, 2024 21:16 17s
June 11, 2024 21:16 17s
Publish test results Publish test results #99: completed by Timmmm
June 11, 2024 21:13 15s
June 11, 2024 21:13 15s
Add support for HPM counters CI #102: Commit eb99d93 pushed by Timmmm
June 11, 2024 20:56 25m 7s user/timh/hpmcounters
user/timh/hpmcounters
June 11, 2024 20:56 25m 7s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #101: Commit fc2138c pushed by Timmmm
June 11, 2024 20:56 23m 10s user/timh/cbo
user/timh/cbo
June 11, 2024 20:56 23m 10s
Use bool <-> bit mappings from riscv_types.sail everywhere CI #100: Commit 5075064 pushed by Timmmm
June 11, 2024 20:53 23m 12s user/timh/bool_mappings
user/timh/bool_mappings
June 11, 2024 20:53 23m 12s
Check misalignment of AMOs before address translation CI #99: Commit e1dcef1 pushed by Timmmm
June 11, 2024 20:49 23m 17s user/timh/amo_alignment_check
user/timh/amo_alignment_check
June 11, 2024 20:49 23m 17s
Publish test results Publish test results #98: completed by Timmmm
June 3, 2024 20:03 13s
June 3, 2024 20:03 13s
Implement Zicbom, Zicboz (cbo.flush, cbo.inval, cbo.zero) CI #98: Commit 0320fb8 pushed by Timmmm
June 3, 2024 19:39 23m 47s user/timh/cbo
user/timh/cbo
June 3, 2024 19:39 23m 47s
Publish test results Publish test results #97: completed by Timmmm
June 3, 2024 19:37 17s
June 3, 2024 19:37 17s
Remove unnecessary matches for loads/stores CI #97: Commit a6b656d pushed by Timmmm
June 3, 2024 19:13 23m 40s user/timh/silly_switch
user/timh/silly_switch
June 3, 2024 19:13 23m 40s
Publish test results Publish test results #96: completed by Timmmm
June 3, 2024 15:27 16s
June 3, 2024 15:27 16s
Change ext_data_get_addr to use bytes for width CI #96: Commit 9194dd5 pushed by Timmmm
June 3, 2024 15:02 24m 40s user/timh/cheri_width_bytes
user/timh/cheri_width_bytes
June 3, 2024 15:02 24m 40s
Publish test results Publish test results #95: completed by Timmmm
May 21, 2024 16:18 24s
May 21, 2024 16:18 24s