Add names for cext instructions #40
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ThinkOpenly
requested changes
Aug 15, 2024
model/riscv_insts_cext.sail
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| @@ -15,6 +15,7 @@ | |||
| */ | |||
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| /* ****************************************************************** */ | |||
| $[name "no operation (compressed)"] | |||
model/riscv_insts_cext.sail
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| @@ -25,7 +26,7 @@ function clause execute C_NOP() = RETIRE_SUCCESS | |||
| mapping clause assembly = C_NOP() <-> "c.nop" | |||
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| /* ****************************************************************** */ | |||
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| $[name "add zero_extend non-zero immediate scaled by 4 to stack pointer (compressed)"] | |||
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that's a mouthful. can't think of an obviously better name, though.
Let's change "zero_extend" to "zero-extended", though, to match the documentation.
model/riscv_insts_cext.sail
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| @@ -185,6 +194,7 @@ mapping clause assembly = C_LI(imm, rd) | |||
| if rd != zreg | |||
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| /* ****************************************************************** */ | |||
| $[name "add non-zero sign-extended immediate scaled by 16 to stack pointer(compressed)"] | |||
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add a space between "pointer" and "(compressed)"
model/riscv_insts_cext.sail
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| @@ -221,6 +232,7 @@ mapping clause assembly = C_LUI(imm, rd) | |||
| if rd != zreg & rd != sp & imm != 0b000000 | |||
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| /* ****************************************************************** */ | |||
| $[name "shift immediate (compressed)"] | |||
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"shift right (logical) immediate (compressed)"
model/riscv_insts_cext.sail
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| @@ -239,6 +251,7 @@ mapping clause assembly = C_SRLI(shamt, rsd) | |||
| if shamt != 0b000000 | |||
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| /* ****************************************************************** */ | |||
| $[name "shift immediate (compressed)"] | |||
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"shift right (arithmetic) immediate (compressed)"
model/riscv_insts_cext.sail
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| @@ -381,6 +402,7 @@ mapping clause assembly = C_J(imm) | |||
| <-> "c.j" ^ spc() ^ hex_bits_signed_11(imm) | |||
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| /* ****************************************************************** */ | |||
| $[name "branch if equal zero (compressed)"] | |||
model/riscv_insts_cext.sail
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| @@ -393,6 +415,7 @@ mapping clause assembly = C_BEQZ(imm, rs) | |||
| <-> "c.beqz" ^ spc() ^ creg_name(rs) ^ sep() ^ hex_bits_signed_8(imm) | |||
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| /* ****************************************************************** */ | |||
| $[name "branch if contain non-zero (compressed)"] | |||
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"branch if not equals zero (compressed)"
model/riscv_insts_cext.sail
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| @@ -405,6 +428,7 @@ mapping clause assembly = C_BNEZ(imm, rs) | |||
| <-> "c.bnez" ^ spc() ^ creg_name(rs) ^ sep() ^ hex_bits_signed_8(imm) | |||
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| /* ****************************************************************** */ | |||
| $[name "shift immediate (compressed)"] | |||
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"shift left (logical) immediate (compressed)"
model/riscv_insts_cext.sail
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| @@ -421,6 +445,7 @@ mapping clause assembly = C_SLLI(shamt, rsd) | |||
| if shamt != 0b000000 & rsd != zreg | |||
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| /* ****************************************************************** */ | |||
| $[name "load word to stack pointer (compressed)"] | |||
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"load word from stack pointer (compressed)"
model/riscv_insts_cext.sail
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| @@ -439,6 +464,7 @@ mapping clause assembly = C_LWSP(uimm, rd) | |||
| if rd != zreg | |||
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| /* ****************************************************************** */ | |||
| $[name "load double-word to stack pointer (compressed)"] | |||
ThinkOpenly
approved these changes
Aug 15, 2024
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