diff --git a/.github/scripts/build_local_target.sh b/.github/scripts/build_local_target.sh index d874c1c..cfa2c1a 100755 --- a/.github/scripts/build_local_target.sh +++ b/.github/scripts/build_local_target.sh @@ -4,7 +4,8 @@ set -e target_name=${TARGET:-"tag_array_64x184"} if [[ -z "$STAGES" ]]; then - STAGES=("synth" "floorplan" "place" "cts" "grt" "route") + # Skip "grt" "route", takes too long + STAGES=("synth" "floorplan" "place" "cts") else eval "STAGES=($STAGES)" fi diff --git a/BUILD b/BUILD index 20bdea0..c4557b5 100644 --- a/BUILD +++ b/BUILD @@ -44,15 +44,15 @@ filegroup( visibility = [":__subpackages__"], ) -SRAM_FLOOR_PLACE_ARGUMENTS = { +SRAM_ARGUMENTS = { + "SDC_FILE": "$(location :constraints-sram)", "IO_CONSTRAINTS": "$(location :io-sram)", "PLACE_PINS_ARGS": "-min_distance 2 -min_distance_in_tracks", "PLACE_DENSITY": "0.42", "REMOVE_ABC_BUFFERS": "1", -} - -SRAM_SYNTH_ARGUMENTS = { - "SDC_FILE": "$(location :constraints-sram)", + # faster build + "SKIP_CTS_REPAIR_TIMING": "1", + "SKIP_REPORT_METRICS": "1", } BLOCK_FLOORPLAN = { @@ -63,7 +63,8 @@ BLOCK_FLOORPLAN = { orfs_flow( name = "tag_array_64x184", - args = SRAM_SYNTH_ARGUMENTS | SRAM_FLOOR_PLACE_ARGUMENTS | { + abstract_stage = "cts", + args = SRAM_ARGUMENTS | { "CORE_UTILIZATION": "40", "CORE_ASPECT_RATIO": "2", "SKIP_REPORT_METRICS": "1", @@ -77,10 +78,10 @@ orfs_flow( visibility = [":__subpackages__"], ) -LB_ARGS = SRAM_SYNTH_ARGUMENTS | SRAM_FLOOR_PLACE_ARGUMENTS | { +LB_ARGS = SRAM_ARGUMENTS | { "CORE_UTILIZATION": "40", "CORE_ASPECT_RATIO": "2", - "PLACE_DENSITY": "0.65", + "PLACE_DENSITY": "0.65" } LB_STAGE_SOURCES = { @@ -89,7 +90,7 @@ LB_STAGE_SOURCES = { "place": [":io-sram"], } -LB_VERILOG_FILES = ["test/rtl/lb_32x128.sv"] +LB_VERILOG_FILES = ["test/mock/lb_32x128.sv"] orfs_flow( name = "lb_32x128", @@ -112,6 +113,7 @@ orfs_flow( orfs_flow( name = "L1MetadataArray", + abstract_stage = "cts", macros = ["tag_array_64x184_generate_abstract"], stage_args = { "synth": { @@ -189,18 +191,18 @@ eqy_test( orfs_flow( name = "data_2048x8", abstract_stage = "cts", + args = SRAM_ARGUMENTS, stage_args = { - "synth": SRAM_SYNTH_ARGUMENTS | {"SYNTH_MEMORY_MAX_BITS": "16384"}, - "floorplan": BLOCK_FLOORPLAN | SRAM_FLOOR_PLACE_ARGUMENTS | { + "synth": {"SYNTH_MEMORY_MAX_BITS": "16384"}, + "floorplan": BLOCK_FLOORPLAN | { "CORE_UTILIZATION": "40", "CORE_ASPECT_RATIO": "2", }, - "place": SRAM_FLOOR_PLACE_ARGUMENTS | { + "place": { "PLACE_DENSITY": "0.65", "GPL_TIMING_DRIVEN": "0", }, "cts": { - "SKIP_CTS_REPAIR_TIMING": "0", "SKIP_REPORT_METRICS": "1", }, }, @@ -217,8 +219,8 @@ orfs_flow( orfs_flow( name = "regfile_128x65", abstract_stage = "cts", + args = SRAM_ARGUMENTS, stage_args = { - "synth": SRAM_SYNTH_ARGUMENTS, "floorplan": BLOCK_FLOORPLAN | { "DIE_AREA": "0 0 400 400", "CORE_AREA": "2 2 298 298", diff --git a/subpackage/BUILD b/subpackage/BUILD index 99a4c4d..3e8c36a 100644 --- a/subpackage/BUILD +++ b/subpackage/BUILD @@ -4,10 +4,19 @@ FLOOR_PLACE_ARGUMENTS = { "IO_CONSTRAINTS": "$(location //:io)", } +# faster build +FAST_ARGUMENTS = { + "REMOVE_ABC_BUFFERS": "1", + "SKIP_CTS_REPAIR_TIMING": "1", + "SKIP_REPORT_METRICS": "1", +} + + orfs_flow( name = "L1MetadataArray", - abstract_stage = "route", + abstract_stage = "cts", macros = ["//:tag_array_64x184_generate_abstract"], + args = FAST_ARGUMENTS, stage_args = { "synth": { "SDC_FILE": "$(location //:test/constraints-top.sdc)", @@ -36,9 +45,9 @@ orfs_flow( orfs_flow( name = "tag_array_64x184", abstract_stage = "floorplan", + args = FAST_ARGUMENTS, stage_args = { "synth": { - "SYNTH_MEMORY_MAX_BITS": "12000", "SDC_FILE": "$(location //:constraints-sram)", }, "floorplan": { @@ -56,5 +65,5 @@ orfs_flow( "floorplan": ["//:io-sram"], "place": ["//:io-sram"], }, - verilog_files = ["//:test/rtl/tag_array_64x184.sv"], + verilog_files = ["//:test/mock/tag_array_64x184.sv"], ) diff --git a/test/mock/lb_32x128.sv b/test/mock/lb_32x128.sv new file mode 100644 index 0000000..8c118df --- /dev/null +++ b/test/mock/lb_32x128.sv @@ -0,0 +1,20 @@ +// mock version for fast builds +module lb_32x128( + input [4:0] R0_addr, + input R0_en, + R0_clk, + output [127:0] R0_data, + input [4:0] W0_addr, + input W0_en, + W0_clk, + input [127:0] W0_data +); + + reg [127:0] Memory[0:3]; // Reduced rows to 4 + always @(posedge W0_clk) begin + if (W0_en & 1'h1) + Memory[W0_addr[4:3] ^ W0_addr[1:0]] <= W0_data; // XORing high and low bits + end // always @(posedge) + assign R0_data = R0_en ? Memory[R0_addr[4:3] ^ R0_addr[1:0]] : 128'bx; // XORing high and low bits +endmodule + diff --git a/test/rtl/lb_32x128.sv b/test/rtl/lb_32x128.sv deleted file mode 100644 index 119a427..0000000 --- a/test/rtl/lb_32x128.sv +++ /dev/null @@ -1,40 +0,0 @@ -// Standard header to adapt well known macros for prints and assertions. - -// Users can define 'ASSERT_VERBOSE_COND' to add an extra gate to assert error printing. -`ifndef ASSERT_VERBOSE_COND_ - `ifdef ASSERT_VERBOSE_COND - `define ASSERT_VERBOSE_COND_ (`ASSERT_VERBOSE_COND) - `else // ASSERT_VERBOSE_COND - `define ASSERT_VERBOSE_COND_ 1 - `endif // ASSERT_VERBOSE_COND -`endif // not def ASSERT_VERBOSE_COND_ - -// Users can define 'STOP_COND' to add an extra gate to stop conditions. -`ifndef STOP_COND_ - `ifdef STOP_COND - `define STOP_COND_ (`STOP_COND) - `else // STOP_COND - `define STOP_COND_ 1 - `endif // STOP_COND -`endif // not def STOP_COND_ - -// VCS coverage exclude_file -module lb_32x128( - input [4:0] R0_addr, - input R0_en, - R0_clk, - output [127:0] R0_data, - input [4:0] W0_addr, - input W0_en, - W0_clk, - input [127:0] W0_data -); - - reg [127:0] Memory[0:31]; - always @(posedge W0_clk) begin - if (W0_en & 1'h1) - Memory[W0_addr] <= W0_data; - end // always @(posedge) - assign R0_data = R0_en ? Memory[R0_addr] : 128'bx; -endmodule - diff --git a/test/rtl/tag_array_64x184.sv b/test/rtl/tag_array_64x184.sv deleted file mode 100644 index 7f1e41c..0000000 --- a/test/rtl/tag_array_64x184.sv +++ /dev/null @@ -1,61 +0,0 @@ -// Standard header to adapt well known macros for prints and assertions. - -// Users can define 'ASSERT_VERBOSE_COND' to add an extra gate to assert error printing. -`ifndef ASSERT_VERBOSE_COND_ - `ifdef ASSERT_VERBOSE_COND - `define ASSERT_VERBOSE_COND_ (`ASSERT_VERBOSE_COND) - `else // ASSERT_VERBOSE_COND - `define ASSERT_VERBOSE_COND_ 1 - `endif // ASSERT_VERBOSE_COND -`endif // not def ASSERT_VERBOSE_COND_ - -// Users can define 'STOP_COND' to add an extra gate to stop conditions. -`ifndef STOP_COND_ - `ifdef STOP_COND - `define STOP_COND_ (`STOP_COND) - `else // STOP_COND - `define STOP_COND_ 1 - `endif // STOP_COND -`endif // not def STOP_COND_ - -// VCS coverage exclude_file -module tag_array_64x184( - input [5:0] R0_addr, - input R0_en, - R0_clk, - output [183:0] R0_data, - input [5:0] W0_addr, - input W0_en, - W0_clk, - input [183:0] W0_data, - input [7:0] W0_mask -); - - reg [183:0] Memory[0:63]; - reg _R0_en_d0; - reg [5:0] _R0_addr_d0; - always @(posedge R0_clk) begin - _R0_en_d0 <= R0_en; - _R0_addr_d0 <= R0_addr; - end // always @(posedge) - always @(posedge W0_clk) begin - if (W0_en & W0_mask[0]) - Memory[W0_addr][32'h0 +: 23] <= W0_data[22:0]; - if (W0_en & W0_mask[1]) - Memory[W0_addr][32'h17 +: 23] <= W0_data[45:23]; - if (W0_en & W0_mask[2]) - Memory[W0_addr][32'h2E +: 23] <= W0_data[68:46]; - if (W0_en & W0_mask[3]) - Memory[W0_addr][32'h45 +: 23] <= W0_data[91:69]; - if (W0_en & W0_mask[4]) - Memory[W0_addr][32'h5C +: 23] <= W0_data[114:92]; - if (W0_en & W0_mask[5]) - Memory[W0_addr][32'h73 +: 23] <= W0_data[137:115]; - if (W0_en & W0_mask[6]) - Memory[W0_addr][32'h8A +: 23] <= W0_data[160:138]; - if (W0_en & W0_mask[7]) - Memory[W0_addr][32'hA1 +: 23] <= W0_data[183:161]; - end // always @(posedge) - assign R0_data = _R0_en_d0 ? Memory[_R0_addr_d0] : 184'bx; -endmodule -