forked from capstone-engine/capstone
-
Notifications
You must be signed in to change notification settings - Fork 2
/
cs.c
2019 lines (1804 loc) · 48.9 KB
/
cs.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* Capstone Disassembly Engine */
/* By Nguyen Anh Quynh <[email protected]>, 2013-2019 */
#include "SStream.h"
#if defined(CAPSTONE_HAS_OSXKERNEL)
#include <Availability.h>
#include <libkern/libkern.h>
#else
#include <stddef.h>
#include <stdio.h>
#include <stdlib.h>
#endif
#include <string.h>
#include <capstone/capstone.h>
#include "utils.h"
#include "MCRegisterInfo.h"
#if defined(_KERNEL_MODE)
#include "windows\winkernel_mm.h"
#endif
// Issue #681: Windows kernel does not support formatting float point
#if defined(_KERNEL_MODE) && !defined(CAPSTONE_DIET)
#if defined(CAPSTONE_HAS_ARM) || defined(CAPSTONE_HAS_AARCH64) || defined(CAPSTONE_HAS_M68K)
#define CAPSTONE_STR_INTERNAL(x) #x
#define CAPSTONE_STR(x) CAPSTONE_STR_INTERNAL(x)
#define CAPSTONE_MSVC_WRANING_PREFIX __FILE__ "("CAPSTONE_STR(__LINE__)") : warning message : "
#pragma message(CAPSTONE_MSVC_WRANING_PREFIX "Windows driver does not support full features for selected architecture(s). Define CAPSTONE_DIET to compile Capstone with only supported features. See issue #681 for details.")
#undef CAPSTONE_MSVC_WRANING_PREFIX
#undef CAPSTONE_STR
#undef CAPSTONE_STR_INTERNAL
#endif
#endif // defined(_KERNEL_MODE) && !defined(CAPSTONE_DIET)
#if !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(CAPSTONE_DIET) && !defined(_KERNEL_MODE)
#define INSN_CACHE_SIZE 32
#else
// reduce stack variable size for kernel/firmware
#define INSN_CACHE_SIZE 8
#endif
// default SKIPDATA mnemonic
#ifndef CAPSTONE_DIET
#define SKIPDATA_MNEM ".byte"
#else // No printing is available in diet mode
#define SKIPDATA_MNEM NULL
#endif
#include "arch/AArch64/AArch64Module.h"
#include "arch/ARM/ARMModule.h"
#include "arch/EVM/EVMModule.h"
#include "arch/WASM/WASMModule.h"
#include "arch/M680X/M680XModule.h"
#include "arch/M68K/M68KModule.h"
#include "arch/Mips/MipsModule.h"
#include "arch/PowerPC/PPCModule.h"
#include "arch/Sparc/SparcModule.h"
#include "arch/SystemZ/SystemZModule.h"
#include "arch/TMS320C64x/TMS320C64xModule.h"
#include "arch/X86/X86Module.h"
#include "arch/XCore/XCoreModule.h"
#include "arch/RISCV/RISCVModule.h"
#include "arch/MOS65XX/MOS65XXModule.h"
#include "arch/BPF/BPFModule.h"
#include "arch/SH/SHModule.h"
#include "arch/TriCore/TriCoreModule.h"
#include "arch/Alpha/AlphaModule.h"
#include "arch/HPPA/HPPAModule.h"
#include "arch/LoongArch/LoongArchModule.h"
#include "arch/Xtensa/XtensaModule.h"
typedef struct cs_arch_config {
// constructor initialization
cs_err (*arch_init)(cs_struct *);
// support cs_option()
cs_err (*arch_option)(cs_struct *, cs_opt_type, size_t value);
// bitmask for finding disallowed modes for an arch:
// to be called in cs_open()/cs_option()
cs_mode arch_disallowed_mode_mask;
} cs_arch_config;
#define CS_ARCH_CONFIG_ARM \
{ \
ARM_global_init, \
ARM_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_V8 | CS_MODE_MCLASS | CS_MODE_THUMB | CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_AARCH64 \
{ \
AArch64_global_init, \
AArch64_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_ARM | CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_MIPS \
{ \
Mips_global_init, \
Mips_option, \
~(CS_MODE_LITTLE_ENDIAN | \
CS_MODE_BIG_ENDIAN | \
CS_MODE_MIPS16 | \
CS_MODE_MIPS32 | \
CS_MODE_MIPS64 | \
CS_MODE_MICRO | \
CS_MODE_MIPS1 | \
CS_MODE_MIPS2 | \
CS_MODE_MIPS32R2 | \
CS_MODE_MIPS32R3 | \
CS_MODE_MIPS32R5 | \
CS_MODE_MIPS32R6 | \
CS_MODE_MIPS3 | \
CS_MODE_MIPS4 | \
CS_MODE_MIPS5 | \
CS_MODE_MIPS64R2 | \
CS_MODE_MIPS64R3 | \
CS_MODE_MIPS64R5 | \
CS_MODE_MIPS64R6 | \
CS_MODE_OCTEON | \
CS_MODE_OCTEONP | \
CS_MODE_NANOMIPS | \
CS_MODE_NMS1 | \
CS_MODE_I7200 | \
CS_MODE_MIPS_NOFLOAT | \
CS_MODE_MIPS_PTR64 \
), \
}
#define CS_ARCH_CONFIG_X86 \
{ \
X86_global_init, \
X86_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_16), \
}
#define CS_ARCH_CONFIG_PPC \
{ \
PPC_global_init, \
PPC_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_32 | CS_MODE_64 | CS_MODE_BIG_ENDIAN \
| CS_MODE_QPX | CS_MODE_PS | CS_MODE_BOOKE), \
}
#define CS_ARCH_CONFIG_SPARC \
{ \
Sparc_global_init, \
Sparc_option, \
~(CS_MODE_BIG_ENDIAN | CS_MODE_V9), \
}
#define CS_ARCH_CONFIG_SYSTEMZ \
{ \
SystemZ_global_init, \
SystemZ_option, \
~(CS_MODE_BIG_ENDIAN | \
CS_MODE_SYSTEMZ_ARCH8 | \
CS_MODE_SYSTEMZ_ARCH9 | \
CS_MODE_SYSTEMZ_ARCH10 | \
CS_MODE_SYSTEMZ_ARCH11 | \
CS_MODE_SYSTEMZ_ARCH12 | \
CS_MODE_SYSTEMZ_ARCH13 | \
CS_MODE_SYSTEMZ_ARCH14 | \
CS_MODE_SYSTEMZ_Z10 | \
CS_MODE_SYSTEMZ_Z196 | \
CS_MODE_SYSTEMZ_ZEC12 | \
CS_MODE_SYSTEMZ_Z13 | \
CS_MODE_SYSTEMZ_Z14 | \
CS_MODE_SYSTEMZ_Z15 | \
CS_MODE_SYSTEMZ_Z16 | \
CS_MODE_SYSTEMZ_GENERIC \
), \
}
#define CS_ARCH_CONFIG_XCORE \
{ \
XCore_global_init, \
XCore_option, \
~(CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_M68K \
{ \
M68K_global_init, \
M68K_option, \
~(CS_MODE_BIG_ENDIAN | CS_MODE_M68K_000 | CS_MODE_M68K_010 | CS_MODE_M68K_020 \
| CS_MODE_M68K_030 | CS_MODE_M68K_040 | CS_MODE_M68K_060), \
}
#define CS_ARCH_CONFIG_TMS320C64X \
{ \
TMS320C64x_global_init, \
TMS320C64x_option, \
~(CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_M680X \
{ \
M680X_global_init, \
M680X_option, \
~(CS_MODE_M680X_6301 | CS_MODE_M680X_6309 | CS_MODE_M680X_6800 \
| CS_MODE_M680X_6801 | CS_MODE_M680X_6805 | CS_MODE_M680X_6808 \
| CS_MODE_M680X_6809 | CS_MODE_M680X_6811 | CS_MODE_M680X_CPU12 \
| CS_MODE_M680X_HCS08), \
}
#define CS_ARCH_CONFIG_EVM \
{ \
EVM_global_init, \
EVM_option, \
0, \
}
#define CS_ARCH_CONFIG_MOS65XX \
{ \
MOS65XX_global_init, \
MOS65XX_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_MOS65XX_6502 | CS_MODE_MOS65XX_65C02 \
| CS_MODE_MOS65XX_W65C02 | CS_MODE_MOS65XX_65816_LONG_MX), \
}
#define CS_ARCH_CONFIG_WASM \
{ \
WASM_global_init, \
WASM_option, \
0, \
}
#define CS_ARCH_CONFIG_BPF \
{ \
BPF_global_init, \
BPF_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_BPF_CLASSIC | CS_MODE_BPF_EXTENDED \
| CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_RISCV \
{ \
RISCV_global_init, \
RISCV_option, \
~(CS_MODE_RISCV32 | CS_MODE_RISCV64 | CS_MODE_RISCVC), \
}
#define CS_ARCH_CONFIG_SH \
{ \
SH_global_init, \
SH_option, \
~(CS_MODE_SH2 | CS_MODE_SH2A | CS_MODE_SH3 | \
CS_MODE_SH4 | CS_MODE_SH4A | \
CS_MODE_SHFPU | CS_MODE_SHDSP|CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_TRICORE \
{ \
TRICORE_global_init, \
TRICORE_option, \
~(CS_MODE_TRICORE_110 | CS_MODE_TRICORE_120 | CS_MODE_TRICORE_130 \
| CS_MODE_TRICORE_131 | CS_MODE_TRICORE_160 | CS_MODE_TRICORE_161 \
| CS_MODE_TRICORE_162 | CS_MODE_LITTLE_ENDIAN), \
}
#define CS_ARCH_CONFIG_ALPHA \
{ \
ALPHA_global_init, \
ALPHA_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_BIG_ENDIAN), \
}
#define CS_ARCH_CONFIG_LOONGARCH \
{ \
LoongArch_global_init, \
LoongArch_option, \
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_LOONGARCH32 | CS_MODE_LOONGARCH64), \
}
#define CS_ARCH_CONFIG_XTENSA \
{ \
Xtensa_global_init, \
Xtensa_option, \
~(CS_MODE_XTENSA_ESP32 | CS_MODE_XTENSA_ESP32S2 | \
CS_MODE_XTENSA_ESP8266), \
}
#ifdef CAPSTONE_USE_ARCH_REGISTRATION
static cs_arch_config arch_configs[MAX_ARCH];
static uint32_t all_arch;
#else
static const cs_arch_config arch_configs[MAX_ARCH] = {
#ifdef CAPSTONE_HAS_ARM
CS_ARCH_CONFIG_ARM,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_AARCH64
CS_ARCH_CONFIG_AARCH64,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_SYSTEMZ
CS_ARCH_CONFIG_SYSTEMZ,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_MIPS
CS_ARCH_CONFIG_MIPS,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_X86
CS_ARCH_CONFIG_X86,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_POWERPC
CS_ARCH_CONFIG_PPC,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_SPARC
CS_ARCH_CONFIG_SPARC,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_XCORE
CS_ARCH_CONFIG_XCORE,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_M68K
CS_ARCH_CONFIG_M68K,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_TMS320C64X
CS_ARCH_CONFIG_TMS320C64X,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_M680X
CS_ARCH_CONFIG_M680X,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_EVM
CS_ARCH_CONFIG_EVM,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_MOS65XX
CS_ARCH_CONFIG_MOS65XX,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_WASM
CS_ARCH_CONFIG_WASM,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_BPF
CS_ARCH_CONFIG_BPF,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_RISCV
CS_ARCH_CONFIG_RISCV,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_SH
CS_ARCH_CONFIG_SH,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_TRICORE
CS_ARCH_CONFIG_TRICORE,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_ALPHA
CS_ARCH_CONFIG_ALPHA,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_HPPA
{
HPPA_global_init,
HPPA_option,
~(CS_MODE_LITTLE_ENDIAN | CS_MODE_BIG_ENDIAN | CS_MODE_HPPA_11 |
CS_MODE_HPPA_20 | CS_MODE_HPPA_20W),
},
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_LOONGARCH
CS_ARCH_CONFIG_LOONGARCH,
#else
{ NULL, NULL, 0 },
#endif
#ifdef CAPSTONE_HAS_XTENSA
CS_ARCH_CONFIG_XTENSA
#else
{ NULL, NULL, 0 },
#endif
};
// bitmask of enabled architectures
static const uint32_t all_arch = 0
#ifdef CAPSTONE_HAS_ARM
| (1 << CS_ARCH_ARM)
#endif
#if defined(CAPSTONE_HAS_AARCH64) || defined(CAPSTONE_HAS_ARM64)
| (1 << CS_ARCH_AARCH64)
#endif
#ifdef CAPSTONE_HAS_MIPS
| (1 << CS_ARCH_MIPS)
#endif
#ifdef CAPSTONE_HAS_X86
| (1 << CS_ARCH_X86)
#endif
#ifdef CAPSTONE_HAS_POWERPC
| (1 << CS_ARCH_PPC)
#endif
#ifdef CAPSTONE_HAS_SPARC
| (1 << CS_ARCH_SPARC)
#endif
#ifdef CAPSTONE_HAS_SYSTEMZ
| (1 << CS_ARCH_SYSTEMZ)
#endif
#ifdef CAPSTONE_HAS_XCORE
| (1 << CS_ARCH_XCORE)
#endif
#ifdef CAPSTONE_HAS_M68K
| (1 << CS_ARCH_M68K)
#endif
#ifdef CAPSTONE_HAS_TMS320C64X
| (1 << CS_ARCH_TMS320C64X)
#endif
#ifdef CAPSTONE_HAS_M680X
| (1 << CS_ARCH_M680X)
#endif
#ifdef CAPSTONE_HAS_EVM
| (1 << CS_ARCH_EVM)
#endif
#ifdef CAPSTONE_HAS_MOS65XX
| (1 << CS_ARCH_MOS65XX)
#endif
#ifdef CAPSTONE_HAS_WASM
| (1 << CS_ARCH_WASM)
#endif
#ifdef CAPSTONE_HAS_BPF
| (1 << CS_ARCH_BPF)
#endif
#ifdef CAPSTONE_HAS_RISCV
| (1 << CS_ARCH_RISCV)
#endif
#ifdef CAPSTONE_HAS_SH
| (1 << CS_ARCH_SH)
#endif
#ifdef CAPSTONE_HAS_TRICORE
| (1 << CS_ARCH_TRICORE)
#endif
#ifdef CAPSTONE_HAS_ALPHA
| (1 << CS_ARCH_ALPHA)
#endif
#ifdef CAPSTONE_HAS_HPPA
| (1 << CS_ARCH_HPPA)
#endif
#ifdef CAPSTONE_HAS_LOONGARCH
| (1 << CS_ARCH_LOONGARCH)
#endif
#ifdef CAPSTONE_HAS_XTENSA
| (1 << CS_ARCH_XTENSA)
#endif
;
#endif
#if defined(CAPSTONE_USE_SYS_DYN_MEM)
#if !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(_KERNEL_MODE)
// default
cs_malloc_t cs_mem_malloc = malloc;
cs_calloc_t cs_mem_calloc = calloc;
cs_realloc_t cs_mem_realloc = realloc;
cs_free_t cs_mem_free = free;
#if defined(_WIN32_WCE)
cs_vsnprintf_t cs_vsnprintf = _vsnprintf;
#else
cs_vsnprintf_t cs_vsnprintf = vsnprintf;
#endif // defined(_WIN32_WCE)
#elif defined(_KERNEL_MODE)
// Windows driver
cs_malloc_t cs_mem_malloc = cs_winkernel_malloc;
cs_calloc_t cs_mem_calloc = cs_winkernel_calloc;
cs_realloc_t cs_mem_realloc = cs_winkernel_realloc;
cs_free_t cs_mem_free = cs_winkernel_free;
cs_vsnprintf_t cs_vsnprintf = cs_winkernel_vsnprintf;
#else
// OSX kernel
extern void* kern_os_malloc(size_t size);
extern void kern_os_free(void* addr);
extern void* kern_os_realloc(void* addr, size_t nsize);
static void* cs_kern_os_calloc(size_t num, size_t size)
{
return kern_os_malloc(num * size); // malloc bzeroes the buffer
}
cs_malloc_t cs_mem_malloc = kern_os_malloc;
cs_calloc_t cs_mem_calloc = cs_kern_os_calloc;
cs_realloc_t cs_mem_realloc = kern_os_realloc;
cs_free_t cs_mem_free = kern_os_free;
cs_vsnprintf_t cs_vsnprintf = vsnprintf;
#endif // !defined(CAPSTONE_HAS_OSXKERNEL) && !defined(_KERNEL_MODE)
#else
// User-defined
cs_malloc_t cs_mem_malloc = NULL;
cs_calloc_t cs_mem_calloc = NULL;
cs_realloc_t cs_mem_realloc = NULL;
cs_free_t cs_mem_free = NULL;
cs_vsnprintf_t cs_vsnprintf = NULL;
#endif // defined(CAPSTONE_USE_SYS_DYN_MEM)
CAPSTONE_EXPORT
unsigned int CAPSTONE_API cs_version(int *major, int *minor)
{
if (major != NULL && minor != NULL) {
*major = CS_API_MAJOR;
*minor = CS_API_MINOR;
}
return (CS_API_MAJOR << 8) + CS_API_MINOR;
}
#define CS_ARCH_REGISTER(id) \
cs_arch_config cfg = CS_ARCH_CONFIG_##id; \
arch_configs[CS_ARCH_##id] = cfg; \
all_arch |= 1 << CS_ARCH_##id
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_arm(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_ARM)
CS_ARCH_REGISTER(ARM);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_aarch64(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_AARCH64)
CS_ARCH_REGISTER(AARCH64);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_mips(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_MIPS)
CS_ARCH_REGISTER(MIPS);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_x86(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_X86)
CS_ARCH_REGISTER(X86);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_powerpc(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_POWERPC)
CS_ARCH_REGISTER(PPC);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_sparc(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_SPARC)
CS_ARCH_REGISTER(SPARC);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_systemz(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_SYSTEMZ)
CS_ARCH_REGISTER(SYSTEMZ);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_xcore(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_XCORE)
CS_ARCH_REGISTER(XCORE);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_m68k(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_M68K)
CS_ARCH_REGISTER(M68K);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_tms320c64x(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_TMS320C64X)
CS_ARCH_REGISTER(TMS320C64X);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_m680x(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_M680X)
CS_ARCH_REGISTER(M680X);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_evm(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_EVM)
CS_ARCH_REGISTER(EVM);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_mos65xx(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_MOS65XX)
CS_ARCH_REGISTER(MOS65XX);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_wasm(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_WASM)
CS_ARCH_REGISTER(WASM);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_bpf(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_BPF)
CS_ARCH_REGISTER(BPF);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_riscv(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_RISCV)
CS_ARCH_REGISTER(RISCV);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_sh(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_SH)
CS_ARCH_REGISTER(SH);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_tricore(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_TRICORE)
CS_ARCH_REGISTER(TRICORE);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_alpha(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_ALPHA)
CS_ARCH_REGISTER(ALPHA);
#endif
}
CAPSTONE_EXPORT
void CAPSTONE_API cs_arch_register_loongarch(void)
{
#if defined(CAPSTONE_USE_ARCH_REGISTRATION) && defined(CAPSTONE_HAS_LOONGARCH)
CS_ARCH_REGISTER(LOONGARCH);
#endif
}
CAPSTONE_EXPORT
bool CAPSTONE_API cs_support(int query)
{
if (query == CS_ARCH_ALL)
return all_arch ==
((1 << CS_ARCH_ARM) | (1 << CS_ARCH_AARCH64) |
(1 << CS_ARCH_MIPS) | (1 << CS_ARCH_X86) |
(1 << CS_ARCH_PPC) | (1 << CS_ARCH_SPARC) |
(1 << CS_ARCH_SYSTEMZ) | (1 << CS_ARCH_XCORE) |
(1 << CS_ARCH_M68K) | (1 << CS_ARCH_TMS320C64X) |
(1 << CS_ARCH_M680X) | (1 << CS_ARCH_EVM) |
(1 << CS_ARCH_RISCV) | (1 << CS_ARCH_MOS65XX) |
(1 << CS_ARCH_WASM) | (1 << CS_ARCH_BPF) |
(1 << CS_ARCH_SH) | (1 << CS_ARCH_TRICORE) |
(1 << CS_ARCH_ALPHA) | (1 << CS_ARCH_HPPA) |
(1 << CS_ARCH_LOONGARCH) | (1 << CS_ARCH_XTENSA));
if ((unsigned int)query < CS_ARCH_MAX)
return all_arch & (1 << query);
if (query == CS_SUPPORT_DIET) {
#ifdef CAPSTONE_DIET
return true;
#else
return false;
#endif
}
if (query == CS_SUPPORT_X86_REDUCE) {
#if defined(CAPSTONE_HAS_X86) && defined(CAPSTONE_X86_REDUCE)
return true;
#else
return false;
#endif
}
// unsupported query
return false;
}
CAPSTONE_EXPORT
cs_err CAPSTONE_API cs_errno(csh handle)
{
struct cs_struct *ud;
if (!handle)
return CS_ERR_CSH;
ud = (struct cs_struct *)(uintptr_t)handle;
return ud->errnum;
}
CAPSTONE_EXPORT
const char * CAPSTONE_API cs_strerror(cs_err code)
{
switch(code) {
default:
return "Unknown error code";
case CS_ERR_OK:
return "OK (CS_ERR_OK)";
case CS_ERR_MEM:
return "Out of memory (CS_ERR_MEM)";
case CS_ERR_ARCH:
return "Invalid/unsupported architecture(CS_ERR_ARCH)";
case CS_ERR_HANDLE:
return "Invalid handle (CS_ERR_HANDLE)";
case CS_ERR_CSH:
return "Invalid csh (CS_ERR_CSH)";
case CS_ERR_MODE:
return "Invalid mode (CS_ERR_MODE)";
case CS_ERR_OPTION:
return "Invalid option (CS_ERR_OPTION)";
case CS_ERR_DETAIL:
return "Details are unavailable (CS_ERR_DETAIL)";
case CS_ERR_MEMSETUP:
return "Dynamic memory management uninitialized (CS_ERR_MEMSETUP)";
case CS_ERR_VERSION:
return "Different API version between core & binding (CS_ERR_VERSION)";
case CS_ERR_DIET:
return "Information irrelevant in diet engine (CS_ERR_DIET)";
case CS_ERR_SKIPDATA:
return "Information irrelevant for 'data' instruction in SKIPDATA mode (CS_ERR_SKIPDATA)";
case CS_ERR_X86_ATT:
return "AT&T syntax is unavailable (CS_ERR_X86_ATT)";
case CS_ERR_X86_INTEL:
return "INTEL syntax is unavailable (CS_ERR_X86_INTEL)";
case CS_ERR_X86_MASM:
return "MASM syntax is unavailable (CS_ERR_X86_MASM)";
}
}
CAPSTONE_EXPORT
cs_err CAPSTONE_API cs_open(cs_arch arch, cs_mode mode, csh *handle)
{
cs_err err;
struct cs_struct *ud = NULL;
if (!cs_mem_malloc || !cs_mem_calloc || !cs_mem_realloc || !cs_mem_free || !cs_vsnprintf)
// Error: before cs_open(), dynamic memory management must be initialized
// with cs_option(CS_OPT_MEM)
return CS_ERR_MEMSETUP;
if (arch < CS_ARCH_MAX && arch_configs[arch].arch_init) {
// verify if requested mode is valid
if (mode & arch_configs[arch].arch_disallowed_mode_mask) {
*handle = 0;
return CS_ERR_MODE;
}
ud = cs_mem_calloc(1, sizeof(*ud));
if (!ud) {
// memory insufficient
return CS_ERR_MEM;
}
ud->errnum = CS_ERR_OK;
ud->arch = arch;
ud->mode = mode;
// by default, do not break instruction into details
ud->detail_opt = CS_OPT_OFF;
ud->PrintBranchImmAsAddress = true;
// default skipdata setup
ud->skipdata_setup.mnemonic = SKIPDATA_MNEM;
err = arch_configs[ud->arch].arch_init(ud);
if (err) {
cs_mem_free(ud);
*handle = 0;
return err;
}
*handle = (uintptr_t)ud;
return CS_ERR_OK;
} else {
cs_mem_free(ud);
*handle = 0;
return CS_ERR_ARCH;
}
}
CAPSTONE_EXPORT
cs_err CAPSTONE_API cs_close(csh *handle)
{
struct cs_struct *ud = NULL;
struct insn_mnem *next = NULL, *tmp = NULL;
if (*handle == 0)
// invalid handle
return CS_ERR_CSH;
ud = (struct cs_struct *)(*handle);
if (ud->printer_info)
cs_mem_free(ud->printer_info);
// free the linked list of customized mnemonic
tmp = ud->mnem_list;
while(tmp) {
next = tmp->next;
cs_mem_free(tmp);
tmp = next;
}
cs_mem_free(ud->insn_cache);
memset(ud, 0, sizeof(*ud));
cs_mem_free(ud);
// invalidate this handle by ZERO out its value.
// this is to make sure it is unusable after cs_close()
*handle = 0;
return CS_ERR_OK;
}
/// replace str1 in target with str2; target starts with str1
/// output is put into result (which is array of char with size CS_MNEMONIC_SIZE)
/// return 0 on success, -1 on failure
#ifndef CAPSTONE_DIET
static int str_replace(char *result, char *target, const char *str1, char *str2)
{
size_t target_len = strlen(target);
size_t str1_len = strlen(str1);
if (target_len < str1_len) {
return -1;
}
// only perform replacement if the output fits into result
if (target_len - str1_len + strlen(str2) <= CS_MNEMONIC_SIZE - 1) {
// copy str2 to beginning of result
// skip str1 - already replaced by str2
snprintf(result, CS_MNEMONIC_SIZE, "%s%s", str2, target + str1_len);
return 0;
} else
return -1;
}
#endif
// fill insn with mnemonic & operands info
static void fill_insn(struct cs_struct *handle, cs_insn *insn, SStream *OS, MCInst *mci,
PostPrinter_t postprinter, const uint8_t *code)
{
#ifndef CAPSTONE_DIET
char *sp;
#endif
SStream_trimls(OS);
uint16_t copy_size = MIN(sizeof(insn->bytes), insn->size);
// fill the instruction bytes.
// we might skip some redundant bytes in front in the case of X86
memcpy(insn->bytes, code + insn->size - copy_size, copy_size);
insn->op_str[0] = '\0';
insn->size = copy_size;
// alias instruction might have ID saved in OpcodePub
if (MCInst_getOpcodePub(mci))
insn->id = MCInst_getOpcodePub(mci);
// post printer handles some corner cases (hacky)
if (postprinter)
postprinter((csh)handle, insn, OS, mci);
#ifndef CAPSTONE_DIET
memset(insn->mnemonic, '\0', sizeof(insn->mnemonic));
memset(insn->op_str, '\0', sizeof(insn->op_str));
SStream_extract_mnem_opstr(OS, insn->mnemonic, sizeof(insn->mnemonic), insn->op_str, sizeof(insn->op_str));
for (sp = insn->mnemonic; *sp; sp++) {
if (*sp == '|') // lock|rep prefix for x86
*sp = ' ';
}
// we might have customized mnemonic
if (handle->mnem_list) {
struct insn_mnem *tmp = handle->mnem_list;
while(tmp) {
if (tmp->insn.id == insn->id) {
char str[CS_MNEMONIC_SIZE] = { 0 };
if (!str_replace(str, insn->mnemonic, cs_insn_name((csh)handle, insn->id), tmp->insn.mnemonic)) {
// copy result to mnemonic
CS_ASSERT_RET(sizeof(insn->mnemonic) == sizeof(str));
(void)memcpy(insn->mnemonic, str, sizeof(insn->mnemonic));
insn->mnemonic[sizeof(insn->mnemonic) - 1] = '\0';
}
break;
}
tmp = tmp->next;
}
}
#endif
}
// how many bytes will we skip when encountering data (CS_OPT_SKIPDATA)?
// this very much depends on instruction alignment requirement of each arch.
static uint8_t skipdata_size(cs_struct *handle)
{
switch(handle->arch) {
default:
// should never reach
return (uint8_t)-1;
case CS_ARCH_ARM:
// skip 2 bytes on Thumb mode.
if (handle->mode & CS_MODE_THUMB)
return 2;
// otherwise, skip 4 bytes
return 4;
case CS_ARCH_AARCH64:
case CS_ARCH_MIPS:
case CS_ARCH_PPC:
case CS_ARCH_SPARC:
// skip 4 bytes
return 4;
case CS_ARCH_SYSTEMZ:
// SystemZ instruction's length can be 2, 4 or 6 bytes,
// so we just skip 2 bytes
return 2;
case CS_ARCH_X86:
// X86 has no restriction on instruction alignment
return 1;
case CS_ARCH_XCORE:
// XCore instruction's length can be 2 or 4 bytes,
// so we just skip 2 bytes
return 2;
case CS_ARCH_M68K:
// M68K has 2 bytes instruction alignment but contain multibyte instruction so we skip 2 bytes
return 2;
case CS_ARCH_TMS320C64X:
// TMS320C64x alignment is 4.
return 4;
case CS_ARCH_M680X:
// M680X alignment is 1.
return 1;
case CS_ARCH_EVM:
// EVM alignment is 1.
return 1;
case CS_ARCH_WASM:
//WASM alignment is 1
return 1;
case CS_ARCH_MOS65XX:
// MOS65XX alignment is 1.
return 1;
case CS_ARCH_BPF:
// both classic and extended BPF have alignment 8.
return 8;
case CS_ARCH_RISCV:
// special compress mode
if (handle->mode & CS_MODE_RISCVC)
return 2;
return 4;
case CS_ARCH_SH:
return 2;
case CS_ARCH_TRICORE:
// TriCore instruction's length can be 2 or 4 bytes,
// so we just skip 2 bytes