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The 5th byte is used to configure Sync/Latch pins, as described in LAN9252 datasheet.
However, current settings (88h) will configure Sync/Latch pins as Latch inputs. and Sync0/1 map are enabled (AL Event Request Register (0220h bit 2/3)).
In the project and toturial, Sync/Latch pins are used as Sync outputs!
Should we set this byte to 44h?
The text was updated successfully, but these errors were encountered:
Hi, I am using the Microchip-SAMD51-LAN9252-SSC_Config.xml in my project.
The ESI file generated by SSC contains below ESC_CONFIG_DATA:
The 5th byte is used to configure Sync/Latch pins, as described in LAN9252 datasheet.
However, current settings (88h) will configure Sync/Latch pins as Latch inputs. and Sync0/1 map are enabled (AL Event Request Register (0220h bit 2/3)).
In the project and toturial, Sync/Latch pins are used as Sync outputs!
Should we set this byte to 44h?
The text was updated successfully, but these errors were encountered: