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cve2_top.core
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cve2_top.core
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CAPI=2:
# Copyright lowRISC contributors.
# Licensed under the Apache License, Version 2.0, see LICENSE for details.
# SPDX-License-Identifier: Apache-2.0
name: "lowrisc:cve2:cve2_top:0.1"
description: "Ibex, a small RV32 CPU core"
filesets:
files_rtl:
depend:
- lowrisc:cve2:cve2_pkg
- lowrisc:cve2:cve2_core
- lowrisc:prim:buf
- lowrisc:prim:clock_mux2
- lowrisc:prim:flop
- lowrisc:prim:ram_1p_scr
files:
- rtl/cve2_register_file_ff.sv # generic FF-based
- rtl/cve2_register_file_fpga.sv # FPGA
- rtl/cve2_register_file_latch.sv # ASIC
- rtl/cve2_top.sv
file_type: systemVerilogSource
files_lint_verilator:
files:
- lint/verilator_waiver.vlt: {file_type: vlt}
files_lint_verible:
files:
- lint/verible_waiver.vbw: {file_type: veribleLintWaiver}
files_check_tool_requirements:
depend:
- lowrisc:tool:check_tool_requirements
parameters:
RVFI:
datatype: bool
paramtype: vlogdefine
SYNTHESIS:
datatype: bool
paramtype: vlogdefine
FPGA_XILINX:
datatype: bool
description: Identifies Xilinx FPGA targets to set DSP pragmas for performance counters.
default: false
paramtype: vlogdefine
RV32E:
datatype: int
default: 0
paramtype: vlogparam
RV32M:
datatype: str
default: cve2_pkg::RV32MFast
paramtype: vlogdefine
description: "RV32M implementation parameter enum. See the cve2_pkg::rv32m_e enum in cve2_pkg.sv for permitted values."
RV32B:
datatype: str
default: cve2_pkg::RV32BNone
paramtype: vlogdefine
description: "Bitmanip implementation parameter enum. See the cve2_pkg::rv32b_e enum in cve2_pkg.sv for permitted values."
RegFile:
datatype: str
default: cve2_pkg::RegFileFF
paramtype: vlogdefine
description: "Register file implementation parameter enum. See the cve2_pkg::regfile_e enum in cve2_pkg.sv for permitted values."
ICache:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable instruction cache"
ICacheECC:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable ECC protection in instruction cache"
WritebackStage:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables third pipeline stage (EXPERIMENTAL) [0/1]"
BranchPredictor:
datatype: int
paramtype: vlogparam
default: 0
description: "Enables static branch prediction (EXPERIMENTAL)"
SecureCVE2:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables security hardening features (EXPERIMENTAL) [0/1]"
ICacheScramble:
datatype: int
default: 0
paramtype: vlogparam
description: "Enables ICache scrambling feature (EXPERIMENTAL) [0/1]"
PMPEnable:
datatype: int
default: 0
paramtype: vlogparam
description: "Enable PMP"
PMPGranularity:
datatype: int
default: 0
paramtype: vlogparam
description: "Granularity of NAPOT range, 0 = 4 byte, 1 = byte, 2 = 16 byte, 3 = 32 byte etc"
PMPNumRegions:
datatype: int
default: 4
paramtype: vlogparam
description: "Number of PMP regions"
targets:
default: &default_target
filesets:
- tool_verilator ? (files_lint_verilator)
- tool_veriblelint ? (files_lint_verible)
- files_rtl
- files_check_tool_requirements
toplevel: cve2_top
parameters:
- tool_vivado ? (FPGA_XILINX=true)
lint:
<<: *default_target
parameters:
- SYNTHESIS=true
- RVFI=true
default_tool: verilator
tools:
verilator:
mode: lint-only
verilator_options:
- "-Wall"
# RAM primitives wider than 64bit (required for ECC) fail to build in
# Verilator without increasing the unroll count (see Verilator#1266)
- "--unroll-count 72"
format:
filesets:
- files_rtl
parameters:
- SYNTHESIS=true
- RVFI=true
default_tool: veribleformat
toplevel: cve2_top
tools:
veribleformat:
verible_format_args:
- "--inplace"
- "--formal_parameters_indentation=indent"
- "--named_parameter_indentation=indent"
- "--named_port_indentation=indent"
- "--port_declarations_indentation=indent"