main_clock.qip

set_global_assignment -name IP_TOOL_NAME "ALTPLL"
set_global_assignment -name IP_TOOL_VERSION "19.1"
set_global_assignment -name IP_GENERATED_DEVICE_FAMILY "{Cyclone 10 LP}"
set_global_assignment -name VHDL_FILE [file join $::quartus(qip_path) "main_clock.vhd"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "main_clock.bsf"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "main_clock.cmp"]
set_global_assignment -name MISC_FILE [file join $::quartus(qip_path) "main_clock.ppf"]