From a74ad61cf98591f4d0639c2d7ff104cc7e334c9e Mon Sep 17 00:00:00 2001 From: Herbert <34774005+Herbert-Karl@users.noreply.github.com> Date: Tue, 24 Mar 2020 11:13:28 +0100 Subject: [PATCH] added test for a more complex asm file --- src/test/examples/test.asm | 352 +++++++++++++++++++++++++++ src/test/examples/test_parsed.hex | 391 ++++++++++++++++++++++++++++++ src/test/suite/extension.test.ts | 29 +++ 3 files changed, 772 insertions(+) create mode 100644 src/test/examples/test.asm create mode 100644 src/test/examples/test_parsed.hex diff --git a/src/test/examples/test.asm b/src/test/examples/test.asm new file mode 100644 index 0000000..38bb6c9 --- /dev/null +++ b/src/test/examples/test.asm @@ -0,0 +1,352 @@ + .data errorText "error ",0 + .data allPassedText "all passed!",0 + + .word DATA1 + .word DATA2 + + .data errFlagText "errFlag set: ",0 + + .const TERMINAL_PORT 0x1f + + .reg errNum R7 + .reg errFlag R8 + +; test LDI CPI 0x0000 + LDI errNum,0x0000 + EOR r0,r0 + LDI r0,5 + cpi r0,5 + breq _SKIP_ADDR_ + jmp error + cpi r0,4 + brne _SKIP_ADDR_ + jmp error + cpi r0,4 + brne _SKIP_ADDR_ + jmp error + LDI R0,1 + DEC R0 + breq _SKIP_ADDR_ + jmp error + +; test ADD 0x0001 + LDI errNum,0x0001 + LDI r0,7 + LDI r1,5 + ADD r0,r1 + cpi r0,5+7 + breq _SKIP_ADDR_ + jmp error + + LDI r0,30 + LDI r1,30 + ADD r0,r1 + cpi r0,60 + breq _SKIP_ADDR_ + jmp error + +; test SUB 0x0002 + LDI errNum,0x0002 + LDI r0,7 + LDI r1,5 + SUB r0,r1 + cpi r0,7-5 + breq _SKIP_ADDR_ + jmp error + + LDI r0,35 + LDI r1,33 + SUB r0,r1 + cpi r0,2 + breq _SKIP_ADDR_ + jmp error + +; test ADC 0x0003 + LDI errNum,0x0003 + LDI r0,7 + LDI r1,5 + LDI r2,1 + LSR r2 + ADC r0,r1 + cpi r0,7+5+1 + breq _SKIP_ADDR_ + jmp error + +; test SBC 0x0004 + LDI errNum,0x0004 + LDI r0,7 + LDI r1,5 + LDI r2,1 + LSR r2 + SBC r0,r1 + cpi r0,7-5-1 + breq _SKIP_ADDR_ + jmp error + +; test ASR 0x0005 + LDI errNum,0x0005 + LDI r0,-1 + ASR r0 + cpi r0,-1 + breq _SKIP_ADDR_ + jmp error + LDI r0,0x7fff + ASR r0 + cpi r0,0x3fff + breq _SKIP_ADDR_ + jmp error + LDI r0,0x1 + ASR r0 + brcs _SKIP_ADDR_ + jmp error + ASR r0 + brcc _SKIP_ADDR_ + jmp error + + +; test SWAP 0x0006 + LDI errNum,0x0006 + LDI r0,0x1234 + swap r0 + cpi r0,0x3412 + breq _SKIP_ADDR_ + jmp error + LDI r0,0x1234 + swapn r0 + cpi r0,0x2143 + breq _SKIP_ADDR_ + jmp error + + +; test RCALL 0x0007 + LDI errNum,0x0007 + cpi errFlag,0 + breq _SKIP_ADDR_ + jmp error + ldi errFlag,1 + rcall r0,c1 +c1: LDI r1,_ADDR_ + ldi errFlag,0 + cmp r1,r0 + breq _SKIP_ADDR_ + jmp error + +; test RRET 0x0008 + LDI errNum,0x0008 + cpi errFlag,0 + breq _SKIP_ADDR_ + jmp error + LDI r0,c2 + ldi errFlag,2 + RRET r0 + jmp error +c2: ldi errFlag,0 + + +; test MUL 0x0009 + LDI errNum,0x0009 + LDI R0,7 + MULI r0,3 + cpi R0,3*7 + breq _SKIP_ADDR_ + jmp error + LDI R0,7 + MULI r0,40 + cpi R0,40*7 + breq _SKIP_ADDR_ + jmp error + LDI R0,7 + LDI R1,3 + MUL r0,r1 + cpi R0,3*7 + breq _SKIP_ADDR_ + jmp error + +; test LD 0x000A + LDI errNum,0x000A + LDI R0,5 + STS DATA1,R0 + INC R0 + STS DATA2,R0 + LDS R1,DATA1 + cpi R1,5 + breq _SKIP_ADDR_ + jmp error + LDS R1,DATA2 + cpi R1,6 + breq _SKIP_ADDR_ + jmp error + LDI R3,DATA1 + LD R4,[R3] + cpi R4,5 + breq _SKIP_ADDR_ + jmp error + inc r3 + LD R4,[R3] + cpi R4,6 + breq _SKIP_ADDR_ + jmp error + +; test ST 0x000B + LDI errNum,0x000B + LDI R3,DATA1 + LDI R0,5 + ST [R3],R0 + INC R0 + INC R3 + ST [R3],R0 + LDS R2,DATA1 + cpi R2,5 + breq _SKIP_ADDR_ + jmp error + LDS R2,DATA2 + cpi R2,6 + breq _SKIP_ADDR_ + jmp error + +; test LDO 0x000C + LDI errNum,0x000C + LDI R0,15 + STS DATA1,R0 + LDI R0,DATA1-4 + LDD R1,[R0+4] + cpi R1,15 + breq _SKIP_ADDR_ + jmp error + +; test STO 0x000D + LDI errNum,0x000D + LDI R0,16 + LDI R1,DATA2-4 + STD [R1+4],R0 + LDS R1,DATA2 + cpi R1,16 + breq _SKIP_ADDR_ + jmp error + + +; test BRN 0x000E + LDI errNum,0x000E + cpi errFlag,0 + breq _SKIP_ADDR_ + jmp error + LDI errFlag,4 + LDI R0,0x7ffe + INC R0 + BRPL _SKIP_ADDR_ + jmp error + INC R0 + BRMI _SKIP_ADDR_ + jmp error + LDI errFlag,0 + +; test AND and flags 0x000F + LDI errNum,0x000F + LDI errFlag,1 + LDI R0,3 + ANDI R0,8 + BREQ _SKIP_ADDR_ + JMP error + LDI errFlag,2 + LDI R0,3 + ANDI R0,3 + BRNE _SKIP_ADDR_ + JMP error + LDI errFlag,0 + +; test OR and flags 0x0010 + LDI errNum,0x0010 + LDI errFlag,1 + LDI R0,0 + ORI R0,0 + BREQ _SKIP_ADDR_ + JMP error + LDI errFlag,2 + LDI R0,3 + ORI R0,3 + BRNE _SKIP_ADDR_ + JMP error + LDI errFlag,0 + +; test EOR and flags 0x0011 + LDI errNum,0x0011 + LDI errFlag,1 + LDI R0,1 + EORI R0,1 + BREQ _SKIP_ADDR_ + JMP error + LDI errFlag,2 + LDI R0,3 + EORI R0,2 + BRNE _SKIP_ADDR_ + JMP error + LDI errFlag,0 + + + +; if this statement is reached all tests are passed + + cpi errFlag,0 ; check errflag + breq ok + ldi r0,errFlagText + call textOutR0 + mov r0,errFlag + call hexOutR0 + brk + jmp _ADDR_ ; if ok do nothing + +ok: ldi r0,allPassedText + call textOutR0 + + jmp _ADDR_ ; if ok do nothing + +; is called if an error ocured +error: ldi r0,errorText + call textOutR0 + + MOV r0,errNum + call hexOutR0 + + brk ; on error set a break! + jmp _ADDR_ + +; write text to console R0 points to + .reg TEXT r0 ; text addr + .reg CHAR r1 ; a single character +textOutR0: + LD CHAR, [TEXT] + out TERMINAL_PORT,CHAR + inc TEXT + cpi CHAR,0 + brne textOutR0 + ret + +; write R0 to console as 4 digit hex number + .reg DATA r0 ; data + .reg DIGIT r1 ; a single digit + .reg CREG r2 ; return adress register + +hexOutR0: + swap DATA + swapn DATA + RCALL CREG,hexDigitOutR0 + swapn DATA + RCALL CREG,hexDigitOutR0 + swap DATA + swapn DATA + RCALL CREG,hexDigitOutR0 + swapn DATA + RCALL CREG,hexDigitOutR0 + ret + +; write R0 to console as 1 digit hex number +hexDigitOutR0: + mov DIGIT,DATA + andi DIGIT,0xf + cpi DIGIT,10 + brcc h3 ; larger then 10 + addi DIGIT,'0' + jmp h4 +h3: addi DIGIT,'A'-10 +h4: out TERMINAL_PORT,DIGIT + rret CREG diff --git a/src/test/examples/test_parsed.hex b/src/test/examples/test_parsed.hex new file mode 100644 index 0000000..16b5027 --- /dev/null +++ b/src/test/examples/test_parsed.hex @@ -0,0 +1,391 @@ +v2.0 raw +1400 +5260 +5320 +8022 +5000 +8020 +1200 +5250 +52a0 +53c0 +8021 +5000 +8021 +1200 +5310 +803a +1200 +8020 +5000 +8046 +1200 +5380 +8061 +1200 +5270 +52c0 +53a0 +8064 +1200 +5300 +8065 +1200 +5200 +52f0 +5350 +53e0 +8067 +1200 +53b0 +806c +1200 +5280 +5290 +5390 +806f +1200 +5230 +8070 +1200 +52b0 +8072 +1200 +5210 +5220 +5240 +5360 +5370 +8073 +1200 +52d0 +52e0 +53d0 +8074 +1200 +53f0 +1470 +1000 +1405 +3c05 +5e02 +8154 +6c00 +3c04 +6402 +8154 +6c00 +3c04 +6402 +8154 +6c00 +1401 +2001 +5e02 +8154 +6c00 +1471 +1407 +1415 +401 +3c0c +5e01 +6ef8 +150e +151e +401 +803c +3a00 +5e01 +6ef1 +1472 +1407 +1415 +801 +3c02 +5e01 +6eea +8023 +1200 +8021 +1210 +801 +3c02 +5e01 +6ee2 +1473 +1407 +1415 +1421 +4020 +601 +3c0d +5e01 +6ed9 +1474 +1407 +1415 +1421 +4020 +a01 +3c01 +5e01 +6ed0 +1475 +ffff +1300 +4600 +ffff +3b00 +5e01 +6ec8 +ffff +1200 +4600 +bfff +3a00 +5e01 +6ec1 +1401 +4600 +5c01 +6ebd +4600 +6201 +6eba +1476 +9234 +1200 +4800 +b412 +3a00 +5e01 +6eb2 +9234 +1200 +4a00 +a143 +3a00 +5e01 +6eab +1477 +3c80 +5e01 +6ea7 +1481 +80b0 +6800 +80b0 +1210 +1480 +3810 +5e01 +6e9e +1478 +3c80 +5e01 +6e9a +80bf +1200 +1482 +6a00 +6e95 +1480 +1479 +1407 +3603 +3d05 +5e01 +6e8e +1407 +8028 +3400 +8118 +3a00 +5e01 +6e87 +1407 +1413 +3201 +3d05 +5e01 +6e81 +147a +1405 +5330 +1801 +5340 +5713 +3c15 +5e01 +6e78 +5714 +3c16 +5e01 +6e74 +1533 +4e43 +3c45 +5e01 +6e6f +1831 +4e43 +3c46 +5e01 +6e6a +147b +1533 +1405 +4c30 +1801 +1831 +4c30 +5723 +3c25 +5e01 +6e5f +5724 +3c26 +5e01 +6e5b +147c +140f +5330 +140f +8004 +5a10 +3c1f +5e01 +6e52 +147d +1500 +1510 +8004 +5810 +5714 +3d10 +5e01 +6e49 +147e +3c80 +5e01 +6e45 +1484 +fffe +1200 +1801 +6601 +6e3f +1801 +6001 +6e3c +1480 +147f +1481 +1403 +2808 +5e01 +6e35 +1482 +1403 +2803 +6401 +6e30 +1480 +1570 +1481 +1400 +2c00 +5e01 +6e29 +1482 +1403 +2c03 +6401 +6e24 +1480 +1571 +1481 +1401 +3001 +5e01 +6e1d +1482 +1403 +3002 +6401 +6e18 +1480 +3c80 +5e0e +1505 +20e1 +8145 +12f0 +4cef +6e1d +208 +20e1 +814b +12f0 +4cef +6e1f +7c00 +6fff +1407 +20e1 +8153 +12f0 +4cef +6e0f +6fff +1400 +20e1 +815a +12f0 +4cef +6e08 +207 +20e1 +8160 +12f0 +4cef +6e0a +7c00 +6fff +4e10 +73f1 +1801 +3c10 +65fb +4efe +18e1 +6a0f +4800 +4a00 +817b +6820 +4a00 +817b +6820 +4800 +4a00 +817b +6820 +4a00 +817b +6820 +4efe +18e1 +6a0f +210 +281f +3c1a +6203 +8030 +1610 +6e02 +8037 +1610 +73f1 +6a02 diff --git a/src/test/suite/extension.test.ts b/src/test/suite/extension.test.ts index 00cf049..c1b7ad6 100644 --- a/src/test/suite/extension.test.ts +++ b/src/test/suite/extension.test.ts @@ -50,4 +50,33 @@ suite('Extension Test Suite', () => { // cleanup fs.unlinkSync(parsedFile.fsPath); // removes the output file from this test; subsequent test should start without a parsed .hex file }); + + test('Parsing complex asm file', async () => { + // defining URIs for the files used in this test + const asmFile = vscode.Uri.file(path.join(__dirname + testFolderLocation + 'test.asm')); + const hexFile = vscode.Uri.file(path.join(__dirname + testFolderLocation + 'test_parsed.hex')); + const parsedFile = vscode.Uri.file(path.join(__dirname + testFolderLocation + 'test.hex')); + + if(fs.existsSync(parsedFile.fsPath)) { + // if an output file is present before we parse one in this test, we remove it + fs.unlinkSync(parsedFile.fsPath); + } + + const document = await vscode.workspace.openTextDocument(asmFile); + const editor = await vscode.window.showTextDocument(document); + + let errorMessage = await vscode.commands.executeCommand('digital-asm.parse-asm', asmFile); + + assert.ifError(errorMessage); + + // getting the content of the files + let parsedContent = fs.readFileSync(parsedFile.fsPath, 'utf-8'); + const expectedContent = fs.readFileSync(hexFile.fsPath, 'utf-8'); + + assert.deepEqual(parsedContent, expectedContent); + + // cleanup + fs.unlinkSync(parsedFile.fsPath); // removes the output file from this test; subsequent test should start without a parsed .hex file + }); + });