EECS 151/251A ASIC Project Specification: RISC-V Processor Design

• Project Overview : Introduction, Project setup and Grading
• Checkpoint 1 : ALU design and Pipeline diagram due: March 19th, 2023
• Checkpoint 2 : Fully functioning core
• Checkpoint 3 : Cache
• Checkpoint 4 : Synthesis, PAR & Power
• Final Deliverables: Final Report, Final Code

Resources:

RISC-V Instruction Set Manual (Volume 1, Unprivileged Spec)