diff --git a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td index 448a171cf3e412..ab40c8ec4b6588 100644 --- a/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td +++ b/mlir/include/mlir/Dialect/LLVMIR/LLVMIntrinsicOps.td @@ -166,6 +166,9 @@ def LLVM_SMaxOp : LLVM_BinarySameArgsIntrOpI<"smax">; def LLVM_SMinOp : LLVM_BinarySameArgsIntrOpI<"smin">; def LLVM_UMaxOp : LLVM_BinarySameArgsIntrOpI<"umax">; def LLVM_UMinOp : LLVM_BinarySameArgsIntrOpI<"umin">; +def LLVM_SinhOp : LLVM_UnaryIntrOpF<"sinh">; +def LLVM_CoshOp : LLVM_UnaryIntrOpF<"cosh">; +def LLVM_TanhOp : LLVM_UnaryIntrOpF<"tanh">; class LLVM_MemcpyIntrOpBase : LLVM_ZeroResultIntrOp %1) { %4 = call <8 x float> @llvm.cos.v8f32(<8 x float> %1) ret void } +; CHECK-LABEL: llvm.func @hyperbolic_trig_test +define void @hyperbolic_trig_test(float %0, <8 x float> %1) { + ; CHECK: llvm.intr.sinh(%{{.*}}) : (f32) -> f32 + %3 = call float @llvm.sinh.f32(float %0) + ; CHECK: llvm.intr.sinh(%{{.*}}) : (vector<8xf32>) -> vector<8xf32> + %4 = call <8 x float> @llvm.sinh.v8f32(<8 x float> %1) + + ; CHECK: llvm.intr.cosh(%{{.*}}) : (f32) -> f32 + %5 = call float @llvm.cosh.f32(float %0) + ; CHECK: llvm.intr.cosh(%{{.*}}) : (vector<8xf32>) -> vector<8xf32> + %6 = call <8 x float> @llvm.cosh.v8f32(<8 x float> %1) + + ; CHECK: llvm.intr.tanh(%{{.*}}) : (f32) -> f32 + %7 = call float @llvm.tanh.f32(float %0) + ; CHECK: llvm.intr.tanh(%{{.*}}) : (vector<8xf32>) -> vector<8xf32> + %8 = call <8 x float> @llvm.tanh.v8f32(<8 x float> %1) + ret void +} ; CHECK-LABEL: llvm.func @copysign_test define void @copysign_test(float %0, float %1, <8 x float> %2, <8 x float> %3) { @@ -959,6 +977,12 @@ declare float @llvm.floor.f32(float) declare <8 x float> @llvm.floor.v8f32(<8 x float>) declare float @llvm.cos.f32(float) declare <8 x float> @llvm.cos.v8f32(<8 x float>) +declare float @llvm.sinh.f32(float) +declare <8 x float> @llvm.sinh.v8f32(<8 x float>) +declare float @llvm.cosh.f32(float) +declare <8 x float> @llvm.cosh.v8f32(<8 x float>) +declare float @llvm.tanh.f32(float) +declare <8 x float> @llvm.tanh.v8f32(<8 x float>) declare float @llvm.copysign.f32(float, float) declare <8 x float> @llvm.copysign.v8f32(<8 x float>, <8 x float>) declare float @llvm.pow.f32(float, float) diff --git a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir index de0dc8d21584fe..0634a7ba907f1e 100644 --- a/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir +++ b/mlir/test/Target/LLVMIR/llvmir-intrinsics.mlir @@ -112,6 +112,25 @@ llvm.func @cos_test(%arg0: f32, %arg1: vector<8xf32>) { llvm.return } +// CHECK-LABEL: @hyperbolic_trig_test +llvm.func @hyperbolic_trig_test(%arg0: f32, %arg1: vector<8xf32>) { + // CHECK: call float @llvm.sinh.f32 + llvm.intr.sinh(%arg0) : (f32) -> f32 + // CHECK: call <8 x float> @llvm.sinh.v8f32 + llvm.intr.sinh(%arg1) : (vector<8xf32>) -> vector<8xf32> + + // CHECK: call float @llvm.cosh.f32 + llvm.intr.cosh(%arg0) : (f32) -> f32 + // CHECK: call <8 x float> @llvm.cosh.v8f32 + llvm.intr.cosh(%arg1) : (vector<8xf32>) -> vector<8xf32> + + // CHECK: call float @llvm.tanh.f32 + llvm.intr.tanh(%arg0) : (f32) -> f32 + // CHECK: call <8 x float> @llvm.tanh.v8f32 + llvm.intr.tanh(%arg1) : (vector<8xf32>) -> vector<8xf32> + llvm.return +} + // CHECK-LABEL: @copysign_test llvm.func @copysign_test(%arg0: f32, %arg1: f32, %arg2: vector<8xf32>, %arg3: vector<8xf32>) { // CHECK: call float @llvm.copysign.f32