implementation in verilog rtl for an FPGA to detect the presence of a face in an image
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implementation in verilog rtl for an FPGA to detect the presence of a face in an image
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Alex-YiWang/FPGA-face-detection
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implementation in verilog rtl for an FPGA to detect the presence of a face in an image
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- Verilog 67.0%
- Python 15.5%
- C++ 12.3%
- C 2.8%
- Makefile 2.4%