All notable changes to this project will be documented in this file.
The format is based on Keep a Changelog and this project adheres to Semantic Versioning.
- Multichannel support in
inst64
#46
inst64
sources are only present if thesnitch_cluster
target is set #47.- zero-length ND transfers are properly handled #50.
- Missing signal assign in backend template
- Missing signal assign in legalizer template
- Various cleanup and modernization passes: CI, documentation, scripts
- Rework ND-front-ends for both 32 and 64-bit systems #30, #32, #33
- Remove default system wrappers and drivers
- Update descriptor-based frontend #18, #26
- Update tracer to the multiprotocol version of iDMA #8
- Modified
init
protocol to support writes to implement thesimple FIFO
interface - Update
inst64
frontend, add changes from Occamy, and update to newest backend version - Upstream resources and update dependencies
- Add true multiprotocol capabilities to iDMA using MARIO #22
- Add multiple default protocols next to AXI read/write:
- AXI read, OBI write
- OBI read, AXI write
- AXI and AXI Stream read/write
- OBI read, AXI write, Init read/write
- AXI read, OBI and Init read/write
- Add RT midend #24
- Add Mempool midend #34
- Add
retarget.py
Python script to transform patterns to new protocol configurations
- Increase SV language compatibility in
dma_core_wrap
. #28.
- Add a struct variant to CVA6's
dma_core_wrap
#25. - Expose all important back-end parameters in
dma_core_wrap
#27.
- Add a 2D version of the 64-bit register-based front-end intended to be used with CVA6 and enable
it in the
dma_core_wrap
#27.
- Fix
idma_backend
instantiation indma_core_wrap
#23.
- Fix typo in
dma_core_wrap
#21.
- Bump AXI version to
v.0.39.0-beta.2
#20. - Add new protocol capabilities introduced by #20 to the
README.md
.
- Various fixes; add missing ports in the testbenches, remove stale comments, and remove duplicates
in
Bender.yml
#17.
- Add
guard.svh
, a simple macro to guard nonsynthesizable code in the iDMA repository #17. - Add support for the OBI v1.5.0 protocol #20.
- Add support for the AXI4 Lite protocol #20.
dma_core_wrap
: Remove parameterDmaAddrWidth
inidma_reg64_frontend
#16.
- Fix the
Aw
-handshaking in thechannel-coupler
module #13. - Minor fixes in
dma_core_wrap
andidma_reg64_frontend
#15.
dma_core_wrap
has lost the DmaAddrWidth
parameter rendering v0.3.0
incompatible to previous
versions.
- Add support to enable non-ideal behavior of the testbench memory using the
axi_throttle
module as well as an AXI multicut.
- Update the following dependencies:
axi
fromv0.35.1
tov0.37.0
common_cells
from1.21.0
to1.26.0
common_verification
from0.2.0
to0.2.2
- Replace local modules with their upstream versions: #11, #12.
- Fix the
Aw
-handshaking in thechannel-coupler
module #10. - Fix missing python modules in GitHub CI.
- Fix wrong date format as well as missing indentation in
CHANGELOG.md
.
v0.2.4
is fully backward-compatible to versions v0.2.0
through v0.2.3
.
- Morty is now fetched as a binary distributable for building the doc in CI.
- Add GitHub actions to lint the code as well as build the documentation. Remove the corresponding jobs from the IIS-internal GitLab pipeline.
- Fix the
AX
-handshaking. The ready signal of the iDMA request no longer depends on the ready signal of theAx
channels. See #3.
- Moved the IIS-internal non-free resources to a dedicated subgroup to tidy up. Version v0.2.1 is fully compatible with v0.2.0.
- Added a completely redesigned DMA engine - the iDMA including a basic verification environment.
- Final version of the legacy DMA engine (used to be part of the AXI Repository
on the
axi_dma_tbenz
branch). This release replaces all older versions of this IP.