From aa4eabf9240c5b4fb9cc2f863e72a65927fe87f7 Mon Sep 17 00:00:00 2001 From: Sujana M Date: Thu, 7 Nov 2024 15:12:36 +0530 Subject: [PATCH] Changed to exerciser test 906 and 907 - Changes to reflect the MSI changes Signed-off-by: Sujana M --- .../exerciser/operating_system/test_e006.c | 42 ++++++++++++------- .../exerciser/operating_system/test_e007.c | 33 ++++++++------- 2 files changed, 45 insertions(+), 30 deletions(-) diff --git a/test_pool/exerciser/operating_system/test_e006.c b/test_pool/exerciser/operating_system/test_e006.c index 5f803acd..3ab3226b 100644 --- a/test_pool/exerciser/operating_system/test_e006.c +++ b/test_pool/exerciser/operating_system/test_e006.c @@ -39,6 +39,7 @@ static uint32_t irq_pending; static uint32_t lpi_int_id = 0x204C; static uint32_t mask_value; +static uint32_t msi_check; static void @@ -224,18 +225,22 @@ inject_error(uint32_t e_bdf, uint32_t instance, uint32_t aer_offset) status = val_exerciser_set_param(ERROR_INJECT_TYPE, err_code, 0, instance); value = val_exerciser_ops(INJECT_ERROR, err_code, instance); - /*Interrupt must be generated on error detection if errors are not masked*/ - if (mask_value == 0) { - timeout = TIMEOUT_LARGE; - while ((--timeout > 0) && irq_pending) - {}; - - if (timeout == 0) - { - val_gic_free_irq(irq_pending, 0); - val_print(ACS_PRINT_ERR, - "\n Intr not trigerred on err injection bdf 0x%x", e_bdf); - return 1; + /* If MSI/MSI-X is supported then interrupt must be generated + * on error detection if errors are not masked*/ + if (msi_check == 1) + { + if (mask_value == 0) { + timeout = TIMEOUT_LARGE; + while ((--timeout > 0) && irq_pending) + {}; + + if (timeout == 0) + { + val_gic_free_irq(irq_pending, 0); + val_print(ACS_PRINT_ERR, + "\n Intr not trigerred on err injection bdf 0x%x", e_bdf); + return 1; + } } } @@ -305,6 +310,7 @@ payload(void) continue; val_pcie_enable_eru(erp_bdf); + msi_check = 0; /*Check AER capability for exerciser and its RP */ if (val_pcie_find_capability(e_bdf, PCIE_ECAP, ECID_AER, &aer_offset) != PCIE_SUCCESS) { @@ -335,15 +341,15 @@ payload(void) /* Search for MSI-X Capability */ if (val_pcie_find_capability(e_bdf, PCIE_CAP, CID_MSIX, &msi_cap_offset)) { - val_print(ACS_PRINT_DEBUG, "\n No MSI-X Capability, Skipping for Bdf 0x%x", e_bdf); - continue; + val_print(ACS_PRINT_DEBUG, "\n No MSI-X Capability for Bdf 0x%x", e_bdf); } if (val_pcie_find_capability(erp_bdf, PCIE_CAP, CID_MSIX, &msi_cap_offset)) { val_print(ACS_PRINT_DEBUG, "\n No MSI-X Capability for RP Bdf 0x%x", erp_bdf); - continue; + goto err_check; } + msi_check = 1; /* Get DeviceID & ITS_ID for this device */ status = val_iovirt_get_device_info(PCIE_CREATE_BDF_PACKED(erp_bdf), PCIE_EXTRACT_BDF_SEG(erp_bdf), &device_id, @@ -371,6 +377,7 @@ payload(void) return; } +err_check: test_skip = 0; val_pcie_find_capability(erp_bdf, PCIE_ECAP, ECID_AER, &rp_aer_offset); val_pcie_read_cfg(erp_bdf, rp_aer_offset + AER_ROOT_ERR_CMD_OFFSET, &value); @@ -412,7 +419,10 @@ payload(void) * Rootport's Device Status Register to clear any pending urd status. */ val_pcie_clear_urd(erp_bdf); - val_gic_free_msi(erp_bdf, device_id, its_id, lpi_int_id + instance, msi_index); + + if (msi_check == 1) { + val_gic_free_msi(erp_bdf, device_id, its_id, lpi_int_id + instance, msi_index); + } } if (test_skip == 1) diff --git a/test_pool/exerciser/operating_system/test_e007.c b/test_pool/exerciser/operating_system/test_e007.c index 8b0381e9..dc68bff4 100644 --- a/test_pool/exerciser/operating_system/test_e007.c +++ b/test_pool/exerciser/operating_system/test_e007.c @@ -160,6 +160,7 @@ payload(void) uint32_t source_id; uint32_t dpc_trigger_reason; uint32_t timeout; + uint32_t msi_check = 0; uint32_t device_id = 0; uint32_t stream_id = 0; @@ -193,8 +194,6 @@ payload(void) continue; } - test_skip = 0; - /* Check AER capability for both exerciser and RP */ if (val_pcie_find_capability(e_bdf, PCIE_ECAP, ECID_AER, &aer_offset) != PCIE_SUCCESS) { val_print(ACS_PRINT_ERR, "\n AER Capability not supported, Bdf : 0x%x", e_bdf); @@ -207,11 +206,12 @@ payload(void) } /* Search for MSI-X Capability */ - if (val_pcie_find_capability(e_bdf, PCIE_CAP, CID_MSIX, &msi_cap_offset)) { - val_print(ACS_PRINT_ERR, "\n No MSI-X Capability, Skipping for Bdf 0x%x", e_bdf); - continue; + if (val_pcie_find_capability(erp_bdf, PCIE_CAP, CID_MSIX, &msi_cap_offset)) { + val_print(ACS_PRINT_ERR, "\n No MSI-X Capability for Bdf 0x%x", erp_bdf); + goto err_check; } + msi_check = 1; /* Get DeviceID & ITS_ID for this device */ status = val_iovirt_get_device_info(PCIE_CREATE_BDF_PACKED(erp_bdf), PCIE_EXTRACT_BDF_SEG(erp_bdf), &device_id, @@ -239,12 +239,15 @@ payload(void) return; } +err_check: status = val_exerciser_set_param(ERROR_INJECT_TYPE, UNCORR_CMPT_TO, 1, instance); if (status != ERR_UNCORR) { val_print(ACS_PRINT_ERR, "\n Error Injection failed, Bdf : 0x%x", e_bdf); continue; } + test_skip = 0; + /* check for both fatal and non-fatal error */ for (int i = 0; i < 2; i++) { @@ -317,15 +320,18 @@ payload(void) fail_cnt++; } - timeout = TIMEOUT_LARGE; - while ((--timeout > 0) && irq_pending) - {}; + if (msi_check == 1) + { + timeout = TIMEOUT_LARGE; + while ((--timeout > 0) && irq_pending) + {}; - if (timeout == 0) { - val_gic_free_irq(irq_pending, 0); - val_print(ACS_PRINT_ERR, "\n Interrupt trigger failed for bdf 0x%lx", e_bdf); - fail_cnt++; - continue; + if (timeout == 0) { + val_gic_free_irq(irq_pending, 0); + val_print(ACS_PRINT_ERR, "\n Interrupt trigger failed for bdf 0x%x", e_bdf); + fail_cnt++; + continue; + } } val_pcie_read_cfg(erp_bdf, rp_dpc_cap_base + DPC_STATUS_OFFSET, ®_value); @@ -396,7 +402,6 @@ payload(void) } } - } if (test_skip)