From bf433b38c251bf417f8fefdec6d2a771694bf66b Mon Sep 17 00:00:00 2001 From: Krystian Hebel Date: Thu, 4 Apr 2024 17:30:25 +0200 Subject: [PATCH] x86/boot: read APIC base from register Some CPUs don't use default APIC base. Address in MSR is always valid, and it is already read to test for x2APIC. Signed-off-by: Krystian Hebel --- xen/arch/x86/boot/trampoline.S | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/xen/arch/x86/boot/trampoline.S b/xen/arch/x86/boot/trampoline.S index 4b5808b9cb..41eb3feaf0 100644 --- a/xen/arch/x86/boot/trampoline.S +++ b/xen/arch/x86/boot/trampoline.S @@ -88,11 +88,12 @@ trampoline_protmode_entry: */ mov $MSR_APIC_BASE, %ecx rdmsr - and $APIC_BASE_EXTD, %eax + test $APIC_BASE_EXTD, %eax jnz .Lx2apic /* Not x2APIC, read from MMIO */ - mov $(APIC_DEFAULT_PHYS_BASE + APIC_ID), %esp + and $APIC_BASE_ADDR_MASK, %eax + mov APIC_ID(%eax), %esp shr $24, %esp jmp 1f